1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * PCI VPD support 4 * 5 * Copyright (C) 2010 Broadcom Corporation. 6 */ 7 8 #include <linux/pci.h> 9 #include <linux/delay.h> 10 #include <linux/export.h> 11 #include <linux/sched/signal.h> 12 #include <asm/unaligned.h> 13 #include "pci.h" 14 15 #define PCI_VPD_LRDT_TAG_SIZE 3 16 #define PCI_VPD_SRDT_LEN_MASK 0x07 17 #define PCI_VPD_SRDT_TAG_SIZE 1 18 #define PCI_VPD_STIN_END 0x0f 19 #define PCI_VPD_INFO_FLD_HDR_SIZE 3 20 21 static u16 pci_vpd_lrdt_size(const u8 *lrdt) 22 { 23 return get_unaligned_le16(lrdt + 1); 24 } 25 26 static u8 pci_vpd_srdt_tag(const u8 *srdt) 27 { 28 return *srdt >> 3; 29 } 30 31 static u8 pci_vpd_srdt_size(const u8 *srdt) 32 { 33 return *srdt & PCI_VPD_SRDT_LEN_MASK; 34 } 35 36 static u8 pci_vpd_info_field_size(const u8 *info_field) 37 { 38 return info_field[2]; 39 } 40 41 /* VPD access through PCI 2.2+ VPD capability */ 42 43 static struct pci_dev *pci_get_func0_dev(struct pci_dev *dev) 44 { 45 return pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0)); 46 } 47 48 #define PCI_VPD_MAX_SIZE (PCI_VPD_ADDR_MASK + 1) 49 #define PCI_VPD_SZ_INVALID UINT_MAX 50 51 /** 52 * pci_vpd_size - determine actual size of Vital Product Data 53 * @dev: pci device struct 54 */ 55 static size_t pci_vpd_size(struct pci_dev *dev) 56 { 57 size_t off = 0, size; 58 unsigned char tag, header[1+2]; /* 1 byte tag, 2 bytes length */ 59 60 while (pci_read_vpd_any(dev, off, 1, header) == 1) { 61 size = 0; 62 63 if (off == 0 && (header[0] == 0x00 || header[0] == 0xff)) 64 goto error; 65 66 if (header[0] & PCI_VPD_LRDT) { 67 /* Large Resource Data Type Tag */ 68 if (pci_read_vpd_any(dev, off + 1, 2, &header[1]) != 2) { 69 pci_warn(dev, "failed VPD read at offset %zu\n", 70 off + 1); 71 return off ?: PCI_VPD_SZ_INVALID; 72 } 73 size = pci_vpd_lrdt_size(header); 74 if (off + size > PCI_VPD_MAX_SIZE) 75 goto error; 76 77 off += PCI_VPD_LRDT_TAG_SIZE + size; 78 } else { 79 /* Short Resource Data Type Tag */ 80 tag = pci_vpd_srdt_tag(header); 81 size = pci_vpd_srdt_size(header); 82 if (off + size > PCI_VPD_MAX_SIZE) 83 goto error; 84 85 off += PCI_VPD_SRDT_TAG_SIZE + size; 86 if (tag == PCI_VPD_STIN_END) /* End tag descriptor */ 87 return off; 88 } 89 } 90 return off; 91 92 error: 93 pci_info(dev, "invalid VPD tag %#04x (size %zu) at offset %zu%s\n", 94 header[0], size, off, off == 0 ? 95 "; assume missing optional EEPROM" : ""); 96 return off ?: PCI_VPD_SZ_INVALID; 97 } 98 99 static bool pci_vpd_available(struct pci_dev *dev, bool check_size) 100 { 101 struct pci_vpd *vpd = &dev->vpd; 102 103 if (!vpd->cap) 104 return false; 105 106 if (vpd->len == 0 && check_size) { 107 vpd->len = pci_vpd_size(dev); 108 if (vpd->len == PCI_VPD_SZ_INVALID) { 109 vpd->cap = 0; 110 return false; 111 } 112 } 113 114 return true; 115 } 116 117 /* 118 * Wait for last operation to complete. 119 * This code has to spin since there is no other notification from the PCI 120 * hardware. Since the VPD is often implemented by serial attachment to an 121 * EEPROM, it may take many milliseconds to complete. 122 * @set: if true wait for flag to be set, else wait for it to be cleared 123 * 124 * Returns 0 on success, negative values indicate error. 125 */ 126 static int pci_vpd_wait(struct pci_dev *dev, bool set) 127 { 128 struct pci_vpd *vpd = &dev->vpd; 129 unsigned long timeout = jiffies + msecs_to_jiffies(125); 130 unsigned long max_sleep = 16; 131 u16 status; 132 int ret; 133 134 do { 135 ret = pci_user_read_config_word(dev, vpd->cap + PCI_VPD_ADDR, 136 &status); 137 if (ret < 0) 138 return ret; 139 140 if (!!(status & PCI_VPD_ADDR_F) == set) 141 return 0; 142 143 if (time_after(jiffies, timeout)) 144 break; 145 146 usleep_range(10, max_sleep); 147 if (max_sleep < 1024) 148 max_sleep *= 2; 149 } while (true); 150 151 pci_warn(dev, "VPD access failed. This is likely a firmware bug on this device. Contact the card vendor for a firmware update\n"); 152 return -ETIMEDOUT; 153 } 154 155 static ssize_t pci_vpd_read(struct pci_dev *dev, loff_t pos, size_t count, 156 void *arg, bool check_size) 157 { 158 struct pci_vpd *vpd = &dev->vpd; 159 unsigned int max_len; 160 int ret = 0; 161 loff_t end = pos + count; 162 u8 *buf = arg; 163 164 if (!pci_vpd_available(dev, check_size)) 165 return -ENODEV; 166 167 if (pos < 0) 168 return -EINVAL; 169 170 max_len = check_size ? vpd->len : PCI_VPD_MAX_SIZE; 171 172 if (pos >= max_len) 173 return 0; 174 175 if (end > max_len) { 176 end = max_len; 177 count = end - pos; 178 } 179 180 if (mutex_lock_killable(&vpd->lock)) 181 return -EINTR; 182 183 while (pos < end) { 184 u32 val; 185 unsigned int i, skip; 186 187 if (fatal_signal_pending(current)) { 188 ret = -EINTR; 189 break; 190 } 191 192 ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR, 193 pos & ~3); 194 if (ret < 0) 195 break; 196 ret = pci_vpd_wait(dev, true); 197 if (ret < 0) 198 break; 199 200 ret = pci_user_read_config_dword(dev, vpd->cap + PCI_VPD_DATA, &val); 201 if (ret < 0) 202 break; 203 204 skip = pos & 3; 205 for (i = 0; i < sizeof(u32); i++) { 206 if (i >= skip) { 207 *buf++ = val; 208 if (++pos == end) 209 break; 210 } 211 val >>= 8; 212 } 213 } 214 215 mutex_unlock(&vpd->lock); 216 return ret ? ret : count; 217 } 218 219 static ssize_t pci_vpd_write(struct pci_dev *dev, loff_t pos, size_t count, 220 const void *arg, bool check_size) 221 { 222 struct pci_vpd *vpd = &dev->vpd; 223 unsigned int max_len; 224 const u8 *buf = arg; 225 loff_t end = pos + count; 226 int ret = 0; 227 228 if (!pci_vpd_available(dev, check_size)) 229 return -ENODEV; 230 231 if (pos < 0 || (pos & 3) || (count & 3)) 232 return -EINVAL; 233 234 max_len = check_size ? vpd->len : PCI_VPD_MAX_SIZE; 235 236 if (end > max_len) 237 return -EINVAL; 238 239 if (mutex_lock_killable(&vpd->lock)) 240 return -EINTR; 241 242 while (pos < end) { 243 ret = pci_user_write_config_dword(dev, vpd->cap + PCI_VPD_DATA, 244 get_unaligned_le32(buf)); 245 if (ret < 0) 246 break; 247 ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR, 248 pos | PCI_VPD_ADDR_F); 249 if (ret < 0) 250 break; 251 252 ret = pci_vpd_wait(dev, false); 253 if (ret < 0) 254 break; 255 256 buf += sizeof(u32); 257 pos += sizeof(u32); 258 } 259 260 mutex_unlock(&vpd->lock); 261 return ret ? ret : count; 262 } 263 264 void pci_vpd_init(struct pci_dev *dev) 265 { 266 if (dev->vpd.len == PCI_VPD_SZ_INVALID) 267 return; 268 269 dev->vpd.cap = pci_find_capability(dev, PCI_CAP_ID_VPD); 270 mutex_init(&dev->vpd.lock); 271 } 272 273 static ssize_t vpd_read(struct file *filp, struct kobject *kobj, 274 struct bin_attribute *bin_attr, char *buf, loff_t off, 275 size_t count) 276 { 277 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 278 279 return pci_read_vpd(dev, off, count, buf); 280 } 281 282 static ssize_t vpd_write(struct file *filp, struct kobject *kobj, 283 struct bin_attribute *bin_attr, char *buf, loff_t off, 284 size_t count) 285 { 286 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 287 288 return pci_write_vpd(dev, off, count, buf); 289 } 290 static BIN_ATTR(vpd, 0600, vpd_read, vpd_write, 0); 291 292 static struct bin_attribute *vpd_attrs[] = { 293 &bin_attr_vpd, 294 NULL, 295 }; 296 297 static umode_t vpd_attr_is_visible(struct kobject *kobj, 298 struct bin_attribute *a, int n) 299 { 300 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 301 302 if (!pdev->vpd.cap) 303 return 0; 304 305 return a->attr.mode; 306 } 307 308 const struct attribute_group pci_dev_vpd_attr_group = { 309 .bin_attrs = vpd_attrs, 310 .is_bin_visible = vpd_attr_is_visible, 311 }; 312 313 void *pci_vpd_alloc(struct pci_dev *dev, unsigned int *size) 314 { 315 unsigned int len; 316 void *buf; 317 int cnt; 318 319 if (!pci_vpd_available(dev, true)) 320 return ERR_PTR(-ENODEV); 321 322 len = dev->vpd.len; 323 buf = kmalloc(len, GFP_KERNEL); 324 if (!buf) 325 return ERR_PTR(-ENOMEM); 326 327 cnt = pci_read_vpd(dev, 0, len, buf); 328 if (cnt != len) { 329 kfree(buf); 330 return ERR_PTR(-EIO); 331 } 332 333 if (size) 334 *size = len; 335 336 return buf; 337 } 338 EXPORT_SYMBOL_GPL(pci_vpd_alloc); 339 340 static int pci_vpd_find_tag(const u8 *buf, unsigned int len, u8 rdt, unsigned int *size) 341 { 342 int i = 0; 343 344 /* look for LRDT tags only, end tag is the only SRDT tag */ 345 while (i + PCI_VPD_LRDT_TAG_SIZE <= len && buf[i] & PCI_VPD_LRDT) { 346 unsigned int lrdt_len = pci_vpd_lrdt_size(buf + i); 347 u8 tag = buf[i]; 348 349 i += PCI_VPD_LRDT_TAG_SIZE; 350 if (tag == rdt) { 351 if (i + lrdt_len > len) 352 lrdt_len = len - i; 353 if (size) 354 *size = lrdt_len; 355 return i; 356 } 357 358 i += lrdt_len; 359 } 360 361 return -ENOENT; 362 } 363 364 int pci_vpd_find_id_string(const u8 *buf, unsigned int len, unsigned int *size) 365 { 366 return pci_vpd_find_tag(buf, len, PCI_VPD_LRDT_ID_STRING, size); 367 } 368 EXPORT_SYMBOL_GPL(pci_vpd_find_id_string); 369 370 static int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off, 371 unsigned int len, const char *kw) 372 { 373 int i; 374 375 for (i = off; i + PCI_VPD_INFO_FLD_HDR_SIZE <= off + len;) { 376 if (buf[i + 0] == kw[0] && 377 buf[i + 1] == kw[1]) 378 return i; 379 380 i += PCI_VPD_INFO_FLD_HDR_SIZE + 381 pci_vpd_info_field_size(&buf[i]); 382 } 383 384 return -ENOENT; 385 } 386 387 static ssize_t __pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf, 388 bool check_size) 389 { 390 ssize_t ret; 391 392 if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0) { 393 dev = pci_get_func0_dev(dev); 394 if (!dev) 395 return -ENODEV; 396 397 ret = pci_vpd_read(dev, pos, count, buf, check_size); 398 pci_dev_put(dev); 399 return ret; 400 } 401 402 return pci_vpd_read(dev, pos, count, buf, check_size); 403 } 404 405 /** 406 * pci_read_vpd - Read one entry from Vital Product Data 407 * @dev: PCI device struct 408 * @pos: offset in VPD space 409 * @count: number of bytes to read 410 * @buf: pointer to where to store result 411 */ 412 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf) 413 { 414 return __pci_read_vpd(dev, pos, count, buf, true); 415 } 416 EXPORT_SYMBOL(pci_read_vpd); 417 418 /* Same, but allow to access any address */ 419 ssize_t pci_read_vpd_any(struct pci_dev *dev, loff_t pos, size_t count, void *buf) 420 { 421 return __pci_read_vpd(dev, pos, count, buf, false); 422 } 423 EXPORT_SYMBOL(pci_read_vpd_any); 424 425 static ssize_t __pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, 426 const void *buf, bool check_size) 427 { 428 ssize_t ret; 429 430 if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0) { 431 dev = pci_get_func0_dev(dev); 432 if (!dev) 433 return -ENODEV; 434 435 ret = pci_vpd_write(dev, pos, count, buf, check_size); 436 pci_dev_put(dev); 437 return ret; 438 } 439 440 return pci_vpd_write(dev, pos, count, buf, check_size); 441 } 442 443 /** 444 * pci_write_vpd - Write entry to Vital Product Data 445 * @dev: PCI device struct 446 * @pos: offset in VPD space 447 * @count: number of bytes to write 448 * @buf: buffer containing write data 449 */ 450 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf) 451 { 452 return __pci_write_vpd(dev, pos, count, buf, true); 453 } 454 EXPORT_SYMBOL(pci_write_vpd); 455 456 /* Same, but allow to access any address */ 457 ssize_t pci_write_vpd_any(struct pci_dev *dev, loff_t pos, size_t count, const void *buf) 458 { 459 return __pci_write_vpd(dev, pos, count, buf, false); 460 } 461 EXPORT_SYMBOL(pci_write_vpd_any); 462 463 int pci_vpd_find_ro_info_keyword(const void *buf, unsigned int len, 464 const char *kw, unsigned int *size) 465 { 466 int ro_start, infokw_start; 467 unsigned int ro_len, infokw_size; 468 469 ro_start = pci_vpd_find_tag(buf, len, PCI_VPD_LRDT_RO_DATA, &ro_len); 470 if (ro_start < 0) 471 return ro_start; 472 473 infokw_start = pci_vpd_find_info_keyword(buf, ro_start, ro_len, kw); 474 if (infokw_start < 0) 475 return infokw_start; 476 477 infokw_size = pci_vpd_info_field_size(buf + infokw_start); 478 infokw_start += PCI_VPD_INFO_FLD_HDR_SIZE; 479 480 if (infokw_start + infokw_size > len) 481 return -EINVAL; 482 483 if (size) 484 *size = infokw_size; 485 486 return infokw_start; 487 } 488 EXPORT_SYMBOL_GPL(pci_vpd_find_ro_info_keyword); 489 490 int pci_vpd_check_csum(const void *buf, unsigned int len) 491 { 492 const u8 *vpd = buf; 493 unsigned int size; 494 u8 csum = 0; 495 int rv_start; 496 497 rv_start = pci_vpd_find_ro_info_keyword(buf, len, PCI_VPD_RO_KEYWORD_CHKSUM, &size); 498 if (rv_start == -ENOENT) /* no checksum in VPD */ 499 return 1; 500 else if (rv_start < 0) 501 return rv_start; 502 503 if (!size) 504 return -EINVAL; 505 506 while (rv_start >= 0) 507 csum += vpd[rv_start--]; 508 509 return csum ? -EILSEQ : 0; 510 } 511 EXPORT_SYMBOL_GPL(pci_vpd_check_csum); 512 513 #ifdef CONFIG_PCI_QUIRKS 514 /* 515 * Quirk non-zero PCI functions to route VPD access through function 0 for 516 * devices that share VPD resources between functions. The functions are 517 * expected to be identical devices. 518 */ 519 static void quirk_f0_vpd_link(struct pci_dev *dev) 520 { 521 struct pci_dev *f0; 522 523 if (!PCI_FUNC(dev->devfn)) 524 return; 525 526 f0 = pci_get_func0_dev(dev); 527 if (!f0) 528 return; 529 530 if (f0->vpd.cap && dev->class == f0->class && 531 dev->vendor == f0->vendor && dev->device == f0->device) 532 dev->dev_flags |= PCI_DEV_FLAGS_VPD_REF_F0; 533 534 pci_dev_put(f0); 535 } 536 DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, 537 PCI_CLASS_NETWORK_ETHERNET, 8, quirk_f0_vpd_link); 538 539 /* 540 * If a device follows the VPD format spec, the PCI core will not read or 541 * write past the VPD End Tag. But some vendors do not follow the VPD 542 * format spec, so we can't tell how much data is safe to access. Devices 543 * may behave unpredictably if we access too much. Blacklist these devices 544 * so we don't touch VPD at all. 545 */ 546 static void quirk_blacklist_vpd(struct pci_dev *dev) 547 { 548 dev->vpd.len = PCI_VPD_SZ_INVALID; 549 pci_warn(dev, FW_BUG "disabling VPD access (can't determine size of non-standard VPD format)\n"); 550 } 551 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0060, quirk_blacklist_vpd); 552 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x007c, quirk_blacklist_vpd); 553 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0413, quirk_blacklist_vpd); 554 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0078, quirk_blacklist_vpd); 555 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0079, quirk_blacklist_vpd); 556 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0073, quirk_blacklist_vpd); 557 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0071, quirk_blacklist_vpd); 558 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x005b, quirk_blacklist_vpd); 559 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x002f, quirk_blacklist_vpd); 560 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x005d, quirk_blacklist_vpd); 561 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x005f, quirk_blacklist_vpd); 562 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATTANSIC, PCI_ANY_ID, quirk_blacklist_vpd); 563 /* 564 * The Amazon Annapurna Labs 0x0031 device id is reused for other non Root Port 565 * device types, so the quirk is registered for the PCI_CLASS_BRIDGE_PCI class. 566 */ 567 DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031, 568 PCI_CLASS_BRIDGE_PCI, 8, quirk_blacklist_vpd); 569 570 static void quirk_chelsio_extend_vpd(struct pci_dev *dev) 571 { 572 int chip = (dev->device & 0xf000) >> 12; 573 int func = (dev->device & 0x0f00) >> 8; 574 int prod = (dev->device & 0x00ff) >> 0; 575 576 /* 577 * If this is a T3-based adapter, there's a 1KB VPD area at offset 578 * 0xc00 which contains the preferred VPD values. If this is a T4 or 579 * later based adapter, the special VPD is at offset 0x400 for the 580 * Physical Functions (the SR-IOV Virtual Functions have no VPD 581 * Capabilities). The PCI VPD Access core routines will normally 582 * compute the size of the VPD by parsing the VPD Data Structure at 583 * offset 0x000. This will result in silent failures when attempting 584 * to accesses these other VPD areas which are beyond those computed 585 * limits. 586 */ 587 if (chip == 0x0 && prod >= 0x20) 588 dev->vpd.len = 8192; 589 else if (chip >= 0x4 && func < 0x8) 590 dev->vpd.len = 2048; 591 } 592 593 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID, 594 quirk_chelsio_extend_vpd); 595 596 #endif 597