1 /* 2 * drivers/pci/setup-res.c 3 * 4 * Extruded from code written by 5 * Dave Rusling (david.rusling@reo.mts.dec.com) 6 * David Mosberger (davidm@cs.arizona.edu) 7 * David Miller (davem@redhat.com) 8 * 9 * Support routines for initializing a PCI subsystem. 10 */ 11 12 /* fixed for multiple pci buses, 1999 Andrea Arcangeli <andrea@suse.de> */ 13 14 /* 15 * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru> 16 * Resource sorting 17 */ 18 19 #include <linux/init.h> 20 #include <linux/kernel.h> 21 #include <linux/pci.h> 22 #include <linux/errno.h> 23 #include <linux/ioport.h> 24 #include <linux/cache.h> 25 #include <linux/slab.h> 26 #include "pci.h" 27 28 29 void pci_update_resource(struct pci_dev *dev, int resno) 30 { 31 struct pci_bus_region region; 32 u32 new, check, mask; 33 int reg; 34 enum pci_bar_type type; 35 struct resource *res = dev->resource + resno; 36 37 /* 38 * Ignore resources for unimplemented BARs and unused resource slots 39 * for 64 bit BARs. 40 */ 41 if (!res->flags) 42 return; 43 44 /* 45 * Ignore non-moveable resources. This might be legacy resources for 46 * which no functional BAR register exists or another important 47 * system resource we shouldn't move around. 48 */ 49 if (res->flags & IORESOURCE_PCI_FIXED) 50 return; 51 52 pcibios_resource_to_bus(dev, ®ion, res); 53 54 new = region.start | (res->flags & PCI_REGION_FLAG_MASK); 55 if (res->flags & IORESOURCE_IO) 56 mask = (u32)PCI_BASE_ADDRESS_IO_MASK; 57 else 58 mask = (u32)PCI_BASE_ADDRESS_MEM_MASK; 59 60 reg = pci_resource_bar(dev, resno, &type); 61 if (!reg) 62 return; 63 if (type != pci_bar_unknown) { 64 if (!(res->flags & IORESOURCE_ROM_ENABLE)) 65 return; 66 new |= PCI_ROM_ADDRESS_ENABLE; 67 } 68 69 pci_write_config_dword(dev, reg, new); 70 pci_read_config_dword(dev, reg, &check); 71 72 if ((new ^ check) & mask) { 73 dev_err(&dev->dev, "BAR %d: error updating (%#08x != %#08x)\n", 74 resno, new, check); 75 } 76 77 if (res->flags & IORESOURCE_MEM_64) { 78 new = region.start >> 16 >> 16; 79 pci_write_config_dword(dev, reg + 4, new); 80 pci_read_config_dword(dev, reg + 4, &check); 81 if (check != new) { 82 dev_err(&dev->dev, "BAR %d: error updating " 83 "(high %#08x != %#08x)\n", resno, new, check); 84 } 85 } 86 res->flags &= ~IORESOURCE_UNSET; 87 dev_info(&dev->dev, "BAR %d: set to %pR (PCI address [%#llx-%#llx])\n", 88 resno, res, (unsigned long long)region.start, 89 (unsigned long long)region.end); 90 } 91 92 int pci_claim_resource(struct pci_dev *dev, int resource) 93 { 94 struct resource *res = &dev->resource[resource]; 95 struct resource *root, *conflict; 96 97 root = pci_find_parent_resource(dev, res); 98 if (!root) { 99 dev_info(&dev->dev, "no compatible bridge window for %pR\n", 100 res); 101 return -EINVAL; 102 } 103 104 conflict = request_resource_conflict(root, res); 105 if (conflict) { 106 dev_info(&dev->dev, 107 "address space collision: %pR conflicts with %s %pR\n", 108 res, conflict->name, conflict); 109 return -EBUSY; 110 } 111 112 return 0; 113 } 114 EXPORT_SYMBOL(pci_claim_resource); 115 116 #ifdef CONFIG_PCI_QUIRKS 117 void pci_disable_bridge_window(struct pci_dev *dev) 118 { 119 dev_info(&dev->dev, "disabling bridge mem windows\n"); 120 121 /* MMIO Base/Limit */ 122 pci_write_config_dword(dev, PCI_MEMORY_BASE, 0x0000fff0); 123 124 /* Prefetchable MMIO Base/Limit */ 125 pci_write_config_dword(dev, PCI_PREF_LIMIT_UPPER32, 0); 126 pci_write_config_dword(dev, PCI_PREF_MEMORY_BASE, 0x0000fff0); 127 pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0xffffffff); 128 } 129 #endif /* CONFIG_PCI_QUIRKS */ 130 131 static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev, 132 int resno) 133 { 134 struct resource *res = dev->resource + resno; 135 resource_size_t size, min, align; 136 int ret; 137 138 size = resource_size(res); 139 min = (res->flags & IORESOURCE_IO) ? PCIBIOS_MIN_IO : PCIBIOS_MIN_MEM; 140 align = pci_resource_alignment(dev, res); 141 142 /* First, try exact prefetching match.. */ 143 ret = pci_bus_alloc_resource(bus, res, size, align, min, 144 IORESOURCE_PREFETCH, 145 pcibios_align_resource, dev); 146 147 if (ret < 0 && (res->flags & IORESOURCE_PREFETCH)) { 148 /* 149 * That failed. 150 * 151 * But a prefetching area can handle a non-prefetching 152 * window (it will just not perform as well). 153 */ 154 ret = pci_bus_alloc_resource(bus, res, size, align, min, 0, 155 pcibios_align_resource, dev); 156 } 157 158 if (ret < 0 && dev->fw_addr[resno]) { 159 struct resource *root, *conflict; 160 resource_size_t start, end; 161 162 /* 163 * If we failed to assign anything, let's try the address 164 * where firmware left it. That at least has a chance of 165 * working, which is better than just leaving it disabled. 166 */ 167 168 if (res->flags & IORESOURCE_IO) 169 root = &ioport_resource; 170 else 171 root = &iomem_resource; 172 173 start = res->start; 174 end = res->end; 175 res->start = dev->fw_addr[resno]; 176 res->end = res->start + size - 1; 177 dev_info(&dev->dev, "BAR %d: trying firmware assignment %pR\n", 178 resno, res); 179 conflict = request_resource_conflict(root, res); 180 if (conflict) { 181 dev_info(&dev->dev, 182 "BAR %d: %pR conflicts with %s %pR\n", resno, 183 res, conflict->name, conflict); 184 res->start = start; 185 res->end = end; 186 } else 187 ret = 0; 188 } 189 190 if (!ret) { 191 res->flags &= ~IORESOURCE_STARTALIGN; 192 dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res); 193 if (resno < PCI_BRIDGE_RESOURCES) 194 pci_update_resource(dev, resno); 195 } 196 197 return ret; 198 } 199 200 int pci_assign_resource(struct pci_dev *dev, int resno) 201 { 202 struct resource *res = dev->resource + resno; 203 resource_size_t align; 204 struct pci_bus *bus; 205 int ret; 206 char *type; 207 208 align = pci_resource_alignment(dev, res); 209 if (!align) { 210 dev_info(&dev->dev, "BAR %d: can't assign %pR " 211 "(bogus alignment)\n", resno, res); 212 return -EINVAL; 213 } 214 215 bus = dev->bus; 216 while ((ret = __pci_assign_resource(bus, dev, resno))) { 217 if (bus->parent && bus->self->transparent) 218 bus = bus->parent; 219 else 220 bus = NULL; 221 if (bus) 222 continue; 223 break; 224 } 225 226 if (ret) { 227 if (res->flags & IORESOURCE_MEM) 228 if (res->flags & IORESOURCE_PREFETCH) 229 type = "mem pref"; 230 else 231 type = "mem"; 232 else if (res->flags & IORESOURCE_IO) 233 type = "io"; 234 else 235 type = "unknown"; 236 dev_info(&dev->dev, 237 "BAR %d: can't assign %s (size %#llx)\n", 238 resno, type, (unsigned long long) resource_size(res)); 239 } 240 241 return ret; 242 } 243 244 /* Sort resources by alignment */ 245 void pdev_sort_resources(struct pci_dev *dev, struct resource_list *head) 246 { 247 int i; 248 249 for (i = 0; i < PCI_NUM_RESOURCES; i++) { 250 struct resource *r; 251 struct resource_list *list, *tmp; 252 resource_size_t r_align; 253 254 r = &dev->resource[i]; 255 256 if (r->flags & IORESOURCE_PCI_FIXED) 257 continue; 258 259 if (!(r->flags) || r->parent) 260 continue; 261 262 r_align = pci_resource_alignment(dev, r); 263 if (!r_align) { 264 dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n", 265 i, r); 266 continue; 267 } 268 for (list = head; ; list = list->next) { 269 resource_size_t align = 0; 270 struct resource_list *ln = list->next; 271 272 if (ln) 273 align = pci_resource_alignment(ln->dev, ln->res); 274 275 if (r_align > align) { 276 tmp = kmalloc(sizeof(*tmp), GFP_KERNEL); 277 if (!tmp) 278 panic("pdev_sort_resources(): " 279 "kmalloc() failed!\n"); 280 tmp->next = ln; 281 tmp->res = r; 282 tmp->dev = dev; 283 list->next = tmp; 284 break; 285 } 286 } 287 } 288 } 289 290 int pci_enable_resources(struct pci_dev *dev, int mask) 291 { 292 u16 cmd, old_cmd; 293 int i; 294 struct resource *r; 295 296 pci_read_config_word(dev, PCI_COMMAND, &cmd); 297 old_cmd = cmd; 298 299 for (i = 0; i < PCI_NUM_RESOURCES; i++) { 300 if (!(mask & (1 << i))) 301 continue; 302 303 r = &dev->resource[i]; 304 305 if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM))) 306 continue; 307 if ((i == PCI_ROM_RESOURCE) && 308 (!(r->flags & IORESOURCE_ROM_ENABLE))) 309 continue; 310 311 if (!r->parent) { 312 dev_err(&dev->dev, "device not available " 313 "(can't reserve %pR)\n", r); 314 return -EINVAL; 315 } 316 317 if (r->flags & IORESOURCE_IO) 318 cmd |= PCI_COMMAND_IO; 319 if (r->flags & IORESOURCE_MEM) 320 cmd |= PCI_COMMAND_MEMORY; 321 } 322 323 if (cmd != old_cmd) { 324 dev_info(&dev->dev, "enabling device (%04x -> %04x)\n", 325 old_cmd, cmd); 326 pci_write_config_word(dev, PCI_COMMAND, cmd); 327 } 328 return 0; 329 } 330