1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Procfs interface for the PCI bus 4 * 5 * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz> 6 */ 7 8 #include <linux/init.h> 9 #include <linux/pci.h> 10 #include <linux/slab.h> 11 #include <linux/module.h> 12 #include <linux/proc_fs.h> 13 #include <linux/seq_file.h> 14 #include <linux/capability.h> 15 #include <linux/uaccess.h> 16 #include <linux/security.h> 17 #include <linux/panic.h> 18 #include <linux/sched.h> 19 #include <asm/byteorder.h> 20 #include "pci.h" 21 22 static int proc_initialized; /* = 0 */ 23 static DEFINE_MUTEX(pci_proc_lock); 24 25 static loff_t proc_bus_pci_lseek(struct file *file, loff_t off, int whence) 26 { 27 struct pci_dev *dev = pde_data(file_inode(file)); 28 return fixed_size_llseek(file, off, whence, dev->cfg_size); 29 } 30 31 static ssize_t proc_bus_pci_read(struct file *file, char __user *buf, 32 size_t nbytes, loff_t *ppos) 33 { 34 struct pci_dev *dev = pde_data(file_inode(file)); 35 unsigned int pos = *ppos; 36 unsigned int cnt, size; 37 38 /* 39 * Normal users can read only the standardized portion of the 40 * configuration space as several chips lock up when trying to read 41 * undefined locations (think of Intel PIIX4 as a typical example). 42 */ 43 44 if (file_ns_capable(file, &init_user_ns, CAP_SYS_ADMIN)) 45 size = dev->cfg_size; 46 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) 47 size = 128; 48 else 49 size = 64; 50 51 if (!nbytes) 52 return 0; 53 54 if (pos >= size) 55 return 0; 56 if (nbytes >= size) 57 nbytes = size; 58 if (pos + nbytes > size) 59 nbytes = size - pos; 60 cnt = nbytes; 61 62 if (!access_ok(buf, cnt)) 63 return -EINVAL; 64 65 pci_config_pm_runtime_get(dev); 66 67 if ((pos & 1) && cnt) { 68 unsigned char val; 69 pci_user_read_config_byte(dev, pos, &val); 70 __put_user(val, buf); 71 buf++; 72 pos++; 73 cnt--; 74 } 75 76 if ((pos & 3) && cnt > 2) { 77 unsigned short val; 78 pci_user_read_config_word(dev, pos, &val); 79 __put_user(cpu_to_le16(val), (__le16 __user *) buf); 80 buf += 2; 81 pos += 2; 82 cnt -= 2; 83 } 84 85 while (cnt >= 4) { 86 unsigned int val; 87 pci_user_read_config_dword(dev, pos, &val); 88 __put_user(cpu_to_le32(val), (__le32 __user *) buf); 89 buf += 4; 90 pos += 4; 91 cnt -= 4; 92 cond_resched(); 93 } 94 95 if (cnt >= 2) { 96 unsigned short val; 97 pci_user_read_config_word(dev, pos, &val); 98 __put_user(cpu_to_le16(val), (__le16 __user *) buf); 99 buf += 2; 100 pos += 2; 101 cnt -= 2; 102 } 103 104 if (cnt) { 105 unsigned char val; 106 pci_user_read_config_byte(dev, pos, &val); 107 __put_user(val, buf); 108 pos++; 109 } 110 111 pci_config_pm_runtime_put(dev); 112 113 *ppos = pos; 114 return nbytes; 115 } 116 117 static ssize_t proc_bus_pci_write(struct file *file, const char __user *buf, 118 size_t nbytes, loff_t *ppos) 119 { 120 struct inode *ino = file_inode(file); 121 struct pci_dev *dev = pde_data(ino); 122 int pos = *ppos; 123 int size = dev->cfg_size; 124 int cnt, ret; 125 126 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 127 if (ret) 128 return ret; 129 130 if (!nbytes) 131 return 0; 132 133 if (resource_is_exclusive(&dev->driver_exclusive_resource, pos, nbytes)) { 134 pci_warn_once(dev, "%s: Unexpected write to kernel-exclusive config offset %x", 135 current->comm, pos); 136 add_taint(TAINT_USER, LOCKDEP_STILL_OK); 137 } 138 139 if (pos >= size) 140 return 0; 141 if (nbytes >= size) 142 nbytes = size; 143 if (pos + nbytes > size) 144 nbytes = size - pos; 145 cnt = nbytes; 146 147 if (!access_ok(buf, cnt)) 148 return -EINVAL; 149 150 pci_config_pm_runtime_get(dev); 151 152 if ((pos & 1) && cnt) { 153 unsigned char val; 154 __get_user(val, buf); 155 pci_user_write_config_byte(dev, pos, val); 156 buf++; 157 pos++; 158 cnt--; 159 } 160 161 if ((pos & 3) && cnt > 2) { 162 __le16 val; 163 __get_user(val, (__le16 __user *) buf); 164 pci_user_write_config_word(dev, pos, le16_to_cpu(val)); 165 buf += 2; 166 pos += 2; 167 cnt -= 2; 168 } 169 170 while (cnt >= 4) { 171 __le32 val; 172 __get_user(val, (__le32 __user *) buf); 173 pci_user_write_config_dword(dev, pos, le32_to_cpu(val)); 174 buf += 4; 175 pos += 4; 176 cnt -= 4; 177 } 178 179 if (cnt >= 2) { 180 __le16 val; 181 __get_user(val, (__le16 __user *) buf); 182 pci_user_write_config_word(dev, pos, le16_to_cpu(val)); 183 buf += 2; 184 pos += 2; 185 cnt -= 2; 186 } 187 188 if (cnt) { 189 unsigned char val; 190 __get_user(val, buf); 191 pci_user_write_config_byte(dev, pos, val); 192 pos++; 193 } 194 195 pci_config_pm_runtime_put(dev); 196 197 *ppos = pos; 198 i_size_write(ino, dev->cfg_size); 199 return nbytes; 200 } 201 202 #ifdef HAVE_PCI_MMAP 203 struct pci_filp_private { 204 enum pci_mmap_state mmap_state; 205 int write_combine; 206 }; 207 #endif /* HAVE_PCI_MMAP */ 208 209 static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd, 210 unsigned long arg) 211 { 212 struct pci_dev *dev = pde_data(file_inode(file)); 213 #ifdef HAVE_PCI_MMAP 214 struct pci_filp_private *fpriv = file->private_data; 215 #endif /* HAVE_PCI_MMAP */ 216 int ret = 0; 217 218 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 219 if (ret) 220 return ret; 221 222 switch (cmd) { 223 case PCIIOC_CONTROLLER: 224 ret = pci_domain_nr(dev->bus); 225 break; 226 227 #ifdef HAVE_PCI_MMAP 228 case PCIIOC_MMAP_IS_IO: 229 if (!arch_can_pci_mmap_io()) 230 return -EINVAL; 231 fpriv->mmap_state = pci_mmap_io; 232 break; 233 234 case PCIIOC_MMAP_IS_MEM: 235 fpriv->mmap_state = pci_mmap_mem; 236 break; 237 238 case PCIIOC_WRITE_COMBINE: 239 if (arch_can_pci_mmap_wc()) { 240 if (arg) 241 fpriv->write_combine = 1; 242 else 243 fpriv->write_combine = 0; 244 break; 245 } 246 /* If arch decided it can't, fall through... */ 247 fallthrough; 248 #endif /* HAVE_PCI_MMAP */ 249 default: 250 ret = -EINVAL; 251 break; 252 } 253 254 return ret; 255 } 256 257 #ifdef HAVE_PCI_MMAP 258 static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma) 259 { 260 struct pci_dev *dev = pde_data(file_inode(file)); 261 struct pci_filp_private *fpriv = file->private_data; 262 resource_size_t start, end; 263 int i, ret, write_combine = 0, res_bit = IORESOURCE_MEM; 264 265 if (!capable(CAP_SYS_RAWIO) || 266 security_locked_down(LOCKDOWN_PCI_ACCESS)) 267 return -EPERM; 268 269 /* Skip devices with non-mappable BARs */ 270 if (dev->non_mappable_bars) 271 return -EINVAL; 272 273 if (fpriv->mmap_state == pci_mmap_io) { 274 if (!arch_can_pci_mmap_io()) 275 return -EINVAL; 276 res_bit = IORESOURCE_IO; 277 } 278 279 /* Make sure the caller is mapping a real resource for this device */ 280 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 281 if (dev->resource[i].flags & res_bit && 282 pci_mmap_fits(dev, i, vma, PCI_MMAP_PROCFS)) 283 break; 284 } 285 286 if (i >= PCI_STD_NUM_BARS) 287 return -ENODEV; 288 289 if (fpriv->mmap_state == pci_mmap_mem && 290 fpriv->write_combine) { 291 if (dev->resource[i].flags & IORESOURCE_PREFETCH) 292 write_combine = 1; 293 else 294 return -EINVAL; 295 } 296 297 if (dev->resource[i].flags & IORESOURCE_MEM && 298 iomem_is_exclusive(dev->resource[i].start)) 299 return -EINVAL; 300 301 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end); 302 303 /* Adjust vm_pgoff to be the offset within the resource */ 304 vma->vm_pgoff -= start >> PAGE_SHIFT; 305 ret = pci_mmap_resource_range(dev, i, vma, 306 fpriv->mmap_state, write_combine); 307 if (ret < 0) 308 return ret; 309 310 return 0; 311 } 312 313 static int proc_bus_pci_open(struct inode *inode, struct file *file) 314 { 315 struct pci_filp_private *fpriv = kmalloc_obj(*fpriv); 316 317 if (!fpriv) 318 return -ENOMEM; 319 320 fpriv->mmap_state = pci_mmap_io; 321 fpriv->write_combine = 0; 322 323 file->private_data = fpriv; 324 file->f_mapping = iomem_get_mapping(); 325 326 return 0; 327 } 328 329 static int proc_bus_pci_release(struct inode *inode, struct file *file) 330 { 331 kfree(file->private_data); 332 file->private_data = NULL; 333 334 return 0; 335 } 336 #endif /* HAVE_PCI_MMAP */ 337 338 static const struct proc_ops proc_bus_pci_ops = { 339 .proc_lseek = proc_bus_pci_lseek, 340 .proc_read = proc_bus_pci_read, 341 .proc_write = proc_bus_pci_write, 342 .proc_ioctl = proc_bus_pci_ioctl, 343 #ifdef CONFIG_COMPAT 344 .proc_compat_ioctl = proc_bus_pci_ioctl, 345 #endif 346 #ifdef HAVE_PCI_MMAP 347 .proc_open = proc_bus_pci_open, 348 .proc_release = proc_bus_pci_release, 349 .proc_mmap = proc_bus_pci_mmap, 350 #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA 351 .proc_get_unmapped_area = get_pci_unmapped_area, 352 #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */ 353 #endif /* HAVE_PCI_MMAP */ 354 }; 355 356 /* iterator */ 357 static void *pci_seq_start(struct seq_file *m, loff_t *pos) 358 { 359 struct pci_dev *dev = NULL; 360 loff_t n = *pos; 361 362 for_each_pci_dev(dev) { 363 if (!n--) 364 break; 365 } 366 return dev; 367 } 368 369 static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos) 370 { 371 struct pci_dev *dev = v; 372 373 (*pos)++; 374 dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev); 375 return dev; 376 } 377 378 static void pci_seq_stop(struct seq_file *m, void *v) 379 { 380 if (v) { 381 struct pci_dev *dev = v; 382 pci_dev_put(dev); 383 } 384 } 385 386 static int show_device(struct seq_file *m, void *v) 387 { 388 const struct pci_dev *dev = v; 389 const struct pci_driver *drv; 390 int i; 391 392 if (dev == NULL) 393 return 0; 394 395 drv = pci_dev_driver(dev); 396 seq_printf(m, "%02x%02x\t%04x%04x\t%x", 397 dev->bus->number, 398 dev->devfn, 399 dev->vendor, 400 dev->device, 401 dev->irq); 402 403 /* only print standard and ROM resources to preserve compatibility */ 404 for (i = 0; i <= PCI_ROM_RESOURCE; i++) { 405 resource_size_t start, end; 406 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end); 407 seq_printf(m, "\t%16llx", 408 (unsigned long long)(start | 409 (dev->resource[i].flags & PCI_REGION_FLAG_MASK))); 410 } 411 for (i = 0; i <= PCI_ROM_RESOURCE; i++) { 412 resource_size_t start, end; 413 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end); 414 seq_printf(m, "\t%16llx", 415 dev->resource[i].start < dev->resource[i].end ? 416 (unsigned long long)(end - start) + 1 : 0); 417 } 418 seq_putc(m, '\t'); 419 if (drv) 420 seq_puts(m, drv->name); 421 seq_putc(m, '\n'); 422 return 0; 423 } 424 425 static const struct seq_operations proc_bus_pci_devices_op = { 426 .start = pci_seq_start, 427 .next = pci_seq_next, 428 .stop = pci_seq_stop, 429 .show = show_device 430 }; 431 432 static struct proc_dir_entry *proc_bus_pci_dir; 433 434 static int __pci_proc_attach_bus(struct pci_bus *bus) 435 { 436 struct proc_dir_entry *dir; 437 char name[16]; 438 439 lockdep_assert_held(&pci_proc_lock); 440 441 if (!proc_initialized) 442 return -EACCES; 443 444 if (bus->procdir) 445 return 0; 446 447 if (pci_proc_domain(bus)) 448 sprintf(name, "%04x:%02x", pci_domain_nr(bus), bus->number); 449 else 450 sprintf(name, "%02x", bus->number); 451 452 dir = proc_mkdir(name, proc_bus_pci_dir); 453 if (!dir) 454 return -ENOMEM; 455 456 bus->procdir = dir; 457 458 return 0; 459 } 460 461 int pci_proc_attach_device(struct pci_dev *dev) 462 { 463 struct pci_bus *bus = dev->bus; 464 struct proc_dir_entry *entry; 465 char name[16]; 466 int ret; 467 468 guard(mutex)(&pci_proc_lock); 469 470 if (dev->procent) 471 return 0; 472 473 ret = __pci_proc_attach_bus(bus); 474 if (ret) 475 return ret; 476 477 sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); 478 entry = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, 479 bus->procdir, &proc_bus_pci_ops, dev); 480 if (!entry) 481 return -ENOMEM; 482 483 proc_set_size(entry, dev->cfg_size); 484 dev->procent = entry; 485 486 return 0; 487 } 488 489 int pci_proc_detach_device(struct pci_dev *dev) 490 { 491 guard(mutex)(&pci_proc_lock); 492 proc_remove(dev->procent); 493 dev->procent = NULL; 494 return 0; 495 } 496 497 int pci_proc_detach_bus(struct pci_bus *bus) 498 { 499 guard(mutex)(&pci_proc_lock); 500 proc_remove(bus->procdir); 501 bus->procdir = NULL; 502 return 0; 503 } 504 505 static int __init pci_proc_init(void) 506 { 507 struct pci_dev *dev = NULL; 508 509 scoped_guard(mutex, &pci_proc_lock) { 510 proc_bus_pci_dir = proc_mkdir("bus/pci", NULL); 511 proc_create_seq("devices", 0, proc_bus_pci_dir, 512 &proc_bus_pci_devices_op); 513 proc_initialized = 1; 514 } 515 516 pci_lock_rescan_remove(); 517 for_each_pci_dev(dev) 518 pci_proc_attach_device(dev); 519 pci_unlock_rescan_remove(); 520 521 return 0; 522 } 523 device_initcall(pci_proc_init); 524