xref: /linux/drivers/pci/proc.c (revision 088e88be5a380cc4e81963a9a02815da465d144f)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Procfs interface for the PCI bus
4  *
5  * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
6  */
7 
8 #include <linux/init.h>
9 #include <linux/pci.h>
10 #include <linux/slab.h>
11 #include <linux/module.h>
12 #include <linux/proc_fs.h>
13 #include <linux/seq_file.h>
14 #include <linux/capability.h>
15 #include <linux/uaccess.h>
16 #include <asm/byteorder.h>
17 #include "pci.h"
18 
19 static int proc_initialized;	/* = 0 */
20 
21 static loff_t proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
22 {
23 	struct pci_dev *dev = PDE_DATA(file_inode(file));
24 	return fixed_size_llseek(file, off, whence, dev->cfg_size);
25 }
26 
27 static ssize_t proc_bus_pci_read(struct file *file, char __user *buf,
28 				 size_t nbytes, loff_t *ppos)
29 {
30 	struct pci_dev *dev = PDE_DATA(file_inode(file));
31 	unsigned int pos = *ppos;
32 	unsigned int cnt, size;
33 
34 	/*
35 	 * Normal users can read only the standardized portion of the
36 	 * configuration space as several chips lock up when trying to read
37 	 * undefined locations (think of Intel PIIX4 as a typical example).
38 	 */
39 
40 	if (capable(CAP_SYS_ADMIN))
41 		size = dev->cfg_size;
42 	else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
43 		size = 128;
44 	else
45 		size = 64;
46 
47 	if (pos >= size)
48 		return 0;
49 	if (nbytes >= size)
50 		nbytes = size;
51 	if (pos + nbytes > size)
52 		nbytes = size - pos;
53 	cnt = nbytes;
54 
55 	if (!access_ok(buf, cnt))
56 		return -EINVAL;
57 
58 	pci_config_pm_runtime_get(dev);
59 
60 	if ((pos & 1) && cnt) {
61 		unsigned char val;
62 		pci_user_read_config_byte(dev, pos, &val);
63 		__put_user(val, buf);
64 		buf++;
65 		pos++;
66 		cnt--;
67 	}
68 
69 	if ((pos & 3) && cnt > 2) {
70 		unsigned short val;
71 		pci_user_read_config_word(dev, pos, &val);
72 		__put_user(cpu_to_le16(val), (__le16 __user *) buf);
73 		buf += 2;
74 		pos += 2;
75 		cnt -= 2;
76 	}
77 
78 	while (cnt >= 4) {
79 		unsigned int val;
80 		pci_user_read_config_dword(dev, pos, &val);
81 		__put_user(cpu_to_le32(val), (__le32 __user *) buf);
82 		buf += 4;
83 		pos += 4;
84 		cnt -= 4;
85 	}
86 
87 	if (cnt >= 2) {
88 		unsigned short val;
89 		pci_user_read_config_word(dev, pos, &val);
90 		__put_user(cpu_to_le16(val), (__le16 __user *) buf);
91 		buf += 2;
92 		pos += 2;
93 		cnt -= 2;
94 	}
95 
96 	if (cnt) {
97 		unsigned char val;
98 		pci_user_read_config_byte(dev, pos, &val);
99 		__put_user(val, buf);
100 		buf++;
101 		pos++;
102 		cnt--;
103 	}
104 
105 	pci_config_pm_runtime_put(dev);
106 
107 	*ppos = pos;
108 	return nbytes;
109 }
110 
111 static ssize_t proc_bus_pci_write(struct file *file, const char __user *buf,
112 				  size_t nbytes, loff_t *ppos)
113 {
114 	struct inode *ino = file_inode(file);
115 	struct pci_dev *dev = PDE_DATA(ino);
116 	int pos = *ppos;
117 	int size = dev->cfg_size;
118 	int cnt;
119 
120 	if (pos >= size)
121 		return 0;
122 	if (nbytes >= size)
123 		nbytes = size;
124 	if (pos + nbytes > size)
125 		nbytes = size - pos;
126 	cnt = nbytes;
127 
128 	if (!access_ok(buf, cnt))
129 		return -EINVAL;
130 
131 	pci_config_pm_runtime_get(dev);
132 
133 	if ((pos & 1) && cnt) {
134 		unsigned char val;
135 		__get_user(val, buf);
136 		pci_user_write_config_byte(dev, pos, val);
137 		buf++;
138 		pos++;
139 		cnt--;
140 	}
141 
142 	if ((pos & 3) && cnt > 2) {
143 		__le16 val;
144 		__get_user(val, (__le16 __user *) buf);
145 		pci_user_write_config_word(dev, pos, le16_to_cpu(val));
146 		buf += 2;
147 		pos += 2;
148 		cnt -= 2;
149 	}
150 
151 	while (cnt >= 4) {
152 		__le32 val;
153 		__get_user(val, (__le32 __user *) buf);
154 		pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
155 		buf += 4;
156 		pos += 4;
157 		cnt -= 4;
158 	}
159 
160 	if (cnt >= 2) {
161 		__le16 val;
162 		__get_user(val, (__le16 __user *) buf);
163 		pci_user_write_config_word(dev, pos, le16_to_cpu(val));
164 		buf += 2;
165 		pos += 2;
166 		cnt -= 2;
167 	}
168 
169 	if (cnt) {
170 		unsigned char val;
171 		__get_user(val, buf);
172 		pci_user_write_config_byte(dev, pos, val);
173 		buf++;
174 		pos++;
175 		cnt--;
176 	}
177 
178 	pci_config_pm_runtime_put(dev);
179 
180 	*ppos = pos;
181 	i_size_write(ino, dev->cfg_size);
182 	return nbytes;
183 }
184 
185 struct pci_filp_private {
186 	enum pci_mmap_state mmap_state;
187 	int write_combine;
188 };
189 
190 static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
191 			       unsigned long arg)
192 {
193 	struct pci_dev *dev = PDE_DATA(file_inode(file));
194 #ifdef HAVE_PCI_MMAP
195 	struct pci_filp_private *fpriv = file->private_data;
196 #endif /* HAVE_PCI_MMAP */
197 	int ret = 0;
198 
199 	switch (cmd) {
200 	case PCIIOC_CONTROLLER:
201 		ret = pci_domain_nr(dev->bus);
202 		break;
203 
204 #ifdef HAVE_PCI_MMAP
205 	case PCIIOC_MMAP_IS_IO:
206 		if (!arch_can_pci_mmap_io())
207 			return -EINVAL;
208 		fpriv->mmap_state = pci_mmap_io;
209 		break;
210 
211 	case PCIIOC_MMAP_IS_MEM:
212 		fpriv->mmap_state = pci_mmap_mem;
213 		break;
214 
215 	case PCIIOC_WRITE_COMBINE:
216 		if (arch_can_pci_mmap_wc()) {
217 			if (arg)
218 				fpriv->write_combine = 1;
219 			else
220 				fpriv->write_combine = 0;
221 			break;
222 		}
223 		/* If arch decided it can't, fall through... */
224 #endif /* HAVE_PCI_MMAP */
225 		/* fall through */
226 	default:
227 		ret = -EINVAL;
228 		break;
229 	}
230 
231 	return ret;
232 }
233 
234 #ifdef HAVE_PCI_MMAP
235 static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
236 {
237 	struct pci_dev *dev = PDE_DATA(file_inode(file));
238 	struct pci_filp_private *fpriv = file->private_data;
239 	int i, ret, write_combine = 0, res_bit = IORESOURCE_MEM;
240 
241 	if (!capable(CAP_SYS_RAWIO))
242 		return -EPERM;
243 
244 	if (fpriv->mmap_state == pci_mmap_io) {
245 		if (!arch_can_pci_mmap_io())
246 			return -EINVAL;
247 		res_bit = IORESOURCE_IO;
248 	}
249 
250 	/* Make sure the caller is mapping a real resource for this device */
251 	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
252 		if (dev->resource[i].flags & res_bit &&
253 		    pci_mmap_fits(dev, i, vma,  PCI_MMAP_PROCFS))
254 			break;
255 	}
256 
257 	if (i >= PCI_ROM_RESOURCE)
258 		return -ENODEV;
259 
260 	if (fpriv->mmap_state == pci_mmap_mem &&
261 	    fpriv->write_combine) {
262 		if (dev->resource[i].flags & IORESOURCE_PREFETCH)
263 			write_combine = 1;
264 		else
265 			return -EINVAL;
266 	}
267 	ret = pci_mmap_page_range(dev, i, vma,
268 				  fpriv->mmap_state, write_combine);
269 	if (ret < 0)
270 		return ret;
271 
272 	return 0;
273 }
274 
275 static int proc_bus_pci_open(struct inode *inode, struct file *file)
276 {
277 	struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
278 
279 	if (!fpriv)
280 		return -ENOMEM;
281 
282 	fpriv->mmap_state = pci_mmap_io;
283 	fpriv->write_combine = 0;
284 
285 	file->private_data = fpriv;
286 
287 	return 0;
288 }
289 
290 static int proc_bus_pci_release(struct inode *inode, struct file *file)
291 {
292 	kfree(file->private_data);
293 	file->private_data = NULL;
294 
295 	return 0;
296 }
297 #endif /* HAVE_PCI_MMAP */
298 
299 static const struct file_operations proc_bus_pci_operations = {
300 	.owner		= THIS_MODULE,
301 	.llseek		= proc_bus_pci_lseek,
302 	.read		= proc_bus_pci_read,
303 	.write		= proc_bus_pci_write,
304 	.unlocked_ioctl	= proc_bus_pci_ioctl,
305 	.compat_ioctl	= proc_bus_pci_ioctl,
306 #ifdef HAVE_PCI_MMAP
307 	.open		= proc_bus_pci_open,
308 	.release	= proc_bus_pci_release,
309 	.mmap		= proc_bus_pci_mmap,
310 #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
311 	.get_unmapped_area = get_pci_unmapped_area,
312 #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
313 #endif /* HAVE_PCI_MMAP */
314 };
315 
316 /* iterator */
317 static void *pci_seq_start(struct seq_file *m, loff_t *pos)
318 {
319 	struct pci_dev *dev = NULL;
320 	loff_t n = *pos;
321 
322 	for_each_pci_dev(dev) {
323 		if (!n--)
324 			break;
325 	}
326 	return dev;
327 }
328 
329 static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
330 {
331 	struct pci_dev *dev = v;
332 
333 	(*pos)++;
334 	dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
335 	return dev;
336 }
337 
338 static void pci_seq_stop(struct seq_file *m, void *v)
339 {
340 	if (v) {
341 		struct pci_dev *dev = v;
342 		pci_dev_put(dev);
343 	}
344 }
345 
346 static int show_device(struct seq_file *m, void *v)
347 {
348 	const struct pci_dev *dev = v;
349 	const struct pci_driver *drv;
350 	int i;
351 
352 	if (dev == NULL)
353 		return 0;
354 
355 	drv = pci_dev_driver(dev);
356 	seq_printf(m, "%02x%02x\t%04x%04x\t%x",
357 			dev->bus->number,
358 			dev->devfn,
359 			dev->vendor,
360 			dev->device,
361 			dev->irq);
362 
363 	/* only print standard and ROM resources to preserve compatibility */
364 	for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
365 		resource_size_t start, end;
366 		pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
367 		seq_printf(m, "\t%16llx",
368 			(unsigned long long)(start |
369 			(dev->resource[i].flags & PCI_REGION_FLAG_MASK)));
370 	}
371 	for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
372 		resource_size_t start, end;
373 		pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
374 		seq_printf(m, "\t%16llx",
375 			dev->resource[i].start < dev->resource[i].end ?
376 			(unsigned long long)(end - start) + 1 : 0);
377 	}
378 	seq_putc(m, '\t');
379 	if (drv)
380 		seq_puts(m, drv->name);
381 	seq_putc(m, '\n');
382 	return 0;
383 }
384 
385 static const struct seq_operations proc_bus_pci_devices_op = {
386 	.start	= pci_seq_start,
387 	.next	= pci_seq_next,
388 	.stop	= pci_seq_stop,
389 	.show	= show_device
390 };
391 
392 static struct proc_dir_entry *proc_bus_pci_dir;
393 
394 int pci_proc_attach_device(struct pci_dev *dev)
395 {
396 	struct pci_bus *bus = dev->bus;
397 	struct proc_dir_entry *e;
398 	char name[16];
399 
400 	if (!proc_initialized)
401 		return -EACCES;
402 
403 	if (!bus->procdir) {
404 		if (pci_proc_domain(bus)) {
405 			sprintf(name, "%04x:%02x", pci_domain_nr(bus),
406 					bus->number);
407 		} else {
408 			sprintf(name, "%02x", bus->number);
409 		}
410 		bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
411 		if (!bus->procdir)
412 			return -ENOMEM;
413 	}
414 
415 	sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
416 	e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir,
417 			     &proc_bus_pci_operations, dev);
418 	if (!e)
419 		return -ENOMEM;
420 	proc_set_size(e, dev->cfg_size);
421 	dev->procent = e;
422 
423 	return 0;
424 }
425 
426 int pci_proc_detach_device(struct pci_dev *dev)
427 {
428 	proc_remove(dev->procent);
429 	dev->procent = NULL;
430 	return 0;
431 }
432 
433 int pci_proc_detach_bus(struct pci_bus *bus)
434 {
435 	proc_remove(bus->procdir);
436 	return 0;
437 }
438 
439 static int __init pci_proc_init(void)
440 {
441 	struct pci_dev *dev = NULL;
442 	proc_bus_pci_dir = proc_mkdir("bus/pci", NULL);
443 	proc_create_seq("devices", 0, proc_bus_pci_dir,
444 		    &proc_bus_pci_devices_op);
445 	proc_initialized = 1;
446 	for_each_pci_dev(dev)
447 		pci_proc_attach_device(dev);
448 
449 	return 0;
450 }
451 device_initcall(pci_proc_init);
452