xref: /linux/drivers/pci/pcie/Kconfig (revision d47af0bcc1d6b0f10ffb7af41d216e4d7710afc2)
11da177e4SLinus Torvalds#
21da177e4SLinus Torvalds# PCI Express Port Bus Configuration
31da177e4SLinus Torvalds#
41da177e4SLinus Torvaldsconfig PCIEPORTBUS
5*d47af0bcSEzequiel Garcia	bool "PCI Express Port Bus support"
61da177e4SLinus Torvalds	depends on PCI
71da177e4SLinus Torvalds	help
81da177e4SLinus Torvalds	  This automatically enables PCI Express Port Bus support. Users can
91da177e4SLinus Torvalds	  choose Native Hot-Plug support, Advanced Error Reporting support,
101da177e4SLinus Torvalds	  Power Management Event support and Virtual Channel support to run
111da177e4SLinus Torvalds	  on PCI Express Ports (Root or Switch).
121da177e4SLinus Torvalds
131da177e4SLinus Torvalds#
141da177e4SLinus Torvalds# Include service Kconfig here
151da177e4SLinus Torvalds#
161da177e4SLinus Torvaldsconfig HOTPLUG_PCI_PCIE
171da177e4SLinus Torvalds	tristate "PCI Express Hotplug driver"
181da177e4SLinus Torvalds	depends on HOTPLUG_PCI && PCIEPORTBUS
191da177e4SLinus Torvalds	help
201da177e4SLinus Torvalds	  Say Y here if you have a motherboard that supports PCI Express Native
211da177e4SLinus Torvalds	  Hotplug
221da177e4SLinus Torvalds
231da177e4SLinus Torvalds	  To compile this driver as a module, choose M here: the
241da177e4SLinus Torvalds	  module will be called pciehp.
251da177e4SLinus Torvalds
261da177e4SLinus Torvalds	  When in doubt, say N.
271da177e4SLinus Torvalds
286c2b374dSZhang, Yanminsource "drivers/pci/pcie/aer/Kconfig"
297d715a6cSShaohua Li
307d715a6cSShaohua Li#
317d715a6cSShaohua Li# PCI Express ASPM
327d715a6cSShaohua Li#
337d715a6cSShaohua Liconfig PCIEASPM
346a108a14SDavid Rientjes	bool "PCI Express ASPM control" if EXPERT
35ea5f9fc5SMatthew Garrett	depends on PCI && PCIEPORTBUS
36ea5f9fc5SMatthew Garrett	default y
377d715a6cSShaohua Li	help
38ea5f9fc5SMatthew Garrett	  This enables OS control over PCI Express ASPM (Active State
39ea5f9fc5SMatthew Garrett	  Power Management) and Clock Power Management. ASPM supports
40ea5f9fc5SMatthew Garrett	  state L0/L0s/L1.
417d715a6cSShaohua Li
42d56641c7SP. Christeas	  ASPM is initially set up by the firmware. With this option enabled,
43ea5f9fc5SMatthew Garrett	  Linux can modify this state in order to disable ASPM on known-bad
44ea5f9fc5SMatthew Garrett	  hardware or configurations and enable it when known-safe.
45ea5f9fc5SMatthew Garrett
46ea5f9fc5SMatthew Garrett	  ASPM can be disabled or enabled at runtime via
47ea5f9fc5SMatthew Garrett	  /sys/module/pcie_aspm/parameters/policy
48ea5f9fc5SMatthew Garrett
49ea5f9fc5SMatthew Garrett	  When in doubt, say Y.
507d715a6cSShaohua Liconfig PCIEASPM_DEBUG
517d715a6cSShaohua Li	bool "Debug PCI Express ASPM"
527d715a6cSShaohua Li	depends on PCIEASPM
537d715a6cSShaohua Li	default n
547d715a6cSShaohua Li	help
557d715a6cSShaohua Li	  This enables PCI Express ASPM debug support. It will add per-device
567d715a6cSShaohua Li	  interface to control ASPM.
57c7f48656SRafael J. Wysocki
58ad71c962SMatthew Garrettchoice
59ad71c962SMatthew Garrett	prompt "Default ASPM policy"
60ad71c962SMatthew Garrett	default PCIEASPM_DEFAULT
61ad71c962SMatthew Garrett	depends on PCIEASPM
62ad71c962SMatthew Garrett
63ad71c962SMatthew Garrettconfig PCIEASPM_DEFAULT
64ad71c962SMatthew Garrett        bool "BIOS default"
65ad71c962SMatthew Garrett	depends on PCIEASPM
66ad71c962SMatthew Garrett	help
67ad71c962SMatthew Garrett	  Use the BIOS defaults for PCI Express ASPM.
68ad71c962SMatthew Garrett
69ad71c962SMatthew Garrettconfig PCIEASPM_POWERSAVE
70ad71c962SMatthew Garrett        bool "Powersave"
71ad71c962SMatthew Garrett	depends on PCIEASPM
72ad71c962SMatthew Garrett	help
73ad71c962SMatthew Garrett	  Enable PCI Express ASPM L0s and L1 where possible, even if the
74ad71c962SMatthew Garrett	  BIOS did not.
75ad71c962SMatthew Garrett
76ad71c962SMatthew Garrettconfig PCIEASPM_PERFORMANCE
77ad71c962SMatthew Garrett        bool "Performance"
78ad71c962SMatthew Garrett	depends on PCIEASPM
79ad71c962SMatthew Garrett	help
80ad71c962SMatthew Garrett	  Disable PCI Express ASPM L0s and L1, even if the BIOS enabled them.
81ad71c962SMatthew Garrettendchoice
82ad71c962SMatthew Garrett
83c7f48656SRafael J. Wysockiconfig PCIE_PME
84c7f48656SRafael J. Wysocki	def_bool y
8505795726SBjorn Helgaas	depends on PCIEPORTBUS && PM_RUNTIME
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