1 #ifndef DRIVERS_PCI_H 2 #define DRIVERS_PCI_H 3 4 #define PCI_FIND_CAP_TTL 48 5 6 #define PCI_VSEC_ID_INTEL_TBT 0x1234 /* Thunderbolt */ 7 8 extern const unsigned char pcie_link_speed[]; 9 10 bool pcie_cap_has_lnkctl(const struct pci_dev *dev); 11 12 /* Functions internal to the PCI core code */ 13 14 int pci_create_sysfs_dev_files(struct pci_dev *pdev); 15 void pci_remove_sysfs_dev_files(struct pci_dev *pdev); 16 #if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI) 17 static inline void pci_create_firmware_label_files(struct pci_dev *pdev) 18 { return; } 19 static inline void pci_remove_firmware_label_files(struct pci_dev *pdev) 20 { return; } 21 #else 22 void pci_create_firmware_label_files(struct pci_dev *pdev); 23 void pci_remove_firmware_label_files(struct pci_dev *pdev); 24 #endif 25 void pci_cleanup_rom(struct pci_dev *dev); 26 27 enum pci_mmap_api { 28 PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */ 29 PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */ 30 }; 31 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vmai, 32 enum pci_mmap_api mmap_api); 33 34 int pci_probe_reset_function(struct pci_dev *dev); 35 36 /** 37 * struct pci_platform_pm_ops - Firmware PM callbacks 38 * 39 * @is_manageable: returns 'true' if given device is power manageable by the 40 * platform firmware 41 * 42 * @set_state: invokes the platform firmware to set the device's power state 43 * 44 * @get_state: queries the platform firmware for a device's current power state 45 * 46 * @choose_state: returns PCI power state of given device preferred by the 47 * platform; to be used during system-wide transitions from a 48 * sleeping state to the working state and vice versa 49 * 50 * @set_wakeup: enables/disables wakeup capability for the device 51 * 52 * @need_resume: returns 'true' if the given device (which is currently 53 * suspended) needs to be resumed to be configured for system 54 * wakeup. 55 * 56 * If given platform is generally capable of power managing PCI devices, all of 57 * these callbacks are mandatory. 58 */ 59 struct pci_platform_pm_ops { 60 bool (*is_manageable)(struct pci_dev *dev); 61 int (*set_state)(struct pci_dev *dev, pci_power_t state); 62 pci_power_t (*get_state)(struct pci_dev *dev); 63 pci_power_t (*choose_state)(struct pci_dev *dev); 64 int (*set_wakeup)(struct pci_dev *dev, bool enable); 65 bool (*need_resume)(struct pci_dev *dev); 66 }; 67 68 int pci_set_platform_pm(const struct pci_platform_pm_ops *ops); 69 void pci_update_current_state(struct pci_dev *dev, pci_power_t state); 70 void pci_power_up(struct pci_dev *dev); 71 void pci_disable_enabled_device(struct pci_dev *dev); 72 int pci_finish_runtime_suspend(struct pci_dev *dev); 73 int __pci_pme_wakeup(struct pci_dev *dev, void *ign); 74 void pci_pme_restore(struct pci_dev *dev); 75 bool pci_dev_keep_suspended(struct pci_dev *dev); 76 void pci_dev_complete_resume(struct pci_dev *pci_dev); 77 void pci_config_pm_runtime_get(struct pci_dev *dev); 78 void pci_config_pm_runtime_put(struct pci_dev *dev); 79 void pci_pm_init(struct pci_dev *dev); 80 void pci_ea_init(struct pci_dev *dev); 81 void pci_allocate_cap_save_buffers(struct pci_dev *dev); 82 void pci_free_cap_save_buffers(struct pci_dev *dev); 83 bool pci_bridge_d3_possible(struct pci_dev *dev); 84 void pci_bridge_d3_update(struct pci_dev *dev); 85 86 static inline void pci_wakeup_event(struct pci_dev *dev) 87 { 88 /* Wait 100 ms before the system can be put into a sleep state. */ 89 pm_wakeup_event(&dev->dev, 100); 90 } 91 92 static inline bool pci_has_subordinate(struct pci_dev *pci_dev) 93 { 94 return !!(pci_dev->subordinate); 95 } 96 97 static inline bool pci_power_manageable(struct pci_dev *pci_dev) 98 { 99 /* 100 * Currently we allow normal PCI devices and PCI bridges transition 101 * into D3 if their bridge_d3 is set. 102 */ 103 return !pci_has_subordinate(pci_dev) || pci_dev->bridge_d3; 104 } 105 106 struct pci_vpd_ops { 107 ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf); 108 ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); 109 int (*set_size)(struct pci_dev *dev, size_t len); 110 }; 111 112 struct pci_vpd { 113 const struct pci_vpd_ops *ops; 114 struct bin_attribute *attr; /* descriptor for sysfs VPD entry */ 115 struct mutex lock; 116 unsigned int len; 117 u16 flag; 118 u8 cap; 119 u8 busy:1; 120 u8 valid:1; 121 }; 122 123 int pci_vpd_init(struct pci_dev *dev); 124 void pci_vpd_release(struct pci_dev *dev); 125 126 /* PCI /proc functions */ 127 #ifdef CONFIG_PROC_FS 128 int pci_proc_attach_device(struct pci_dev *dev); 129 int pci_proc_detach_device(struct pci_dev *dev); 130 int pci_proc_detach_bus(struct pci_bus *bus); 131 #else 132 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; } 133 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; } 134 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; } 135 #endif 136 137 /* Functions for PCI Hotplug drivers to use */ 138 int pci_hp_add_bridge(struct pci_dev *dev); 139 140 #ifdef HAVE_PCI_LEGACY 141 void pci_create_legacy_files(struct pci_bus *bus); 142 void pci_remove_legacy_files(struct pci_bus *bus); 143 #else 144 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; } 145 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; } 146 #endif 147 148 /* Lock for read/write access to pci device and bus lists */ 149 extern struct rw_semaphore pci_bus_sem; 150 151 extern raw_spinlock_t pci_lock; 152 153 extern unsigned int pci_pm_d3_delay; 154 155 #ifdef CONFIG_PCI_MSI 156 void pci_no_msi(void); 157 #else 158 static inline void pci_no_msi(void) { } 159 #endif 160 161 static inline void pci_msi_set_enable(struct pci_dev *dev, int enable) 162 { 163 u16 control; 164 165 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control); 166 control &= ~PCI_MSI_FLAGS_ENABLE; 167 if (enable) 168 control |= PCI_MSI_FLAGS_ENABLE; 169 pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control); 170 } 171 172 static inline void pci_msix_clear_and_set_ctrl(struct pci_dev *dev, u16 clear, u16 set) 173 { 174 u16 ctrl; 175 176 pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &ctrl); 177 ctrl &= ~clear; 178 ctrl |= set; 179 pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, ctrl); 180 } 181 182 void pci_realloc_get_opt(char *); 183 184 static inline int pci_no_d1d2(struct pci_dev *dev) 185 { 186 unsigned int parent_dstates = 0; 187 188 if (dev->bus->self) 189 parent_dstates = dev->bus->self->no_d1d2; 190 return (dev->no_d1d2 || parent_dstates); 191 192 } 193 extern const struct attribute_group *pci_dev_groups[]; 194 extern const struct attribute_group *pcibus_groups[]; 195 extern struct device_type pci_dev_type; 196 extern const struct attribute_group *pci_bus_groups[]; 197 198 199 /** 200 * pci_match_one_device - Tell if a PCI device structure has a matching 201 * PCI device id structure 202 * @id: single PCI device id structure to match 203 * @dev: the PCI device structure to match against 204 * 205 * Returns the matching pci_device_id structure or %NULL if there is no match. 206 */ 207 static inline const struct pci_device_id * 208 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev) 209 { 210 if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) && 211 (id->device == PCI_ANY_ID || id->device == dev->device) && 212 (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) && 213 (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) && 214 !((id->class ^ dev->class) & id->class_mask)) 215 return id; 216 return NULL; 217 } 218 219 /* PCI slot sysfs helper code */ 220 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj) 221 222 extern struct kset *pci_slots_kset; 223 224 struct pci_slot_attribute { 225 struct attribute attr; 226 ssize_t (*show)(struct pci_slot *, char *); 227 ssize_t (*store)(struct pci_slot *, const char *, size_t); 228 }; 229 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr) 230 231 enum pci_bar_type { 232 pci_bar_unknown, /* Standard PCI BAR probe */ 233 pci_bar_io, /* An io port BAR */ 234 pci_bar_mem32, /* A 32-bit memory BAR */ 235 pci_bar_mem64, /* A 64-bit memory BAR */ 236 }; 237 238 int pci_configure_extended_tags(struct pci_dev *dev, void *ign); 239 bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl, 240 int crs_timeout); 241 int pci_setup_device(struct pci_dev *dev); 242 int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, 243 struct resource *res, unsigned int reg); 244 void pci_configure_ari(struct pci_dev *dev); 245 void __pci_bus_size_bridges(struct pci_bus *bus, 246 struct list_head *realloc_head); 247 void __pci_bus_assign_resources(const struct pci_bus *bus, 248 struct list_head *realloc_head, 249 struct list_head *fail_head); 250 bool pci_bus_clip_resource(struct pci_dev *dev, int idx); 251 252 void pci_reassigndev_resource_alignment(struct pci_dev *dev); 253 void pci_disable_bridge_window(struct pci_dev *dev); 254 255 /* Single Root I/O Virtualization */ 256 struct pci_sriov { 257 int pos; /* capability position */ 258 int nres; /* number of resources */ 259 u32 cap; /* SR-IOV Capabilities */ 260 u16 ctrl; /* SR-IOV Control */ 261 u16 total_VFs; /* total VFs associated with the PF */ 262 u16 initial_VFs; /* initial VFs associated with the PF */ 263 u16 num_VFs; /* number of VFs available */ 264 u16 offset; /* first VF Routing ID offset */ 265 u16 stride; /* following VF stride */ 266 u32 pgsz; /* page size for BAR alignment */ 267 u8 link; /* Function Dependency Link */ 268 u8 max_VF_buses; /* max buses consumed by VFs */ 269 u16 driver_max_VFs; /* max num VFs driver supports */ 270 struct pci_dev *dev; /* lowest numbered PF */ 271 struct pci_dev *self; /* this PF */ 272 resource_size_t barsz[PCI_SRIOV_NUM_BARS]; /* VF BAR size */ 273 bool drivers_autoprobe; /* auto probing of VFs by driver */ 274 }; 275 276 /* pci_dev priv_flags */ 277 #define PCI_DEV_DISCONNECTED 0 278 279 static inline int pci_dev_set_disconnected(struct pci_dev *dev, void *unused) 280 { 281 set_bit(PCI_DEV_DISCONNECTED, &dev->priv_flags); 282 return 0; 283 } 284 285 static inline bool pci_dev_is_disconnected(const struct pci_dev *dev) 286 { 287 return test_bit(PCI_DEV_DISCONNECTED, &dev->priv_flags); 288 } 289 290 #ifdef CONFIG_PCI_ATS 291 void pci_restore_ats_state(struct pci_dev *dev); 292 #else 293 static inline void pci_restore_ats_state(struct pci_dev *dev) 294 { 295 } 296 #endif /* CONFIG_PCI_ATS */ 297 298 #ifdef CONFIG_PCI_IOV 299 int pci_iov_init(struct pci_dev *dev); 300 void pci_iov_release(struct pci_dev *dev); 301 void pci_iov_update_resource(struct pci_dev *dev, int resno); 302 resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno); 303 void pci_restore_iov_state(struct pci_dev *dev); 304 int pci_iov_bus_range(struct pci_bus *bus); 305 306 #else 307 static inline int pci_iov_init(struct pci_dev *dev) 308 { 309 return -ENODEV; 310 } 311 static inline void pci_iov_release(struct pci_dev *dev) 312 313 { 314 } 315 static inline void pci_restore_iov_state(struct pci_dev *dev) 316 { 317 } 318 static inline int pci_iov_bus_range(struct pci_bus *bus) 319 { 320 return 0; 321 } 322 323 #endif /* CONFIG_PCI_IOV */ 324 325 unsigned long pci_cardbus_resource_alignment(struct resource *); 326 327 static inline resource_size_t pci_resource_alignment(struct pci_dev *dev, 328 struct resource *res) 329 { 330 #ifdef CONFIG_PCI_IOV 331 int resno = res - dev->resource; 332 333 if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END) 334 return pci_sriov_resource_alignment(dev, resno); 335 #endif 336 if (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS) 337 return pci_cardbus_resource_alignment(res); 338 return resource_alignment(res); 339 } 340 341 void pci_enable_acs(struct pci_dev *dev); 342 343 #ifdef CONFIG_PCIE_PTM 344 void pci_ptm_init(struct pci_dev *dev); 345 #else 346 static inline void pci_ptm_init(struct pci_dev *dev) { } 347 #endif 348 349 struct pci_dev_reset_methods { 350 u16 vendor; 351 u16 device; 352 int (*reset)(struct pci_dev *dev, int probe); 353 }; 354 355 #ifdef CONFIG_PCI_QUIRKS 356 int pci_dev_specific_reset(struct pci_dev *dev, int probe); 357 #else 358 static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe) 359 { 360 return -ENOTTY; 361 } 362 #endif 363 364 #if defined(CONFIG_PCI_QUIRKS) && defined(CONFIG_ARM64) 365 int acpi_get_rc_resources(struct device *dev, const char *hid, u16 segment, 366 struct resource *res); 367 #endif 368 369 #endif /* DRIVERS_PCI_H */ 370