xref: /linux/drivers/pci/pci-sysfs.c (revision d19e470b6605c900db21fc7b34c66b6891a79983)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
4  * (C) Copyright 2002-2004 IBM Corp.
5  * (C) Copyright 2003 Matthew Wilcox
6  * (C) Copyright 2003 Hewlett-Packard
7  * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
8  * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
9  *
10  * File attributes for PCI devices
11  *
12  * Modeled after usb's driverfs.c
13  */
14 
15 
16 #include <linux/kernel.h>
17 #include <linux/sched.h>
18 #include <linux/pci.h>
19 #include <linux/stat.h>
20 #include <linux/export.h>
21 #include <linux/topology.h>
22 #include <linux/mm.h>
23 #include <linux/fs.h>
24 #include <linux/capability.h>
25 #include <linux/security.h>
26 #include <linux/slab.h>
27 #include <linux/vgaarb.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/of.h>
30 #include "pci.h"
31 
32 static int sysfs_initialized;	/* = 0 */
33 
34 /* show configuration fields */
35 #define pci_config_attr(field, format_string)				\
36 static ssize_t								\
37 field##_show(struct device *dev, struct device_attribute *attr, char *buf)				\
38 {									\
39 	struct pci_dev *pdev;						\
40 									\
41 	pdev = to_pci_dev(dev);						\
42 	return sprintf(buf, format_string, pdev->field);		\
43 }									\
44 static DEVICE_ATTR_RO(field)
45 
46 pci_config_attr(vendor, "0x%04x\n");
47 pci_config_attr(device, "0x%04x\n");
48 pci_config_attr(subsystem_vendor, "0x%04x\n");
49 pci_config_attr(subsystem_device, "0x%04x\n");
50 pci_config_attr(revision, "0x%02x\n");
51 pci_config_attr(class, "0x%06x\n");
52 pci_config_attr(irq, "%u\n");
53 
54 static ssize_t broken_parity_status_show(struct device *dev,
55 					 struct device_attribute *attr,
56 					 char *buf)
57 {
58 	struct pci_dev *pdev = to_pci_dev(dev);
59 	return sprintf(buf, "%u\n", pdev->broken_parity_status);
60 }
61 
62 static ssize_t broken_parity_status_store(struct device *dev,
63 					  struct device_attribute *attr,
64 					  const char *buf, size_t count)
65 {
66 	struct pci_dev *pdev = to_pci_dev(dev);
67 	unsigned long val;
68 
69 	if (kstrtoul(buf, 0, &val) < 0)
70 		return -EINVAL;
71 
72 	pdev->broken_parity_status = !!val;
73 
74 	return count;
75 }
76 static DEVICE_ATTR_RW(broken_parity_status);
77 
78 static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
79 				      struct device_attribute *attr, char *buf)
80 {
81 	const struct cpumask *mask;
82 
83 #ifdef CONFIG_NUMA
84 	mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
85 					  cpumask_of_node(dev_to_node(dev));
86 #else
87 	mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
88 #endif
89 	return cpumap_print_to_pagebuf(list, buf, mask);
90 }
91 
92 static ssize_t local_cpus_show(struct device *dev,
93 			       struct device_attribute *attr, char *buf)
94 {
95 	return pci_dev_show_local_cpu(dev, false, attr, buf);
96 }
97 static DEVICE_ATTR_RO(local_cpus);
98 
99 static ssize_t local_cpulist_show(struct device *dev,
100 				  struct device_attribute *attr, char *buf)
101 {
102 	return pci_dev_show_local_cpu(dev, true, attr, buf);
103 }
104 static DEVICE_ATTR_RO(local_cpulist);
105 
106 /*
107  * PCI Bus Class Devices
108  */
109 static ssize_t cpuaffinity_show(struct device *dev,
110 				struct device_attribute *attr, char *buf)
111 {
112 	const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
113 
114 	return cpumap_print_to_pagebuf(false, buf, cpumask);
115 }
116 static DEVICE_ATTR_RO(cpuaffinity);
117 
118 static ssize_t cpulistaffinity_show(struct device *dev,
119 				    struct device_attribute *attr, char *buf)
120 {
121 	const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
122 
123 	return cpumap_print_to_pagebuf(true, buf, cpumask);
124 }
125 static DEVICE_ATTR_RO(cpulistaffinity);
126 
127 /* show resources */
128 static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
129 			     char *buf)
130 {
131 	struct pci_dev *pci_dev = to_pci_dev(dev);
132 	char *str = buf;
133 	int i;
134 	int max;
135 	resource_size_t start, end;
136 
137 	if (pci_dev->subordinate)
138 		max = DEVICE_COUNT_RESOURCE;
139 	else
140 		max = PCI_BRIDGE_RESOURCES;
141 
142 	for (i = 0; i < max; i++) {
143 		struct resource *res =  &pci_dev->resource[i];
144 		pci_resource_to_user(pci_dev, i, res, &start, &end);
145 		str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
146 			       (unsigned long long)start,
147 			       (unsigned long long)end,
148 			       (unsigned long long)res->flags);
149 	}
150 	return (str - buf);
151 }
152 static DEVICE_ATTR_RO(resource);
153 
154 static ssize_t max_link_speed_show(struct device *dev,
155 				   struct device_attribute *attr, char *buf)
156 {
157 	struct pci_dev *pdev = to_pci_dev(dev);
158 
159 	return sprintf(buf, "%s\n", PCIE_SPEED2STR(pcie_get_speed_cap(pdev)));
160 }
161 static DEVICE_ATTR_RO(max_link_speed);
162 
163 static ssize_t max_link_width_show(struct device *dev,
164 				   struct device_attribute *attr, char *buf)
165 {
166 	struct pci_dev *pdev = to_pci_dev(dev);
167 
168 	return sprintf(buf, "%u\n", pcie_get_width_cap(pdev));
169 }
170 static DEVICE_ATTR_RO(max_link_width);
171 
172 static ssize_t current_link_speed_show(struct device *dev,
173 				       struct device_attribute *attr, char *buf)
174 {
175 	struct pci_dev *pci_dev = to_pci_dev(dev);
176 	u16 linkstat;
177 	int err;
178 	const char *speed;
179 
180 	err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
181 	if (err)
182 		return -EINVAL;
183 
184 	switch (linkstat & PCI_EXP_LNKSTA_CLS) {
185 	case PCI_EXP_LNKSTA_CLS_32_0GB:
186 		speed = "32 GT/s";
187 		break;
188 	case PCI_EXP_LNKSTA_CLS_16_0GB:
189 		speed = "16 GT/s";
190 		break;
191 	case PCI_EXP_LNKSTA_CLS_8_0GB:
192 		speed = "8 GT/s";
193 		break;
194 	case PCI_EXP_LNKSTA_CLS_5_0GB:
195 		speed = "5 GT/s";
196 		break;
197 	case PCI_EXP_LNKSTA_CLS_2_5GB:
198 		speed = "2.5 GT/s";
199 		break;
200 	default:
201 		speed = "Unknown speed";
202 	}
203 
204 	return sprintf(buf, "%s\n", speed);
205 }
206 static DEVICE_ATTR_RO(current_link_speed);
207 
208 static ssize_t current_link_width_show(struct device *dev,
209 				       struct device_attribute *attr, char *buf)
210 {
211 	struct pci_dev *pci_dev = to_pci_dev(dev);
212 	u16 linkstat;
213 	int err;
214 
215 	err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
216 	if (err)
217 		return -EINVAL;
218 
219 	return sprintf(buf, "%u\n",
220 		(linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
221 }
222 static DEVICE_ATTR_RO(current_link_width);
223 
224 static ssize_t secondary_bus_number_show(struct device *dev,
225 					 struct device_attribute *attr,
226 					 char *buf)
227 {
228 	struct pci_dev *pci_dev = to_pci_dev(dev);
229 	u8 sec_bus;
230 	int err;
231 
232 	err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
233 	if (err)
234 		return -EINVAL;
235 
236 	return sprintf(buf, "%u\n", sec_bus);
237 }
238 static DEVICE_ATTR_RO(secondary_bus_number);
239 
240 static ssize_t subordinate_bus_number_show(struct device *dev,
241 					   struct device_attribute *attr,
242 					   char *buf)
243 {
244 	struct pci_dev *pci_dev = to_pci_dev(dev);
245 	u8 sub_bus;
246 	int err;
247 
248 	err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
249 	if (err)
250 		return -EINVAL;
251 
252 	return sprintf(buf, "%u\n", sub_bus);
253 }
254 static DEVICE_ATTR_RO(subordinate_bus_number);
255 
256 static ssize_t ari_enabled_show(struct device *dev,
257 				struct device_attribute *attr,
258 				char *buf)
259 {
260 	struct pci_dev *pci_dev = to_pci_dev(dev);
261 
262 	return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
263 }
264 static DEVICE_ATTR_RO(ari_enabled);
265 
266 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
267 			     char *buf)
268 {
269 	struct pci_dev *pci_dev = to_pci_dev(dev);
270 
271 	return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
272 		       pci_dev->vendor, pci_dev->device,
273 		       pci_dev->subsystem_vendor, pci_dev->subsystem_device,
274 		       (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
275 		       (u8)(pci_dev->class));
276 }
277 static DEVICE_ATTR_RO(modalias);
278 
279 static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
280 			     const char *buf, size_t count)
281 {
282 	struct pci_dev *pdev = to_pci_dev(dev);
283 	unsigned long val;
284 	ssize_t result = kstrtoul(buf, 0, &val);
285 
286 	if (result < 0)
287 		return result;
288 
289 	/* this can crash the machine when done on the "wrong" device */
290 	if (!capable(CAP_SYS_ADMIN))
291 		return -EPERM;
292 
293 	device_lock(dev);
294 	if (dev->driver)
295 		result = -EBUSY;
296 	else if (val)
297 		result = pci_enable_device(pdev);
298 	else if (pci_is_enabled(pdev))
299 		pci_disable_device(pdev);
300 	else
301 		result = -EIO;
302 	device_unlock(dev);
303 
304 	return result < 0 ? result : count;
305 }
306 
307 static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
308 			    char *buf)
309 {
310 	struct pci_dev *pdev;
311 
312 	pdev = to_pci_dev(dev);
313 	return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
314 }
315 static DEVICE_ATTR_RW(enable);
316 
317 #ifdef CONFIG_NUMA
318 static ssize_t numa_node_store(struct device *dev,
319 			       struct device_attribute *attr, const char *buf,
320 			       size_t count)
321 {
322 	struct pci_dev *pdev = to_pci_dev(dev);
323 	int node, ret;
324 
325 	if (!capable(CAP_SYS_ADMIN))
326 		return -EPERM;
327 
328 	ret = kstrtoint(buf, 0, &node);
329 	if (ret)
330 		return ret;
331 
332 	if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
333 		return -EINVAL;
334 
335 	if (node != NUMA_NO_NODE && !node_online(node))
336 		return -EINVAL;
337 
338 	add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
339 	pci_alert(pdev, FW_BUG "Overriding NUMA node to %d.  Contact your vendor for updates.",
340 		  node);
341 
342 	dev->numa_node = node;
343 	return count;
344 }
345 
346 static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
347 			      char *buf)
348 {
349 	return sprintf(buf, "%d\n", dev->numa_node);
350 }
351 static DEVICE_ATTR_RW(numa_node);
352 #endif
353 
354 static ssize_t dma_mask_bits_show(struct device *dev,
355 				  struct device_attribute *attr, char *buf)
356 {
357 	struct pci_dev *pdev = to_pci_dev(dev);
358 
359 	return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
360 }
361 static DEVICE_ATTR_RO(dma_mask_bits);
362 
363 static ssize_t consistent_dma_mask_bits_show(struct device *dev,
364 					     struct device_attribute *attr,
365 					     char *buf)
366 {
367 	return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
368 }
369 static DEVICE_ATTR_RO(consistent_dma_mask_bits);
370 
371 static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
372 			    char *buf)
373 {
374 	struct pci_dev *pdev = to_pci_dev(dev);
375 	struct pci_bus *subordinate = pdev->subordinate;
376 
377 	return sprintf(buf, "%u\n", subordinate ?
378 		       !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
379 			   : !pdev->no_msi);
380 }
381 
382 static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
383 			     const char *buf, size_t count)
384 {
385 	struct pci_dev *pdev = to_pci_dev(dev);
386 	struct pci_bus *subordinate = pdev->subordinate;
387 	unsigned long val;
388 
389 	if (kstrtoul(buf, 0, &val) < 0)
390 		return -EINVAL;
391 
392 	if (!capable(CAP_SYS_ADMIN))
393 		return -EPERM;
394 
395 	/*
396 	 * "no_msi" and "bus_flags" only affect what happens when a driver
397 	 * requests MSI or MSI-X.  They don't affect any drivers that have
398 	 * already requested MSI or MSI-X.
399 	 */
400 	if (!subordinate) {
401 		pdev->no_msi = !val;
402 		pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
403 			 val ? "allowed" : "disallowed");
404 		return count;
405 	}
406 
407 	if (val)
408 		subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
409 	else
410 		subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
411 
412 	dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
413 		 val ? "allowed" : "disallowed");
414 	return count;
415 }
416 static DEVICE_ATTR_RW(msi_bus);
417 
418 static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count)
419 {
420 	unsigned long val;
421 	struct pci_bus *b = NULL;
422 
423 	if (kstrtoul(buf, 0, &val) < 0)
424 		return -EINVAL;
425 
426 	if (val) {
427 		pci_lock_rescan_remove();
428 		while ((b = pci_find_next_bus(b)) != NULL)
429 			pci_rescan_bus(b);
430 		pci_unlock_rescan_remove();
431 	}
432 	return count;
433 }
434 static BUS_ATTR_WO(rescan);
435 
436 static struct attribute *pci_bus_attrs[] = {
437 	&bus_attr_rescan.attr,
438 	NULL,
439 };
440 
441 static const struct attribute_group pci_bus_group = {
442 	.attrs = pci_bus_attrs,
443 };
444 
445 const struct attribute_group *pci_bus_groups[] = {
446 	&pci_bus_group,
447 	NULL,
448 };
449 
450 static ssize_t dev_rescan_store(struct device *dev,
451 				struct device_attribute *attr, const char *buf,
452 				size_t count)
453 {
454 	unsigned long val;
455 	struct pci_dev *pdev = to_pci_dev(dev);
456 
457 	if (kstrtoul(buf, 0, &val) < 0)
458 		return -EINVAL;
459 
460 	if (val) {
461 		pci_lock_rescan_remove();
462 		pci_rescan_bus(pdev->bus);
463 		pci_unlock_rescan_remove();
464 	}
465 	return count;
466 }
467 static DEVICE_ATTR_WO(dev_rescan);
468 
469 static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
470 			    const char *buf, size_t count)
471 {
472 	unsigned long val;
473 
474 	if (kstrtoul(buf, 0, &val) < 0)
475 		return -EINVAL;
476 
477 	if (val && device_remove_file_self(dev, attr))
478 		pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
479 	return count;
480 }
481 static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL,
482 				  remove_store);
483 
484 static ssize_t bus_rescan_store(struct device *dev,
485 				struct device_attribute *attr,
486 				const char *buf, size_t count)
487 {
488 	unsigned long val;
489 	struct pci_bus *bus = to_pci_bus(dev);
490 
491 	if (kstrtoul(buf, 0, &val) < 0)
492 		return -EINVAL;
493 
494 	if (val) {
495 		pci_lock_rescan_remove();
496 		if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
497 			pci_rescan_bus_bridge_resize(bus->self);
498 		else
499 			pci_rescan_bus(bus);
500 		pci_unlock_rescan_remove();
501 	}
502 	return count;
503 }
504 static DEVICE_ATTR_WO(bus_rescan);
505 
506 #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
507 static ssize_t d3cold_allowed_store(struct device *dev,
508 				    struct device_attribute *attr,
509 				    const char *buf, size_t count)
510 {
511 	struct pci_dev *pdev = to_pci_dev(dev);
512 	unsigned long val;
513 
514 	if (kstrtoul(buf, 0, &val) < 0)
515 		return -EINVAL;
516 
517 	pdev->d3cold_allowed = !!val;
518 	if (pdev->d3cold_allowed)
519 		pci_d3cold_enable(pdev);
520 	else
521 		pci_d3cold_disable(pdev);
522 
523 	pm_runtime_resume(dev);
524 
525 	return count;
526 }
527 
528 static ssize_t d3cold_allowed_show(struct device *dev,
529 				   struct device_attribute *attr, char *buf)
530 {
531 	struct pci_dev *pdev = to_pci_dev(dev);
532 	return sprintf(buf, "%u\n", pdev->d3cold_allowed);
533 }
534 static DEVICE_ATTR_RW(d3cold_allowed);
535 #endif
536 
537 #ifdef CONFIG_OF
538 static ssize_t devspec_show(struct device *dev,
539 			    struct device_attribute *attr, char *buf)
540 {
541 	struct pci_dev *pdev = to_pci_dev(dev);
542 	struct device_node *np = pci_device_to_OF_node(pdev);
543 
544 	if (np == NULL)
545 		return 0;
546 	return sprintf(buf, "%pOF", np);
547 }
548 static DEVICE_ATTR_RO(devspec);
549 #endif
550 
551 static ssize_t driver_override_store(struct device *dev,
552 				     struct device_attribute *attr,
553 				     const char *buf, size_t count)
554 {
555 	struct pci_dev *pdev = to_pci_dev(dev);
556 	char *driver_override, *old, *cp;
557 
558 	/* We need to keep extra room for a newline */
559 	if (count >= (PAGE_SIZE - 1))
560 		return -EINVAL;
561 
562 	driver_override = kstrndup(buf, count, GFP_KERNEL);
563 	if (!driver_override)
564 		return -ENOMEM;
565 
566 	cp = strchr(driver_override, '\n');
567 	if (cp)
568 		*cp = '\0';
569 
570 	device_lock(dev);
571 	old = pdev->driver_override;
572 	if (strlen(driver_override)) {
573 		pdev->driver_override = driver_override;
574 	} else {
575 		kfree(driver_override);
576 		pdev->driver_override = NULL;
577 	}
578 	device_unlock(dev);
579 
580 	kfree(old);
581 
582 	return count;
583 }
584 
585 static ssize_t driver_override_show(struct device *dev,
586 				    struct device_attribute *attr, char *buf)
587 {
588 	struct pci_dev *pdev = to_pci_dev(dev);
589 	ssize_t len;
590 
591 	device_lock(dev);
592 	len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
593 	device_unlock(dev);
594 	return len;
595 }
596 static DEVICE_ATTR_RW(driver_override);
597 
598 static struct attribute *pci_dev_attrs[] = {
599 	&dev_attr_resource.attr,
600 	&dev_attr_vendor.attr,
601 	&dev_attr_device.attr,
602 	&dev_attr_subsystem_vendor.attr,
603 	&dev_attr_subsystem_device.attr,
604 	&dev_attr_revision.attr,
605 	&dev_attr_class.attr,
606 	&dev_attr_irq.attr,
607 	&dev_attr_local_cpus.attr,
608 	&dev_attr_local_cpulist.attr,
609 	&dev_attr_modalias.attr,
610 #ifdef CONFIG_NUMA
611 	&dev_attr_numa_node.attr,
612 #endif
613 	&dev_attr_dma_mask_bits.attr,
614 	&dev_attr_consistent_dma_mask_bits.attr,
615 	&dev_attr_enable.attr,
616 	&dev_attr_broken_parity_status.attr,
617 	&dev_attr_msi_bus.attr,
618 #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
619 	&dev_attr_d3cold_allowed.attr,
620 #endif
621 #ifdef CONFIG_OF
622 	&dev_attr_devspec.attr,
623 #endif
624 	&dev_attr_driver_override.attr,
625 	&dev_attr_ari_enabled.attr,
626 	NULL,
627 };
628 
629 static struct attribute *pci_bridge_attrs[] = {
630 	&dev_attr_subordinate_bus_number.attr,
631 	&dev_attr_secondary_bus_number.attr,
632 	NULL,
633 };
634 
635 static struct attribute *pcie_dev_attrs[] = {
636 	&dev_attr_current_link_speed.attr,
637 	&dev_attr_current_link_width.attr,
638 	&dev_attr_max_link_width.attr,
639 	&dev_attr_max_link_speed.attr,
640 	NULL,
641 };
642 
643 static struct attribute *pcibus_attrs[] = {
644 	&dev_attr_bus_rescan.attr,
645 	&dev_attr_cpuaffinity.attr,
646 	&dev_attr_cpulistaffinity.attr,
647 	NULL,
648 };
649 
650 static const struct attribute_group pcibus_group = {
651 	.attrs = pcibus_attrs,
652 };
653 
654 const struct attribute_group *pcibus_groups[] = {
655 	&pcibus_group,
656 	NULL,
657 };
658 
659 static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
660 			     char *buf)
661 {
662 	struct pci_dev *pdev = to_pci_dev(dev);
663 	struct pci_dev *vga_dev = vga_default_device();
664 
665 	if (vga_dev)
666 		return sprintf(buf, "%u\n", (pdev == vga_dev));
667 
668 	return sprintf(buf, "%u\n",
669 		!!(pdev->resource[PCI_ROM_RESOURCE].flags &
670 		   IORESOURCE_ROM_SHADOW));
671 }
672 static DEVICE_ATTR_RO(boot_vga);
673 
674 static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
675 			       struct bin_attribute *bin_attr, char *buf,
676 			       loff_t off, size_t count)
677 {
678 	struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
679 	unsigned int size = 64;
680 	loff_t init_off = off;
681 	u8 *data = (u8 *) buf;
682 
683 	/* Several chips lock up trying to read undefined config space */
684 	if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
685 		size = dev->cfg_size;
686 	else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
687 		size = 128;
688 
689 	if (off > size)
690 		return 0;
691 	if (off + count > size) {
692 		size -= off;
693 		count = size;
694 	} else {
695 		size = count;
696 	}
697 
698 	pci_config_pm_runtime_get(dev);
699 
700 	if ((off & 1) && size) {
701 		u8 val;
702 		pci_user_read_config_byte(dev, off, &val);
703 		data[off - init_off] = val;
704 		off++;
705 		size--;
706 	}
707 
708 	if ((off & 3) && size > 2) {
709 		u16 val;
710 		pci_user_read_config_word(dev, off, &val);
711 		data[off - init_off] = val & 0xff;
712 		data[off - init_off + 1] = (val >> 8) & 0xff;
713 		off += 2;
714 		size -= 2;
715 	}
716 
717 	while (size > 3) {
718 		u32 val;
719 		pci_user_read_config_dword(dev, off, &val);
720 		data[off - init_off] = val & 0xff;
721 		data[off - init_off + 1] = (val >> 8) & 0xff;
722 		data[off - init_off + 2] = (val >> 16) & 0xff;
723 		data[off - init_off + 3] = (val >> 24) & 0xff;
724 		off += 4;
725 		size -= 4;
726 	}
727 
728 	if (size >= 2) {
729 		u16 val;
730 		pci_user_read_config_word(dev, off, &val);
731 		data[off - init_off] = val & 0xff;
732 		data[off - init_off + 1] = (val >> 8) & 0xff;
733 		off += 2;
734 		size -= 2;
735 	}
736 
737 	if (size > 0) {
738 		u8 val;
739 		pci_user_read_config_byte(dev, off, &val);
740 		data[off - init_off] = val;
741 		off++;
742 		--size;
743 	}
744 
745 	pci_config_pm_runtime_put(dev);
746 
747 	return count;
748 }
749 
750 static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
751 				struct bin_attribute *bin_attr, char *buf,
752 				loff_t off, size_t count)
753 {
754 	struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
755 	unsigned int size = count;
756 	loff_t init_off = off;
757 	u8 *data = (u8 *) buf;
758 	int ret;
759 
760 	ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
761 	if (ret)
762 		return ret;
763 
764 	if (off > dev->cfg_size)
765 		return 0;
766 	if (off + count > dev->cfg_size) {
767 		size = dev->cfg_size - off;
768 		count = size;
769 	}
770 
771 	pci_config_pm_runtime_get(dev);
772 
773 	if ((off & 1) && size) {
774 		pci_user_write_config_byte(dev, off, data[off - init_off]);
775 		off++;
776 		size--;
777 	}
778 
779 	if ((off & 3) && size > 2) {
780 		u16 val = data[off - init_off];
781 		val |= (u16) data[off - init_off + 1] << 8;
782 		pci_user_write_config_word(dev, off, val);
783 		off += 2;
784 		size -= 2;
785 	}
786 
787 	while (size > 3) {
788 		u32 val = data[off - init_off];
789 		val |= (u32) data[off - init_off + 1] << 8;
790 		val |= (u32) data[off - init_off + 2] << 16;
791 		val |= (u32) data[off - init_off + 3] << 24;
792 		pci_user_write_config_dword(dev, off, val);
793 		off += 4;
794 		size -= 4;
795 	}
796 
797 	if (size >= 2) {
798 		u16 val = data[off - init_off];
799 		val |= (u16) data[off - init_off + 1] << 8;
800 		pci_user_write_config_word(dev, off, val);
801 		off += 2;
802 		size -= 2;
803 	}
804 
805 	if (size) {
806 		pci_user_write_config_byte(dev, off, data[off - init_off]);
807 		off++;
808 		--size;
809 	}
810 
811 	pci_config_pm_runtime_put(dev);
812 
813 	return count;
814 }
815 
816 #ifdef HAVE_PCI_LEGACY
817 /**
818  * pci_read_legacy_io - read byte(s) from legacy I/O port space
819  * @filp: open sysfs file
820  * @kobj: kobject corresponding to file to read from
821  * @bin_attr: struct bin_attribute for this file
822  * @buf: buffer to store results
823  * @off: offset into legacy I/O port space
824  * @count: number of bytes to read
825  *
826  * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
827  * callback routine (pci_legacy_read).
828  */
829 static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
830 				  struct bin_attribute *bin_attr, char *buf,
831 				  loff_t off, size_t count)
832 {
833 	struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
834 
835 	/* Only support 1, 2 or 4 byte accesses */
836 	if (count != 1 && count != 2 && count != 4)
837 		return -EINVAL;
838 
839 	return pci_legacy_read(bus, off, (u32 *)buf, count);
840 }
841 
842 /**
843  * pci_write_legacy_io - write byte(s) to legacy I/O port space
844  * @filp: open sysfs file
845  * @kobj: kobject corresponding to file to read from
846  * @bin_attr: struct bin_attribute for this file
847  * @buf: buffer containing value to be written
848  * @off: offset into legacy I/O port space
849  * @count: number of bytes to write
850  *
851  * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
852  * callback routine (pci_legacy_write).
853  */
854 static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
855 				   struct bin_attribute *bin_attr, char *buf,
856 				   loff_t off, size_t count)
857 {
858 	struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
859 
860 	/* Only support 1, 2 or 4 byte accesses */
861 	if (count != 1 && count != 2 && count != 4)
862 		return -EINVAL;
863 
864 	return pci_legacy_write(bus, off, *(u32 *)buf, count);
865 }
866 
867 /**
868  * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
869  * @filp: open sysfs file
870  * @kobj: kobject corresponding to device to be mapped
871  * @attr: struct bin_attribute for this file
872  * @vma: struct vm_area_struct passed to mmap
873  *
874  * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
875  * legacy memory space (first meg of bus space) into application virtual
876  * memory space.
877  */
878 static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
879 			       struct bin_attribute *attr,
880 			       struct vm_area_struct *vma)
881 {
882 	struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
883 
884 	return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
885 }
886 
887 /**
888  * pci_mmap_legacy_io - map legacy PCI IO into user memory space
889  * @filp: open sysfs file
890  * @kobj: kobject corresponding to device to be mapped
891  * @attr: struct bin_attribute for this file
892  * @vma: struct vm_area_struct passed to mmap
893  *
894  * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
895  * legacy IO space (first meg of bus space) into application virtual
896  * memory space. Returns -ENOSYS if the operation isn't supported
897  */
898 static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
899 			      struct bin_attribute *attr,
900 			      struct vm_area_struct *vma)
901 {
902 	struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
903 
904 	return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
905 }
906 
907 /**
908  * pci_adjust_legacy_attr - adjustment of legacy file attributes
909  * @b: bus to create files under
910  * @mmap_type: I/O port or memory
911  *
912  * Stub implementation. Can be overridden by arch if necessary.
913  */
914 void __weak pci_adjust_legacy_attr(struct pci_bus *b,
915 				   enum pci_mmap_state mmap_type)
916 {
917 }
918 
919 /**
920  * pci_create_legacy_files - create legacy I/O port and memory files
921  * @b: bus to create files under
922  *
923  * Some platforms allow access to legacy I/O port and ISA memory space on
924  * a per-bus basis.  This routine creates the files and ties them into
925  * their associated read, write and mmap files from pci-sysfs.c
926  *
927  * On error unwind, but don't propagate the error to the caller
928  * as it is ok to set up the PCI bus without these files.
929  */
930 void pci_create_legacy_files(struct pci_bus *b)
931 {
932 	int error;
933 
934 	b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
935 			       GFP_ATOMIC);
936 	if (!b->legacy_io)
937 		goto kzalloc_err;
938 
939 	sysfs_bin_attr_init(b->legacy_io);
940 	b->legacy_io->attr.name = "legacy_io";
941 	b->legacy_io->size = 0xffff;
942 	b->legacy_io->attr.mode = 0600;
943 	b->legacy_io->read = pci_read_legacy_io;
944 	b->legacy_io->write = pci_write_legacy_io;
945 	b->legacy_io->mmap = pci_mmap_legacy_io;
946 	pci_adjust_legacy_attr(b, pci_mmap_io);
947 	error = device_create_bin_file(&b->dev, b->legacy_io);
948 	if (error)
949 		goto legacy_io_err;
950 
951 	/* Allocated above after the legacy_io struct */
952 	b->legacy_mem = b->legacy_io + 1;
953 	sysfs_bin_attr_init(b->legacy_mem);
954 	b->legacy_mem->attr.name = "legacy_mem";
955 	b->legacy_mem->size = 1024*1024;
956 	b->legacy_mem->attr.mode = 0600;
957 	b->legacy_mem->mmap = pci_mmap_legacy_mem;
958 	pci_adjust_legacy_attr(b, pci_mmap_mem);
959 	error = device_create_bin_file(&b->dev, b->legacy_mem);
960 	if (error)
961 		goto legacy_mem_err;
962 
963 	return;
964 
965 legacy_mem_err:
966 	device_remove_bin_file(&b->dev, b->legacy_io);
967 legacy_io_err:
968 	kfree(b->legacy_io);
969 	b->legacy_io = NULL;
970 kzalloc_err:
971 	dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n");
972 }
973 
974 void pci_remove_legacy_files(struct pci_bus *b)
975 {
976 	if (b->legacy_io) {
977 		device_remove_bin_file(&b->dev, b->legacy_io);
978 		device_remove_bin_file(&b->dev, b->legacy_mem);
979 		kfree(b->legacy_io); /* both are allocated here */
980 	}
981 }
982 #endif /* HAVE_PCI_LEGACY */
983 
984 #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
985 
986 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
987 		  enum pci_mmap_api mmap_api)
988 {
989 	unsigned long nr, start, size;
990 	resource_size_t pci_start = 0, pci_end;
991 
992 	if (pci_resource_len(pdev, resno) == 0)
993 		return 0;
994 	nr = vma_pages(vma);
995 	start = vma->vm_pgoff;
996 	size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
997 	if (mmap_api == PCI_MMAP_PROCFS) {
998 		pci_resource_to_user(pdev, resno, &pdev->resource[resno],
999 				     &pci_start, &pci_end);
1000 		pci_start >>= PAGE_SHIFT;
1001 	}
1002 	if (start >= pci_start && start < pci_start + size &&
1003 			start + nr <= pci_start + size)
1004 		return 1;
1005 	return 0;
1006 }
1007 
1008 /**
1009  * pci_mmap_resource - map a PCI resource into user memory space
1010  * @kobj: kobject for mapping
1011  * @attr: struct bin_attribute for the file being mapped
1012  * @vma: struct vm_area_struct passed into the mmap
1013  * @write_combine: 1 for write_combine mapping
1014  *
1015  * Use the regular PCI mapping routines to map a PCI resource into userspace.
1016  */
1017 static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
1018 			     struct vm_area_struct *vma, int write_combine)
1019 {
1020 	struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1021 	int bar = (unsigned long)attr->private;
1022 	enum pci_mmap_state mmap_type;
1023 	struct resource *res = &pdev->resource[bar];
1024 	int ret;
1025 
1026 	ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1027 	if (ret)
1028 		return ret;
1029 
1030 	if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1031 		return -EINVAL;
1032 
1033 	if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
1034 		return -EINVAL;
1035 
1036 	mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1037 
1038 	return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
1039 }
1040 
1041 static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1042 				struct bin_attribute *attr,
1043 				struct vm_area_struct *vma)
1044 {
1045 	return pci_mmap_resource(kobj, attr, vma, 0);
1046 }
1047 
1048 static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1049 				struct bin_attribute *attr,
1050 				struct vm_area_struct *vma)
1051 {
1052 	return pci_mmap_resource(kobj, attr, vma, 1);
1053 }
1054 
1055 static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1056 			       struct bin_attribute *attr, char *buf,
1057 			       loff_t off, size_t count, bool write)
1058 {
1059 	struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1060 	int bar = (unsigned long)attr->private;
1061 	unsigned long port = off;
1062 
1063 	port += pci_resource_start(pdev, bar);
1064 
1065 	if (port > pci_resource_end(pdev, bar))
1066 		return 0;
1067 
1068 	if (port + count - 1 > pci_resource_end(pdev, bar))
1069 		return -EINVAL;
1070 
1071 	switch (count) {
1072 	case 1:
1073 		if (write)
1074 			outb(*(u8 *)buf, port);
1075 		else
1076 			*(u8 *)buf = inb(port);
1077 		return 1;
1078 	case 2:
1079 		if (write)
1080 			outw(*(u16 *)buf, port);
1081 		else
1082 			*(u16 *)buf = inw(port);
1083 		return 2;
1084 	case 4:
1085 		if (write)
1086 			outl(*(u32 *)buf, port);
1087 		else
1088 			*(u32 *)buf = inl(port);
1089 		return 4;
1090 	}
1091 	return -EINVAL;
1092 }
1093 
1094 static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1095 				    struct bin_attribute *attr, char *buf,
1096 				    loff_t off, size_t count)
1097 {
1098 	return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1099 }
1100 
1101 static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1102 				     struct bin_attribute *attr, char *buf,
1103 				     loff_t off, size_t count)
1104 {
1105 	int ret;
1106 
1107 	ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1108 	if (ret)
1109 		return ret;
1110 
1111 	return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1112 }
1113 
1114 /**
1115  * pci_remove_resource_files - cleanup resource files
1116  * @pdev: dev to cleanup
1117  *
1118  * If we created resource files for @pdev, remove them from sysfs and
1119  * free their resources.
1120  */
1121 static void pci_remove_resource_files(struct pci_dev *pdev)
1122 {
1123 	int i;
1124 
1125 	for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1126 		struct bin_attribute *res_attr;
1127 
1128 		res_attr = pdev->res_attr[i];
1129 		if (res_attr) {
1130 			sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1131 			kfree(res_attr);
1132 		}
1133 
1134 		res_attr = pdev->res_attr_wc[i];
1135 		if (res_attr) {
1136 			sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1137 			kfree(res_attr);
1138 		}
1139 	}
1140 }
1141 
1142 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1143 {
1144 	/* allocate attribute structure, piggyback attribute name */
1145 	int name_len = write_combine ? 13 : 10;
1146 	struct bin_attribute *res_attr;
1147 	char *res_attr_name;
1148 	int retval;
1149 
1150 	res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1151 	if (!res_attr)
1152 		return -ENOMEM;
1153 
1154 	res_attr_name = (char *)(res_attr + 1);
1155 
1156 	sysfs_bin_attr_init(res_attr);
1157 	if (write_combine) {
1158 		pdev->res_attr_wc[num] = res_attr;
1159 		sprintf(res_attr_name, "resource%d_wc", num);
1160 		res_attr->mmap = pci_mmap_resource_wc;
1161 	} else {
1162 		pdev->res_attr[num] = res_attr;
1163 		sprintf(res_attr_name, "resource%d", num);
1164 		if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1165 			res_attr->read = pci_read_resource_io;
1166 			res_attr->write = pci_write_resource_io;
1167 			if (arch_can_pci_mmap_io())
1168 				res_attr->mmap = pci_mmap_resource_uc;
1169 		} else {
1170 			res_attr->mmap = pci_mmap_resource_uc;
1171 		}
1172 	}
1173 	res_attr->attr.name = res_attr_name;
1174 	res_attr->attr.mode = 0600;
1175 	res_attr->size = pci_resource_len(pdev, num);
1176 	res_attr->private = (void *)(unsigned long)num;
1177 	retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1178 	if (retval)
1179 		kfree(res_attr);
1180 
1181 	return retval;
1182 }
1183 
1184 /**
1185  * pci_create_resource_files - create resource files in sysfs for @dev
1186  * @pdev: dev in question
1187  *
1188  * Walk the resources in @pdev creating files for each resource available.
1189  */
1190 static int pci_create_resource_files(struct pci_dev *pdev)
1191 {
1192 	int i;
1193 	int retval;
1194 
1195 	/* Expose the PCI resources from this device as files */
1196 	for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1197 
1198 		/* skip empty resources */
1199 		if (!pci_resource_len(pdev, i))
1200 			continue;
1201 
1202 		retval = pci_create_attr(pdev, i, 0);
1203 		/* for prefetchable resources, create a WC mappable file */
1204 		if (!retval && arch_can_pci_mmap_wc() &&
1205 		    pdev->resource[i].flags & IORESOURCE_PREFETCH)
1206 			retval = pci_create_attr(pdev, i, 1);
1207 		if (retval) {
1208 			pci_remove_resource_files(pdev);
1209 			return retval;
1210 		}
1211 	}
1212 	return 0;
1213 }
1214 #else /* !HAVE_PCI_MMAP */
1215 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1216 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1217 #endif /* HAVE_PCI_MMAP */
1218 
1219 /**
1220  * pci_write_rom - used to enable access to the PCI ROM display
1221  * @filp: sysfs file
1222  * @kobj: kernel object handle
1223  * @bin_attr: struct bin_attribute for this file
1224  * @buf: user input
1225  * @off: file offset
1226  * @count: number of byte in input
1227  *
1228  * writing anything except 0 enables it
1229  */
1230 static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1231 			     struct bin_attribute *bin_attr, char *buf,
1232 			     loff_t off, size_t count)
1233 {
1234 	struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1235 
1236 	if ((off ==  0) && (*buf == '0') && (count == 2))
1237 		pdev->rom_attr_enabled = 0;
1238 	else
1239 		pdev->rom_attr_enabled = 1;
1240 
1241 	return count;
1242 }
1243 
1244 /**
1245  * pci_read_rom - read a PCI ROM
1246  * @filp: sysfs file
1247  * @kobj: kernel object handle
1248  * @bin_attr: struct bin_attribute for this file
1249  * @buf: where to put the data we read from the ROM
1250  * @off: file offset
1251  * @count: number of bytes to read
1252  *
1253  * Put @count bytes starting at @off into @buf from the ROM in the PCI
1254  * device corresponding to @kobj.
1255  */
1256 static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1257 			    struct bin_attribute *bin_attr, char *buf,
1258 			    loff_t off, size_t count)
1259 {
1260 	struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1261 	void __iomem *rom;
1262 	size_t size;
1263 
1264 	if (!pdev->rom_attr_enabled)
1265 		return -EINVAL;
1266 
1267 	rom = pci_map_rom(pdev, &size);	/* size starts out as PCI window size */
1268 	if (!rom || !size)
1269 		return -EIO;
1270 
1271 	if (off >= size)
1272 		count = 0;
1273 	else {
1274 		if (off + count > size)
1275 			count = size - off;
1276 
1277 		memcpy_fromio(buf, rom + off, count);
1278 	}
1279 	pci_unmap_rom(pdev, rom);
1280 
1281 	return count;
1282 }
1283 
1284 static const struct bin_attribute pci_config_attr = {
1285 	.attr =	{
1286 		.name = "config",
1287 		.mode = 0644,
1288 	},
1289 	.size = PCI_CFG_SPACE_SIZE,
1290 	.read = pci_read_config,
1291 	.write = pci_write_config,
1292 };
1293 
1294 static const struct bin_attribute pcie_config_attr = {
1295 	.attr =	{
1296 		.name = "config",
1297 		.mode = 0644,
1298 	},
1299 	.size = PCI_CFG_SPACE_EXP_SIZE,
1300 	.read = pci_read_config,
1301 	.write = pci_write_config,
1302 };
1303 
1304 static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1305 			   const char *buf, size_t count)
1306 {
1307 	struct pci_dev *pdev = to_pci_dev(dev);
1308 	unsigned long val;
1309 	ssize_t result = kstrtoul(buf, 0, &val);
1310 
1311 	if (result < 0)
1312 		return result;
1313 
1314 	if (val != 1)
1315 		return -EINVAL;
1316 
1317 	pm_runtime_get_sync(dev);
1318 	result = pci_reset_function(pdev);
1319 	pm_runtime_put(dev);
1320 	if (result < 0)
1321 		return result;
1322 
1323 	return count;
1324 }
1325 
1326 static DEVICE_ATTR(reset, 0200, NULL, reset_store);
1327 
1328 static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1329 {
1330 	int retval;
1331 
1332 	pcie_vpd_create_sysfs_dev_files(dev);
1333 
1334 	if (dev->reset_fn) {
1335 		retval = device_create_file(&dev->dev, &dev_attr_reset);
1336 		if (retval)
1337 			goto error;
1338 	}
1339 	return 0;
1340 
1341 error:
1342 	pcie_vpd_remove_sysfs_dev_files(dev);
1343 	return retval;
1344 }
1345 
1346 int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1347 {
1348 	int retval;
1349 	int rom_size;
1350 	struct bin_attribute *attr;
1351 
1352 	if (!sysfs_initialized)
1353 		return -EACCES;
1354 
1355 	if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1356 		retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1357 	else
1358 		retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1359 	if (retval)
1360 		goto err;
1361 
1362 	retval = pci_create_resource_files(pdev);
1363 	if (retval)
1364 		goto err_config_file;
1365 
1366 	/* If the device has a ROM, try to expose it in sysfs. */
1367 	rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1368 	if (rom_size) {
1369 		attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1370 		if (!attr) {
1371 			retval = -ENOMEM;
1372 			goto err_resource_files;
1373 		}
1374 		sysfs_bin_attr_init(attr);
1375 		attr->size = rom_size;
1376 		attr->attr.name = "rom";
1377 		attr->attr.mode = 0600;
1378 		attr->read = pci_read_rom;
1379 		attr->write = pci_write_rom;
1380 		retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1381 		if (retval) {
1382 			kfree(attr);
1383 			goto err_resource_files;
1384 		}
1385 		pdev->rom_attr = attr;
1386 	}
1387 
1388 	/* add sysfs entries for various capabilities */
1389 	retval = pci_create_capabilities_sysfs(pdev);
1390 	if (retval)
1391 		goto err_rom_file;
1392 
1393 	pci_create_firmware_label_files(pdev);
1394 
1395 	return 0;
1396 
1397 err_rom_file:
1398 	if (pdev->rom_attr) {
1399 		sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1400 		kfree(pdev->rom_attr);
1401 		pdev->rom_attr = NULL;
1402 	}
1403 err_resource_files:
1404 	pci_remove_resource_files(pdev);
1405 err_config_file:
1406 	if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1407 		sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1408 	else
1409 		sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1410 err:
1411 	return retval;
1412 }
1413 
1414 static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1415 {
1416 	pcie_vpd_remove_sysfs_dev_files(dev);
1417 	if (dev->reset_fn) {
1418 		device_remove_file(&dev->dev, &dev_attr_reset);
1419 		dev->reset_fn = 0;
1420 	}
1421 }
1422 
1423 /**
1424  * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1425  * @pdev: device whose entries we should free
1426  *
1427  * Cleanup when @pdev is removed from sysfs.
1428  */
1429 void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1430 {
1431 	if (!sysfs_initialized)
1432 		return;
1433 
1434 	pci_remove_capabilities_sysfs(pdev);
1435 
1436 	if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1437 		sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1438 	else
1439 		sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1440 
1441 	pci_remove_resource_files(pdev);
1442 
1443 	if (pdev->rom_attr) {
1444 		sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1445 		kfree(pdev->rom_attr);
1446 		pdev->rom_attr = NULL;
1447 	}
1448 
1449 	pci_remove_firmware_label_files(pdev);
1450 }
1451 
1452 static int __init pci_sysfs_init(void)
1453 {
1454 	struct pci_dev *pdev = NULL;
1455 	int retval;
1456 
1457 	sysfs_initialized = 1;
1458 	for_each_pci_dev(pdev) {
1459 		retval = pci_create_sysfs_dev_files(pdev);
1460 		if (retval) {
1461 			pci_dev_put(pdev);
1462 			return retval;
1463 		}
1464 	}
1465 
1466 	return 0;
1467 }
1468 late_initcall(pci_sysfs_init);
1469 
1470 static struct attribute *pci_dev_dev_attrs[] = {
1471 	&dev_attr_boot_vga.attr,
1472 	NULL,
1473 };
1474 
1475 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1476 					 struct attribute *a, int n)
1477 {
1478 	struct device *dev = kobj_to_dev(kobj);
1479 	struct pci_dev *pdev = to_pci_dev(dev);
1480 
1481 	if (a == &dev_attr_boot_vga.attr)
1482 		if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1483 			return 0;
1484 
1485 	return a->mode;
1486 }
1487 
1488 static struct attribute *pci_dev_hp_attrs[] = {
1489 	&dev_attr_remove.attr,
1490 	&dev_attr_dev_rescan.attr,
1491 	NULL,
1492 };
1493 
1494 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1495 					    struct attribute *a, int n)
1496 {
1497 	struct device *dev = kobj_to_dev(kobj);
1498 	struct pci_dev *pdev = to_pci_dev(dev);
1499 
1500 	if (pdev->is_virtfn)
1501 		return 0;
1502 
1503 	return a->mode;
1504 }
1505 
1506 static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1507 					    struct attribute *a, int n)
1508 {
1509 	struct device *dev = kobj_to_dev(kobj);
1510 	struct pci_dev *pdev = to_pci_dev(dev);
1511 
1512 	if (pci_is_bridge(pdev))
1513 		return a->mode;
1514 
1515 	return 0;
1516 }
1517 
1518 static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1519 					  struct attribute *a, int n)
1520 {
1521 	struct device *dev = kobj_to_dev(kobj);
1522 	struct pci_dev *pdev = to_pci_dev(dev);
1523 
1524 	if (pci_is_pcie(pdev))
1525 		return a->mode;
1526 
1527 	return 0;
1528 }
1529 
1530 static const struct attribute_group pci_dev_group = {
1531 	.attrs = pci_dev_attrs,
1532 };
1533 
1534 const struct attribute_group *pci_dev_groups[] = {
1535 	&pci_dev_group,
1536 	NULL,
1537 };
1538 
1539 static const struct attribute_group pci_dev_hp_attr_group = {
1540 	.attrs = pci_dev_hp_attrs,
1541 	.is_visible = pci_dev_hp_attrs_are_visible,
1542 };
1543 
1544 static const struct attribute_group pci_dev_attr_group = {
1545 	.attrs = pci_dev_dev_attrs,
1546 	.is_visible = pci_dev_attrs_are_visible,
1547 };
1548 
1549 static const struct attribute_group pci_bridge_attr_group = {
1550 	.attrs = pci_bridge_attrs,
1551 	.is_visible = pci_bridge_attrs_are_visible,
1552 };
1553 
1554 static const struct attribute_group pcie_dev_attr_group = {
1555 	.attrs = pcie_dev_attrs,
1556 	.is_visible = pcie_dev_attrs_are_visible,
1557 };
1558 
1559 static const struct attribute_group *pci_dev_attr_groups[] = {
1560 	&pci_dev_attr_group,
1561 	&pci_dev_hp_attr_group,
1562 #ifdef CONFIG_PCI_IOV
1563 	&sriov_dev_attr_group,
1564 #endif
1565 	&pci_bridge_attr_group,
1566 	&pcie_dev_attr_group,
1567 #ifdef CONFIG_PCIEAER
1568 	&aer_stats_attr_group,
1569 #endif
1570 #ifdef CONFIG_PCIEASPM
1571 	&aspm_ctrl_attr_group,
1572 #endif
1573 	NULL,
1574 };
1575 
1576 const struct device_type pci_dev_type = {
1577 	.groups = pci_dev_attr_groups,
1578 };
1579