1 /* 2 * drivers/pci/pci-sysfs.c 3 * 4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> 5 * (C) Copyright 2002-2004 IBM Corp. 6 * (C) Copyright 2003 Matthew Wilcox 7 * (C) Copyright 2003 Hewlett-Packard 8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> 9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> 10 * 11 * File attributes for PCI devices 12 * 13 * Modeled after usb's driverfs.c 14 * 15 */ 16 17 18 #include <linux/kernel.h> 19 #include <linux/sched.h> 20 #include <linux/pci.h> 21 #include <linux/stat.h> 22 #include <linux/export.h> 23 #include <linux/topology.h> 24 #include <linux/mm.h> 25 #include <linux/fs.h> 26 #include <linux/capability.h> 27 #include <linux/security.h> 28 #include <linux/pci-aspm.h> 29 #include <linux/slab.h> 30 #include <linux/vgaarb.h> 31 #include <linux/pm_runtime.h> 32 #include "pci.h" 33 34 static int sysfs_initialized; /* = 0 */ 35 36 /* show configuration fields */ 37 #define pci_config_attr(field, format_string) \ 38 static ssize_t \ 39 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ 40 { \ 41 struct pci_dev *pdev; \ 42 \ 43 pdev = to_pci_dev (dev); \ 44 return sprintf (buf, format_string, pdev->field); \ 45 } 46 47 pci_config_attr(vendor, "0x%04x\n"); 48 pci_config_attr(device, "0x%04x\n"); 49 pci_config_attr(subsystem_vendor, "0x%04x\n"); 50 pci_config_attr(subsystem_device, "0x%04x\n"); 51 pci_config_attr(class, "0x%06x\n"); 52 pci_config_attr(irq, "%u\n"); 53 54 static ssize_t broken_parity_status_show(struct device *dev, 55 struct device_attribute *attr, 56 char *buf) 57 { 58 struct pci_dev *pdev = to_pci_dev(dev); 59 return sprintf (buf, "%u\n", pdev->broken_parity_status); 60 } 61 62 static ssize_t broken_parity_status_store(struct device *dev, 63 struct device_attribute *attr, 64 const char *buf, size_t count) 65 { 66 struct pci_dev *pdev = to_pci_dev(dev); 67 unsigned long val; 68 69 if (strict_strtoul(buf, 0, &val) < 0) 70 return -EINVAL; 71 72 pdev->broken_parity_status = !!val; 73 74 return count; 75 } 76 77 static ssize_t local_cpus_show(struct device *dev, 78 struct device_attribute *attr, char *buf) 79 { 80 const struct cpumask *mask; 81 int len; 82 83 #ifdef CONFIG_NUMA 84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 85 cpumask_of_node(dev_to_node(dev)); 86 #else 87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 88 #endif 89 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask); 90 buf[len++] = '\n'; 91 buf[len] = '\0'; 92 return len; 93 } 94 95 96 static ssize_t local_cpulist_show(struct device *dev, 97 struct device_attribute *attr, char *buf) 98 { 99 const struct cpumask *mask; 100 int len; 101 102 #ifdef CONFIG_NUMA 103 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 104 cpumask_of_node(dev_to_node(dev)); 105 #else 106 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 107 #endif 108 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask); 109 buf[len++] = '\n'; 110 buf[len] = '\0'; 111 return len; 112 } 113 114 /* 115 * PCI Bus Class Devices 116 */ 117 static ssize_t pci_bus_show_cpuaffinity(struct device *dev, 118 int type, 119 struct device_attribute *attr, 120 char *buf) 121 { 122 int ret; 123 const struct cpumask *cpumask; 124 125 cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 126 ret = type ? 127 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) : 128 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask); 129 buf[ret++] = '\n'; 130 buf[ret] = '\0'; 131 return ret; 132 } 133 134 static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev, 135 struct device_attribute *attr, 136 char *buf) 137 { 138 return pci_bus_show_cpuaffinity(dev, 0, attr, buf); 139 } 140 141 static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev, 142 struct device_attribute *attr, 143 char *buf) 144 { 145 return pci_bus_show_cpuaffinity(dev, 1, attr, buf); 146 } 147 148 /* show resources */ 149 static ssize_t 150 resource_show(struct device * dev, struct device_attribute *attr, char * buf) 151 { 152 struct pci_dev * pci_dev = to_pci_dev(dev); 153 char * str = buf; 154 int i; 155 int max; 156 resource_size_t start, end; 157 158 if (pci_dev->subordinate) 159 max = DEVICE_COUNT_RESOURCE; 160 else 161 max = PCI_BRIDGE_RESOURCES; 162 163 for (i = 0; i < max; i++) { 164 struct resource *res = &pci_dev->resource[i]; 165 pci_resource_to_user(pci_dev, i, res, &start, &end); 166 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n", 167 (unsigned long long)start, 168 (unsigned long long)end, 169 (unsigned long long)res->flags); 170 } 171 return (str - buf); 172 } 173 174 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf) 175 { 176 struct pci_dev *pci_dev = to_pci_dev(dev); 177 178 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n", 179 pci_dev->vendor, pci_dev->device, 180 pci_dev->subsystem_vendor, pci_dev->subsystem_device, 181 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), 182 (u8)(pci_dev->class)); 183 } 184 185 static ssize_t is_enabled_store(struct device *dev, 186 struct device_attribute *attr, const char *buf, 187 size_t count) 188 { 189 struct pci_dev *pdev = to_pci_dev(dev); 190 unsigned long val; 191 ssize_t result = strict_strtoul(buf, 0, &val); 192 193 if (result < 0) 194 return result; 195 196 /* this can crash the machine when done on the "wrong" device */ 197 if (!capable(CAP_SYS_ADMIN)) 198 return -EPERM; 199 200 if (!val) { 201 if (pci_is_enabled(pdev)) 202 pci_disable_device(pdev); 203 else 204 result = -EIO; 205 } else 206 result = pci_enable_device(pdev); 207 208 return result < 0 ? result : count; 209 } 210 211 static ssize_t is_enabled_show(struct device *dev, 212 struct device_attribute *attr, char *buf) 213 { 214 struct pci_dev *pdev; 215 216 pdev = to_pci_dev (dev); 217 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt)); 218 } 219 220 #ifdef CONFIG_NUMA 221 static ssize_t 222 numa_node_show(struct device *dev, struct device_attribute *attr, char *buf) 223 { 224 return sprintf (buf, "%d\n", dev->numa_node); 225 } 226 #endif 227 228 static ssize_t 229 dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf) 230 { 231 struct pci_dev *pdev = to_pci_dev(dev); 232 233 return sprintf (buf, "%d\n", fls64(pdev->dma_mask)); 234 } 235 236 static ssize_t 237 consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr, 238 char *buf) 239 { 240 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask)); 241 } 242 243 static ssize_t 244 msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf) 245 { 246 struct pci_dev *pdev = to_pci_dev(dev); 247 248 if (!pdev->subordinate) 249 return 0; 250 251 return sprintf (buf, "%u\n", 252 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)); 253 } 254 255 static ssize_t 256 msi_bus_store(struct device *dev, struct device_attribute *attr, 257 const char *buf, size_t count) 258 { 259 struct pci_dev *pdev = to_pci_dev(dev); 260 unsigned long val; 261 262 if (strict_strtoul(buf, 0, &val) < 0) 263 return -EINVAL; 264 265 /* bad things may happen if the no_msi flag is changed 266 * while some drivers are loaded */ 267 if (!capable(CAP_SYS_ADMIN)) 268 return -EPERM; 269 270 /* Maybe pci devices without subordinate busses shouldn't even have this 271 * attribute in the first place? */ 272 if (!pdev->subordinate) 273 return count; 274 275 /* Is the flag going to change, or keep the value it already had? */ 276 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^ 277 !!val) { 278 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI; 279 280 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI," 281 " bad things could happen\n", val ? "" : " not"); 282 } 283 284 return count; 285 } 286 287 static DEFINE_MUTEX(pci_remove_rescan_mutex); 288 static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf, 289 size_t count) 290 { 291 unsigned long val; 292 struct pci_bus *b = NULL; 293 294 if (strict_strtoul(buf, 0, &val) < 0) 295 return -EINVAL; 296 297 if (val) { 298 mutex_lock(&pci_remove_rescan_mutex); 299 while ((b = pci_find_next_bus(b)) != NULL) 300 pci_rescan_bus(b); 301 mutex_unlock(&pci_remove_rescan_mutex); 302 } 303 return count; 304 } 305 306 struct bus_attribute pci_bus_attrs[] = { 307 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store), 308 __ATTR_NULL 309 }; 310 311 static ssize_t 312 dev_rescan_store(struct device *dev, struct device_attribute *attr, 313 const char *buf, size_t count) 314 { 315 unsigned long val; 316 struct pci_dev *pdev = to_pci_dev(dev); 317 318 if (strict_strtoul(buf, 0, &val) < 0) 319 return -EINVAL; 320 321 if (val) { 322 mutex_lock(&pci_remove_rescan_mutex); 323 pci_rescan_bus(pdev->bus); 324 mutex_unlock(&pci_remove_rescan_mutex); 325 } 326 return count; 327 } 328 329 static void remove_callback(struct device *dev) 330 { 331 struct pci_dev *pdev = to_pci_dev(dev); 332 333 mutex_lock(&pci_remove_rescan_mutex); 334 pci_stop_and_remove_bus_device(pdev); 335 mutex_unlock(&pci_remove_rescan_mutex); 336 } 337 338 static ssize_t 339 remove_store(struct device *dev, struct device_attribute *dummy, 340 const char *buf, size_t count) 341 { 342 int ret = 0; 343 unsigned long val; 344 345 if (strict_strtoul(buf, 0, &val) < 0) 346 return -EINVAL; 347 348 /* An attribute cannot be unregistered by one of its own methods, 349 * so we have to use this roundabout approach. 350 */ 351 if (val) 352 ret = device_schedule_callback(dev, remove_callback); 353 if (ret) 354 count = ret; 355 return count; 356 } 357 358 static ssize_t 359 dev_bus_rescan_store(struct device *dev, struct device_attribute *attr, 360 const char *buf, size_t count) 361 { 362 unsigned long val; 363 struct pci_bus *bus = to_pci_bus(dev); 364 365 if (strict_strtoul(buf, 0, &val) < 0) 366 return -EINVAL; 367 368 if (val) { 369 mutex_lock(&pci_remove_rescan_mutex); 370 if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) 371 pci_rescan_bus_bridge_resize(bus->self); 372 else 373 pci_rescan_bus(bus); 374 mutex_unlock(&pci_remove_rescan_mutex); 375 } 376 return count; 377 } 378 379 #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI) 380 static ssize_t d3cold_allowed_store(struct device *dev, 381 struct device_attribute *attr, 382 const char *buf, size_t count) 383 { 384 struct pci_dev *pdev = to_pci_dev(dev); 385 unsigned long val; 386 387 if (strict_strtoul(buf, 0, &val) < 0) 388 return -EINVAL; 389 390 pdev->d3cold_allowed = !!val; 391 pm_runtime_resume(dev); 392 393 return count; 394 } 395 396 static ssize_t d3cold_allowed_show(struct device *dev, 397 struct device_attribute *attr, char *buf) 398 { 399 struct pci_dev *pdev = to_pci_dev(dev); 400 return sprintf (buf, "%u\n", pdev->d3cold_allowed); 401 } 402 #endif 403 404 #ifdef CONFIG_PCI_IOV 405 static ssize_t sriov_totalvfs_show(struct device *dev, 406 struct device_attribute *attr, 407 char *buf) 408 { 409 struct pci_dev *pdev = to_pci_dev(dev); 410 411 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev)); 412 } 413 414 415 static ssize_t sriov_numvfs_show(struct device *dev, 416 struct device_attribute *attr, 417 char *buf) 418 { 419 struct pci_dev *pdev = to_pci_dev(dev); 420 421 return sprintf(buf, "%u\n", pdev->sriov->num_VFs); 422 } 423 424 /* 425 * num_vfs > 0; number of VFs to enable 426 * num_vfs = 0; disable all VFs 427 * 428 * Note: SRIOV spec doesn't allow partial VF 429 * disable, so it's all or none. 430 */ 431 static ssize_t sriov_numvfs_store(struct device *dev, 432 struct device_attribute *attr, 433 const char *buf, size_t count) 434 { 435 struct pci_dev *pdev = to_pci_dev(dev); 436 int ret; 437 u16 num_vfs; 438 439 ret = kstrtou16(buf, 0, &num_vfs); 440 if (ret < 0) 441 return ret; 442 443 if (num_vfs > pci_sriov_get_totalvfs(pdev)) 444 return -ERANGE; 445 446 if (num_vfs == pdev->sriov->num_VFs) 447 return count; /* no change */ 448 449 /* is PF driver loaded w/callback */ 450 if (!pdev->driver || !pdev->driver->sriov_configure) { 451 dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n"); 452 return -ENOSYS; 453 } 454 455 if (num_vfs == 0) { 456 /* disable VFs */ 457 ret = pdev->driver->sriov_configure(pdev, 0); 458 if (ret < 0) 459 return ret; 460 return count; 461 } 462 463 /* enable VFs */ 464 if (pdev->sriov->num_VFs) { 465 dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n", 466 pdev->sriov->num_VFs, num_vfs); 467 return -EBUSY; 468 } 469 470 ret = pdev->driver->sriov_configure(pdev, num_vfs); 471 if (ret < 0) 472 return ret; 473 474 if (ret != num_vfs) 475 dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n", 476 num_vfs, ret); 477 478 return count; 479 } 480 481 static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs); 482 static struct device_attribute sriov_numvfs_attr = 483 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP), 484 sriov_numvfs_show, sriov_numvfs_store); 485 #endif /* CONFIG_PCI_IOV */ 486 487 struct device_attribute pci_dev_attrs[] = { 488 __ATTR_RO(resource), 489 __ATTR_RO(vendor), 490 __ATTR_RO(device), 491 __ATTR_RO(subsystem_vendor), 492 __ATTR_RO(subsystem_device), 493 __ATTR_RO(class), 494 __ATTR_RO(irq), 495 __ATTR_RO(local_cpus), 496 __ATTR_RO(local_cpulist), 497 __ATTR_RO(modalias), 498 #ifdef CONFIG_NUMA 499 __ATTR_RO(numa_node), 500 #endif 501 __ATTR_RO(dma_mask_bits), 502 __ATTR_RO(consistent_dma_mask_bits), 503 __ATTR(enable, 0600, is_enabled_show, is_enabled_store), 504 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR), 505 broken_parity_status_show,broken_parity_status_store), 506 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store), 507 __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store), 508 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store), 509 #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI) 510 __ATTR(d3cold_allowed, 0644, d3cold_allowed_show, d3cold_allowed_store), 511 #endif 512 __ATTR_NULL, 513 }; 514 515 struct device_attribute pcibus_dev_attrs[] = { 516 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store), 517 __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL), 518 __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL), 519 __ATTR_NULL, 520 }; 521 522 static ssize_t 523 boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf) 524 { 525 struct pci_dev *pdev = to_pci_dev(dev); 526 struct pci_dev *vga_dev = vga_default_device(); 527 528 if (vga_dev) 529 return sprintf(buf, "%u\n", (pdev == vga_dev)); 530 531 return sprintf(buf, "%u\n", 532 !!(pdev->resource[PCI_ROM_RESOURCE].flags & 533 IORESOURCE_ROM_SHADOW)); 534 } 535 struct device_attribute vga_attr = __ATTR_RO(boot_vga); 536 537 static ssize_t 538 pci_read_config(struct file *filp, struct kobject *kobj, 539 struct bin_attribute *bin_attr, 540 char *buf, loff_t off, size_t count) 541 { 542 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj)); 543 unsigned int size = 64; 544 loff_t init_off = off; 545 u8 *data = (u8*) buf; 546 547 /* Several chips lock up trying to read undefined config space */ 548 if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) { 549 size = dev->cfg_size; 550 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) { 551 size = 128; 552 } 553 554 if (off > size) 555 return 0; 556 if (off + count > size) { 557 size -= off; 558 count = size; 559 } else { 560 size = count; 561 } 562 563 pci_config_pm_runtime_get(dev); 564 565 if ((off & 1) && size) { 566 u8 val; 567 pci_user_read_config_byte(dev, off, &val); 568 data[off - init_off] = val; 569 off++; 570 size--; 571 } 572 573 if ((off & 3) && size > 2) { 574 u16 val; 575 pci_user_read_config_word(dev, off, &val); 576 data[off - init_off] = val & 0xff; 577 data[off - init_off + 1] = (val >> 8) & 0xff; 578 off += 2; 579 size -= 2; 580 } 581 582 while (size > 3) { 583 u32 val; 584 pci_user_read_config_dword(dev, off, &val); 585 data[off - init_off] = val & 0xff; 586 data[off - init_off + 1] = (val >> 8) & 0xff; 587 data[off - init_off + 2] = (val >> 16) & 0xff; 588 data[off - init_off + 3] = (val >> 24) & 0xff; 589 off += 4; 590 size -= 4; 591 } 592 593 if (size >= 2) { 594 u16 val; 595 pci_user_read_config_word(dev, off, &val); 596 data[off - init_off] = val & 0xff; 597 data[off - init_off + 1] = (val >> 8) & 0xff; 598 off += 2; 599 size -= 2; 600 } 601 602 if (size > 0) { 603 u8 val; 604 pci_user_read_config_byte(dev, off, &val); 605 data[off - init_off] = val; 606 off++; 607 --size; 608 } 609 610 pci_config_pm_runtime_put(dev); 611 612 return count; 613 } 614 615 static ssize_t 616 pci_write_config(struct file* filp, struct kobject *kobj, 617 struct bin_attribute *bin_attr, 618 char *buf, loff_t off, size_t count) 619 { 620 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj)); 621 unsigned int size = count; 622 loff_t init_off = off; 623 u8 *data = (u8*) buf; 624 625 if (off > dev->cfg_size) 626 return 0; 627 if (off + count > dev->cfg_size) { 628 size = dev->cfg_size - off; 629 count = size; 630 } 631 632 pci_config_pm_runtime_get(dev); 633 634 if ((off & 1) && size) { 635 pci_user_write_config_byte(dev, off, data[off - init_off]); 636 off++; 637 size--; 638 } 639 640 if ((off & 3) && size > 2) { 641 u16 val = data[off - init_off]; 642 val |= (u16) data[off - init_off + 1] << 8; 643 pci_user_write_config_word(dev, off, val); 644 off += 2; 645 size -= 2; 646 } 647 648 while (size > 3) { 649 u32 val = data[off - init_off]; 650 val |= (u32) data[off - init_off + 1] << 8; 651 val |= (u32) data[off - init_off + 2] << 16; 652 val |= (u32) data[off - init_off + 3] << 24; 653 pci_user_write_config_dword(dev, off, val); 654 off += 4; 655 size -= 4; 656 } 657 658 if (size >= 2) { 659 u16 val = data[off - init_off]; 660 val |= (u16) data[off - init_off + 1] << 8; 661 pci_user_write_config_word(dev, off, val); 662 off += 2; 663 size -= 2; 664 } 665 666 if (size) { 667 pci_user_write_config_byte(dev, off, data[off - init_off]); 668 off++; 669 --size; 670 } 671 672 pci_config_pm_runtime_put(dev); 673 674 return count; 675 } 676 677 static ssize_t 678 read_vpd_attr(struct file *filp, struct kobject *kobj, 679 struct bin_attribute *bin_attr, 680 char *buf, loff_t off, size_t count) 681 { 682 struct pci_dev *dev = 683 to_pci_dev(container_of(kobj, struct device, kobj)); 684 685 if (off > bin_attr->size) 686 count = 0; 687 else if (count > bin_attr->size - off) 688 count = bin_attr->size - off; 689 690 return pci_read_vpd(dev, off, count, buf); 691 } 692 693 static ssize_t 694 write_vpd_attr(struct file *filp, struct kobject *kobj, 695 struct bin_attribute *bin_attr, 696 char *buf, loff_t off, size_t count) 697 { 698 struct pci_dev *dev = 699 to_pci_dev(container_of(kobj, struct device, kobj)); 700 701 if (off > bin_attr->size) 702 count = 0; 703 else if (count > bin_attr->size - off) 704 count = bin_attr->size - off; 705 706 return pci_write_vpd(dev, off, count, buf); 707 } 708 709 #ifdef HAVE_PCI_LEGACY 710 /** 711 * pci_read_legacy_io - read byte(s) from legacy I/O port space 712 * @filp: open sysfs file 713 * @kobj: kobject corresponding to file to read from 714 * @bin_attr: struct bin_attribute for this file 715 * @buf: buffer to store results 716 * @off: offset into legacy I/O port space 717 * @count: number of bytes to read 718 * 719 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific 720 * callback routine (pci_legacy_read). 721 */ 722 static ssize_t 723 pci_read_legacy_io(struct file *filp, struct kobject *kobj, 724 struct bin_attribute *bin_attr, 725 char *buf, loff_t off, size_t count) 726 { 727 struct pci_bus *bus = to_pci_bus(container_of(kobj, 728 struct device, 729 kobj)); 730 731 /* Only support 1, 2 or 4 byte accesses */ 732 if (count != 1 && count != 2 && count != 4) 733 return -EINVAL; 734 735 return pci_legacy_read(bus, off, (u32 *)buf, count); 736 } 737 738 /** 739 * pci_write_legacy_io - write byte(s) to legacy I/O port space 740 * @filp: open sysfs file 741 * @kobj: kobject corresponding to file to read from 742 * @bin_attr: struct bin_attribute for this file 743 * @buf: buffer containing value to be written 744 * @off: offset into legacy I/O port space 745 * @count: number of bytes to write 746 * 747 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific 748 * callback routine (pci_legacy_write). 749 */ 750 static ssize_t 751 pci_write_legacy_io(struct file *filp, struct kobject *kobj, 752 struct bin_attribute *bin_attr, 753 char *buf, loff_t off, size_t count) 754 { 755 struct pci_bus *bus = to_pci_bus(container_of(kobj, 756 struct device, 757 kobj)); 758 /* Only support 1, 2 or 4 byte accesses */ 759 if (count != 1 && count != 2 && count != 4) 760 return -EINVAL; 761 762 return pci_legacy_write(bus, off, *(u32 *)buf, count); 763 } 764 765 /** 766 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space 767 * @filp: open sysfs file 768 * @kobj: kobject corresponding to device to be mapped 769 * @attr: struct bin_attribute for this file 770 * @vma: struct vm_area_struct passed to mmap 771 * 772 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap 773 * legacy memory space (first meg of bus space) into application virtual 774 * memory space. 775 */ 776 static int 777 pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, 778 struct bin_attribute *attr, 779 struct vm_area_struct *vma) 780 { 781 struct pci_bus *bus = to_pci_bus(container_of(kobj, 782 struct device, 783 kobj)); 784 785 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); 786 } 787 788 /** 789 * pci_mmap_legacy_io - map legacy PCI IO into user memory space 790 * @filp: open sysfs file 791 * @kobj: kobject corresponding to device to be mapped 792 * @attr: struct bin_attribute for this file 793 * @vma: struct vm_area_struct passed to mmap 794 * 795 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap 796 * legacy IO space (first meg of bus space) into application virtual 797 * memory space. Returns -ENOSYS if the operation isn't supported 798 */ 799 static int 800 pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, 801 struct bin_attribute *attr, 802 struct vm_area_struct *vma) 803 { 804 struct pci_bus *bus = to_pci_bus(container_of(kobj, 805 struct device, 806 kobj)); 807 808 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); 809 } 810 811 /** 812 * pci_adjust_legacy_attr - adjustment of legacy file attributes 813 * @b: bus to create files under 814 * @mmap_type: I/O port or memory 815 * 816 * Stub implementation. Can be overridden by arch if necessary. 817 */ 818 void __weak 819 pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type) 820 { 821 return; 822 } 823 824 /** 825 * pci_create_legacy_files - create legacy I/O port and memory files 826 * @b: bus to create files under 827 * 828 * Some platforms allow access to legacy I/O port and ISA memory space on 829 * a per-bus basis. This routine creates the files and ties them into 830 * their associated read, write and mmap files from pci-sysfs.c 831 * 832 * On error unwind, but don't propagate the error to the caller 833 * as it is ok to set up the PCI bus without these files. 834 */ 835 void pci_create_legacy_files(struct pci_bus *b) 836 { 837 int error; 838 839 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2, 840 GFP_ATOMIC); 841 if (!b->legacy_io) 842 goto kzalloc_err; 843 844 sysfs_bin_attr_init(b->legacy_io); 845 b->legacy_io->attr.name = "legacy_io"; 846 b->legacy_io->size = 0xffff; 847 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR; 848 b->legacy_io->read = pci_read_legacy_io; 849 b->legacy_io->write = pci_write_legacy_io; 850 b->legacy_io->mmap = pci_mmap_legacy_io; 851 pci_adjust_legacy_attr(b, pci_mmap_io); 852 error = device_create_bin_file(&b->dev, b->legacy_io); 853 if (error) 854 goto legacy_io_err; 855 856 /* Allocated above after the legacy_io struct */ 857 b->legacy_mem = b->legacy_io + 1; 858 sysfs_bin_attr_init(b->legacy_mem); 859 b->legacy_mem->attr.name = "legacy_mem"; 860 b->legacy_mem->size = 1024*1024; 861 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR; 862 b->legacy_mem->mmap = pci_mmap_legacy_mem; 863 pci_adjust_legacy_attr(b, pci_mmap_mem); 864 error = device_create_bin_file(&b->dev, b->legacy_mem); 865 if (error) 866 goto legacy_mem_err; 867 868 return; 869 870 legacy_mem_err: 871 device_remove_bin_file(&b->dev, b->legacy_io); 872 legacy_io_err: 873 kfree(b->legacy_io); 874 b->legacy_io = NULL; 875 kzalloc_err: 876 printk(KERN_WARNING "pci: warning: could not create legacy I/O port " 877 "and ISA memory resources to sysfs\n"); 878 return; 879 } 880 881 void pci_remove_legacy_files(struct pci_bus *b) 882 { 883 if (b->legacy_io) { 884 device_remove_bin_file(&b->dev, b->legacy_io); 885 device_remove_bin_file(&b->dev, b->legacy_mem); 886 kfree(b->legacy_io); /* both are allocated here */ 887 } 888 } 889 #endif /* HAVE_PCI_LEGACY */ 890 891 #ifdef HAVE_PCI_MMAP 892 893 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma, 894 enum pci_mmap_api mmap_api) 895 { 896 unsigned long nr, start, size, pci_start; 897 898 if (pci_resource_len(pdev, resno) == 0) 899 return 0; 900 nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; 901 start = vma->vm_pgoff; 902 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; 903 pci_start = (mmap_api == PCI_MMAP_PROCFS) ? 904 pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0; 905 if (start >= pci_start && start < pci_start + size && 906 start + nr <= pci_start + size) 907 return 1; 908 return 0; 909 } 910 911 /** 912 * pci_mmap_resource - map a PCI resource into user memory space 913 * @kobj: kobject for mapping 914 * @attr: struct bin_attribute for the file being mapped 915 * @vma: struct vm_area_struct passed into the mmap 916 * @write_combine: 1 for write_combine mapping 917 * 918 * Use the regular PCI mapping routines to map a PCI resource into userspace. 919 */ 920 static int 921 pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, 922 struct vm_area_struct *vma, int write_combine) 923 { 924 struct pci_dev *pdev = to_pci_dev(container_of(kobj, 925 struct device, kobj)); 926 struct resource *res = attr->private; 927 enum pci_mmap_state mmap_type; 928 resource_size_t start, end; 929 int i; 930 931 for (i = 0; i < PCI_ROM_RESOURCE; i++) 932 if (res == &pdev->resource[i]) 933 break; 934 if (i >= PCI_ROM_RESOURCE) 935 return -ENODEV; 936 937 if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) { 938 WARN(1, "process \"%s\" tried to map 0x%08lx bytes " 939 "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n", 940 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff, 941 pci_name(pdev), i, 942 (u64)pci_resource_start(pdev, i), 943 (u64)pci_resource_len(pdev, i)); 944 return -EINVAL; 945 } 946 947 /* pci_mmap_page_range() expects the same kind of entry as coming 948 * from /proc/bus/pci/ which is a "user visible" value. If this is 949 * different from the resource itself, arch will do necessary fixup. 950 */ 951 pci_resource_to_user(pdev, i, res, &start, &end); 952 vma->vm_pgoff += start >> PAGE_SHIFT; 953 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; 954 955 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start)) 956 return -EINVAL; 957 958 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine); 959 } 960 961 static int 962 pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, 963 struct bin_attribute *attr, 964 struct vm_area_struct *vma) 965 { 966 return pci_mmap_resource(kobj, attr, vma, 0); 967 } 968 969 static int 970 pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, 971 struct bin_attribute *attr, 972 struct vm_area_struct *vma) 973 { 974 return pci_mmap_resource(kobj, attr, vma, 1); 975 } 976 977 static ssize_t 978 pci_resource_io(struct file *filp, struct kobject *kobj, 979 struct bin_attribute *attr, char *buf, 980 loff_t off, size_t count, bool write) 981 { 982 struct pci_dev *pdev = to_pci_dev(container_of(kobj, 983 struct device, kobj)); 984 struct resource *res = attr->private; 985 unsigned long port = off; 986 int i; 987 988 for (i = 0; i < PCI_ROM_RESOURCE; i++) 989 if (res == &pdev->resource[i]) 990 break; 991 if (i >= PCI_ROM_RESOURCE) 992 return -ENODEV; 993 994 port += pci_resource_start(pdev, i); 995 996 if (port > pci_resource_end(pdev, i)) 997 return 0; 998 999 if (port + count - 1 > pci_resource_end(pdev, i)) 1000 return -EINVAL; 1001 1002 switch (count) { 1003 case 1: 1004 if (write) 1005 outb(*(u8 *)buf, port); 1006 else 1007 *(u8 *)buf = inb(port); 1008 return 1; 1009 case 2: 1010 if (write) 1011 outw(*(u16 *)buf, port); 1012 else 1013 *(u16 *)buf = inw(port); 1014 return 2; 1015 case 4: 1016 if (write) 1017 outl(*(u32 *)buf, port); 1018 else 1019 *(u32 *)buf = inl(port); 1020 return 4; 1021 } 1022 return -EINVAL; 1023 } 1024 1025 static ssize_t 1026 pci_read_resource_io(struct file *filp, struct kobject *kobj, 1027 struct bin_attribute *attr, char *buf, 1028 loff_t off, size_t count) 1029 { 1030 return pci_resource_io(filp, kobj, attr, buf, off, count, false); 1031 } 1032 1033 static ssize_t 1034 pci_write_resource_io(struct file *filp, struct kobject *kobj, 1035 struct bin_attribute *attr, char *buf, 1036 loff_t off, size_t count) 1037 { 1038 return pci_resource_io(filp, kobj, attr, buf, off, count, true); 1039 } 1040 1041 /** 1042 * pci_remove_resource_files - cleanup resource files 1043 * @pdev: dev to cleanup 1044 * 1045 * If we created resource files for @pdev, remove them from sysfs and 1046 * free their resources. 1047 */ 1048 static void 1049 pci_remove_resource_files(struct pci_dev *pdev) 1050 { 1051 int i; 1052 1053 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1054 struct bin_attribute *res_attr; 1055 1056 res_attr = pdev->res_attr[i]; 1057 if (res_attr) { 1058 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1059 kfree(res_attr); 1060 } 1061 1062 res_attr = pdev->res_attr_wc[i]; 1063 if (res_attr) { 1064 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1065 kfree(res_attr); 1066 } 1067 } 1068 } 1069 1070 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) 1071 { 1072 /* allocate attribute structure, piggyback attribute name */ 1073 int name_len = write_combine ? 13 : 10; 1074 struct bin_attribute *res_attr; 1075 int retval; 1076 1077 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); 1078 if (res_attr) { 1079 char *res_attr_name = (char *)(res_attr + 1); 1080 1081 sysfs_bin_attr_init(res_attr); 1082 if (write_combine) { 1083 pdev->res_attr_wc[num] = res_attr; 1084 sprintf(res_attr_name, "resource%d_wc", num); 1085 res_attr->mmap = pci_mmap_resource_wc; 1086 } else { 1087 pdev->res_attr[num] = res_attr; 1088 sprintf(res_attr_name, "resource%d", num); 1089 res_attr->mmap = pci_mmap_resource_uc; 1090 } 1091 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { 1092 res_attr->read = pci_read_resource_io; 1093 res_attr->write = pci_write_resource_io; 1094 } 1095 res_attr->attr.name = res_attr_name; 1096 res_attr->attr.mode = S_IRUSR | S_IWUSR; 1097 res_attr->size = pci_resource_len(pdev, num); 1098 res_attr->private = &pdev->resource[num]; 1099 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); 1100 } else 1101 retval = -ENOMEM; 1102 1103 return retval; 1104 } 1105 1106 /** 1107 * pci_create_resource_files - create resource files in sysfs for @dev 1108 * @pdev: dev in question 1109 * 1110 * Walk the resources in @pdev creating files for each resource available. 1111 */ 1112 static int pci_create_resource_files(struct pci_dev *pdev) 1113 { 1114 int i; 1115 int retval; 1116 1117 /* Expose the PCI resources from this device as files */ 1118 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1119 1120 /* skip empty resources */ 1121 if (!pci_resource_len(pdev, i)) 1122 continue; 1123 1124 retval = pci_create_attr(pdev, i, 0); 1125 /* for prefetchable resources, create a WC mappable file */ 1126 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH) 1127 retval = pci_create_attr(pdev, i, 1); 1128 1129 if (retval) { 1130 pci_remove_resource_files(pdev); 1131 return retval; 1132 } 1133 } 1134 return 0; 1135 } 1136 #else /* !HAVE_PCI_MMAP */ 1137 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } 1138 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } 1139 #endif /* HAVE_PCI_MMAP */ 1140 1141 /** 1142 * pci_write_rom - used to enable access to the PCI ROM display 1143 * @filp: sysfs file 1144 * @kobj: kernel object handle 1145 * @bin_attr: struct bin_attribute for this file 1146 * @buf: user input 1147 * @off: file offset 1148 * @count: number of byte in input 1149 * 1150 * writing anything except 0 enables it 1151 */ 1152 static ssize_t 1153 pci_write_rom(struct file *filp, struct kobject *kobj, 1154 struct bin_attribute *bin_attr, 1155 char *buf, loff_t off, size_t count) 1156 { 1157 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); 1158 1159 if ((off == 0) && (*buf == '0') && (count == 2)) 1160 pdev->rom_attr_enabled = 0; 1161 else 1162 pdev->rom_attr_enabled = 1; 1163 1164 return count; 1165 } 1166 1167 /** 1168 * pci_read_rom - read a PCI ROM 1169 * @filp: sysfs file 1170 * @kobj: kernel object handle 1171 * @bin_attr: struct bin_attribute for this file 1172 * @buf: where to put the data we read from the ROM 1173 * @off: file offset 1174 * @count: number of bytes to read 1175 * 1176 * Put @count bytes starting at @off into @buf from the ROM in the PCI 1177 * device corresponding to @kobj. 1178 */ 1179 static ssize_t 1180 pci_read_rom(struct file *filp, struct kobject *kobj, 1181 struct bin_attribute *bin_attr, 1182 char *buf, loff_t off, size_t count) 1183 { 1184 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); 1185 void __iomem *rom; 1186 size_t size; 1187 1188 if (!pdev->rom_attr_enabled) 1189 return -EINVAL; 1190 1191 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ 1192 if (!rom || !size) 1193 return -EIO; 1194 1195 if (off >= size) 1196 count = 0; 1197 else { 1198 if (off + count > size) 1199 count = size - off; 1200 1201 memcpy_fromio(buf, rom + off, count); 1202 } 1203 pci_unmap_rom(pdev, rom); 1204 1205 return count; 1206 } 1207 1208 static struct bin_attribute pci_config_attr = { 1209 .attr = { 1210 .name = "config", 1211 .mode = S_IRUGO | S_IWUSR, 1212 }, 1213 .size = PCI_CFG_SPACE_SIZE, 1214 .read = pci_read_config, 1215 .write = pci_write_config, 1216 }; 1217 1218 static struct bin_attribute pcie_config_attr = { 1219 .attr = { 1220 .name = "config", 1221 .mode = S_IRUGO | S_IWUSR, 1222 }, 1223 .size = PCI_CFG_SPACE_EXP_SIZE, 1224 .read = pci_read_config, 1225 .write = pci_write_config, 1226 }; 1227 1228 int __weak pcibios_add_platform_entries(struct pci_dev *dev) 1229 { 1230 return 0; 1231 } 1232 1233 static ssize_t reset_store(struct device *dev, 1234 struct device_attribute *attr, const char *buf, 1235 size_t count) 1236 { 1237 struct pci_dev *pdev = to_pci_dev(dev); 1238 unsigned long val; 1239 ssize_t result = strict_strtoul(buf, 0, &val); 1240 1241 if (result < 0) 1242 return result; 1243 1244 if (val != 1) 1245 return -EINVAL; 1246 1247 result = pci_reset_function(pdev); 1248 if (result < 0) 1249 return result; 1250 1251 return count; 1252 } 1253 1254 static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store); 1255 1256 static int pci_create_capabilities_sysfs(struct pci_dev *dev) 1257 { 1258 int retval; 1259 struct bin_attribute *attr; 1260 1261 /* If the device has VPD, try to expose it in sysfs. */ 1262 if (dev->vpd) { 1263 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1264 if (!attr) 1265 return -ENOMEM; 1266 1267 sysfs_bin_attr_init(attr); 1268 attr->size = dev->vpd->len; 1269 attr->attr.name = "vpd"; 1270 attr->attr.mode = S_IRUSR | S_IWUSR; 1271 attr->read = read_vpd_attr; 1272 attr->write = write_vpd_attr; 1273 retval = sysfs_create_bin_file(&dev->dev.kobj, attr); 1274 if (retval) { 1275 kfree(attr); 1276 return retval; 1277 } 1278 dev->vpd->attr = attr; 1279 } 1280 1281 /* Active State Power Management */ 1282 pcie_aspm_create_sysfs_dev_files(dev); 1283 1284 if (!pci_probe_reset_function(dev)) { 1285 retval = device_create_file(&dev->dev, &reset_attr); 1286 if (retval) 1287 goto error; 1288 dev->reset_fn = 1; 1289 } 1290 return 0; 1291 1292 error: 1293 pcie_aspm_remove_sysfs_dev_files(dev); 1294 if (dev->vpd && dev->vpd->attr) { 1295 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1296 kfree(dev->vpd->attr); 1297 } 1298 1299 return retval; 1300 } 1301 1302 int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev) 1303 { 1304 int retval; 1305 int rom_size = 0; 1306 struct bin_attribute *attr; 1307 1308 if (!sysfs_initialized) 1309 return -EACCES; 1310 1311 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) 1312 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr); 1313 else 1314 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1315 if (retval) 1316 goto err; 1317 1318 retval = pci_create_resource_files(pdev); 1319 if (retval) 1320 goto err_config_file; 1321 1322 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) 1323 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1324 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW) 1325 rom_size = 0x20000; 1326 1327 /* If the device has a ROM, try to expose it in sysfs. */ 1328 if (rom_size) { 1329 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1330 if (!attr) { 1331 retval = -ENOMEM; 1332 goto err_resource_files; 1333 } 1334 sysfs_bin_attr_init(attr); 1335 attr->size = rom_size; 1336 attr->attr.name = "rom"; 1337 attr->attr.mode = S_IRUSR | S_IWUSR; 1338 attr->read = pci_read_rom; 1339 attr->write = pci_write_rom; 1340 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr); 1341 if (retval) { 1342 kfree(attr); 1343 goto err_resource_files; 1344 } 1345 pdev->rom_attr = attr; 1346 } 1347 1348 /* add platform-specific attributes */ 1349 retval = pcibios_add_platform_entries(pdev); 1350 if (retval) 1351 goto err_rom_file; 1352 1353 /* add sysfs entries for various capabilities */ 1354 retval = pci_create_capabilities_sysfs(pdev); 1355 if (retval) 1356 goto err_rom_file; 1357 1358 pci_create_firmware_label_files(pdev); 1359 1360 return 0; 1361 1362 err_rom_file: 1363 if (rom_size) { 1364 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1365 kfree(pdev->rom_attr); 1366 pdev->rom_attr = NULL; 1367 } 1368 err_resource_files: 1369 pci_remove_resource_files(pdev); 1370 err_config_file: 1371 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) 1372 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1373 else 1374 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1375 err: 1376 return retval; 1377 } 1378 1379 static void pci_remove_capabilities_sysfs(struct pci_dev *dev) 1380 { 1381 if (dev->vpd && dev->vpd->attr) { 1382 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1383 kfree(dev->vpd->attr); 1384 } 1385 1386 pcie_aspm_remove_sysfs_dev_files(dev); 1387 if (dev->reset_fn) { 1388 device_remove_file(&dev->dev, &reset_attr); 1389 dev->reset_fn = 0; 1390 } 1391 } 1392 1393 /** 1394 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files 1395 * @pdev: device whose entries we should free 1396 * 1397 * Cleanup when @pdev is removed from sysfs. 1398 */ 1399 void pci_remove_sysfs_dev_files(struct pci_dev *pdev) 1400 { 1401 int rom_size = 0; 1402 1403 if (!sysfs_initialized) 1404 return; 1405 1406 pci_remove_capabilities_sysfs(pdev); 1407 1408 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) 1409 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1410 else 1411 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1412 1413 pci_remove_resource_files(pdev); 1414 1415 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) 1416 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1417 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW) 1418 rom_size = 0x20000; 1419 1420 if (rom_size && pdev->rom_attr) { 1421 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1422 kfree(pdev->rom_attr); 1423 } 1424 1425 pci_remove_firmware_label_files(pdev); 1426 1427 } 1428 1429 static int __init pci_sysfs_init(void) 1430 { 1431 struct pci_dev *pdev = NULL; 1432 int retval; 1433 1434 sysfs_initialized = 1; 1435 for_each_pci_dev(pdev) { 1436 retval = pci_create_sysfs_dev_files(pdev); 1437 if (retval) { 1438 pci_dev_put(pdev); 1439 return retval; 1440 } 1441 } 1442 1443 return 0; 1444 } 1445 1446 late_initcall(pci_sysfs_init); 1447 1448 static struct attribute *pci_dev_dev_attrs[] = { 1449 &vga_attr.attr, 1450 NULL, 1451 }; 1452 1453 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj, 1454 struct attribute *a, int n) 1455 { 1456 struct device *dev = container_of(kobj, struct device, kobj); 1457 struct pci_dev *pdev = to_pci_dev(dev); 1458 1459 if (a == &vga_attr.attr) 1460 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) 1461 return 0; 1462 1463 return a->mode; 1464 } 1465 1466 #ifdef CONFIG_PCI_IOV 1467 static struct attribute *sriov_dev_attrs[] = { 1468 &sriov_totalvfs_attr.attr, 1469 &sriov_numvfs_attr.attr, 1470 NULL, 1471 }; 1472 1473 static umode_t sriov_attrs_are_visible(struct kobject *kobj, 1474 struct attribute *a, int n) 1475 { 1476 struct device *dev = container_of(kobj, struct device, kobj); 1477 1478 if (!dev_is_pf(dev)) 1479 return 0; 1480 1481 return a->mode; 1482 } 1483 1484 static struct attribute_group sriov_dev_attr_group = { 1485 .attrs = sriov_dev_attrs, 1486 .is_visible = sriov_attrs_are_visible, 1487 }; 1488 #endif /* CONFIG_PCI_IOV */ 1489 1490 static struct attribute_group pci_dev_attr_group = { 1491 .attrs = pci_dev_dev_attrs, 1492 .is_visible = pci_dev_attrs_are_visible, 1493 }; 1494 1495 static const struct attribute_group *pci_dev_attr_groups[] = { 1496 &pci_dev_attr_group, 1497 #ifdef CONFIG_PCI_IOV 1498 &sriov_dev_attr_group, 1499 #endif 1500 NULL, 1501 }; 1502 1503 struct device_type pci_dev_type = { 1504 .groups = pci_dev_attr_groups, 1505 }; 1506