1 /* 2 * drivers/pci/pci-sysfs.c 3 * 4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> 5 * (C) Copyright 2002-2004 IBM Corp. 6 * (C) Copyright 2003 Matthew Wilcox 7 * (C) Copyright 2003 Hewlett-Packard 8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> 9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> 10 * 11 * File attributes for PCI devices 12 * 13 * Modeled after usb's driverfs.c 14 * 15 */ 16 17 18 #include <linux/kernel.h> 19 #include <linux/sched.h> 20 #include <linux/pci.h> 21 #include <linux/stat.h> 22 #include <linux/export.h> 23 #include <linux/topology.h> 24 #include <linux/mm.h> 25 #include <linux/fs.h> 26 #include <linux/capability.h> 27 #include <linux/security.h> 28 #include <linux/pci-aspm.h> 29 #include <linux/slab.h> 30 #include <linux/vgaarb.h> 31 #include <linux/pm_runtime.h> 32 #include "pci.h" 33 34 static int sysfs_initialized; /* = 0 */ 35 36 /* show configuration fields */ 37 #define pci_config_attr(field, format_string) \ 38 static ssize_t \ 39 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ 40 { \ 41 struct pci_dev *pdev; \ 42 \ 43 pdev = to_pci_dev (dev); \ 44 return sprintf (buf, format_string, pdev->field); \ 45 } 46 47 pci_config_attr(vendor, "0x%04x\n"); 48 pci_config_attr(device, "0x%04x\n"); 49 pci_config_attr(subsystem_vendor, "0x%04x\n"); 50 pci_config_attr(subsystem_device, "0x%04x\n"); 51 pci_config_attr(class, "0x%06x\n"); 52 pci_config_attr(irq, "%u\n"); 53 54 static ssize_t broken_parity_status_show(struct device *dev, 55 struct device_attribute *attr, 56 char *buf) 57 { 58 struct pci_dev *pdev = to_pci_dev(dev); 59 return sprintf (buf, "%u\n", pdev->broken_parity_status); 60 } 61 62 static ssize_t broken_parity_status_store(struct device *dev, 63 struct device_attribute *attr, 64 const char *buf, size_t count) 65 { 66 struct pci_dev *pdev = to_pci_dev(dev); 67 unsigned long val; 68 69 if (strict_strtoul(buf, 0, &val) < 0) 70 return -EINVAL; 71 72 pdev->broken_parity_status = !!val; 73 74 return count; 75 } 76 77 static ssize_t local_cpus_show(struct device *dev, 78 struct device_attribute *attr, char *buf) 79 { 80 const struct cpumask *mask; 81 int len; 82 83 #ifdef CONFIG_NUMA 84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 85 cpumask_of_node(dev_to_node(dev)); 86 #else 87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 88 #endif 89 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask); 90 buf[len++] = '\n'; 91 buf[len] = '\0'; 92 return len; 93 } 94 95 96 static ssize_t local_cpulist_show(struct device *dev, 97 struct device_attribute *attr, char *buf) 98 { 99 const struct cpumask *mask; 100 int len; 101 102 #ifdef CONFIG_NUMA 103 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 104 cpumask_of_node(dev_to_node(dev)); 105 #else 106 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 107 #endif 108 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask); 109 buf[len++] = '\n'; 110 buf[len] = '\0'; 111 return len; 112 } 113 114 /* 115 * PCI Bus Class Devices 116 */ 117 static ssize_t pci_bus_show_cpuaffinity(struct device *dev, 118 int type, 119 struct device_attribute *attr, 120 char *buf) 121 { 122 int ret; 123 const struct cpumask *cpumask; 124 125 cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 126 ret = type ? 127 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) : 128 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask); 129 buf[ret++] = '\n'; 130 buf[ret] = '\0'; 131 return ret; 132 } 133 134 static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev, 135 struct device_attribute *attr, 136 char *buf) 137 { 138 return pci_bus_show_cpuaffinity(dev, 0, attr, buf); 139 } 140 141 static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev, 142 struct device_attribute *attr, 143 char *buf) 144 { 145 return pci_bus_show_cpuaffinity(dev, 1, attr, buf); 146 } 147 148 /* show resources */ 149 static ssize_t 150 resource_show(struct device * dev, struct device_attribute *attr, char * buf) 151 { 152 struct pci_dev * pci_dev = to_pci_dev(dev); 153 char * str = buf; 154 int i; 155 int max; 156 resource_size_t start, end; 157 158 if (pci_dev->subordinate) 159 max = DEVICE_COUNT_RESOURCE; 160 else 161 max = PCI_BRIDGE_RESOURCES; 162 163 for (i = 0; i < max; i++) { 164 struct resource *res = &pci_dev->resource[i]; 165 pci_resource_to_user(pci_dev, i, res, &start, &end); 166 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n", 167 (unsigned long long)start, 168 (unsigned long long)end, 169 (unsigned long long)res->flags); 170 } 171 return (str - buf); 172 } 173 174 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf) 175 { 176 struct pci_dev *pci_dev = to_pci_dev(dev); 177 178 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n", 179 pci_dev->vendor, pci_dev->device, 180 pci_dev->subsystem_vendor, pci_dev->subsystem_device, 181 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), 182 (u8)(pci_dev->class)); 183 } 184 185 static ssize_t is_enabled_store(struct device *dev, 186 struct device_attribute *attr, const char *buf, 187 size_t count) 188 { 189 struct pci_dev *pdev = to_pci_dev(dev); 190 unsigned long val; 191 ssize_t result = strict_strtoul(buf, 0, &val); 192 193 if (result < 0) 194 return result; 195 196 /* this can crash the machine when done on the "wrong" device */ 197 if (!capable(CAP_SYS_ADMIN)) 198 return -EPERM; 199 200 if (!val) { 201 if (pci_is_enabled(pdev)) 202 pci_disable_device(pdev); 203 else 204 result = -EIO; 205 } else 206 result = pci_enable_device(pdev); 207 208 return result < 0 ? result : count; 209 } 210 211 static ssize_t is_enabled_show(struct device *dev, 212 struct device_attribute *attr, char *buf) 213 { 214 struct pci_dev *pdev; 215 216 pdev = to_pci_dev (dev); 217 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt)); 218 } 219 220 #ifdef CONFIG_NUMA 221 static ssize_t 222 numa_node_show(struct device *dev, struct device_attribute *attr, char *buf) 223 { 224 return sprintf (buf, "%d\n", dev->numa_node); 225 } 226 #endif 227 228 static ssize_t 229 dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf) 230 { 231 struct pci_dev *pdev = to_pci_dev(dev); 232 233 return sprintf (buf, "%d\n", fls64(pdev->dma_mask)); 234 } 235 236 static ssize_t 237 consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr, 238 char *buf) 239 { 240 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask)); 241 } 242 243 static ssize_t 244 msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf) 245 { 246 struct pci_dev *pdev = to_pci_dev(dev); 247 248 if (!pdev->subordinate) 249 return 0; 250 251 return sprintf (buf, "%u\n", 252 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)); 253 } 254 255 static ssize_t 256 msi_bus_store(struct device *dev, struct device_attribute *attr, 257 const char *buf, size_t count) 258 { 259 struct pci_dev *pdev = to_pci_dev(dev); 260 unsigned long val; 261 262 if (strict_strtoul(buf, 0, &val) < 0) 263 return -EINVAL; 264 265 /* bad things may happen if the no_msi flag is changed 266 * while some drivers are loaded */ 267 if (!capable(CAP_SYS_ADMIN)) 268 return -EPERM; 269 270 /* Maybe pci devices without subordinate busses shouldn't even have this 271 * attribute in the first place? */ 272 if (!pdev->subordinate) 273 return count; 274 275 /* Is the flag going to change, or keep the value it already had? */ 276 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^ 277 !!val) { 278 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI; 279 280 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI," 281 " bad things could happen\n", val ? "" : " not"); 282 } 283 284 return count; 285 } 286 287 #ifdef CONFIG_HOTPLUG 288 static DEFINE_MUTEX(pci_remove_rescan_mutex); 289 static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf, 290 size_t count) 291 { 292 unsigned long val; 293 struct pci_bus *b = NULL; 294 295 if (strict_strtoul(buf, 0, &val) < 0) 296 return -EINVAL; 297 298 if (val) { 299 mutex_lock(&pci_remove_rescan_mutex); 300 while ((b = pci_find_next_bus(b)) != NULL) 301 pci_rescan_bus(b); 302 mutex_unlock(&pci_remove_rescan_mutex); 303 } 304 return count; 305 } 306 307 struct bus_attribute pci_bus_attrs[] = { 308 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store), 309 __ATTR_NULL 310 }; 311 312 static ssize_t 313 dev_rescan_store(struct device *dev, struct device_attribute *attr, 314 const char *buf, size_t count) 315 { 316 unsigned long val; 317 struct pci_dev *pdev = to_pci_dev(dev); 318 319 if (strict_strtoul(buf, 0, &val) < 0) 320 return -EINVAL; 321 322 if (val) { 323 mutex_lock(&pci_remove_rescan_mutex); 324 pci_rescan_bus(pdev->bus); 325 mutex_unlock(&pci_remove_rescan_mutex); 326 } 327 return count; 328 } 329 330 static void remove_callback(struct device *dev) 331 { 332 struct pci_dev *pdev = to_pci_dev(dev); 333 334 mutex_lock(&pci_remove_rescan_mutex); 335 pci_stop_and_remove_bus_device(pdev); 336 mutex_unlock(&pci_remove_rescan_mutex); 337 } 338 339 static ssize_t 340 remove_store(struct device *dev, struct device_attribute *dummy, 341 const char *buf, size_t count) 342 { 343 int ret = 0; 344 unsigned long val; 345 346 if (strict_strtoul(buf, 0, &val) < 0) 347 return -EINVAL; 348 349 /* An attribute cannot be unregistered by one of its own methods, 350 * so we have to use this roundabout approach. 351 */ 352 if (val) 353 ret = device_schedule_callback(dev, remove_callback); 354 if (ret) 355 count = ret; 356 return count; 357 } 358 359 static ssize_t 360 dev_bus_rescan_store(struct device *dev, struct device_attribute *attr, 361 const char *buf, size_t count) 362 { 363 unsigned long val; 364 struct pci_bus *bus = to_pci_bus(dev); 365 366 if (strict_strtoul(buf, 0, &val) < 0) 367 return -EINVAL; 368 369 if (val) { 370 mutex_lock(&pci_remove_rescan_mutex); 371 if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) 372 pci_rescan_bus_bridge_resize(bus->self); 373 else 374 pci_rescan_bus(bus); 375 mutex_unlock(&pci_remove_rescan_mutex); 376 } 377 return count; 378 } 379 380 #endif 381 382 #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI) 383 static ssize_t d3cold_allowed_store(struct device *dev, 384 struct device_attribute *attr, 385 const char *buf, size_t count) 386 { 387 struct pci_dev *pdev = to_pci_dev(dev); 388 unsigned long val; 389 390 if (strict_strtoul(buf, 0, &val) < 0) 391 return -EINVAL; 392 393 pdev->d3cold_allowed = !!val; 394 pm_runtime_resume(dev); 395 396 return count; 397 } 398 399 static ssize_t d3cold_allowed_show(struct device *dev, 400 struct device_attribute *attr, char *buf) 401 { 402 struct pci_dev *pdev = to_pci_dev(dev); 403 return sprintf (buf, "%u\n", pdev->d3cold_allowed); 404 } 405 #endif 406 407 struct device_attribute pci_dev_attrs[] = { 408 __ATTR_RO(resource), 409 __ATTR_RO(vendor), 410 __ATTR_RO(device), 411 __ATTR_RO(subsystem_vendor), 412 __ATTR_RO(subsystem_device), 413 __ATTR_RO(class), 414 __ATTR_RO(irq), 415 __ATTR_RO(local_cpus), 416 __ATTR_RO(local_cpulist), 417 __ATTR_RO(modalias), 418 #ifdef CONFIG_NUMA 419 __ATTR_RO(numa_node), 420 #endif 421 __ATTR_RO(dma_mask_bits), 422 __ATTR_RO(consistent_dma_mask_bits), 423 __ATTR(enable, 0600, is_enabled_show, is_enabled_store), 424 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR), 425 broken_parity_status_show,broken_parity_status_store), 426 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store), 427 #ifdef CONFIG_HOTPLUG 428 __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store), 429 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store), 430 #endif 431 #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI) 432 __ATTR(d3cold_allowed, 0644, d3cold_allowed_show, d3cold_allowed_store), 433 #endif 434 __ATTR_NULL, 435 }; 436 437 struct device_attribute pcibus_dev_attrs[] = { 438 #ifdef CONFIG_HOTPLUG 439 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store), 440 #endif 441 __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL), 442 __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL), 443 __ATTR_NULL, 444 }; 445 446 static ssize_t 447 boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf) 448 { 449 struct pci_dev *pdev = to_pci_dev(dev); 450 struct pci_dev *vga_dev = vga_default_device(); 451 452 if (vga_dev) 453 return sprintf(buf, "%u\n", (pdev == vga_dev)); 454 455 return sprintf(buf, "%u\n", 456 !!(pdev->resource[PCI_ROM_RESOURCE].flags & 457 IORESOURCE_ROM_SHADOW)); 458 } 459 struct device_attribute vga_attr = __ATTR_RO(boot_vga); 460 461 static ssize_t 462 pci_read_config(struct file *filp, struct kobject *kobj, 463 struct bin_attribute *bin_attr, 464 char *buf, loff_t off, size_t count) 465 { 466 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj)); 467 unsigned int size = 64; 468 loff_t init_off = off; 469 u8 *data = (u8*) buf; 470 471 /* Several chips lock up trying to read undefined config space */ 472 if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) { 473 size = dev->cfg_size; 474 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) { 475 size = 128; 476 } 477 478 if (off > size) 479 return 0; 480 if (off + count > size) { 481 size -= off; 482 count = size; 483 } else { 484 size = count; 485 } 486 487 pci_config_pm_runtime_get(dev); 488 489 if ((off & 1) && size) { 490 u8 val; 491 pci_user_read_config_byte(dev, off, &val); 492 data[off - init_off] = val; 493 off++; 494 size--; 495 } 496 497 if ((off & 3) && size > 2) { 498 u16 val; 499 pci_user_read_config_word(dev, off, &val); 500 data[off - init_off] = val & 0xff; 501 data[off - init_off + 1] = (val >> 8) & 0xff; 502 off += 2; 503 size -= 2; 504 } 505 506 while (size > 3) { 507 u32 val; 508 pci_user_read_config_dword(dev, off, &val); 509 data[off - init_off] = val & 0xff; 510 data[off - init_off + 1] = (val >> 8) & 0xff; 511 data[off - init_off + 2] = (val >> 16) & 0xff; 512 data[off - init_off + 3] = (val >> 24) & 0xff; 513 off += 4; 514 size -= 4; 515 } 516 517 if (size >= 2) { 518 u16 val; 519 pci_user_read_config_word(dev, off, &val); 520 data[off - init_off] = val & 0xff; 521 data[off - init_off + 1] = (val >> 8) & 0xff; 522 off += 2; 523 size -= 2; 524 } 525 526 if (size > 0) { 527 u8 val; 528 pci_user_read_config_byte(dev, off, &val); 529 data[off - init_off] = val; 530 off++; 531 --size; 532 } 533 534 pci_config_pm_runtime_put(dev); 535 536 return count; 537 } 538 539 static ssize_t 540 pci_write_config(struct file* filp, struct kobject *kobj, 541 struct bin_attribute *bin_attr, 542 char *buf, loff_t off, size_t count) 543 { 544 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj)); 545 unsigned int size = count; 546 loff_t init_off = off; 547 u8 *data = (u8*) buf; 548 549 if (off > dev->cfg_size) 550 return 0; 551 if (off + count > dev->cfg_size) { 552 size = dev->cfg_size - off; 553 count = size; 554 } 555 556 pci_config_pm_runtime_get(dev); 557 558 if ((off & 1) && size) { 559 pci_user_write_config_byte(dev, off, data[off - init_off]); 560 off++; 561 size--; 562 } 563 564 if ((off & 3) && size > 2) { 565 u16 val = data[off - init_off]; 566 val |= (u16) data[off - init_off + 1] << 8; 567 pci_user_write_config_word(dev, off, val); 568 off += 2; 569 size -= 2; 570 } 571 572 while (size > 3) { 573 u32 val = data[off - init_off]; 574 val |= (u32) data[off - init_off + 1] << 8; 575 val |= (u32) data[off - init_off + 2] << 16; 576 val |= (u32) data[off - init_off + 3] << 24; 577 pci_user_write_config_dword(dev, off, val); 578 off += 4; 579 size -= 4; 580 } 581 582 if (size >= 2) { 583 u16 val = data[off - init_off]; 584 val |= (u16) data[off - init_off + 1] << 8; 585 pci_user_write_config_word(dev, off, val); 586 off += 2; 587 size -= 2; 588 } 589 590 if (size) { 591 pci_user_write_config_byte(dev, off, data[off - init_off]); 592 off++; 593 --size; 594 } 595 596 pci_config_pm_runtime_put(dev); 597 598 return count; 599 } 600 601 static ssize_t 602 read_vpd_attr(struct file *filp, struct kobject *kobj, 603 struct bin_attribute *bin_attr, 604 char *buf, loff_t off, size_t count) 605 { 606 struct pci_dev *dev = 607 to_pci_dev(container_of(kobj, struct device, kobj)); 608 609 if (off > bin_attr->size) 610 count = 0; 611 else if (count > bin_attr->size - off) 612 count = bin_attr->size - off; 613 614 return pci_read_vpd(dev, off, count, buf); 615 } 616 617 static ssize_t 618 write_vpd_attr(struct file *filp, struct kobject *kobj, 619 struct bin_attribute *bin_attr, 620 char *buf, loff_t off, size_t count) 621 { 622 struct pci_dev *dev = 623 to_pci_dev(container_of(kobj, struct device, kobj)); 624 625 if (off > bin_attr->size) 626 count = 0; 627 else if (count > bin_attr->size - off) 628 count = bin_attr->size - off; 629 630 return pci_write_vpd(dev, off, count, buf); 631 } 632 633 #ifdef HAVE_PCI_LEGACY 634 /** 635 * pci_read_legacy_io - read byte(s) from legacy I/O port space 636 * @filp: open sysfs file 637 * @kobj: kobject corresponding to file to read from 638 * @bin_attr: struct bin_attribute for this file 639 * @buf: buffer to store results 640 * @off: offset into legacy I/O port space 641 * @count: number of bytes to read 642 * 643 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific 644 * callback routine (pci_legacy_read). 645 */ 646 static ssize_t 647 pci_read_legacy_io(struct file *filp, struct kobject *kobj, 648 struct bin_attribute *bin_attr, 649 char *buf, loff_t off, size_t count) 650 { 651 struct pci_bus *bus = to_pci_bus(container_of(kobj, 652 struct device, 653 kobj)); 654 655 /* Only support 1, 2 or 4 byte accesses */ 656 if (count != 1 && count != 2 && count != 4) 657 return -EINVAL; 658 659 return pci_legacy_read(bus, off, (u32 *)buf, count); 660 } 661 662 /** 663 * pci_write_legacy_io - write byte(s) to legacy I/O port space 664 * @filp: open sysfs file 665 * @kobj: kobject corresponding to file to read from 666 * @bin_attr: struct bin_attribute for this file 667 * @buf: buffer containing value to be written 668 * @off: offset into legacy I/O port space 669 * @count: number of bytes to write 670 * 671 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific 672 * callback routine (pci_legacy_write). 673 */ 674 static ssize_t 675 pci_write_legacy_io(struct file *filp, struct kobject *kobj, 676 struct bin_attribute *bin_attr, 677 char *buf, loff_t off, size_t count) 678 { 679 struct pci_bus *bus = to_pci_bus(container_of(kobj, 680 struct device, 681 kobj)); 682 /* Only support 1, 2 or 4 byte accesses */ 683 if (count != 1 && count != 2 && count != 4) 684 return -EINVAL; 685 686 return pci_legacy_write(bus, off, *(u32 *)buf, count); 687 } 688 689 /** 690 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space 691 * @filp: open sysfs file 692 * @kobj: kobject corresponding to device to be mapped 693 * @attr: struct bin_attribute for this file 694 * @vma: struct vm_area_struct passed to mmap 695 * 696 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap 697 * legacy memory space (first meg of bus space) into application virtual 698 * memory space. 699 */ 700 static int 701 pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, 702 struct bin_attribute *attr, 703 struct vm_area_struct *vma) 704 { 705 struct pci_bus *bus = to_pci_bus(container_of(kobj, 706 struct device, 707 kobj)); 708 709 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); 710 } 711 712 /** 713 * pci_mmap_legacy_io - map legacy PCI IO into user memory space 714 * @filp: open sysfs file 715 * @kobj: kobject corresponding to device to be mapped 716 * @attr: struct bin_attribute for this file 717 * @vma: struct vm_area_struct passed to mmap 718 * 719 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap 720 * legacy IO space (first meg of bus space) into application virtual 721 * memory space. Returns -ENOSYS if the operation isn't supported 722 */ 723 static int 724 pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, 725 struct bin_attribute *attr, 726 struct vm_area_struct *vma) 727 { 728 struct pci_bus *bus = to_pci_bus(container_of(kobj, 729 struct device, 730 kobj)); 731 732 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); 733 } 734 735 /** 736 * pci_adjust_legacy_attr - adjustment of legacy file attributes 737 * @b: bus to create files under 738 * @mmap_type: I/O port or memory 739 * 740 * Stub implementation. Can be overridden by arch if necessary. 741 */ 742 void __weak 743 pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type) 744 { 745 return; 746 } 747 748 /** 749 * pci_create_legacy_files - create legacy I/O port and memory files 750 * @b: bus to create files under 751 * 752 * Some platforms allow access to legacy I/O port and ISA memory space on 753 * a per-bus basis. This routine creates the files and ties them into 754 * their associated read, write and mmap files from pci-sysfs.c 755 * 756 * On error unwind, but don't propagate the error to the caller 757 * as it is ok to set up the PCI bus without these files. 758 */ 759 void pci_create_legacy_files(struct pci_bus *b) 760 { 761 int error; 762 763 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2, 764 GFP_ATOMIC); 765 if (!b->legacy_io) 766 goto kzalloc_err; 767 768 sysfs_bin_attr_init(b->legacy_io); 769 b->legacy_io->attr.name = "legacy_io"; 770 b->legacy_io->size = 0xffff; 771 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR; 772 b->legacy_io->read = pci_read_legacy_io; 773 b->legacy_io->write = pci_write_legacy_io; 774 b->legacy_io->mmap = pci_mmap_legacy_io; 775 pci_adjust_legacy_attr(b, pci_mmap_io); 776 error = device_create_bin_file(&b->dev, b->legacy_io); 777 if (error) 778 goto legacy_io_err; 779 780 /* Allocated above after the legacy_io struct */ 781 b->legacy_mem = b->legacy_io + 1; 782 sysfs_bin_attr_init(b->legacy_mem); 783 b->legacy_mem->attr.name = "legacy_mem"; 784 b->legacy_mem->size = 1024*1024; 785 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR; 786 b->legacy_mem->mmap = pci_mmap_legacy_mem; 787 pci_adjust_legacy_attr(b, pci_mmap_mem); 788 error = device_create_bin_file(&b->dev, b->legacy_mem); 789 if (error) 790 goto legacy_mem_err; 791 792 return; 793 794 legacy_mem_err: 795 device_remove_bin_file(&b->dev, b->legacy_io); 796 legacy_io_err: 797 kfree(b->legacy_io); 798 b->legacy_io = NULL; 799 kzalloc_err: 800 printk(KERN_WARNING "pci: warning: could not create legacy I/O port " 801 "and ISA memory resources to sysfs\n"); 802 return; 803 } 804 805 void pci_remove_legacy_files(struct pci_bus *b) 806 { 807 if (b->legacy_io) { 808 device_remove_bin_file(&b->dev, b->legacy_io); 809 device_remove_bin_file(&b->dev, b->legacy_mem); 810 kfree(b->legacy_io); /* both are allocated here */ 811 } 812 } 813 #endif /* HAVE_PCI_LEGACY */ 814 815 #ifdef HAVE_PCI_MMAP 816 817 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma, 818 enum pci_mmap_api mmap_api) 819 { 820 unsigned long nr, start, size, pci_start; 821 822 if (pci_resource_len(pdev, resno) == 0) 823 return 0; 824 nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; 825 start = vma->vm_pgoff; 826 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; 827 pci_start = (mmap_api == PCI_MMAP_PROCFS) ? 828 pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0; 829 if (start >= pci_start && start < pci_start + size && 830 start + nr <= pci_start + size) 831 return 1; 832 return 0; 833 } 834 835 /** 836 * pci_mmap_resource - map a PCI resource into user memory space 837 * @kobj: kobject for mapping 838 * @attr: struct bin_attribute for the file being mapped 839 * @vma: struct vm_area_struct passed into the mmap 840 * @write_combine: 1 for write_combine mapping 841 * 842 * Use the regular PCI mapping routines to map a PCI resource into userspace. 843 */ 844 static int 845 pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, 846 struct vm_area_struct *vma, int write_combine) 847 { 848 struct pci_dev *pdev = to_pci_dev(container_of(kobj, 849 struct device, kobj)); 850 struct resource *res = attr->private; 851 enum pci_mmap_state mmap_type; 852 resource_size_t start, end; 853 int i; 854 855 for (i = 0; i < PCI_ROM_RESOURCE; i++) 856 if (res == &pdev->resource[i]) 857 break; 858 if (i >= PCI_ROM_RESOURCE) 859 return -ENODEV; 860 861 if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) { 862 WARN(1, "process \"%s\" tried to map 0x%08lx bytes " 863 "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n", 864 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff, 865 pci_name(pdev), i, 866 (u64)pci_resource_start(pdev, i), 867 (u64)pci_resource_len(pdev, i)); 868 return -EINVAL; 869 } 870 871 /* pci_mmap_page_range() expects the same kind of entry as coming 872 * from /proc/bus/pci/ which is a "user visible" value. If this is 873 * different from the resource itself, arch will do necessary fixup. 874 */ 875 pci_resource_to_user(pdev, i, res, &start, &end); 876 vma->vm_pgoff += start >> PAGE_SHIFT; 877 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; 878 879 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start)) 880 return -EINVAL; 881 882 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine); 883 } 884 885 static int 886 pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, 887 struct bin_attribute *attr, 888 struct vm_area_struct *vma) 889 { 890 return pci_mmap_resource(kobj, attr, vma, 0); 891 } 892 893 static int 894 pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, 895 struct bin_attribute *attr, 896 struct vm_area_struct *vma) 897 { 898 return pci_mmap_resource(kobj, attr, vma, 1); 899 } 900 901 static ssize_t 902 pci_resource_io(struct file *filp, struct kobject *kobj, 903 struct bin_attribute *attr, char *buf, 904 loff_t off, size_t count, bool write) 905 { 906 struct pci_dev *pdev = to_pci_dev(container_of(kobj, 907 struct device, kobj)); 908 struct resource *res = attr->private; 909 unsigned long port = off; 910 int i; 911 912 for (i = 0; i < PCI_ROM_RESOURCE; i++) 913 if (res == &pdev->resource[i]) 914 break; 915 if (i >= PCI_ROM_RESOURCE) 916 return -ENODEV; 917 918 port += pci_resource_start(pdev, i); 919 920 if (port > pci_resource_end(pdev, i)) 921 return 0; 922 923 if (port + count - 1 > pci_resource_end(pdev, i)) 924 return -EINVAL; 925 926 switch (count) { 927 case 1: 928 if (write) 929 outb(*(u8 *)buf, port); 930 else 931 *(u8 *)buf = inb(port); 932 return 1; 933 case 2: 934 if (write) 935 outw(*(u16 *)buf, port); 936 else 937 *(u16 *)buf = inw(port); 938 return 2; 939 case 4: 940 if (write) 941 outl(*(u32 *)buf, port); 942 else 943 *(u32 *)buf = inl(port); 944 return 4; 945 } 946 return -EINVAL; 947 } 948 949 static ssize_t 950 pci_read_resource_io(struct file *filp, struct kobject *kobj, 951 struct bin_attribute *attr, char *buf, 952 loff_t off, size_t count) 953 { 954 return pci_resource_io(filp, kobj, attr, buf, off, count, false); 955 } 956 957 static ssize_t 958 pci_write_resource_io(struct file *filp, struct kobject *kobj, 959 struct bin_attribute *attr, char *buf, 960 loff_t off, size_t count) 961 { 962 return pci_resource_io(filp, kobj, attr, buf, off, count, true); 963 } 964 965 /** 966 * pci_remove_resource_files - cleanup resource files 967 * @pdev: dev to cleanup 968 * 969 * If we created resource files for @pdev, remove them from sysfs and 970 * free their resources. 971 */ 972 static void 973 pci_remove_resource_files(struct pci_dev *pdev) 974 { 975 int i; 976 977 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 978 struct bin_attribute *res_attr; 979 980 res_attr = pdev->res_attr[i]; 981 if (res_attr) { 982 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 983 kfree(res_attr); 984 } 985 986 res_attr = pdev->res_attr_wc[i]; 987 if (res_attr) { 988 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 989 kfree(res_attr); 990 } 991 } 992 } 993 994 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) 995 { 996 /* allocate attribute structure, piggyback attribute name */ 997 int name_len = write_combine ? 13 : 10; 998 struct bin_attribute *res_attr; 999 int retval; 1000 1001 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); 1002 if (res_attr) { 1003 char *res_attr_name = (char *)(res_attr + 1); 1004 1005 sysfs_bin_attr_init(res_attr); 1006 if (write_combine) { 1007 pdev->res_attr_wc[num] = res_attr; 1008 sprintf(res_attr_name, "resource%d_wc", num); 1009 res_attr->mmap = pci_mmap_resource_wc; 1010 } else { 1011 pdev->res_attr[num] = res_attr; 1012 sprintf(res_attr_name, "resource%d", num); 1013 res_attr->mmap = pci_mmap_resource_uc; 1014 } 1015 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { 1016 res_attr->read = pci_read_resource_io; 1017 res_attr->write = pci_write_resource_io; 1018 } 1019 res_attr->attr.name = res_attr_name; 1020 res_attr->attr.mode = S_IRUSR | S_IWUSR; 1021 res_attr->size = pci_resource_len(pdev, num); 1022 res_attr->private = &pdev->resource[num]; 1023 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); 1024 } else 1025 retval = -ENOMEM; 1026 1027 return retval; 1028 } 1029 1030 /** 1031 * pci_create_resource_files - create resource files in sysfs for @dev 1032 * @pdev: dev in question 1033 * 1034 * Walk the resources in @pdev creating files for each resource available. 1035 */ 1036 static int pci_create_resource_files(struct pci_dev *pdev) 1037 { 1038 int i; 1039 int retval; 1040 1041 /* Expose the PCI resources from this device as files */ 1042 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1043 1044 /* skip empty resources */ 1045 if (!pci_resource_len(pdev, i)) 1046 continue; 1047 1048 retval = pci_create_attr(pdev, i, 0); 1049 /* for prefetchable resources, create a WC mappable file */ 1050 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH) 1051 retval = pci_create_attr(pdev, i, 1); 1052 1053 if (retval) { 1054 pci_remove_resource_files(pdev); 1055 return retval; 1056 } 1057 } 1058 return 0; 1059 } 1060 #else /* !HAVE_PCI_MMAP */ 1061 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } 1062 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } 1063 #endif /* HAVE_PCI_MMAP */ 1064 1065 /** 1066 * pci_write_rom - used to enable access to the PCI ROM display 1067 * @filp: sysfs file 1068 * @kobj: kernel object handle 1069 * @bin_attr: struct bin_attribute for this file 1070 * @buf: user input 1071 * @off: file offset 1072 * @count: number of byte in input 1073 * 1074 * writing anything except 0 enables it 1075 */ 1076 static ssize_t 1077 pci_write_rom(struct file *filp, struct kobject *kobj, 1078 struct bin_attribute *bin_attr, 1079 char *buf, loff_t off, size_t count) 1080 { 1081 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); 1082 1083 if ((off == 0) && (*buf == '0') && (count == 2)) 1084 pdev->rom_attr_enabled = 0; 1085 else 1086 pdev->rom_attr_enabled = 1; 1087 1088 return count; 1089 } 1090 1091 /** 1092 * pci_read_rom - read a PCI ROM 1093 * @filp: sysfs file 1094 * @kobj: kernel object handle 1095 * @bin_attr: struct bin_attribute for this file 1096 * @buf: where to put the data we read from the ROM 1097 * @off: file offset 1098 * @count: number of bytes to read 1099 * 1100 * Put @count bytes starting at @off into @buf from the ROM in the PCI 1101 * device corresponding to @kobj. 1102 */ 1103 static ssize_t 1104 pci_read_rom(struct file *filp, struct kobject *kobj, 1105 struct bin_attribute *bin_attr, 1106 char *buf, loff_t off, size_t count) 1107 { 1108 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); 1109 void __iomem *rom; 1110 size_t size; 1111 1112 if (!pdev->rom_attr_enabled) 1113 return -EINVAL; 1114 1115 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ 1116 if (!rom || !size) 1117 return -EIO; 1118 1119 if (off >= size) 1120 count = 0; 1121 else { 1122 if (off + count > size) 1123 count = size - off; 1124 1125 memcpy_fromio(buf, rom + off, count); 1126 } 1127 pci_unmap_rom(pdev, rom); 1128 1129 return count; 1130 } 1131 1132 static struct bin_attribute pci_config_attr = { 1133 .attr = { 1134 .name = "config", 1135 .mode = S_IRUGO | S_IWUSR, 1136 }, 1137 .size = PCI_CFG_SPACE_SIZE, 1138 .read = pci_read_config, 1139 .write = pci_write_config, 1140 }; 1141 1142 static struct bin_attribute pcie_config_attr = { 1143 .attr = { 1144 .name = "config", 1145 .mode = S_IRUGO | S_IWUSR, 1146 }, 1147 .size = PCI_CFG_SPACE_EXP_SIZE, 1148 .read = pci_read_config, 1149 .write = pci_write_config, 1150 }; 1151 1152 int __weak pcibios_add_platform_entries(struct pci_dev *dev) 1153 { 1154 return 0; 1155 } 1156 1157 static ssize_t reset_store(struct device *dev, 1158 struct device_attribute *attr, const char *buf, 1159 size_t count) 1160 { 1161 struct pci_dev *pdev = to_pci_dev(dev); 1162 unsigned long val; 1163 ssize_t result = strict_strtoul(buf, 0, &val); 1164 1165 if (result < 0) 1166 return result; 1167 1168 if (val != 1) 1169 return -EINVAL; 1170 1171 result = pci_reset_function(pdev); 1172 if (result < 0) 1173 return result; 1174 1175 return count; 1176 } 1177 1178 static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store); 1179 1180 static int pci_create_capabilities_sysfs(struct pci_dev *dev) 1181 { 1182 int retval; 1183 struct bin_attribute *attr; 1184 1185 /* If the device has VPD, try to expose it in sysfs. */ 1186 if (dev->vpd) { 1187 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1188 if (!attr) 1189 return -ENOMEM; 1190 1191 sysfs_bin_attr_init(attr); 1192 attr->size = dev->vpd->len; 1193 attr->attr.name = "vpd"; 1194 attr->attr.mode = S_IRUSR | S_IWUSR; 1195 attr->read = read_vpd_attr; 1196 attr->write = write_vpd_attr; 1197 retval = sysfs_create_bin_file(&dev->dev.kobj, attr); 1198 if (retval) { 1199 kfree(attr); 1200 return retval; 1201 } 1202 dev->vpd->attr = attr; 1203 } 1204 1205 /* Active State Power Management */ 1206 pcie_aspm_create_sysfs_dev_files(dev); 1207 1208 if (!pci_probe_reset_function(dev)) { 1209 retval = device_create_file(&dev->dev, &reset_attr); 1210 if (retval) 1211 goto error; 1212 dev->reset_fn = 1; 1213 } 1214 return 0; 1215 1216 error: 1217 pcie_aspm_remove_sysfs_dev_files(dev); 1218 if (dev->vpd && dev->vpd->attr) { 1219 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1220 kfree(dev->vpd->attr); 1221 } 1222 1223 return retval; 1224 } 1225 1226 int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev) 1227 { 1228 int retval; 1229 int rom_size = 0; 1230 struct bin_attribute *attr; 1231 1232 if (!sysfs_initialized) 1233 return -EACCES; 1234 1235 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) 1236 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr); 1237 else 1238 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1239 if (retval) 1240 goto err; 1241 1242 retval = pci_create_resource_files(pdev); 1243 if (retval) 1244 goto err_config_file; 1245 1246 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) 1247 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1248 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW) 1249 rom_size = 0x20000; 1250 1251 /* If the device has a ROM, try to expose it in sysfs. */ 1252 if (rom_size) { 1253 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1254 if (!attr) { 1255 retval = -ENOMEM; 1256 goto err_resource_files; 1257 } 1258 sysfs_bin_attr_init(attr); 1259 attr->size = rom_size; 1260 attr->attr.name = "rom"; 1261 attr->attr.mode = S_IRUSR | S_IWUSR; 1262 attr->read = pci_read_rom; 1263 attr->write = pci_write_rom; 1264 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr); 1265 if (retval) { 1266 kfree(attr); 1267 goto err_resource_files; 1268 } 1269 pdev->rom_attr = attr; 1270 } 1271 1272 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) { 1273 retval = device_create_file(&pdev->dev, &vga_attr); 1274 if (retval) 1275 goto err_rom_file; 1276 } 1277 1278 /* add platform-specific attributes */ 1279 retval = pcibios_add_platform_entries(pdev); 1280 if (retval) 1281 goto err_vga_file; 1282 1283 /* add sysfs entries for various capabilities */ 1284 retval = pci_create_capabilities_sysfs(pdev); 1285 if (retval) 1286 goto err_vga_file; 1287 1288 pci_create_firmware_label_files(pdev); 1289 1290 return 0; 1291 1292 err_vga_file: 1293 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) 1294 device_remove_file(&pdev->dev, &vga_attr); 1295 err_rom_file: 1296 if (rom_size) { 1297 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1298 kfree(pdev->rom_attr); 1299 pdev->rom_attr = NULL; 1300 } 1301 err_resource_files: 1302 pci_remove_resource_files(pdev); 1303 err_config_file: 1304 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) 1305 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1306 else 1307 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1308 err: 1309 return retval; 1310 } 1311 1312 static void pci_remove_capabilities_sysfs(struct pci_dev *dev) 1313 { 1314 if (dev->vpd && dev->vpd->attr) { 1315 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1316 kfree(dev->vpd->attr); 1317 } 1318 1319 pcie_aspm_remove_sysfs_dev_files(dev); 1320 if (dev->reset_fn) { 1321 device_remove_file(&dev->dev, &reset_attr); 1322 dev->reset_fn = 0; 1323 } 1324 } 1325 1326 /** 1327 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files 1328 * @pdev: device whose entries we should free 1329 * 1330 * Cleanup when @pdev is removed from sysfs. 1331 */ 1332 void pci_remove_sysfs_dev_files(struct pci_dev *pdev) 1333 { 1334 int rom_size = 0; 1335 1336 if (!sysfs_initialized) 1337 return; 1338 1339 pci_remove_capabilities_sysfs(pdev); 1340 1341 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) 1342 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1343 else 1344 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1345 1346 pci_remove_resource_files(pdev); 1347 1348 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) 1349 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1350 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW) 1351 rom_size = 0x20000; 1352 1353 if (rom_size && pdev->rom_attr) { 1354 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1355 kfree(pdev->rom_attr); 1356 } 1357 1358 pci_remove_firmware_label_files(pdev); 1359 1360 } 1361 1362 static int __init pci_sysfs_init(void) 1363 { 1364 struct pci_dev *pdev = NULL; 1365 int retval; 1366 1367 sysfs_initialized = 1; 1368 for_each_pci_dev(pdev) { 1369 retval = pci_create_sysfs_dev_files(pdev); 1370 if (retval) { 1371 pci_dev_put(pdev); 1372 return retval; 1373 } 1374 } 1375 1376 return 0; 1377 } 1378 1379 late_initcall(pci_sysfs_init); 1380