1 /* 2 * drivers/pci/pci-sysfs.c 3 * 4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> 5 * (C) Copyright 2002-2004 IBM Corp. 6 * (C) Copyright 2003 Matthew Wilcox 7 * (C) Copyright 2003 Hewlett-Packard 8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> 9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> 10 * 11 * File attributes for PCI devices 12 * 13 * Modeled after usb's driverfs.c 14 * 15 */ 16 17 18 #include <linux/kernel.h> 19 #include <linux/sched.h> 20 #include <linux/pci.h> 21 #include <linux/stat.h> 22 #include <linux/export.h> 23 #include <linux/topology.h> 24 #include <linux/mm.h> 25 #include <linux/fs.h> 26 #include <linux/capability.h> 27 #include <linux/security.h> 28 #include <linux/pci-aspm.h> 29 #include <linux/slab.h> 30 #include <linux/vgaarb.h> 31 #include <linux/pm_runtime.h> 32 #include "pci.h" 33 34 static int sysfs_initialized; /* = 0 */ 35 36 /* show configuration fields */ 37 #define pci_config_attr(field, format_string) \ 38 static ssize_t \ 39 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ 40 { \ 41 struct pci_dev *pdev; \ 42 \ 43 pdev = to_pci_dev (dev); \ 44 return sprintf (buf, format_string, pdev->field); \ 45 } 46 47 pci_config_attr(vendor, "0x%04x\n"); 48 pci_config_attr(device, "0x%04x\n"); 49 pci_config_attr(subsystem_vendor, "0x%04x\n"); 50 pci_config_attr(subsystem_device, "0x%04x\n"); 51 pci_config_attr(class, "0x%06x\n"); 52 pci_config_attr(irq, "%u\n"); 53 54 static ssize_t broken_parity_status_show(struct device *dev, 55 struct device_attribute *attr, 56 char *buf) 57 { 58 struct pci_dev *pdev = to_pci_dev(dev); 59 return sprintf (buf, "%u\n", pdev->broken_parity_status); 60 } 61 62 static ssize_t broken_parity_status_store(struct device *dev, 63 struct device_attribute *attr, 64 const char *buf, size_t count) 65 { 66 struct pci_dev *pdev = to_pci_dev(dev); 67 unsigned long val; 68 69 if (strict_strtoul(buf, 0, &val) < 0) 70 return -EINVAL; 71 72 pdev->broken_parity_status = !!val; 73 74 return count; 75 } 76 77 static ssize_t local_cpus_show(struct device *dev, 78 struct device_attribute *attr, char *buf) 79 { 80 const struct cpumask *mask; 81 int len; 82 83 #ifdef CONFIG_NUMA 84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 85 cpumask_of_node(dev_to_node(dev)); 86 #else 87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 88 #endif 89 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask); 90 buf[len++] = '\n'; 91 buf[len] = '\0'; 92 return len; 93 } 94 95 96 static ssize_t local_cpulist_show(struct device *dev, 97 struct device_attribute *attr, char *buf) 98 { 99 const struct cpumask *mask; 100 int len; 101 102 #ifdef CONFIG_NUMA 103 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 104 cpumask_of_node(dev_to_node(dev)); 105 #else 106 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 107 #endif 108 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask); 109 buf[len++] = '\n'; 110 buf[len] = '\0'; 111 return len; 112 } 113 114 /* 115 * PCI Bus Class Devices 116 */ 117 static ssize_t pci_bus_show_cpuaffinity(struct device *dev, 118 int type, 119 struct device_attribute *attr, 120 char *buf) 121 { 122 int ret; 123 const struct cpumask *cpumask; 124 125 cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 126 ret = type ? 127 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) : 128 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask); 129 buf[ret++] = '\n'; 130 buf[ret] = '\0'; 131 return ret; 132 } 133 134 static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev, 135 struct device_attribute *attr, 136 char *buf) 137 { 138 return pci_bus_show_cpuaffinity(dev, 0, attr, buf); 139 } 140 141 static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev, 142 struct device_attribute *attr, 143 char *buf) 144 { 145 return pci_bus_show_cpuaffinity(dev, 1, attr, buf); 146 } 147 148 /* show resources */ 149 static ssize_t 150 resource_show(struct device * dev, struct device_attribute *attr, char * buf) 151 { 152 struct pci_dev * pci_dev = to_pci_dev(dev); 153 char * str = buf; 154 int i; 155 int max; 156 resource_size_t start, end; 157 158 if (pci_dev->subordinate) 159 max = DEVICE_COUNT_RESOURCE; 160 else 161 max = PCI_BRIDGE_RESOURCES; 162 163 for (i = 0; i < max; i++) { 164 struct resource *res = &pci_dev->resource[i]; 165 pci_resource_to_user(pci_dev, i, res, &start, &end); 166 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n", 167 (unsigned long long)start, 168 (unsigned long long)end, 169 (unsigned long long)res->flags); 170 } 171 return (str - buf); 172 } 173 174 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf) 175 { 176 struct pci_dev *pci_dev = to_pci_dev(dev); 177 178 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n", 179 pci_dev->vendor, pci_dev->device, 180 pci_dev->subsystem_vendor, pci_dev->subsystem_device, 181 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), 182 (u8)(pci_dev->class)); 183 } 184 185 static ssize_t is_enabled_store(struct device *dev, 186 struct device_attribute *attr, const char *buf, 187 size_t count) 188 { 189 struct pci_dev *pdev = to_pci_dev(dev); 190 unsigned long val; 191 ssize_t result = strict_strtoul(buf, 0, &val); 192 193 if (result < 0) 194 return result; 195 196 /* this can crash the machine when done on the "wrong" device */ 197 if (!capable(CAP_SYS_ADMIN)) 198 return -EPERM; 199 200 if (!val) { 201 if (pci_is_enabled(pdev)) 202 pci_disable_device(pdev); 203 else 204 result = -EIO; 205 } else 206 result = pci_enable_device(pdev); 207 208 return result < 0 ? result : count; 209 } 210 211 static ssize_t is_enabled_show(struct device *dev, 212 struct device_attribute *attr, char *buf) 213 { 214 struct pci_dev *pdev; 215 216 pdev = to_pci_dev (dev); 217 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt)); 218 } 219 220 #ifdef CONFIG_NUMA 221 static ssize_t 222 numa_node_show(struct device *dev, struct device_attribute *attr, char *buf) 223 { 224 return sprintf (buf, "%d\n", dev->numa_node); 225 } 226 #endif 227 228 static ssize_t 229 dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf) 230 { 231 struct pci_dev *pdev = to_pci_dev(dev); 232 233 return sprintf (buf, "%d\n", fls64(pdev->dma_mask)); 234 } 235 236 static ssize_t 237 consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr, 238 char *buf) 239 { 240 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask)); 241 } 242 243 static ssize_t 244 msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf) 245 { 246 struct pci_dev *pdev = to_pci_dev(dev); 247 248 if (!pdev->subordinate) 249 return 0; 250 251 return sprintf (buf, "%u\n", 252 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)); 253 } 254 255 static ssize_t 256 msi_bus_store(struct device *dev, struct device_attribute *attr, 257 const char *buf, size_t count) 258 { 259 struct pci_dev *pdev = to_pci_dev(dev); 260 unsigned long val; 261 262 if (strict_strtoul(buf, 0, &val) < 0) 263 return -EINVAL; 264 265 /* bad things may happen if the no_msi flag is changed 266 * while some drivers are loaded */ 267 if (!capable(CAP_SYS_ADMIN)) 268 return -EPERM; 269 270 /* Maybe pci devices without subordinate busses shouldn't even have this 271 * attribute in the first place? */ 272 if (!pdev->subordinate) 273 return count; 274 275 /* Is the flag going to change, or keep the value it already had? */ 276 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^ 277 !!val) { 278 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI; 279 280 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI," 281 " bad things could happen\n", val ? "" : " not"); 282 } 283 284 return count; 285 } 286 287 static DEFINE_MUTEX(pci_remove_rescan_mutex); 288 static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf, 289 size_t count) 290 { 291 unsigned long val; 292 struct pci_bus *b = NULL; 293 294 if (strict_strtoul(buf, 0, &val) < 0) 295 return -EINVAL; 296 297 if (val) { 298 mutex_lock(&pci_remove_rescan_mutex); 299 while ((b = pci_find_next_bus(b)) != NULL) 300 pci_rescan_bus(b); 301 mutex_unlock(&pci_remove_rescan_mutex); 302 } 303 return count; 304 } 305 306 struct bus_attribute pci_bus_attrs[] = { 307 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store), 308 __ATTR_NULL 309 }; 310 311 static ssize_t 312 dev_rescan_store(struct device *dev, struct device_attribute *attr, 313 const char *buf, size_t count) 314 { 315 unsigned long val; 316 struct pci_dev *pdev = to_pci_dev(dev); 317 318 if (strict_strtoul(buf, 0, &val) < 0) 319 return -EINVAL; 320 321 if (val) { 322 mutex_lock(&pci_remove_rescan_mutex); 323 pci_rescan_bus(pdev->bus); 324 mutex_unlock(&pci_remove_rescan_mutex); 325 } 326 return count; 327 } 328 329 static void remove_callback(struct device *dev) 330 { 331 struct pci_dev *pdev = to_pci_dev(dev); 332 333 mutex_lock(&pci_remove_rescan_mutex); 334 pci_stop_and_remove_bus_device(pdev); 335 mutex_unlock(&pci_remove_rescan_mutex); 336 } 337 338 static ssize_t 339 remove_store(struct device *dev, struct device_attribute *dummy, 340 const char *buf, size_t count) 341 { 342 int ret = 0; 343 unsigned long val; 344 345 if (strict_strtoul(buf, 0, &val) < 0) 346 return -EINVAL; 347 348 /* An attribute cannot be unregistered by one of its own methods, 349 * so we have to use this roundabout approach. 350 */ 351 if (val) 352 ret = device_schedule_callback(dev, remove_callback); 353 if (ret) 354 count = ret; 355 return count; 356 } 357 358 static ssize_t 359 dev_bus_rescan_store(struct device *dev, struct device_attribute *attr, 360 const char *buf, size_t count) 361 { 362 unsigned long val; 363 struct pci_bus *bus = to_pci_bus(dev); 364 365 if (strict_strtoul(buf, 0, &val) < 0) 366 return -EINVAL; 367 368 if (val) { 369 mutex_lock(&pci_remove_rescan_mutex); 370 if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) 371 pci_rescan_bus_bridge_resize(bus->self); 372 else 373 pci_rescan_bus(bus); 374 mutex_unlock(&pci_remove_rescan_mutex); 375 } 376 return count; 377 } 378 379 #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI) 380 static ssize_t d3cold_allowed_store(struct device *dev, 381 struct device_attribute *attr, 382 const char *buf, size_t count) 383 { 384 struct pci_dev *pdev = to_pci_dev(dev); 385 unsigned long val; 386 387 if (strict_strtoul(buf, 0, &val) < 0) 388 return -EINVAL; 389 390 pdev->d3cold_allowed = !!val; 391 pm_runtime_resume(dev); 392 393 return count; 394 } 395 396 static ssize_t d3cold_allowed_show(struct device *dev, 397 struct device_attribute *attr, char *buf) 398 { 399 struct pci_dev *pdev = to_pci_dev(dev); 400 return sprintf (buf, "%u\n", pdev->d3cold_allowed); 401 } 402 #endif 403 404 #ifdef CONFIG_PCI_IOV 405 static ssize_t sriov_totalvfs_show(struct device *dev, 406 struct device_attribute *attr, 407 char *buf) 408 { 409 struct pci_dev *pdev = to_pci_dev(dev); 410 411 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev)); 412 } 413 414 415 static ssize_t sriov_numvfs_show(struct device *dev, 416 struct device_attribute *attr, 417 char *buf) 418 { 419 struct pci_dev *pdev = to_pci_dev(dev); 420 421 return sprintf(buf, "%u\n", pdev->sriov->num_VFs); 422 } 423 424 /* 425 * num_vfs > 0; number of vfs to enable 426 * num_vfs = 0; disable all vfs 427 * 428 * Note: SRIOV spec doesn't allow partial VF 429 * disable, so its all or none. 430 */ 431 static ssize_t sriov_numvfs_store(struct device *dev, 432 struct device_attribute *attr, 433 const char *buf, size_t count) 434 { 435 struct pci_dev *pdev = to_pci_dev(dev); 436 int num_vfs_enabled = 0; 437 int num_vfs; 438 int ret = 0; 439 u16 total; 440 441 if (kstrtoint(buf, 0, &num_vfs) < 0) 442 return -EINVAL; 443 444 /* is PF driver loaded w/callback */ 445 if (!pdev->driver || !pdev->driver->sriov_configure) { 446 dev_info(&pdev->dev, 447 "Driver doesn't support SRIOV configuration via sysfs\n"); 448 return -ENOSYS; 449 } 450 451 /* if enabling vf's ... */ 452 total = pci_sriov_get_totalvfs(pdev); 453 /* Requested VFs to enable < totalvfs and none enabled already */ 454 if ((num_vfs > 0) && (num_vfs <= total)) { 455 if (pdev->sriov->num_VFs == 0) { 456 num_vfs_enabled = 457 pdev->driver->sriov_configure(pdev, num_vfs); 458 if ((num_vfs_enabled >= 0) && 459 (num_vfs_enabled != num_vfs)) { 460 dev_warn(&pdev->dev, 461 "Only %d VFs enabled\n", 462 num_vfs_enabled); 463 return count; 464 } else if (num_vfs_enabled < 0) 465 /* error code from driver callback */ 466 return num_vfs_enabled; 467 } else if (num_vfs == pdev->sriov->num_VFs) { 468 dev_warn(&pdev->dev, 469 "%d VFs already enabled; no enable action taken\n", 470 num_vfs); 471 return count; 472 } else { 473 dev_warn(&pdev->dev, 474 "%d VFs already enabled. Disable before enabling %d VFs\n", 475 pdev->sriov->num_VFs, num_vfs); 476 return -EINVAL; 477 } 478 } 479 480 /* disable vfs */ 481 if (num_vfs == 0) { 482 if (pdev->sriov->num_VFs != 0) { 483 ret = pdev->driver->sriov_configure(pdev, 0); 484 return ret ? ret : count; 485 } else { 486 dev_warn(&pdev->dev, 487 "All VFs disabled; no disable action taken\n"); 488 return count; 489 } 490 } 491 492 dev_err(&pdev->dev, 493 "Invalid value for number of VFs to enable: %d\n", num_vfs); 494 495 return -EINVAL; 496 } 497 498 static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs); 499 static struct device_attribute sriov_numvfs_attr = 500 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP), 501 sriov_numvfs_show, sriov_numvfs_store); 502 #endif /* CONFIG_PCI_IOV */ 503 504 struct device_attribute pci_dev_attrs[] = { 505 __ATTR_RO(resource), 506 __ATTR_RO(vendor), 507 __ATTR_RO(device), 508 __ATTR_RO(subsystem_vendor), 509 __ATTR_RO(subsystem_device), 510 __ATTR_RO(class), 511 __ATTR_RO(irq), 512 __ATTR_RO(local_cpus), 513 __ATTR_RO(local_cpulist), 514 __ATTR_RO(modalias), 515 #ifdef CONFIG_NUMA 516 __ATTR_RO(numa_node), 517 #endif 518 __ATTR_RO(dma_mask_bits), 519 __ATTR_RO(consistent_dma_mask_bits), 520 __ATTR(enable, 0600, is_enabled_show, is_enabled_store), 521 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR), 522 broken_parity_status_show,broken_parity_status_store), 523 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store), 524 __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store), 525 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store), 526 #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI) 527 __ATTR(d3cold_allowed, 0644, d3cold_allowed_show, d3cold_allowed_store), 528 #endif 529 __ATTR_NULL, 530 }; 531 532 struct device_attribute pcibus_dev_attrs[] = { 533 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store), 534 __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL), 535 __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL), 536 __ATTR_NULL, 537 }; 538 539 static ssize_t 540 boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf) 541 { 542 struct pci_dev *pdev = to_pci_dev(dev); 543 struct pci_dev *vga_dev = vga_default_device(); 544 545 if (vga_dev) 546 return sprintf(buf, "%u\n", (pdev == vga_dev)); 547 548 return sprintf(buf, "%u\n", 549 !!(pdev->resource[PCI_ROM_RESOURCE].flags & 550 IORESOURCE_ROM_SHADOW)); 551 } 552 struct device_attribute vga_attr = __ATTR_RO(boot_vga); 553 554 static ssize_t 555 pci_read_config(struct file *filp, struct kobject *kobj, 556 struct bin_attribute *bin_attr, 557 char *buf, loff_t off, size_t count) 558 { 559 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj)); 560 unsigned int size = 64; 561 loff_t init_off = off; 562 u8 *data = (u8*) buf; 563 564 /* Several chips lock up trying to read undefined config space */ 565 if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) { 566 size = dev->cfg_size; 567 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) { 568 size = 128; 569 } 570 571 if (off > size) 572 return 0; 573 if (off + count > size) { 574 size -= off; 575 count = size; 576 } else { 577 size = count; 578 } 579 580 pci_config_pm_runtime_get(dev); 581 582 if ((off & 1) && size) { 583 u8 val; 584 pci_user_read_config_byte(dev, off, &val); 585 data[off - init_off] = val; 586 off++; 587 size--; 588 } 589 590 if ((off & 3) && size > 2) { 591 u16 val; 592 pci_user_read_config_word(dev, off, &val); 593 data[off - init_off] = val & 0xff; 594 data[off - init_off + 1] = (val >> 8) & 0xff; 595 off += 2; 596 size -= 2; 597 } 598 599 while (size > 3) { 600 u32 val; 601 pci_user_read_config_dword(dev, off, &val); 602 data[off - init_off] = val & 0xff; 603 data[off - init_off + 1] = (val >> 8) & 0xff; 604 data[off - init_off + 2] = (val >> 16) & 0xff; 605 data[off - init_off + 3] = (val >> 24) & 0xff; 606 off += 4; 607 size -= 4; 608 } 609 610 if (size >= 2) { 611 u16 val; 612 pci_user_read_config_word(dev, off, &val); 613 data[off - init_off] = val & 0xff; 614 data[off - init_off + 1] = (val >> 8) & 0xff; 615 off += 2; 616 size -= 2; 617 } 618 619 if (size > 0) { 620 u8 val; 621 pci_user_read_config_byte(dev, off, &val); 622 data[off - init_off] = val; 623 off++; 624 --size; 625 } 626 627 pci_config_pm_runtime_put(dev); 628 629 return count; 630 } 631 632 static ssize_t 633 pci_write_config(struct file* filp, struct kobject *kobj, 634 struct bin_attribute *bin_attr, 635 char *buf, loff_t off, size_t count) 636 { 637 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj)); 638 unsigned int size = count; 639 loff_t init_off = off; 640 u8 *data = (u8*) buf; 641 642 if (off > dev->cfg_size) 643 return 0; 644 if (off + count > dev->cfg_size) { 645 size = dev->cfg_size - off; 646 count = size; 647 } 648 649 pci_config_pm_runtime_get(dev); 650 651 if ((off & 1) && size) { 652 pci_user_write_config_byte(dev, off, data[off - init_off]); 653 off++; 654 size--; 655 } 656 657 if ((off & 3) && size > 2) { 658 u16 val = data[off - init_off]; 659 val |= (u16) data[off - init_off + 1] << 8; 660 pci_user_write_config_word(dev, off, val); 661 off += 2; 662 size -= 2; 663 } 664 665 while (size > 3) { 666 u32 val = data[off - init_off]; 667 val |= (u32) data[off - init_off + 1] << 8; 668 val |= (u32) data[off - init_off + 2] << 16; 669 val |= (u32) data[off - init_off + 3] << 24; 670 pci_user_write_config_dword(dev, off, val); 671 off += 4; 672 size -= 4; 673 } 674 675 if (size >= 2) { 676 u16 val = data[off - init_off]; 677 val |= (u16) data[off - init_off + 1] << 8; 678 pci_user_write_config_word(dev, off, val); 679 off += 2; 680 size -= 2; 681 } 682 683 if (size) { 684 pci_user_write_config_byte(dev, off, data[off - init_off]); 685 off++; 686 --size; 687 } 688 689 pci_config_pm_runtime_put(dev); 690 691 return count; 692 } 693 694 static ssize_t 695 read_vpd_attr(struct file *filp, struct kobject *kobj, 696 struct bin_attribute *bin_attr, 697 char *buf, loff_t off, size_t count) 698 { 699 struct pci_dev *dev = 700 to_pci_dev(container_of(kobj, struct device, kobj)); 701 702 if (off > bin_attr->size) 703 count = 0; 704 else if (count > bin_attr->size - off) 705 count = bin_attr->size - off; 706 707 return pci_read_vpd(dev, off, count, buf); 708 } 709 710 static ssize_t 711 write_vpd_attr(struct file *filp, struct kobject *kobj, 712 struct bin_attribute *bin_attr, 713 char *buf, loff_t off, size_t count) 714 { 715 struct pci_dev *dev = 716 to_pci_dev(container_of(kobj, struct device, kobj)); 717 718 if (off > bin_attr->size) 719 count = 0; 720 else if (count > bin_attr->size - off) 721 count = bin_attr->size - off; 722 723 return pci_write_vpd(dev, off, count, buf); 724 } 725 726 #ifdef HAVE_PCI_LEGACY 727 /** 728 * pci_read_legacy_io - read byte(s) from legacy I/O port space 729 * @filp: open sysfs file 730 * @kobj: kobject corresponding to file to read from 731 * @bin_attr: struct bin_attribute for this file 732 * @buf: buffer to store results 733 * @off: offset into legacy I/O port space 734 * @count: number of bytes to read 735 * 736 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific 737 * callback routine (pci_legacy_read). 738 */ 739 static ssize_t 740 pci_read_legacy_io(struct file *filp, struct kobject *kobj, 741 struct bin_attribute *bin_attr, 742 char *buf, loff_t off, size_t count) 743 { 744 struct pci_bus *bus = to_pci_bus(container_of(kobj, 745 struct device, 746 kobj)); 747 748 /* Only support 1, 2 or 4 byte accesses */ 749 if (count != 1 && count != 2 && count != 4) 750 return -EINVAL; 751 752 return pci_legacy_read(bus, off, (u32 *)buf, count); 753 } 754 755 /** 756 * pci_write_legacy_io - write byte(s) to legacy I/O port space 757 * @filp: open sysfs file 758 * @kobj: kobject corresponding to file to read from 759 * @bin_attr: struct bin_attribute for this file 760 * @buf: buffer containing value to be written 761 * @off: offset into legacy I/O port space 762 * @count: number of bytes to write 763 * 764 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific 765 * callback routine (pci_legacy_write). 766 */ 767 static ssize_t 768 pci_write_legacy_io(struct file *filp, struct kobject *kobj, 769 struct bin_attribute *bin_attr, 770 char *buf, loff_t off, size_t count) 771 { 772 struct pci_bus *bus = to_pci_bus(container_of(kobj, 773 struct device, 774 kobj)); 775 /* Only support 1, 2 or 4 byte accesses */ 776 if (count != 1 && count != 2 && count != 4) 777 return -EINVAL; 778 779 return pci_legacy_write(bus, off, *(u32 *)buf, count); 780 } 781 782 /** 783 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space 784 * @filp: open sysfs file 785 * @kobj: kobject corresponding to device to be mapped 786 * @attr: struct bin_attribute for this file 787 * @vma: struct vm_area_struct passed to mmap 788 * 789 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap 790 * legacy memory space (first meg of bus space) into application virtual 791 * memory space. 792 */ 793 static int 794 pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, 795 struct bin_attribute *attr, 796 struct vm_area_struct *vma) 797 { 798 struct pci_bus *bus = to_pci_bus(container_of(kobj, 799 struct device, 800 kobj)); 801 802 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); 803 } 804 805 /** 806 * pci_mmap_legacy_io - map legacy PCI IO into user memory space 807 * @filp: open sysfs file 808 * @kobj: kobject corresponding to device to be mapped 809 * @attr: struct bin_attribute for this file 810 * @vma: struct vm_area_struct passed to mmap 811 * 812 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap 813 * legacy IO space (first meg of bus space) into application virtual 814 * memory space. Returns -ENOSYS if the operation isn't supported 815 */ 816 static int 817 pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, 818 struct bin_attribute *attr, 819 struct vm_area_struct *vma) 820 { 821 struct pci_bus *bus = to_pci_bus(container_of(kobj, 822 struct device, 823 kobj)); 824 825 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); 826 } 827 828 /** 829 * pci_adjust_legacy_attr - adjustment of legacy file attributes 830 * @b: bus to create files under 831 * @mmap_type: I/O port or memory 832 * 833 * Stub implementation. Can be overridden by arch if necessary. 834 */ 835 void __weak 836 pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type) 837 { 838 return; 839 } 840 841 /** 842 * pci_create_legacy_files - create legacy I/O port and memory files 843 * @b: bus to create files under 844 * 845 * Some platforms allow access to legacy I/O port and ISA memory space on 846 * a per-bus basis. This routine creates the files and ties them into 847 * their associated read, write and mmap files from pci-sysfs.c 848 * 849 * On error unwind, but don't propagate the error to the caller 850 * as it is ok to set up the PCI bus without these files. 851 */ 852 void pci_create_legacy_files(struct pci_bus *b) 853 { 854 int error; 855 856 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2, 857 GFP_ATOMIC); 858 if (!b->legacy_io) 859 goto kzalloc_err; 860 861 sysfs_bin_attr_init(b->legacy_io); 862 b->legacy_io->attr.name = "legacy_io"; 863 b->legacy_io->size = 0xffff; 864 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR; 865 b->legacy_io->read = pci_read_legacy_io; 866 b->legacy_io->write = pci_write_legacy_io; 867 b->legacy_io->mmap = pci_mmap_legacy_io; 868 pci_adjust_legacy_attr(b, pci_mmap_io); 869 error = device_create_bin_file(&b->dev, b->legacy_io); 870 if (error) 871 goto legacy_io_err; 872 873 /* Allocated above after the legacy_io struct */ 874 b->legacy_mem = b->legacy_io + 1; 875 sysfs_bin_attr_init(b->legacy_mem); 876 b->legacy_mem->attr.name = "legacy_mem"; 877 b->legacy_mem->size = 1024*1024; 878 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR; 879 b->legacy_mem->mmap = pci_mmap_legacy_mem; 880 pci_adjust_legacy_attr(b, pci_mmap_mem); 881 error = device_create_bin_file(&b->dev, b->legacy_mem); 882 if (error) 883 goto legacy_mem_err; 884 885 return; 886 887 legacy_mem_err: 888 device_remove_bin_file(&b->dev, b->legacy_io); 889 legacy_io_err: 890 kfree(b->legacy_io); 891 b->legacy_io = NULL; 892 kzalloc_err: 893 printk(KERN_WARNING "pci: warning: could not create legacy I/O port " 894 "and ISA memory resources to sysfs\n"); 895 return; 896 } 897 898 void pci_remove_legacy_files(struct pci_bus *b) 899 { 900 if (b->legacy_io) { 901 device_remove_bin_file(&b->dev, b->legacy_io); 902 device_remove_bin_file(&b->dev, b->legacy_mem); 903 kfree(b->legacy_io); /* both are allocated here */ 904 } 905 } 906 #endif /* HAVE_PCI_LEGACY */ 907 908 #ifdef HAVE_PCI_MMAP 909 910 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma, 911 enum pci_mmap_api mmap_api) 912 { 913 unsigned long nr, start, size, pci_start; 914 915 if (pci_resource_len(pdev, resno) == 0) 916 return 0; 917 nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; 918 start = vma->vm_pgoff; 919 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; 920 pci_start = (mmap_api == PCI_MMAP_PROCFS) ? 921 pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0; 922 if (start >= pci_start && start < pci_start + size && 923 start + nr <= pci_start + size) 924 return 1; 925 return 0; 926 } 927 928 /** 929 * pci_mmap_resource - map a PCI resource into user memory space 930 * @kobj: kobject for mapping 931 * @attr: struct bin_attribute for the file being mapped 932 * @vma: struct vm_area_struct passed into the mmap 933 * @write_combine: 1 for write_combine mapping 934 * 935 * Use the regular PCI mapping routines to map a PCI resource into userspace. 936 */ 937 static int 938 pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, 939 struct vm_area_struct *vma, int write_combine) 940 { 941 struct pci_dev *pdev = to_pci_dev(container_of(kobj, 942 struct device, kobj)); 943 struct resource *res = attr->private; 944 enum pci_mmap_state mmap_type; 945 resource_size_t start, end; 946 int i; 947 948 for (i = 0; i < PCI_ROM_RESOURCE; i++) 949 if (res == &pdev->resource[i]) 950 break; 951 if (i >= PCI_ROM_RESOURCE) 952 return -ENODEV; 953 954 if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) { 955 WARN(1, "process \"%s\" tried to map 0x%08lx bytes " 956 "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n", 957 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff, 958 pci_name(pdev), i, 959 (u64)pci_resource_start(pdev, i), 960 (u64)pci_resource_len(pdev, i)); 961 return -EINVAL; 962 } 963 964 /* pci_mmap_page_range() expects the same kind of entry as coming 965 * from /proc/bus/pci/ which is a "user visible" value. If this is 966 * different from the resource itself, arch will do necessary fixup. 967 */ 968 pci_resource_to_user(pdev, i, res, &start, &end); 969 vma->vm_pgoff += start >> PAGE_SHIFT; 970 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; 971 972 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start)) 973 return -EINVAL; 974 975 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine); 976 } 977 978 static int 979 pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, 980 struct bin_attribute *attr, 981 struct vm_area_struct *vma) 982 { 983 return pci_mmap_resource(kobj, attr, vma, 0); 984 } 985 986 static int 987 pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, 988 struct bin_attribute *attr, 989 struct vm_area_struct *vma) 990 { 991 return pci_mmap_resource(kobj, attr, vma, 1); 992 } 993 994 static ssize_t 995 pci_resource_io(struct file *filp, struct kobject *kobj, 996 struct bin_attribute *attr, char *buf, 997 loff_t off, size_t count, bool write) 998 { 999 struct pci_dev *pdev = to_pci_dev(container_of(kobj, 1000 struct device, kobj)); 1001 struct resource *res = attr->private; 1002 unsigned long port = off; 1003 int i; 1004 1005 for (i = 0; i < PCI_ROM_RESOURCE; i++) 1006 if (res == &pdev->resource[i]) 1007 break; 1008 if (i >= PCI_ROM_RESOURCE) 1009 return -ENODEV; 1010 1011 port += pci_resource_start(pdev, i); 1012 1013 if (port > pci_resource_end(pdev, i)) 1014 return 0; 1015 1016 if (port + count - 1 > pci_resource_end(pdev, i)) 1017 return -EINVAL; 1018 1019 switch (count) { 1020 case 1: 1021 if (write) 1022 outb(*(u8 *)buf, port); 1023 else 1024 *(u8 *)buf = inb(port); 1025 return 1; 1026 case 2: 1027 if (write) 1028 outw(*(u16 *)buf, port); 1029 else 1030 *(u16 *)buf = inw(port); 1031 return 2; 1032 case 4: 1033 if (write) 1034 outl(*(u32 *)buf, port); 1035 else 1036 *(u32 *)buf = inl(port); 1037 return 4; 1038 } 1039 return -EINVAL; 1040 } 1041 1042 static ssize_t 1043 pci_read_resource_io(struct file *filp, struct kobject *kobj, 1044 struct bin_attribute *attr, char *buf, 1045 loff_t off, size_t count) 1046 { 1047 return pci_resource_io(filp, kobj, attr, buf, off, count, false); 1048 } 1049 1050 static ssize_t 1051 pci_write_resource_io(struct file *filp, struct kobject *kobj, 1052 struct bin_attribute *attr, char *buf, 1053 loff_t off, size_t count) 1054 { 1055 return pci_resource_io(filp, kobj, attr, buf, off, count, true); 1056 } 1057 1058 /** 1059 * pci_remove_resource_files - cleanup resource files 1060 * @pdev: dev to cleanup 1061 * 1062 * If we created resource files for @pdev, remove them from sysfs and 1063 * free their resources. 1064 */ 1065 static void 1066 pci_remove_resource_files(struct pci_dev *pdev) 1067 { 1068 int i; 1069 1070 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1071 struct bin_attribute *res_attr; 1072 1073 res_attr = pdev->res_attr[i]; 1074 if (res_attr) { 1075 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1076 kfree(res_attr); 1077 } 1078 1079 res_attr = pdev->res_attr_wc[i]; 1080 if (res_attr) { 1081 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1082 kfree(res_attr); 1083 } 1084 } 1085 } 1086 1087 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) 1088 { 1089 /* allocate attribute structure, piggyback attribute name */ 1090 int name_len = write_combine ? 13 : 10; 1091 struct bin_attribute *res_attr; 1092 int retval; 1093 1094 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); 1095 if (res_attr) { 1096 char *res_attr_name = (char *)(res_attr + 1); 1097 1098 sysfs_bin_attr_init(res_attr); 1099 if (write_combine) { 1100 pdev->res_attr_wc[num] = res_attr; 1101 sprintf(res_attr_name, "resource%d_wc", num); 1102 res_attr->mmap = pci_mmap_resource_wc; 1103 } else { 1104 pdev->res_attr[num] = res_attr; 1105 sprintf(res_attr_name, "resource%d", num); 1106 res_attr->mmap = pci_mmap_resource_uc; 1107 } 1108 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { 1109 res_attr->read = pci_read_resource_io; 1110 res_attr->write = pci_write_resource_io; 1111 } 1112 res_attr->attr.name = res_attr_name; 1113 res_attr->attr.mode = S_IRUSR | S_IWUSR; 1114 res_attr->size = pci_resource_len(pdev, num); 1115 res_attr->private = &pdev->resource[num]; 1116 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); 1117 } else 1118 retval = -ENOMEM; 1119 1120 return retval; 1121 } 1122 1123 /** 1124 * pci_create_resource_files - create resource files in sysfs for @dev 1125 * @pdev: dev in question 1126 * 1127 * Walk the resources in @pdev creating files for each resource available. 1128 */ 1129 static int pci_create_resource_files(struct pci_dev *pdev) 1130 { 1131 int i; 1132 int retval; 1133 1134 /* Expose the PCI resources from this device as files */ 1135 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1136 1137 /* skip empty resources */ 1138 if (!pci_resource_len(pdev, i)) 1139 continue; 1140 1141 retval = pci_create_attr(pdev, i, 0); 1142 /* for prefetchable resources, create a WC mappable file */ 1143 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH) 1144 retval = pci_create_attr(pdev, i, 1); 1145 1146 if (retval) { 1147 pci_remove_resource_files(pdev); 1148 return retval; 1149 } 1150 } 1151 return 0; 1152 } 1153 #else /* !HAVE_PCI_MMAP */ 1154 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } 1155 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } 1156 #endif /* HAVE_PCI_MMAP */ 1157 1158 /** 1159 * pci_write_rom - used to enable access to the PCI ROM display 1160 * @filp: sysfs file 1161 * @kobj: kernel object handle 1162 * @bin_attr: struct bin_attribute for this file 1163 * @buf: user input 1164 * @off: file offset 1165 * @count: number of byte in input 1166 * 1167 * writing anything except 0 enables it 1168 */ 1169 static ssize_t 1170 pci_write_rom(struct file *filp, struct kobject *kobj, 1171 struct bin_attribute *bin_attr, 1172 char *buf, loff_t off, size_t count) 1173 { 1174 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); 1175 1176 if ((off == 0) && (*buf == '0') && (count == 2)) 1177 pdev->rom_attr_enabled = 0; 1178 else 1179 pdev->rom_attr_enabled = 1; 1180 1181 return count; 1182 } 1183 1184 /** 1185 * pci_read_rom - read a PCI ROM 1186 * @filp: sysfs file 1187 * @kobj: kernel object handle 1188 * @bin_attr: struct bin_attribute for this file 1189 * @buf: where to put the data we read from the ROM 1190 * @off: file offset 1191 * @count: number of bytes to read 1192 * 1193 * Put @count bytes starting at @off into @buf from the ROM in the PCI 1194 * device corresponding to @kobj. 1195 */ 1196 static ssize_t 1197 pci_read_rom(struct file *filp, struct kobject *kobj, 1198 struct bin_attribute *bin_attr, 1199 char *buf, loff_t off, size_t count) 1200 { 1201 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); 1202 void __iomem *rom; 1203 size_t size; 1204 1205 if (!pdev->rom_attr_enabled) 1206 return -EINVAL; 1207 1208 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ 1209 if (!rom || !size) 1210 return -EIO; 1211 1212 if (off >= size) 1213 count = 0; 1214 else { 1215 if (off + count > size) 1216 count = size - off; 1217 1218 memcpy_fromio(buf, rom + off, count); 1219 } 1220 pci_unmap_rom(pdev, rom); 1221 1222 return count; 1223 } 1224 1225 static struct bin_attribute pci_config_attr = { 1226 .attr = { 1227 .name = "config", 1228 .mode = S_IRUGO | S_IWUSR, 1229 }, 1230 .size = PCI_CFG_SPACE_SIZE, 1231 .read = pci_read_config, 1232 .write = pci_write_config, 1233 }; 1234 1235 static struct bin_attribute pcie_config_attr = { 1236 .attr = { 1237 .name = "config", 1238 .mode = S_IRUGO | S_IWUSR, 1239 }, 1240 .size = PCI_CFG_SPACE_EXP_SIZE, 1241 .read = pci_read_config, 1242 .write = pci_write_config, 1243 }; 1244 1245 int __weak pcibios_add_platform_entries(struct pci_dev *dev) 1246 { 1247 return 0; 1248 } 1249 1250 static ssize_t reset_store(struct device *dev, 1251 struct device_attribute *attr, const char *buf, 1252 size_t count) 1253 { 1254 struct pci_dev *pdev = to_pci_dev(dev); 1255 unsigned long val; 1256 ssize_t result = strict_strtoul(buf, 0, &val); 1257 1258 if (result < 0) 1259 return result; 1260 1261 if (val != 1) 1262 return -EINVAL; 1263 1264 result = pci_reset_function(pdev); 1265 if (result < 0) 1266 return result; 1267 1268 return count; 1269 } 1270 1271 static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store); 1272 1273 static int pci_create_capabilities_sysfs(struct pci_dev *dev) 1274 { 1275 int retval; 1276 struct bin_attribute *attr; 1277 1278 /* If the device has VPD, try to expose it in sysfs. */ 1279 if (dev->vpd) { 1280 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1281 if (!attr) 1282 return -ENOMEM; 1283 1284 sysfs_bin_attr_init(attr); 1285 attr->size = dev->vpd->len; 1286 attr->attr.name = "vpd"; 1287 attr->attr.mode = S_IRUSR | S_IWUSR; 1288 attr->read = read_vpd_attr; 1289 attr->write = write_vpd_attr; 1290 retval = sysfs_create_bin_file(&dev->dev.kobj, attr); 1291 if (retval) { 1292 kfree(attr); 1293 return retval; 1294 } 1295 dev->vpd->attr = attr; 1296 } 1297 1298 /* Active State Power Management */ 1299 pcie_aspm_create_sysfs_dev_files(dev); 1300 1301 if (!pci_probe_reset_function(dev)) { 1302 retval = device_create_file(&dev->dev, &reset_attr); 1303 if (retval) 1304 goto error; 1305 dev->reset_fn = 1; 1306 } 1307 return 0; 1308 1309 error: 1310 pcie_aspm_remove_sysfs_dev_files(dev); 1311 if (dev->vpd && dev->vpd->attr) { 1312 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1313 kfree(dev->vpd->attr); 1314 } 1315 1316 return retval; 1317 } 1318 1319 int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev) 1320 { 1321 int retval; 1322 int rom_size = 0; 1323 struct bin_attribute *attr; 1324 1325 if (!sysfs_initialized) 1326 return -EACCES; 1327 1328 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) 1329 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr); 1330 else 1331 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1332 if (retval) 1333 goto err; 1334 1335 retval = pci_create_resource_files(pdev); 1336 if (retval) 1337 goto err_config_file; 1338 1339 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) 1340 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1341 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW) 1342 rom_size = 0x20000; 1343 1344 /* If the device has a ROM, try to expose it in sysfs. */ 1345 if (rom_size) { 1346 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1347 if (!attr) { 1348 retval = -ENOMEM; 1349 goto err_resource_files; 1350 } 1351 sysfs_bin_attr_init(attr); 1352 attr->size = rom_size; 1353 attr->attr.name = "rom"; 1354 attr->attr.mode = S_IRUSR | S_IWUSR; 1355 attr->read = pci_read_rom; 1356 attr->write = pci_write_rom; 1357 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr); 1358 if (retval) { 1359 kfree(attr); 1360 goto err_resource_files; 1361 } 1362 pdev->rom_attr = attr; 1363 } 1364 1365 /* add platform-specific attributes */ 1366 retval = pcibios_add_platform_entries(pdev); 1367 if (retval) 1368 goto err_rom_file; 1369 1370 /* add sysfs entries for various capabilities */ 1371 retval = pci_create_capabilities_sysfs(pdev); 1372 if (retval) 1373 goto err_rom_file; 1374 1375 pci_create_firmware_label_files(pdev); 1376 1377 return 0; 1378 1379 err_rom_file: 1380 if (rom_size) { 1381 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1382 kfree(pdev->rom_attr); 1383 pdev->rom_attr = NULL; 1384 } 1385 err_resource_files: 1386 pci_remove_resource_files(pdev); 1387 err_config_file: 1388 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) 1389 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1390 else 1391 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1392 err: 1393 return retval; 1394 } 1395 1396 static void pci_remove_capabilities_sysfs(struct pci_dev *dev) 1397 { 1398 if (dev->vpd && dev->vpd->attr) { 1399 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1400 kfree(dev->vpd->attr); 1401 } 1402 1403 pcie_aspm_remove_sysfs_dev_files(dev); 1404 if (dev->reset_fn) { 1405 device_remove_file(&dev->dev, &reset_attr); 1406 dev->reset_fn = 0; 1407 } 1408 } 1409 1410 /** 1411 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files 1412 * @pdev: device whose entries we should free 1413 * 1414 * Cleanup when @pdev is removed from sysfs. 1415 */ 1416 void pci_remove_sysfs_dev_files(struct pci_dev *pdev) 1417 { 1418 int rom_size = 0; 1419 1420 if (!sysfs_initialized) 1421 return; 1422 1423 pci_remove_capabilities_sysfs(pdev); 1424 1425 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) 1426 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1427 else 1428 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1429 1430 pci_remove_resource_files(pdev); 1431 1432 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) 1433 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1434 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW) 1435 rom_size = 0x20000; 1436 1437 if (rom_size && pdev->rom_attr) { 1438 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1439 kfree(pdev->rom_attr); 1440 } 1441 1442 pci_remove_firmware_label_files(pdev); 1443 1444 } 1445 1446 static int __init pci_sysfs_init(void) 1447 { 1448 struct pci_dev *pdev = NULL; 1449 int retval; 1450 1451 sysfs_initialized = 1; 1452 for_each_pci_dev(pdev) { 1453 retval = pci_create_sysfs_dev_files(pdev); 1454 if (retval) { 1455 pci_dev_put(pdev); 1456 return retval; 1457 } 1458 } 1459 1460 return 0; 1461 } 1462 1463 late_initcall(pci_sysfs_init); 1464 1465 static struct attribute *pci_dev_dev_attrs[] = { 1466 &vga_attr.attr, 1467 NULL, 1468 }; 1469 1470 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj, 1471 struct attribute *a, int n) 1472 { 1473 struct device *dev = container_of(kobj, struct device, kobj); 1474 struct pci_dev *pdev = to_pci_dev(dev); 1475 1476 if (a == &vga_attr.attr) 1477 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) 1478 return 0; 1479 1480 return a->mode; 1481 } 1482 1483 #ifdef CONFIG_PCI_IOV 1484 static struct attribute *sriov_dev_attrs[] = { 1485 &sriov_totalvfs_attr.attr, 1486 &sriov_numvfs_attr.attr, 1487 NULL, 1488 }; 1489 1490 static umode_t sriov_attrs_are_visible(struct kobject *kobj, 1491 struct attribute *a, int n) 1492 { 1493 struct device *dev = container_of(kobj, struct device, kobj); 1494 1495 if (!dev_is_pf(dev)) 1496 return 0; 1497 1498 return a->mode; 1499 } 1500 1501 static struct attribute_group sriov_dev_attr_group = { 1502 .attrs = sriov_dev_attrs, 1503 .is_visible = sriov_attrs_are_visible, 1504 }; 1505 #endif /* CONFIG_PCI_IOV */ 1506 1507 static struct attribute_group pci_dev_attr_group = { 1508 .attrs = pci_dev_dev_attrs, 1509 .is_visible = pci_dev_attrs_are_visible, 1510 }; 1511 1512 static const struct attribute_group *pci_dev_attr_groups[] = { 1513 &pci_dev_attr_group, 1514 #ifdef CONFIG_PCI_IOV 1515 &sriov_dev_attr_group, 1516 #endif 1517 NULL, 1518 }; 1519 1520 struct device_type pci_dev_type = { 1521 .groups = pci_dev_attr_groups, 1522 }; 1523