1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> 4 * (C) Copyright 2002-2004 IBM Corp. 5 * (C) Copyright 2003 Matthew Wilcox 6 * (C) Copyright 2003 Hewlett-Packard 7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> 8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> 9 * 10 * File attributes for PCI devices 11 * 12 * Modeled after usb's driverfs.c 13 */ 14 15 #include <linux/bitfield.h> 16 #include <linux/kernel.h> 17 #include <linux/sched.h> 18 #include <linux/pci.h> 19 #include <linux/stat.h> 20 #include <linux/export.h> 21 #include <linux/topology.h> 22 #include <linux/mm.h> 23 #include <linux/fs.h> 24 #include <linux/capability.h> 25 #include <linux/security.h> 26 #include <linux/slab.h> 27 #include <linux/vgaarb.h> 28 #include <linux/pm_runtime.h> 29 #include <linux/msi.h> 30 #include <linux/of.h> 31 #include <linux/aperture.h> 32 #include "pci.h" 33 34 #ifndef ARCH_PCI_DEV_GROUPS 35 #define ARCH_PCI_DEV_GROUPS 36 #endif 37 38 static int sysfs_initialized; /* = 0 */ 39 40 /* show configuration fields */ 41 #define pci_config_attr(field, format_string) \ 42 static ssize_t \ 43 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ 44 { \ 45 struct pci_dev *pdev; \ 46 \ 47 pdev = to_pci_dev(dev); \ 48 return sysfs_emit(buf, format_string, pdev->field); \ 49 } \ 50 static DEVICE_ATTR_RO(field) 51 52 pci_config_attr(vendor, "0x%04x\n"); 53 pci_config_attr(device, "0x%04x\n"); 54 pci_config_attr(subsystem_vendor, "0x%04x\n"); 55 pci_config_attr(subsystem_device, "0x%04x\n"); 56 pci_config_attr(revision, "0x%02x\n"); 57 pci_config_attr(class, "0x%06x\n"); 58 59 static ssize_t irq_show(struct device *dev, 60 struct device_attribute *attr, 61 char *buf) 62 { 63 struct pci_dev *pdev = to_pci_dev(dev); 64 65 #ifdef CONFIG_PCI_MSI 66 /* 67 * For MSI, show the first MSI IRQ; for all other cases including 68 * MSI-X, show the legacy INTx IRQ. 69 */ 70 if (pdev->msi_enabled) 71 return sysfs_emit(buf, "%u\n", pci_irq_vector(pdev, 0)); 72 #endif 73 74 return sysfs_emit(buf, "%u\n", pdev->irq); 75 } 76 static DEVICE_ATTR_RO(irq); 77 78 static ssize_t broken_parity_status_show(struct device *dev, 79 struct device_attribute *attr, 80 char *buf) 81 { 82 struct pci_dev *pdev = to_pci_dev(dev); 83 return sysfs_emit(buf, "%u\n", pdev->broken_parity_status); 84 } 85 86 static ssize_t broken_parity_status_store(struct device *dev, 87 struct device_attribute *attr, 88 const char *buf, size_t count) 89 { 90 struct pci_dev *pdev = to_pci_dev(dev); 91 unsigned long val; 92 93 if (kstrtoul(buf, 0, &val) < 0) 94 return -EINVAL; 95 96 pdev->broken_parity_status = !!val; 97 98 return count; 99 } 100 static DEVICE_ATTR_RW(broken_parity_status); 101 102 static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list, 103 struct device_attribute *attr, char *buf) 104 { 105 const struct cpumask *mask; 106 107 #ifdef CONFIG_NUMA 108 if (dev_to_node(dev) == NUMA_NO_NODE) 109 mask = cpu_online_mask; 110 else 111 mask = cpumask_of_node(dev_to_node(dev)); 112 #else 113 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 114 #endif 115 return cpumap_print_to_pagebuf(list, buf, mask); 116 } 117 118 static ssize_t local_cpus_show(struct device *dev, 119 struct device_attribute *attr, char *buf) 120 { 121 return pci_dev_show_local_cpu(dev, false, attr, buf); 122 } 123 static DEVICE_ATTR_RO(local_cpus); 124 125 static ssize_t local_cpulist_show(struct device *dev, 126 struct device_attribute *attr, char *buf) 127 { 128 return pci_dev_show_local_cpu(dev, true, attr, buf); 129 } 130 static DEVICE_ATTR_RO(local_cpulist); 131 132 /* 133 * PCI Bus Class Devices 134 */ 135 static ssize_t cpuaffinity_show(struct device *dev, 136 struct device_attribute *attr, char *buf) 137 { 138 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 139 140 return cpumap_print_to_pagebuf(false, buf, cpumask); 141 } 142 static DEVICE_ATTR_RO(cpuaffinity); 143 144 static ssize_t cpulistaffinity_show(struct device *dev, 145 struct device_attribute *attr, char *buf) 146 { 147 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 148 149 return cpumap_print_to_pagebuf(true, buf, cpumask); 150 } 151 static DEVICE_ATTR_RO(cpulistaffinity); 152 153 static ssize_t power_state_show(struct device *dev, 154 struct device_attribute *attr, char *buf) 155 { 156 struct pci_dev *pdev = to_pci_dev(dev); 157 158 return sysfs_emit(buf, "%s\n", pci_power_name(pdev->current_state)); 159 } 160 static DEVICE_ATTR_RO(power_state); 161 162 /* show resources */ 163 static ssize_t resource_show(struct device *dev, struct device_attribute *attr, 164 char *buf) 165 { 166 struct pci_dev *pci_dev = to_pci_dev(dev); 167 int i; 168 int max; 169 resource_size_t start, end; 170 size_t len = 0; 171 172 if (pci_dev->subordinate) 173 max = DEVICE_COUNT_RESOURCE; 174 else 175 max = PCI_BRIDGE_RESOURCES; 176 177 for (i = 0; i < max; i++) { 178 struct resource *res = &pci_dev->resource[i]; 179 pci_resource_to_user(pci_dev, i, res, &start, &end); 180 len += sysfs_emit_at(buf, len, "0x%016llx 0x%016llx 0x%016llx\n", 181 (unsigned long long)start, 182 (unsigned long long)end, 183 (unsigned long long)res->flags); 184 } 185 return len; 186 } 187 static DEVICE_ATTR_RO(resource); 188 189 static ssize_t max_link_speed_show(struct device *dev, 190 struct device_attribute *attr, char *buf) 191 { 192 struct pci_dev *pdev = to_pci_dev(dev); 193 194 return sysfs_emit(buf, "%s\n", 195 pci_speed_string(pcie_get_speed_cap(pdev))); 196 } 197 static DEVICE_ATTR_RO(max_link_speed); 198 199 static ssize_t max_link_width_show(struct device *dev, 200 struct device_attribute *attr, char *buf) 201 { 202 struct pci_dev *pdev = to_pci_dev(dev); 203 204 return sysfs_emit(buf, "%u\n", pcie_get_width_cap(pdev)); 205 } 206 static DEVICE_ATTR_RO(max_link_width); 207 208 static ssize_t current_link_speed_show(struct device *dev, 209 struct device_attribute *attr, char *buf) 210 { 211 struct pci_dev *pci_dev = to_pci_dev(dev); 212 u16 linkstat; 213 int err; 214 enum pci_bus_speed speed; 215 216 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 217 if (err) 218 return -EINVAL; 219 220 speed = pcie_link_speed[linkstat & PCI_EXP_LNKSTA_CLS]; 221 222 return sysfs_emit(buf, "%s\n", pci_speed_string(speed)); 223 } 224 static DEVICE_ATTR_RO(current_link_speed); 225 226 static ssize_t current_link_width_show(struct device *dev, 227 struct device_attribute *attr, char *buf) 228 { 229 struct pci_dev *pci_dev = to_pci_dev(dev); 230 u16 linkstat; 231 int err; 232 233 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat); 234 if (err) 235 return -EINVAL; 236 237 return sysfs_emit(buf, "%u\n", FIELD_GET(PCI_EXP_LNKSTA_NLW, linkstat)); 238 } 239 static DEVICE_ATTR_RO(current_link_width); 240 241 static ssize_t secondary_bus_number_show(struct device *dev, 242 struct device_attribute *attr, 243 char *buf) 244 { 245 struct pci_dev *pci_dev = to_pci_dev(dev); 246 u8 sec_bus; 247 int err; 248 249 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus); 250 if (err) 251 return -EINVAL; 252 253 return sysfs_emit(buf, "%u\n", sec_bus); 254 } 255 static DEVICE_ATTR_RO(secondary_bus_number); 256 257 static ssize_t subordinate_bus_number_show(struct device *dev, 258 struct device_attribute *attr, 259 char *buf) 260 { 261 struct pci_dev *pci_dev = to_pci_dev(dev); 262 u8 sub_bus; 263 int err; 264 265 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus); 266 if (err) 267 return -EINVAL; 268 269 return sysfs_emit(buf, "%u\n", sub_bus); 270 } 271 static DEVICE_ATTR_RO(subordinate_bus_number); 272 273 static ssize_t ari_enabled_show(struct device *dev, 274 struct device_attribute *attr, 275 char *buf) 276 { 277 struct pci_dev *pci_dev = to_pci_dev(dev); 278 279 return sysfs_emit(buf, "%u\n", pci_ari_enabled(pci_dev->bus)); 280 } 281 static DEVICE_ATTR_RO(ari_enabled); 282 283 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, 284 char *buf) 285 { 286 struct pci_dev *pci_dev = to_pci_dev(dev); 287 288 return sysfs_emit(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n", 289 pci_dev->vendor, pci_dev->device, 290 pci_dev->subsystem_vendor, pci_dev->subsystem_device, 291 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), 292 (u8)(pci_dev->class)); 293 } 294 static DEVICE_ATTR_RO(modalias); 295 296 static ssize_t enable_store(struct device *dev, struct device_attribute *attr, 297 const char *buf, size_t count) 298 { 299 struct pci_dev *pdev = to_pci_dev(dev); 300 unsigned long val; 301 ssize_t result = 0; 302 303 /* this can crash the machine when done on the "wrong" device */ 304 if (!capable(CAP_SYS_ADMIN)) 305 return -EPERM; 306 307 if (kstrtoul(buf, 0, &val) < 0) 308 return -EINVAL; 309 310 device_lock(dev); 311 if (dev->driver) 312 result = -EBUSY; 313 else if (val) 314 result = pci_enable_device(pdev); 315 else if (pci_is_enabled(pdev)) 316 pci_disable_device(pdev); 317 else 318 result = -EIO; 319 device_unlock(dev); 320 321 return result < 0 ? result : count; 322 } 323 324 static ssize_t enable_show(struct device *dev, struct device_attribute *attr, 325 char *buf) 326 { 327 struct pci_dev *pdev; 328 329 pdev = to_pci_dev(dev); 330 return sysfs_emit(buf, "%u\n", atomic_read(&pdev->enable_cnt)); 331 } 332 static DEVICE_ATTR_RW(enable); 333 334 #ifdef CONFIG_NUMA 335 static ssize_t numa_node_store(struct device *dev, 336 struct device_attribute *attr, const char *buf, 337 size_t count) 338 { 339 struct pci_dev *pdev = to_pci_dev(dev); 340 int node; 341 342 if (!capable(CAP_SYS_ADMIN)) 343 return -EPERM; 344 345 if (kstrtoint(buf, 0, &node) < 0) 346 return -EINVAL; 347 348 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES) 349 return -EINVAL; 350 351 if (node != NUMA_NO_NODE && !node_online(node)) 352 return -EINVAL; 353 354 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); 355 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.", 356 node); 357 358 dev->numa_node = node; 359 return count; 360 } 361 362 static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr, 363 char *buf) 364 { 365 return sysfs_emit(buf, "%d\n", dev->numa_node); 366 } 367 static DEVICE_ATTR_RW(numa_node); 368 #endif 369 370 static ssize_t dma_mask_bits_show(struct device *dev, 371 struct device_attribute *attr, char *buf) 372 { 373 struct pci_dev *pdev = to_pci_dev(dev); 374 375 return sysfs_emit(buf, "%d\n", fls64(pdev->dma_mask)); 376 } 377 static DEVICE_ATTR_RO(dma_mask_bits); 378 379 static ssize_t consistent_dma_mask_bits_show(struct device *dev, 380 struct device_attribute *attr, 381 char *buf) 382 { 383 return sysfs_emit(buf, "%d\n", fls64(dev->coherent_dma_mask)); 384 } 385 static DEVICE_ATTR_RO(consistent_dma_mask_bits); 386 387 static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr, 388 char *buf) 389 { 390 struct pci_dev *pdev = to_pci_dev(dev); 391 struct pci_bus *subordinate = pdev->subordinate; 392 393 return sysfs_emit(buf, "%u\n", subordinate ? 394 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) 395 : !pdev->no_msi); 396 } 397 398 static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr, 399 const char *buf, size_t count) 400 { 401 struct pci_dev *pdev = to_pci_dev(dev); 402 struct pci_bus *subordinate = pdev->subordinate; 403 unsigned long val; 404 405 if (!capable(CAP_SYS_ADMIN)) 406 return -EPERM; 407 408 if (kstrtoul(buf, 0, &val) < 0) 409 return -EINVAL; 410 411 /* 412 * "no_msi" and "bus_flags" only affect what happens when a driver 413 * requests MSI or MSI-X. They don't affect any drivers that have 414 * already requested MSI or MSI-X. 415 */ 416 if (!subordinate) { 417 pdev->no_msi = !val; 418 pci_info(pdev, "MSI/MSI-X %s for future drivers\n", 419 val ? "allowed" : "disallowed"); 420 return count; 421 } 422 423 if (val) 424 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI; 425 else 426 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; 427 428 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n", 429 val ? "allowed" : "disallowed"); 430 return count; 431 } 432 static DEVICE_ATTR_RW(msi_bus); 433 434 static ssize_t rescan_store(const struct bus_type *bus, const char *buf, size_t count) 435 { 436 unsigned long val; 437 struct pci_bus *b = NULL; 438 439 if (kstrtoul(buf, 0, &val) < 0) 440 return -EINVAL; 441 442 if (val) { 443 pci_lock_rescan_remove(); 444 while ((b = pci_find_next_bus(b)) != NULL) 445 pci_rescan_bus(b); 446 pci_unlock_rescan_remove(); 447 } 448 return count; 449 } 450 static BUS_ATTR_WO(rescan); 451 452 static struct attribute *pci_bus_attrs[] = { 453 &bus_attr_rescan.attr, 454 NULL, 455 }; 456 457 static const struct attribute_group pci_bus_group = { 458 .attrs = pci_bus_attrs, 459 }; 460 461 const struct attribute_group *pci_bus_groups[] = { 462 &pci_bus_group, 463 NULL, 464 }; 465 466 static ssize_t dev_rescan_store(struct device *dev, 467 struct device_attribute *attr, const char *buf, 468 size_t count) 469 { 470 unsigned long val; 471 struct pci_dev *pdev = to_pci_dev(dev); 472 473 if (kstrtoul(buf, 0, &val) < 0) 474 return -EINVAL; 475 476 if (val) { 477 pci_lock_rescan_remove(); 478 pci_rescan_bus(pdev->bus); 479 pci_unlock_rescan_remove(); 480 } 481 return count; 482 } 483 static struct device_attribute dev_attr_dev_rescan = __ATTR(rescan, 0200, NULL, 484 dev_rescan_store); 485 486 static ssize_t remove_store(struct device *dev, struct device_attribute *attr, 487 const char *buf, size_t count) 488 { 489 unsigned long val; 490 491 if (kstrtoul(buf, 0, &val) < 0) 492 return -EINVAL; 493 494 if (val && device_remove_file_self(dev, attr)) 495 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev)); 496 return count; 497 } 498 static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL, 499 remove_store); 500 501 static ssize_t bus_rescan_store(struct device *dev, 502 struct device_attribute *attr, 503 const char *buf, size_t count) 504 { 505 unsigned long val; 506 struct pci_bus *bus = to_pci_bus(dev); 507 508 if (kstrtoul(buf, 0, &val) < 0) 509 return -EINVAL; 510 511 if (val) { 512 pci_lock_rescan_remove(); 513 if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) 514 pci_rescan_bus_bridge_resize(bus->self); 515 else 516 pci_rescan_bus(bus); 517 pci_unlock_rescan_remove(); 518 } 519 return count; 520 } 521 static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL, 522 bus_rescan_store); 523 524 static ssize_t reset_subordinate_store(struct device *dev, 525 struct device_attribute *attr, 526 const char *buf, size_t count) 527 { 528 struct pci_dev *pdev = to_pci_dev(dev); 529 struct pci_bus *bus = pdev->subordinate; 530 unsigned long val; 531 532 if (!capable(CAP_SYS_ADMIN)) 533 return -EPERM; 534 535 if (kstrtoul(buf, 0, &val) < 0) 536 return -EINVAL; 537 538 if (val) { 539 int ret = __pci_reset_bus(bus); 540 541 if (ret) 542 return ret; 543 } 544 545 return count; 546 } 547 static DEVICE_ATTR_WO(reset_subordinate); 548 549 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 550 static ssize_t d3cold_allowed_store(struct device *dev, 551 struct device_attribute *attr, 552 const char *buf, size_t count) 553 { 554 struct pci_dev *pdev = to_pci_dev(dev); 555 unsigned long val; 556 557 if (kstrtoul(buf, 0, &val) < 0) 558 return -EINVAL; 559 560 pdev->d3cold_allowed = !!val; 561 pci_bridge_d3_update(pdev); 562 563 pm_runtime_resume(dev); 564 565 return count; 566 } 567 568 static ssize_t d3cold_allowed_show(struct device *dev, 569 struct device_attribute *attr, char *buf) 570 { 571 struct pci_dev *pdev = to_pci_dev(dev); 572 return sysfs_emit(buf, "%u\n", pdev->d3cold_allowed); 573 } 574 static DEVICE_ATTR_RW(d3cold_allowed); 575 #endif 576 577 #ifdef CONFIG_OF 578 static ssize_t devspec_show(struct device *dev, 579 struct device_attribute *attr, char *buf) 580 { 581 struct pci_dev *pdev = to_pci_dev(dev); 582 struct device_node *np = pci_device_to_OF_node(pdev); 583 584 if (np == NULL) 585 return 0; 586 return sysfs_emit(buf, "%pOF\n", np); 587 } 588 static DEVICE_ATTR_RO(devspec); 589 #endif 590 591 static ssize_t driver_override_store(struct device *dev, 592 struct device_attribute *attr, 593 const char *buf, size_t count) 594 { 595 struct pci_dev *pdev = to_pci_dev(dev); 596 int ret; 597 598 ret = driver_set_override(dev, &pdev->driver_override, buf, count); 599 if (ret) 600 return ret; 601 602 return count; 603 } 604 605 static ssize_t driver_override_show(struct device *dev, 606 struct device_attribute *attr, char *buf) 607 { 608 struct pci_dev *pdev = to_pci_dev(dev); 609 ssize_t len; 610 611 device_lock(dev); 612 len = sysfs_emit(buf, "%s\n", pdev->driver_override); 613 device_unlock(dev); 614 return len; 615 } 616 static DEVICE_ATTR_RW(driver_override); 617 618 static struct attribute *pci_dev_attrs[] = { 619 &dev_attr_power_state.attr, 620 &dev_attr_resource.attr, 621 &dev_attr_vendor.attr, 622 &dev_attr_device.attr, 623 &dev_attr_subsystem_vendor.attr, 624 &dev_attr_subsystem_device.attr, 625 &dev_attr_revision.attr, 626 &dev_attr_class.attr, 627 &dev_attr_irq.attr, 628 &dev_attr_local_cpus.attr, 629 &dev_attr_local_cpulist.attr, 630 &dev_attr_modalias.attr, 631 #ifdef CONFIG_NUMA 632 &dev_attr_numa_node.attr, 633 #endif 634 &dev_attr_dma_mask_bits.attr, 635 &dev_attr_consistent_dma_mask_bits.attr, 636 &dev_attr_enable.attr, 637 &dev_attr_broken_parity_status.attr, 638 &dev_attr_msi_bus.attr, 639 #if defined(CONFIG_PM) && defined(CONFIG_ACPI) 640 &dev_attr_d3cold_allowed.attr, 641 #endif 642 #ifdef CONFIG_OF 643 &dev_attr_devspec.attr, 644 #endif 645 &dev_attr_driver_override.attr, 646 &dev_attr_ari_enabled.attr, 647 NULL, 648 }; 649 650 static struct attribute *pci_bridge_attrs[] = { 651 &dev_attr_subordinate_bus_number.attr, 652 &dev_attr_secondary_bus_number.attr, 653 &dev_attr_reset_subordinate.attr, 654 NULL, 655 }; 656 657 static struct attribute *pcie_dev_attrs[] = { 658 &dev_attr_current_link_speed.attr, 659 &dev_attr_current_link_width.attr, 660 &dev_attr_max_link_width.attr, 661 &dev_attr_max_link_speed.attr, 662 NULL, 663 }; 664 665 static struct attribute *pcibus_attrs[] = { 666 &dev_attr_bus_rescan.attr, 667 &dev_attr_cpuaffinity.attr, 668 &dev_attr_cpulistaffinity.attr, 669 NULL, 670 }; 671 672 static const struct attribute_group pcibus_group = { 673 .attrs = pcibus_attrs, 674 }; 675 676 const struct attribute_group *pcibus_groups[] = { 677 &pcibus_group, 678 NULL, 679 }; 680 681 static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr, 682 char *buf) 683 { 684 struct pci_dev *pdev = to_pci_dev(dev); 685 struct pci_dev *vga_dev = vga_default_device(); 686 687 if (vga_dev) 688 return sysfs_emit(buf, "%u\n", (pdev == vga_dev)); 689 690 return sysfs_emit(buf, "%u\n", 691 !!(pdev->resource[PCI_ROM_RESOURCE].flags & 692 IORESOURCE_ROM_SHADOW)); 693 } 694 static DEVICE_ATTR_RO(boot_vga); 695 696 static ssize_t pci_read_config(struct file *filp, struct kobject *kobj, 697 struct bin_attribute *bin_attr, char *buf, 698 loff_t off, size_t count) 699 { 700 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 701 unsigned int size = 64; 702 loff_t init_off = off; 703 u8 *data = (u8 *) buf; 704 705 /* Several chips lock up trying to read undefined config space */ 706 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN)) 707 size = dev->cfg_size; 708 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) 709 size = 128; 710 711 if (off > size) 712 return 0; 713 if (off + count > size) { 714 size -= off; 715 count = size; 716 } else { 717 size = count; 718 } 719 720 pci_config_pm_runtime_get(dev); 721 722 if ((off & 1) && size) { 723 u8 val; 724 pci_user_read_config_byte(dev, off, &val); 725 data[off - init_off] = val; 726 off++; 727 size--; 728 } 729 730 if ((off & 3) && size > 2) { 731 u16 val; 732 pci_user_read_config_word(dev, off, &val); 733 data[off - init_off] = val & 0xff; 734 data[off - init_off + 1] = (val >> 8) & 0xff; 735 off += 2; 736 size -= 2; 737 } 738 739 while (size > 3) { 740 u32 val; 741 pci_user_read_config_dword(dev, off, &val); 742 data[off - init_off] = val & 0xff; 743 data[off - init_off + 1] = (val >> 8) & 0xff; 744 data[off - init_off + 2] = (val >> 16) & 0xff; 745 data[off - init_off + 3] = (val >> 24) & 0xff; 746 off += 4; 747 size -= 4; 748 cond_resched(); 749 } 750 751 if (size >= 2) { 752 u16 val; 753 pci_user_read_config_word(dev, off, &val); 754 data[off - init_off] = val & 0xff; 755 data[off - init_off + 1] = (val >> 8) & 0xff; 756 off += 2; 757 size -= 2; 758 } 759 760 if (size > 0) { 761 u8 val; 762 pci_user_read_config_byte(dev, off, &val); 763 data[off - init_off] = val; 764 } 765 766 pci_config_pm_runtime_put(dev); 767 768 return count; 769 } 770 771 static ssize_t pci_write_config(struct file *filp, struct kobject *kobj, 772 struct bin_attribute *bin_attr, char *buf, 773 loff_t off, size_t count) 774 { 775 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj)); 776 unsigned int size = count; 777 loff_t init_off = off; 778 u8 *data = (u8 *) buf; 779 int ret; 780 781 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 782 if (ret) 783 return ret; 784 785 if (resource_is_exclusive(&dev->driver_exclusive_resource, off, 786 count)) { 787 pci_warn_once(dev, "%s: Unexpected write to kernel-exclusive config offset %llx", 788 current->comm, off); 789 add_taint(TAINT_USER, LOCKDEP_STILL_OK); 790 } 791 792 if (off > dev->cfg_size) 793 return 0; 794 if (off + count > dev->cfg_size) { 795 size = dev->cfg_size - off; 796 count = size; 797 } 798 799 pci_config_pm_runtime_get(dev); 800 801 if ((off & 1) && size) { 802 pci_user_write_config_byte(dev, off, data[off - init_off]); 803 off++; 804 size--; 805 } 806 807 if ((off & 3) && size > 2) { 808 u16 val = data[off - init_off]; 809 val |= (u16) data[off - init_off + 1] << 8; 810 pci_user_write_config_word(dev, off, val); 811 off += 2; 812 size -= 2; 813 } 814 815 while (size > 3) { 816 u32 val = data[off - init_off]; 817 val |= (u32) data[off - init_off + 1] << 8; 818 val |= (u32) data[off - init_off + 2] << 16; 819 val |= (u32) data[off - init_off + 3] << 24; 820 pci_user_write_config_dword(dev, off, val); 821 off += 4; 822 size -= 4; 823 } 824 825 if (size >= 2) { 826 u16 val = data[off - init_off]; 827 val |= (u16) data[off - init_off + 1] << 8; 828 pci_user_write_config_word(dev, off, val); 829 off += 2; 830 size -= 2; 831 } 832 833 if (size) 834 pci_user_write_config_byte(dev, off, data[off - init_off]); 835 836 pci_config_pm_runtime_put(dev); 837 838 return count; 839 } 840 static BIN_ATTR(config, 0644, pci_read_config, pci_write_config, 0); 841 842 static struct bin_attribute *pci_dev_config_attrs[] = { 843 &bin_attr_config, 844 NULL, 845 }; 846 847 static umode_t pci_dev_config_attr_is_visible(struct kobject *kobj, 848 struct bin_attribute *a, int n) 849 { 850 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 851 852 a->size = PCI_CFG_SPACE_SIZE; 853 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE) 854 a->size = PCI_CFG_SPACE_EXP_SIZE; 855 856 return a->attr.mode; 857 } 858 859 static const struct attribute_group pci_dev_config_attr_group = { 860 .bin_attrs = pci_dev_config_attrs, 861 .is_bin_visible = pci_dev_config_attr_is_visible, 862 }; 863 864 /* 865 * llseek operation for mmappable PCI resources. 866 * May be left unused if the arch doesn't provide them. 867 */ 868 static __maybe_unused loff_t 869 pci_llseek_resource(struct file *filep, 870 struct kobject *kobj __always_unused, 871 struct bin_attribute *attr, 872 loff_t offset, int whence) 873 { 874 return fixed_size_llseek(filep, offset, whence, attr->size); 875 } 876 877 #ifdef HAVE_PCI_LEGACY 878 /** 879 * pci_read_legacy_io - read byte(s) from legacy I/O port space 880 * @filp: open sysfs file 881 * @kobj: kobject corresponding to file to read from 882 * @bin_attr: struct bin_attribute for this file 883 * @buf: buffer to store results 884 * @off: offset into legacy I/O port space 885 * @count: number of bytes to read 886 * 887 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific 888 * callback routine (pci_legacy_read). 889 */ 890 static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj, 891 struct bin_attribute *bin_attr, char *buf, 892 loff_t off, size_t count) 893 { 894 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 895 896 /* Only support 1, 2 or 4 byte accesses */ 897 if (count != 1 && count != 2 && count != 4) 898 return -EINVAL; 899 900 return pci_legacy_read(bus, off, (u32 *)buf, count); 901 } 902 903 /** 904 * pci_write_legacy_io - write byte(s) to legacy I/O port space 905 * @filp: open sysfs file 906 * @kobj: kobject corresponding to file to read from 907 * @bin_attr: struct bin_attribute for this file 908 * @buf: buffer containing value to be written 909 * @off: offset into legacy I/O port space 910 * @count: number of bytes to write 911 * 912 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific 913 * callback routine (pci_legacy_write). 914 */ 915 static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj, 916 struct bin_attribute *bin_attr, char *buf, 917 loff_t off, size_t count) 918 { 919 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 920 921 /* Only support 1, 2 or 4 byte accesses */ 922 if (count != 1 && count != 2 && count != 4) 923 return -EINVAL; 924 925 return pci_legacy_write(bus, off, *(u32 *)buf, count); 926 } 927 928 /** 929 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space 930 * @filp: open sysfs file 931 * @kobj: kobject corresponding to device to be mapped 932 * @attr: struct bin_attribute for this file 933 * @vma: struct vm_area_struct passed to mmap 934 * 935 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap 936 * legacy memory space (first meg of bus space) into application virtual 937 * memory space. 938 */ 939 static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, 940 struct bin_attribute *attr, 941 struct vm_area_struct *vma) 942 { 943 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 944 945 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); 946 } 947 948 /** 949 * pci_mmap_legacy_io - map legacy PCI IO into user memory space 950 * @filp: open sysfs file 951 * @kobj: kobject corresponding to device to be mapped 952 * @attr: struct bin_attribute for this file 953 * @vma: struct vm_area_struct passed to mmap 954 * 955 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap 956 * legacy IO space (first meg of bus space) into application virtual 957 * memory space. Returns -ENOSYS if the operation isn't supported 958 */ 959 static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, 960 struct bin_attribute *attr, 961 struct vm_area_struct *vma) 962 { 963 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj)); 964 965 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); 966 } 967 968 /** 969 * pci_adjust_legacy_attr - adjustment of legacy file attributes 970 * @b: bus to create files under 971 * @mmap_type: I/O port or memory 972 * 973 * Stub implementation. Can be overridden by arch if necessary. 974 */ 975 void __weak pci_adjust_legacy_attr(struct pci_bus *b, 976 enum pci_mmap_state mmap_type) 977 { 978 } 979 980 /** 981 * pci_create_legacy_files - create legacy I/O port and memory files 982 * @b: bus to create files under 983 * 984 * Some platforms allow access to legacy I/O port and ISA memory space on 985 * a per-bus basis. This routine creates the files and ties them into 986 * their associated read, write and mmap files from pci-sysfs.c 987 * 988 * On error unwind, but don't propagate the error to the caller 989 * as it is ok to set up the PCI bus without these files. 990 */ 991 void pci_create_legacy_files(struct pci_bus *b) 992 { 993 int error; 994 995 if (!sysfs_initialized) 996 return; 997 998 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute), 999 GFP_ATOMIC); 1000 if (!b->legacy_io) 1001 goto kzalloc_err; 1002 1003 sysfs_bin_attr_init(b->legacy_io); 1004 b->legacy_io->attr.name = "legacy_io"; 1005 b->legacy_io->size = 0xffff; 1006 b->legacy_io->attr.mode = 0600; 1007 b->legacy_io->read = pci_read_legacy_io; 1008 b->legacy_io->write = pci_write_legacy_io; 1009 /* See pci_create_attr() for motivation */ 1010 b->legacy_io->llseek = pci_llseek_resource; 1011 b->legacy_io->mmap = pci_mmap_legacy_io; 1012 b->legacy_io->f_mapping = iomem_get_mapping; 1013 pci_adjust_legacy_attr(b, pci_mmap_io); 1014 error = device_create_bin_file(&b->dev, b->legacy_io); 1015 if (error) 1016 goto legacy_io_err; 1017 1018 /* Allocated above after the legacy_io struct */ 1019 b->legacy_mem = b->legacy_io + 1; 1020 sysfs_bin_attr_init(b->legacy_mem); 1021 b->legacy_mem->attr.name = "legacy_mem"; 1022 b->legacy_mem->size = 1024*1024; 1023 b->legacy_mem->attr.mode = 0600; 1024 b->legacy_mem->mmap = pci_mmap_legacy_mem; 1025 /* See pci_create_attr() for motivation */ 1026 b->legacy_mem->llseek = pci_llseek_resource; 1027 b->legacy_mem->f_mapping = iomem_get_mapping; 1028 pci_adjust_legacy_attr(b, pci_mmap_mem); 1029 error = device_create_bin_file(&b->dev, b->legacy_mem); 1030 if (error) 1031 goto legacy_mem_err; 1032 1033 return; 1034 1035 legacy_mem_err: 1036 device_remove_bin_file(&b->dev, b->legacy_io); 1037 legacy_io_err: 1038 kfree(b->legacy_io); 1039 b->legacy_io = NULL; 1040 kzalloc_err: 1041 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n"); 1042 } 1043 1044 void pci_remove_legacy_files(struct pci_bus *b) 1045 { 1046 if (b->legacy_io) { 1047 device_remove_bin_file(&b->dev, b->legacy_io); 1048 device_remove_bin_file(&b->dev, b->legacy_mem); 1049 kfree(b->legacy_io); /* both are allocated here */ 1050 } 1051 } 1052 #endif /* HAVE_PCI_LEGACY */ 1053 1054 #if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE) 1055 /** 1056 * pci_mmap_resource - map a PCI resource into user memory space 1057 * @kobj: kobject for mapping 1058 * @attr: struct bin_attribute for the file being mapped 1059 * @vma: struct vm_area_struct passed into the mmap 1060 * @write_combine: 1 for write_combine mapping 1061 * 1062 * Use the regular PCI mapping routines to map a PCI resource into userspace. 1063 */ 1064 static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, 1065 struct vm_area_struct *vma, int write_combine) 1066 { 1067 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1068 int bar = (unsigned long)attr->private; 1069 enum pci_mmap_state mmap_type; 1070 struct resource *res = &pdev->resource[bar]; 1071 int ret; 1072 1073 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 1074 if (ret) 1075 return ret; 1076 1077 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start)) 1078 return -EINVAL; 1079 1080 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS)) 1081 return -EINVAL; 1082 1083 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; 1084 1085 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine); 1086 } 1087 1088 static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, 1089 struct bin_attribute *attr, 1090 struct vm_area_struct *vma) 1091 { 1092 return pci_mmap_resource(kobj, attr, vma, 0); 1093 } 1094 1095 static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, 1096 struct bin_attribute *attr, 1097 struct vm_area_struct *vma) 1098 { 1099 return pci_mmap_resource(kobj, attr, vma, 1); 1100 } 1101 1102 static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj, 1103 struct bin_attribute *attr, char *buf, 1104 loff_t off, size_t count, bool write) 1105 { 1106 #ifdef CONFIG_HAS_IOPORT 1107 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1108 int bar = (unsigned long)attr->private; 1109 unsigned long port = off; 1110 1111 port += pci_resource_start(pdev, bar); 1112 1113 if (port > pci_resource_end(pdev, bar)) 1114 return 0; 1115 1116 if (port + count - 1 > pci_resource_end(pdev, bar)) 1117 return -EINVAL; 1118 1119 switch (count) { 1120 case 1: 1121 if (write) 1122 outb(*(u8 *)buf, port); 1123 else 1124 *(u8 *)buf = inb(port); 1125 return 1; 1126 case 2: 1127 if (write) 1128 outw(*(u16 *)buf, port); 1129 else 1130 *(u16 *)buf = inw(port); 1131 return 2; 1132 case 4: 1133 if (write) 1134 outl(*(u32 *)buf, port); 1135 else 1136 *(u32 *)buf = inl(port); 1137 return 4; 1138 } 1139 return -EINVAL; 1140 #else 1141 return -ENXIO; 1142 #endif 1143 } 1144 1145 static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj, 1146 struct bin_attribute *attr, char *buf, 1147 loff_t off, size_t count) 1148 { 1149 return pci_resource_io(filp, kobj, attr, buf, off, count, false); 1150 } 1151 1152 static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj, 1153 struct bin_attribute *attr, char *buf, 1154 loff_t off, size_t count) 1155 { 1156 int ret; 1157 1158 ret = security_locked_down(LOCKDOWN_PCI_ACCESS); 1159 if (ret) 1160 return ret; 1161 1162 return pci_resource_io(filp, kobj, attr, buf, off, count, true); 1163 } 1164 1165 /** 1166 * pci_remove_resource_files - cleanup resource files 1167 * @pdev: dev to cleanup 1168 * 1169 * If we created resource files for @pdev, remove them from sysfs and 1170 * free their resources. 1171 */ 1172 static void pci_remove_resource_files(struct pci_dev *pdev) 1173 { 1174 int i; 1175 1176 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 1177 struct bin_attribute *res_attr; 1178 1179 res_attr = pdev->res_attr[i]; 1180 if (res_attr) { 1181 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1182 kfree(res_attr); 1183 } 1184 1185 res_attr = pdev->res_attr_wc[i]; 1186 if (res_attr) { 1187 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 1188 kfree(res_attr); 1189 } 1190 } 1191 } 1192 1193 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) 1194 { 1195 /* allocate attribute structure, piggyback attribute name */ 1196 int name_len = write_combine ? 13 : 10; 1197 struct bin_attribute *res_attr; 1198 char *res_attr_name; 1199 int retval; 1200 1201 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); 1202 if (!res_attr) 1203 return -ENOMEM; 1204 1205 res_attr_name = (char *)(res_attr + 1); 1206 1207 sysfs_bin_attr_init(res_attr); 1208 if (write_combine) { 1209 sprintf(res_attr_name, "resource%d_wc", num); 1210 res_attr->mmap = pci_mmap_resource_wc; 1211 } else { 1212 sprintf(res_attr_name, "resource%d", num); 1213 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { 1214 res_attr->read = pci_read_resource_io; 1215 res_attr->write = pci_write_resource_io; 1216 if (arch_can_pci_mmap_io()) 1217 res_attr->mmap = pci_mmap_resource_uc; 1218 } else { 1219 res_attr->mmap = pci_mmap_resource_uc; 1220 } 1221 } 1222 if (res_attr->mmap) { 1223 res_attr->f_mapping = iomem_get_mapping; 1224 /* 1225 * generic_file_llseek() consults f_mapping->host to determine 1226 * the file size. As iomem_inode knows nothing about the 1227 * attribute, it's not going to work, so override it as well. 1228 */ 1229 res_attr->llseek = pci_llseek_resource; 1230 } 1231 res_attr->attr.name = res_attr_name; 1232 res_attr->attr.mode = 0600; 1233 res_attr->size = pci_resource_len(pdev, num); 1234 res_attr->private = (void *)(unsigned long)num; 1235 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); 1236 if (retval) { 1237 kfree(res_attr); 1238 return retval; 1239 } 1240 1241 if (write_combine) 1242 pdev->res_attr_wc[num] = res_attr; 1243 else 1244 pdev->res_attr[num] = res_attr; 1245 1246 return 0; 1247 } 1248 1249 /** 1250 * pci_create_resource_files - create resource files in sysfs for @dev 1251 * @pdev: dev in question 1252 * 1253 * Walk the resources in @pdev creating files for each resource available. 1254 */ 1255 static int pci_create_resource_files(struct pci_dev *pdev) 1256 { 1257 int i; 1258 int retval; 1259 1260 /* Expose the PCI resources from this device as files */ 1261 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 1262 1263 /* skip empty resources */ 1264 if (!pci_resource_len(pdev, i)) 1265 continue; 1266 1267 retval = pci_create_attr(pdev, i, 0); 1268 /* for prefetchable resources, create a WC mappable file */ 1269 if (!retval && arch_can_pci_mmap_wc() && 1270 pdev->resource[i].flags & IORESOURCE_PREFETCH) 1271 retval = pci_create_attr(pdev, i, 1); 1272 if (retval) { 1273 pci_remove_resource_files(pdev); 1274 return retval; 1275 } 1276 } 1277 return 0; 1278 } 1279 #else /* !(defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)) */ 1280 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } 1281 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } 1282 #endif 1283 1284 /** 1285 * pci_write_rom - used to enable access to the PCI ROM display 1286 * @filp: sysfs file 1287 * @kobj: kernel object handle 1288 * @bin_attr: struct bin_attribute for this file 1289 * @buf: user input 1290 * @off: file offset 1291 * @count: number of byte in input 1292 * 1293 * writing anything except 0 enables it 1294 */ 1295 static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj, 1296 struct bin_attribute *bin_attr, char *buf, 1297 loff_t off, size_t count) 1298 { 1299 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1300 1301 if ((off == 0) && (*buf == '0') && (count == 2)) 1302 pdev->rom_attr_enabled = 0; 1303 else 1304 pdev->rom_attr_enabled = 1; 1305 1306 return count; 1307 } 1308 1309 /** 1310 * pci_read_rom - read a PCI ROM 1311 * @filp: sysfs file 1312 * @kobj: kernel object handle 1313 * @bin_attr: struct bin_attribute for this file 1314 * @buf: where to put the data we read from the ROM 1315 * @off: file offset 1316 * @count: number of bytes to read 1317 * 1318 * Put @count bytes starting at @off into @buf from the ROM in the PCI 1319 * device corresponding to @kobj. 1320 */ 1321 static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj, 1322 struct bin_attribute *bin_attr, char *buf, 1323 loff_t off, size_t count) 1324 { 1325 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1326 void __iomem *rom; 1327 size_t size; 1328 1329 if (!pdev->rom_attr_enabled) 1330 return -EINVAL; 1331 1332 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ 1333 if (!rom || !size) 1334 return -EIO; 1335 1336 if (off >= size) 1337 count = 0; 1338 else { 1339 if (off + count > size) 1340 count = size - off; 1341 1342 memcpy_fromio(buf, rom + off, count); 1343 } 1344 pci_unmap_rom(pdev, rom); 1345 1346 return count; 1347 } 1348 static BIN_ATTR(rom, 0600, pci_read_rom, pci_write_rom, 0); 1349 1350 static struct bin_attribute *pci_dev_rom_attrs[] = { 1351 &bin_attr_rom, 1352 NULL, 1353 }; 1354 1355 static umode_t pci_dev_rom_attr_is_visible(struct kobject *kobj, 1356 struct bin_attribute *a, int n) 1357 { 1358 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1359 size_t rom_size; 1360 1361 /* If the device has a ROM, try to expose it in sysfs. */ 1362 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1363 if (!rom_size) 1364 return 0; 1365 1366 a->size = rom_size; 1367 1368 return a->attr.mode; 1369 } 1370 1371 static const struct attribute_group pci_dev_rom_attr_group = { 1372 .bin_attrs = pci_dev_rom_attrs, 1373 .is_bin_visible = pci_dev_rom_attr_is_visible, 1374 }; 1375 1376 static ssize_t reset_store(struct device *dev, struct device_attribute *attr, 1377 const char *buf, size_t count) 1378 { 1379 struct pci_dev *pdev = to_pci_dev(dev); 1380 unsigned long val; 1381 ssize_t result; 1382 1383 if (kstrtoul(buf, 0, &val) < 0) 1384 return -EINVAL; 1385 1386 if (val != 1) 1387 return -EINVAL; 1388 1389 pm_runtime_get_sync(dev); 1390 result = pci_reset_function(pdev); 1391 pm_runtime_put(dev); 1392 if (result < 0) 1393 return result; 1394 1395 return count; 1396 } 1397 static DEVICE_ATTR_WO(reset); 1398 1399 static struct attribute *pci_dev_reset_attrs[] = { 1400 &dev_attr_reset.attr, 1401 NULL, 1402 }; 1403 1404 static umode_t pci_dev_reset_attr_is_visible(struct kobject *kobj, 1405 struct attribute *a, int n) 1406 { 1407 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1408 1409 if (!pci_reset_supported(pdev)) 1410 return 0; 1411 1412 return a->mode; 1413 } 1414 1415 static const struct attribute_group pci_dev_reset_attr_group = { 1416 .attrs = pci_dev_reset_attrs, 1417 .is_visible = pci_dev_reset_attr_is_visible, 1418 }; 1419 1420 static ssize_t __resource_resize_show(struct device *dev, int n, char *buf) 1421 { 1422 struct pci_dev *pdev = to_pci_dev(dev); 1423 ssize_t ret; 1424 1425 pci_config_pm_runtime_get(pdev); 1426 1427 ret = sysfs_emit(buf, "%016llx\n", 1428 (u64)pci_rebar_get_possible_sizes(pdev, n)); 1429 1430 pci_config_pm_runtime_put(pdev); 1431 1432 return ret; 1433 } 1434 1435 static ssize_t __resource_resize_store(struct device *dev, int n, 1436 const char *buf, size_t count) 1437 { 1438 struct pci_dev *pdev = to_pci_dev(dev); 1439 unsigned long size, flags; 1440 int ret, i; 1441 u16 cmd; 1442 1443 if (kstrtoul(buf, 0, &size) < 0) 1444 return -EINVAL; 1445 1446 device_lock(dev); 1447 if (dev->driver) { 1448 ret = -EBUSY; 1449 goto unlock; 1450 } 1451 1452 pci_config_pm_runtime_get(pdev); 1453 1454 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) { 1455 ret = aperture_remove_conflicting_pci_devices(pdev, 1456 "resourceN_resize"); 1457 if (ret) 1458 goto pm_put; 1459 } 1460 1461 pci_read_config_word(pdev, PCI_COMMAND, &cmd); 1462 pci_write_config_word(pdev, PCI_COMMAND, 1463 cmd & ~PCI_COMMAND_MEMORY); 1464 1465 flags = pci_resource_flags(pdev, n); 1466 1467 pci_remove_resource_files(pdev); 1468 1469 for (i = 0; i < PCI_STD_NUM_BARS; i++) { 1470 if (pci_resource_len(pdev, i) && 1471 pci_resource_flags(pdev, i) == flags) 1472 pci_release_resource(pdev, i); 1473 } 1474 1475 ret = pci_resize_resource(pdev, n, size); 1476 1477 pci_assign_unassigned_bus_resources(pdev->bus); 1478 1479 if (pci_create_resource_files(pdev)) 1480 pci_warn(pdev, "Failed to recreate resource files after BAR resizing\n"); 1481 1482 pci_write_config_word(pdev, PCI_COMMAND, cmd); 1483 pm_put: 1484 pci_config_pm_runtime_put(pdev); 1485 unlock: 1486 device_unlock(dev); 1487 1488 return ret ? ret : count; 1489 } 1490 1491 #define pci_dev_resource_resize_attr(n) \ 1492 static ssize_t resource##n##_resize_show(struct device *dev, \ 1493 struct device_attribute *attr, \ 1494 char *buf) \ 1495 { \ 1496 return __resource_resize_show(dev, n, buf); \ 1497 } \ 1498 static ssize_t resource##n##_resize_store(struct device *dev, \ 1499 struct device_attribute *attr,\ 1500 const char *buf, size_t count)\ 1501 { \ 1502 return __resource_resize_store(dev, n, buf, count); \ 1503 } \ 1504 static DEVICE_ATTR_RW(resource##n##_resize) 1505 1506 pci_dev_resource_resize_attr(0); 1507 pci_dev_resource_resize_attr(1); 1508 pci_dev_resource_resize_attr(2); 1509 pci_dev_resource_resize_attr(3); 1510 pci_dev_resource_resize_attr(4); 1511 pci_dev_resource_resize_attr(5); 1512 1513 static struct attribute *resource_resize_attrs[] = { 1514 &dev_attr_resource0_resize.attr, 1515 &dev_attr_resource1_resize.attr, 1516 &dev_attr_resource2_resize.attr, 1517 &dev_attr_resource3_resize.attr, 1518 &dev_attr_resource4_resize.attr, 1519 &dev_attr_resource5_resize.attr, 1520 NULL, 1521 }; 1522 1523 static umode_t resource_resize_is_visible(struct kobject *kobj, 1524 struct attribute *a, int n) 1525 { 1526 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 1527 1528 return pci_rebar_get_current_size(pdev, n) < 0 ? 0 : a->mode; 1529 } 1530 1531 static const struct attribute_group pci_dev_resource_resize_group = { 1532 .attrs = resource_resize_attrs, 1533 .is_visible = resource_resize_is_visible, 1534 }; 1535 1536 int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev) 1537 { 1538 if (!sysfs_initialized) 1539 return -EACCES; 1540 1541 return pci_create_resource_files(pdev); 1542 } 1543 1544 /** 1545 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files 1546 * @pdev: device whose entries we should free 1547 * 1548 * Cleanup when @pdev is removed from sysfs. 1549 */ 1550 void pci_remove_sysfs_dev_files(struct pci_dev *pdev) 1551 { 1552 if (!sysfs_initialized) 1553 return; 1554 1555 pci_remove_resource_files(pdev); 1556 } 1557 1558 static int __init pci_sysfs_init(void) 1559 { 1560 struct pci_dev *pdev = NULL; 1561 struct pci_bus *pbus = NULL; 1562 int retval; 1563 1564 sysfs_initialized = 1; 1565 for_each_pci_dev(pdev) { 1566 retval = pci_create_sysfs_dev_files(pdev); 1567 if (retval) { 1568 pci_dev_put(pdev); 1569 return retval; 1570 } 1571 } 1572 1573 while ((pbus = pci_find_next_bus(pbus))) 1574 pci_create_legacy_files(pbus); 1575 1576 return 0; 1577 } 1578 late_initcall(pci_sysfs_init); 1579 1580 static struct attribute *pci_dev_dev_attrs[] = { 1581 &dev_attr_boot_vga.attr, 1582 NULL, 1583 }; 1584 1585 static umode_t pci_dev_attrs_are_visible(struct kobject *kobj, 1586 struct attribute *a, int n) 1587 { 1588 struct device *dev = kobj_to_dev(kobj); 1589 struct pci_dev *pdev = to_pci_dev(dev); 1590 1591 if (a == &dev_attr_boot_vga.attr && pci_is_vga(pdev)) 1592 return a->mode; 1593 1594 return 0; 1595 } 1596 1597 static struct attribute *pci_dev_hp_attrs[] = { 1598 &dev_attr_remove.attr, 1599 &dev_attr_dev_rescan.attr, 1600 NULL, 1601 }; 1602 1603 static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj, 1604 struct attribute *a, int n) 1605 { 1606 struct device *dev = kobj_to_dev(kobj); 1607 struct pci_dev *pdev = to_pci_dev(dev); 1608 1609 if (pdev->is_virtfn) 1610 return 0; 1611 1612 return a->mode; 1613 } 1614 1615 static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj, 1616 struct attribute *a, int n) 1617 { 1618 struct device *dev = kobj_to_dev(kobj); 1619 struct pci_dev *pdev = to_pci_dev(dev); 1620 1621 if (pci_is_bridge(pdev)) 1622 return a->mode; 1623 1624 return 0; 1625 } 1626 1627 static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj, 1628 struct attribute *a, int n) 1629 { 1630 struct device *dev = kobj_to_dev(kobj); 1631 struct pci_dev *pdev = to_pci_dev(dev); 1632 1633 if (pci_is_pcie(pdev)) 1634 return a->mode; 1635 1636 return 0; 1637 } 1638 1639 static const struct attribute_group pci_dev_group = { 1640 .attrs = pci_dev_attrs, 1641 }; 1642 1643 const struct attribute_group *pci_dev_groups[] = { 1644 &pci_dev_group, 1645 &pci_dev_config_attr_group, 1646 &pci_dev_rom_attr_group, 1647 &pci_dev_reset_attr_group, 1648 &pci_dev_reset_method_attr_group, 1649 &pci_dev_vpd_attr_group, 1650 #ifdef CONFIG_DMI 1651 &pci_dev_smbios_attr_group, 1652 #endif 1653 #ifdef CONFIG_ACPI 1654 &pci_dev_acpi_attr_group, 1655 #endif 1656 &pci_dev_resource_resize_group, 1657 ARCH_PCI_DEV_GROUPS 1658 NULL, 1659 }; 1660 1661 static const struct attribute_group pci_dev_hp_attr_group = { 1662 .attrs = pci_dev_hp_attrs, 1663 .is_visible = pci_dev_hp_attrs_are_visible, 1664 }; 1665 1666 static const struct attribute_group pci_dev_attr_group = { 1667 .attrs = pci_dev_dev_attrs, 1668 .is_visible = pci_dev_attrs_are_visible, 1669 }; 1670 1671 static const struct attribute_group pci_bridge_attr_group = { 1672 .attrs = pci_bridge_attrs, 1673 .is_visible = pci_bridge_attrs_are_visible, 1674 }; 1675 1676 static const struct attribute_group pcie_dev_attr_group = { 1677 .attrs = pcie_dev_attrs, 1678 .is_visible = pcie_dev_attrs_are_visible, 1679 }; 1680 1681 const struct attribute_group *pci_dev_attr_groups[] = { 1682 &pci_dev_attr_group, 1683 &pci_dev_hp_attr_group, 1684 #ifdef CONFIG_PCI_IOV 1685 &sriov_pf_dev_attr_group, 1686 &sriov_vf_dev_attr_group, 1687 #endif 1688 &pci_bridge_attr_group, 1689 &pcie_dev_attr_group, 1690 #ifdef CONFIG_PCIEAER 1691 &aer_stats_attr_group, 1692 #endif 1693 #ifdef CONFIG_PCIEASPM 1694 &aspm_ctrl_attr_group, 1695 #endif 1696 NULL, 1697 }; 1698