xref: /linux/drivers/pci/pci-sysfs.c (revision 273b281fa22c293963ee3e6eec418f5dda2dbc83)
1 /*
2  * drivers/pci/pci-sysfs.c
3  *
4  * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5  * (C) Copyright 2002-2004 IBM Corp.
6  * (C) Copyright 2003 Matthew Wilcox
7  * (C) Copyright 2003 Hewlett-Packard
8  * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9  * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10  *
11  * File attributes for PCI devices
12  *
13  * Modeled after usb's driverfs.c
14  *
15  */
16 
17 
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
20 #include <linux/pci.h>
21 #include <linux/stat.h>
22 #include <linux/topology.h>
23 #include <linux/mm.h>
24 #include <linux/capability.h>
25 #include <linux/pci-aspm.h>
26 #include "pci.h"
27 
28 static int sysfs_initialized;	/* = 0 */
29 
30 /* show configuration fields */
31 #define pci_config_attr(field, format_string)				\
32 static ssize_t								\
33 field##_show(struct device *dev, struct device_attribute *attr, char *buf)				\
34 {									\
35 	struct pci_dev *pdev;						\
36 									\
37 	pdev = to_pci_dev (dev);					\
38 	return sprintf (buf, format_string, pdev->field);		\
39 }
40 
41 pci_config_attr(vendor, "0x%04x\n");
42 pci_config_attr(device, "0x%04x\n");
43 pci_config_attr(subsystem_vendor, "0x%04x\n");
44 pci_config_attr(subsystem_device, "0x%04x\n");
45 pci_config_attr(class, "0x%06x\n");
46 pci_config_attr(irq, "%u\n");
47 
48 static ssize_t broken_parity_status_show(struct device *dev,
49 					 struct device_attribute *attr,
50 					 char *buf)
51 {
52 	struct pci_dev *pdev = to_pci_dev(dev);
53 	return sprintf (buf, "%u\n", pdev->broken_parity_status);
54 }
55 
56 static ssize_t broken_parity_status_store(struct device *dev,
57 					  struct device_attribute *attr,
58 					  const char *buf, size_t count)
59 {
60 	struct pci_dev *pdev = to_pci_dev(dev);
61 	unsigned long val;
62 
63 	if (strict_strtoul(buf, 0, &val) < 0)
64 		return -EINVAL;
65 
66 	pdev->broken_parity_status = !!val;
67 
68 	return count;
69 }
70 
71 static ssize_t local_cpus_show(struct device *dev,
72 			struct device_attribute *attr, char *buf)
73 {
74 	const struct cpumask *mask;
75 	int len;
76 
77 #ifdef CONFIG_NUMA
78 	mask = cpumask_of_node(dev_to_node(dev));
79 #else
80 	mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
81 #endif
82 	len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
83 	buf[len++] = '\n';
84 	buf[len] = '\0';
85 	return len;
86 }
87 
88 
89 static ssize_t local_cpulist_show(struct device *dev,
90 			struct device_attribute *attr, char *buf)
91 {
92 	const struct cpumask *mask;
93 	int len;
94 
95 #ifdef CONFIG_NUMA
96 	mask = cpumask_of_node(dev_to_node(dev));
97 #else
98 	mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
99 #endif
100 	len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
101 	buf[len++] = '\n';
102 	buf[len] = '\0';
103 	return len;
104 }
105 
106 /* show resources */
107 static ssize_t
108 resource_show(struct device * dev, struct device_attribute *attr, char * buf)
109 {
110 	struct pci_dev * pci_dev = to_pci_dev(dev);
111 	char * str = buf;
112 	int i;
113 	int max;
114 	resource_size_t start, end;
115 
116 	if (pci_dev->subordinate)
117 		max = DEVICE_COUNT_RESOURCE;
118 	else
119 		max = PCI_BRIDGE_RESOURCES;
120 
121 	for (i = 0; i < max; i++) {
122 		struct resource *res =  &pci_dev->resource[i];
123 		pci_resource_to_user(pci_dev, i, res, &start, &end);
124 		str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
125 			       (unsigned long long)start,
126 			       (unsigned long long)end,
127 			       (unsigned long long)res->flags);
128 	}
129 	return (str - buf);
130 }
131 
132 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
133 {
134 	struct pci_dev *pci_dev = to_pci_dev(dev);
135 
136 	return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
137 		       pci_dev->vendor, pci_dev->device,
138 		       pci_dev->subsystem_vendor, pci_dev->subsystem_device,
139 		       (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
140 		       (u8)(pci_dev->class));
141 }
142 
143 static ssize_t is_enabled_store(struct device *dev,
144 				struct device_attribute *attr, const char *buf,
145 				size_t count)
146 {
147 	struct pci_dev *pdev = to_pci_dev(dev);
148 	unsigned long val;
149 	ssize_t result = strict_strtoul(buf, 0, &val);
150 
151 	if (result < 0)
152 		return result;
153 
154 	/* this can crash the machine when done on the "wrong" device */
155 	if (!capable(CAP_SYS_ADMIN))
156 		return -EPERM;
157 
158 	if (!val) {
159 		if (pci_is_enabled(pdev))
160 			pci_disable_device(pdev);
161 		else
162 			result = -EIO;
163 	} else
164 		result = pci_enable_device(pdev);
165 
166 	return result < 0 ? result : count;
167 }
168 
169 static ssize_t is_enabled_show(struct device *dev,
170 			       struct device_attribute *attr, char *buf)
171 {
172 	struct pci_dev *pdev;
173 
174 	pdev = to_pci_dev (dev);
175 	return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
176 }
177 
178 #ifdef CONFIG_NUMA
179 static ssize_t
180 numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
181 {
182 	return sprintf (buf, "%d\n", dev->numa_node);
183 }
184 #endif
185 
186 static ssize_t
187 dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
188 {
189 	struct pci_dev *pdev = to_pci_dev(dev);
190 
191 	return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
192 }
193 
194 static ssize_t
195 consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
196 				 char *buf)
197 {
198 	return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
199 }
200 
201 static ssize_t
202 msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
203 {
204 	struct pci_dev *pdev = to_pci_dev(dev);
205 
206 	if (!pdev->subordinate)
207 		return 0;
208 
209 	return sprintf (buf, "%u\n",
210 			!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
211 }
212 
213 static ssize_t
214 msi_bus_store(struct device *dev, struct device_attribute *attr,
215 	      const char *buf, size_t count)
216 {
217 	struct pci_dev *pdev = to_pci_dev(dev);
218 	unsigned long val;
219 
220 	if (strict_strtoul(buf, 0, &val) < 0)
221 		return -EINVAL;
222 
223 	/* bad things may happen if the no_msi flag is changed
224 	 * while some drivers are loaded */
225 	if (!capable(CAP_SYS_ADMIN))
226 		return -EPERM;
227 
228 	/* Maybe pci devices without subordinate busses shouldn't even have this
229 	 * attribute in the first place?  */
230 	if (!pdev->subordinate)
231 		return count;
232 
233 	/* Is the flag going to change, or keep the value it already had? */
234 	if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
235 	    !!val) {
236 		pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
237 
238 		dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
239 			 " bad things could happen\n", val ? "" : " not");
240 	}
241 
242 	return count;
243 }
244 
245 #ifdef CONFIG_HOTPLUG
246 static DEFINE_MUTEX(pci_remove_rescan_mutex);
247 static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
248 				size_t count)
249 {
250 	unsigned long val;
251 	struct pci_bus *b = NULL;
252 
253 	if (strict_strtoul(buf, 0, &val) < 0)
254 		return -EINVAL;
255 
256 	if (val) {
257 		mutex_lock(&pci_remove_rescan_mutex);
258 		while ((b = pci_find_next_bus(b)) != NULL)
259 			pci_rescan_bus(b);
260 		mutex_unlock(&pci_remove_rescan_mutex);
261 	}
262 	return count;
263 }
264 
265 struct bus_attribute pci_bus_attrs[] = {
266 	__ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
267 	__ATTR_NULL
268 };
269 
270 static ssize_t
271 dev_rescan_store(struct device *dev, struct device_attribute *attr,
272 		 const char *buf, size_t count)
273 {
274 	unsigned long val;
275 	struct pci_dev *pdev = to_pci_dev(dev);
276 
277 	if (strict_strtoul(buf, 0, &val) < 0)
278 		return -EINVAL;
279 
280 	if (val) {
281 		mutex_lock(&pci_remove_rescan_mutex);
282 		pci_rescan_bus(pdev->bus);
283 		mutex_unlock(&pci_remove_rescan_mutex);
284 	}
285 	return count;
286 }
287 
288 static void remove_callback(struct device *dev)
289 {
290 	struct pci_dev *pdev = to_pci_dev(dev);
291 
292 	mutex_lock(&pci_remove_rescan_mutex);
293 	pci_remove_bus_device(pdev);
294 	mutex_unlock(&pci_remove_rescan_mutex);
295 }
296 
297 static ssize_t
298 remove_store(struct device *dev, struct device_attribute *dummy,
299 	     const char *buf, size_t count)
300 {
301 	int ret = 0;
302 	unsigned long val;
303 
304 	if (strict_strtoul(buf, 0, &val) < 0)
305 		return -EINVAL;
306 
307 	/* An attribute cannot be unregistered by one of its own methods,
308 	 * so we have to use this roundabout approach.
309 	 */
310 	if (val)
311 		ret = device_schedule_callback(dev, remove_callback);
312 	if (ret)
313 		count = ret;
314 	return count;
315 }
316 #endif
317 
318 struct device_attribute pci_dev_attrs[] = {
319 	__ATTR_RO(resource),
320 	__ATTR_RO(vendor),
321 	__ATTR_RO(device),
322 	__ATTR_RO(subsystem_vendor),
323 	__ATTR_RO(subsystem_device),
324 	__ATTR_RO(class),
325 	__ATTR_RO(irq),
326 	__ATTR_RO(local_cpus),
327 	__ATTR_RO(local_cpulist),
328 	__ATTR_RO(modalias),
329 #ifdef CONFIG_NUMA
330 	__ATTR_RO(numa_node),
331 #endif
332 	__ATTR_RO(dma_mask_bits),
333 	__ATTR_RO(consistent_dma_mask_bits),
334 	__ATTR(enable, 0600, is_enabled_show, is_enabled_store),
335 	__ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
336 		broken_parity_status_show,broken_parity_status_store),
337 	__ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
338 #ifdef CONFIG_HOTPLUG
339 	__ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
340 	__ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
341 #endif
342 	__ATTR_NULL,
343 };
344 
345 static ssize_t
346 boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
347 {
348 	struct pci_dev *pdev = to_pci_dev(dev);
349 
350 	return sprintf(buf, "%u\n",
351 		!!(pdev->resource[PCI_ROM_RESOURCE].flags &
352 		   IORESOURCE_ROM_SHADOW));
353 }
354 struct device_attribute vga_attr = __ATTR_RO(boot_vga);
355 
356 static ssize_t
357 pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
358 		char *buf, loff_t off, size_t count)
359 {
360 	struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
361 	unsigned int size = 64;
362 	loff_t init_off = off;
363 	u8 *data = (u8*) buf;
364 
365 	/* Several chips lock up trying to read undefined config space */
366 	if (capable(CAP_SYS_ADMIN)) {
367 		size = dev->cfg_size;
368 	} else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
369 		size = 128;
370 	}
371 
372 	if (off > size)
373 		return 0;
374 	if (off + count > size) {
375 		size -= off;
376 		count = size;
377 	} else {
378 		size = count;
379 	}
380 
381 	if ((off & 1) && size) {
382 		u8 val;
383 		pci_user_read_config_byte(dev, off, &val);
384 		data[off - init_off] = val;
385 		off++;
386 		size--;
387 	}
388 
389 	if ((off & 3) && size > 2) {
390 		u16 val;
391 		pci_user_read_config_word(dev, off, &val);
392 		data[off - init_off] = val & 0xff;
393 		data[off - init_off + 1] = (val >> 8) & 0xff;
394 		off += 2;
395 		size -= 2;
396 	}
397 
398 	while (size > 3) {
399 		u32 val;
400 		pci_user_read_config_dword(dev, off, &val);
401 		data[off - init_off] = val & 0xff;
402 		data[off - init_off + 1] = (val >> 8) & 0xff;
403 		data[off - init_off + 2] = (val >> 16) & 0xff;
404 		data[off - init_off + 3] = (val >> 24) & 0xff;
405 		off += 4;
406 		size -= 4;
407 	}
408 
409 	if (size >= 2) {
410 		u16 val;
411 		pci_user_read_config_word(dev, off, &val);
412 		data[off - init_off] = val & 0xff;
413 		data[off - init_off + 1] = (val >> 8) & 0xff;
414 		off += 2;
415 		size -= 2;
416 	}
417 
418 	if (size > 0) {
419 		u8 val;
420 		pci_user_read_config_byte(dev, off, &val);
421 		data[off - init_off] = val;
422 		off++;
423 		--size;
424 	}
425 
426 	return count;
427 }
428 
429 static ssize_t
430 pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
431 		 char *buf, loff_t off, size_t count)
432 {
433 	struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
434 	unsigned int size = count;
435 	loff_t init_off = off;
436 	u8 *data = (u8*) buf;
437 
438 	if (off > dev->cfg_size)
439 		return 0;
440 	if (off + count > dev->cfg_size) {
441 		size = dev->cfg_size - off;
442 		count = size;
443 	}
444 
445 	if ((off & 1) && size) {
446 		pci_user_write_config_byte(dev, off, data[off - init_off]);
447 		off++;
448 		size--;
449 	}
450 
451 	if ((off & 3) && size > 2) {
452 		u16 val = data[off - init_off];
453 		val |= (u16) data[off - init_off + 1] << 8;
454                 pci_user_write_config_word(dev, off, val);
455                 off += 2;
456                 size -= 2;
457         }
458 
459 	while (size > 3) {
460 		u32 val = data[off - init_off];
461 		val |= (u32) data[off - init_off + 1] << 8;
462 		val |= (u32) data[off - init_off + 2] << 16;
463 		val |= (u32) data[off - init_off + 3] << 24;
464 		pci_user_write_config_dword(dev, off, val);
465 		off += 4;
466 		size -= 4;
467 	}
468 
469 	if (size >= 2) {
470 		u16 val = data[off - init_off];
471 		val |= (u16) data[off - init_off + 1] << 8;
472 		pci_user_write_config_word(dev, off, val);
473 		off += 2;
474 		size -= 2;
475 	}
476 
477 	if (size) {
478 		pci_user_write_config_byte(dev, off, data[off - init_off]);
479 		off++;
480 		--size;
481 	}
482 
483 	return count;
484 }
485 
486 static ssize_t
487 read_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
488 	      char *buf, loff_t off, size_t count)
489 {
490 	struct pci_dev *dev =
491 		to_pci_dev(container_of(kobj, struct device, kobj));
492 
493 	if (off > bin_attr->size)
494 		count = 0;
495 	else if (count > bin_attr->size - off)
496 		count = bin_attr->size - off;
497 
498 	return pci_read_vpd(dev, off, count, buf);
499 }
500 
501 static ssize_t
502 write_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
503 	       char *buf, loff_t off, size_t count)
504 {
505 	struct pci_dev *dev =
506 		to_pci_dev(container_of(kobj, struct device, kobj));
507 
508 	if (off > bin_attr->size)
509 		count = 0;
510 	else if (count > bin_attr->size - off)
511 		count = bin_attr->size - off;
512 
513 	return pci_write_vpd(dev, off, count, buf);
514 }
515 
516 #ifdef HAVE_PCI_LEGACY
517 /**
518  * pci_read_legacy_io - read byte(s) from legacy I/O port space
519  * @kobj: kobject corresponding to file to read from
520  * @bin_attr: struct bin_attribute for this file
521  * @buf: buffer to store results
522  * @off: offset into legacy I/O port space
523  * @count: number of bytes to read
524  *
525  * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
526  * callback routine (pci_legacy_read).
527  */
528 static ssize_t
529 pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
530 		   char *buf, loff_t off, size_t count)
531 {
532         struct pci_bus *bus = to_pci_bus(container_of(kobj,
533                                                       struct device,
534 						      kobj));
535 
536         /* Only support 1, 2 or 4 byte accesses */
537         if (count != 1 && count != 2 && count != 4)
538                 return -EINVAL;
539 
540         return pci_legacy_read(bus, off, (u32 *)buf, count);
541 }
542 
543 /**
544  * pci_write_legacy_io - write byte(s) to legacy I/O port space
545  * @kobj: kobject corresponding to file to read from
546  * @bin_attr: struct bin_attribute for this file
547  * @buf: buffer containing value to be written
548  * @off: offset into legacy I/O port space
549  * @count: number of bytes to write
550  *
551  * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
552  * callback routine (pci_legacy_write).
553  */
554 static ssize_t
555 pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
556 		    char *buf, loff_t off, size_t count)
557 {
558         struct pci_bus *bus = to_pci_bus(container_of(kobj,
559 						      struct device,
560 						      kobj));
561         /* Only support 1, 2 or 4 byte accesses */
562         if (count != 1 && count != 2 && count != 4)
563                 return -EINVAL;
564 
565         return pci_legacy_write(bus, off, *(u32 *)buf, count);
566 }
567 
568 /**
569  * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
570  * @kobj: kobject corresponding to device to be mapped
571  * @attr: struct bin_attribute for this file
572  * @vma: struct vm_area_struct passed to mmap
573  *
574  * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
575  * legacy memory space (first meg of bus space) into application virtual
576  * memory space.
577  */
578 static int
579 pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
580                     struct vm_area_struct *vma)
581 {
582         struct pci_bus *bus = to_pci_bus(container_of(kobj,
583                                                       struct device,
584 						      kobj));
585 
586         return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
587 }
588 
589 /**
590  * pci_mmap_legacy_io - map legacy PCI IO into user memory space
591  * @kobj: kobject corresponding to device to be mapped
592  * @attr: struct bin_attribute for this file
593  * @vma: struct vm_area_struct passed to mmap
594  *
595  * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
596  * legacy IO space (first meg of bus space) into application virtual
597  * memory space. Returns -ENOSYS if the operation isn't supported
598  */
599 static int
600 pci_mmap_legacy_io(struct kobject *kobj, struct bin_attribute *attr,
601 		   struct vm_area_struct *vma)
602 {
603         struct pci_bus *bus = to_pci_bus(container_of(kobj,
604                                                       struct device,
605 						      kobj));
606 
607         return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
608 }
609 
610 /**
611  * pci_adjust_legacy_attr - adjustment of legacy file attributes
612  * @b: bus to create files under
613  * @mmap_type: I/O port or memory
614  *
615  * Stub implementation. Can be overridden by arch if necessary.
616  */
617 void __weak
618 pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
619 {
620 	return;
621 }
622 
623 /**
624  * pci_create_legacy_files - create legacy I/O port and memory files
625  * @b: bus to create files under
626  *
627  * Some platforms allow access to legacy I/O port and ISA memory space on
628  * a per-bus basis.  This routine creates the files and ties them into
629  * their associated read, write and mmap files from pci-sysfs.c
630  *
631  * On error unwind, but don't propogate the error to the caller
632  * as it is ok to set up the PCI bus without these files.
633  */
634 void pci_create_legacy_files(struct pci_bus *b)
635 {
636 	int error;
637 
638 	b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
639 			       GFP_ATOMIC);
640 	if (!b->legacy_io)
641 		goto kzalloc_err;
642 
643 	b->legacy_io->attr.name = "legacy_io";
644 	b->legacy_io->size = 0xffff;
645 	b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
646 	b->legacy_io->read = pci_read_legacy_io;
647 	b->legacy_io->write = pci_write_legacy_io;
648 	b->legacy_io->mmap = pci_mmap_legacy_io;
649 	pci_adjust_legacy_attr(b, pci_mmap_io);
650 	error = device_create_bin_file(&b->dev, b->legacy_io);
651 	if (error)
652 		goto legacy_io_err;
653 
654 	/* Allocated above after the legacy_io struct */
655 	b->legacy_mem = b->legacy_io + 1;
656 	b->legacy_mem->attr.name = "legacy_mem";
657 	b->legacy_mem->size = 1024*1024;
658 	b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
659 	b->legacy_mem->mmap = pci_mmap_legacy_mem;
660 	pci_adjust_legacy_attr(b, pci_mmap_mem);
661 	error = device_create_bin_file(&b->dev, b->legacy_mem);
662 	if (error)
663 		goto legacy_mem_err;
664 
665 	return;
666 
667 legacy_mem_err:
668 	device_remove_bin_file(&b->dev, b->legacy_io);
669 legacy_io_err:
670 	kfree(b->legacy_io);
671 	b->legacy_io = NULL;
672 kzalloc_err:
673 	printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
674 	       "and ISA memory resources to sysfs\n");
675 	return;
676 }
677 
678 void pci_remove_legacy_files(struct pci_bus *b)
679 {
680 	if (b->legacy_io) {
681 		device_remove_bin_file(&b->dev, b->legacy_io);
682 		device_remove_bin_file(&b->dev, b->legacy_mem);
683 		kfree(b->legacy_io); /* both are allocated here */
684 	}
685 }
686 #endif /* HAVE_PCI_LEGACY */
687 
688 #ifdef HAVE_PCI_MMAP
689 
690 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
691 {
692 	unsigned long nr, start, size;
693 
694 	nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
695 	start = vma->vm_pgoff;
696 	size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
697 	if (start < size && size - start >= nr)
698 		return 1;
699 	WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
700 		current->comm, start, start+nr, pci_name(pdev), resno, size);
701 	return 0;
702 }
703 
704 /**
705  * pci_mmap_resource - map a PCI resource into user memory space
706  * @kobj: kobject for mapping
707  * @attr: struct bin_attribute for the file being mapped
708  * @vma: struct vm_area_struct passed into the mmap
709  * @write_combine: 1 for write_combine mapping
710  *
711  * Use the regular PCI mapping routines to map a PCI resource into userspace.
712  */
713 static int
714 pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
715 		  struct vm_area_struct *vma, int write_combine)
716 {
717 	struct pci_dev *pdev = to_pci_dev(container_of(kobj,
718 						       struct device, kobj));
719 	struct resource *res = (struct resource *)attr->private;
720 	enum pci_mmap_state mmap_type;
721 	resource_size_t start, end;
722 	int i;
723 
724 	for (i = 0; i < PCI_ROM_RESOURCE; i++)
725 		if (res == &pdev->resource[i])
726 			break;
727 	if (i >= PCI_ROM_RESOURCE)
728 		return -ENODEV;
729 
730 	if (!pci_mmap_fits(pdev, i, vma))
731 		return -EINVAL;
732 
733 	/* pci_mmap_page_range() expects the same kind of entry as coming
734 	 * from /proc/bus/pci/ which is a "user visible" value. If this is
735 	 * different from the resource itself, arch will do necessary fixup.
736 	 */
737 	pci_resource_to_user(pdev, i, res, &start, &end);
738 	vma->vm_pgoff += start >> PAGE_SHIFT;
739 	mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
740 
741 	if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
742 		return -EINVAL;
743 
744 	return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
745 }
746 
747 static int
748 pci_mmap_resource_uc(struct kobject *kobj, struct bin_attribute *attr,
749 		     struct vm_area_struct *vma)
750 {
751 	return pci_mmap_resource(kobj, attr, vma, 0);
752 }
753 
754 static int
755 pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
756 		     struct vm_area_struct *vma)
757 {
758 	return pci_mmap_resource(kobj, attr, vma, 1);
759 }
760 
761 /**
762  * pci_remove_resource_files - cleanup resource files
763  * @pdev: dev to cleanup
764  *
765  * If we created resource files for @pdev, remove them from sysfs and
766  * free their resources.
767  */
768 static void
769 pci_remove_resource_files(struct pci_dev *pdev)
770 {
771 	int i;
772 
773 	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
774 		struct bin_attribute *res_attr;
775 
776 		res_attr = pdev->res_attr[i];
777 		if (res_attr) {
778 			sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
779 			kfree(res_attr);
780 		}
781 
782 		res_attr = pdev->res_attr_wc[i];
783 		if (res_attr) {
784 			sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
785 			kfree(res_attr);
786 		}
787 	}
788 }
789 
790 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
791 {
792 	/* allocate attribute structure, piggyback attribute name */
793 	int name_len = write_combine ? 13 : 10;
794 	struct bin_attribute *res_attr;
795 	int retval;
796 
797 	res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
798 	if (res_attr) {
799 		char *res_attr_name = (char *)(res_attr + 1);
800 
801 		if (write_combine) {
802 			pdev->res_attr_wc[num] = res_attr;
803 			sprintf(res_attr_name, "resource%d_wc", num);
804 			res_attr->mmap = pci_mmap_resource_wc;
805 		} else {
806 			pdev->res_attr[num] = res_attr;
807 			sprintf(res_attr_name, "resource%d", num);
808 			res_attr->mmap = pci_mmap_resource_uc;
809 		}
810 		res_attr->attr.name = res_attr_name;
811 		res_attr->attr.mode = S_IRUSR | S_IWUSR;
812 		res_attr->size = pci_resource_len(pdev, num);
813 		res_attr->private = &pdev->resource[num];
814 		retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
815 	} else
816 		retval = -ENOMEM;
817 
818 	return retval;
819 }
820 
821 /**
822  * pci_create_resource_files - create resource files in sysfs for @dev
823  * @pdev: dev in question
824  *
825  * Walk the resources in @pdev creating files for each resource available.
826  */
827 static int pci_create_resource_files(struct pci_dev *pdev)
828 {
829 	int i;
830 	int retval;
831 
832 	/* Expose the PCI resources from this device as files */
833 	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
834 
835 		/* skip empty resources */
836 		if (!pci_resource_len(pdev, i))
837 			continue;
838 
839 		retval = pci_create_attr(pdev, i, 0);
840 		/* for prefetchable resources, create a WC mappable file */
841 		if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
842 			retval = pci_create_attr(pdev, i, 1);
843 
844 		if (retval) {
845 			pci_remove_resource_files(pdev);
846 			return retval;
847 		}
848 	}
849 	return 0;
850 }
851 #else /* !HAVE_PCI_MMAP */
852 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
853 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
854 #endif /* HAVE_PCI_MMAP */
855 
856 /**
857  * pci_write_rom - used to enable access to the PCI ROM display
858  * @kobj: kernel object handle
859  * @bin_attr: struct bin_attribute for this file
860  * @buf: user input
861  * @off: file offset
862  * @count: number of byte in input
863  *
864  * writing anything except 0 enables it
865  */
866 static ssize_t
867 pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
868 	      char *buf, loff_t off, size_t count)
869 {
870 	struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
871 
872 	if ((off ==  0) && (*buf == '0') && (count == 2))
873 		pdev->rom_attr_enabled = 0;
874 	else
875 		pdev->rom_attr_enabled = 1;
876 
877 	return count;
878 }
879 
880 /**
881  * pci_read_rom - read a PCI ROM
882  * @kobj: kernel object handle
883  * @bin_attr: struct bin_attribute for this file
884  * @buf: where to put the data we read from the ROM
885  * @off: file offset
886  * @count: number of bytes to read
887  *
888  * Put @count bytes starting at @off into @buf from the ROM in the PCI
889  * device corresponding to @kobj.
890  */
891 static ssize_t
892 pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
893 	     char *buf, loff_t off, size_t count)
894 {
895 	struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
896 	void __iomem *rom;
897 	size_t size;
898 
899 	if (!pdev->rom_attr_enabled)
900 		return -EINVAL;
901 
902 	rom = pci_map_rom(pdev, &size);	/* size starts out as PCI window size */
903 	if (!rom || !size)
904 		return -EIO;
905 
906 	if (off >= size)
907 		count = 0;
908 	else {
909 		if (off + count > size)
910 			count = size - off;
911 
912 		memcpy_fromio(buf, rom + off, count);
913 	}
914 	pci_unmap_rom(pdev, rom);
915 
916 	return count;
917 }
918 
919 static struct bin_attribute pci_config_attr = {
920 	.attr =	{
921 		.name = "config",
922 		.mode = S_IRUGO | S_IWUSR,
923 	},
924 	.size = PCI_CFG_SPACE_SIZE,
925 	.read = pci_read_config,
926 	.write = pci_write_config,
927 };
928 
929 static struct bin_attribute pcie_config_attr = {
930 	.attr =	{
931 		.name = "config",
932 		.mode = S_IRUGO | S_IWUSR,
933 	},
934 	.size = PCI_CFG_SPACE_EXP_SIZE,
935 	.read = pci_read_config,
936 	.write = pci_write_config,
937 };
938 
939 int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
940 {
941 	return 0;
942 }
943 
944 static ssize_t reset_store(struct device *dev,
945 			   struct device_attribute *attr, const char *buf,
946 			   size_t count)
947 {
948 	struct pci_dev *pdev = to_pci_dev(dev);
949 	unsigned long val;
950 	ssize_t result = strict_strtoul(buf, 0, &val);
951 
952 	if (result < 0)
953 		return result;
954 
955 	if (val != 1)
956 		return -EINVAL;
957 	return pci_reset_function(pdev);
958 }
959 
960 static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
961 
962 static int pci_create_capabilities_sysfs(struct pci_dev *dev)
963 {
964 	int retval;
965 	struct bin_attribute *attr;
966 
967 	/* If the device has VPD, try to expose it in sysfs. */
968 	if (dev->vpd) {
969 		attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
970 		if (!attr)
971 			return -ENOMEM;
972 
973 		attr->size = dev->vpd->len;
974 		attr->attr.name = "vpd";
975 		attr->attr.mode = S_IRUSR | S_IWUSR;
976 		attr->read = read_vpd_attr;
977 		attr->write = write_vpd_attr;
978 		retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
979 		if (retval) {
980 			kfree(dev->vpd->attr);
981 			return retval;
982 		}
983 		dev->vpd->attr = attr;
984 	}
985 
986 	/* Active State Power Management */
987 	pcie_aspm_create_sysfs_dev_files(dev);
988 
989 	if (!pci_probe_reset_function(dev)) {
990 		retval = device_create_file(&dev->dev, &reset_attr);
991 		if (retval)
992 			goto error;
993 		dev->reset_fn = 1;
994 	}
995 	return 0;
996 
997 error:
998 	pcie_aspm_remove_sysfs_dev_files(dev);
999 	if (dev->vpd && dev->vpd->attr) {
1000 		sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1001 		kfree(dev->vpd->attr);
1002 	}
1003 
1004 	return retval;
1005 }
1006 
1007 int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1008 {
1009 	int retval;
1010 	int rom_size = 0;
1011 	struct bin_attribute *attr;
1012 
1013 	if (!sysfs_initialized)
1014 		return -EACCES;
1015 
1016 	if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1017 		retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1018 	else
1019 		retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1020 	if (retval)
1021 		goto err;
1022 
1023 	retval = pci_create_resource_files(pdev);
1024 	if (retval)
1025 		goto err_config_file;
1026 
1027 	if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1028 		rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1029 	else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1030 		rom_size = 0x20000;
1031 
1032 	/* If the device has a ROM, try to expose it in sysfs. */
1033 	if (rom_size) {
1034 		attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1035 		if (!attr) {
1036 			retval = -ENOMEM;
1037 			goto err_resource_files;
1038 		}
1039 		attr->size = rom_size;
1040 		attr->attr.name = "rom";
1041 		attr->attr.mode = S_IRUSR;
1042 		attr->read = pci_read_rom;
1043 		attr->write = pci_write_rom;
1044 		retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1045 		if (retval) {
1046 			kfree(attr);
1047 			goto err_resource_files;
1048 		}
1049 		pdev->rom_attr = attr;
1050 	}
1051 
1052 	if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
1053 		retval = device_create_file(&pdev->dev, &vga_attr);
1054 		if (retval)
1055 			goto err_rom_file;
1056 	}
1057 
1058 	/* add platform-specific attributes */
1059 	retval = pcibios_add_platform_entries(pdev);
1060 	if (retval)
1061 		goto err_vga_file;
1062 
1063 	/* add sysfs entries for various capabilities */
1064 	retval = pci_create_capabilities_sysfs(pdev);
1065 	if (retval)
1066 		goto err_vga_file;
1067 
1068 	return 0;
1069 
1070 err_vga_file:
1071 	if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1072 		device_remove_file(&pdev->dev, &vga_attr);
1073 err_rom_file:
1074 	if (rom_size) {
1075 		sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1076 		kfree(pdev->rom_attr);
1077 		pdev->rom_attr = NULL;
1078 	}
1079 err_resource_files:
1080 	pci_remove_resource_files(pdev);
1081 err_config_file:
1082 	if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1083 		sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1084 	else
1085 		sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1086 err:
1087 	return retval;
1088 }
1089 
1090 static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1091 {
1092 	if (dev->vpd && dev->vpd->attr) {
1093 		sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1094 		kfree(dev->vpd->attr);
1095 	}
1096 
1097 	pcie_aspm_remove_sysfs_dev_files(dev);
1098 	if (dev->reset_fn) {
1099 		device_remove_file(&dev->dev, &reset_attr);
1100 		dev->reset_fn = 0;
1101 	}
1102 }
1103 
1104 /**
1105  * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1106  * @pdev: device whose entries we should free
1107  *
1108  * Cleanup when @pdev is removed from sysfs.
1109  */
1110 void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1111 {
1112 	int rom_size = 0;
1113 
1114 	if (!sysfs_initialized)
1115 		return;
1116 
1117 	pci_remove_capabilities_sysfs(pdev);
1118 
1119 	if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1120 		sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1121 	else
1122 		sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1123 
1124 	pci_remove_resource_files(pdev);
1125 
1126 	if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1127 		rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1128 	else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1129 		rom_size = 0x20000;
1130 
1131 	if (rom_size && pdev->rom_attr) {
1132 		sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1133 		kfree(pdev->rom_attr);
1134 	}
1135 }
1136 
1137 static int __init pci_sysfs_init(void)
1138 {
1139 	struct pci_dev *pdev = NULL;
1140 	int retval;
1141 
1142 	sysfs_initialized = 1;
1143 	for_each_pci_dev(pdev) {
1144 		retval = pci_create_sysfs_dev_files(pdev);
1145 		if (retval) {
1146 			pci_dev_put(pdev);
1147 			return retval;
1148 		}
1149 	}
1150 
1151 	return 0;
1152 }
1153 
1154 late_initcall(pci_sysfs_init);
1155