1 /* 2 * drivers/pci/pci-sysfs.c 3 * 4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> 5 * (C) Copyright 2002-2004 IBM Corp. 6 * (C) Copyright 2003 Matthew Wilcox 7 * (C) Copyright 2003 Hewlett-Packard 8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> 9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> 10 * 11 * File attributes for PCI devices 12 * 13 * Modeled after usb's driverfs.c 14 * 15 */ 16 17 18 #include <linux/kernel.h> 19 #include <linux/sched.h> 20 #include <linux/pci.h> 21 #include <linux/stat.h> 22 #include <linux/export.h> 23 #include <linux/topology.h> 24 #include <linux/mm.h> 25 #include <linux/fs.h> 26 #include <linux/capability.h> 27 #include <linux/security.h> 28 #include <linux/pci-aspm.h> 29 #include <linux/slab.h> 30 #include <linux/vgaarb.h> 31 #include <linux/pm_runtime.h> 32 #include "pci.h" 33 34 static int sysfs_initialized; /* = 0 */ 35 36 /* show configuration fields */ 37 #define pci_config_attr(field, format_string) \ 38 static ssize_t \ 39 field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ 40 { \ 41 struct pci_dev *pdev; \ 42 \ 43 pdev = to_pci_dev (dev); \ 44 return sprintf (buf, format_string, pdev->field); \ 45 } 46 47 pci_config_attr(vendor, "0x%04x\n"); 48 pci_config_attr(device, "0x%04x\n"); 49 pci_config_attr(subsystem_vendor, "0x%04x\n"); 50 pci_config_attr(subsystem_device, "0x%04x\n"); 51 pci_config_attr(class, "0x%06x\n"); 52 pci_config_attr(irq, "%u\n"); 53 54 static ssize_t broken_parity_status_show(struct device *dev, 55 struct device_attribute *attr, 56 char *buf) 57 { 58 struct pci_dev *pdev = to_pci_dev(dev); 59 return sprintf (buf, "%u\n", pdev->broken_parity_status); 60 } 61 62 static ssize_t broken_parity_status_store(struct device *dev, 63 struct device_attribute *attr, 64 const char *buf, size_t count) 65 { 66 struct pci_dev *pdev = to_pci_dev(dev); 67 unsigned long val; 68 69 if (strict_strtoul(buf, 0, &val) < 0) 70 return -EINVAL; 71 72 pdev->broken_parity_status = !!val; 73 74 return count; 75 } 76 77 static ssize_t local_cpus_show(struct device *dev, 78 struct device_attribute *attr, char *buf) 79 { 80 const struct cpumask *mask; 81 int len; 82 83 #ifdef CONFIG_NUMA 84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 85 cpumask_of_node(dev_to_node(dev)); 86 #else 87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 88 #endif 89 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask); 90 buf[len++] = '\n'; 91 buf[len] = '\0'; 92 return len; 93 } 94 95 96 static ssize_t local_cpulist_show(struct device *dev, 97 struct device_attribute *attr, char *buf) 98 { 99 const struct cpumask *mask; 100 int len; 101 102 #ifdef CONFIG_NUMA 103 mask = (dev_to_node(dev) == -1) ? cpu_online_mask : 104 cpumask_of_node(dev_to_node(dev)); 105 #else 106 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 107 #endif 108 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask); 109 buf[len++] = '\n'; 110 buf[len] = '\0'; 111 return len; 112 } 113 114 /* 115 * PCI Bus Class Devices 116 */ 117 static ssize_t pci_bus_show_cpuaffinity(struct device *dev, 118 int type, 119 struct device_attribute *attr, 120 char *buf) 121 { 122 int ret; 123 const struct cpumask *cpumask; 124 125 cpumask = cpumask_of_pcibus(to_pci_bus(dev)); 126 ret = type ? 127 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) : 128 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask); 129 buf[ret++] = '\n'; 130 buf[ret] = '\0'; 131 return ret; 132 } 133 134 static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev, 135 struct device_attribute *attr, 136 char *buf) 137 { 138 return pci_bus_show_cpuaffinity(dev, 0, attr, buf); 139 } 140 141 static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev, 142 struct device_attribute *attr, 143 char *buf) 144 { 145 return pci_bus_show_cpuaffinity(dev, 1, attr, buf); 146 } 147 148 /* show resources */ 149 static ssize_t 150 resource_show(struct device * dev, struct device_attribute *attr, char * buf) 151 { 152 struct pci_dev * pci_dev = to_pci_dev(dev); 153 char * str = buf; 154 int i; 155 int max; 156 resource_size_t start, end; 157 158 if (pci_dev->subordinate) 159 max = DEVICE_COUNT_RESOURCE; 160 else 161 max = PCI_BRIDGE_RESOURCES; 162 163 for (i = 0; i < max; i++) { 164 struct resource *res = &pci_dev->resource[i]; 165 pci_resource_to_user(pci_dev, i, res, &start, &end); 166 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n", 167 (unsigned long long)start, 168 (unsigned long long)end, 169 (unsigned long long)res->flags); 170 } 171 return (str - buf); 172 } 173 174 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf) 175 { 176 struct pci_dev *pci_dev = to_pci_dev(dev); 177 178 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n", 179 pci_dev->vendor, pci_dev->device, 180 pci_dev->subsystem_vendor, pci_dev->subsystem_device, 181 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), 182 (u8)(pci_dev->class)); 183 } 184 185 static ssize_t is_enabled_store(struct device *dev, 186 struct device_attribute *attr, const char *buf, 187 size_t count) 188 { 189 struct pci_dev *pdev = to_pci_dev(dev); 190 unsigned long val; 191 ssize_t result = strict_strtoul(buf, 0, &val); 192 193 if (result < 0) 194 return result; 195 196 /* this can crash the machine when done on the "wrong" device */ 197 if (!capable(CAP_SYS_ADMIN)) 198 return -EPERM; 199 200 if (!val) { 201 if (pci_is_enabled(pdev)) 202 pci_disable_device(pdev); 203 else 204 result = -EIO; 205 } else 206 result = pci_enable_device(pdev); 207 208 return result < 0 ? result : count; 209 } 210 211 static ssize_t is_enabled_show(struct device *dev, 212 struct device_attribute *attr, char *buf) 213 { 214 struct pci_dev *pdev; 215 216 pdev = to_pci_dev (dev); 217 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt)); 218 } 219 220 #ifdef CONFIG_NUMA 221 static ssize_t 222 numa_node_show(struct device *dev, struct device_attribute *attr, char *buf) 223 { 224 return sprintf (buf, "%d\n", dev->numa_node); 225 } 226 #endif 227 228 static ssize_t 229 dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf) 230 { 231 struct pci_dev *pdev = to_pci_dev(dev); 232 233 return sprintf (buf, "%d\n", fls64(pdev->dma_mask)); 234 } 235 236 static ssize_t 237 consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr, 238 char *buf) 239 { 240 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask)); 241 } 242 243 static ssize_t 244 msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf) 245 { 246 struct pci_dev *pdev = to_pci_dev(dev); 247 248 if (!pdev->subordinate) 249 return 0; 250 251 return sprintf (buf, "%u\n", 252 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)); 253 } 254 255 static ssize_t 256 msi_bus_store(struct device *dev, struct device_attribute *attr, 257 const char *buf, size_t count) 258 { 259 struct pci_dev *pdev = to_pci_dev(dev); 260 unsigned long val; 261 262 if (strict_strtoul(buf, 0, &val) < 0) 263 return -EINVAL; 264 265 /* bad things may happen if the no_msi flag is changed 266 * while some drivers are loaded */ 267 if (!capable(CAP_SYS_ADMIN)) 268 return -EPERM; 269 270 /* Maybe pci devices without subordinate busses shouldn't even have this 271 * attribute in the first place? */ 272 if (!pdev->subordinate) 273 return count; 274 275 /* Is the flag going to change, or keep the value it already had? */ 276 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^ 277 !!val) { 278 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI; 279 280 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI," 281 " bad things could happen\n", val ? "" : " not"); 282 } 283 284 return count; 285 } 286 287 #ifdef CONFIG_HOTPLUG 288 static DEFINE_MUTEX(pci_remove_rescan_mutex); 289 static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf, 290 size_t count) 291 { 292 unsigned long val; 293 struct pci_bus *b = NULL; 294 295 if (strict_strtoul(buf, 0, &val) < 0) 296 return -EINVAL; 297 298 if (val) { 299 mutex_lock(&pci_remove_rescan_mutex); 300 while ((b = pci_find_next_bus(b)) != NULL) 301 pci_rescan_bus(b); 302 mutex_unlock(&pci_remove_rescan_mutex); 303 } 304 return count; 305 } 306 307 struct bus_attribute pci_bus_attrs[] = { 308 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store), 309 __ATTR_NULL 310 }; 311 312 static ssize_t 313 dev_rescan_store(struct device *dev, struct device_attribute *attr, 314 const char *buf, size_t count) 315 { 316 unsigned long val; 317 struct pci_dev *pdev = to_pci_dev(dev); 318 319 if (strict_strtoul(buf, 0, &val) < 0) 320 return -EINVAL; 321 322 if (val) { 323 mutex_lock(&pci_remove_rescan_mutex); 324 pci_rescan_bus(pdev->bus); 325 mutex_unlock(&pci_remove_rescan_mutex); 326 } 327 return count; 328 } 329 330 static void remove_callback(struct device *dev) 331 { 332 struct pci_dev *pdev = to_pci_dev(dev); 333 334 mutex_lock(&pci_remove_rescan_mutex); 335 pci_stop_and_remove_bus_device(pdev); 336 mutex_unlock(&pci_remove_rescan_mutex); 337 } 338 339 static ssize_t 340 remove_store(struct device *dev, struct device_attribute *dummy, 341 const char *buf, size_t count) 342 { 343 int ret = 0; 344 unsigned long val; 345 346 if (strict_strtoul(buf, 0, &val) < 0) 347 return -EINVAL; 348 349 /* An attribute cannot be unregistered by one of its own methods, 350 * so we have to use this roundabout approach. 351 */ 352 if (val) 353 ret = device_schedule_callback(dev, remove_callback); 354 if (ret) 355 count = ret; 356 return count; 357 } 358 359 static ssize_t 360 dev_bus_rescan_store(struct device *dev, struct device_attribute *attr, 361 const char *buf, size_t count) 362 { 363 unsigned long val; 364 struct pci_bus *bus = to_pci_bus(dev); 365 366 if (strict_strtoul(buf, 0, &val) < 0) 367 return -EINVAL; 368 369 if (val) { 370 mutex_lock(&pci_remove_rescan_mutex); 371 if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) 372 pci_rescan_bus_bridge_resize(bus->self); 373 else 374 pci_rescan_bus(bus); 375 mutex_unlock(&pci_remove_rescan_mutex); 376 } 377 return count; 378 } 379 380 #endif 381 382 #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI) 383 static ssize_t d3cold_allowed_store(struct device *dev, 384 struct device_attribute *attr, 385 const char *buf, size_t count) 386 { 387 struct pci_dev *pdev = to_pci_dev(dev); 388 unsigned long val; 389 390 if (strict_strtoul(buf, 0, &val) < 0) 391 return -EINVAL; 392 393 pdev->d3cold_allowed = !!val; 394 pm_runtime_resume(dev); 395 396 return count; 397 } 398 399 static ssize_t d3cold_allowed_show(struct device *dev, 400 struct device_attribute *attr, char *buf) 401 { 402 struct pci_dev *pdev = to_pci_dev(dev); 403 return sprintf (buf, "%u\n", pdev->d3cold_allowed); 404 } 405 #endif 406 407 struct device_attribute pci_dev_attrs[] = { 408 __ATTR_RO(resource), 409 __ATTR_RO(vendor), 410 __ATTR_RO(device), 411 __ATTR_RO(subsystem_vendor), 412 __ATTR_RO(subsystem_device), 413 __ATTR_RO(class), 414 __ATTR_RO(irq), 415 __ATTR_RO(local_cpus), 416 __ATTR_RO(local_cpulist), 417 __ATTR_RO(modalias), 418 #ifdef CONFIG_NUMA 419 __ATTR_RO(numa_node), 420 #endif 421 __ATTR_RO(dma_mask_bits), 422 __ATTR_RO(consistent_dma_mask_bits), 423 __ATTR(enable, 0600, is_enabled_show, is_enabled_store), 424 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR), 425 broken_parity_status_show,broken_parity_status_store), 426 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store), 427 #ifdef CONFIG_HOTPLUG 428 __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store), 429 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store), 430 #endif 431 #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI) 432 __ATTR(d3cold_allowed, 0644, d3cold_allowed_show, d3cold_allowed_store), 433 #endif 434 __ATTR_NULL, 435 }; 436 437 struct device_attribute pcibus_dev_attrs[] = { 438 #ifdef CONFIG_HOTPLUG 439 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store), 440 #endif 441 __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL), 442 __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL), 443 __ATTR_NULL, 444 }; 445 446 static ssize_t 447 boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf) 448 { 449 struct pci_dev *pdev = to_pci_dev(dev); 450 struct pci_dev *vga_dev = vga_default_device(); 451 452 if (vga_dev) 453 return sprintf(buf, "%u\n", (pdev == vga_dev)); 454 455 return sprintf(buf, "%u\n", 456 !!(pdev->resource[PCI_ROM_RESOURCE].flags & 457 IORESOURCE_ROM_SHADOW)); 458 } 459 struct device_attribute vga_attr = __ATTR_RO(boot_vga); 460 461 static ssize_t 462 pci_read_config(struct file *filp, struct kobject *kobj, 463 struct bin_attribute *bin_attr, 464 char *buf, loff_t off, size_t count) 465 { 466 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj)); 467 unsigned int size = 64; 468 loff_t init_off = off; 469 u8 *data = (u8*) buf; 470 471 /* Several chips lock up trying to read undefined config space */ 472 if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) { 473 size = dev->cfg_size; 474 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) { 475 size = 128; 476 } 477 478 if (off > size) 479 return 0; 480 if (off + count > size) { 481 size -= off; 482 count = size; 483 } else { 484 size = count; 485 } 486 487 if ((off & 1) && size) { 488 u8 val; 489 pci_user_read_config_byte(dev, off, &val); 490 data[off - init_off] = val; 491 off++; 492 size--; 493 } 494 495 if ((off & 3) && size > 2) { 496 u16 val; 497 pci_user_read_config_word(dev, off, &val); 498 data[off - init_off] = val & 0xff; 499 data[off - init_off + 1] = (val >> 8) & 0xff; 500 off += 2; 501 size -= 2; 502 } 503 504 while (size > 3) { 505 u32 val; 506 pci_user_read_config_dword(dev, off, &val); 507 data[off - init_off] = val & 0xff; 508 data[off - init_off + 1] = (val >> 8) & 0xff; 509 data[off - init_off + 2] = (val >> 16) & 0xff; 510 data[off - init_off + 3] = (val >> 24) & 0xff; 511 off += 4; 512 size -= 4; 513 } 514 515 if (size >= 2) { 516 u16 val; 517 pci_user_read_config_word(dev, off, &val); 518 data[off - init_off] = val & 0xff; 519 data[off - init_off + 1] = (val >> 8) & 0xff; 520 off += 2; 521 size -= 2; 522 } 523 524 if (size > 0) { 525 u8 val; 526 pci_user_read_config_byte(dev, off, &val); 527 data[off - init_off] = val; 528 off++; 529 --size; 530 } 531 532 return count; 533 } 534 535 static ssize_t 536 pci_write_config(struct file* filp, struct kobject *kobj, 537 struct bin_attribute *bin_attr, 538 char *buf, loff_t off, size_t count) 539 { 540 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj)); 541 unsigned int size = count; 542 loff_t init_off = off; 543 u8 *data = (u8*) buf; 544 545 if (off > dev->cfg_size) 546 return 0; 547 if (off + count > dev->cfg_size) { 548 size = dev->cfg_size - off; 549 count = size; 550 } 551 552 if ((off & 1) && size) { 553 pci_user_write_config_byte(dev, off, data[off - init_off]); 554 off++; 555 size--; 556 } 557 558 if ((off & 3) && size > 2) { 559 u16 val = data[off - init_off]; 560 val |= (u16) data[off - init_off + 1] << 8; 561 pci_user_write_config_word(dev, off, val); 562 off += 2; 563 size -= 2; 564 } 565 566 while (size > 3) { 567 u32 val = data[off - init_off]; 568 val |= (u32) data[off - init_off + 1] << 8; 569 val |= (u32) data[off - init_off + 2] << 16; 570 val |= (u32) data[off - init_off + 3] << 24; 571 pci_user_write_config_dword(dev, off, val); 572 off += 4; 573 size -= 4; 574 } 575 576 if (size >= 2) { 577 u16 val = data[off - init_off]; 578 val |= (u16) data[off - init_off + 1] << 8; 579 pci_user_write_config_word(dev, off, val); 580 off += 2; 581 size -= 2; 582 } 583 584 if (size) { 585 pci_user_write_config_byte(dev, off, data[off - init_off]); 586 off++; 587 --size; 588 } 589 590 return count; 591 } 592 593 static ssize_t 594 read_vpd_attr(struct file *filp, struct kobject *kobj, 595 struct bin_attribute *bin_attr, 596 char *buf, loff_t off, size_t count) 597 { 598 struct pci_dev *dev = 599 to_pci_dev(container_of(kobj, struct device, kobj)); 600 601 if (off > bin_attr->size) 602 count = 0; 603 else if (count > bin_attr->size - off) 604 count = bin_attr->size - off; 605 606 return pci_read_vpd(dev, off, count, buf); 607 } 608 609 static ssize_t 610 write_vpd_attr(struct file *filp, struct kobject *kobj, 611 struct bin_attribute *bin_attr, 612 char *buf, loff_t off, size_t count) 613 { 614 struct pci_dev *dev = 615 to_pci_dev(container_of(kobj, struct device, kobj)); 616 617 if (off > bin_attr->size) 618 count = 0; 619 else if (count > bin_attr->size - off) 620 count = bin_attr->size - off; 621 622 return pci_write_vpd(dev, off, count, buf); 623 } 624 625 #ifdef HAVE_PCI_LEGACY 626 /** 627 * pci_read_legacy_io - read byte(s) from legacy I/O port space 628 * @filp: open sysfs file 629 * @kobj: kobject corresponding to file to read from 630 * @bin_attr: struct bin_attribute for this file 631 * @buf: buffer to store results 632 * @off: offset into legacy I/O port space 633 * @count: number of bytes to read 634 * 635 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific 636 * callback routine (pci_legacy_read). 637 */ 638 static ssize_t 639 pci_read_legacy_io(struct file *filp, struct kobject *kobj, 640 struct bin_attribute *bin_attr, 641 char *buf, loff_t off, size_t count) 642 { 643 struct pci_bus *bus = to_pci_bus(container_of(kobj, 644 struct device, 645 kobj)); 646 647 /* Only support 1, 2 or 4 byte accesses */ 648 if (count != 1 && count != 2 && count != 4) 649 return -EINVAL; 650 651 return pci_legacy_read(bus, off, (u32 *)buf, count); 652 } 653 654 /** 655 * pci_write_legacy_io - write byte(s) to legacy I/O port space 656 * @filp: open sysfs file 657 * @kobj: kobject corresponding to file to read from 658 * @bin_attr: struct bin_attribute for this file 659 * @buf: buffer containing value to be written 660 * @off: offset into legacy I/O port space 661 * @count: number of bytes to write 662 * 663 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific 664 * callback routine (pci_legacy_write). 665 */ 666 static ssize_t 667 pci_write_legacy_io(struct file *filp, struct kobject *kobj, 668 struct bin_attribute *bin_attr, 669 char *buf, loff_t off, size_t count) 670 { 671 struct pci_bus *bus = to_pci_bus(container_of(kobj, 672 struct device, 673 kobj)); 674 /* Only support 1, 2 or 4 byte accesses */ 675 if (count != 1 && count != 2 && count != 4) 676 return -EINVAL; 677 678 return pci_legacy_write(bus, off, *(u32 *)buf, count); 679 } 680 681 /** 682 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space 683 * @filp: open sysfs file 684 * @kobj: kobject corresponding to device to be mapped 685 * @attr: struct bin_attribute for this file 686 * @vma: struct vm_area_struct passed to mmap 687 * 688 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap 689 * legacy memory space (first meg of bus space) into application virtual 690 * memory space. 691 */ 692 static int 693 pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, 694 struct bin_attribute *attr, 695 struct vm_area_struct *vma) 696 { 697 struct pci_bus *bus = to_pci_bus(container_of(kobj, 698 struct device, 699 kobj)); 700 701 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); 702 } 703 704 /** 705 * pci_mmap_legacy_io - map legacy PCI IO into user memory space 706 * @filp: open sysfs file 707 * @kobj: kobject corresponding to device to be mapped 708 * @attr: struct bin_attribute for this file 709 * @vma: struct vm_area_struct passed to mmap 710 * 711 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap 712 * legacy IO space (first meg of bus space) into application virtual 713 * memory space. Returns -ENOSYS if the operation isn't supported 714 */ 715 static int 716 pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, 717 struct bin_attribute *attr, 718 struct vm_area_struct *vma) 719 { 720 struct pci_bus *bus = to_pci_bus(container_of(kobj, 721 struct device, 722 kobj)); 723 724 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); 725 } 726 727 /** 728 * pci_adjust_legacy_attr - adjustment of legacy file attributes 729 * @b: bus to create files under 730 * @mmap_type: I/O port or memory 731 * 732 * Stub implementation. Can be overridden by arch if necessary. 733 */ 734 void __weak 735 pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type) 736 { 737 return; 738 } 739 740 /** 741 * pci_create_legacy_files - create legacy I/O port and memory files 742 * @b: bus to create files under 743 * 744 * Some platforms allow access to legacy I/O port and ISA memory space on 745 * a per-bus basis. This routine creates the files and ties them into 746 * their associated read, write and mmap files from pci-sysfs.c 747 * 748 * On error unwind, but don't propagate the error to the caller 749 * as it is ok to set up the PCI bus without these files. 750 */ 751 void pci_create_legacy_files(struct pci_bus *b) 752 { 753 int error; 754 755 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2, 756 GFP_ATOMIC); 757 if (!b->legacy_io) 758 goto kzalloc_err; 759 760 sysfs_bin_attr_init(b->legacy_io); 761 b->legacy_io->attr.name = "legacy_io"; 762 b->legacy_io->size = 0xffff; 763 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR; 764 b->legacy_io->read = pci_read_legacy_io; 765 b->legacy_io->write = pci_write_legacy_io; 766 b->legacy_io->mmap = pci_mmap_legacy_io; 767 pci_adjust_legacy_attr(b, pci_mmap_io); 768 error = device_create_bin_file(&b->dev, b->legacy_io); 769 if (error) 770 goto legacy_io_err; 771 772 /* Allocated above after the legacy_io struct */ 773 b->legacy_mem = b->legacy_io + 1; 774 sysfs_bin_attr_init(b->legacy_mem); 775 b->legacy_mem->attr.name = "legacy_mem"; 776 b->legacy_mem->size = 1024*1024; 777 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR; 778 b->legacy_mem->mmap = pci_mmap_legacy_mem; 779 pci_adjust_legacy_attr(b, pci_mmap_mem); 780 error = device_create_bin_file(&b->dev, b->legacy_mem); 781 if (error) 782 goto legacy_mem_err; 783 784 return; 785 786 legacy_mem_err: 787 device_remove_bin_file(&b->dev, b->legacy_io); 788 legacy_io_err: 789 kfree(b->legacy_io); 790 b->legacy_io = NULL; 791 kzalloc_err: 792 printk(KERN_WARNING "pci: warning: could not create legacy I/O port " 793 "and ISA memory resources to sysfs\n"); 794 return; 795 } 796 797 void pci_remove_legacy_files(struct pci_bus *b) 798 { 799 if (b->legacy_io) { 800 device_remove_bin_file(&b->dev, b->legacy_io); 801 device_remove_bin_file(&b->dev, b->legacy_mem); 802 kfree(b->legacy_io); /* both are allocated here */ 803 } 804 } 805 #endif /* HAVE_PCI_LEGACY */ 806 807 #ifdef HAVE_PCI_MMAP 808 809 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma, 810 enum pci_mmap_api mmap_api) 811 { 812 unsigned long nr, start, size, pci_start; 813 814 if (pci_resource_len(pdev, resno) == 0) 815 return 0; 816 nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT; 817 start = vma->vm_pgoff; 818 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; 819 pci_start = (mmap_api == PCI_MMAP_PROCFS) ? 820 pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0; 821 if (start >= pci_start && start < pci_start + size && 822 start + nr <= pci_start + size) 823 return 1; 824 return 0; 825 } 826 827 /** 828 * pci_mmap_resource - map a PCI resource into user memory space 829 * @kobj: kobject for mapping 830 * @attr: struct bin_attribute for the file being mapped 831 * @vma: struct vm_area_struct passed into the mmap 832 * @write_combine: 1 for write_combine mapping 833 * 834 * Use the regular PCI mapping routines to map a PCI resource into userspace. 835 */ 836 static int 837 pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, 838 struct vm_area_struct *vma, int write_combine) 839 { 840 struct pci_dev *pdev = to_pci_dev(container_of(kobj, 841 struct device, kobj)); 842 struct resource *res = attr->private; 843 enum pci_mmap_state mmap_type; 844 resource_size_t start, end; 845 int i; 846 847 for (i = 0; i < PCI_ROM_RESOURCE; i++) 848 if (res == &pdev->resource[i]) 849 break; 850 if (i >= PCI_ROM_RESOURCE) 851 return -ENODEV; 852 853 if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) { 854 WARN(1, "process \"%s\" tried to map 0x%08lx bytes " 855 "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n", 856 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff, 857 pci_name(pdev), i, 858 (u64)pci_resource_start(pdev, i), 859 (u64)pci_resource_len(pdev, i)); 860 return -EINVAL; 861 } 862 863 /* pci_mmap_page_range() expects the same kind of entry as coming 864 * from /proc/bus/pci/ which is a "user visible" value. If this is 865 * different from the resource itself, arch will do necessary fixup. 866 */ 867 pci_resource_to_user(pdev, i, res, &start, &end); 868 vma->vm_pgoff += start >> PAGE_SHIFT; 869 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; 870 871 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start)) 872 return -EINVAL; 873 874 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine); 875 } 876 877 static int 878 pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, 879 struct bin_attribute *attr, 880 struct vm_area_struct *vma) 881 { 882 return pci_mmap_resource(kobj, attr, vma, 0); 883 } 884 885 static int 886 pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, 887 struct bin_attribute *attr, 888 struct vm_area_struct *vma) 889 { 890 return pci_mmap_resource(kobj, attr, vma, 1); 891 } 892 893 static ssize_t 894 pci_resource_io(struct file *filp, struct kobject *kobj, 895 struct bin_attribute *attr, char *buf, 896 loff_t off, size_t count, bool write) 897 { 898 struct pci_dev *pdev = to_pci_dev(container_of(kobj, 899 struct device, kobj)); 900 struct resource *res = attr->private; 901 unsigned long port = off; 902 int i; 903 904 for (i = 0; i < PCI_ROM_RESOURCE; i++) 905 if (res == &pdev->resource[i]) 906 break; 907 if (i >= PCI_ROM_RESOURCE) 908 return -ENODEV; 909 910 port += pci_resource_start(pdev, i); 911 912 if (port > pci_resource_end(pdev, i)) 913 return 0; 914 915 if (port + count - 1 > pci_resource_end(pdev, i)) 916 return -EINVAL; 917 918 switch (count) { 919 case 1: 920 if (write) 921 outb(*(u8 *)buf, port); 922 else 923 *(u8 *)buf = inb(port); 924 return 1; 925 case 2: 926 if (write) 927 outw(*(u16 *)buf, port); 928 else 929 *(u16 *)buf = inw(port); 930 return 2; 931 case 4: 932 if (write) 933 outl(*(u32 *)buf, port); 934 else 935 *(u32 *)buf = inl(port); 936 return 4; 937 } 938 return -EINVAL; 939 } 940 941 static ssize_t 942 pci_read_resource_io(struct file *filp, struct kobject *kobj, 943 struct bin_attribute *attr, char *buf, 944 loff_t off, size_t count) 945 { 946 return pci_resource_io(filp, kobj, attr, buf, off, count, false); 947 } 948 949 static ssize_t 950 pci_write_resource_io(struct file *filp, struct kobject *kobj, 951 struct bin_attribute *attr, char *buf, 952 loff_t off, size_t count) 953 { 954 return pci_resource_io(filp, kobj, attr, buf, off, count, true); 955 } 956 957 /** 958 * pci_remove_resource_files - cleanup resource files 959 * @pdev: dev to cleanup 960 * 961 * If we created resource files for @pdev, remove them from sysfs and 962 * free their resources. 963 */ 964 static void 965 pci_remove_resource_files(struct pci_dev *pdev) 966 { 967 int i; 968 969 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 970 struct bin_attribute *res_attr; 971 972 res_attr = pdev->res_attr[i]; 973 if (res_attr) { 974 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 975 kfree(res_attr); 976 } 977 978 res_attr = pdev->res_attr_wc[i]; 979 if (res_attr) { 980 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); 981 kfree(res_attr); 982 } 983 } 984 } 985 986 static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) 987 { 988 /* allocate attribute structure, piggyback attribute name */ 989 int name_len = write_combine ? 13 : 10; 990 struct bin_attribute *res_attr; 991 int retval; 992 993 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); 994 if (res_attr) { 995 char *res_attr_name = (char *)(res_attr + 1); 996 997 sysfs_bin_attr_init(res_attr); 998 if (write_combine) { 999 pdev->res_attr_wc[num] = res_attr; 1000 sprintf(res_attr_name, "resource%d_wc", num); 1001 res_attr->mmap = pci_mmap_resource_wc; 1002 } else { 1003 pdev->res_attr[num] = res_attr; 1004 sprintf(res_attr_name, "resource%d", num); 1005 res_attr->mmap = pci_mmap_resource_uc; 1006 } 1007 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { 1008 res_attr->read = pci_read_resource_io; 1009 res_attr->write = pci_write_resource_io; 1010 } 1011 res_attr->attr.name = res_attr_name; 1012 res_attr->attr.mode = S_IRUSR | S_IWUSR; 1013 res_attr->size = pci_resource_len(pdev, num); 1014 res_attr->private = &pdev->resource[num]; 1015 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); 1016 } else 1017 retval = -ENOMEM; 1018 1019 return retval; 1020 } 1021 1022 /** 1023 * pci_create_resource_files - create resource files in sysfs for @dev 1024 * @pdev: dev in question 1025 * 1026 * Walk the resources in @pdev creating files for each resource available. 1027 */ 1028 static int pci_create_resource_files(struct pci_dev *pdev) 1029 { 1030 int i; 1031 int retval; 1032 1033 /* Expose the PCI resources from this device as files */ 1034 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 1035 1036 /* skip empty resources */ 1037 if (!pci_resource_len(pdev, i)) 1038 continue; 1039 1040 retval = pci_create_attr(pdev, i, 0); 1041 /* for prefetchable resources, create a WC mappable file */ 1042 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH) 1043 retval = pci_create_attr(pdev, i, 1); 1044 1045 if (retval) { 1046 pci_remove_resource_files(pdev); 1047 return retval; 1048 } 1049 } 1050 return 0; 1051 } 1052 #else /* !HAVE_PCI_MMAP */ 1053 int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } 1054 void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } 1055 #endif /* HAVE_PCI_MMAP */ 1056 1057 /** 1058 * pci_write_rom - used to enable access to the PCI ROM display 1059 * @filp: sysfs file 1060 * @kobj: kernel object handle 1061 * @bin_attr: struct bin_attribute for this file 1062 * @buf: user input 1063 * @off: file offset 1064 * @count: number of byte in input 1065 * 1066 * writing anything except 0 enables it 1067 */ 1068 static ssize_t 1069 pci_write_rom(struct file *filp, struct kobject *kobj, 1070 struct bin_attribute *bin_attr, 1071 char *buf, loff_t off, size_t count) 1072 { 1073 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); 1074 1075 if ((off == 0) && (*buf == '0') && (count == 2)) 1076 pdev->rom_attr_enabled = 0; 1077 else 1078 pdev->rom_attr_enabled = 1; 1079 1080 return count; 1081 } 1082 1083 /** 1084 * pci_read_rom - read a PCI ROM 1085 * @filp: sysfs file 1086 * @kobj: kernel object handle 1087 * @bin_attr: struct bin_attribute for this file 1088 * @buf: where to put the data we read from the ROM 1089 * @off: file offset 1090 * @count: number of bytes to read 1091 * 1092 * Put @count bytes starting at @off into @buf from the ROM in the PCI 1093 * device corresponding to @kobj. 1094 */ 1095 static ssize_t 1096 pci_read_rom(struct file *filp, struct kobject *kobj, 1097 struct bin_attribute *bin_attr, 1098 char *buf, loff_t off, size_t count) 1099 { 1100 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); 1101 void __iomem *rom; 1102 size_t size; 1103 1104 if (!pdev->rom_attr_enabled) 1105 return -EINVAL; 1106 1107 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ 1108 if (!rom || !size) 1109 return -EIO; 1110 1111 if (off >= size) 1112 count = 0; 1113 else { 1114 if (off + count > size) 1115 count = size - off; 1116 1117 memcpy_fromio(buf, rom + off, count); 1118 } 1119 pci_unmap_rom(pdev, rom); 1120 1121 return count; 1122 } 1123 1124 static struct bin_attribute pci_config_attr = { 1125 .attr = { 1126 .name = "config", 1127 .mode = S_IRUGO | S_IWUSR, 1128 }, 1129 .size = PCI_CFG_SPACE_SIZE, 1130 .read = pci_read_config, 1131 .write = pci_write_config, 1132 }; 1133 1134 static struct bin_attribute pcie_config_attr = { 1135 .attr = { 1136 .name = "config", 1137 .mode = S_IRUGO | S_IWUSR, 1138 }, 1139 .size = PCI_CFG_SPACE_EXP_SIZE, 1140 .read = pci_read_config, 1141 .write = pci_write_config, 1142 }; 1143 1144 int __weak pcibios_add_platform_entries(struct pci_dev *dev) 1145 { 1146 return 0; 1147 } 1148 1149 static ssize_t reset_store(struct device *dev, 1150 struct device_attribute *attr, const char *buf, 1151 size_t count) 1152 { 1153 struct pci_dev *pdev = to_pci_dev(dev); 1154 unsigned long val; 1155 ssize_t result = strict_strtoul(buf, 0, &val); 1156 1157 if (result < 0) 1158 return result; 1159 1160 if (val != 1) 1161 return -EINVAL; 1162 1163 result = pci_reset_function(pdev); 1164 if (result < 0) 1165 return result; 1166 1167 return count; 1168 } 1169 1170 static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store); 1171 1172 static int pci_create_capabilities_sysfs(struct pci_dev *dev) 1173 { 1174 int retval; 1175 struct bin_attribute *attr; 1176 1177 /* If the device has VPD, try to expose it in sysfs. */ 1178 if (dev->vpd) { 1179 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1180 if (!attr) 1181 return -ENOMEM; 1182 1183 sysfs_bin_attr_init(attr); 1184 attr->size = dev->vpd->len; 1185 attr->attr.name = "vpd"; 1186 attr->attr.mode = S_IRUSR | S_IWUSR; 1187 attr->read = read_vpd_attr; 1188 attr->write = write_vpd_attr; 1189 retval = sysfs_create_bin_file(&dev->dev.kobj, attr); 1190 if (retval) { 1191 kfree(attr); 1192 return retval; 1193 } 1194 dev->vpd->attr = attr; 1195 } 1196 1197 /* Active State Power Management */ 1198 pcie_aspm_create_sysfs_dev_files(dev); 1199 1200 if (!pci_probe_reset_function(dev)) { 1201 retval = device_create_file(&dev->dev, &reset_attr); 1202 if (retval) 1203 goto error; 1204 dev->reset_fn = 1; 1205 } 1206 return 0; 1207 1208 error: 1209 pcie_aspm_remove_sysfs_dev_files(dev); 1210 if (dev->vpd && dev->vpd->attr) { 1211 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1212 kfree(dev->vpd->attr); 1213 } 1214 1215 return retval; 1216 } 1217 1218 int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev) 1219 { 1220 int retval; 1221 int rom_size = 0; 1222 struct bin_attribute *attr; 1223 1224 if (!sysfs_initialized) 1225 return -EACCES; 1226 1227 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) 1228 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr); 1229 else 1230 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1231 if (retval) 1232 goto err; 1233 1234 retval = pci_create_resource_files(pdev); 1235 if (retval) 1236 goto err_config_file; 1237 1238 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) 1239 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1240 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW) 1241 rom_size = 0x20000; 1242 1243 /* If the device has a ROM, try to expose it in sysfs. */ 1244 if (rom_size) { 1245 attr = kzalloc(sizeof(*attr), GFP_ATOMIC); 1246 if (!attr) { 1247 retval = -ENOMEM; 1248 goto err_resource_files; 1249 } 1250 sysfs_bin_attr_init(attr); 1251 attr->size = rom_size; 1252 attr->attr.name = "rom"; 1253 attr->attr.mode = S_IRUSR | S_IWUSR; 1254 attr->read = pci_read_rom; 1255 attr->write = pci_write_rom; 1256 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr); 1257 if (retval) { 1258 kfree(attr); 1259 goto err_resource_files; 1260 } 1261 pdev->rom_attr = attr; 1262 } 1263 1264 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) { 1265 retval = device_create_file(&pdev->dev, &vga_attr); 1266 if (retval) 1267 goto err_rom_file; 1268 } 1269 1270 /* add platform-specific attributes */ 1271 retval = pcibios_add_platform_entries(pdev); 1272 if (retval) 1273 goto err_vga_file; 1274 1275 /* add sysfs entries for various capabilities */ 1276 retval = pci_create_capabilities_sysfs(pdev); 1277 if (retval) 1278 goto err_vga_file; 1279 1280 pci_create_firmware_label_files(pdev); 1281 1282 return 0; 1283 1284 err_vga_file: 1285 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) 1286 device_remove_file(&pdev->dev, &vga_attr); 1287 err_rom_file: 1288 if (rom_size) { 1289 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1290 kfree(pdev->rom_attr); 1291 pdev->rom_attr = NULL; 1292 } 1293 err_resource_files: 1294 pci_remove_resource_files(pdev); 1295 err_config_file: 1296 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) 1297 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1298 else 1299 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1300 err: 1301 return retval; 1302 } 1303 1304 static void pci_remove_capabilities_sysfs(struct pci_dev *dev) 1305 { 1306 if (dev->vpd && dev->vpd->attr) { 1307 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); 1308 kfree(dev->vpd->attr); 1309 } 1310 1311 pcie_aspm_remove_sysfs_dev_files(dev); 1312 if (dev->reset_fn) { 1313 device_remove_file(&dev->dev, &reset_attr); 1314 dev->reset_fn = 0; 1315 } 1316 } 1317 1318 /** 1319 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files 1320 * @pdev: device whose entries we should free 1321 * 1322 * Cleanup when @pdev is removed from sysfs. 1323 */ 1324 void pci_remove_sysfs_dev_files(struct pci_dev *pdev) 1325 { 1326 int rom_size = 0; 1327 1328 if (!sysfs_initialized) 1329 return; 1330 1331 pci_remove_capabilities_sysfs(pdev); 1332 1333 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) 1334 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); 1335 else 1336 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); 1337 1338 pci_remove_resource_files(pdev); 1339 1340 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) 1341 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 1342 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW) 1343 rom_size = 0x20000; 1344 1345 if (rom_size && pdev->rom_attr) { 1346 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 1347 kfree(pdev->rom_attr); 1348 } 1349 1350 pci_remove_firmware_label_files(pdev); 1351 1352 } 1353 1354 static int __init pci_sysfs_init(void) 1355 { 1356 struct pci_dev *pdev = NULL; 1357 int retval; 1358 1359 sysfs_initialized = 1; 1360 for_each_pci_dev(pdev) { 1361 retval = pci_create_sysfs_dev_files(pdev); 1362 if (retval) { 1363 pci_dev_put(pdev); 1364 return retval; 1365 } 1366 } 1367 1368 return 0; 1369 } 1370 1371 late_initcall(pci_sysfs_init); 1372