1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Implement the default iomap interfaces 4 * 5 * (C) Copyright 2004 Linus Torvalds 6 */ 7 #include <linux/pci.h> 8 #include <linux/io.h> 9 10 #include <linux/export.h> 11 12 #include "pci.h" /* for pci_bar_index_is_valid() */ 13 14 /** 15 * pci_iomap_range - create a virtual mapping cookie for a PCI BAR 16 * @dev: PCI device that owns the BAR 17 * @bar: BAR number 18 * @offset: map memory at the given offset in BAR 19 * @maxlen: max length of the memory to map 20 * 21 * Using this function you will get a __iomem address to your device BAR. 22 * You can access it using ioread*() and iowrite*(). These functions hide 23 * the details if this is a MMIO or PIO address space and will just do what 24 * you expect from them in the correct way. 25 * 26 * @maxlen specifies the maximum length to map. If you want to get access to 27 * the complete BAR from offset to the end, pass %0 here. 28 * */ 29 void __iomem *pci_iomap_range(struct pci_dev *dev, 30 int bar, 31 unsigned long offset, 32 unsigned long maxlen) 33 { 34 resource_size_t start, len; 35 unsigned long flags; 36 37 if (!pci_bar_index_is_valid(bar)) 38 return NULL; 39 40 start = pci_resource_start(dev, bar); 41 len = pci_resource_len(dev, bar); 42 flags = pci_resource_flags(dev, bar); 43 44 if (len <= offset || !start) 45 return NULL; 46 47 len -= offset; 48 start += offset; 49 if (maxlen && len > maxlen) 50 len = maxlen; 51 if (flags & IORESOURCE_IO) 52 return __pci_ioport_map(dev, start, len); 53 if (flags & IORESOURCE_MEM) 54 return ioremap(start, len); 55 /* What? */ 56 return NULL; 57 } 58 EXPORT_SYMBOL(pci_iomap_range); 59 60 /** 61 * pci_iomap_wc_range - create a virtual WC mapping cookie for a PCI BAR 62 * @dev: PCI device that owns the BAR 63 * @bar: BAR number 64 * @offset: map memory at the given offset in BAR 65 * @maxlen: max length of the memory to map 66 * 67 * Using this function you will get a __iomem address to your device BAR. 68 * You can access it using ioread*() and iowrite*(). These functions hide 69 * the details if this is a MMIO or PIO address space and will just do what 70 * you expect from them in the correct way. When possible write combining 71 * is used. 72 * 73 * @maxlen specifies the maximum length to map. If you want to get access to 74 * the complete BAR from offset to the end, pass %0 here. 75 * */ 76 void __iomem *pci_iomap_wc_range(struct pci_dev *dev, 77 int bar, 78 unsigned long offset, 79 unsigned long maxlen) 80 { 81 resource_size_t start, len; 82 unsigned long flags; 83 84 if (!pci_bar_index_is_valid(bar)) 85 return NULL; 86 87 start = pci_resource_start(dev, bar); 88 len = pci_resource_len(dev, bar); 89 flags = pci_resource_flags(dev, bar); 90 91 if (len <= offset || !start) 92 return NULL; 93 if (flags & IORESOURCE_IO) 94 return NULL; 95 96 len -= offset; 97 start += offset; 98 if (maxlen && len > maxlen) 99 len = maxlen; 100 101 if (flags & IORESOURCE_MEM) 102 return ioremap_wc(start, len); 103 104 /* What? */ 105 return NULL; 106 } 107 EXPORT_SYMBOL_GPL(pci_iomap_wc_range); 108 109 /** 110 * pci_iomap - create a virtual mapping cookie for a PCI BAR 111 * @dev: PCI device that owns the BAR 112 * @bar: BAR number 113 * @maxlen: length of the memory to map 114 * 115 * Using this function you will get a __iomem address to your device BAR. 116 * You can access it using ioread*() and iowrite*(). These functions hide 117 * the details if this is a MMIO or PIO address space and will just do what 118 * you expect from them in the correct way. 119 * 120 * @maxlen specifies the maximum length to map. If you want to get access to 121 * the complete BAR without checking for its length first, pass %0 here. 122 * */ 123 void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) 124 { 125 return pci_iomap_range(dev, bar, 0, maxlen); 126 } 127 EXPORT_SYMBOL(pci_iomap); 128 129 /** 130 * pci_iomap_wc - create a virtual WC mapping cookie for a PCI BAR 131 * @dev: PCI device that owns the BAR 132 * @bar: BAR number 133 * @maxlen: length of the memory to map 134 * 135 * Using this function you will get a __iomem address to your device BAR. 136 * You can access it using ioread*() and iowrite*(). These functions hide 137 * the details if this is a MMIO or PIO address space and will just do what 138 * you expect from them in the correct way. When possible write combining 139 * is used. 140 * 141 * @maxlen specifies the maximum length to map. If you want to get access to 142 * the complete BAR without checking for its length first, pass %0 here. 143 * */ 144 void __iomem *pci_iomap_wc(struct pci_dev *dev, int bar, unsigned long maxlen) 145 { 146 return pci_iomap_wc_range(dev, bar, 0, maxlen); 147 } 148 EXPORT_SYMBOL_GPL(pci_iomap_wc); 149 150 /* 151 * pci_iounmap() somewhat illogically comes from lib/iomap.c for the 152 * CONFIG_GENERIC_IOMAP case, because that's the code that knows about 153 * the different IOMAP ranges. 154 * 155 * But if the architecture does not use the generic iomap code, and if 156 * it has _not_ defined its own private pci_iounmap function, we define 157 * it here. 158 * 159 * NOTE! This default implementation assumes that if the architecture 160 * support ioport mapping (HAS_IOPORT_MAP), the ioport mapping will 161 * be fixed to the range [ PCI_IOBASE, PCI_IOBASE+IO_SPACE_LIMIT [, 162 * and does not need unmapping with 'ioport_unmap()'. 163 * 164 * If you have different rules for your architecture, you need to 165 * implement your own pci_iounmap() that knows the rules for where 166 * and how IO vs MEM get mapped. 167 * 168 * This code is odd, and the ARCH_HAS/ARCH_WANTS #define logic comes 169 * from legacy <asm-generic/io.h> header file behavior. In particular, 170 * it would seem to make sense to do the iounmap(p) for the non-IO-space 171 * case here regardless, but that's not what the old header file code 172 * did. Probably incorrectly, but this is meant to be bug-for-bug 173 * compatible. 174 */ 175 #if defined(ARCH_WANTS_GENERIC_PCI_IOUNMAP) 176 177 void pci_iounmap(struct pci_dev *dev, void __iomem *p) 178 { 179 #ifdef ARCH_HAS_GENERIC_IOPORT_MAP 180 uintptr_t start = (uintptr_t) PCI_IOBASE; 181 uintptr_t addr = (uintptr_t) p; 182 183 if (addr >= start && addr < start + IO_SPACE_LIMIT) 184 return; 185 #endif 186 iounmap(p); 187 } 188 EXPORT_SYMBOL(pci_iounmap); 189 190 #endif /* ARCH_WANTS_GENERIC_PCI_IOUNMAP */ 191