1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Endpoint Function Driver to implement Non-Transparent Bridge functionality 4 * Between PCI RC and EP 5 * 6 * Copyright (C) 2020 Texas Instruments 7 * Copyright (C) 2022 NXP 8 * 9 * Based on pci-epf-ntb.c 10 * Author: Frank Li <Frank.Li@nxp.com> 11 * Author: Kishon Vijay Abraham I <kishon@ti.com> 12 */ 13 14 /* 15 * +------------+ +---------------------------------------+ 16 * | | | | 17 * +------------+ | +--------------+ 18 * | NTB | | | NTB | 19 * | NetDev | | | NetDev | 20 * +------------+ | +--------------+ 21 * | NTB | | | NTB | 22 * | Transfer | | | Transfer | 23 * +------------+ | +--------------+ 24 * | | | | | 25 * | PCI NTB | | | | 26 * | EPF | | | | 27 * | Driver | | | PCI Virtual | 28 * | | +---------------+ | NTB Driver | 29 * | | | PCI EP NTB |<------>| | 30 * | | | FN Driver | | | 31 * +------------+ +---------------+ +--------------+ 32 * | | | | | | 33 * | PCI Bus | <-----> | PCI EP Bus | | Virtual PCI | 34 * | | PCI | | | Bus | 35 * +------------+ +---------------+--------+--------------+ 36 * PCIe Root Port PCI EP 37 */ 38 39 #include <linux/delay.h> 40 #include <linux/io.h> 41 #include <linux/module.h> 42 #include <linux/slab.h> 43 44 #include <linux/pci-epc.h> 45 #include <linux/pci-epf.h> 46 #include <linux/ntb.h> 47 48 static struct workqueue_struct *kpcintb_workqueue; 49 50 #define COMMAND_CONFIGURE_DOORBELL 1 51 #define COMMAND_TEARDOWN_DOORBELL 2 52 #define COMMAND_CONFIGURE_MW 3 53 #define COMMAND_TEARDOWN_MW 4 54 #define COMMAND_LINK_UP 5 55 #define COMMAND_LINK_DOWN 6 56 57 #define COMMAND_STATUS_OK 1 58 #define COMMAND_STATUS_ERROR 2 59 60 #define LINK_STATUS_UP BIT(0) 61 62 #define SPAD_COUNT 64 63 #define DB_COUNT 4 64 #define NTB_MW_OFFSET 2 65 #define DB_COUNT_MASK GENMASK(15, 0) 66 #define MSIX_ENABLE BIT(16) 67 #define MAX_DB_COUNT 32 68 #define MAX_MW 4 69 70 enum epf_ntb_bar { 71 BAR_CONFIG, 72 BAR_DB, 73 BAR_MW0, 74 BAR_MW1, 75 BAR_MW2, 76 }; 77 78 /* 79 * +--------------------------------------------------+ Base 80 * | | 81 * | | 82 * | | 83 * | Common Control Register | 84 * | | 85 * | | 86 * | | 87 * +-----------------------+--------------------------+ Base+span_offset 88 * | | | 89 * | Peer Span Space | Span Space | 90 * | | | 91 * | | | 92 * +-----------------------+--------------------------+ Base+span_offset 93 * | | | +span_count * 4 94 * | | | 95 * | Span Space | Peer Span Space | 96 * | | | 97 * +-----------------------+--------------------------+ 98 * Virtual PCI PCIe Endpoint 99 * NTB Driver NTB Driver 100 */ 101 struct epf_ntb_ctrl { 102 u32 command; 103 u32 argument; 104 u16 command_status; 105 u16 link_status; 106 u32 topology; 107 u64 addr; 108 u64 size; 109 u32 num_mws; 110 u32 reserved; 111 u32 spad_offset; 112 u32 spad_count; 113 u32 db_entry_size; 114 u32 db_data[MAX_DB_COUNT]; 115 u32 db_offset[MAX_DB_COUNT]; 116 } __packed; 117 118 struct epf_ntb { 119 struct ntb_dev ntb; 120 struct pci_epf *epf; 121 struct config_group group; 122 123 u32 num_mws; 124 u32 db_count; 125 u32 spad_count; 126 u64 mws_size[MAX_MW]; 127 u64 db; 128 u32 vbus_number; 129 u16 vntb_pid; 130 u16 vntb_vid; 131 132 bool linkup; 133 u32 spad_size; 134 135 enum pci_barno epf_ntb_bar[6]; 136 137 struct epf_ntb_ctrl *reg; 138 139 u32 *epf_db; 140 141 phys_addr_t vpci_mw_phy[MAX_MW]; 142 void __iomem *vpci_mw_addr[MAX_MW]; 143 144 struct delayed_work cmd_handler; 145 }; 146 147 #define to_epf_ntb(epf_group) container_of((epf_group), struct epf_ntb, group) 148 #define ntb_ndev(__ntb) container_of(__ntb, struct epf_ntb, ntb) 149 150 static struct pci_epf_header epf_ntb_header = { 151 .vendorid = PCI_ANY_ID, 152 .deviceid = PCI_ANY_ID, 153 .baseclass_code = PCI_BASE_CLASS_MEMORY, 154 .interrupt_pin = PCI_INTERRUPT_INTA, 155 }; 156 157 /** 158 * epf_ntb_link_up() - Raise link_up interrupt to Virtual Host (VHOST) 159 * @ntb: NTB device that facilitates communication between HOST and VHOST 160 * @link_up: true or false indicating Link is UP or Down 161 * 162 * Once NTB function in HOST invoke ntb_link_enable(), 163 * this NTB function driver will trigger a link event to VHOST. 164 * 165 * Returns: Zero for success, or an error code in case of failure 166 */ 167 static int epf_ntb_link_up(struct epf_ntb *ntb, bool link_up) 168 { 169 if (link_up) 170 ntb->reg->link_status |= LINK_STATUS_UP; 171 else 172 ntb->reg->link_status &= ~LINK_STATUS_UP; 173 174 ntb_link_event(&ntb->ntb); 175 return 0; 176 } 177 178 /** 179 * epf_ntb_configure_mw() - Configure the Outbound Address Space for VHOST 180 * to access the memory window of HOST 181 * @ntb: NTB device that facilitates communication between HOST and VHOST 182 * @mw: Index of the memory window (either 0, 1, 2 or 3) 183 * 184 * EP Outbound Window 185 * +--------+ +-----------+ 186 * | | | | 187 * | | | | 188 * | | | | 189 * | | | | 190 * | | +-----------+ 191 * | Virtual| | Memory Win| 192 * | NTB | -----------> | | 193 * | Driver | | | 194 * | | +-----------+ 195 * | | | | 196 * | | | | 197 * +--------+ +-----------+ 198 * VHOST PCI EP 199 * 200 * Returns: Zero for success, or an error code in case of failure 201 */ 202 static int epf_ntb_configure_mw(struct epf_ntb *ntb, u32 mw) 203 { 204 phys_addr_t phys_addr; 205 u8 func_no, vfunc_no; 206 u64 addr, size; 207 int ret = 0; 208 209 phys_addr = ntb->vpci_mw_phy[mw]; 210 addr = ntb->reg->addr; 211 size = ntb->reg->size; 212 213 func_no = ntb->epf->func_no; 214 vfunc_no = ntb->epf->vfunc_no; 215 216 ret = pci_epc_map_addr(ntb->epf->epc, func_no, vfunc_no, phys_addr, addr, size); 217 if (ret) 218 dev_err(&ntb->epf->epc->dev, 219 "Failed to map memory window %d address\n", mw); 220 return ret; 221 } 222 223 /** 224 * epf_ntb_teardown_mw() - Teardown the configured OB ATU 225 * @ntb: NTB device that facilitates communication between HOST and VHOST 226 * @mw: Index of the memory window (either 0, 1, 2 or 3) 227 * 228 * Teardown the configured OB ATU configured in epf_ntb_configure_mw() using 229 * pci_epc_unmap_addr() 230 */ 231 static void epf_ntb_teardown_mw(struct epf_ntb *ntb, u32 mw) 232 { 233 pci_epc_unmap_addr(ntb->epf->epc, 234 ntb->epf->func_no, 235 ntb->epf->vfunc_no, 236 ntb->vpci_mw_phy[mw]); 237 } 238 239 /** 240 * epf_ntb_cmd_handler() - Handle commands provided by the NTB HOST 241 * @work: work_struct for the epf_ntb_epc 242 * 243 * Workqueue function that gets invoked for the two epf_ntb_epc 244 * periodically (once every 5ms) to see if it has received any commands 245 * from NTB HOST. The HOST can send commands to configure doorbell or 246 * configure memory window or to update link status. 247 */ 248 static void epf_ntb_cmd_handler(struct work_struct *work) 249 { 250 struct epf_ntb_ctrl *ctrl; 251 u32 command, argument; 252 struct epf_ntb *ntb; 253 struct device *dev; 254 int ret; 255 int i; 256 257 ntb = container_of(work, struct epf_ntb, cmd_handler.work); 258 259 for (i = 1; i < ntb->db_count; i++) { 260 if (ntb->epf_db[i]) { 261 ntb->db |= 1 << (i - 1); 262 ntb_db_event(&ntb->ntb, i); 263 ntb->epf_db[i] = 0; 264 } 265 } 266 267 ctrl = ntb->reg; 268 command = ctrl->command; 269 if (!command) 270 goto reset_handler; 271 argument = ctrl->argument; 272 273 ctrl->command = 0; 274 ctrl->argument = 0; 275 276 ctrl = ntb->reg; 277 dev = &ntb->epf->dev; 278 279 switch (command) { 280 case COMMAND_CONFIGURE_DOORBELL: 281 ctrl->command_status = COMMAND_STATUS_OK; 282 break; 283 case COMMAND_TEARDOWN_DOORBELL: 284 ctrl->command_status = COMMAND_STATUS_OK; 285 break; 286 case COMMAND_CONFIGURE_MW: 287 ret = epf_ntb_configure_mw(ntb, argument); 288 if (ret < 0) 289 ctrl->command_status = COMMAND_STATUS_ERROR; 290 else 291 ctrl->command_status = COMMAND_STATUS_OK; 292 break; 293 case COMMAND_TEARDOWN_MW: 294 epf_ntb_teardown_mw(ntb, argument); 295 ctrl->command_status = COMMAND_STATUS_OK; 296 break; 297 case COMMAND_LINK_UP: 298 ntb->linkup = true; 299 ret = epf_ntb_link_up(ntb, true); 300 if (ret < 0) 301 ctrl->command_status = COMMAND_STATUS_ERROR; 302 else 303 ctrl->command_status = COMMAND_STATUS_OK; 304 goto reset_handler; 305 case COMMAND_LINK_DOWN: 306 ntb->linkup = false; 307 ret = epf_ntb_link_up(ntb, false); 308 if (ret < 0) 309 ctrl->command_status = COMMAND_STATUS_ERROR; 310 else 311 ctrl->command_status = COMMAND_STATUS_OK; 312 break; 313 default: 314 dev_err(dev, "UNKNOWN command: %d\n", command); 315 break; 316 } 317 318 reset_handler: 319 queue_delayed_work(kpcintb_workqueue, &ntb->cmd_handler, 320 msecs_to_jiffies(5)); 321 } 322 323 /** 324 * epf_ntb_config_sspad_bar_clear() - Clear Config + Self scratchpad BAR 325 * @ntb: EPC associated with one of the HOST which holds peer's outbound 326 * address. 327 * 328 * Clear BAR0 of EP CONTROLLER 1 which contains the HOST1's config and 329 * self scratchpad region (removes inbound ATU configuration). While BAR0 is 330 * the default self scratchpad BAR, an NTB could have other BARs for self 331 * scratchpad (because of reserved BARs). This function can get the exact BAR 332 * used for self scratchpad from epf_ntb_bar[BAR_CONFIG]. 333 * 334 * Please note the self scratchpad region and config region is combined to 335 * a single region and mapped using the same BAR. Also note VHOST's peer 336 * scratchpad is HOST's self scratchpad. 337 * 338 * Returns: void 339 */ 340 static void epf_ntb_config_sspad_bar_clear(struct epf_ntb *ntb) 341 { 342 struct pci_epf_bar *epf_bar; 343 enum pci_barno barno; 344 345 barno = ntb->epf_ntb_bar[BAR_CONFIG]; 346 epf_bar = &ntb->epf->bar[barno]; 347 348 pci_epc_clear_bar(ntb->epf->epc, ntb->epf->func_no, ntb->epf->vfunc_no, epf_bar); 349 } 350 351 /** 352 * epf_ntb_config_sspad_bar_set() - Set Config + Self scratchpad BAR 353 * @ntb: NTB device that facilitates communication between HOST and VHOST 354 * 355 * Map BAR0 of EP CONTROLLER which contains the VHOST's config and 356 * self scratchpad region. 357 * 358 * Please note the self scratchpad region and config region is combined to 359 * a single region and mapped using the same BAR. 360 * 361 * Returns: Zero for success, or an error code in case of failure 362 */ 363 static int epf_ntb_config_sspad_bar_set(struct epf_ntb *ntb) 364 { 365 struct pci_epf_bar *epf_bar; 366 enum pci_barno barno; 367 u8 func_no, vfunc_no; 368 struct device *dev; 369 int ret; 370 371 dev = &ntb->epf->dev; 372 func_no = ntb->epf->func_no; 373 vfunc_no = ntb->epf->vfunc_no; 374 barno = ntb->epf_ntb_bar[BAR_CONFIG]; 375 epf_bar = &ntb->epf->bar[barno]; 376 377 ret = pci_epc_set_bar(ntb->epf->epc, func_no, vfunc_no, epf_bar); 378 if (ret) { 379 dev_err(dev, "inft: Config/Status/SPAD BAR set failed\n"); 380 return ret; 381 } 382 return 0; 383 } 384 385 /** 386 * epf_ntb_config_spad_bar_free() - Free the physical memory associated with 387 * config + scratchpad region 388 * @ntb: NTB device that facilitates communication between HOST and VHOST 389 */ 390 static void epf_ntb_config_spad_bar_free(struct epf_ntb *ntb) 391 { 392 enum pci_barno barno; 393 394 barno = ntb->epf_ntb_bar[BAR_CONFIG]; 395 pci_epf_free_space(ntb->epf, ntb->reg, barno, 0); 396 } 397 398 /** 399 * epf_ntb_config_spad_bar_alloc() - Allocate memory for config + scratchpad 400 * region 401 * @ntb: NTB device that facilitates communication between HOST and VHOST 402 * 403 * Allocate the Local Memory mentioned in the above diagram. The size of 404 * CONFIG REGION is sizeof(struct epf_ntb_ctrl) and size of SCRATCHPAD REGION 405 * is obtained from "spad-count" configfs entry. 406 * 407 * Returns: Zero for success, or an error code in case of failure 408 */ 409 static int epf_ntb_config_spad_bar_alloc(struct epf_ntb *ntb) 410 { 411 size_t align; 412 enum pci_barno barno; 413 struct epf_ntb_ctrl *ctrl; 414 u32 spad_size, ctrl_size; 415 u64 size; 416 struct pci_epf *epf = ntb->epf; 417 struct device *dev = &epf->dev; 418 u32 spad_count; 419 void *base; 420 int i; 421 const struct pci_epc_features *epc_features = pci_epc_get_features(epf->epc, 422 epf->func_no, 423 epf->vfunc_no); 424 barno = ntb->epf_ntb_bar[BAR_CONFIG]; 425 size = epc_features->bar_fixed_size[barno]; 426 align = epc_features->align; 427 428 if ((!IS_ALIGNED(size, align))) 429 return -EINVAL; 430 431 spad_count = ntb->spad_count; 432 433 ctrl_size = sizeof(struct epf_ntb_ctrl); 434 spad_size = 2 * spad_count * sizeof(u32); 435 436 if (!align) { 437 ctrl_size = roundup_pow_of_two(ctrl_size); 438 spad_size = roundup_pow_of_two(spad_size); 439 } else { 440 ctrl_size = ALIGN(ctrl_size, align); 441 spad_size = ALIGN(spad_size, align); 442 } 443 444 if (!size) 445 size = ctrl_size + spad_size; 446 else if (size < ctrl_size + spad_size) 447 return -EINVAL; 448 449 base = pci_epf_alloc_space(epf, size, barno, align, 0); 450 if (!base) { 451 dev_err(dev, "Config/Status/SPAD alloc region fail\n"); 452 return -ENOMEM; 453 } 454 455 ntb->reg = base; 456 457 ctrl = ntb->reg; 458 ctrl->spad_offset = ctrl_size; 459 460 ctrl->spad_count = spad_count; 461 ctrl->num_mws = ntb->num_mws; 462 ntb->spad_size = spad_size; 463 464 ctrl->db_entry_size = sizeof(u32); 465 466 for (i = 0; i < ntb->db_count; i++) { 467 ntb->reg->db_data[i] = 1 + i; 468 ntb->reg->db_offset[i] = 0; 469 } 470 471 return 0; 472 } 473 474 /** 475 * epf_ntb_configure_interrupt() - Configure MSI/MSI-X capability 476 * @ntb: NTB device that facilitates communication between HOST and VHOST 477 * 478 * Configure MSI/MSI-X capability for each interface with number of 479 * interrupts equal to "db_count" configfs entry. 480 * 481 * Returns: Zero for success, or an error code in case of failure 482 */ 483 static int epf_ntb_configure_interrupt(struct epf_ntb *ntb) 484 { 485 const struct pci_epc_features *epc_features; 486 struct device *dev; 487 u32 db_count; 488 int ret; 489 490 dev = &ntb->epf->dev; 491 492 epc_features = pci_epc_get_features(ntb->epf->epc, ntb->epf->func_no, ntb->epf->vfunc_no); 493 494 if (!(epc_features->msix_capable || epc_features->msi_capable)) { 495 dev_err(dev, "MSI or MSI-X is required for doorbell\n"); 496 return -EINVAL; 497 } 498 499 db_count = ntb->db_count; 500 if (db_count > MAX_DB_COUNT) { 501 dev_err(dev, "DB count cannot be more than %d\n", MAX_DB_COUNT); 502 return -EINVAL; 503 } 504 505 ntb->db_count = db_count; 506 507 if (epc_features->msi_capable) { 508 ret = pci_epc_set_msi(ntb->epf->epc, 509 ntb->epf->func_no, 510 ntb->epf->vfunc_no, 511 16); 512 if (ret) { 513 dev_err(dev, "MSI configuration failed\n"); 514 return ret; 515 } 516 } 517 518 return 0; 519 } 520 521 /** 522 * epf_ntb_db_bar_init() - Configure Doorbell window BARs 523 * @ntb: NTB device that facilitates communication between HOST and VHOST 524 * 525 * Returns: Zero for success, or an error code in case of failure 526 */ 527 static int epf_ntb_db_bar_init(struct epf_ntb *ntb) 528 { 529 const struct pci_epc_features *epc_features; 530 u32 align; 531 struct device *dev = &ntb->epf->dev; 532 int ret; 533 struct pci_epf_bar *epf_bar; 534 void __iomem *mw_addr; 535 enum pci_barno barno; 536 size_t size = sizeof(u32) * ntb->db_count; 537 538 epc_features = pci_epc_get_features(ntb->epf->epc, 539 ntb->epf->func_no, 540 ntb->epf->vfunc_no); 541 align = epc_features->align; 542 543 if (size < 128) 544 size = 128; 545 546 if (align) 547 size = ALIGN(size, align); 548 else 549 size = roundup_pow_of_two(size); 550 551 barno = ntb->epf_ntb_bar[BAR_DB]; 552 553 mw_addr = pci_epf_alloc_space(ntb->epf, size, barno, align, 0); 554 if (!mw_addr) { 555 dev_err(dev, "Failed to allocate OB address\n"); 556 return -ENOMEM; 557 } 558 559 ntb->epf_db = mw_addr; 560 561 epf_bar = &ntb->epf->bar[barno]; 562 563 ret = pci_epc_set_bar(ntb->epf->epc, ntb->epf->func_no, ntb->epf->vfunc_no, epf_bar); 564 if (ret) { 565 dev_err(dev, "Doorbell BAR set failed\n"); 566 goto err_alloc_peer_mem; 567 } 568 return ret; 569 570 err_alloc_peer_mem: 571 pci_epf_free_space(ntb->epf, mw_addr, barno, 0); 572 return -1; 573 } 574 575 static void epf_ntb_mw_bar_clear(struct epf_ntb *ntb, int num_mws); 576 577 /** 578 * epf_ntb_db_bar_clear() - Clear doorbell BAR and free memory 579 * allocated in peer's outbound address space 580 * @ntb: NTB device that facilitates communication between HOST and VHOST 581 */ 582 static void epf_ntb_db_bar_clear(struct epf_ntb *ntb) 583 { 584 enum pci_barno barno; 585 586 barno = ntb->epf_ntb_bar[BAR_DB]; 587 pci_epf_free_space(ntb->epf, ntb->epf_db, barno, 0); 588 pci_epc_clear_bar(ntb->epf->epc, 589 ntb->epf->func_no, 590 ntb->epf->vfunc_no, 591 &ntb->epf->bar[barno]); 592 } 593 594 /** 595 * epf_ntb_mw_bar_init() - Configure Memory window BARs 596 * @ntb: NTB device that facilitates communication between HOST and VHOST 597 * 598 * Returns: Zero for success, or an error code in case of failure 599 */ 600 static int epf_ntb_mw_bar_init(struct epf_ntb *ntb) 601 { 602 int ret = 0; 603 int i; 604 u64 size; 605 enum pci_barno barno; 606 struct device *dev = &ntb->epf->dev; 607 608 for (i = 0; i < ntb->num_mws; i++) { 609 size = ntb->mws_size[i]; 610 barno = ntb->epf_ntb_bar[BAR_MW0 + i]; 611 612 ntb->epf->bar[barno].barno = barno; 613 ntb->epf->bar[barno].size = size; 614 ntb->epf->bar[barno].addr = NULL; 615 ntb->epf->bar[barno].phys_addr = 0; 616 ntb->epf->bar[barno].flags |= upper_32_bits(size) ? 617 PCI_BASE_ADDRESS_MEM_TYPE_64 : 618 PCI_BASE_ADDRESS_MEM_TYPE_32; 619 620 ret = pci_epc_set_bar(ntb->epf->epc, 621 ntb->epf->func_no, 622 ntb->epf->vfunc_no, 623 &ntb->epf->bar[barno]); 624 if (ret) { 625 dev_err(dev, "MW set failed\n"); 626 goto err_alloc_mem; 627 } 628 629 /* Allocate EPC outbound memory windows to vpci vntb device */ 630 ntb->vpci_mw_addr[i] = pci_epc_mem_alloc_addr(ntb->epf->epc, 631 &ntb->vpci_mw_phy[i], 632 size); 633 if (!ntb->vpci_mw_addr[i]) { 634 ret = -ENOMEM; 635 dev_err(dev, "Failed to allocate source address\n"); 636 goto err_set_bar; 637 } 638 } 639 640 return ret; 641 642 err_set_bar: 643 pci_epc_clear_bar(ntb->epf->epc, 644 ntb->epf->func_no, 645 ntb->epf->vfunc_no, 646 &ntb->epf->bar[barno]); 647 err_alloc_mem: 648 epf_ntb_mw_bar_clear(ntb, i); 649 return ret; 650 } 651 652 /** 653 * epf_ntb_mw_bar_clear() - Clear Memory window BARs 654 * @ntb: NTB device that facilitates communication between HOST and VHOST 655 */ 656 static void epf_ntb_mw_bar_clear(struct epf_ntb *ntb, int num_mws) 657 { 658 enum pci_barno barno; 659 int i; 660 661 for (i = 0; i < num_mws; i++) { 662 barno = ntb->epf_ntb_bar[BAR_MW0 + i]; 663 pci_epc_clear_bar(ntb->epf->epc, 664 ntb->epf->func_no, 665 ntb->epf->vfunc_no, 666 &ntb->epf->bar[barno]); 667 668 pci_epc_mem_free_addr(ntb->epf->epc, 669 ntb->vpci_mw_phy[i], 670 ntb->vpci_mw_addr[i], 671 ntb->mws_size[i]); 672 } 673 } 674 675 /** 676 * epf_ntb_epc_destroy() - Cleanup NTB EPC interface 677 * @ntb: NTB device that facilitates communication between HOST and VHOST 678 * 679 * Wrapper for epf_ntb_epc_destroy_interface() to cleanup all the NTB interfaces 680 */ 681 static void epf_ntb_epc_destroy(struct epf_ntb *ntb) 682 { 683 pci_epc_remove_epf(ntb->epf->epc, ntb->epf, 0); 684 pci_epc_put(ntb->epf->epc); 685 } 686 687 /** 688 * epf_ntb_init_epc_bar() - Identify BARs to be used for each of the NTB 689 * constructs (scratchpad region, doorbell, memorywindow) 690 * @ntb: NTB device that facilitates communication between HOST and VHOST 691 * 692 * Returns: Zero for success, or an error code in case of failure 693 */ 694 static int epf_ntb_init_epc_bar(struct epf_ntb *ntb) 695 { 696 const struct pci_epc_features *epc_features; 697 enum pci_barno barno; 698 enum epf_ntb_bar bar; 699 struct device *dev; 700 u32 num_mws; 701 int i; 702 703 barno = BAR_0; 704 num_mws = ntb->num_mws; 705 dev = &ntb->epf->dev; 706 epc_features = pci_epc_get_features(ntb->epf->epc, ntb->epf->func_no, ntb->epf->vfunc_no); 707 708 /* These are required BARs which are mandatory for NTB functionality */ 709 for (bar = BAR_CONFIG; bar <= BAR_MW0; bar++, barno++) { 710 barno = pci_epc_get_next_free_bar(epc_features, barno); 711 if (barno < 0) { 712 dev_err(dev, "Fail to get NTB function BAR\n"); 713 return barno; 714 } 715 ntb->epf_ntb_bar[bar] = barno; 716 } 717 718 /* These are optional BARs which don't impact NTB functionality */ 719 for (bar = BAR_MW1, i = 1; i < num_mws; bar++, barno++, i++) { 720 barno = pci_epc_get_next_free_bar(epc_features, barno); 721 if (barno < 0) { 722 ntb->num_mws = i; 723 dev_dbg(dev, "BAR not available for > MW%d\n", i + 1); 724 } 725 ntb->epf_ntb_bar[bar] = barno; 726 } 727 728 return 0; 729 } 730 731 /** 732 * epf_ntb_epc_init() - Initialize NTB interface 733 * @ntb: NTB device that facilitates communication between HOST and VHOST 734 * 735 * Wrapper to initialize a particular EPC interface and start the workqueue 736 * to check for commands from HOST. This function will write to the 737 * EP controller HW for configuring it. 738 * 739 * Returns: Zero for success, or an error code in case of failure 740 */ 741 static int epf_ntb_epc_init(struct epf_ntb *ntb) 742 { 743 u8 func_no, vfunc_no; 744 struct pci_epc *epc; 745 struct pci_epf *epf; 746 struct device *dev; 747 int ret; 748 749 epf = ntb->epf; 750 dev = &epf->dev; 751 epc = epf->epc; 752 func_no = ntb->epf->func_no; 753 vfunc_no = ntb->epf->vfunc_no; 754 755 ret = epf_ntb_config_sspad_bar_set(ntb); 756 if (ret) { 757 dev_err(dev, "Config/self SPAD BAR init failed"); 758 return ret; 759 } 760 761 ret = epf_ntb_configure_interrupt(ntb); 762 if (ret) { 763 dev_err(dev, "Interrupt configuration failed\n"); 764 goto err_config_interrupt; 765 } 766 767 ret = epf_ntb_db_bar_init(ntb); 768 if (ret) { 769 dev_err(dev, "DB BAR init failed\n"); 770 goto err_db_bar_init; 771 } 772 773 ret = epf_ntb_mw_bar_init(ntb); 774 if (ret) { 775 dev_err(dev, "MW BAR init failed\n"); 776 goto err_mw_bar_init; 777 } 778 779 if (vfunc_no <= 1) { 780 ret = pci_epc_write_header(epc, func_no, vfunc_no, epf->header); 781 if (ret) { 782 dev_err(dev, "Configuration header write failed\n"); 783 goto err_write_header; 784 } 785 } 786 787 INIT_DELAYED_WORK(&ntb->cmd_handler, epf_ntb_cmd_handler); 788 queue_work(kpcintb_workqueue, &ntb->cmd_handler.work); 789 790 return 0; 791 792 err_write_header: 793 epf_ntb_mw_bar_clear(ntb, ntb->num_mws); 794 err_mw_bar_init: 795 epf_ntb_db_bar_clear(ntb); 796 err_db_bar_init: 797 err_config_interrupt: 798 epf_ntb_config_sspad_bar_clear(ntb); 799 800 return ret; 801 } 802 803 804 /** 805 * epf_ntb_epc_cleanup() - Cleanup all NTB interfaces 806 * @ntb: NTB device that facilitates communication between HOST and VHOST 807 * 808 * Wrapper to cleanup all NTB interfaces. 809 */ 810 static void epf_ntb_epc_cleanup(struct epf_ntb *ntb) 811 { 812 epf_ntb_db_bar_clear(ntb); 813 epf_ntb_mw_bar_clear(ntb, ntb->num_mws); 814 } 815 816 #define EPF_NTB_R(_name) \ 817 static ssize_t epf_ntb_##_name##_show(struct config_item *item, \ 818 char *page) \ 819 { \ 820 struct config_group *group = to_config_group(item); \ 821 struct epf_ntb *ntb = to_epf_ntb(group); \ 822 \ 823 return sprintf(page, "%d\n", ntb->_name); \ 824 } 825 826 #define EPF_NTB_W(_name) \ 827 static ssize_t epf_ntb_##_name##_store(struct config_item *item, \ 828 const char *page, size_t len) \ 829 { \ 830 struct config_group *group = to_config_group(item); \ 831 struct epf_ntb *ntb = to_epf_ntb(group); \ 832 u32 val; \ 833 int ret; \ 834 \ 835 ret = kstrtou32(page, 0, &val); \ 836 if (ret) \ 837 return ret; \ 838 \ 839 ntb->_name = val; \ 840 \ 841 return len; \ 842 } 843 844 #define EPF_NTB_MW_R(_name) \ 845 static ssize_t epf_ntb_##_name##_show(struct config_item *item, \ 846 char *page) \ 847 { \ 848 struct config_group *group = to_config_group(item); \ 849 struct epf_ntb *ntb = to_epf_ntb(group); \ 850 struct device *dev = &ntb->epf->dev; \ 851 int win_no; \ 852 \ 853 if (sscanf(#_name, "mw%d", &win_no) != 1) \ 854 return -EINVAL; \ 855 \ 856 if (win_no <= 0 || win_no > ntb->num_mws) { \ 857 dev_err(dev, "Invalid num_nws: %d value\n", ntb->num_mws); \ 858 return -EINVAL; \ 859 } \ 860 \ 861 return sprintf(page, "%lld\n", ntb->mws_size[win_no - 1]); \ 862 } 863 864 #define EPF_NTB_MW_W(_name) \ 865 static ssize_t epf_ntb_##_name##_store(struct config_item *item, \ 866 const char *page, size_t len) \ 867 { \ 868 struct config_group *group = to_config_group(item); \ 869 struct epf_ntb *ntb = to_epf_ntb(group); \ 870 struct device *dev = &ntb->epf->dev; \ 871 int win_no; \ 872 u64 val; \ 873 int ret; \ 874 \ 875 ret = kstrtou64(page, 0, &val); \ 876 if (ret) \ 877 return ret; \ 878 \ 879 if (sscanf(#_name, "mw%d", &win_no) != 1) \ 880 return -EINVAL; \ 881 \ 882 if (win_no <= 0 || win_no > ntb->num_mws) { \ 883 dev_err(dev, "Invalid num_nws: %d value\n", ntb->num_mws); \ 884 return -EINVAL; \ 885 } \ 886 \ 887 ntb->mws_size[win_no - 1] = val; \ 888 \ 889 return len; \ 890 } 891 892 static ssize_t epf_ntb_num_mws_store(struct config_item *item, 893 const char *page, size_t len) 894 { 895 struct config_group *group = to_config_group(item); 896 struct epf_ntb *ntb = to_epf_ntb(group); 897 u32 val; 898 int ret; 899 900 ret = kstrtou32(page, 0, &val); 901 if (ret) 902 return ret; 903 904 if (val > MAX_MW) 905 return -EINVAL; 906 907 ntb->num_mws = val; 908 909 return len; 910 } 911 912 EPF_NTB_R(spad_count) 913 EPF_NTB_W(spad_count) 914 EPF_NTB_R(db_count) 915 EPF_NTB_W(db_count) 916 EPF_NTB_R(num_mws) 917 EPF_NTB_R(vbus_number) 918 EPF_NTB_W(vbus_number) 919 EPF_NTB_R(vntb_pid) 920 EPF_NTB_W(vntb_pid) 921 EPF_NTB_R(vntb_vid) 922 EPF_NTB_W(vntb_vid) 923 EPF_NTB_MW_R(mw1) 924 EPF_NTB_MW_W(mw1) 925 EPF_NTB_MW_R(mw2) 926 EPF_NTB_MW_W(mw2) 927 EPF_NTB_MW_R(mw3) 928 EPF_NTB_MW_W(mw3) 929 EPF_NTB_MW_R(mw4) 930 EPF_NTB_MW_W(mw4) 931 932 CONFIGFS_ATTR(epf_ntb_, spad_count); 933 CONFIGFS_ATTR(epf_ntb_, db_count); 934 CONFIGFS_ATTR(epf_ntb_, num_mws); 935 CONFIGFS_ATTR(epf_ntb_, mw1); 936 CONFIGFS_ATTR(epf_ntb_, mw2); 937 CONFIGFS_ATTR(epf_ntb_, mw3); 938 CONFIGFS_ATTR(epf_ntb_, mw4); 939 CONFIGFS_ATTR(epf_ntb_, vbus_number); 940 CONFIGFS_ATTR(epf_ntb_, vntb_pid); 941 CONFIGFS_ATTR(epf_ntb_, vntb_vid); 942 943 static struct configfs_attribute *epf_ntb_attrs[] = { 944 &epf_ntb_attr_spad_count, 945 &epf_ntb_attr_db_count, 946 &epf_ntb_attr_num_mws, 947 &epf_ntb_attr_mw1, 948 &epf_ntb_attr_mw2, 949 &epf_ntb_attr_mw3, 950 &epf_ntb_attr_mw4, 951 &epf_ntb_attr_vbus_number, 952 &epf_ntb_attr_vntb_pid, 953 &epf_ntb_attr_vntb_vid, 954 NULL, 955 }; 956 957 static const struct config_item_type ntb_group_type = { 958 .ct_attrs = epf_ntb_attrs, 959 .ct_owner = THIS_MODULE, 960 }; 961 962 /** 963 * epf_ntb_add_cfs() - Add configfs directory specific to NTB 964 * @epf: NTB endpoint function device 965 * @group: A pointer to the config_group structure referencing a group of 966 * config_items of a specific type that belong to a specific sub-system. 967 * 968 * Add configfs directory specific to NTB. This directory will hold 969 * NTB specific properties like db_count, spad_count, num_mws etc., 970 * 971 * Returns: Pointer to config_group 972 */ 973 static struct config_group *epf_ntb_add_cfs(struct pci_epf *epf, 974 struct config_group *group) 975 { 976 struct epf_ntb *ntb = epf_get_drvdata(epf); 977 struct config_group *ntb_group = &ntb->group; 978 struct device *dev = &epf->dev; 979 980 config_group_init_type_name(ntb_group, dev_name(dev), &ntb_group_type); 981 982 return ntb_group; 983 } 984 985 /*==== virtual PCI bus driver, which only load virtual NTB PCI driver ====*/ 986 987 static u32 pci_space[] = { 988 0xffffffff, /*DeviceID, Vendor ID*/ 989 0, /*Status, Command*/ 990 0xffffffff, /*Class code, subclass, prog if, revision id*/ 991 0x40, /*bist, header type, latency Timer, cache line size*/ 992 0, /*BAR 0*/ 993 0, /*BAR 1*/ 994 0, /*BAR 2*/ 995 0, /*BAR 3*/ 996 0, /*BAR 4*/ 997 0, /*BAR 5*/ 998 0, /*Cardbus cis point*/ 999 0, /*Subsystem ID Subystem vendor id*/ 1000 0, /*ROM Base Address*/ 1001 0, /*Reserved, Cap. Point*/ 1002 0, /*Reserved,*/ 1003 0, /*Max Lat, Min Gnt, interrupt pin, interrupt line*/ 1004 }; 1005 1006 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) 1007 { 1008 if (devfn == 0) { 1009 memcpy(val, ((u8 *)pci_space) + where, size); 1010 return PCIBIOS_SUCCESSFUL; 1011 } 1012 return PCIBIOS_DEVICE_NOT_FOUND; 1013 } 1014 1015 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) 1016 { 1017 return 0; 1018 } 1019 1020 static struct pci_ops vpci_ops = { 1021 .read = pci_read, 1022 .write = pci_write, 1023 }; 1024 1025 static int vpci_scan_bus(void *sysdata) 1026 { 1027 struct pci_bus *vpci_bus; 1028 struct epf_ntb *ndev = sysdata; 1029 1030 vpci_bus = pci_scan_bus(ndev->vbus_number, &vpci_ops, sysdata); 1031 if (vpci_bus) 1032 pr_err("create pci bus\n"); 1033 1034 pci_bus_add_devices(vpci_bus); 1035 1036 return 0; 1037 } 1038 1039 /*==================== Virtual PCIe NTB driver ==========================*/ 1040 1041 static int vntb_epf_mw_count(struct ntb_dev *ntb, int pidx) 1042 { 1043 struct epf_ntb *ndev = ntb_ndev(ntb); 1044 1045 return ndev->num_mws; 1046 } 1047 1048 static int vntb_epf_spad_count(struct ntb_dev *ntb) 1049 { 1050 return ntb_ndev(ntb)->spad_count; 1051 } 1052 1053 static int vntb_epf_peer_mw_count(struct ntb_dev *ntb) 1054 { 1055 return ntb_ndev(ntb)->num_mws; 1056 } 1057 1058 static u64 vntb_epf_db_valid_mask(struct ntb_dev *ntb) 1059 { 1060 return BIT_ULL(ntb_ndev(ntb)->db_count) - 1; 1061 } 1062 1063 static int vntb_epf_db_set_mask(struct ntb_dev *ntb, u64 db_bits) 1064 { 1065 return 0; 1066 } 1067 1068 static int vntb_epf_mw_set_trans(struct ntb_dev *ndev, int pidx, int idx, 1069 dma_addr_t addr, resource_size_t size) 1070 { 1071 struct epf_ntb *ntb = ntb_ndev(ndev); 1072 struct pci_epf_bar *epf_bar; 1073 enum pci_barno barno; 1074 int ret; 1075 struct device *dev; 1076 1077 dev = &ntb->ntb.dev; 1078 barno = ntb->epf_ntb_bar[BAR_MW0 + idx]; 1079 epf_bar = &ntb->epf->bar[barno]; 1080 epf_bar->phys_addr = addr; 1081 epf_bar->barno = barno; 1082 epf_bar->size = size; 1083 1084 ret = pci_epc_set_bar(ntb->epf->epc, 0, 0, epf_bar); 1085 if (ret) { 1086 dev_err(dev, "failure set mw trans\n"); 1087 return ret; 1088 } 1089 return 0; 1090 } 1091 1092 static int vntb_epf_mw_clear_trans(struct ntb_dev *ntb, int pidx, int idx) 1093 { 1094 return 0; 1095 } 1096 1097 static int vntb_epf_peer_mw_get_addr(struct ntb_dev *ndev, int idx, 1098 phys_addr_t *base, resource_size_t *size) 1099 { 1100 1101 struct epf_ntb *ntb = ntb_ndev(ndev); 1102 1103 if (base) 1104 *base = ntb->vpci_mw_phy[idx]; 1105 1106 if (size) 1107 *size = ntb->mws_size[idx]; 1108 1109 return 0; 1110 } 1111 1112 static int vntb_epf_link_enable(struct ntb_dev *ntb, 1113 enum ntb_speed max_speed, 1114 enum ntb_width max_width) 1115 { 1116 return 0; 1117 } 1118 1119 static u32 vntb_epf_spad_read(struct ntb_dev *ndev, int idx) 1120 { 1121 struct epf_ntb *ntb = ntb_ndev(ndev); 1122 int off = ntb->reg->spad_offset, ct = ntb->reg->spad_count * sizeof(u32); 1123 u32 val; 1124 void __iomem *base = (void __iomem *)ntb->reg; 1125 1126 val = readl(base + off + ct + idx * sizeof(u32)); 1127 return val; 1128 } 1129 1130 static int vntb_epf_spad_write(struct ntb_dev *ndev, int idx, u32 val) 1131 { 1132 struct epf_ntb *ntb = ntb_ndev(ndev); 1133 struct epf_ntb_ctrl *ctrl = ntb->reg; 1134 int off = ctrl->spad_offset, ct = ctrl->spad_count * sizeof(u32); 1135 void __iomem *base = (void __iomem *)ntb->reg; 1136 1137 writel(val, base + off + ct + idx * sizeof(u32)); 1138 return 0; 1139 } 1140 1141 static u32 vntb_epf_peer_spad_read(struct ntb_dev *ndev, int pidx, int idx) 1142 { 1143 struct epf_ntb *ntb = ntb_ndev(ndev); 1144 struct epf_ntb_ctrl *ctrl = ntb->reg; 1145 int off = ctrl->spad_offset; 1146 void __iomem *base = (void __iomem *)ntb->reg; 1147 u32 val; 1148 1149 val = readl(base + off + idx * sizeof(u32)); 1150 return val; 1151 } 1152 1153 static int vntb_epf_peer_spad_write(struct ntb_dev *ndev, int pidx, int idx, u32 val) 1154 { 1155 struct epf_ntb *ntb = ntb_ndev(ndev); 1156 struct epf_ntb_ctrl *ctrl = ntb->reg; 1157 int off = ctrl->spad_offset; 1158 void __iomem *base = (void __iomem *)ntb->reg; 1159 1160 writel(val, base + off + idx * sizeof(u32)); 1161 return 0; 1162 } 1163 1164 static int vntb_epf_peer_db_set(struct ntb_dev *ndev, u64 db_bits) 1165 { 1166 u32 interrupt_num = ffs(db_bits) + 1; 1167 struct epf_ntb *ntb = ntb_ndev(ndev); 1168 u8 func_no, vfunc_no; 1169 int ret; 1170 1171 func_no = ntb->epf->func_no; 1172 vfunc_no = ntb->epf->vfunc_no; 1173 1174 ret = pci_epc_raise_irq(ntb->epf->epc, 1175 func_no, 1176 vfunc_no, 1177 PCI_EPC_IRQ_MSI, 1178 interrupt_num + 1); 1179 if (ret) 1180 dev_err(&ntb->ntb.dev, "Failed to raise IRQ\n"); 1181 1182 return ret; 1183 } 1184 1185 static u64 vntb_epf_db_read(struct ntb_dev *ndev) 1186 { 1187 struct epf_ntb *ntb = ntb_ndev(ndev); 1188 1189 return ntb->db; 1190 } 1191 1192 static int vntb_epf_mw_get_align(struct ntb_dev *ndev, int pidx, int idx, 1193 resource_size_t *addr_align, 1194 resource_size_t *size_align, 1195 resource_size_t *size_max) 1196 { 1197 struct epf_ntb *ntb = ntb_ndev(ndev); 1198 1199 if (addr_align) 1200 *addr_align = SZ_4K; 1201 1202 if (size_align) 1203 *size_align = 1; 1204 1205 if (size_max) 1206 *size_max = ntb->mws_size[idx]; 1207 1208 return 0; 1209 } 1210 1211 static u64 vntb_epf_link_is_up(struct ntb_dev *ndev, 1212 enum ntb_speed *speed, 1213 enum ntb_width *width) 1214 { 1215 struct epf_ntb *ntb = ntb_ndev(ndev); 1216 1217 return ntb->reg->link_status; 1218 } 1219 1220 static int vntb_epf_db_clear_mask(struct ntb_dev *ndev, u64 db_bits) 1221 { 1222 return 0; 1223 } 1224 1225 static int vntb_epf_db_clear(struct ntb_dev *ndev, u64 db_bits) 1226 { 1227 struct epf_ntb *ntb = ntb_ndev(ndev); 1228 1229 ntb->db &= ~db_bits; 1230 return 0; 1231 } 1232 1233 static int vntb_epf_link_disable(struct ntb_dev *ntb) 1234 { 1235 return 0; 1236 } 1237 1238 static const struct ntb_dev_ops vntb_epf_ops = { 1239 .mw_count = vntb_epf_mw_count, 1240 .spad_count = vntb_epf_spad_count, 1241 .peer_mw_count = vntb_epf_peer_mw_count, 1242 .db_valid_mask = vntb_epf_db_valid_mask, 1243 .db_set_mask = vntb_epf_db_set_mask, 1244 .mw_set_trans = vntb_epf_mw_set_trans, 1245 .mw_clear_trans = vntb_epf_mw_clear_trans, 1246 .peer_mw_get_addr = vntb_epf_peer_mw_get_addr, 1247 .link_enable = vntb_epf_link_enable, 1248 .spad_read = vntb_epf_spad_read, 1249 .spad_write = vntb_epf_spad_write, 1250 .peer_spad_read = vntb_epf_peer_spad_read, 1251 .peer_spad_write = vntb_epf_peer_spad_write, 1252 .peer_db_set = vntb_epf_peer_db_set, 1253 .db_read = vntb_epf_db_read, 1254 .mw_get_align = vntb_epf_mw_get_align, 1255 .link_is_up = vntb_epf_link_is_up, 1256 .db_clear_mask = vntb_epf_db_clear_mask, 1257 .db_clear = vntb_epf_db_clear, 1258 .link_disable = vntb_epf_link_disable, 1259 }; 1260 1261 static int pci_vntb_probe(struct pci_dev *pdev, const struct pci_device_id *id) 1262 { 1263 int ret; 1264 struct epf_ntb *ndev = (struct epf_ntb *)pdev->sysdata; 1265 struct device *dev = &pdev->dev; 1266 1267 ndev->ntb.pdev = pdev; 1268 ndev->ntb.topo = NTB_TOPO_NONE; 1269 ndev->ntb.ops = &vntb_epf_ops; 1270 1271 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); 1272 if (ret) { 1273 dev_err(dev, "Cannot set DMA mask\n"); 1274 return -EINVAL; 1275 } 1276 1277 ret = ntb_register_device(&ndev->ntb); 1278 if (ret) { 1279 dev_err(dev, "Failed to register NTB device\n"); 1280 goto err_register_dev; 1281 } 1282 1283 dev_dbg(dev, "PCI Virtual NTB driver loaded\n"); 1284 return 0; 1285 1286 err_register_dev: 1287 return -EINVAL; 1288 } 1289 1290 static struct pci_device_id pci_vntb_table[] = { 1291 { 1292 PCI_DEVICE(0xffff, 0xffff), 1293 }, 1294 {}, 1295 }; 1296 1297 static struct pci_driver vntb_pci_driver = { 1298 .name = "pci-vntb", 1299 .id_table = pci_vntb_table, 1300 .probe = pci_vntb_probe, 1301 }; 1302 1303 /* ============ PCIe EPF Driver Bind ====================*/ 1304 1305 /** 1306 * epf_ntb_bind() - Initialize endpoint controller to provide NTB functionality 1307 * @epf: NTB endpoint function device 1308 * 1309 * Initialize both the endpoint controllers associated with NTB function device. 1310 * Invoked when a primary interface or secondary interface is bound to EPC 1311 * device. This function will succeed only when EPC is bound to both the 1312 * interfaces. 1313 * 1314 * Returns: Zero for success, or an error code in case of failure 1315 */ 1316 static int epf_ntb_bind(struct pci_epf *epf) 1317 { 1318 struct epf_ntb *ntb = epf_get_drvdata(epf); 1319 struct device *dev = &epf->dev; 1320 int ret; 1321 1322 if (!epf->epc) { 1323 dev_dbg(dev, "PRIMARY EPC interface not yet bound\n"); 1324 return 0; 1325 } 1326 1327 ret = epf_ntb_init_epc_bar(ntb); 1328 if (ret) { 1329 dev_err(dev, "Failed to create NTB EPC\n"); 1330 goto err_bar_init; 1331 } 1332 1333 ret = epf_ntb_config_spad_bar_alloc(ntb); 1334 if (ret) { 1335 dev_err(dev, "Failed to allocate BAR memory\n"); 1336 goto err_bar_alloc; 1337 } 1338 1339 ret = epf_ntb_epc_init(ntb); 1340 if (ret) { 1341 dev_err(dev, "Failed to initialize EPC\n"); 1342 goto err_bar_alloc; 1343 } 1344 1345 epf_set_drvdata(epf, ntb); 1346 1347 pci_space[0] = (ntb->vntb_pid << 16) | ntb->vntb_vid; 1348 pci_vntb_table[0].vendor = ntb->vntb_vid; 1349 pci_vntb_table[0].device = ntb->vntb_pid; 1350 1351 ret = pci_register_driver(&vntb_pci_driver); 1352 if (ret) { 1353 dev_err(dev, "failure register vntb pci driver\n"); 1354 goto err_bar_alloc; 1355 } 1356 1357 vpci_scan_bus(ntb); 1358 1359 return 0; 1360 1361 err_bar_alloc: 1362 epf_ntb_config_spad_bar_free(ntb); 1363 1364 err_bar_init: 1365 epf_ntb_epc_destroy(ntb); 1366 1367 return ret; 1368 } 1369 1370 /** 1371 * epf_ntb_unbind() - Cleanup the initialization from epf_ntb_bind() 1372 * @epf: NTB endpoint function device 1373 * 1374 * Cleanup the initialization from epf_ntb_bind() 1375 */ 1376 static void epf_ntb_unbind(struct pci_epf *epf) 1377 { 1378 struct epf_ntb *ntb = epf_get_drvdata(epf); 1379 1380 epf_ntb_epc_cleanup(ntb); 1381 epf_ntb_config_spad_bar_free(ntb); 1382 epf_ntb_epc_destroy(ntb); 1383 1384 pci_unregister_driver(&vntb_pci_driver); 1385 } 1386 1387 // EPF driver probe 1388 static struct pci_epf_ops epf_ntb_ops = { 1389 .bind = epf_ntb_bind, 1390 .unbind = epf_ntb_unbind, 1391 .add_cfs = epf_ntb_add_cfs, 1392 }; 1393 1394 /** 1395 * epf_ntb_probe() - Probe NTB function driver 1396 * @epf: NTB endpoint function device 1397 * 1398 * Probe NTB function driver when endpoint function bus detects a NTB 1399 * endpoint function. 1400 * 1401 * Returns: Zero for success, or an error code in case of failure 1402 */ 1403 static int epf_ntb_probe(struct pci_epf *epf) 1404 { 1405 struct epf_ntb *ntb; 1406 struct device *dev; 1407 1408 dev = &epf->dev; 1409 1410 ntb = devm_kzalloc(dev, sizeof(*ntb), GFP_KERNEL); 1411 if (!ntb) 1412 return -ENOMEM; 1413 1414 epf->header = &epf_ntb_header; 1415 ntb->epf = epf; 1416 ntb->vbus_number = 0xff; 1417 epf_set_drvdata(epf, ntb); 1418 1419 dev_info(dev, "pci-ep epf driver loaded\n"); 1420 return 0; 1421 } 1422 1423 static const struct pci_epf_device_id epf_ntb_ids[] = { 1424 { 1425 .name = "pci_epf_vntb", 1426 }, 1427 {}, 1428 }; 1429 1430 static struct pci_epf_driver epf_ntb_driver = { 1431 .driver.name = "pci_epf_vntb", 1432 .probe = epf_ntb_probe, 1433 .id_table = epf_ntb_ids, 1434 .ops = &epf_ntb_ops, 1435 .owner = THIS_MODULE, 1436 }; 1437 1438 static int __init epf_ntb_init(void) 1439 { 1440 int ret; 1441 1442 kpcintb_workqueue = alloc_workqueue("kpcintb", WQ_MEM_RECLAIM | 1443 WQ_HIGHPRI, 0); 1444 ret = pci_epf_register_driver(&epf_ntb_driver); 1445 if (ret) { 1446 destroy_workqueue(kpcintb_workqueue); 1447 pr_err("Failed to register pci epf ntb driver --> %d\n", ret); 1448 return ret; 1449 } 1450 1451 return 0; 1452 } 1453 module_init(epf_ntb_init); 1454 1455 static void __exit epf_ntb_exit(void) 1456 { 1457 pci_epf_unregister_driver(&epf_ntb_driver); 1458 destroy_workqueue(kpcintb_workqueue); 1459 } 1460 module_exit(epf_ntb_exit); 1461 1462 MODULE_DESCRIPTION("PCI EPF NTB DRIVER"); 1463 MODULE_AUTHOR("Frank Li <Frank.li@nxp.com>"); 1464 MODULE_LICENSE("GPL v2"); 1465