1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Data Object Exchange 4 * PCIe r6.0, sec 6.30 DOE 5 * 6 * Copyright (C) 2021 Huawei 7 * Jonathan Cameron <Jonathan.Cameron@huawei.com> 8 * 9 * Copyright (C) 2022 Intel Corporation 10 * Ira Weiny <ira.weiny@intel.com> 11 */ 12 13 #define dev_fmt(fmt) "DOE: " fmt 14 15 #include <linux/bitfield.h> 16 #include <linux/delay.h> 17 #include <linux/device.h> 18 #include <linux/jiffies.h> 19 #include <linux/mutex.h> 20 #include <linux/pci.h> 21 #include <linux/pci-doe.h> 22 #include <linux/sysfs.h> 23 #include <linux/workqueue.h> 24 25 #include "pci.h" 26 27 #define PCI_DOE_FEATURE_DISCOVERY 0 28 29 /* Timeout of 1 second from 6.30.2 Operation, PCI Spec r6.0 */ 30 #define PCI_DOE_TIMEOUT HZ 31 #define PCI_DOE_POLL_INTERVAL (PCI_DOE_TIMEOUT / 128) 32 33 #define PCI_DOE_FLAG_CANCEL 0 34 #define PCI_DOE_FLAG_DEAD 1 35 36 /* Max data object length is 2^18 dwords */ 37 #define PCI_DOE_MAX_LENGTH (1 << 18) 38 39 /** 40 * struct pci_doe_mb - State for a single DOE mailbox 41 * 42 * This state is used to manage a single DOE mailbox capability. All fields 43 * should be considered opaque to the consumers and the structure passed into 44 * the helpers below after being created by pci_doe_create_mb(). 45 * 46 * @pdev: PCI device this mailbox belongs to 47 * @cap_offset: Capability offset 48 * @feats: Array of features supported (encoded as long values) 49 * @wq: Wait queue for work item 50 * @work_queue: Queue of pci_doe_work items 51 * @flags: Bit array of PCI_DOE_FLAG_* flags 52 * @sysfs_attrs: Array of sysfs device attributes 53 */ 54 struct pci_doe_mb { 55 struct pci_dev *pdev; 56 u16 cap_offset; 57 struct xarray feats; 58 59 wait_queue_head_t wq; 60 struct workqueue_struct *work_queue; 61 unsigned long flags; 62 63 #ifdef CONFIG_SYSFS 64 struct device_attribute *sysfs_attrs; 65 #endif 66 }; 67 68 struct pci_doe_feature { 69 u16 vid; 70 u8 type; 71 }; 72 73 /** 74 * struct pci_doe_task - represents a single query/response 75 * 76 * @feat: DOE Feature 77 * @request_pl: The request payload 78 * @request_pl_sz: Size of the request payload (bytes) 79 * @response_pl: The response payload 80 * @response_pl_sz: Size of the response payload (bytes) 81 * @rv: Return value. Length of received response or error (bytes) 82 * @complete: Called when task is complete 83 * @private: Private data for the consumer 84 * @work: Used internally by the mailbox 85 * @doe_mb: Used internally by the mailbox 86 */ 87 struct pci_doe_task { 88 struct pci_doe_feature feat; 89 const __le32 *request_pl; 90 size_t request_pl_sz; 91 __le32 *response_pl; 92 size_t response_pl_sz; 93 int rv; 94 void (*complete)(struct pci_doe_task *task); 95 void *private; 96 97 /* initialized by pci_doe_submit_task() */ 98 struct work_struct work; 99 struct pci_doe_mb *doe_mb; 100 }; 101 102 #ifdef CONFIG_SYSFS 103 static ssize_t doe_discovery_show(struct device *dev, 104 struct device_attribute *attr, 105 char *buf) 106 { 107 return sysfs_emit(buf, "0001:00\n"); 108 } 109 static DEVICE_ATTR_RO(doe_discovery); 110 111 static struct attribute *pci_doe_sysfs_feature_attrs[] = { 112 &dev_attr_doe_discovery.attr, 113 NULL 114 }; 115 116 static bool pci_doe_features_sysfs_group_visible(struct kobject *kobj) 117 { 118 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj)); 119 120 return !xa_empty(&pdev->doe_mbs); 121 } 122 DEFINE_SIMPLE_SYSFS_GROUP_VISIBLE(pci_doe_features_sysfs) 123 124 const struct attribute_group pci_doe_sysfs_group = { 125 .name = "doe_features", 126 .attrs = pci_doe_sysfs_feature_attrs, 127 .is_visible = SYSFS_GROUP_VISIBLE(pci_doe_features_sysfs), 128 }; 129 130 static ssize_t pci_doe_sysfs_feature_show(struct device *dev, 131 struct device_attribute *attr, 132 char *buf) 133 { 134 return sysfs_emit(buf, "%s\n", attr->attr.name); 135 } 136 137 static void pci_doe_sysfs_feature_remove(struct pci_dev *pdev, 138 struct pci_doe_mb *doe_mb) 139 { 140 struct device_attribute *attrs = doe_mb->sysfs_attrs; 141 struct device *dev = &pdev->dev; 142 unsigned long i; 143 void *entry; 144 145 if (!attrs) 146 return; 147 148 doe_mb->sysfs_attrs = NULL; 149 xa_for_each(&doe_mb->feats, i, entry) { 150 if (attrs[i].show) 151 sysfs_remove_file_from_group(&dev->kobj, &attrs[i].attr, 152 pci_doe_sysfs_group.name); 153 kfree(attrs[i].attr.name); 154 } 155 kfree(attrs); 156 } 157 158 static int pci_doe_sysfs_feature_populate(struct pci_dev *pdev, 159 struct pci_doe_mb *doe_mb) 160 { 161 struct device *dev = &pdev->dev; 162 struct device_attribute *attrs; 163 unsigned long num_features = 0; 164 unsigned long vid, type; 165 unsigned long i; 166 void *entry; 167 int ret; 168 169 xa_for_each(&doe_mb->feats, i, entry) 170 num_features++; 171 172 attrs = kcalloc(num_features, sizeof(*attrs), GFP_KERNEL); 173 if (!attrs) { 174 pci_warn(pdev, "Failed allocating the device_attribute array\n"); 175 return -ENOMEM; 176 } 177 178 doe_mb->sysfs_attrs = attrs; 179 xa_for_each(&doe_mb->feats, i, entry) { 180 sysfs_attr_init(&attrs[i].attr); 181 vid = xa_to_value(entry) >> 8; 182 type = xa_to_value(entry) & 0xFF; 183 184 if (vid == PCI_VENDOR_ID_PCI_SIG && 185 type == PCI_DOE_FEATURE_DISCOVERY) { 186 187 /* 188 * DOE Discovery, manually displayed by 189 * `dev_attr_doe_discovery` 190 */ 191 continue; 192 } 193 194 attrs[i].attr.name = kasprintf(GFP_KERNEL, 195 "%04lx:%02lx", vid, type); 196 if (!attrs[i].attr.name) { 197 ret = -ENOMEM; 198 pci_warn(pdev, "Failed allocating the attribute name\n"); 199 goto fail; 200 } 201 202 attrs[i].attr.mode = 0444; 203 attrs[i].show = pci_doe_sysfs_feature_show; 204 205 ret = sysfs_add_file_to_group(&dev->kobj, &attrs[i].attr, 206 pci_doe_sysfs_group.name); 207 if (ret) { 208 attrs[i].show = NULL; 209 if (ret != -EEXIST) { 210 pci_warn(pdev, "Failed adding %s to sysfs group\n", 211 attrs[i].attr.name); 212 goto fail; 213 } else 214 kfree(attrs[i].attr.name); 215 } 216 } 217 218 return 0; 219 220 fail: 221 pci_doe_sysfs_feature_remove(pdev, doe_mb); 222 return ret; 223 } 224 225 void pci_doe_sysfs_teardown(struct pci_dev *pdev) 226 { 227 struct pci_doe_mb *doe_mb; 228 unsigned long index; 229 230 xa_for_each(&pdev->doe_mbs, index, doe_mb) 231 pci_doe_sysfs_feature_remove(pdev, doe_mb); 232 } 233 234 void pci_doe_sysfs_init(struct pci_dev *pdev) 235 { 236 struct pci_doe_mb *doe_mb; 237 unsigned long index; 238 int ret; 239 240 xa_for_each(&pdev->doe_mbs, index, doe_mb) { 241 ret = pci_doe_sysfs_feature_populate(pdev, doe_mb); 242 if (ret) 243 return; 244 } 245 } 246 #endif 247 248 static int pci_doe_wait(struct pci_doe_mb *doe_mb, unsigned long timeout) 249 { 250 if (wait_event_timeout(doe_mb->wq, 251 test_bit(PCI_DOE_FLAG_CANCEL, &doe_mb->flags), 252 timeout)) 253 return -EIO; 254 return 0; 255 } 256 257 static void pci_doe_write_ctrl(struct pci_doe_mb *doe_mb, u32 val) 258 { 259 struct pci_dev *pdev = doe_mb->pdev; 260 int offset = doe_mb->cap_offset; 261 262 pci_write_config_dword(pdev, offset + PCI_DOE_CTRL, val); 263 } 264 265 static int pci_doe_abort(struct pci_doe_mb *doe_mb) 266 { 267 struct pci_dev *pdev = doe_mb->pdev; 268 int offset = doe_mb->cap_offset; 269 unsigned long timeout_jiffies; 270 271 pci_dbg(pdev, "[%x] Issuing Abort\n", offset); 272 273 timeout_jiffies = jiffies + PCI_DOE_TIMEOUT; 274 pci_doe_write_ctrl(doe_mb, PCI_DOE_CTRL_ABORT); 275 276 do { 277 int rc; 278 u32 val; 279 280 rc = pci_doe_wait(doe_mb, PCI_DOE_POLL_INTERVAL); 281 if (rc) 282 return rc; 283 pci_read_config_dword(pdev, offset + PCI_DOE_STATUS, &val); 284 285 /* Abort success! */ 286 if (!FIELD_GET(PCI_DOE_STATUS_ERROR, val) && 287 !FIELD_GET(PCI_DOE_STATUS_BUSY, val)) 288 return 0; 289 290 } while (!time_after(jiffies, timeout_jiffies)); 291 292 /* Abort has timed out and the MB is dead */ 293 pci_err(pdev, "[%x] ABORT timed out\n", offset); 294 return -EIO; 295 } 296 297 static int pci_doe_send_req(struct pci_doe_mb *doe_mb, 298 struct pci_doe_task *task) 299 { 300 struct pci_dev *pdev = doe_mb->pdev; 301 int offset = doe_mb->cap_offset; 302 unsigned long timeout_jiffies; 303 size_t length, remainder; 304 u32 val; 305 int i; 306 307 /* 308 * Check the DOE busy bit is not set. If it is set, this could indicate 309 * someone other than Linux (e.g. firmware) is using the mailbox. Note 310 * it is expected that firmware and OS will negotiate access rights via 311 * an, as yet to be defined, method. 312 * 313 * Wait up to one PCI_DOE_TIMEOUT period to allow the prior command to 314 * finish. Otherwise, simply error out as unable to field the request. 315 * 316 * PCIe r6.2 sec 6.30.3 states no interrupt is raised when the DOE Busy 317 * bit is cleared, so polling here is our best option for the moment. 318 */ 319 timeout_jiffies = jiffies + PCI_DOE_TIMEOUT; 320 do { 321 pci_read_config_dword(pdev, offset + PCI_DOE_STATUS, &val); 322 } while (FIELD_GET(PCI_DOE_STATUS_BUSY, val) && 323 !time_after(jiffies, timeout_jiffies)); 324 325 if (FIELD_GET(PCI_DOE_STATUS_BUSY, val)) 326 return -EBUSY; 327 328 if (FIELD_GET(PCI_DOE_STATUS_ERROR, val)) 329 return -EIO; 330 331 /* Length is 2 DW of header + length of payload in DW */ 332 length = 2 + DIV_ROUND_UP(task->request_pl_sz, sizeof(__le32)); 333 if (length > PCI_DOE_MAX_LENGTH) 334 return -EIO; 335 if (length == PCI_DOE_MAX_LENGTH) 336 length = 0; 337 338 /* Write DOE Header */ 339 val = FIELD_PREP(PCI_DOE_DATA_OBJECT_HEADER_1_VID, task->feat.vid) | 340 FIELD_PREP(PCI_DOE_DATA_OBJECT_HEADER_1_TYPE, task->feat.type); 341 pci_write_config_dword(pdev, offset + PCI_DOE_WRITE, val); 342 pci_write_config_dword(pdev, offset + PCI_DOE_WRITE, 343 FIELD_PREP(PCI_DOE_DATA_OBJECT_HEADER_2_LENGTH, 344 length)); 345 346 /* Write payload */ 347 for (i = 0; i < task->request_pl_sz / sizeof(__le32); i++) 348 pci_write_config_dword(pdev, offset + PCI_DOE_WRITE, 349 le32_to_cpu(task->request_pl[i])); 350 351 /* Write last payload dword */ 352 remainder = task->request_pl_sz % sizeof(__le32); 353 if (remainder) { 354 val = 0; 355 memcpy(&val, &task->request_pl[i], remainder); 356 le32_to_cpus(&val); 357 pci_write_config_dword(pdev, offset + PCI_DOE_WRITE, val); 358 } 359 360 pci_doe_write_ctrl(doe_mb, PCI_DOE_CTRL_GO); 361 362 return 0; 363 } 364 365 static bool pci_doe_data_obj_ready(struct pci_doe_mb *doe_mb) 366 { 367 struct pci_dev *pdev = doe_mb->pdev; 368 int offset = doe_mb->cap_offset; 369 u32 val; 370 371 pci_read_config_dword(pdev, offset + PCI_DOE_STATUS, &val); 372 if (FIELD_GET(PCI_DOE_STATUS_DATA_OBJECT_READY, val)) 373 return true; 374 return false; 375 } 376 377 static int pci_doe_recv_resp(struct pci_doe_mb *doe_mb, struct pci_doe_task *task) 378 { 379 size_t length, payload_length, remainder, received; 380 struct pci_dev *pdev = doe_mb->pdev; 381 int offset = doe_mb->cap_offset; 382 int i = 0; 383 u32 val; 384 385 /* Read the first dword to get the feature */ 386 pci_read_config_dword(pdev, offset + PCI_DOE_READ, &val); 387 if ((FIELD_GET(PCI_DOE_DATA_OBJECT_HEADER_1_VID, val) != task->feat.vid) || 388 (FIELD_GET(PCI_DOE_DATA_OBJECT_HEADER_1_TYPE, val) != task->feat.type)) { 389 dev_err_ratelimited(&pdev->dev, "[%x] expected [VID, Feature] = [%04x, %02x], got [%04x, %02x]\n", 390 doe_mb->cap_offset, task->feat.vid, task->feat.type, 391 FIELD_GET(PCI_DOE_DATA_OBJECT_HEADER_1_VID, val), 392 FIELD_GET(PCI_DOE_DATA_OBJECT_HEADER_1_TYPE, val)); 393 return -EIO; 394 } 395 396 pci_write_config_dword(pdev, offset + PCI_DOE_READ, 0); 397 /* Read the second dword to get the length */ 398 pci_read_config_dword(pdev, offset + PCI_DOE_READ, &val); 399 pci_write_config_dword(pdev, offset + PCI_DOE_READ, 0); 400 401 length = FIELD_GET(PCI_DOE_DATA_OBJECT_HEADER_2_LENGTH, val); 402 /* A value of 0x0 indicates max data object length */ 403 if (!length) 404 length = PCI_DOE_MAX_LENGTH; 405 if (length < 2) 406 return -EIO; 407 408 /* First 2 dwords have already been read */ 409 length -= 2; 410 received = task->response_pl_sz; 411 payload_length = DIV_ROUND_UP(task->response_pl_sz, sizeof(__le32)); 412 remainder = task->response_pl_sz % sizeof(__le32); 413 414 /* remainder signifies number of data bytes in last payload dword */ 415 if (!remainder) 416 remainder = sizeof(__le32); 417 418 if (length < payload_length) { 419 received = length * sizeof(__le32); 420 payload_length = length; 421 remainder = sizeof(__le32); 422 } 423 424 if (payload_length) { 425 /* Read all payload dwords except the last */ 426 for (; i < payload_length - 1; i++) { 427 pci_read_config_dword(pdev, offset + PCI_DOE_READ, 428 &val); 429 task->response_pl[i] = cpu_to_le32(val); 430 pci_write_config_dword(pdev, offset + PCI_DOE_READ, 0); 431 } 432 433 /* Read last payload dword */ 434 pci_read_config_dword(pdev, offset + PCI_DOE_READ, &val); 435 cpu_to_le32s(&val); 436 memcpy(&task->response_pl[i], &val, remainder); 437 /* Prior to the last ack, ensure Data Object Ready */ 438 if (!pci_doe_data_obj_ready(doe_mb)) 439 return -EIO; 440 pci_write_config_dword(pdev, offset + PCI_DOE_READ, 0); 441 i++; 442 } 443 444 /* Flush excess length */ 445 for (; i < length; i++) { 446 pci_read_config_dword(pdev, offset + PCI_DOE_READ, &val); 447 pci_write_config_dword(pdev, offset + PCI_DOE_READ, 0); 448 } 449 450 /* Final error check to pick up on any since Data Object Ready */ 451 pci_read_config_dword(pdev, offset + PCI_DOE_STATUS, &val); 452 if (FIELD_GET(PCI_DOE_STATUS_ERROR, val)) 453 return -EIO; 454 455 return received; 456 } 457 458 static void signal_task_complete(struct pci_doe_task *task, int rv) 459 { 460 task->rv = rv; 461 destroy_work_on_stack(&task->work); 462 task->complete(task); 463 } 464 465 static void signal_task_abort(struct pci_doe_task *task, int rv) 466 { 467 struct pci_doe_mb *doe_mb = task->doe_mb; 468 struct pci_dev *pdev = doe_mb->pdev; 469 470 if (pci_doe_abort(doe_mb)) { 471 /* 472 * If the device can't process an abort; set the mailbox dead 473 * - no more submissions 474 */ 475 pci_err(pdev, "[%x] Abort failed marking mailbox dead\n", 476 doe_mb->cap_offset); 477 set_bit(PCI_DOE_FLAG_DEAD, &doe_mb->flags); 478 } 479 signal_task_complete(task, rv); 480 } 481 482 static void doe_statemachine_work(struct work_struct *work) 483 { 484 struct pci_doe_task *task = container_of(work, struct pci_doe_task, 485 work); 486 struct pci_doe_mb *doe_mb = task->doe_mb; 487 struct pci_dev *pdev = doe_mb->pdev; 488 int offset = doe_mb->cap_offset; 489 unsigned long timeout_jiffies; 490 u32 val; 491 int rc; 492 493 if (test_bit(PCI_DOE_FLAG_DEAD, &doe_mb->flags)) { 494 signal_task_complete(task, -EIO); 495 return; 496 } 497 498 /* Send request */ 499 rc = pci_doe_send_req(doe_mb, task); 500 if (rc) { 501 /* 502 * The specification does not provide any guidance on how to 503 * resolve conflicting requests from other entities. 504 * Furthermore, it is likely that busy will not be detected 505 * most of the time. Flag any detection of status busy with an 506 * error. 507 */ 508 if (rc == -EBUSY) 509 dev_err_ratelimited(&pdev->dev, "[%x] busy detected; another entity is sending conflicting requests\n", 510 offset); 511 signal_task_abort(task, rc); 512 return; 513 } 514 515 timeout_jiffies = jiffies + PCI_DOE_TIMEOUT; 516 /* Poll for response */ 517 retry_resp: 518 pci_read_config_dword(pdev, offset + PCI_DOE_STATUS, &val); 519 if (FIELD_GET(PCI_DOE_STATUS_ERROR, val)) { 520 signal_task_abort(task, -EIO); 521 return; 522 } 523 524 if (!FIELD_GET(PCI_DOE_STATUS_DATA_OBJECT_READY, val)) { 525 if (time_after(jiffies, timeout_jiffies)) { 526 signal_task_abort(task, -EIO); 527 return; 528 } 529 rc = pci_doe_wait(doe_mb, PCI_DOE_POLL_INTERVAL); 530 if (rc) { 531 signal_task_abort(task, rc); 532 return; 533 } 534 goto retry_resp; 535 } 536 537 rc = pci_doe_recv_resp(doe_mb, task); 538 if (rc < 0) { 539 signal_task_abort(task, rc); 540 return; 541 } 542 543 signal_task_complete(task, rc); 544 } 545 546 static void pci_doe_task_complete(struct pci_doe_task *task) 547 { 548 complete(task->private); 549 } 550 551 static int pci_doe_discovery(struct pci_doe_mb *doe_mb, u8 capver, u8 *index, u16 *vid, 552 u8 *feature) 553 { 554 u32 request_pl = FIELD_PREP(PCI_DOE_DATA_OBJECT_DISC_REQ_3_INDEX, 555 *index) | 556 FIELD_PREP(PCI_DOE_DATA_OBJECT_DISC_REQ_3_VER, 557 (capver >= 2) ? 2 : 0); 558 __le32 request_pl_le = cpu_to_le32(request_pl); 559 __le32 response_pl_le; 560 u32 response_pl; 561 int rc; 562 563 rc = pci_doe(doe_mb, PCI_VENDOR_ID_PCI_SIG, PCI_DOE_FEATURE_DISCOVERY, 564 &request_pl_le, sizeof(request_pl_le), 565 &response_pl_le, sizeof(response_pl_le)); 566 if (rc < 0) 567 return rc; 568 569 if (rc != sizeof(response_pl_le)) 570 return -EIO; 571 572 response_pl = le32_to_cpu(response_pl_le); 573 *vid = FIELD_GET(PCI_DOE_DATA_OBJECT_DISC_RSP_3_VID, response_pl); 574 *feature = FIELD_GET(PCI_DOE_DATA_OBJECT_DISC_RSP_3_TYPE, 575 response_pl); 576 *index = FIELD_GET(PCI_DOE_DATA_OBJECT_DISC_RSP_3_NEXT_INDEX, 577 response_pl); 578 579 return 0; 580 } 581 582 static void *pci_doe_xa_feat_entry(u16 vid, u8 type) 583 { 584 return xa_mk_value((vid << 8) | type); 585 } 586 587 static int pci_doe_cache_features(struct pci_doe_mb *doe_mb) 588 { 589 u8 index = 0; 590 u8 xa_idx = 0; 591 u32 hdr = 0; 592 593 pci_read_config_dword(doe_mb->pdev, doe_mb->cap_offset, &hdr); 594 595 do { 596 int rc; 597 u16 vid; 598 u8 type; 599 600 rc = pci_doe_discovery(doe_mb, PCI_EXT_CAP_VER(hdr), &index, 601 &vid, &type); 602 if (rc) 603 return rc; 604 605 pci_dbg(doe_mb->pdev, 606 "[%x] Found feature %d vid: %x type: %x\n", 607 doe_mb->cap_offset, xa_idx, vid, type); 608 609 rc = xa_insert(&doe_mb->feats, xa_idx++, 610 pci_doe_xa_feat_entry(vid, type), GFP_KERNEL); 611 if (rc) 612 return rc; 613 } while (index); 614 615 return 0; 616 } 617 618 static void pci_doe_cancel_tasks(struct pci_doe_mb *doe_mb) 619 { 620 /* Stop all pending work items from starting */ 621 set_bit(PCI_DOE_FLAG_DEAD, &doe_mb->flags); 622 623 /* Cancel an in progress work item, if necessary */ 624 set_bit(PCI_DOE_FLAG_CANCEL, &doe_mb->flags); 625 wake_up(&doe_mb->wq); 626 } 627 628 /** 629 * pci_doe_create_mb() - Create a DOE mailbox object 630 * 631 * @pdev: PCI device to create the DOE mailbox for 632 * @cap_offset: Offset of the DOE mailbox 633 * 634 * Create a single mailbox object to manage the mailbox feature at the 635 * cap_offset specified. 636 * 637 * RETURNS: created mailbox object on success 638 * ERR_PTR(-errno) on failure 639 */ 640 static struct pci_doe_mb *pci_doe_create_mb(struct pci_dev *pdev, 641 u16 cap_offset) 642 { 643 struct pci_doe_mb *doe_mb; 644 int rc; 645 646 doe_mb = kzalloc(sizeof(*doe_mb), GFP_KERNEL); 647 if (!doe_mb) 648 return ERR_PTR(-ENOMEM); 649 650 doe_mb->pdev = pdev; 651 doe_mb->cap_offset = cap_offset; 652 init_waitqueue_head(&doe_mb->wq); 653 xa_init(&doe_mb->feats); 654 655 doe_mb->work_queue = alloc_ordered_workqueue("%s %s DOE [%x]", 0, 656 dev_bus_name(&pdev->dev), 657 pci_name(pdev), 658 doe_mb->cap_offset); 659 if (!doe_mb->work_queue) { 660 pci_err(pdev, "[%x] failed to allocate work queue\n", 661 doe_mb->cap_offset); 662 rc = -ENOMEM; 663 goto err_free; 664 } 665 666 /* Reset the mailbox by issuing an abort */ 667 rc = pci_doe_abort(doe_mb); 668 if (rc) { 669 pci_err(pdev, "[%x] failed to reset mailbox with abort command : %d\n", 670 doe_mb->cap_offset, rc); 671 goto err_destroy_wq; 672 } 673 674 /* 675 * The state machine and the mailbox should be in sync now; 676 * Use the mailbox to query features. 677 */ 678 rc = pci_doe_cache_features(doe_mb); 679 if (rc) { 680 pci_err(pdev, "[%x] failed to cache features : %d\n", 681 doe_mb->cap_offset, rc); 682 goto err_cancel; 683 } 684 685 return doe_mb; 686 687 err_cancel: 688 pci_doe_cancel_tasks(doe_mb); 689 xa_destroy(&doe_mb->feats); 690 err_destroy_wq: 691 destroy_workqueue(doe_mb->work_queue); 692 err_free: 693 kfree(doe_mb); 694 return ERR_PTR(rc); 695 } 696 697 /** 698 * pci_doe_destroy_mb() - Destroy a DOE mailbox object 699 * 700 * @doe_mb: DOE mailbox 701 * 702 * Destroy all internal data structures created for the DOE mailbox. 703 */ 704 static void pci_doe_destroy_mb(struct pci_doe_mb *doe_mb) 705 { 706 pci_doe_cancel_tasks(doe_mb); 707 xa_destroy(&doe_mb->feats); 708 destroy_workqueue(doe_mb->work_queue); 709 kfree(doe_mb); 710 } 711 712 /** 713 * pci_doe_supports_feat() - Return if the DOE instance supports the given 714 * feature 715 * @doe_mb: DOE mailbox capability to query 716 * @vid: Feature Vendor ID 717 * @type: Feature type 718 * 719 * RETURNS: True if the DOE mailbox supports the feature specified 720 */ 721 static bool pci_doe_supports_feat(struct pci_doe_mb *doe_mb, u16 vid, u8 type) 722 { 723 unsigned long index; 724 void *entry; 725 726 /* The discovery feature must always be supported */ 727 if (vid == PCI_VENDOR_ID_PCI_SIG && type == PCI_DOE_FEATURE_DISCOVERY) 728 return true; 729 730 xa_for_each(&doe_mb->feats, index, entry) 731 if (entry == pci_doe_xa_feat_entry(vid, type)) 732 return true; 733 734 return false; 735 } 736 737 /** 738 * pci_doe_submit_task() - Submit a task to be processed by the state machine 739 * 740 * @doe_mb: DOE mailbox capability to submit to 741 * @task: task to be queued 742 * 743 * Submit a DOE task (request/response) to the DOE mailbox to be processed. 744 * Returns upon queueing the task object. If the queue is full this function 745 * will sleep until there is room in the queue. 746 * 747 * task->complete will be called when the state machine is done processing this 748 * task. 749 * 750 * @task must be allocated on the stack. 751 * 752 * Excess data will be discarded. 753 * 754 * RETURNS: 0 when task has been successfully queued, -ERRNO on error 755 */ 756 static int pci_doe_submit_task(struct pci_doe_mb *doe_mb, 757 struct pci_doe_task *task) 758 { 759 if (!pci_doe_supports_feat(doe_mb, task->feat.vid, task->feat.type)) 760 return -EINVAL; 761 762 if (test_bit(PCI_DOE_FLAG_DEAD, &doe_mb->flags)) 763 return -EIO; 764 765 task->doe_mb = doe_mb; 766 INIT_WORK_ONSTACK(&task->work, doe_statemachine_work); 767 queue_work(doe_mb->work_queue, &task->work); 768 return 0; 769 } 770 771 /** 772 * pci_doe() - Perform Data Object Exchange 773 * 774 * @doe_mb: DOE Mailbox 775 * @vendor: Vendor ID 776 * @type: Data Object Type 777 * @request: Request payload 778 * @request_sz: Size of request payload (bytes) 779 * @response: Response payload 780 * @response_sz: Size of response payload (bytes) 781 * 782 * Submit @request to @doe_mb and store the @response. 783 * The DOE exchange is performed synchronously and may therefore sleep. 784 * 785 * Payloads are treated as opaque byte streams which are transmitted verbatim, 786 * without byte-swapping. If payloads contain little-endian register values, 787 * the caller is responsible for conversion with cpu_to_le32() / le32_to_cpu(). 788 * 789 * For convenience, arbitrary payload sizes are allowed even though PCIe r6.0 790 * sec 6.30.1 specifies the Data Object Header 2 "Length" in dwords. The last 791 * (partial) dword is copied with byte granularity and padded with zeroes if 792 * necessary. Callers are thus relieved of using dword-sized bounce buffers. 793 * 794 * RETURNS: Length of received response or negative errno. 795 * Received data in excess of @response_sz is discarded. 796 * The length may be smaller than @response_sz and the caller 797 * is responsible for checking that. 798 */ 799 int pci_doe(struct pci_doe_mb *doe_mb, u16 vendor, u8 type, 800 const void *request, size_t request_sz, 801 void *response, size_t response_sz) 802 { 803 DECLARE_COMPLETION_ONSTACK(c); 804 struct pci_doe_task task = { 805 .feat.vid = vendor, 806 .feat.type = type, 807 .request_pl = request, 808 .request_pl_sz = request_sz, 809 .response_pl = response, 810 .response_pl_sz = response_sz, 811 .complete = pci_doe_task_complete, 812 .private = &c, 813 }; 814 int rc; 815 816 rc = pci_doe_submit_task(doe_mb, &task); 817 if (rc) 818 return rc; 819 820 wait_for_completion(&c); 821 822 return task.rv; 823 } 824 EXPORT_SYMBOL_GPL(pci_doe); 825 826 /** 827 * pci_find_doe_mailbox() - Find Data Object Exchange mailbox 828 * 829 * @pdev: PCI device 830 * @vendor: Vendor ID 831 * @type: Data Object Type 832 * 833 * Find first DOE mailbox of a PCI device which supports the given feature. 834 * 835 * RETURNS: Pointer to the DOE mailbox or NULL if none was found. 836 */ 837 struct pci_doe_mb *pci_find_doe_mailbox(struct pci_dev *pdev, u16 vendor, 838 u8 type) 839 { 840 struct pci_doe_mb *doe_mb; 841 unsigned long index; 842 843 xa_for_each(&pdev->doe_mbs, index, doe_mb) 844 if (pci_doe_supports_feat(doe_mb, vendor, type)) 845 return doe_mb; 846 847 return NULL; 848 } 849 EXPORT_SYMBOL_GPL(pci_find_doe_mailbox); 850 851 void pci_doe_init(struct pci_dev *pdev) 852 { 853 struct pci_doe_mb *doe_mb; 854 u16 offset = 0; 855 int rc; 856 857 xa_init(&pdev->doe_mbs); 858 859 while ((offset = pci_find_next_ext_capability(pdev, offset, 860 PCI_EXT_CAP_ID_DOE))) { 861 doe_mb = pci_doe_create_mb(pdev, offset); 862 if (IS_ERR(doe_mb)) { 863 pci_err(pdev, "[%x] failed to create mailbox: %ld\n", 864 offset, PTR_ERR(doe_mb)); 865 continue; 866 } 867 868 rc = xa_insert(&pdev->doe_mbs, offset, doe_mb, GFP_KERNEL); 869 if (rc) { 870 pci_err(pdev, "[%x] failed to insert mailbox: %d\n", 871 offset, rc); 872 pci_doe_destroy_mb(doe_mb); 873 } 874 } 875 } 876 877 void pci_doe_destroy(struct pci_dev *pdev) 878 { 879 struct pci_doe_mb *doe_mb; 880 unsigned long index; 881 882 xa_for_each(&pdev->doe_mbs, index, doe_mb) 883 pci_doe_destroy_mb(doe_mb); 884 885 xa_destroy(&pdev->doe_mbs); 886 } 887 888 void pci_doe_disconnected(struct pci_dev *pdev) 889 { 890 struct pci_doe_mb *doe_mb; 891 unsigned long index; 892 893 xa_for_each(&pdev->doe_mbs, index, doe_mb) 894 pci_doe_cancel_tasks(doe_mb); 895 } 896