xref: /linux/drivers/pci/controller/pci-versatile.c (revision 5e60f363b38fd40e4d8838b5d6f4d4ecee92c777)
1  // SPDX-License-Identifier: GPL-2.0
2  /*
3   * Copyright 2004 Koninklijke Philips Electronics NV
4   *
5   * Conversion to platform driver and DT:
6   * Copyright 2014 Linaro Ltd.
7   *
8   * 14/04/2005 Initial version, colin.king@philips.com
9   */
10  #include <linux/kernel.h>
11  #include <linux/module.h>
12  #include <linux/of_address.h>
13  #include <linux/of_pci.h>
14  #include <linux/of_platform.h>
15  #include <linux/pci.h>
16  #include <linux/platform_device.h>
17  
18  #include "../pci.h"
19  
20  static void __iomem *versatile_pci_base;
21  static void __iomem *versatile_cfg_base[2];
22  
23  #define PCI_IMAP(m)		(versatile_pci_base + ((m) * 4))
24  #define PCI_SMAP(m)		(versatile_pci_base + 0x14 + ((m) * 4))
25  #define PCI_SELFID		(versatile_pci_base + 0xc)
26  
27  #define VP_PCI_DEVICE_ID		0x030010ee
28  #define VP_PCI_CLASS_ID			0x0b400000
29  
30  static u32 pci_slot_ignore;
31  
32  static int __init versatile_pci_slot_ignore(char *str)
33  {
34  	int retval;
35  	int slot;
36  
37  	while ((retval = get_option(&str, &slot))) {
38  		if ((slot < 0) || (slot > 31))
39  			pr_err("Illegal slot value: %d\n", slot);
40  		else
41  			pci_slot_ignore |= (1 << slot);
42  	}
43  	return 1;
44  }
45  __setup("pci_slot_ignore=", versatile_pci_slot_ignore);
46  
47  
48  static void __iomem *versatile_map_bus(struct pci_bus *bus,
49  				       unsigned int devfn, int offset)
50  {
51  	unsigned int busnr = bus->number;
52  
53  	if (pci_slot_ignore & (1 << PCI_SLOT(devfn)))
54  		return NULL;
55  
56  	return versatile_cfg_base[1] + ((busnr << 16) | (devfn << 8) | offset);
57  }
58  
59  static struct pci_ops pci_versatile_ops = {
60  	.map_bus = versatile_map_bus,
61  	.read	= pci_generic_config_read32,
62  	.write	= pci_generic_config_write,
63  };
64  
65  static int versatile_pci_probe(struct platform_device *pdev)
66  {
67  	struct device *dev = &pdev->dev;
68  	struct resource *res;
69  	struct resource_entry *entry;
70  	int i, myslot = -1, mem = 1;
71  	u32 val;
72  	void __iomem *local_pci_cfg_base;
73  	struct pci_host_bridge *bridge;
74  
75  	bridge = devm_pci_alloc_host_bridge(dev, 0);
76  	if (!bridge)
77  		return -ENOMEM;
78  
79  	versatile_pci_base = devm_platform_ioremap_resource(pdev, 0);
80  	if (IS_ERR(versatile_pci_base))
81  		return PTR_ERR(versatile_pci_base);
82  
83  	versatile_cfg_base[0] = devm_platform_ioremap_resource(pdev, 1);
84  	if (IS_ERR(versatile_cfg_base[0]))
85  		return PTR_ERR(versatile_cfg_base[0]);
86  
87  	res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
88  	versatile_cfg_base[1] = devm_pci_remap_cfg_resource(dev, res);
89  	if (IS_ERR(versatile_cfg_base[1]))
90  		return PTR_ERR(versatile_cfg_base[1]);
91  
92  	resource_list_for_each_entry(entry, &bridge->windows) {
93  		if (resource_type(entry->res) == IORESOURCE_MEM) {
94  			writel(entry->res->start >> 28, PCI_IMAP(mem));
95  			writel(__pa(PAGE_OFFSET) >> 28, PCI_SMAP(mem));
96  			mem++;
97  		}
98  	}
99  
100  	/*
101  	 * We need to discover the PCI core first to configure itself
102  	 * before the main PCI probing is performed
103  	 */
104  	for (i = 0; i < 32; i++) {
105  		if ((readl(versatile_cfg_base[0] + (i << 11) + PCI_VENDOR_ID) == VP_PCI_DEVICE_ID) &&
106  		    (readl(versatile_cfg_base[0] + (i << 11) + PCI_CLASS_REVISION) == VP_PCI_CLASS_ID)) {
107  			myslot = i;
108  			break;
109  		}
110  	}
111  	if (myslot == -1) {
112  		dev_err(dev, "Cannot find PCI core!\n");
113  		return -EIO;
114  	}
115  	/*
116  	 * Do not to map Versatile FPGA PCI device into memory space
117  	 */
118  	pci_slot_ignore |= (1 << myslot);
119  
120  	dev_info(dev, "PCI core found (slot %d)\n", myslot);
121  
122  	writel(myslot, PCI_SELFID);
123  	local_pci_cfg_base = versatile_cfg_base[1] + (myslot << 11);
124  
125  	val = readl(local_pci_cfg_base + PCI_COMMAND);
126  	val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE;
127  	writel(val, local_pci_cfg_base + PCI_COMMAND);
128  
129  	/*
130  	 * Configure the PCI inbound memory windows to be 1:1 mapped to SDRAM
131  	 */
132  	writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_0);
133  	writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_1);
134  	writel(__pa(PAGE_OFFSET), local_pci_cfg_base + PCI_BASE_ADDRESS_2);
135  
136  	/*
137  	 * For many years the kernel and QEMU were symbiotically buggy
138  	 * in that they both assumed the same broken IRQ mapping.
139  	 * QEMU therefore attempts to auto-detect old broken kernels
140  	 * so that they still work on newer QEMU as they did on old
141  	 * QEMU. Since we now use the correct (ie matching-hardware)
142  	 * IRQ mapping we write a definitely different value to a
143  	 * PCI_INTERRUPT_LINE register to tell QEMU that we expect
144  	 * real hardware behaviour and it need not be backwards
145  	 * compatible for us. This write is harmless on real hardware.
146  	 */
147  	writel(0, versatile_cfg_base[0] + PCI_INTERRUPT_LINE);
148  
149  	pci_add_flags(PCI_REASSIGN_ALL_BUS);
150  
151  	bridge->ops = &pci_versatile_ops;
152  
153  	return pci_host_probe(bridge);
154  }
155  
156  static const struct of_device_id versatile_pci_of_match[] = {
157  	{ .compatible = "arm,versatile-pci", },
158  	{ },
159  };
160  MODULE_DEVICE_TABLE(of, versatile_pci_of_match);
161  
162  static struct platform_driver versatile_pci_driver = {
163  	.driver = {
164  		.name = "versatile-pci",
165  		.of_match_table = versatile_pci_of_match,
166  		.suppress_bind_attrs = true,
167  	},
168  	.probe = versatile_pci_probe,
169  };
170  module_platform_driver(versatile_pci_driver);
171  
172  MODULE_DESCRIPTION("Versatile PCI driver");
173  MODULE_LICENSE("GPL v2");
174