xref: /linux/drivers/pci/controller/cadence/pcie-cadence-plat.c (revision 8c994eff8fcfe8ecb1f1dbebed25b4d7bb75be12)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Cadence PCIe platform  driver.
4  *
5  * Copyright (c) 2019, Cadence Design Systems
6  * Author: Tom Joseph <tjoseph@cadence.com>
7  */
8 #include <linux/kernel.h>
9 #include <linux/of.h>
10 #include <linux/of_pci.h>
11 #include <linux/platform_device.h>
12 #include <linux/pm_runtime.h>
13 #include "pcie-cadence.h"
14 
15 #define CDNS_PLAT_CPU_TO_BUS_ADDR	0x0FFFFFFF
16 
17 /**
18  * struct cdns_plat_pcie - private data for this PCIe platform driver
19  * @pcie: Cadence PCIe controller
20  * @is_rc: Set to 1 indicates the PCIe controller mode is Root Complex,
21  *         if 0 it is in Endpoint mode.
22  */
23 struct cdns_plat_pcie {
24 	struct cdns_pcie        *pcie;
25 	bool is_rc;
26 };
27 
28 struct cdns_plat_pcie_of_data {
29 	bool is_rc;
30 };
31 
32 static const struct of_device_id cdns_plat_pcie_of_match[];
33 
34 static u64 cdns_plat_cpu_addr_fixup(struct cdns_pcie *pcie, u64 cpu_addr)
35 {
36 	return cpu_addr & CDNS_PLAT_CPU_TO_BUS_ADDR;
37 }
38 
39 static const struct cdns_pcie_ops cdns_plat_ops = {
40 	.cpu_addr_fixup = cdns_plat_cpu_addr_fixup,
41 };
42 
43 static int cdns_plat_pcie_probe(struct platform_device *pdev)
44 {
45 	const struct cdns_plat_pcie_of_data *data;
46 	struct cdns_plat_pcie *cdns_plat_pcie;
47 	struct device *dev = &pdev->dev;
48 	struct pci_host_bridge *bridge;
49 	struct cdns_pcie_ep *ep;
50 	struct cdns_pcie_rc *rc;
51 	int phy_count;
52 	bool is_rc;
53 	int ret;
54 
55 	data = of_device_get_match_data(dev);
56 	if (!data)
57 		return -EINVAL;
58 
59 	is_rc = data->is_rc;
60 
61 	pr_debug(" Started %s with is_rc: %d\n", __func__, is_rc);
62 	cdns_plat_pcie = devm_kzalloc(dev, sizeof(*cdns_plat_pcie), GFP_KERNEL);
63 	if (!cdns_plat_pcie)
64 		return -ENOMEM;
65 
66 	platform_set_drvdata(pdev, cdns_plat_pcie);
67 	if (is_rc) {
68 		if (!IS_ENABLED(CONFIG_PCIE_CADENCE_PLAT_HOST))
69 			return -ENODEV;
70 
71 		bridge = devm_pci_alloc_host_bridge(dev, sizeof(*rc));
72 		if (!bridge)
73 			return -ENOMEM;
74 
75 		rc = pci_host_bridge_priv(bridge);
76 		rc->pcie.dev = dev;
77 		rc->pcie.ops = &cdns_plat_ops;
78 		cdns_plat_pcie->pcie = &rc->pcie;
79 		cdns_plat_pcie->is_rc = is_rc;
80 
81 		ret = cdns_pcie_init_phy(dev, cdns_plat_pcie->pcie);
82 		if (ret) {
83 			dev_err(dev, "failed to init phy\n");
84 			return ret;
85 		}
86 		pm_runtime_enable(dev);
87 		ret = pm_runtime_get_sync(dev);
88 		if (ret < 0) {
89 			dev_err(dev, "pm_runtime_get_sync() failed\n");
90 			goto err_get_sync;
91 		}
92 
93 		ret = cdns_pcie_host_setup(rc);
94 		if (ret)
95 			goto err_init;
96 	} else {
97 		if (!IS_ENABLED(CONFIG_PCIE_CADENCE_PLAT_EP))
98 			return -ENODEV;
99 
100 		ep = devm_kzalloc(dev, sizeof(*ep), GFP_KERNEL);
101 		if (!ep)
102 			return -ENOMEM;
103 
104 		ep->pcie.dev = dev;
105 		ep->pcie.ops = &cdns_plat_ops;
106 		cdns_plat_pcie->pcie = &ep->pcie;
107 		cdns_plat_pcie->is_rc = is_rc;
108 
109 		ret = cdns_pcie_init_phy(dev, cdns_plat_pcie->pcie);
110 		if (ret) {
111 			dev_err(dev, "failed to init phy\n");
112 			return ret;
113 		}
114 
115 		pm_runtime_enable(dev);
116 		ret = pm_runtime_get_sync(dev);
117 		if (ret < 0) {
118 			dev_err(dev, "pm_runtime_get_sync() failed\n");
119 			goto err_get_sync;
120 		}
121 
122 		ret = cdns_pcie_ep_setup(ep);
123 		if (ret)
124 			goto err_init;
125 	}
126 
127 	return 0;
128 
129  err_init:
130  err_get_sync:
131 	pm_runtime_put_sync(dev);
132 	pm_runtime_disable(dev);
133 	cdns_pcie_disable_phy(cdns_plat_pcie->pcie);
134 	phy_count = cdns_plat_pcie->pcie->phy_count;
135 	while (phy_count--)
136 		device_link_del(cdns_plat_pcie->pcie->link[phy_count]);
137 
138 	return 0;
139 }
140 
141 static void cdns_plat_pcie_shutdown(struct platform_device *pdev)
142 {
143 	struct device *dev = &pdev->dev;
144 	struct cdns_pcie *pcie = dev_get_drvdata(dev);
145 	int ret;
146 
147 	ret = pm_runtime_put_sync(dev);
148 	if (ret < 0)
149 		dev_dbg(dev, "pm_runtime_put_sync failed\n");
150 
151 	pm_runtime_disable(dev);
152 
153 	cdns_pcie_disable_phy(pcie);
154 }
155 
156 static const struct cdns_plat_pcie_of_data cdns_plat_pcie_host_of_data = {
157 	.is_rc = true,
158 };
159 
160 static const struct cdns_plat_pcie_of_data cdns_plat_pcie_ep_of_data = {
161 	.is_rc = false,
162 };
163 
164 static const struct of_device_id cdns_plat_pcie_of_match[] = {
165 	{
166 		.compatible = "cdns,cdns-pcie-host",
167 		.data = &cdns_plat_pcie_host_of_data,
168 	},
169 	{
170 		.compatible = "cdns,cdns-pcie-ep",
171 		.data = &cdns_plat_pcie_ep_of_data,
172 	},
173 	{},
174 };
175 
176 static struct platform_driver cdns_plat_pcie_driver = {
177 	.driver = {
178 		.name = "cdns-pcie",
179 		.of_match_table = cdns_plat_pcie_of_match,
180 		.pm	= &cdns_pcie_pm_ops,
181 	},
182 	.probe = cdns_plat_pcie_probe,
183 	.shutdown = cdns_plat_pcie_shutdown,
184 };
185 builtin_platform_driver(cdns_plat_pcie_driver);
186