1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * From setup-res.c, by: 4 * Dave Rusling (david.rusling@reo.mts.dec.com) 5 * David Mosberger (davidm@cs.arizona.edu) 6 * David Miller (davem@redhat.com) 7 * Ivan Kokshaysky (ink@jurassic.park.msu.ru) 8 */ 9 #include <linux/module.h> 10 #include <linux/kernel.h> 11 #include <linux/pci.h> 12 #include <linux/errno.h> 13 #include <linux/ioport.h> 14 #include <linux/of.h> 15 #include <linux/of_platform.h> 16 #include <linux/platform_device.h> 17 #include <linux/proc_fs.h> 18 #include <linux/slab.h> 19 20 #include "pci.h" 21 22 /* 23 * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond 24 * to P2P or CardBus bridge windows) go in a table. Additional ones (for 25 * buses below host bridges or subtractive decode bridges) go in the list. 26 * Use pci_bus_for_each_resource() to iterate through all the resources. 27 */ 28 29 struct pci_bus_resource { 30 struct list_head list; 31 struct resource *res; 32 }; 33 34 void pci_add_resource_offset(struct list_head *resources, struct resource *res, 35 resource_size_t offset) 36 { 37 struct resource_entry *entry; 38 39 entry = resource_list_create_entry(res, 0); 40 if (!entry) { 41 pr_err("PCI: can't add host bridge window %pR\n", res); 42 return; 43 } 44 45 entry->offset = offset; 46 resource_list_add_tail(entry, resources); 47 } 48 EXPORT_SYMBOL(pci_add_resource_offset); 49 50 void pci_add_resource(struct list_head *resources, struct resource *res) 51 { 52 pci_add_resource_offset(resources, res, 0); 53 } 54 EXPORT_SYMBOL(pci_add_resource); 55 56 void pci_free_resource_list(struct list_head *resources) 57 { 58 resource_list_free(resources); 59 } 60 EXPORT_SYMBOL(pci_free_resource_list); 61 62 void pci_bus_add_resource(struct pci_bus *bus, struct resource *res) 63 { 64 struct pci_bus_resource *bus_res; 65 66 bus_res = kzalloc(sizeof(struct pci_bus_resource), GFP_KERNEL); 67 if (!bus_res) { 68 dev_err(&bus->dev, "can't add %pR resource\n", res); 69 return; 70 } 71 72 bus_res->res = res; 73 list_add_tail(&bus_res->list, &bus->resources); 74 } 75 76 struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n) 77 { 78 struct pci_bus_resource *bus_res; 79 80 if (n < PCI_BRIDGE_RESOURCE_NUM) 81 return bus->resource[n]; 82 83 n -= PCI_BRIDGE_RESOURCE_NUM; 84 list_for_each_entry(bus_res, &bus->resources, list) { 85 if (n-- == 0) 86 return bus_res->res; 87 } 88 return NULL; 89 } 90 EXPORT_SYMBOL_GPL(pci_bus_resource_n); 91 92 void pci_bus_remove_resource(struct pci_bus *bus, struct resource *res) 93 { 94 struct pci_bus_resource *bus_res, *tmp; 95 int i; 96 97 for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) { 98 if (bus->resource[i] == res) { 99 bus->resource[i] = NULL; 100 return; 101 } 102 } 103 104 list_for_each_entry_safe(bus_res, tmp, &bus->resources, list) { 105 if (bus_res->res == res) { 106 list_del(&bus_res->list); 107 kfree(bus_res); 108 return; 109 } 110 } 111 } 112 113 void pci_bus_remove_resources(struct pci_bus *bus) 114 { 115 int i; 116 struct pci_bus_resource *bus_res, *tmp; 117 118 for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) 119 bus->resource[i] = NULL; 120 121 list_for_each_entry_safe(bus_res, tmp, &bus->resources, list) { 122 list_del(&bus_res->list); 123 kfree(bus_res); 124 } 125 } 126 127 int devm_request_pci_bus_resources(struct device *dev, 128 struct list_head *resources) 129 { 130 struct resource_entry *win; 131 struct resource *parent, *res; 132 int err; 133 134 resource_list_for_each_entry(win, resources) { 135 res = win->res; 136 switch (resource_type(res)) { 137 case IORESOURCE_IO: 138 parent = &ioport_resource; 139 break; 140 case IORESOURCE_MEM: 141 parent = &iomem_resource; 142 break; 143 default: 144 continue; 145 } 146 147 err = devm_request_resource(dev, parent, res); 148 if (err) 149 return err; 150 } 151 152 return 0; 153 } 154 EXPORT_SYMBOL_GPL(devm_request_pci_bus_resources); 155 156 static struct pci_bus_region pci_32_bit = {0, 0xffffffffULL}; 157 #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT 158 static struct pci_bus_region pci_64_bit = {0, 159 (pci_bus_addr_t) 0xffffffffffffffffULL}; 160 static struct pci_bus_region pci_high = {(pci_bus_addr_t) 0x100000000ULL, 161 (pci_bus_addr_t) 0xffffffffffffffffULL}; 162 #endif 163 164 /* 165 * @res contains CPU addresses. Clip it so the corresponding bus addresses 166 * on @bus are entirely within @region. This is used to control the bus 167 * addresses of resources we allocate, e.g., we may need a resource that 168 * can be mapped by a 32-bit BAR. 169 */ 170 static void pci_clip_resource_to_region(struct pci_bus *bus, 171 struct resource *res, 172 struct pci_bus_region *region) 173 { 174 struct pci_bus_region r; 175 176 pcibios_resource_to_bus(bus, &r, res); 177 if (r.start < region->start) 178 r.start = region->start; 179 if (r.end > region->end) 180 r.end = region->end; 181 182 if (r.end < r.start) 183 res->end = res->start - 1; 184 else 185 pcibios_bus_to_resource(bus, res, &r); 186 } 187 188 static int pci_bus_alloc_from_region(struct pci_bus *bus, struct resource *res, 189 resource_size_t size, resource_size_t align, 190 resource_size_t min, unsigned long type_mask, 191 resource_alignf alignf, 192 void *alignf_data, 193 struct pci_bus_region *region) 194 { 195 struct resource *r, avail; 196 resource_size_t max; 197 int ret; 198 199 type_mask |= IORESOURCE_TYPE_BITS; 200 201 pci_bus_for_each_resource(bus, r) { 202 resource_size_t min_used = min; 203 204 if (!r) 205 continue; 206 207 /* type_mask must match */ 208 if ((res->flags ^ r->flags) & type_mask) 209 continue; 210 211 /* We cannot allocate a non-prefetching resource 212 from a pre-fetching area */ 213 if ((r->flags & IORESOURCE_PREFETCH) && 214 !(res->flags & IORESOURCE_PREFETCH)) 215 continue; 216 217 avail = *r; 218 pci_clip_resource_to_region(bus, &avail, region); 219 220 /* 221 * "min" is typically PCIBIOS_MIN_IO or PCIBIOS_MIN_MEM to 222 * protect badly documented motherboard resources, but if 223 * this is an already-configured bridge window, its start 224 * overrides "min". 225 */ 226 if (avail.start) 227 min_used = avail.start; 228 229 max = avail.end; 230 231 /* Don't bother if available space isn't large enough */ 232 if (size > max - min_used + 1) 233 continue; 234 235 /* Ok, try it out.. */ 236 ret = allocate_resource(r, res, size, min_used, max, 237 align, alignf, alignf_data); 238 if (ret == 0) 239 return 0; 240 } 241 return -ENOMEM; 242 } 243 244 /** 245 * pci_bus_alloc_resource - allocate a resource from a parent bus 246 * @bus: PCI bus 247 * @res: resource to allocate 248 * @size: size of resource to allocate 249 * @align: alignment of resource to allocate 250 * @min: minimum /proc/iomem address to allocate 251 * @type_mask: IORESOURCE_* type flags 252 * @alignf: resource alignment function 253 * @alignf_data: data argument for resource alignment function 254 * 255 * Given the PCI bus a device resides on, the size, minimum address, 256 * alignment and type, try to find an acceptable resource allocation 257 * for a specific device resource. 258 */ 259 int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res, 260 resource_size_t size, resource_size_t align, 261 resource_size_t min, unsigned long type_mask, 262 resource_alignf alignf, 263 void *alignf_data) 264 { 265 #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT 266 int rc; 267 268 if (res->flags & IORESOURCE_MEM_64) { 269 rc = pci_bus_alloc_from_region(bus, res, size, align, min, 270 type_mask, alignf, alignf_data, 271 &pci_high); 272 if (rc == 0) 273 return 0; 274 275 return pci_bus_alloc_from_region(bus, res, size, align, min, 276 type_mask, alignf, alignf_data, 277 &pci_64_bit); 278 } 279 #endif 280 281 return pci_bus_alloc_from_region(bus, res, size, align, min, 282 type_mask, alignf, alignf_data, 283 &pci_32_bit); 284 } 285 EXPORT_SYMBOL(pci_bus_alloc_resource); 286 287 /* 288 * The @idx resource of @dev should be a PCI-PCI bridge window. If this 289 * resource fits inside a window of an upstream bridge, do nothing. If it 290 * overlaps an upstream window but extends outside it, clip the resource so 291 * it fits completely inside. 292 */ 293 bool pci_bus_clip_resource(struct pci_dev *dev, int idx) 294 { 295 struct pci_bus *bus = dev->bus; 296 struct resource *res = &dev->resource[idx]; 297 struct resource orig_res = *res; 298 struct resource *r; 299 300 pci_bus_for_each_resource(bus, r) { 301 resource_size_t start, end; 302 303 if (!r) 304 continue; 305 306 if (resource_type(res) != resource_type(r)) 307 continue; 308 309 start = max(r->start, res->start); 310 end = min(r->end, res->end); 311 312 if (start > end) 313 continue; /* no overlap */ 314 315 if (res->start == start && res->end == end) 316 return false; /* no change */ 317 318 res->start = start; 319 res->end = end; 320 res->flags &= ~IORESOURCE_UNSET; 321 orig_res.flags &= ~IORESOURCE_UNSET; 322 pci_info(dev, "%pR clipped to %pR\n", &orig_res, res); 323 324 return true; 325 } 326 327 return false; 328 } 329 330 void __weak pcibios_resource_survey_bus(struct pci_bus *bus) { } 331 332 void __weak pcibios_bus_add_device(struct pci_dev *pdev) { } 333 334 /* 335 * Create pwrctrl devices (if required) for the PCI devices to handle the power 336 * state. 337 */ 338 static void pci_pwrctrl_create_devices(struct pci_dev *dev) 339 { 340 struct device_node *np = dev_of_node(&dev->dev); 341 struct device *parent = &dev->dev; 342 struct platform_device *pdev; 343 344 /* 345 * First ensure that we are starting from a PCI bridge and it has a 346 * corresponding devicetree node. 347 */ 348 if (np && pci_is_bridge(dev)) { 349 /* 350 * Now look for the child PCI device nodes and create pwrctrl 351 * devices for them. The pwrctrl device drivers will manage the 352 * power state of the devices. 353 */ 354 for_each_available_child_of_node_scoped(np, child) { 355 /* 356 * First check whether the pwrctrl device really 357 * needs to be created or not. This is decided 358 * based on at least one of the power supplies 359 * being defined in the devicetree node of the 360 * device. 361 */ 362 if (!of_pci_supply_present(child)) { 363 pci_dbg(dev, "skipping OF node: %s\n", child->name); 364 return; 365 } 366 367 /* Now create the pwrctrl device */ 368 pdev = of_platform_device_create(child, NULL, parent); 369 if (!pdev) 370 pci_err(dev, "failed to create OF node: %s\n", child->name); 371 } 372 } 373 } 374 375 /** 376 * pci_bus_add_device - start driver for a single device 377 * @dev: device to add 378 * 379 * This adds add sysfs entries and start device drivers 380 */ 381 void pci_bus_add_device(struct pci_dev *dev) 382 { 383 struct device_node *dn = dev->dev.of_node; 384 struct platform_device *pdev; 385 int retval; 386 387 /* 388 * Can not put in pci_device_add yet because resources 389 * are not assigned yet for some devices. 390 */ 391 pcibios_bus_add_device(dev); 392 pci_fixup_device(pci_fixup_final, dev); 393 if (pci_is_bridge(dev)) 394 of_pci_make_dev_node(dev); 395 pci_create_sysfs_dev_files(dev); 396 pci_proc_attach_device(dev); 397 pci_bridge_d3_update(dev); 398 399 pci_pwrctrl_create_devices(dev); 400 401 /* 402 * If the PCI device is associated with a pwrctrl device with a 403 * power supply, create a device link between the PCI device and 404 * pwrctrl device. This ensures that pwrctrl drivers are probed 405 * before PCI client drivers. 406 */ 407 pdev = of_find_device_by_node(dn); 408 if (pdev && of_pci_supply_present(dn)) { 409 if (!device_link_add(&dev->dev, &pdev->dev, 410 DL_FLAG_AUTOREMOVE_CONSUMER)) 411 pci_err(dev, "failed to add device link to power control device %s\n", 412 pdev->name); 413 } 414 415 dev->match_driver = !dn || of_device_is_available(dn); 416 retval = device_attach(&dev->dev); 417 if (retval < 0 && retval != -EPROBE_DEFER) 418 pci_warn(dev, "device attach failed (%d)\n", retval); 419 420 pci_dev_assign_added(dev); 421 } 422 EXPORT_SYMBOL_GPL(pci_bus_add_device); 423 424 /** 425 * pci_bus_add_devices - start driver for PCI devices 426 * @bus: bus to check for new devices 427 * 428 * Start driver for PCI devices and add some sysfs entries. 429 */ 430 void pci_bus_add_devices(const struct pci_bus *bus) 431 { 432 struct pci_dev *dev; 433 struct pci_bus *child; 434 435 list_for_each_entry(dev, &bus->devices, bus_list) { 436 /* Skip already-added devices */ 437 if (pci_dev_is_added(dev)) 438 continue; 439 pci_bus_add_device(dev); 440 } 441 442 list_for_each_entry(dev, &bus->devices, bus_list) { 443 /* Skip if device attach failed */ 444 if (!pci_dev_is_added(dev)) 445 continue; 446 child = dev->subordinate; 447 if (child) 448 pci_bus_add_devices(child); 449 } 450 } 451 EXPORT_SYMBOL(pci_bus_add_devices); 452 453 static int __pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), 454 void *userdata) 455 { 456 struct pci_dev *dev; 457 int ret = 0; 458 459 list_for_each_entry(dev, &top->devices, bus_list) { 460 ret = cb(dev, userdata); 461 if (ret) 462 break; 463 if (dev->subordinate) { 464 ret = __pci_walk_bus(dev->subordinate, cb, userdata); 465 if (ret) 466 break; 467 } 468 } 469 return ret; 470 } 471 472 /** 473 * pci_walk_bus - walk devices on/under bus, calling callback. 474 * @top: bus whose devices should be walked 475 * @cb: callback to be called for each device found 476 * @userdata: arbitrary pointer to be passed to callback 477 * 478 * Walk the given bus, including any bridged devices 479 * on buses under this bus. Call the provided callback 480 * on each device found. 481 * 482 * We check the return of @cb each time. If it returns anything 483 * other than 0, we break out. 484 */ 485 void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), void *userdata) 486 { 487 down_read(&pci_bus_sem); 488 __pci_walk_bus(top, cb, userdata); 489 up_read(&pci_bus_sem); 490 } 491 EXPORT_SYMBOL_GPL(pci_walk_bus); 492 493 void pci_walk_bus_locked(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), void *userdata) 494 { 495 lockdep_assert_held(&pci_bus_sem); 496 497 __pci_walk_bus(top, cb, userdata); 498 } 499 500 struct pci_bus *pci_bus_get(struct pci_bus *bus) 501 { 502 if (bus) 503 get_device(&bus->dev); 504 return bus; 505 } 506 507 void pci_bus_put(struct pci_bus *bus) 508 { 509 if (bus) 510 put_device(&bus->dev); 511 } 512