1# SPDX-License-Identifier: GPL-2.0 2# 3# PCI configuration 4# 5 6# select this to offer the PCI prompt 7config HAVE_PCI 8 bool 9 10# select this to unconditionally force on PCI support 11config FORCE_PCI 12 bool 13 select HAVE_PCI 14 select PCI 15 16# select this to provide a generic PCI iomap, 17# without PCI itself having to be defined 18config GENERIC_PCI_IOMAP 19 bool 20 21menuconfig PCI 22 bool "PCI support" 23 depends on HAVE_PCI 24 help 25 This option enables support for the PCI local bus, including 26 support for PCI-X and the foundations for PCI Express support. 27 Say 'Y' here unless you know what you are doing. 28 29if PCI 30 31config PCI_DOMAINS 32 bool 33 depends on PCI 34 35config PCI_DOMAINS_GENERIC 36 bool 37 select PCI_DOMAINS 38 39config PCI_SYSCALL 40 bool 41 42source "drivers/pci/pcie/Kconfig" 43 44config PCI_MSI 45 bool "Message Signaled Interrupts (MSI and MSI-X)" 46 select GENERIC_MSI_IRQ 47 help 48 This allows device drivers to enable MSI (Message Signaled 49 Interrupts). Message Signaled Interrupts enable a device to 50 generate an interrupt using an inbound Memory Write on its 51 PCI bus instead of asserting a device IRQ pin. 52 53 Use of PCI MSI interrupts can be disabled at kernel boot time 54 by using the 'pci=nomsi' option. This disables MSI for the 55 entire system. 56 57 If you don't know what to do here, say Y. 58 59config PCI_MSI_ARCH_FALLBACKS 60 bool 61 62config PCI_QUIRKS 63 default y 64 bool "Enable PCI quirk workarounds" if EXPERT 65 help 66 This enables workarounds for various PCI chipset bugs/quirks. 67 Disable this only if your target machine is unaffected by PCI 68 quirks. 69 70config PCI_DEBUG 71 bool "PCI Debugging" 72 depends on DEBUG_KERNEL 73 help 74 Say Y here if you want the PCI core to produce a bunch of debug 75 messages to the system log. Select this if you are having a 76 problem with PCI support and want to see more of what is going on. 77 78 When in doubt, say N. 79 80config PCI_REALLOC_ENABLE_AUTO 81 bool "Enable PCI resource re-allocation detection" 82 depends on PCI_IOV 83 help 84 Say Y here if you want the PCI core to detect if PCI resource 85 re-allocation needs to be enabled. You can always use pci=realloc=on 86 or pci=realloc=off to override it. It will automatically 87 re-allocate PCI resources if SR-IOV BARs have not been allocated by 88 the BIOS. 89 90 When in doubt, say N. 91 92config PCI_STUB 93 tristate "PCI Stub driver" 94 help 95 Say Y or M here if you want be able to reserve a PCI device 96 when it is going to be assigned to a guest operating system. 97 98 When in doubt, say N. 99 100config PCI_PF_STUB 101 tristate "PCI PF Stub driver" 102 depends on PCI_IOV 103 help 104 Say Y or M here if you want to enable support for devices that 105 require SR-IOV support, while at the same time the PF (Physical 106 Function) itself is not providing any actual services on the 107 host itself such as storage or networking. 108 109 When in doubt, say N. 110 111config XEN_PCIDEV_FRONTEND 112 tristate "Xen PCI Frontend" 113 depends on XEN_PV 114 select PCI_XEN 115 select XEN_XENBUS_FRONTEND 116 default y 117 help 118 The PCI device frontend driver allows the kernel to import arbitrary 119 PCI devices from a PCI backend to support PCI driver domains. 120 121config PCI_ATS 122 bool 123 124config PCI_DOE 125 bool "Enable PCI Data Object Exchange (DOE) support" 126 help 127 Say Y here if you want be able to communicate with PCIe DOE 128 mailboxes. 129 130config PCI_ECAM 131 bool 132 133config PCI_LOCKLESS_CONFIG 134 bool 135 136config PCI_BRIDGE_EMUL 137 bool 138 139config PCI_IOV 140 bool "PCI IOV support" 141 select PCI_ATS 142 help 143 I/O Virtualization is a PCI feature supported by some devices 144 which allows them to create virtual devices which share their 145 physical resources. 146 147 If unsure, say N. 148 149config PCI_NPEM 150 bool "Native PCIe Enclosure Management" 151 depends on LEDS_CLASS=y 152 help 153 Support for Native PCIe Enclosure Management. It allows managing LED 154 indications in storage enclosures. Enclosure must support following 155 indications: OK, Locate, Fail, Rebuild, other indications are 156 optional. 157 158config PCI_PRI 159 bool "PCI PRI support" 160 select PCI_ATS 161 help 162 PRI is the PCI Page Request Interface. It allows PCI devices that are 163 behind an IOMMU to recover from page faults. 164 165 If unsure, say N. 166 167config PCI_PASID 168 bool "PCI PASID support" 169 select PCI_ATS 170 help 171 Process Address Space Identifiers (PASIDs) can be used by PCI devices 172 to access more than one IO address space at the same time. To make 173 use of this feature an IOMMU is required which also supports PASIDs. 174 Select this option if you have such an IOMMU and want to compile the 175 driver for it into your kernel. 176 177 If unsure, say N. 178 179config PCIE_TPH 180 bool "TLP Processing Hints" 181 help 182 This option adds support for PCIe TLP Processing Hints (TPH). 183 TPH allows endpoint devices to provide optimization hints, such as 184 desired caching behavior, for requests that target memory space. 185 These hints, called Steering Tags, can empower the system hardware 186 to optimize the utilization of platform resources. 187 188config PCI_P2PDMA 189 bool "PCI peer-to-peer transfer support" 190 depends on ZONE_DEVICE 191 # 192 # The need for the scatterlist DMA bus address flag means PCI P2PDMA 193 # requires 64bit 194 # 195 depends on 64BIT 196 select GENERIC_ALLOCATOR 197 select NEED_SG_DMA_FLAGS 198 help 199 Enables drivers to do PCI peer-to-peer transactions to and from 200 BARs that are exposed in other devices that are the part of 201 the hierarchy where peer-to-peer DMA is guaranteed by the PCI 202 specification to work (ie. anything below a single PCI bridge). 203 204 Many PCIe root complexes do not support P2P transactions and 205 it's hard to tell which support it at all, so at this time, 206 P2P DMA transactions must be between devices behind the same root 207 port. 208 209 If unsure, say N. 210 211config PCI_LABEL 212 def_bool y if (DMI || ACPI) 213 select NLS 214 215config PCI_HYPERV 216 tristate "Hyper-V PCI Frontend" 217 depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI && SYSFS 218 select PCI_HYPERV_INTERFACE 219 help 220 The PCI device frontend driver allows the kernel to import arbitrary 221 PCI devices from a PCI backend to support PCI driver domains. 222 223config PCI_DYNAMIC_OF_NODES 224 bool "Create Device tree nodes for PCI devices" 225 depends on OF_IRQ 226 select OF_DYNAMIC 227 help 228 This option enables support for generating device tree nodes for some 229 PCI devices. Thus, the driver of this kind can load and overlay 230 flattened device tree for its downstream devices. 231 232 Once this option is selected, the device tree nodes will be generated 233 for all PCI bridges. 234 235choice 236 prompt "PCI Express hierarchy optimization setting" 237 default PCIE_BUS_DEFAULT 238 depends on PCI && EXPERT 239 help 240 MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe 241 device parameters that affect performance and the ability to 242 support hotplug and peer-to-peer DMA. 243 244 The following choices set the MPS and MRRS optimization strategy 245 at compile-time. The choices are the same as those offered for 246 the kernel command-line parameter 'pci', i.e., 247 'pci=pcie_bus_tune_off', 'pci=pcie_bus_safe', 248 'pci=pcie_bus_perf', and 'pci=pcie_bus_peer2peer'. 249 250 This is a compile-time setting and can be overridden by the above 251 command-line parameters. If unsure, choose PCIE_BUS_DEFAULT. 252 253config PCIE_BUS_TUNE_OFF 254 bool "Tune Off" 255 depends on PCI 256 help 257 Use the BIOS defaults; don't touch MPS at all. This is the same 258 as booting with 'pci=pcie_bus_tune_off'. 259 260config PCIE_BUS_DEFAULT 261 bool "Default" 262 depends on PCI 263 help 264 Default choice; ensure that the MPS matches upstream bridge. 265 266config PCIE_BUS_SAFE 267 bool "Safe" 268 depends on PCI 269 help 270 Use largest MPS that boot-time devices support. If you have a 271 closed system with no possibility of adding new devices, this 272 will use the largest MPS that's supported by all devices. This 273 is the same as booting with 'pci=pcie_bus_safe'. 274 275config PCIE_BUS_PERFORMANCE 276 bool "Performance" 277 depends on PCI 278 help 279 Use MPS and MRRS for best performance. Ensure that a given 280 device's MPS is no larger than its parent MPS, which allows us to 281 keep all switches/bridges to the max MPS supported by their 282 parent. This is the same as booting with 'pci=pcie_bus_perf'. 283 284config PCIE_BUS_PEER2PEER 285 bool "Peer2peer" 286 depends on PCI 287 help 288 Set MPS = 128 for all devices. MPS configuration effected by the 289 other options could cause the MPS on one root port to be 290 different than that of the MPS on another, which may cause 291 hot-added devices or peer-to-peer DMA to fail. Set MPS to the 292 smallest possible value (128B) system-wide to avoid these issues. 293 This is the same as booting with 'pci=pcie_bus_peer2peer'. 294 295endchoice 296 297config VGA_ARB 298 bool "VGA Arbitration" if EXPERT 299 default y 300 depends on (PCI && !S390) 301 help 302 Some "legacy" VGA devices implemented on PCI typically have the same 303 hard-decoded addresses as they did on ISA. When multiple PCI devices 304 are accessed at same time they need some kind of coordination. Please 305 see Documentation/gpu/vgaarbiter.rst for more details. Select this to 306 enable VGA arbiter. 307 308config VGA_ARB_MAX_GPUS 309 int "Maximum number of GPUs" 310 default 16 311 depends on VGA_ARB 312 help 313 Reserves space in the kernel to maintain resource locking for 314 multiple GPUS. The overhead for each GPU is very small. 315 316source "drivers/pci/hotplug/Kconfig" 317source "drivers/pci/controller/Kconfig" 318source "drivers/pci/endpoint/Kconfig" 319source "drivers/pci/switch/Kconfig" 320source "drivers/pci/pwrctrl/Kconfig" 321 322endif 323