xref: /linux/drivers/pci/Kconfig (revision ae874027524c537a15e8d6f14ff69b855bc13ca8)
17328c8f4SBjorn Helgaas# SPDX-License-Identifier: GPL-2.0
21da177e4SLinus Torvalds#
31da177e4SLinus Torvalds# PCI configuration
41da177e4SLinus Torvalds#
55f8fc432SBogicevic Sasa
6eb01d42aSChristoph Hellwig# select this to offer the PCI prompt
7eb01d42aSChristoph Hellwigconfig HAVE_PCI
8eb01d42aSChristoph Hellwig	bool
9eb01d42aSChristoph Hellwig
10eb01d42aSChristoph Hellwig# select this to unconditionally force on PCI support
11eb01d42aSChristoph Hellwigconfig FORCE_PCI
12eb01d42aSChristoph Hellwig	bool
13eb01d42aSChristoph Hellwig	select HAVE_PCI
14eb01d42aSChristoph Hellwig	select PCI
15eb01d42aSChristoph Hellwig
16*ae874027SPhilipp Stanner# select this to provide a generic PCI iomap,
17*ae874027SPhilipp Stanner# without PCI itself having to be defined
18*ae874027SPhilipp Stannerconfig GENERIC_PCI_IOMAP
19*ae874027SPhilipp Stanner	bool
20*ae874027SPhilipp Stanner
21eb01d42aSChristoph Hellwigmenuconfig PCI
22eb01d42aSChristoph Hellwig	bool "PCI support"
23eb01d42aSChristoph Hellwig	depends on HAVE_PCI
24eb01d42aSChristoph Hellwig	help
25eb01d42aSChristoph Hellwig	  This option enables support for the PCI local bus, including
26eb01d42aSChristoph Hellwig	  support for PCI-X and the foundations for PCI Express support.
27eb01d42aSChristoph Hellwig	  Say 'Y' here unless you know what you are doing.
28eb01d42aSChristoph Hellwig
292e8cb2cfSRob Herringif PCI
302e8cb2cfSRob Herring
312eac9c2dSChristoph Hellwigconfig PCI_DOMAINS
322eac9c2dSChristoph Hellwig	bool
332eac9c2dSChristoph Hellwig	depends on PCI
342eac9c2dSChristoph Hellwig
352eac9c2dSChristoph Hellwigconfig PCI_DOMAINS_GENERIC
362eac9c2dSChristoph Hellwig	bool
372eac9c2dSChristoph Hellwig	select PCI_DOMAINS
382eac9c2dSChristoph Hellwig
3920f1b79dSChristoph Hellwigconfig PCI_SYSCALL
4020f1b79dSChristoph Hellwig	bool
4120f1b79dSChristoph Hellwig
425f8fc432SBogicevic Sasasource "drivers/pci/pcie/Kconfig"
435f8fc432SBogicevic Sasa
441da177e4SLinus Torvaldsconfig PCI_MSI
451da177e4SLinus Torvalds	bool "Message Signaled Interrupts (MSI and MSI-X)"
4638b6a1cfSJiang Liu	select GENERIC_MSI_IRQ
471da177e4SLinus Torvalds	help
481da177e4SLinus Torvalds	   This allows device drivers to enable MSI (Message Signaled
491da177e4SLinus Torvalds	   Interrupts).  Message Signaled Interrupts enable a device to
501da177e4SLinus Torvalds	   generate an interrupt using an inbound Memory Write on its
511da177e4SLinus Torvalds	   PCI bus instead of asserting a device IRQ pin.
521da177e4SLinus Torvalds
53309e57dfSMatthew Wilcox	   Use of PCI MSI interrupts can be disabled at kernel boot time
54309e57dfSMatthew Wilcox	   by using the 'pci=nomsi' option.  This disables MSI for the
55309e57dfSMatthew Wilcox	   entire system.
56309e57dfSMatthew Wilcox
573196180aSJesse Barnes	   If you don't know what to do here, say Y.
581da177e4SLinus Torvalds
59077ee78eSThomas Gleixnerconfig PCI_MSI_ARCH_FALLBACKS
60077ee78eSThomas Gleixner	bool
61077ee78eSThomas Gleixner
6203ea2263SRandy Dunlapconfig PCI_QUIRKS
6303ea2263SRandy Dunlap	default y
6403ea2263SRandy Dunlap	bool "Enable PCI quirk workarounds" if EXPERT
6503ea2263SRandy Dunlap	help
6603ea2263SRandy Dunlap	  This enables workarounds for various PCI chipset bugs/quirks.
6703ea2263SRandy Dunlap	  Disable this only if your target machine is unaffected by PCI
6803ea2263SRandy Dunlap	  quirks.
6903ea2263SRandy Dunlap
701da177e4SLinus Torvaldsconfig PCI_DEBUG
711da177e4SLinus Torvalds	bool "PCI Debugging"
722e8cb2cfSRob Herring	depends on DEBUG_KERNEL
731da177e4SLinus Torvalds	help
741da177e4SLinus Torvalds	  Say Y here if you want the PCI core to produce a bunch of debug
751da177e4SLinus Torvalds	  messages to the system log.  Select this if you are having a
761da177e4SLinus Torvalds	  problem with PCI support and want to see more of what is going on.
771da177e4SLinus Torvalds
781da177e4SLinus Torvalds	  When in doubt, say N.
791da177e4SLinus Torvalds
80b07f2ebcSYinghai Luconfig PCI_REALLOC_ENABLE_AUTO
81b07f2ebcSYinghai Lu	bool "Enable PCI resource re-allocation detection"
82ad581f86SSascha El-Sharkawy	depends on PCI_IOV
83b07f2ebcSYinghai Lu	help
84b07f2ebcSYinghai Lu	  Say Y here if you want the PCI core to detect if PCI resource
85b07f2ebcSYinghai Lu	  re-allocation needs to be enabled. You can always use pci=realloc=on
86ad581f86SSascha El-Sharkawy	  or pci=realloc=off to override it.  It will automatically
87ad581f86SSascha El-Sharkawy	  re-allocate PCI resources if SR-IOV BARs have not been allocated by
88ad581f86SSascha El-Sharkawy	  the BIOS.
89b07f2ebcSYinghai Lu
90b07f2ebcSYinghai Lu	  When in doubt, say N.
91b07f2ebcSYinghai Lu
92c70e0d9dSChris Wrightconfig PCI_STUB
93c70e0d9dSChris Wright	tristate "PCI Stub driver"
94c70e0d9dSChris Wright	help
95c70e0d9dSChris Wright	  Say Y or M here if you want be able to reserve a PCI device
96c70e0d9dSChris Wright	  when it is going to be assigned to a guest operating system.
97c70e0d9dSChris Wright
98c70e0d9dSChris Wright	  When in doubt, say N.
99c70e0d9dSChris Wright
100a8ccf8a6SAlexander Duyckconfig PCI_PF_STUB
101a8ccf8a6SAlexander Duyck	tristate "PCI PF Stub driver"
102a8ccf8a6SAlexander Duyck	depends on PCI_IOV
103a8ccf8a6SAlexander Duyck	help
104a8ccf8a6SAlexander Duyck	  Say Y or M here if you want to enable support for devices that
1054a57f58fSRandy Dunlap	  require SR-IOV support, while at the same time the PF (Physical
1064a57f58fSRandy Dunlap	  Function) itself is not providing any actual services on the
1074a57f58fSRandy Dunlap	  host itself such as storage or networking.
108a8ccf8a6SAlexander Duyck
109a8ccf8a6SAlexander Duyck	  When in doubt, say N.
110a8ccf8a6SAlexander Duyck
111956a9202SRyan Wilsonconfig XEN_PCIDEV_FRONTEND
112956a9202SRyan Wilson	tristate "Xen PCI Frontend"
113e243ae95SJan Beulich	depends on XEN_PV
114956a9202SRyan Wilson	select PCI_XEN
115fce263c1SKonrad Rzeszutek Wilk	select XEN_XENBUS_FRONTEND
116956a9202SRyan Wilson	default y
117956a9202SRyan Wilson	help
118956a9202SRyan Wilson	  The PCI device frontend driver allows the kernel to import arbitrary
119956a9202SRyan Wilson	  PCI devices from a PCI backend to support PCI driver domains.
120956a9202SRyan Wilson
121db3c33c6SJoerg Roedelconfig PCI_ATS
122db3c33c6SJoerg Roedel	bool
123db3c33c6SJoerg Roedel
1249d24322eSJonathan Cameronconfig PCI_DOE
1259d24322eSJonathan Cameron	bool
1269d24322eSJonathan Cameron
12735ff9477SJayachandran Cconfig PCI_ECAM
12835ff9477SJayachandran C	bool
12935ff9477SJayachandran C
130714fe383SThomas Gleixnerconfig PCI_LOCKLESS_CONFIG
131714fe383SThomas Gleixner	bool
132714fe383SThomas Gleixner
13323a5fba4SThomas Petazzoniconfig PCI_BRIDGE_EMUL
13423a5fba4SThomas Petazzoni	bool
13523a5fba4SThomas Petazzoni
136d1b054daSYu Zhaoconfig PCI_IOV
137d1b054daSYu Zhao	bool "PCI IOV support"
138db3c33c6SJoerg Roedel	select PCI_ATS
139d1b054daSYu Zhao	help
140d1b054daSYu Zhao	  I/O Virtualization is a PCI feature supported by some devices
141d1b054daSYu Zhao	  which allows them to create virtual devices which share their
142d1b054daSYu Zhao	  physical resources.
143d1b054daSYu Zhao
144d1b054daSYu Zhao	  If unsure, say N.
145204d49a5SBjorn Helgaas
146c320b976SJoerg Roedelconfig PCI_PRI
147c320b976SJoerg Roedel	bool "PCI PRI support"
148c320b976SJoerg Roedel	select PCI_ATS
149c320b976SJoerg Roedel	help
150c320b976SJoerg Roedel	  PRI is the PCI Page Request Interface. It allows PCI devices that are
151c320b976SJoerg Roedel	  behind an IOMMU to recover from page faults.
152c320b976SJoerg Roedel
153c320b976SJoerg Roedel	  If unsure, say N.
154c320b976SJoerg Roedel
155086ac11fSJoerg Roedelconfig PCI_PASID
156086ac11fSJoerg Roedel	bool "PCI PASID support"
157086ac11fSJoerg Roedel	select PCI_ATS
158086ac11fSJoerg Roedel	help
159086ac11fSJoerg Roedel	  Process Address Space Identifiers (PASIDs) can be used by PCI devices
160086ac11fSJoerg Roedel	  to access more than one IO address space at the same time. To make
161086ac11fSJoerg Roedel	  use of this feature an IOMMU is required which also supports PASIDs.
162086ac11fSJoerg Roedel	  Select this option if you have such an IOMMU and want to compile the
163086ac11fSJoerg Roedel	  driver for it into your kernel.
164086ac11fSJoerg Roedel
165086ac11fSJoerg Roedel	  If unsure, say N.
166086ac11fSJoerg Roedel
16752916982SLogan Gunthorpeconfig PCI_P2PDMA
16852916982SLogan Gunthorpe	bool "PCI peer-to-peer transfer support"
1692e8cb2cfSRob Herring	depends on ZONE_DEVICE
17042399301SLogan Gunthorpe	#
17142399301SLogan Gunthorpe	# The need for the scatterlist DMA bus address flag means PCI P2PDMA
17242399301SLogan Gunthorpe	# requires 64bit
17342399301SLogan Gunthorpe	#
17442399301SLogan Gunthorpe	depends on 64BIT
17552916982SLogan Gunthorpe	select GENERIC_ALLOCATOR
176af2880ecSRobin Murphy	select NEED_SG_DMA_FLAGS
17752916982SLogan Gunthorpe	help
17843b0294aSLiu Song	  Enables drivers to do PCI peer-to-peer transactions to and from
17952916982SLogan Gunthorpe	  BARs that are exposed in other devices that are the part of
18052916982SLogan Gunthorpe	  the hierarchy where peer-to-peer DMA is guaranteed by the PCI
18152916982SLogan Gunthorpe	  specification to work (ie. anything below a single PCI bridge).
18252916982SLogan Gunthorpe
18352916982SLogan Gunthorpe	  Many PCIe root complexes do not support P2P transactions and
18452916982SLogan Gunthorpe	  it's hard to tell which support it at all, so at this time,
185d1bbf38aSBjorn Helgaas	  P2P DMA transactions must be between devices behind the same root
18652916982SLogan Gunthorpe	  port.
18752916982SLogan Gunthorpe
18852916982SLogan Gunthorpe	  If unsure, say N.
18952916982SLogan Gunthorpe
1908a226e00SRandy Dunlapconfig PCI_LABEL
1918a226e00SRandy Dunlap	def_bool y if (DMI || ACPI)
1928a226e00SRandy Dunlap	select NLS
19345361a4fSThomas Petazzoni
1944daace0dSJake Oshinsconfig PCI_HYPERV
1954daace0dSJake Oshins	tristate "Hyper-V PCI Frontend"
196a474d3fbSThomas Gleixner	depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI && SYSFS
197348dd93eSHaiyang Zhang	select PCI_HYPERV_INTERFACE
1984daace0dSJake Oshins	help
1994daace0dSJake Oshins	  The PCI device frontend driver allows the kernel to import arbitrary
2004daace0dSJake Oshins	  PCI devices from a PCI backend to support PCI driver domains.
2014daace0dSJake Oshins
202407d1a51SLizhi Houconfig PCI_DYNAMIC_OF_NODES
203407d1a51SLizhi Hou	bool "Create Device tree nodes for PCI devices"
20426641b3fSLizhi Hou	depends on OF_IRQ
205407d1a51SLizhi Hou	select OF_DYNAMIC
206407d1a51SLizhi Hou	help
207407d1a51SLizhi Hou	  This option enables support for generating device tree nodes for some
208407d1a51SLizhi Hou	  PCI devices. Thus, the driver of this kind can load and overlay
209407d1a51SLizhi Hou	  flattened device tree for its downstream devices.
210407d1a51SLizhi Hou
211407d1a51SLizhi Hou	  Once this option is selected, the device tree nodes will be generated
212407d1a51SLizhi Hou	  for all PCI bridges.
213407d1a51SLizhi Hou
214b0e85c3cSJim Quinlanchoice
215b0e85c3cSJim Quinlan	prompt "PCI Express hierarchy optimization setting"
216b0e85c3cSJim Quinlan	default PCIE_BUS_DEFAULT
217b0e85c3cSJim Quinlan	depends on PCI && EXPERT
218b0e85c3cSJim Quinlan	help
219b0e85c3cSJim Quinlan	  MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe
220b0e85c3cSJim Quinlan	  device parameters that affect performance and the ability to
221b0e85c3cSJim Quinlan	  support hotplug and peer-to-peer DMA.
222b0e85c3cSJim Quinlan
223b0e85c3cSJim Quinlan	  The following choices set the MPS and MRRS optimization strategy
224b0e85c3cSJim Quinlan	  at compile-time.  The choices are the same as those offered for
225b0e85c3cSJim Quinlan	  the kernel command-line parameter 'pci', i.e.,
226b0e85c3cSJim Quinlan	  'pci=pcie_bus_tune_off', 'pci=pcie_bus_safe',
227b0e85c3cSJim Quinlan	  'pci=pcie_bus_perf', and 'pci=pcie_bus_peer2peer'.
228b0e85c3cSJim Quinlan
229b0e85c3cSJim Quinlan	  This is a compile-time setting and can be overridden by the above
230b0e85c3cSJim Quinlan	  command-line parameters.  If unsure, choose PCIE_BUS_DEFAULT.
231b0e85c3cSJim Quinlan
232b0e85c3cSJim Quinlanconfig PCIE_BUS_TUNE_OFF
233b0e85c3cSJim Quinlan	bool "Tune Off"
234b0e85c3cSJim Quinlan	depends on PCI
235b0e85c3cSJim Quinlan	help
236b0e85c3cSJim Quinlan	  Use the BIOS defaults; don't touch MPS at all.  This is the same
237b0e85c3cSJim Quinlan	  as booting with 'pci=pcie_bus_tune_off'.
238b0e85c3cSJim Quinlan
239b0e85c3cSJim Quinlanconfig PCIE_BUS_DEFAULT
240b0e85c3cSJim Quinlan	bool "Default"
241b0e85c3cSJim Quinlan	depends on PCI
242b0e85c3cSJim Quinlan	help
243b0e85c3cSJim Quinlan	  Default choice; ensure that the MPS matches upstream bridge.
244b0e85c3cSJim Quinlan
245b0e85c3cSJim Quinlanconfig PCIE_BUS_SAFE
246b0e85c3cSJim Quinlan	bool "Safe"
247b0e85c3cSJim Quinlan	depends on PCI
248b0e85c3cSJim Quinlan	help
249b0e85c3cSJim Quinlan	  Use largest MPS that boot-time devices support.  If you have a
250b0e85c3cSJim Quinlan	  closed system with no possibility of adding new devices, this
251b0e85c3cSJim Quinlan	  will use the largest MPS that's supported by all devices.  This
252b0e85c3cSJim Quinlan	  is the same as booting with 'pci=pcie_bus_safe'.
253b0e85c3cSJim Quinlan
254b0e85c3cSJim Quinlanconfig PCIE_BUS_PERFORMANCE
255b0e85c3cSJim Quinlan	bool "Performance"
256b0e85c3cSJim Quinlan	depends on PCI
257b0e85c3cSJim Quinlan	help
258b0e85c3cSJim Quinlan	  Use MPS and MRRS for best performance.  Ensure that a given
259b0e85c3cSJim Quinlan	  device's MPS is no larger than its parent MPS, which allows us to
260b0e85c3cSJim Quinlan	  keep all switches/bridges to the max MPS supported by their
261b0e85c3cSJim Quinlan	  parent.  This is the same as booting with 'pci=pcie_bus_perf'.
262b0e85c3cSJim Quinlan
263b0e85c3cSJim Quinlanconfig PCIE_BUS_PEER2PEER
264b0e85c3cSJim Quinlan	bool "Peer2peer"
265b0e85c3cSJim Quinlan	depends on PCI
266b0e85c3cSJim Quinlan	help
267b0e85c3cSJim Quinlan	  Set MPS = 128 for all devices.  MPS configuration effected by the
268b0e85c3cSJim Quinlan	  other options could cause the MPS on one root port to be
269b0e85c3cSJim Quinlan	  different than that of the MPS on another, which may cause
270b0e85c3cSJim Quinlan	  hot-added devices or peer-to-peer DMA to fail.  Set MPS to the
271b0e85c3cSJim Quinlan	  smallest possible value (128B) system-wide to avoid these issues.
272b0e85c3cSJim Quinlan	  This is the same as booting with 'pci=pcie_bus_peer2peer'.
273b0e85c3cSJim Quinlan
274b0e85c3cSJim Quinlanendchoice
275b0e85c3cSJim Quinlan
2761d38fe6eSBjorn Helgaasconfig VGA_ARB
2771d38fe6eSBjorn Helgaas	bool "VGA Arbitration" if EXPERT
2781d38fe6eSBjorn Helgaas	default y
2791d38fe6eSBjorn Helgaas	depends on (PCI && !S390)
2801d38fe6eSBjorn Helgaas	help
2811d38fe6eSBjorn Helgaas	  Some "legacy" VGA devices implemented on PCI typically have the same
2821d38fe6eSBjorn Helgaas	  hard-decoded addresses as they did on ISA. When multiple PCI devices
2831d38fe6eSBjorn Helgaas	  are accessed at same time they need some kind of coordination. Please
2841d38fe6eSBjorn Helgaas	  see Documentation/gpu/vgaarbiter.rst for more details. Select this to
2851d38fe6eSBjorn Helgaas	  enable VGA arbiter.
2861d38fe6eSBjorn Helgaas
2871d38fe6eSBjorn Helgaasconfig VGA_ARB_MAX_GPUS
2881d38fe6eSBjorn Helgaas	int "Maximum number of GPUs"
2891d38fe6eSBjorn Helgaas	default 16
2901d38fe6eSBjorn Helgaas	depends on VGA_ARB
2911d38fe6eSBjorn Helgaas	help
2921d38fe6eSBjorn Helgaas	  Reserves space in the kernel to maintain resource locking for
2931d38fe6eSBjorn Helgaas	  multiple GPUS.  The overhead for each GPU is very small.
2941d38fe6eSBjorn Helgaas
29530b5b880STero Roponensource "drivers/pci/hotplug/Kconfig"
2966e0832faSShawn Linsource "drivers/pci/controller/Kconfig"
2975e8cb403SKishon Vijay Abraham Isource "drivers/pci/endpoint/Kconfig"
298080b47deSLogan Gunthorpesource "drivers/pci/switch/Kconfig"
2992e8cb2cfSRob Herring
3002e8cb2cfSRob Herringendif
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