17328c8f4SBjorn Helgaas# SPDX-License-Identifier: GPL-2.0 21da177e4SLinus Torvalds# 31da177e4SLinus Torvalds# PCI configuration 41da177e4SLinus Torvalds# 55f8fc432SBogicevic Sasa 6eb01d42aSChristoph Hellwig# select this to offer the PCI prompt 7eb01d42aSChristoph Hellwigconfig HAVE_PCI 8eb01d42aSChristoph Hellwig bool 9eb01d42aSChristoph Hellwig 10eb01d42aSChristoph Hellwig# select this to unconditionally force on PCI support 11eb01d42aSChristoph Hellwigconfig FORCE_PCI 12eb01d42aSChristoph Hellwig bool 13eb01d42aSChristoph Hellwig select HAVE_PCI 14eb01d42aSChristoph Hellwig select PCI 15eb01d42aSChristoph Hellwig 16eb01d42aSChristoph Hellwigmenuconfig PCI 17eb01d42aSChristoph Hellwig bool "PCI support" 18eb01d42aSChristoph Hellwig depends on HAVE_PCI 19eb01d42aSChristoph Hellwig help 20eb01d42aSChristoph Hellwig This option enables support for the PCI local bus, including 21eb01d42aSChristoph Hellwig support for PCI-X and the foundations for PCI Express support. 22eb01d42aSChristoph Hellwig Say 'Y' here unless you know what you are doing. 23eb01d42aSChristoph Hellwig 242e8cb2cfSRob Herringif PCI 252e8cb2cfSRob Herring 262eac9c2dSChristoph Hellwigconfig PCI_DOMAINS 272eac9c2dSChristoph Hellwig bool 282eac9c2dSChristoph Hellwig depends on PCI 292eac9c2dSChristoph Hellwig 302eac9c2dSChristoph Hellwigconfig PCI_DOMAINS_GENERIC 312eac9c2dSChristoph Hellwig bool 322eac9c2dSChristoph Hellwig select PCI_DOMAINS 332eac9c2dSChristoph Hellwig 3420f1b79dSChristoph Hellwigconfig PCI_SYSCALL 3520f1b79dSChristoph Hellwig bool 3620f1b79dSChristoph Hellwig 375f8fc432SBogicevic Sasasource "drivers/pci/pcie/Kconfig" 385f8fc432SBogicevic Sasa 391da177e4SLinus Torvaldsconfig PCI_MSI 401da177e4SLinus Torvalds bool "Message Signaled Interrupts (MSI and MSI-X)" 4138b6a1cfSJiang Liu select GENERIC_MSI_IRQ 421da177e4SLinus Torvalds help 431da177e4SLinus Torvalds This allows device drivers to enable MSI (Message Signaled 441da177e4SLinus Torvalds Interrupts). Message Signaled Interrupts enable a device to 451da177e4SLinus Torvalds generate an interrupt using an inbound Memory Write on its 461da177e4SLinus Torvalds PCI bus instead of asserting a device IRQ pin. 471da177e4SLinus Torvalds 48309e57dfSMatthew Wilcox Use of PCI MSI interrupts can be disabled at kernel boot time 49309e57dfSMatthew Wilcox by using the 'pci=nomsi' option. This disables MSI for the 50309e57dfSMatthew Wilcox entire system. 51309e57dfSMatthew Wilcox 523196180aSJesse Barnes If you don't know what to do here, say Y. 531da177e4SLinus Torvalds 54077ee78eSThomas Gleixnerconfig PCI_MSI_ARCH_FALLBACKS 55077ee78eSThomas Gleixner bool 56077ee78eSThomas Gleixner 5703ea2263SRandy Dunlapconfig PCI_QUIRKS 5803ea2263SRandy Dunlap default y 5903ea2263SRandy Dunlap bool "Enable PCI quirk workarounds" if EXPERT 6003ea2263SRandy Dunlap help 6103ea2263SRandy Dunlap This enables workarounds for various PCI chipset bugs/quirks. 6203ea2263SRandy Dunlap Disable this only if your target machine is unaffected by PCI 6303ea2263SRandy Dunlap quirks. 6403ea2263SRandy Dunlap 651da177e4SLinus Torvaldsconfig PCI_DEBUG 661da177e4SLinus Torvalds bool "PCI Debugging" 672e8cb2cfSRob Herring depends on DEBUG_KERNEL 681da177e4SLinus Torvalds help 691da177e4SLinus Torvalds Say Y here if you want the PCI core to produce a bunch of debug 701da177e4SLinus Torvalds messages to the system log. Select this if you are having a 711da177e4SLinus Torvalds problem with PCI support and want to see more of what is going on. 721da177e4SLinus Torvalds 731da177e4SLinus Torvalds When in doubt, say N. 741da177e4SLinus Torvalds 75b07f2ebcSYinghai Luconfig PCI_REALLOC_ENABLE_AUTO 76b07f2ebcSYinghai Lu bool "Enable PCI resource re-allocation detection" 77ad581f86SSascha El-Sharkawy depends on PCI_IOV 78b07f2ebcSYinghai Lu help 79b07f2ebcSYinghai Lu Say Y here if you want the PCI core to detect if PCI resource 80b07f2ebcSYinghai Lu re-allocation needs to be enabled. You can always use pci=realloc=on 81ad581f86SSascha El-Sharkawy or pci=realloc=off to override it. It will automatically 82ad581f86SSascha El-Sharkawy re-allocate PCI resources if SR-IOV BARs have not been allocated by 83ad581f86SSascha El-Sharkawy the BIOS. 84b07f2ebcSYinghai Lu 85b07f2ebcSYinghai Lu When in doubt, say N. 86b07f2ebcSYinghai Lu 87c70e0d9dSChris Wrightconfig PCI_STUB 88c70e0d9dSChris Wright tristate "PCI Stub driver" 89c70e0d9dSChris Wright help 90c70e0d9dSChris Wright Say Y or M here if you want be able to reserve a PCI device 91c70e0d9dSChris Wright when it is going to be assigned to a guest operating system. 92c70e0d9dSChris Wright 93c70e0d9dSChris Wright When in doubt, say N. 94c70e0d9dSChris Wright 95a8ccf8a6SAlexander Duyckconfig PCI_PF_STUB 96a8ccf8a6SAlexander Duyck tristate "PCI PF Stub driver" 97a8ccf8a6SAlexander Duyck depends on PCI_IOV 98a8ccf8a6SAlexander Duyck help 99a8ccf8a6SAlexander Duyck Say Y or M here if you want to enable support for devices that 1004a57f58fSRandy Dunlap require SR-IOV support, while at the same time the PF (Physical 1014a57f58fSRandy Dunlap Function) itself is not providing any actual services on the 1024a57f58fSRandy Dunlap host itself such as storage or networking. 103a8ccf8a6SAlexander Duyck 104a8ccf8a6SAlexander Duyck When in doubt, say N. 105a8ccf8a6SAlexander Duyck 106956a9202SRyan Wilsonconfig XEN_PCIDEV_FRONTEND 107956a9202SRyan Wilson tristate "Xen PCI Frontend" 108e243ae95SJan Beulich depends on XEN_PV 109956a9202SRyan Wilson select PCI_XEN 110fce263c1SKonrad Rzeszutek Wilk select XEN_XENBUS_FRONTEND 111956a9202SRyan Wilson default y 112956a9202SRyan Wilson help 113956a9202SRyan Wilson The PCI device frontend driver allows the kernel to import arbitrary 114956a9202SRyan Wilson PCI devices from a PCI backend to support PCI driver domains. 115956a9202SRyan Wilson 116db3c33c6SJoerg Roedelconfig PCI_ATS 117db3c33c6SJoerg Roedel bool 118db3c33c6SJoerg Roedel 1199d24322eSJonathan Cameronconfig PCI_DOE 1209d24322eSJonathan Cameron bool 1219d24322eSJonathan Cameron 12235ff9477SJayachandran Cconfig PCI_ECAM 12335ff9477SJayachandran C bool 12435ff9477SJayachandran C 125714fe383SThomas Gleixnerconfig PCI_LOCKLESS_CONFIG 126714fe383SThomas Gleixner bool 127714fe383SThomas Gleixner 12823a5fba4SThomas Petazzoniconfig PCI_BRIDGE_EMUL 12923a5fba4SThomas Petazzoni bool 13023a5fba4SThomas Petazzoni 131d1b054daSYu Zhaoconfig PCI_IOV 132d1b054daSYu Zhao bool "PCI IOV support" 133db3c33c6SJoerg Roedel select PCI_ATS 134d1b054daSYu Zhao help 135d1b054daSYu Zhao I/O Virtualization is a PCI feature supported by some devices 136d1b054daSYu Zhao which allows them to create virtual devices which share their 137d1b054daSYu Zhao physical resources. 138d1b054daSYu Zhao 139d1b054daSYu Zhao If unsure, say N. 140204d49a5SBjorn Helgaas 141c320b976SJoerg Roedelconfig PCI_PRI 142c320b976SJoerg Roedel bool "PCI PRI support" 143c320b976SJoerg Roedel select PCI_ATS 144c320b976SJoerg Roedel help 145c320b976SJoerg Roedel PRI is the PCI Page Request Interface. It allows PCI devices that are 146c320b976SJoerg Roedel behind an IOMMU to recover from page faults. 147c320b976SJoerg Roedel 148c320b976SJoerg Roedel If unsure, say N. 149c320b976SJoerg Roedel 150086ac11fSJoerg Roedelconfig PCI_PASID 151086ac11fSJoerg Roedel bool "PCI PASID support" 152086ac11fSJoerg Roedel select PCI_ATS 153086ac11fSJoerg Roedel help 154086ac11fSJoerg Roedel Process Address Space Identifiers (PASIDs) can be used by PCI devices 155086ac11fSJoerg Roedel to access more than one IO address space at the same time. To make 156086ac11fSJoerg Roedel use of this feature an IOMMU is required which also supports PASIDs. 157086ac11fSJoerg Roedel Select this option if you have such an IOMMU and want to compile the 158086ac11fSJoerg Roedel driver for it into your kernel. 159086ac11fSJoerg Roedel 160086ac11fSJoerg Roedel If unsure, say N. 161086ac11fSJoerg Roedel 16252916982SLogan Gunthorpeconfig PCI_P2PDMA 16352916982SLogan Gunthorpe bool "PCI peer-to-peer transfer support" 1642e8cb2cfSRob Herring depends on ZONE_DEVICE 16542399301SLogan Gunthorpe # 16642399301SLogan Gunthorpe # The need for the scatterlist DMA bus address flag means PCI P2PDMA 16742399301SLogan Gunthorpe # requires 64bit 16842399301SLogan Gunthorpe # 16942399301SLogan Gunthorpe depends on 64BIT 17052916982SLogan Gunthorpe select GENERIC_ALLOCATOR 171af2880ecSRobin Murphy select NEED_SG_DMA_FLAGS 17252916982SLogan Gunthorpe help 17352916982SLogan Gunthorpe Enableѕ drivers to do PCI peer-to-peer transactions to and from 17452916982SLogan Gunthorpe BARs that are exposed in other devices that are the part of 17552916982SLogan Gunthorpe the hierarchy where peer-to-peer DMA is guaranteed by the PCI 17652916982SLogan Gunthorpe specification to work (ie. anything below a single PCI bridge). 17752916982SLogan Gunthorpe 17852916982SLogan Gunthorpe Many PCIe root complexes do not support P2P transactions and 17952916982SLogan Gunthorpe it's hard to tell which support it at all, so at this time, 180d1bbf38aSBjorn Helgaas P2P DMA transactions must be between devices behind the same root 18152916982SLogan Gunthorpe port. 18252916982SLogan Gunthorpe 18352916982SLogan Gunthorpe If unsure, say N. 18452916982SLogan Gunthorpe 1858a226e00SRandy Dunlapconfig PCI_LABEL 1868a226e00SRandy Dunlap def_bool y if (DMI || ACPI) 1878a226e00SRandy Dunlap select NLS 18845361a4fSThomas Petazzoni 1894daace0dSJake Oshinsconfig PCI_HYPERV 1904daace0dSJake Oshins tristate "Hyper-V PCI Frontend" 191a474d3fbSThomas Gleixner depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI && SYSFS 192348dd93eSHaiyang Zhang select PCI_HYPERV_INTERFACE 1934daace0dSJake Oshins help 1944daace0dSJake Oshins The PCI device frontend driver allows the kernel to import arbitrary 1954daace0dSJake Oshins PCI devices from a PCI backend to support PCI driver domains. 1964daace0dSJake Oshins 197407d1a51SLizhi Houconfig PCI_DYNAMIC_OF_NODES 198407d1a51SLizhi Hou bool "Create Device tree nodes for PCI devices" 199*26641b3fSLizhi Hou depends on OF_IRQ 200407d1a51SLizhi Hou select OF_DYNAMIC 201407d1a51SLizhi Hou help 202407d1a51SLizhi Hou This option enables support for generating device tree nodes for some 203407d1a51SLizhi Hou PCI devices. Thus, the driver of this kind can load and overlay 204407d1a51SLizhi Hou flattened device tree for its downstream devices. 205407d1a51SLizhi Hou 206407d1a51SLizhi Hou Once this option is selected, the device tree nodes will be generated 207407d1a51SLizhi Hou for all PCI bridges. 208407d1a51SLizhi Hou 209b0e85c3cSJim Quinlanchoice 210b0e85c3cSJim Quinlan prompt "PCI Express hierarchy optimization setting" 211b0e85c3cSJim Quinlan default PCIE_BUS_DEFAULT 212b0e85c3cSJim Quinlan depends on PCI && EXPERT 213b0e85c3cSJim Quinlan help 214b0e85c3cSJim Quinlan MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe 215b0e85c3cSJim Quinlan device parameters that affect performance and the ability to 216b0e85c3cSJim Quinlan support hotplug and peer-to-peer DMA. 217b0e85c3cSJim Quinlan 218b0e85c3cSJim Quinlan The following choices set the MPS and MRRS optimization strategy 219b0e85c3cSJim Quinlan at compile-time. The choices are the same as those offered for 220b0e85c3cSJim Quinlan the kernel command-line parameter 'pci', i.e., 221b0e85c3cSJim Quinlan 'pci=pcie_bus_tune_off', 'pci=pcie_bus_safe', 222b0e85c3cSJim Quinlan 'pci=pcie_bus_perf', and 'pci=pcie_bus_peer2peer'. 223b0e85c3cSJim Quinlan 224b0e85c3cSJim Quinlan This is a compile-time setting and can be overridden by the above 225b0e85c3cSJim Quinlan command-line parameters. If unsure, choose PCIE_BUS_DEFAULT. 226b0e85c3cSJim Quinlan 227b0e85c3cSJim Quinlanconfig PCIE_BUS_TUNE_OFF 228b0e85c3cSJim Quinlan bool "Tune Off" 229b0e85c3cSJim Quinlan depends on PCI 230b0e85c3cSJim Quinlan help 231b0e85c3cSJim Quinlan Use the BIOS defaults; don't touch MPS at all. This is the same 232b0e85c3cSJim Quinlan as booting with 'pci=pcie_bus_tune_off'. 233b0e85c3cSJim Quinlan 234b0e85c3cSJim Quinlanconfig PCIE_BUS_DEFAULT 235b0e85c3cSJim Quinlan bool "Default" 236b0e85c3cSJim Quinlan depends on PCI 237b0e85c3cSJim Quinlan help 238b0e85c3cSJim Quinlan Default choice; ensure that the MPS matches upstream bridge. 239b0e85c3cSJim Quinlan 240b0e85c3cSJim Quinlanconfig PCIE_BUS_SAFE 241b0e85c3cSJim Quinlan bool "Safe" 242b0e85c3cSJim Quinlan depends on PCI 243b0e85c3cSJim Quinlan help 244b0e85c3cSJim Quinlan Use largest MPS that boot-time devices support. If you have a 245b0e85c3cSJim Quinlan closed system with no possibility of adding new devices, this 246b0e85c3cSJim Quinlan will use the largest MPS that's supported by all devices. This 247b0e85c3cSJim Quinlan is the same as booting with 'pci=pcie_bus_safe'. 248b0e85c3cSJim Quinlan 249b0e85c3cSJim Quinlanconfig PCIE_BUS_PERFORMANCE 250b0e85c3cSJim Quinlan bool "Performance" 251b0e85c3cSJim Quinlan depends on PCI 252b0e85c3cSJim Quinlan help 253b0e85c3cSJim Quinlan Use MPS and MRRS for best performance. Ensure that a given 254b0e85c3cSJim Quinlan device's MPS is no larger than its parent MPS, which allows us to 255b0e85c3cSJim Quinlan keep all switches/bridges to the max MPS supported by their 256b0e85c3cSJim Quinlan parent. This is the same as booting with 'pci=pcie_bus_perf'. 257b0e85c3cSJim Quinlan 258b0e85c3cSJim Quinlanconfig PCIE_BUS_PEER2PEER 259b0e85c3cSJim Quinlan bool "Peer2peer" 260b0e85c3cSJim Quinlan depends on PCI 261b0e85c3cSJim Quinlan help 262b0e85c3cSJim Quinlan Set MPS = 128 for all devices. MPS configuration effected by the 263b0e85c3cSJim Quinlan other options could cause the MPS on one root port to be 264b0e85c3cSJim Quinlan different than that of the MPS on another, which may cause 265b0e85c3cSJim Quinlan hot-added devices or peer-to-peer DMA to fail. Set MPS to the 266b0e85c3cSJim Quinlan smallest possible value (128B) system-wide to avoid these issues. 267b0e85c3cSJim Quinlan This is the same as booting with 'pci=pcie_bus_peer2peer'. 268b0e85c3cSJim Quinlan 269b0e85c3cSJim Quinlanendchoice 270b0e85c3cSJim Quinlan 2711d38fe6eSBjorn Helgaasconfig VGA_ARB 2721d38fe6eSBjorn Helgaas bool "VGA Arbitration" if EXPERT 2731d38fe6eSBjorn Helgaas default y 2741d38fe6eSBjorn Helgaas depends on (PCI && !S390) 2751d38fe6eSBjorn Helgaas help 2761d38fe6eSBjorn Helgaas Some "legacy" VGA devices implemented on PCI typically have the same 2771d38fe6eSBjorn Helgaas hard-decoded addresses as they did on ISA. When multiple PCI devices 2781d38fe6eSBjorn Helgaas are accessed at same time they need some kind of coordination. Please 2791d38fe6eSBjorn Helgaas see Documentation/gpu/vgaarbiter.rst for more details. Select this to 2801d38fe6eSBjorn Helgaas enable VGA arbiter. 2811d38fe6eSBjorn Helgaas 2821d38fe6eSBjorn Helgaasconfig VGA_ARB_MAX_GPUS 2831d38fe6eSBjorn Helgaas int "Maximum number of GPUs" 2841d38fe6eSBjorn Helgaas default 16 2851d38fe6eSBjorn Helgaas depends on VGA_ARB 2861d38fe6eSBjorn Helgaas help 2871d38fe6eSBjorn Helgaas Reserves space in the kernel to maintain resource locking for 2881d38fe6eSBjorn Helgaas multiple GPUS. The overhead for each GPU is very small. 2891d38fe6eSBjorn Helgaas 29030b5b880STero Roponensource "drivers/pci/hotplug/Kconfig" 2916e0832faSShawn Linsource "drivers/pci/controller/Kconfig" 2925e8cb403SKishon Vijay Abraham Isource "drivers/pci/endpoint/Kconfig" 293080b47deSLogan Gunthorpesource "drivers/pci/switch/Kconfig" 2942e8cb2cfSRob Herring 2952e8cb2cfSRob Herringendif 296