17328c8f4SBjorn Helgaas# SPDX-License-Identifier: GPL-2.0 21da177e4SLinus Torvalds# 31da177e4SLinus Torvalds# PCI configuration 41da177e4SLinus Torvalds# 55f8fc432SBogicevic Sasa 6eb01d42aSChristoph Hellwig# select this to offer the PCI prompt 7eb01d42aSChristoph Hellwigconfig HAVE_PCI 8eb01d42aSChristoph Hellwig bool 9eb01d42aSChristoph Hellwig 10eb01d42aSChristoph Hellwig# select this to unconditionally force on PCI support 11eb01d42aSChristoph Hellwigconfig FORCE_PCI 12eb01d42aSChristoph Hellwig bool 13eb01d42aSChristoph Hellwig select HAVE_PCI 14eb01d42aSChristoph Hellwig select PCI 15eb01d42aSChristoph Hellwig 16ae874027SPhilipp Stanner# select this to provide a generic PCI iomap, 17ae874027SPhilipp Stanner# without PCI itself having to be defined 18ae874027SPhilipp Stannerconfig GENERIC_PCI_IOMAP 19ae874027SPhilipp Stanner bool 20ae874027SPhilipp Stanner 21eb01d42aSChristoph Hellwigmenuconfig PCI 22eb01d42aSChristoph Hellwig bool "PCI support" 23eb01d42aSChristoph Hellwig depends on HAVE_PCI 24eb01d42aSChristoph Hellwig help 25eb01d42aSChristoph Hellwig This option enables support for the PCI local bus, including 26eb01d42aSChristoph Hellwig support for PCI-X and the foundations for PCI Express support. 27eb01d42aSChristoph Hellwig Say 'Y' here unless you know what you are doing. 28eb01d42aSChristoph Hellwig 292e8cb2cfSRob Herringif PCI 302e8cb2cfSRob Herring 312eac9c2dSChristoph Hellwigconfig PCI_DOMAINS 322eac9c2dSChristoph Hellwig bool 332eac9c2dSChristoph Hellwig depends on PCI 342eac9c2dSChristoph Hellwig 352eac9c2dSChristoph Hellwigconfig PCI_DOMAINS_GENERIC 362eac9c2dSChristoph Hellwig bool 372eac9c2dSChristoph Hellwig select PCI_DOMAINS 382eac9c2dSChristoph Hellwig 3920f1b79dSChristoph Hellwigconfig PCI_SYSCALL 4020f1b79dSChristoph Hellwig bool 4120f1b79dSChristoph Hellwig 425f8fc432SBogicevic Sasasource "drivers/pci/pcie/Kconfig" 435f8fc432SBogicevic Sasa 441da177e4SLinus Torvaldsconfig PCI_MSI 451da177e4SLinus Torvalds bool "Message Signaled Interrupts (MSI and MSI-X)" 4638b6a1cfSJiang Liu select GENERIC_MSI_IRQ 471da177e4SLinus Torvalds help 481da177e4SLinus Torvalds This allows device drivers to enable MSI (Message Signaled 491da177e4SLinus Torvalds Interrupts). Message Signaled Interrupts enable a device to 501da177e4SLinus Torvalds generate an interrupt using an inbound Memory Write on its 511da177e4SLinus Torvalds PCI bus instead of asserting a device IRQ pin. 521da177e4SLinus Torvalds 53309e57dfSMatthew Wilcox Use of PCI MSI interrupts can be disabled at kernel boot time 54309e57dfSMatthew Wilcox by using the 'pci=nomsi' option. This disables MSI for the 55309e57dfSMatthew Wilcox entire system. 56309e57dfSMatthew Wilcox 573196180aSJesse Barnes If you don't know what to do here, say Y. 581da177e4SLinus Torvalds 59077ee78eSThomas Gleixnerconfig PCI_MSI_ARCH_FALLBACKS 60077ee78eSThomas Gleixner bool 61077ee78eSThomas Gleixner 6203ea2263SRandy Dunlapconfig PCI_QUIRKS 6303ea2263SRandy Dunlap default y 6403ea2263SRandy Dunlap bool "Enable PCI quirk workarounds" if EXPERT 6503ea2263SRandy Dunlap help 6603ea2263SRandy Dunlap This enables workarounds for various PCI chipset bugs/quirks. 6703ea2263SRandy Dunlap Disable this only if your target machine is unaffected by PCI 6803ea2263SRandy Dunlap quirks. 6903ea2263SRandy Dunlap 701da177e4SLinus Torvaldsconfig PCI_DEBUG 711da177e4SLinus Torvalds bool "PCI Debugging" 722e8cb2cfSRob Herring depends on DEBUG_KERNEL 731da177e4SLinus Torvalds help 741da177e4SLinus Torvalds Say Y here if you want the PCI core to produce a bunch of debug 751da177e4SLinus Torvalds messages to the system log. Select this if you are having a 761da177e4SLinus Torvalds problem with PCI support and want to see more of what is going on. 771da177e4SLinus Torvalds 781da177e4SLinus Torvalds When in doubt, say N. 791da177e4SLinus Torvalds 80b07f2ebcSYinghai Luconfig PCI_REALLOC_ENABLE_AUTO 81b07f2ebcSYinghai Lu bool "Enable PCI resource re-allocation detection" 82ad581f86SSascha El-Sharkawy depends on PCI_IOV 83b07f2ebcSYinghai Lu help 84b07f2ebcSYinghai Lu Say Y here if you want the PCI core to detect if PCI resource 85b07f2ebcSYinghai Lu re-allocation needs to be enabled. You can always use pci=realloc=on 86ad581f86SSascha El-Sharkawy or pci=realloc=off to override it. It will automatically 87ad581f86SSascha El-Sharkawy re-allocate PCI resources if SR-IOV BARs have not been allocated by 88ad581f86SSascha El-Sharkawy the BIOS. 89b07f2ebcSYinghai Lu 90b07f2ebcSYinghai Lu When in doubt, say N. 91b07f2ebcSYinghai Lu 92c70e0d9dSChris Wrightconfig PCI_STUB 93c70e0d9dSChris Wright tristate "PCI Stub driver" 94c70e0d9dSChris Wright help 95c70e0d9dSChris Wright Say Y or M here if you want be able to reserve a PCI device 96c70e0d9dSChris Wright when it is going to be assigned to a guest operating system. 97c70e0d9dSChris Wright 98c70e0d9dSChris Wright When in doubt, say N. 99c70e0d9dSChris Wright 100a8ccf8a6SAlexander Duyckconfig PCI_PF_STUB 101a8ccf8a6SAlexander Duyck tristate "PCI PF Stub driver" 102a8ccf8a6SAlexander Duyck depends on PCI_IOV 103a8ccf8a6SAlexander Duyck help 104a8ccf8a6SAlexander Duyck Say Y or M here if you want to enable support for devices that 1054a57f58fSRandy Dunlap require SR-IOV support, while at the same time the PF (Physical 1064a57f58fSRandy Dunlap Function) itself is not providing any actual services on the 1074a57f58fSRandy Dunlap host itself such as storage or networking. 108a8ccf8a6SAlexander Duyck 109a8ccf8a6SAlexander Duyck When in doubt, say N. 110a8ccf8a6SAlexander Duyck 111956a9202SRyan Wilsonconfig XEN_PCIDEV_FRONTEND 112956a9202SRyan Wilson tristate "Xen PCI Frontend" 113e243ae95SJan Beulich depends on XEN_PV 114956a9202SRyan Wilson select PCI_XEN 115fce263c1SKonrad Rzeszutek Wilk select XEN_XENBUS_FRONTEND 116956a9202SRyan Wilson default y 117956a9202SRyan Wilson help 118956a9202SRyan Wilson The PCI device frontend driver allows the kernel to import arbitrary 119956a9202SRyan Wilson PCI devices from a PCI backend to support PCI driver domains. 120956a9202SRyan Wilson 121db3c33c6SJoerg Roedelconfig PCI_ATS 122db3c33c6SJoerg Roedel bool 123db3c33c6SJoerg Roedel 1249d24322eSJonathan Cameronconfig PCI_DOE 1259d24322eSJonathan Cameron bool 1269d24322eSJonathan Cameron 12735ff9477SJayachandran Cconfig PCI_ECAM 12835ff9477SJayachandran C bool 12935ff9477SJayachandran C 130714fe383SThomas Gleixnerconfig PCI_LOCKLESS_CONFIG 131714fe383SThomas Gleixner bool 132714fe383SThomas Gleixner 13323a5fba4SThomas Petazzoniconfig PCI_BRIDGE_EMUL 13423a5fba4SThomas Petazzoni bool 13523a5fba4SThomas Petazzoni 136d1b054daSYu Zhaoconfig PCI_IOV 137d1b054daSYu Zhao bool "PCI IOV support" 138db3c33c6SJoerg Roedel select PCI_ATS 139d1b054daSYu Zhao help 140d1b054daSYu Zhao I/O Virtualization is a PCI feature supported by some devices 141d1b054daSYu Zhao which allows them to create virtual devices which share their 142d1b054daSYu Zhao physical resources. 143d1b054daSYu Zhao 144d1b054daSYu Zhao If unsure, say N. 145204d49a5SBjorn Helgaas 146*4e893545SMariusz Tkaczykconfig PCI_NPEM 147*4e893545SMariusz Tkaczyk bool "Native PCIe Enclosure Management" 148*4e893545SMariusz Tkaczyk depends on LEDS_CLASS=y 149*4e893545SMariusz Tkaczyk help 150*4e893545SMariusz Tkaczyk Support for Native PCIe Enclosure Management. It allows managing LED 151*4e893545SMariusz Tkaczyk indications in storage enclosures. Enclosure must support following 152*4e893545SMariusz Tkaczyk indications: OK, Locate, Fail, Rebuild, other indications are 153*4e893545SMariusz Tkaczyk optional. 154*4e893545SMariusz Tkaczyk 155c320b976SJoerg Roedelconfig PCI_PRI 156c320b976SJoerg Roedel bool "PCI PRI support" 157c320b976SJoerg Roedel select PCI_ATS 158c320b976SJoerg Roedel help 159c320b976SJoerg Roedel PRI is the PCI Page Request Interface. It allows PCI devices that are 160c320b976SJoerg Roedel behind an IOMMU to recover from page faults. 161c320b976SJoerg Roedel 162c320b976SJoerg Roedel If unsure, say N. 163c320b976SJoerg Roedel 164086ac11fSJoerg Roedelconfig PCI_PASID 165086ac11fSJoerg Roedel bool "PCI PASID support" 166086ac11fSJoerg Roedel select PCI_ATS 167086ac11fSJoerg Roedel help 168086ac11fSJoerg Roedel Process Address Space Identifiers (PASIDs) can be used by PCI devices 169086ac11fSJoerg Roedel to access more than one IO address space at the same time. To make 170086ac11fSJoerg Roedel use of this feature an IOMMU is required which also supports PASIDs. 171086ac11fSJoerg Roedel Select this option if you have such an IOMMU and want to compile the 172086ac11fSJoerg Roedel driver for it into your kernel. 173086ac11fSJoerg Roedel 174086ac11fSJoerg Roedel If unsure, say N. 175086ac11fSJoerg Roedel 17652916982SLogan Gunthorpeconfig PCI_P2PDMA 17752916982SLogan Gunthorpe bool "PCI peer-to-peer transfer support" 1782e8cb2cfSRob Herring depends on ZONE_DEVICE 17942399301SLogan Gunthorpe # 18042399301SLogan Gunthorpe # The need for the scatterlist DMA bus address flag means PCI P2PDMA 18142399301SLogan Gunthorpe # requires 64bit 18242399301SLogan Gunthorpe # 18342399301SLogan Gunthorpe depends on 64BIT 18452916982SLogan Gunthorpe select GENERIC_ALLOCATOR 185af2880ecSRobin Murphy select NEED_SG_DMA_FLAGS 18652916982SLogan Gunthorpe help 18743b0294aSLiu Song Enables drivers to do PCI peer-to-peer transactions to and from 18852916982SLogan Gunthorpe BARs that are exposed in other devices that are the part of 18952916982SLogan Gunthorpe the hierarchy where peer-to-peer DMA is guaranteed by the PCI 19052916982SLogan Gunthorpe specification to work (ie. anything below a single PCI bridge). 19152916982SLogan Gunthorpe 19252916982SLogan Gunthorpe Many PCIe root complexes do not support P2P transactions and 19352916982SLogan Gunthorpe it's hard to tell which support it at all, so at this time, 194d1bbf38aSBjorn Helgaas P2P DMA transactions must be between devices behind the same root 19552916982SLogan Gunthorpe port. 19652916982SLogan Gunthorpe 19752916982SLogan Gunthorpe If unsure, say N. 19852916982SLogan Gunthorpe 1998a226e00SRandy Dunlapconfig PCI_LABEL 2008a226e00SRandy Dunlap def_bool y if (DMI || ACPI) 2018a226e00SRandy Dunlap select NLS 20245361a4fSThomas Petazzoni 2034daace0dSJake Oshinsconfig PCI_HYPERV 2044daace0dSJake Oshins tristate "Hyper-V PCI Frontend" 205a474d3fbSThomas Gleixner depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI && SYSFS 206348dd93eSHaiyang Zhang select PCI_HYPERV_INTERFACE 2074daace0dSJake Oshins help 2084daace0dSJake Oshins The PCI device frontend driver allows the kernel to import arbitrary 2094daace0dSJake Oshins PCI devices from a PCI backend to support PCI driver domains. 2104daace0dSJake Oshins 211407d1a51SLizhi Houconfig PCI_DYNAMIC_OF_NODES 212407d1a51SLizhi Hou bool "Create Device tree nodes for PCI devices" 21326641b3fSLizhi Hou depends on OF_IRQ 214407d1a51SLizhi Hou select OF_DYNAMIC 215407d1a51SLizhi Hou help 216407d1a51SLizhi Hou This option enables support for generating device tree nodes for some 217407d1a51SLizhi Hou PCI devices. Thus, the driver of this kind can load and overlay 218407d1a51SLizhi Hou flattened device tree for its downstream devices. 219407d1a51SLizhi Hou 220407d1a51SLizhi Hou Once this option is selected, the device tree nodes will be generated 221407d1a51SLizhi Hou for all PCI bridges. 222407d1a51SLizhi Hou 223b0e85c3cSJim Quinlanchoice 224b0e85c3cSJim Quinlan prompt "PCI Express hierarchy optimization setting" 225b0e85c3cSJim Quinlan default PCIE_BUS_DEFAULT 226b0e85c3cSJim Quinlan depends on PCI && EXPERT 227b0e85c3cSJim Quinlan help 228b0e85c3cSJim Quinlan MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe 229b0e85c3cSJim Quinlan device parameters that affect performance and the ability to 230b0e85c3cSJim Quinlan support hotplug and peer-to-peer DMA. 231b0e85c3cSJim Quinlan 232b0e85c3cSJim Quinlan The following choices set the MPS and MRRS optimization strategy 233b0e85c3cSJim Quinlan at compile-time. The choices are the same as those offered for 234b0e85c3cSJim Quinlan the kernel command-line parameter 'pci', i.e., 235b0e85c3cSJim Quinlan 'pci=pcie_bus_tune_off', 'pci=pcie_bus_safe', 236b0e85c3cSJim Quinlan 'pci=pcie_bus_perf', and 'pci=pcie_bus_peer2peer'. 237b0e85c3cSJim Quinlan 238b0e85c3cSJim Quinlan This is a compile-time setting and can be overridden by the above 239b0e85c3cSJim Quinlan command-line parameters. If unsure, choose PCIE_BUS_DEFAULT. 240b0e85c3cSJim Quinlan 241b0e85c3cSJim Quinlanconfig PCIE_BUS_TUNE_OFF 242b0e85c3cSJim Quinlan bool "Tune Off" 243b0e85c3cSJim Quinlan depends on PCI 244b0e85c3cSJim Quinlan help 245b0e85c3cSJim Quinlan Use the BIOS defaults; don't touch MPS at all. This is the same 246b0e85c3cSJim Quinlan as booting with 'pci=pcie_bus_tune_off'. 247b0e85c3cSJim Quinlan 248b0e85c3cSJim Quinlanconfig PCIE_BUS_DEFAULT 249b0e85c3cSJim Quinlan bool "Default" 250b0e85c3cSJim Quinlan depends on PCI 251b0e85c3cSJim Quinlan help 252b0e85c3cSJim Quinlan Default choice; ensure that the MPS matches upstream bridge. 253b0e85c3cSJim Quinlan 254b0e85c3cSJim Quinlanconfig PCIE_BUS_SAFE 255b0e85c3cSJim Quinlan bool "Safe" 256b0e85c3cSJim Quinlan depends on PCI 257b0e85c3cSJim Quinlan help 258b0e85c3cSJim Quinlan Use largest MPS that boot-time devices support. If you have a 259b0e85c3cSJim Quinlan closed system with no possibility of adding new devices, this 260b0e85c3cSJim Quinlan will use the largest MPS that's supported by all devices. This 261b0e85c3cSJim Quinlan is the same as booting with 'pci=pcie_bus_safe'. 262b0e85c3cSJim Quinlan 263b0e85c3cSJim Quinlanconfig PCIE_BUS_PERFORMANCE 264b0e85c3cSJim Quinlan bool "Performance" 265b0e85c3cSJim Quinlan depends on PCI 266b0e85c3cSJim Quinlan help 267b0e85c3cSJim Quinlan Use MPS and MRRS for best performance. Ensure that a given 268b0e85c3cSJim Quinlan device's MPS is no larger than its parent MPS, which allows us to 269b0e85c3cSJim Quinlan keep all switches/bridges to the max MPS supported by their 270b0e85c3cSJim Quinlan parent. This is the same as booting with 'pci=pcie_bus_perf'. 271b0e85c3cSJim Quinlan 272b0e85c3cSJim Quinlanconfig PCIE_BUS_PEER2PEER 273b0e85c3cSJim Quinlan bool "Peer2peer" 274b0e85c3cSJim Quinlan depends on PCI 275b0e85c3cSJim Quinlan help 276b0e85c3cSJim Quinlan Set MPS = 128 for all devices. MPS configuration effected by the 277b0e85c3cSJim Quinlan other options could cause the MPS on one root port to be 278b0e85c3cSJim Quinlan different than that of the MPS on another, which may cause 279b0e85c3cSJim Quinlan hot-added devices or peer-to-peer DMA to fail. Set MPS to the 280b0e85c3cSJim Quinlan smallest possible value (128B) system-wide to avoid these issues. 281b0e85c3cSJim Quinlan This is the same as booting with 'pci=pcie_bus_peer2peer'. 282b0e85c3cSJim Quinlan 283b0e85c3cSJim Quinlanendchoice 284b0e85c3cSJim Quinlan 2851d38fe6eSBjorn Helgaasconfig VGA_ARB 2861d38fe6eSBjorn Helgaas bool "VGA Arbitration" if EXPERT 2871d38fe6eSBjorn Helgaas default y 2881d38fe6eSBjorn Helgaas depends on (PCI && !S390) 2891d38fe6eSBjorn Helgaas help 2901d38fe6eSBjorn Helgaas Some "legacy" VGA devices implemented on PCI typically have the same 2911d38fe6eSBjorn Helgaas hard-decoded addresses as they did on ISA. When multiple PCI devices 2921d38fe6eSBjorn Helgaas are accessed at same time they need some kind of coordination. Please 2931d38fe6eSBjorn Helgaas see Documentation/gpu/vgaarbiter.rst for more details. Select this to 2941d38fe6eSBjorn Helgaas enable VGA arbiter. 2951d38fe6eSBjorn Helgaas 2961d38fe6eSBjorn Helgaasconfig VGA_ARB_MAX_GPUS 2971d38fe6eSBjorn Helgaas int "Maximum number of GPUs" 2981d38fe6eSBjorn Helgaas default 16 2991d38fe6eSBjorn Helgaas depends on VGA_ARB 3001d38fe6eSBjorn Helgaas help 3011d38fe6eSBjorn Helgaas Reserves space in the kernel to maintain resource locking for 3021d38fe6eSBjorn Helgaas multiple GPUS. The overhead for each GPU is very small. 3031d38fe6eSBjorn Helgaas 30430b5b880STero Roponensource "drivers/pci/hotplug/Kconfig" 3056e0832faSShawn Linsource "drivers/pci/controller/Kconfig" 3065e8cb403SKishon Vijay Abraham Isource "drivers/pci/endpoint/Kconfig" 307080b47deSLogan Gunthorpesource "drivers/pci/switch/Kconfig" 3084565d265SBartosz Golaszewskisource "drivers/pci/pwrctl/Kconfig" 3092e8cb2cfSRob Herring 3102e8cb2cfSRob Herringendif 311