1 /* National Semiconductor NS87560UBD Super I/O controller used in 2 * HP [BCJ]x000 workstations. 3 * 4 * This chip is a horrid piece of engineering, and National 5 * denies any knowledge of its existence. Thus no datasheet is 6 * available off www.national.com. 7 * 8 * (C) Copyright 2000 Linuxcare, Inc. 9 * (C) Copyright 2000 Linuxcare Canada, Inc. 10 * (C) Copyright 2000 Martin K. Petersen <mkp@linuxcare.com> 11 * (C) Copyright 2000 Alex deVries <alex@onefishtwo.ca> 12 * (C) Copyright 2001 John Marvin <jsm fc hp com> 13 * (C) Copyright 2003 Grant Grundler <grundler parisc-linux org> 14 * (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org> 15 * 16 * This program is free software; you can redistribute it and/or 17 * modify it under the terms of the GNU General Public License as 18 * published by the Free Software Foundation; either version 2 of 19 * the License, or (at your option) any later version. 20 * 21 * The initial version of this is by Martin Peterson. Alex deVries 22 * has spent a bit of time trying to coax it into working. 23 * 24 * Major changes to get basic interrupt infrastructure working to 25 * hopefully be able to support all SuperIO devices. Currently 26 * works with serial. -- John Marvin <jsm@fc.hp.com> 27 */ 28 29 30 /* NOTES: 31 * 32 * Function 0 is an IDE controller. It is identical to a PC87415 IDE 33 * controller (and identifies itself as such). 34 * 35 * Function 1 is a "Legacy I/O" controller. Under this function is a 36 * whole mess of legacy I/O peripherals. Of course, HP hasn't enabled 37 * all the functionality in hardware, but the following is available: 38 * 39 * Two 16550A compatible serial controllers 40 * An IEEE 1284 compatible parallel port 41 * A floppy disk controller 42 * 43 * Function 2 is a USB controller. 44 * 45 * We must be incredibly careful during initialization. Since all 46 * interrupts are routed through function 1 (which is not allowed by 47 * the PCI spec), we need to program the PICs on the legacy I/O port 48 * *before* we attempt to set up IDE and USB. @#$!& 49 * 50 * According to HP, devices are only enabled by firmware if they have 51 * a physical device connected. 52 * 53 * Configuration register bits: 54 * 0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92 55 * 0x5B: RTC, 8259, 8254, DMA1, DMA2, KBC, P61, APM 56 * 57 */ 58 59 #include <linux/errno.h> 60 #include <linux/init.h> 61 #include <linux/module.h> 62 #include <linux/types.h> 63 #include <linux/interrupt.h> 64 #include <linux/ioport.h> 65 #include <linux/serial.h> 66 #include <linux/pci.h> 67 #include <linux/parport.h> 68 #include <linux/parport_pc.h> 69 #include <linux/termios.h> 70 #include <linux/tty.h> 71 #include <linux/serial_core.h> 72 #include <linux/delay.h> 73 74 #include <asm/io.h> 75 #include <asm/hardware.h> 76 #include <asm/superio.h> 77 78 static struct superio_device sio_dev; 79 80 81 #undef DEBUG_SUPERIO_INIT 82 83 #ifdef DEBUG_SUPERIO_INIT 84 #define DBG_INIT(x...) printk(x) 85 #else 86 #define DBG_INIT(x...) 87 #endif 88 89 static irqreturn_t 90 superio_interrupt(int parent_irq, void *devp, struct pt_regs *regs) 91 { 92 u8 results; 93 u8 local_irq; 94 95 /* Poll the 8259 to see if there's an interrupt. */ 96 outb (OCW3_POLL,IC_PIC1+0); 97 98 results = inb(IC_PIC1+0); 99 100 /* 101 * Bit 7: 1 = active Interrupt; 0 = no Interrupt pending 102 * Bits 6-3: zero 103 * Bits 2-0: highest priority, active requesting interrupt ID (0-7) 104 */ 105 if ((results & 0x80) == 0) { 106 /* I suspect "spurious" interrupts are from unmasking an IRQ. 107 * We don't know if an interrupt was/is pending and thus 108 * just call the handler for that IRQ as if it were pending. 109 */ 110 return IRQ_NONE; 111 } 112 113 /* Check to see which device is interrupting */ 114 local_irq = results & 0x0f; 115 116 if (local_irq == 2 || local_irq > 7) { 117 printk(KERN_ERR "SuperIO: slave interrupted!\n"); 118 return IRQ_HANDLED; 119 } 120 121 if (local_irq == 7) { 122 123 /* Could be spurious. Check in service bits */ 124 125 outb(OCW3_ISR,IC_PIC1+0); 126 results = inb(IC_PIC1+0); 127 if ((results & 0x80) == 0) { /* if ISR7 not set: spurious */ 128 printk(KERN_WARNING "SuperIO: spurious interrupt!\n"); 129 return IRQ_HANDLED; 130 } 131 } 132 133 /* Call the appropriate device's interrupt */ 134 __do_IRQ(local_irq, regs); 135 136 /* set EOI - forces a new interrupt if a lower priority device 137 * still needs service. 138 */ 139 outb((OCW2_SEOI|local_irq),IC_PIC1 + 0); 140 return IRQ_HANDLED; 141 } 142 143 /* Initialize Super I/O device */ 144 145 static void __devinit 146 superio_init(struct superio_device *sio) 147 { 148 struct pci_dev *pdev = sio->lio_pdev; 149 u16 word; 150 151 if (sio->suckyio_irq_enabled) 152 return; 153 154 if (!pdev) BUG(); 155 if (!sio->usb_pdev) BUG(); 156 157 /* use the IRQ iosapic found for USB INT D... */ 158 pdev->irq = sio->usb_pdev->irq; 159 160 /* ...then properly fixup the USB to point at suckyio PIC */ 161 sio->usb_pdev->irq = superio_fixup_irq(sio->usb_pdev); 162 163 printk (KERN_INFO "SuperIO: Found NS87560 Legacy I/O device at %s (IRQ %i) \n", 164 pci_name(pdev),pdev->irq); 165 166 pci_read_config_dword (pdev, SIO_SP1BAR, &sio->sp1_base); 167 sio->sp1_base &= ~1; 168 printk (KERN_INFO "SuperIO: Serial port 1 at 0x%x\n", sio->sp1_base); 169 170 pci_read_config_dword (pdev, SIO_SP2BAR, &sio->sp2_base); 171 sio->sp2_base &= ~1; 172 printk (KERN_INFO "SuperIO: Serial port 2 at 0x%x\n", sio->sp2_base); 173 174 pci_read_config_dword (pdev, SIO_PPBAR, &sio->pp_base); 175 sio->pp_base &= ~1; 176 printk (KERN_INFO "SuperIO: Parallel port at 0x%x\n", sio->pp_base); 177 178 pci_read_config_dword (pdev, SIO_FDCBAR, &sio->fdc_base); 179 sio->fdc_base &= ~1; 180 printk (KERN_INFO "SuperIO: Floppy controller at 0x%x\n", sio->fdc_base); 181 pci_read_config_dword (pdev, SIO_ACPIBAR, &sio->acpi_base); 182 sio->acpi_base &= ~1; 183 printk (KERN_INFO "SuperIO: ACPI at 0x%x\n", sio->acpi_base); 184 185 request_region (IC_PIC1, 0x1f, "pic1"); 186 request_region (IC_PIC2, 0x1f, "pic2"); 187 request_region (sio->acpi_base, 0x1f, "acpi"); 188 189 /* Enable the legacy I/O function */ 190 pci_read_config_word (pdev, PCI_COMMAND, &word); 191 word |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_IO; 192 pci_write_config_word (pdev, PCI_COMMAND, word); 193 194 pci_set_master (pdev); 195 pci_enable_device(pdev); 196 197 /* 198 * Next project is programming the onboard interrupt controllers. 199 * PDC hasn't done this for us, since it's using polled I/O. 200 * 201 * XXX Use dword writes to avoid bugs in Elroy or Suckyio Config 202 * space access. PCI is by nature a 32-bit bus and config 203 * space can be sensitive to that. 204 */ 205 206 /* 0x64 - 0x67 : 207 DMA Rtg 2 208 DMA Rtg 3 209 DMA Chan Ctl 210 TRIGGER_1 == 0x82 USB & IDE level triggered, rest to edge 211 */ 212 pci_write_config_dword (pdev, 0x64, 0x82000000U); 213 214 /* 0x68 - 0x6b : 215 TRIGGER_2 == 0x00 all edge triggered (not used) 216 CFG_IR_SER == 0x43 SerPort1 = IRQ3, SerPort2 = IRQ4 217 CFG_IR_PF == 0x65 ParPort = IRQ5, FloppyCtlr = IRQ6 218 CFG_IR_IDE == 0x07 IDE1 = IRQ7, reserved 219 */ 220 pci_write_config_dword (pdev, TRIGGER_2, 0x07654300U); 221 222 /* 0x6c - 0x6f : 223 CFG_IR_INTAB == 0x00 224 CFG_IR_INTCD == 0x10 USB = IRQ1 225 CFG_IR_PS2 == 0x00 226 CFG_IR_FXBUS == 0x00 227 */ 228 pci_write_config_dword (pdev, CFG_IR_INTAB, 0x00001000U); 229 230 /* 0x70 - 0x73 : 231 CFG_IR_USB == 0x00 not used. USB is connected to INTD. 232 CFG_IR_ACPI == 0x00 not used. 233 DMA Priority == 0x4c88 Power on default value. NFC. 234 */ 235 pci_write_config_dword (pdev, CFG_IR_USB, 0x4c880000U); 236 237 /* PIC1 Initialization Command Word register programming */ 238 outb (0x11,IC_PIC1+0); /* ICW1: ICW4 write req | ICW1 */ 239 outb (0x00,IC_PIC1+1); /* ICW2: interrupt vector table - not used */ 240 outb (0x04,IC_PIC1+1); /* ICW3: Cascade */ 241 outb (0x01,IC_PIC1+1); /* ICW4: x86 mode */ 242 243 /* PIC1 Program Operational Control Words */ 244 outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */ 245 outb (0xc2,IC_PIC1+0); /* OCW2: priority (3-7,0-2) */ 246 247 /* PIC2 Initialization Command Word register programming */ 248 outb (0x11,IC_PIC2+0); /* ICW1: ICW4 write req | ICW1 */ 249 outb (0x00,IC_PIC2+1); /* ICW2: N/A */ 250 outb (0x02,IC_PIC2+1); /* ICW3: Slave ID code */ 251 outb (0x01,IC_PIC2+1); /* ICW4: x86 mode */ 252 253 /* Program Operational Control Words */ 254 outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */ 255 outb (0x68,IC_PIC1+0); /* OCW3: OCW3 select | ESMM | SMM */ 256 257 /* Write master mask reg */ 258 outb (0xff,IC_PIC1+1); 259 260 /* Setup USB power regulation */ 261 outb(1, sio->acpi_base + USB_REG_CR); 262 if (inb(sio->acpi_base + USB_REG_CR) & 1) 263 printk(KERN_INFO "SuperIO: USB regulator enabled\n"); 264 else 265 printk(KERN_ERR "USB regulator not initialized!\n"); 266 267 if (request_irq(pdev->irq, superio_interrupt, SA_INTERRUPT, 268 "SuperIO", (void *)sio)) { 269 270 printk(KERN_ERR "SuperIO: could not get irq\n"); 271 BUG(); 272 return; 273 } 274 275 sio->suckyio_irq_enabled = 1; 276 } 277 278 279 static void superio_disable_irq(unsigned int irq) 280 { 281 u8 r8; 282 283 if ((irq < 1) || (irq == 2) || (irq > 7)) { 284 printk(KERN_ERR "SuperIO: Illegal irq number.\n"); 285 BUG(); 286 return; 287 } 288 289 /* Mask interrupt */ 290 291 r8 = inb(IC_PIC1+1); 292 r8 |= (1 << irq); 293 outb (r8,IC_PIC1+1); 294 } 295 296 static void superio_enable_irq(unsigned int irq) 297 { 298 u8 r8; 299 300 if ((irq < 1) || (irq == 2) || (irq > 7)) { 301 printk(KERN_ERR "SuperIO: Illegal irq number (%d).\n", irq); 302 BUG(); 303 return; 304 } 305 306 /* Unmask interrupt */ 307 r8 = inb(IC_PIC1+1); 308 r8 &= ~(1 << irq); 309 outb (r8,IC_PIC1+1); 310 } 311 312 static unsigned int superio_startup_irq(unsigned int irq) 313 { 314 superio_enable_irq(irq); 315 return 0; 316 } 317 318 static struct hw_interrupt_type superio_interrupt_type = { 319 .typename = "SuperIO", 320 .startup = superio_startup_irq, 321 .shutdown = superio_disable_irq, 322 .enable = superio_enable_irq, 323 .disable = superio_disable_irq, 324 .ack = no_ack_irq, 325 .end = no_end_irq, 326 }; 327 328 #ifdef DEBUG_SUPERIO_INIT 329 static unsigned short expected_device[3] = { 330 PCI_DEVICE_ID_NS_87415, 331 PCI_DEVICE_ID_NS_87560_LIO, 332 PCI_DEVICE_ID_NS_87560_USB 333 }; 334 #endif 335 336 int superio_fixup_irq(struct pci_dev *pcidev) 337 { 338 int local_irq, i; 339 340 #ifdef DEBUG_SUPERIO_INIT 341 int fn; 342 fn = PCI_FUNC(pcidev->devfn); 343 344 /* Verify the function number matches the expected device id. */ 345 if (expected_device[fn] != pcidev->device) { 346 BUG(); 347 return -1; 348 } 349 printk("superio_fixup_irq(%s) ven 0x%x dev 0x%x from %p\n", 350 pci_name(pcidev), 351 pcidev->vendor, pcidev->device, 352 __builtin_return_address(0)); 353 #endif 354 355 for (i = 0; i < 16; i++) { 356 irq_desc[i].handler = &superio_interrupt_type; 357 } 358 359 /* 360 * We don't allocate a SuperIO irq for the legacy IO function, 361 * since it is a "bridge". Instead, we will allocate irq's for 362 * each legacy device as they are initialized. 363 */ 364 365 switch(pcidev->device) { 366 case PCI_DEVICE_ID_NS_87415: /* Function 0 */ 367 local_irq = IDE_IRQ; 368 break; 369 case PCI_DEVICE_ID_NS_87560_LIO: /* Function 1 */ 370 sio_dev.lio_pdev = pcidev; /* save for superio_init() */ 371 return -1; 372 case PCI_DEVICE_ID_NS_87560_USB: /* Function 2 */ 373 sio_dev.usb_pdev = pcidev; /* save for superio_init() */ 374 local_irq = USB_IRQ; 375 break; 376 default: 377 local_irq = -1; 378 BUG(); 379 break; 380 } 381 382 return local_irq; 383 } 384 385 static struct uart_port serial[] = { 386 { 387 .iotype = UPIO_PORT, 388 .line = 0, 389 .type = PORT_16550A, 390 .uartclk = 115200*16, 391 .fifosize = 16, 392 }, 393 { 394 .iotype = UPIO_PORT, 395 .line = 1, 396 .type = PORT_16550A, 397 .uartclk = 115200*16, 398 .fifosize = 16, 399 } 400 }; 401 402 static void __devinit superio_serial_init(void) 403 { 404 #ifdef CONFIG_SERIAL_8250 405 int retval; 406 407 serial[0].iobase = sio_dev.sp1_base; 408 serial[0].irq = SP1_IRQ; 409 spin_lock_init(&serial[0].lock); 410 411 retval = early_serial_setup(&serial[0]); 412 if (retval < 0) { 413 printk(KERN_WARNING "SuperIO: Register Serial #0 failed.\n"); 414 return; 415 } 416 417 serial[1].iobase = sio_dev.sp2_base; 418 serial[1].irq = SP2_IRQ; 419 spin_lock_init(&serial[1].lock); 420 retval = early_serial_setup(&serial[1]); 421 422 if (retval < 0) 423 printk(KERN_WARNING "SuperIO: Register Serial #1 failed.\n"); 424 #endif /* CONFIG_SERIAL_8250 */ 425 } 426 427 428 static void __devinit superio_parport_init(void) 429 { 430 #ifdef CONFIG_PARPORT_PC 431 if (!parport_pc_probe_port(sio_dev.pp_base, 432 0 /*base_hi*/, 433 PAR_IRQ, 434 PARPORT_DMA_NONE /* dma */, 435 NULL /*struct pci_dev* */) ) 436 437 printk(KERN_WARNING "SuperIO: Probing parallel port failed.\n"); 438 #endif /* CONFIG_PARPORT_PC */ 439 } 440 441 442 static void superio_fixup_pci(struct pci_dev *pdev) 443 { 444 u8 prog; 445 446 pdev->class |= 0x5; 447 pci_write_config_byte(pdev, PCI_CLASS_PROG, pdev->class); 448 449 pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog); 450 printk("PCI: Enabled native mode for NS87415 (pif=0x%x)\n", prog); 451 } 452 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, superio_fixup_pci); 453 454 455 static int __devinit superio_probe(struct pci_dev *dev, const struct pci_device_id *id) 456 { 457 458 /* 459 ** superio_probe(00:0e.0) ven 0x100b dev 0x2 sv 0x0 sd 0x0 class 0x1018a 460 ** superio_probe(00:0e.1) ven 0x100b dev 0xe sv 0x0 sd 0x0 class 0x68000 461 ** superio_probe(00:0e.2) ven 0x100b dev 0x12 sv 0x0 sd 0x0 class 0xc0310 462 */ 463 DBG_INIT("superio_probe(%s) ven 0x%x dev 0x%x sv 0x%x sd 0x%x class 0x%x\n", 464 pci_name(dev), 465 dev->vendor, dev->device, 466 dev->subsystem_vendor, dev->subsystem_device, 467 dev->class); 468 469 superio_init(&sio_dev); 470 471 if (dev->device == PCI_DEVICE_ID_NS_87560_LIO) { /* Function 1 */ 472 superio_parport_init(); 473 superio_serial_init(); 474 /* REVISIT XXX : superio_fdc_init() ? */ 475 return 0; 476 } else if (dev->device == PCI_DEVICE_ID_NS_87415) { /* Function 0 */ 477 DBG_INIT("superio_probe: ignoring IDE 87415\n"); 478 } else if (dev->device == PCI_DEVICE_ID_NS_87560_USB) { /* Function 2 */ 479 DBG_INIT("superio_probe: ignoring USB OHCI controller\n"); 480 } else { 481 DBG_INIT("superio_probe: WTF? Fire Extinguisher?\n"); 482 } 483 484 /* Let appropriate other driver claim this device. */ 485 return -ENODEV; 486 } 487 488 static struct pci_device_id superio_tbl[] = { 489 { PCI_VENDOR_ID_NS, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 490 { 0, } 491 }; 492 493 static struct pci_driver superio_driver = { 494 .name = "SuperIO", 495 .id_table = superio_tbl, 496 .probe = superio_probe, 497 }; 498 499 static int __init superio_modinit(void) 500 { 501 return pci_register_driver(&superio_driver); 502 } 503 504 static void __exit superio_exit(void) 505 { 506 pci_unregister_driver(&superio_driver); 507 } 508 509 510 module_init(superio_modinit); 511 module_exit(superio_exit); 512