197fb5e8dSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
222dbdb7cSSanchayan Maity /*
322dbdb7cSSanchayan Maity * Copyright (C) 2015 Toradex AG.
422dbdb7cSSanchayan Maity *
522dbdb7cSSanchayan Maity * Author: Sanchayan Maity <sanchayan.maity@toradex.com>
622dbdb7cSSanchayan Maity *
722dbdb7cSSanchayan Maity * Based on the barebox ocotp driver,
822dbdb7cSSanchayan Maity * Copyright (c) 2010 Baruch Siach <baruch@tkos.co.il>
922dbdb7cSSanchayan Maity * Orex Computed Radiography
1022dbdb7cSSanchayan Maity */
1122dbdb7cSSanchayan Maity
1222dbdb7cSSanchayan Maity #include <linux/clk.h>
1322dbdb7cSSanchayan Maity #include <linux/delay.h>
1422dbdb7cSSanchayan Maity #include <linux/device.h>
1522dbdb7cSSanchayan Maity #include <linux/io.h>
1622dbdb7cSSanchayan Maity #include <linux/module.h>
1722dbdb7cSSanchayan Maity #include <linux/nvmem-provider.h>
1822dbdb7cSSanchayan Maity #include <linux/of.h>
1922dbdb7cSSanchayan Maity #include <linux/platform_device.h>
2022dbdb7cSSanchayan Maity #include <linux/slab.h>
2122dbdb7cSSanchayan Maity
2222dbdb7cSSanchayan Maity /* OCOTP Register Offsets */
2322dbdb7cSSanchayan Maity #define OCOTP_CTRL_REG 0x00
2422dbdb7cSSanchayan Maity #define OCOTP_CTRL_SET 0x04
2522dbdb7cSSanchayan Maity #define OCOTP_CTRL_CLR 0x08
2622dbdb7cSSanchayan Maity #define OCOTP_TIMING 0x10
2722dbdb7cSSanchayan Maity #define OCOTP_DATA 0x20
2822dbdb7cSSanchayan Maity #define OCOTP_READ_CTRL_REG 0x30
2922dbdb7cSSanchayan Maity #define OCOTP_READ_FUSE_DATA 0x40
3022dbdb7cSSanchayan Maity
3122dbdb7cSSanchayan Maity /* OCOTP Register bits and masks */
3222dbdb7cSSanchayan Maity #define OCOTP_CTRL_WR_UNLOCK 16
3322dbdb7cSSanchayan Maity #define OCOTP_CTRL_WR_UNLOCK_KEY 0x3E77
3422dbdb7cSSanchayan Maity #define OCOTP_CTRL_WR_UNLOCK_MASK GENMASK(31, 16)
3522dbdb7cSSanchayan Maity #define OCOTP_CTRL_ADDR 0
3622dbdb7cSSanchayan Maity #define OCOTP_CTRL_ADDR_MASK GENMASK(6, 0)
3722dbdb7cSSanchayan Maity #define OCOTP_CTRL_RELOAD_SHADOWS BIT(10)
3822dbdb7cSSanchayan Maity #define OCOTP_CTRL_ERR BIT(9)
3922dbdb7cSSanchayan Maity #define OCOTP_CTRL_BUSY BIT(8)
4022dbdb7cSSanchayan Maity
4122dbdb7cSSanchayan Maity #define OCOTP_TIMING_STROBE_READ 16
4222dbdb7cSSanchayan Maity #define OCOTP_TIMING_STROBE_READ_MASK GENMASK(21, 16)
4322dbdb7cSSanchayan Maity #define OCOTP_TIMING_RELAX 12
4422dbdb7cSSanchayan Maity #define OCOTP_TIMING_RELAX_MASK GENMASK(15, 12)
4522dbdb7cSSanchayan Maity #define OCOTP_TIMING_STROBE_PROG 0
4622dbdb7cSSanchayan Maity #define OCOTP_TIMING_STROBE_PROG_MASK GENMASK(11, 0)
4722dbdb7cSSanchayan Maity
4822dbdb7cSSanchayan Maity #define OCOTP_READ_CTRL_READ_FUSE 0x1
4922dbdb7cSSanchayan Maity
5022dbdb7cSSanchayan Maity #define VF610_OCOTP_TIMEOUT 100000
5122dbdb7cSSanchayan Maity
5222dbdb7cSSanchayan Maity #define BF(value, field) (((value) << field) & field##_MASK)
5322dbdb7cSSanchayan Maity
5422dbdb7cSSanchayan Maity #define DEF_RELAX 20
5522dbdb7cSSanchayan Maity
5622dbdb7cSSanchayan Maity static const int base_to_fuse_addr_mappings[][2] = {
5722dbdb7cSSanchayan Maity {0x400, 0x00},
5822dbdb7cSSanchayan Maity {0x410, 0x01},
5922dbdb7cSSanchayan Maity {0x420, 0x02},
6022dbdb7cSSanchayan Maity {0x450, 0x05},
6122dbdb7cSSanchayan Maity {0x4F0, 0x0F},
6222dbdb7cSSanchayan Maity {0x600, 0x20},
6322dbdb7cSSanchayan Maity {0x610, 0x21},
6422dbdb7cSSanchayan Maity {0x620, 0x22},
6522dbdb7cSSanchayan Maity {0x630, 0x23},
6622dbdb7cSSanchayan Maity {0x640, 0x24},
6722dbdb7cSSanchayan Maity {0x650, 0x25},
6822dbdb7cSSanchayan Maity {0x660, 0x26},
6922dbdb7cSSanchayan Maity {0x670, 0x27},
7022dbdb7cSSanchayan Maity {0x6F0, 0x2F},
7122dbdb7cSSanchayan Maity {0x880, 0x38},
7222dbdb7cSSanchayan Maity {0x890, 0x39},
7322dbdb7cSSanchayan Maity {0x8A0, 0x3A},
7422dbdb7cSSanchayan Maity {0x8B0, 0x3B},
7522dbdb7cSSanchayan Maity {0x8C0, 0x3C},
7622dbdb7cSSanchayan Maity {0x8D0, 0x3D},
7722dbdb7cSSanchayan Maity {0x8E0, 0x3E},
7822dbdb7cSSanchayan Maity {0x8F0, 0x3F},
7922dbdb7cSSanchayan Maity {0xC80, 0x78},
8022dbdb7cSSanchayan Maity {0xC90, 0x79},
8122dbdb7cSSanchayan Maity {0xCA0, 0x7A},
8222dbdb7cSSanchayan Maity {0xCB0, 0x7B},
8322dbdb7cSSanchayan Maity {0xCC0, 0x7C},
8422dbdb7cSSanchayan Maity {0xCD0, 0x7D},
8522dbdb7cSSanchayan Maity {0xCE0, 0x7E},
8622dbdb7cSSanchayan Maity {0xCF0, 0x7F},
8722dbdb7cSSanchayan Maity };
8822dbdb7cSSanchayan Maity
8922dbdb7cSSanchayan Maity struct vf610_ocotp {
9022dbdb7cSSanchayan Maity void __iomem *base;
9122dbdb7cSSanchayan Maity struct clk *clk;
9222dbdb7cSSanchayan Maity struct device *dev;
9322dbdb7cSSanchayan Maity struct nvmem_device *nvmem;
9422dbdb7cSSanchayan Maity int timing;
9522dbdb7cSSanchayan Maity };
9622dbdb7cSSanchayan Maity
vf610_ocotp_wait_busy(void __iomem * base)9722dbdb7cSSanchayan Maity static int vf610_ocotp_wait_busy(void __iomem *base)
9822dbdb7cSSanchayan Maity {
9922dbdb7cSSanchayan Maity int timeout = VF610_OCOTP_TIMEOUT;
10022dbdb7cSSanchayan Maity
10122dbdb7cSSanchayan Maity while ((readl(base) & OCOTP_CTRL_BUSY) && --timeout)
10222dbdb7cSSanchayan Maity udelay(10);
10322dbdb7cSSanchayan Maity
10422dbdb7cSSanchayan Maity if (!timeout) {
10522dbdb7cSSanchayan Maity writel(OCOTP_CTRL_ERR, base + OCOTP_CTRL_CLR);
10622dbdb7cSSanchayan Maity return -ETIMEDOUT;
10722dbdb7cSSanchayan Maity }
10822dbdb7cSSanchayan Maity
10922dbdb7cSSanchayan Maity udelay(10);
11022dbdb7cSSanchayan Maity
11122dbdb7cSSanchayan Maity return 0;
11222dbdb7cSSanchayan Maity }
11322dbdb7cSSanchayan Maity
vf610_ocotp_calculate_timing(struct vf610_ocotp * ocotp_dev)11422dbdb7cSSanchayan Maity static int vf610_ocotp_calculate_timing(struct vf610_ocotp *ocotp_dev)
11522dbdb7cSSanchayan Maity {
11622dbdb7cSSanchayan Maity u32 clk_rate;
11722dbdb7cSSanchayan Maity u32 relax, strobe_read, strobe_prog;
11822dbdb7cSSanchayan Maity u32 timing;
11922dbdb7cSSanchayan Maity
12022dbdb7cSSanchayan Maity clk_rate = clk_get_rate(ocotp_dev->clk);
12122dbdb7cSSanchayan Maity
12222dbdb7cSSanchayan Maity /* Refer section OTP read/write timing parameters in TRM */
12322dbdb7cSSanchayan Maity relax = clk_rate / (1000000000 / DEF_RELAX) - 1;
12422dbdb7cSSanchayan Maity strobe_prog = clk_rate / (1000000000 / 10000) + 2 * (DEF_RELAX + 1) - 1;
12522dbdb7cSSanchayan Maity strobe_read = clk_rate / (1000000000 / 40) + 2 * (DEF_RELAX + 1) - 1;
12622dbdb7cSSanchayan Maity
12722dbdb7cSSanchayan Maity timing = BF(relax, OCOTP_TIMING_RELAX);
12822dbdb7cSSanchayan Maity timing |= BF(strobe_read, OCOTP_TIMING_STROBE_READ);
12922dbdb7cSSanchayan Maity timing |= BF(strobe_prog, OCOTP_TIMING_STROBE_PROG);
13022dbdb7cSSanchayan Maity
13122dbdb7cSSanchayan Maity return timing;
13222dbdb7cSSanchayan Maity }
13322dbdb7cSSanchayan Maity
vf610_get_fuse_address(int base_addr_offset)13422dbdb7cSSanchayan Maity static int vf610_get_fuse_address(int base_addr_offset)
13522dbdb7cSSanchayan Maity {
13622dbdb7cSSanchayan Maity int i;
13722dbdb7cSSanchayan Maity
13822dbdb7cSSanchayan Maity for (i = 0; i < ARRAY_SIZE(base_to_fuse_addr_mappings); i++) {
13922dbdb7cSSanchayan Maity if (base_to_fuse_addr_mappings[i][0] == base_addr_offset)
14022dbdb7cSSanchayan Maity return base_to_fuse_addr_mappings[i][1];
14122dbdb7cSSanchayan Maity }
14222dbdb7cSSanchayan Maity
14322dbdb7cSSanchayan Maity return -EINVAL;
14422dbdb7cSSanchayan Maity }
14522dbdb7cSSanchayan Maity
vf610_ocotp_read(void * context,unsigned int offset,void * val,size_t bytes)1462c0235c6SSrinivas Kandagatla static int vf610_ocotp_read(void *context, unsigned int offset,
1472c0235c6SSrinivas Kandagatla void *val, size_t bytes)
14822dbdb7cSSanchayan Maity {
14922dbdb7cSSanchayan Maity struct vf610_ocotp *ocotp = context;
15022dbdb7cSSanchayan Maity void __iomem *base = ocotp->base;
15122dbdb7cSSanchayan Maity u32 reg, *buf = val;
15222dbdb7cSSanchayan Maity int fuse_addr;
15322dbdb7cSSanchayan Maity int ret;
15422dbdb7cSSanchayan Maity
1552c0235c6SSrinivas Kandagatla while (bytes > 0) {
15622dbdb7cSSanchayan Maity fuse_addr = vf610_get_fuse_address(offset);
15722dbdb7cSSanchayan Maity if (fuse_addr > 0) {
15822dbdb7cSSanchayan Maity writel(ocotp->timing, base + OCOTP_TIMING);
15922dbdb7cSSanchayan Maity ret = vf610_ocotp_wait_busy(base + OCOTP_CTRL_REG);
16022dbdb7cSSanchayan Maity if (ret)
16122dbdb7cSSanchayan Maity return ret;
16222dbdb7cSSanchayan Maity
16322dbdb7cSSanchayan Maity reg = readl(base + OCOTP_CTRL_REG);
16422dbdb7cSSanchayan Maity reg &= ~OCOTP_CTRL_ADDR_MASK;
16522dbdb7cSSanchayan Maity reg &= ~OCOTP_CTRL_WR_UNLOCK_MASK;
16622dbdb7cSSanchayan Maity reg |= BF(fuse_addr, OCOTP_CTRL_ADDR);
16722dbdb7cSSanchayan Maity writel(reg, base + OCOTP_CTRL_REG);
16822dbdb7cSSanchayan Maity
16922dbdb7cSSanchayan Maity writel(OCOTP_READ_CTRL_READ_FUSE,
17022dbdb7cSSanchayan Maity base + OCOTP_READ_CTRL_REG);
17122dbdb7cSSanchayan Maity ret = vf610_ocotp_wait_busy(base + OCOTP_CTRL_REG);
17222dbdb7cSSanchayan Maity if (ret)
17322dbdb7cSSanchayan Maity return ret;
17422dbdb7cSSanchayan Maity
17522dbdb7cSSanchayan Maity if (readl(base) & OCOTP_CTRL_ERR) {
17622dbdb7cSSanchayan Maity dev_dbg(ocotp->dev, "Error reading from fuse address %x\n",
17722dbdb7cSSanchayan Maity fuse_addr);
17822dbdb7cSSanchayan Maity writel(OCOTP_CTRL_ERR, base + OCOTP_CTRL_CLR);
17922dbdb7cSSanchayan Maity }
18022dbdb7cSSanchayan Maity
18122dbdb7cSSanchayan Maity /*
18222dbdb7cSSanchayan Maity * In case of error, we do not abort and expect to read
18322dbdb7cSSanchayan Maity * 0xBADABADA as mentioned by the TRM. We just read this
18422dbdb7cSSanchayan Maity * value and return.
18522dbdb7cSSanchayan Maity */
18622dbdb7cSSanchayan Maity *buf = readl(base + OCOTP_READ_FUSE_DATA);
18722dbdb7cSSanchayan Maity } else {
18822dbdb7cSSanchayan Maity *buf = 0;
18922dbdb7cSSanchayan Maity }
19022dbdb7cSSanchayan Maity
19122dbdb7cSSanchayan Maity buf++;
1922c0235c6SSrinivas Kandagatla bytes -= 4;
1932c0235c6SSrinivas Kandagatla offset += 4;
19422dbdb7cSSanchayan Maity }
19522dbdb7cSSanchayan Maity
19622dbdb7cSSanchayan Maity return 0;
19722dbdb7cSSanchayan Maity }
19822dbdb7cSSanchayan Maity
19922dbdb7cSSanchayan Maity static struct nvmem_config ocotp_config = {
20022dbdb7cSSanchayan Maity .name = "ocotp",
2012c0235c6SSrinivas Kandagatla .stride = 4,
2022c0235c6SSrinivas Kandagatla .word_size = 4,
2032c0235c6SSrinivas Kandagatla .reg_read = vf610_ocotp_read,
20422dbdb7cSSanchayan Maity };
20522dbdb7cSSanchayan Maity
20622dbdb7cSSanchayan Maity static const struct of_device_id ocotp_of_match[] = {
20722dbdb7cSSanchayan Maity { .compatible = "fsl,vf610-ocotp", },
20822dbdb7cSSanchayan Maity {/* sentinel */},
20922dbdb7cSSanchayan Maity };
21022dbdb7cSSanchayan Maity MODULE_DEVICE_TABLE(of, ocotp_of_match);
21122dbdb7cSSanchayan Maity
vf610_ocotp_probe(struct platform_device * pdev)21222dbdb7cSSanchayan Maity static int vf610_ocotp_probe(struct platform_device *pdev)
21322dbdb7cSSanchayan Maity {
21422dbdb7cSSanchayan Maity struct device *dev = &pdev->dev;
21522dbdb7cSSanchayan Maity struct resource *res;
21622dbdb7cSSanchayan Maity struct vf610_ocotp *ocotp_dev;
21722dbdb7cSSanchayan Maity
218d5007f75SAndrey Smirnov ocotp_dev = devm_kzalloc(dev, sizeof(struct vf610_ocotp), GFP_KERNEL);
21922dbdb7cSSanchayan Maity if (!ocotp_dev)
22022dbdb7cSSanchayan Maity return -ENOMEM;
22122dbdb7cSSanchayan Maity
222*c2367aa6SYang Li ocotp_dev->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
22322dbdb7cSSanchayan Maity if (IS_ERR(ocotp_dev->base))
22422dbdb7cSSanchayan Maity return PTR_ERR(ocotp_dev->base);
22522dbdb7cSSanchayan Maity
22622dbdb7cSSanchayan Maity ocotp_dev->clk = devm_clk_get(dev, NULL);
22722dbdb7cSSanchayan Maity if (IS_ERR(ocotp_dev->clk)) {
22822dbdb7cSSanchayan Maity dev_err(dev, "failed getting clock, err = %ld\n",
22922dbdb7cSSanchayan Maity PTR_ERR(ocotp_dev->clk));
23022dbdb7cSSanchayan Maity return PTR_ERR(ocotp_dev->clk);
23122dbdb7cSSanchayan Maity }
232fae8e89eSAndrey Smirnov ocotp_dev->dev = dev;
233fae8e89eSAndrey Smirnov ocotp_dev->timing = vf610_ocotp_calculate_timing(ocotp_dev);
23422dbdb7cSSanchayan Maity
2352c0235c6SSrinivas Kandagatla ocotp_config.size = resource_size(res);
2362c0235c6SSrinivas Kandagatla ocotp_config.priv = ocotp_dev;
23722dbdb7cSSanchayan Maity ocotp_config.dev = dev;
23822dbdb7cSSanchayan Maity
239fae8e89eSAndrey Smirnov ocotp_dev->nvmem = devm_nvmem_register(dev, &ocotp_config);
24022dbdb7cSSanchayan Maity
241fae8e89eSAndrey Smirnov return PTR_ERR_OR_ZERO(ocotp_dev->nvmem);
24222dbdb7cSSanchayan Maity }
24322dbdb7cSSanchayan Maity
24422dbdb7cSSanchayan Maity static struct platform_driver vf610_ocotp_driver = {
24522dbdb7cSSanchayan Maity .probe = vf610_ocotp_probe,
24622dbdb7cSSanchayan Maity .driver = {
24722dbdb7cSSanchayan Maity .name = "vf610-ocotp",
24822dbdb7cSSanchayan Maity .of_match_table = ocotp_of_match,
24922dbdb7cSSanchayan Maity },
25022dbdb7cSSanchayan Maity };
25122dbdb7cSSanchayan Maity module_platform_driver(vf610_ocotp_driver);
25222dbdb7cSSanchayan Maity MODULE_AUTHOR("Sanchayan Maity <sanchayan.maity@toradex.com>");
25322dbdb7cSSanchayan Maity MODULE_DESCRIPTION("Vybrid OCOTP driver");
25422dbdb7cSSanchayan Maity MODULE_LICENSE("GPL v2");
255