1 // SPDX-License-Identifier: GPL-2.0 2 3 /* 4 * The OCOTP driver for Sunplus SP7021 5 * 6 * Copyright (C) 2019 Sunplus Technology Inc., All rights reserved. 7 */ 8 9 #include <linux/bitfield.h> 10 #include <linux/clk.h> 11 #include <linux/delay.h> 12 #include <linux/device.h> 13 #include <linux/io.h> 14 #include <linux/iopoll.h> 15 #include <linux/module.h> 16 #include <linux/nvmem-provider.h> 17 #include <linux/platform_device.h> 18 19 /* 20 * OTP memory 21 * Each bank contains 4 words (32 bits). 22 * Bank 0 starts at offset 0 from the base. 23 */ 24 25 #define OTP_WORDS_PER_BANK 4 26 #define OTP_WORD_SIZE sizeof(u32) 27 #define OTP_BIT_ADDR_OF_BANK (8 * OTP_WORD_SIZE * OTP_WORDS_PER_BANK) 28 #define QAC628_OTP_NUM_BANKS 8 29 #define QAC628_OTP_SIZE (QAC628_OTP_NUM_BANKS * OTP_WORDS_PER_BANK * OTP_WORD_SIZE) 30 #define OTP_READ_TIMEOUT_US 200000 31 32 /* HB_GPIO */ 33 #define ADDRESS_8_DATA 0x20 34 35 /* OTP_RX */ 36 #define OTP_CONTROL_2 0x48 37 #define OTP_RD_PERIOD GENMASK(15, 8) 38 #define OTP_RD_PERIOD_MASK ~GENMASK(15, 8) 39 #define CPU_CLOCK FIELD_PREP(OTP_RD_PERIOD, 30) 40 #define SEL_BAK_KEY2 BIT(5) 41 #define SEL_BAK_KEY2_MASK ~BIT(5) 42 #define SW_TRIM_EN BIT(4) 43 #define SW_TRIM_EN_MASK ~BIT(4) 44 #define SEL_BAK_KEY BIT(3) 45 #define SEL_BAK_KEY_MASK ~BIT(3) 46 #define OTP_READ BIT(2) 47 #define OTP_LOAD_SECURE_DATA BIT(1) 48 #define OTP_LOAD_SECURE_DATA_MASK ~BIT(1) 49 #define OTP_DO_CRC BIT(0) 50 #define OTP_DO_CRC_MASK ~BIT(0) 51 #define OTP_STATUS 0x4c 52 #define OTP_READ_DONE BIT(4) 53 #define OTP_READ_DONE_MASK ~BIT(4) 54 #define OTP_LOAD_SECURE_DONE_MASK ~BIT(2) 55 #define OTP_READ_ADDRESS 0x50 56 57 enum base_type { 58 HB_GPIO, 59 OTPRX, 60 BASEMAX, 61 }; 62 63 struct sp_ocotp_priv { 64 struct device *dev; 65 void __iomem *base[BASEMAX]; 66 struct clk *clk; 67 }; 68 69 struct sp_ocotp_data { 70 int size; 71 }; 72 73 static const struct sp_ocotp_data sp_otp_v0 = { 74 .size = QAC628_OTP_SIZE, 75 }; 76 77 static int sp_otp_read_real(struct sp_ocotp_priv *otp, int addr, char *value) 78 { 79 unsigned int addr_data; 80 unsigned int byte_shift; 81 unsigned int status; 82 int ret; 83 84 addr_data = addr % (OTP_WORD_SIZE * OTP_WORDS_PER_BANK); 85 addr_data = addr_data / OTP_WORD_SIZE; 86 87 byte_shift = addr % (OTP_WORD_SIZE * OTP_WORDS_PER_BANK); 88 byte_shift = byte_shift % OTP_WORD_SIZE; 89 90 addr = addr / (OTP_WORD_SIZE * OTP_WORDS_PER_BANK); 91 addr = addr * OTP_BIT_ADDR_OF_BANK; 92 93 writel(readl(otp->base[OTPRX] + OTP_STATUS) & OTP_READ_DONE_MASK & 94 OTP_LOAD_SECURE_DONE_MASK, otp->base[OTPRX] + OTP_STATUS); 95 writel(addr, otp->base[OTPRX] + OTP_READ_ADDRESS); 96 writel(readl(otp->base[OTPRX] + OTP_CONTROL_2) | OTP_READ, 97 otp->base[OTPRX] + OTP_CONTROL_2); 98 writel(readl(otp->base[OTPRX] + OTP_CONTROL_2) & SEL_BAK_KEY2_MASK & SW_TRIM_EN_MASK 99 & SEL_BAK_KEY_MASK & OTP_LOAD_SECURE_DATA_MASK & OTP_DO_CRC_MASK, 100 otp->base[OTPRX] + OTP_CONTROL_2); 101 writel((readl(otp->base[OTPRX] + OTP_CONTROL_2) & OTP_RD_PERIOD_MASK) | CPU_CLOCK, 102 otp->base[OTPRX] + OTP_CONTROL_2); 103 104 ret = readl_poll_timeout(otp->base[OTPRX] + OTP_STATUS, status, 105 status & OTP_READ_DONE, 10, OTP_READ_TIMEOUT_US); 106 107 if (ret < 0) 108 return ret; 109 110 *value = (readl(otp->base[HB_GPIO] + ADDRESS_8_DATA + addr_data * OTP_WORD_SIZE) 111 >> (8 * byte_shift)) & 0xff; 112 113 return ret; 114 } 115 116 static int sp_ocotp_read(void *priv, unsigned int offset, void *value, size_t bytes) 117 { 118 struct sp_ocotp_priv *otp = priv; 119 unsigned int addr; 120 char *buf = value; 121 char val[4]; 122 int ret; 123 124 ret = clk_enable(otp->clk); 125 if (ret) 126 return ret; 127 128 *buf = 0; 129 for (addr = offset; addr < (offset + bytes); addr++) { 130 ret = sp_otp_read_real(otp, addr, val); 131 if (ret < 0) { 132 dev_err(otp->dev, "OTP read fail:%d at %d", ret, addr); 133 goto disable_clk; 134 } 135 136 *buf++ = *val; 137 } 138 139 disable_clk: 140 clk_disable(otp->clk); 141 142 return ret; 143 } 144 145 static struct nvmem_config sp_ocotp_nvmem_config = { 146 .name = "sp-ocotp", 147 .add_legacy_fixed_of_cells = true, 148 .read_only = true, 149 .word_size = 1, 150 .size = QAC628_OTP_SIZE, 151 .stride = 1, 152 .reg_read = sp_ocotp_read, 153 .owner = THIS_MODULE, 154 }; 155 156 static int sp_ocotp_probe(struct platform_device *pdev) 157 { 158 struct device *dev = &pdev->dev; 159 struct nvmem_device *nvmem; 160 struct sp_ocotp_priv *otp; 161 int ret; 162 163 otp = devm_kzalloc(dev, sizeof(*otp), GFP_KERNEL); 164 if (!otp) 165 return -ENOMEM; 166 167 otp->dev = dev; 168 169 otp->base[HB_GPIO] = devm_platform_ioremap_resource_byname(pdev, "hb_gpio"); 170 if (IS_ERR(otp->base[HB_GPIO])) 171 return PTR_ERR(otp->base[HB_GPIO]); 172 173 otp->base[OTPRX] = devm_platform_ioremap_resource_byname(pdev, "otprx"); 174 if (IS_ERR(otp->base[OTPRX])) 175 return PTR_ERR(otp->base[OTPRX]); 176 177 otp->clk = devm_clk_get(&pdev->dev, NULL); 178 if (IS_ERR(otp->clk)) 179 return dev_err_probe(&pdev->dev, PTR_ERR(otp->clk), 180 "devm_clk_get fail\n"); 181 182 ret = clk_prepare(otp->clk); 183 if (ret < 0) { 184 dev_err(dev, "failed to prepare clk: %d\n", ret); 185 return ret; 186 } 187 188 sp_ocotp_nvmem_config.priv = otp; 189 sp_ocotp_nvmem_config.dev = dev; 190 191 nvmem = devm_nvmem_register(dev, &sp_ocotp_nvmem_config); 192 if (IS_ERR(nvmem)) { 193 ret = dev_err_probe(&pdev->dev, PTR_ERR(nvmem), 194 "register nvmem device fail\n"); 195 goto err; 196 } 197 198 platform_set_drvdata(pdev, nvmem); 199 200 dev_dbg(dev, "banks:%d x wpb:%d x wsize:%d = %d", 201 (int)QAC628_OTP_NUM_BANKS, (int)OTP_WORDS_PER_BANK, 202 (int)OTP_WORD_SIZE, (int)QAC628_OTP_SIZE); 203 204 return 0; 205 err: 206 clk_unprepare(otp->clk); 207 return ret; 208 } 209 210 static const struct of_device_id sp_ocotp_dt_ids[] = { 211 { .compatible = "sunplus,sp7021-ocotp", .data = &sp_otp_v0 }, 212 { } 213 }; 214 MODULE_DEVICE_TABLE(of, sp_ocotp_dt_ids); 215 216 static struct platform_driver sp_otp_driver = { 217 .probe = sp_ocotp_probe, 218 .driver = { 219 .name = "sunplus,sp7021-ocotp", 220 .of_match_table = sp_ocotp_dt_ids, 221 } 222 }; 223 module_platform_driver(sp_otp_driver); 224 225 MODULE_AUTHOR("Vincent Shih <vincent.sunplus@gmail.com>"); 226 MODULE_DESCRIPTION("Sunplus On-Chip OTP driver"); 227 MODULE_LICENSE("GPL"); 228 229