1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2015-2016 HGST, a Western Digital Company. 4 */ 5 6 #ifndef _NVMET_H 7 #define _NVMET_H 8 9 #include <linux/dma-mapping.h> 10 #include <linux/types.h> 11 #include <linux/device.h> 12 #include <linux/kref.h> 13 #include <linux/percpu-refcount.h> 14 #include <linux/list.h> 15 #include <linux/mutex.h> 16 #include <linux/uuid.h> 17 #include <linux/nvme.h> 18 #include <linux/configfs.h> 19 #include <linux/rcupdate.h> 20 #include <linux/blkdev.h> 21 #include <linux/radix-tree.h> 22 #include <linux/t10-pi.h> 23 #include <linux/kfifo.h> 24 25 #define NVMET_DEFAULT_VS NVME_VS(2, 1, 0) 26 27 #define NVMET_NS_ENABLED XA_MARK_1 28 #define NVMET_ASYNC_EVENTS 4 29 #define NVMET_ERROR_LOG_SLOTS 128 30 #define NVMET_NO_ERROR_LOC ((u16)-1) 31 #define NVMET_DEFAULT_CTRL_MODEL "Linux" 32 #define NVMET_MN_MAX_SIZE 40 33 #define NVMET_SN_MAX_SIZE 20 34 #define NVMET_FR_MAX_SIZE 8 35 #define NVMET_PR_LOG_QUEUE_SIZE 64 36 37 #define nvmet_for_each_ns(xa, index, entry) \ 38 xa_for_each(xa, index, entry) 39 40 #define nvmet_for_each_enabled_ns(xa, index, entry) \ 41 xa_for_each_marked(xa, index, entry, NVMET_NS_ENABLED) 42 43 /* 44 * Supported optional AENs: 45 */ 46 #define NVMET_AEN_CFG_OPTIONAL \ 47 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_ANA_CHANGE) 48 #define NVMET_DISC_AEN_CFG_OPTIONAL \ 49 (NVME_AEN_CFG_DISC_CHANGE) 50 51 /* 52 * Plus mandatory SMART AENs (we'll never send them, but allow enabling them): 53 */ 54 #define NVMET_AEN_CFG_ALL \ 55 (NVME_SMART_CRIT_SPARE | NVME_SMART_CRIT_TEMPERATURE | \ 56 NVME_SMART_CRIT_RELIABILITY | NVME_SMART_CRIT_MEDIA | \ 57 NVME_SMART_CRIT_VOLATILE_MEMORY | NVMET_AEN_CFG_OPTIONAL) 58 59 /* Helper Macros when NVMe error is NVME_SC_CONNECT_INVALID_PARAM 60 * The 16 bit shift is to set IATTR bit to 1, which means offending 61 * offset starts in the data section of connect() 62 */ 63 #define IPO_IATTR_CONNECT_DATA(x) \ 64 (cpu_to_le32((1 << 16) | (offsetof(struct nvmf_connect_data, x)))) 65 #define IPO_IATTR_CONNECT_SQE(x) \ 66 (cpu_to_le32(offsetof(struct nvmf_connect_command, x))) 67 68 struct nvmet_pr_registrant { 69 u64 rkey; 70 uuid_t hostid; 71 enum nvme_pr_type rtype; 72 struct list_head entry; 73 struct rcu_head rcu; 74 }; 75 76 struct nvmet_pr { 77 bool enable; 78 unsigned long notify_mask; 79 atomic_t generation; 80 struct nvmet_pr_registrant __rcu *holder; 81 /* 82 * During the execution of the reservation command, mutual 83 * exclusion is required throughout the process. However, 84 * while waiting asynchronously for the 'per controller 85 * percpu_ref' to complete before the 'preempt and abort' 86 * command finishes, a semaphore is needed to ensure mutual 87 * exclusion instead of a mutex. 88 */ 89 struct semaphore pr_sem; 90 struct list_head registrant_list; 91 }; 92 93 struct nvmet_pr_per_ctrl_ref { 94 struct percpu_ref ref; 95 struct completion free_done; 96 struct completion confirm_done; 97 uuid_t hostid; 98 }; 99 100 struct nvmet_ns { 101 struct percpu_ref ref; 102 struct file *bdev_file; 103 struct block_device *bdev; 104 struct file *file; 105 bool readonly; 106 u32 nsid; 107 u32 blksize_shift; 108 loff_t size; 109 u8 nguid[16]; 110 uuid_t uuid; 111 u32 anagrpid; 112 113 bool buffered_io; 114 bool enabled; 115 struct nvmet_subsys *subsys; 116 const char *device_path; 117 118 struct config_group device_group; 119 struct config_group group; 120 121 struct completion disable_done; 122 mempool_t *bvec_pool; 123 124 struct pci_dev *p2p_dev; 125 int use_p2pmem; 126 int pi_type; 127 int metadata_size; 128 u8 csi; 129 struct nvmet_pr pr; 130 struct xarray pr_per_ctrl_refs; 131 }; 132 133 static inline struct nvmet_ns *to_nvmet_ns(struct config_item *item) 134 { 135 return container_of(to_config_group(item), struct nvmet_ns, group); 136 } 137 138 static inline struct device *nvmet_ns_dev(struct nvmet_ns *ns) 139 { 140 return ns->bdev ? disk_to_dev(ns->bdev->bd_disk) : NULL; 141 } 142 143 struct nvmet_cq { 144 u16 qid; 145 u16 size; 146 }; 147 148 struct nvmet_sq { 149 struct nvmet_ctrl *ctrl; 150 struct percpu_ref ref; 151 u16 qid; 152 u16 size; 153 u32 sqhd; 154 bool sqhd_disabled; 155 #ifdef CONFIG_NVME_TARGET_AUTH 156 bool authenticated; 157 struct delayed_work auth_expired_work; 158 u16 dhchap_tid; 159 u8 dhchap_status; 160 u8 dhchap_step; 161 u8 *dhchap_c1; 162 u8 *dhchap_c2; 163 u32 dhchap_s1; 164 u32 dhchap_s2; 165 u8 *dhchap_skey; 166 int dhchap_skey_len; 167 #endif 168 #ifdef CONFIG_NVME_TARGET_TCP_TLS 169 struct key *tls_key; 170 #endif 171 struct completion free_done; 172 struct completion confirm_done; 173 }; 174 175 struct nvmet_ana_group { 176 struct config_group group; 177 struct nvmet_port *port; 178 u32 grpid; 179 }; 180 181 static inline struct nvmet_ana_group *to_ana_group(struct config_item *item) 182 { 183 return container_of(to_config_group(item), struct nvmet_ana_group, 184 group); 185 } 186 187 /** 188 * struct nvmet_port - Common structure to keep port 189 * information for the target. 190 * @entry: Entry into referrals or transport list. 191 * @disc_addr: Address information is stored in a format defined 192 * for a discovery log page entry. 193 * @group: ConfigFS group for this element's folder. 194 * @priv: Private data for the transport. 195 */ 196 struct nvmet_port { 197 struct list_head entry; 198 struct nvmf_disc_rsp_page_entry disc_addr; 199 struct config_group group; 200 struct config_group subsys_group; 201 struct list_head subsystems; 202 struct config_group referrals_group; 203 struct list_head referrals; 204 struct list_head global_entry; 205 struct config_group ana_groups_group; 206 struct nvmet_ana_group ana_default_group; 207 enum nvme_ana_state *ana_state; 208 struct key *keyring; 209 void *priv; 210 bool enabled; 211 int inline_data_size; 212 int max_queue_size; 213 const struct nvmet_fabrics_ops *tr_ops; 214 bool pi_enable; 215 }; 216 217 static inline struct nvmet_port *to_nvmet_port(struct config_item *item) 218 { 219 return container_of(to_config_group(item), struct nvmet_port, 220 group); 221 } 222 223 static inline struct nvmet_port *ana_groups_to_port( 224 struct config_item *item) 225 { 226 return container_of(to_config_group(item), struct nvmet_port, 227 ana_groups_group); 228 } 229 230 static inline u8 nvmet_port_disc_addr_treq_secure_channel(struct nvmet_port *port) 231 { 232 return (port->disc_addr.treq & NVME_TREQ_SECURE_CHANNEL_MASK); 233 } 234 235 static inline bool nvmet_port_secure_channel_required(struct nvmet_port *port) 236 { 237 return nvmet_port_disc_addr_treq_secure_channel(port) == NVMF_TREQ_REQUIRED; 238 } 239 240 struct nvmet_pr_log_mgr { 241 struct mutex lock; 242 u64 lost_count; 243 u64 counter; 244 DECLARE_KFIFO(log_queue, struct nvme_pr_log, NVMET_PR_LOG_QUEUE_SIZE); 245 }; 246 247 struct nvmet_ctrl { 248 struct nvmet_subsys *subsys; 249 struct nvmet_sq **sqs; 250 251 void *drvdata; 252 253 bool reset_tbkas; 254 255 struct mutex lock; 256 u64 cap; 257 u32 cc; 258 u32 csts; 259 260 uuid_t hostid; 261 u16 cntlid; 262 u32 kato; 263 264 struct nvmet_port *port; 265 266 u32 aen_enabled; 267 unsigned long aen_masked; 268 struct nvmet_req *async_event_cmds[NVMET_ASYNC_EVENTS]; 269 unsigned int nr_async_event_cmds; 270 struct list_head async_events; 271 struct work_struct async_event_work; 272 273 struct list_head subsys_entry; 274 struct kref ref; 275 struct delayed_work ka_work; 276 struct work_struct fatal_err_work; 277 278 const struct nvmet_fabrics_ops *ops; 279 280 __le32 *changed_ns_list; 281 u32 nr_changed_ns; 282 283 char subsysnqn[NVMF_NQN_FIELD_LEN]; 284 char hostnqn[NVMF_NQN_FIELD_LEN]; 285 286 struct device *p2p_client; 287 struct radix_tree_root p2p_ns_map; 288 #ifdef CONFIG_NVME_TARGET_DEBUGFS 289 struct dentry *debugfs_dir; 290 #endif 291 spinlock_t error_lock; 292 u64 err_counter; 293 struct nvme_error_slot slots[NVMET_ERROR_LOG_SLOTS]; 294 bool pi_support; 295 bool concat; 296 #ifdef CONFIG_NVME_TARGET_AUTH 297 struct nvme_dhchap_key *host_key; 298 struct nvme_dhchap_key *ctrl_key; 299 u8 shash_id; 300 struct crypto_kpp *dh_tfm; 301 u8 dh_gid; 302 u8 *dh_key; 303 size_t dh_keysize; 304 #endif 305 #ifdef CONFIG_NVME_TARGET_TCP_TLS 306 struct key *tls_key; 307 #endif 308 struct nvmet_pr_log_mgr pr_log_mgr; 309 }; 310 311 struct nvmet_subsys { 312 enum nvme_subsys_type type; 313 314 struct mutex lock; 315 struct kref ref; 316 317 struct xarray namespaces; 318 unsigned int nr_namespaces; 319 u32 max_nsid; 320 u16 cntlid_min; 321 u16 cntlid_max; 322 323 struct list_head ctrls; 324 325 struct list_head hosts; 326 bool allow_any_host; 327 #ifdef CONFIG_NVME_TARGET_DEBUGFS 328 struct dentry *debugfs_dir; 329 #endif 330 u16 max_qid; 331 332 u64 ver; 333 char serial[NVMET_SN_MAX_SIZE]; 334 bool subsys_discovered; 335 char *subsysnqn; 336 bool pi_support; 337 338 struct config_group group; 339 340 struct config_group namespaces_group; 341 struct config_group allowed_hosts_group; 342 343 u16 vendor_id; 344 u16 subsys_vendor_id; 345 char *model_number; 346 u32 ieee_oui; 347 char *firmware_rev; 348 349 #ifdef CONFIG_NVME_TARGET_PASSTHRU 350 struct nvme_ctrl *passthru_ctrl; 351 char *passthru_ctrl_path; 352 struct config_group passthru_group; 353 unsigned int admin_timeout; 354 unsigned int io_timeout; 355 unsigned int clear_ids; 356 #endif /* CONFIG_NVME_TARGET_PASSTHRU */ 357 358 #ifdef CONFIG_BLK_DEV_ZONED 359 u8 zasl; 360 #endif /* CONFIG_BLK_DEV_ZONED */ 361 }; 362 363 static inline struct nvmet_subsys *to_subsys(struct config_item *item) 364 { 365 return container_of(to_config_group(item), struct nvmet_subsys, group); 366 } 367 368 static inline struct nvmet_subsys *namespaces_to_subsys( 369 struct config_item *item) 370 { 371 return container_of(to_config_group(item), struct nvmet_subsys, 372 namespaces_group); 373 } 374 375 struct nvmet_host { 376 struct config_group group; 377 u8 *dhchap_secret; 378 u8 *dhchap_ctrl_secret; 379 u8 dhchap_key_hash; 380 u8 dhchap_ctrl_key_hash; 381 u8 dhchap_hash_id; 382 u8 dhchap_dhgroup_id; 383 }; 384 385 static inline struct nvmet_host *to_host(struct config_item *item) 386 { 387 return container_of(to_config_group(item), struct nvmet_host, group); 388 } 389 390 static inline char *nvmet_host_name(struct nvmet_host *host) 391 { 392 return config_item_name(&host->group.cg_item); 393 } 394 395 struct nvmet_host_link { 396 struct list_head entry; 397 struct nvmet_host *host; 398 }; 399 400 struct nvmet_subsys_link { 401 struct list_head entry; 402 struct nvmet_subsys *subsys; 403 }; 404 405 struct nvmet_req; 406 struct nvmet_fabrics_ops { 407 struct module *owner; 408 unsigned int type; 409 unsigned int msdbd; 410 unsigned int flags; 411 #define NVMF_KEYED_SGLS (1 << 0) 412 #define NVMF_METADATA_SUPPORTED (1 << 1) 413 void (*queue_response)(struct nvmet_req *req); 414 int (*add_port)(struct nvmet_port *port); 415 void (*remove_port)(struct nvmet_port *port); 416 void (*delete_ctrl)(struct nvmet_ctrl *ctrl); 417 void (*disc_traddr)(struct nvmet_req *req, 418 struct nvmet_port *port, char *traddr); 419 ssize_t (*host_traddr)(struct nvmet_ctrl *ctrl, 420 char *traddr, size_t traddr_len); 421 u16 (*install_queue)(struct nvmet_sq *nvme_sq); 422 void (*discovery_chg)(struct nvmet_port *port); 423 u8 (*get_mdts)(const struct nvmet_ctrl *ctrl); 424 u16 (*get_max_queue_size)(const struct nvmet_ctrl *ctrl); 425 426 /* Operations mandatory for PCI target controllers */ 427 u16 (*create_sq)(struct nvmet_ctrl *ctrl, u16 sqid, u16 flags, 428 u16 qsize, u64 prp1); 429 u16 (*delete_sq)(struct nvmet_ctrl *ctrl, u16 sqid); 430 u16 (*create_cq)(struct nvmet_ctrl *ctrl, u16 cqid, u16 flags, 431 u16 qsize, u64 prp1, u16 irq_vector); 432 u16 (*delete_cq)(struct nvmet_ctrl *ctrl, u16 cqid); 433 u16 (*set_feature)(const struct nvmet_ctrl *ctrl, u8 feat, 434 void *feat_data); 435 u16 (*get_feature)(const struct nvmet_ctrl *ctrl, u8 feat, 436 void *feat_data); 437 }; 438 439 #define NVMET_MAX_INLINE_BIOVEC 8 440 #define NVMET_MAX_INLINE_DATA_LEN NVMET_MAX_INLINE_BIOVEC * PAGE_SIZE 441 442 struct nvmet_req { 443 struct nvme_command *cmd; 444 struct nvme_completion *cqe; 445 struct nvmet_sq *sq; 446 struct nvmet_cq *cq; 447 struct nvmet_ns *ns; 448 struct scatterlist *sg; 449 struct scatterlist *metadata_sg; 450 struct bio_vec inline_bvec[NVMET_MAX_INLINE_BIOVEC]; 451 union { 452 struct { 453 struct bio inline_bio; 454 } b; 455 struct { 456 bool mpool_alloc; 457 struct kiocb iocb; 458 struct bio_vec *bvec; 459 struct work_struct work; 460 } f; 461 struct { 462 struct bio inline_bio; 463 struct request *rq; 464 struct work_struct work; 465 bool use_workqueue; 466 } p; 467 #ifdef CONFIG_BLK_DEV_ZONED 468 struct { 469 struct bio inline_bio; 470 struct work_struct zmgmt_work; 471 } z; 472 #endif /* CONFIG_BLK_DEV_ZONED */ 473 struct { 474 struct work_struct abort_work; 475 } r; 476 }; 477 int sg_cnt; 478 int metadata_sg_cnt; 479 /* data length as parsed from the SGL descriptor: */ 480 size_t transfer_len; 481 size_t metadata_len; 482 483 struct nvmet_port *port; 484 485 void (*execute)(struct nvmet_req *req); 486 const struct nvmet_fabrics_ops *ops; 487 488 struct pci_dev *p2p_dev; 489 struct device *p2p_client; 490 u16 error_loc; 491 u64 error_slba; 492 struct nvmet_pr_per_ctrl_ref *pc_ref; 493 }; 494 495 #define NVMET_MAX_MPOOL_BVEC 16 496 extern struct kmem_cache *nvmet_bvec_cache; 497 extern struct workqueue_struct *buffered_io_wq; 498 extern struct workqueue_struct *zbd_wq; 499 extern struct workqueue_struct *nvmet_wq; 500 501 static inline void nvmet_set_result(struct nvmet_req *req, u32 result) 502 { 503 req->cqe->result.u32 = cpu_to_le32(result); 504 } 505 506 /* 507 * NVMe command writes actually are DMA reads for us on the target side. 508 */ 509 static inline enum dma_data_direction 510 nvmet_data_dir(struct nvmet_req *req) 511 { 512 return nvme_is_write(req->cmd) ? DMA_FROM_DEVICE : DMA_TO_DEVICE; 513 } 514 515 struct nvmet_async_event { 516 struct list_head entry; 517 u8 event_type; 518 u8 event_info; 519 u8 log_page; 520 }; 521 522 static inline void nvmet_clear_aen_bit(struct nvmet_req *req, u32 bn) 523 { 524 int rae = le32_to_cpu(req->cmd->common.cdw10) & 1 << 15; 525 526 if (!rae) 527 clear_bit(bn, &req->sq->ctrl->aen_masked); 528 } 529 530 static inline bool nvmet_aen_bit_disabled(struct nvmet_ctrl *ctrl, u32 bn) 531 { 532 if (!(READ_ONCE(ctrl->aen_enabled) & (1 << bn))) 533 return true; 534 return test_and_set_bit(bn, &ctrl->aen_masked); 535 } 536 537 void nvmet_get_feat_kato(struct nvmet_req *req); 538 void nvmet_get_feat_async_event(struct nvmet_req *req); 539 u16 nvmet_set_feat_kato(struct nvmet_req *req); 540 u16 nvmet_set_feat_async_event(struct nvmet_req *req, u32 mask); 541 void nvmet_execute_async_event(struct nvmet_req *req); 542 void nvmet_start_keep_alive_timer(struct nvmet_ctrl *ctrl); 543 void nvmet_stop_keep_alive_timer(struct nvmet_ctrl *ctrl); 544 545 u16 nvmet_parse_connect_cmd(struct nvmet_req *req); 546 u32 nvmet_connect_cmd_data_len(struct nvmet_req *req); 547 void nvmet_bdev_set_limits(struct block_device *bdev, struct nvme_id_ns *id); 548 u16 nvmet_bdev_parse_io_cmd(struct nvmet_req *req); 549 u16 nvmet_file_parse_io_cmd(struct nvmet_req *req); 550 u16 nvmet_bdev_zns_parse_io_cmd(struct nvmet_req *req); 551 u32 nvmet_admin_cmd_data_len(struct nvmet_req *req); 552 u16 nvmet_parse_admin_cmd(struct nvmet_req *req); 553 u32 nvmet_discovery_cmd_data_len(struct nvmet_req *req); 554 u16 nvmet_parse_discovery_cmd(struct nvmet_req *req); 555 u16 nvmet_parse_fabrics_admin_cmd(struct nvmet_req *req); 556 u32 nvmet_fabrics_admin_cmd_data_len(struct nvmet_req *req); 557 u16 nvmet_parse_fabrics_io_cmd(struct nvmet_req *req); 558 u32 nvmet_fabrics_io_cmd_data_len(struct nvmet_req *req); 559 560 bool nvmet_req_init(struct nvmet_req *req, struct nvmet_cq *cq, 561 struct nvmet_sq *sq, const struct nvmet_fabrics_ops *ops); 562 void nvmet_req_uninit(struct nvmet_req *req); 563 size_t nvmet_req_transfer_len(struct nvmet_req *req); 564 bool nvmet_check_transfer_len(struct nvmet_req *req, size_t len); 565 bool nvmet_check_data_len_lte(struct nvmet_req *req, size_t data_len); 566 void nvmet_req_complete(struct nvmet_req *req, u16 status); 567 int nvmet_req_alloc_sgls(struct nvmet_req *req); 568 void nvmet_req_free_sgls(struct nvmet_req *req); 569 570 void nvmet_execute_set_features(struct nvmet_req *req); 571 void nvmet_execute_get_features(struct nvmet_req *req); 572 void nvmet_execute_keep_alive(struct nvmet_req *req); 573 574 u16 nvmet_check_cqid(struct nvmet_ctrl *ctrl, u16 cqid); 575 void nvmet_cq_setup(struct nvmet_ctrl *ctrl, struct nvmet_cq *cq, u16 qid, 576 u16 size); 577 u16 nvmet_cq_create(struct nvmet_ctrl *ctrl, struct nvmet_cq *cq, u16 qid, 578 u16 size); 579 u16 nvmet_check_sqid(struct nvmet_ctrl *ctrl, u16 sqid, bool create); 580 void nvmet_sq_setup(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq, u16 qid, 581 u16 size); 582 u16 nvmet_sq_create(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq, u16 qid, 583 u16 size); 584 void nvmet_sq_destroy(struct nvmet_sq *sq); 585 int nvmet_sq_init(struct nvmet_sq *sq); 586 587 void nvmet_ctrl_fatal_error(struct nvmet_ctrl *ctrl); 588 589 void nvmet_update_cc(struct nvmet_ctrl *ctrl, u32 new); 590 591 struct nvmet_alloc_ctrl_args { 592 struct nvmet_port *port; 593 struct nvmet_sq *sq; 594 char *subsysnqn; 595 char *hostnqn; 596 uuid_t *hostid; 597 const struct nvmet_fabrics_ops *ops; 598 struct device *p2p_client; 599 u32 kato; 600 __le32 result; 601 u16 error_loc; 602 u16 status; 603 }; 604 605 struct nvmet_ctrl *nvmet_alloc_ctrl(struct nvmet_alloc_ctrl_args *args); 606 struct nvmet_ctrl *nvmet_ctrl_find_get(const char *subsysnqn, 607 const char *hostnqn, u16 cntlid, 608 struct nvmet_req *req); 609 void nvmet_ctrl_put(struct nvmet_ctrl *ctrl); 610 u16 nvmet_check_ctrl_status(struct nvmet_req *req); 611 ssize_t nvmet_ctrl_host_traddr(struct nvmet_ctrl *ctrl, 612 char *traddr, size_t traddr_len); 613 614 struct nvmet_subsys *nvmet_subsys_alloc(const char *subsysnqn, 615 enum nvme_subsys_type type); 616 void nvmet_subsys_put(struct nvmet_subsys *subsys); 617 void nvmet_subsys_del_ctrls(struct nvmet_subsys *subsys); 618 619 u16 nvmet_req_find_ns(struct nvmet_req *req); 620 void nvmet_put_namespace(struct nvmet_ns *ns); 621 int nvmet_ns_enable(struct nvmet_ns *ns); 622 void nvmet_ns_disable(struct nvmet_ns *ns); 623 struct nvmet_ns *nvmet_ns_alloc(struct nvmet_subsys *subsys, u32 nsid); 624 void nvmet_ns_free(struct nvmet_ns *ns); 625 626 void nvmet_send_ana_event(struct nvmet_subsys *subsys, 627 struct nvmet_port *port); 628 void nvmet_port_send_ana_event(struct nvmet_port *port); 629 630 int nvmet_register_transport(const struct nvmet_fabrics_ops *ops); 631 void nvmet_unregister_transport(const struct nvmet_fabrics_ops *ops); 632 633 void nvmet_port_del_ctrls(struct nvmet_port *port, 634 struct nvmet_subsys *subsys); 635 636 int nvmet_enable_port(struct nvmet_port *port); 637 void nvmet_disable_port(struct nvmet_port *port); 638 639 void nvmet_referral_enable(struct nvmet_port *parent, struct nvmet_port *port); 640 void nvmet_referral_disable(struct nvmet_port *parent, struct nvmet_port *port); 641 642 u16 nvmet_copy_to_sgl(struct nvmet_req *req, off_t off, const void *buf, 643 size_t len); 644 u16 nvmet_copy_from_sgl(struct nvmet_req *req, off_t off, void *buf, 645 size_t len); 646 u16 nvmet_zero_sgl(struct nvmet_req *req, off_t off, size_t len); 647 648 u32 nvmet_get_log_page_len(struct nvme_command *cmd); 649 u64 nvmet_get_log_page_offset(struct nvme_command *cmd); 650 651 extern struct list_head *nvmet_ports; 652 void nvmet_port_disc_changed(struct nvmet_port *port, 653 struct nvmet_subsys *subsys); 654 void nvmet_subsys_disc_changed(struct nvmet_subsys *subsys, 655 struct nvmet_host *host); 656 void nvmet_add_async_event(struct nvmet_ctrl *ctrl, u8 event_type, 657 u8 event_info, u8 log_page); 658 659 #define NVMET_MIN_QUEUE_SIZE 16 660 #define NVMET_MAX_QUEUE_SIZE 1024 661 #define NVMET_NR_QUEUES 128 662 #define NVMET_MAX_CMD(ctrl) (NVME_CAP_MQES(ctrl->cap) + 1) 663 664 /* 665 * Nice round number that makes a list of nsids fit into a page. 666 * Should become tunable at some point in the future. 667 */ 668 #define NVMET_MAX_NAMESPACES 1024 669 670 /* 671 * 0 is not a valid ANA group ID, so we start numbering at 1. 672 * 673 * ANA Group 1 exists without manual intervention, has namespaces assigned to it 674 * by default, and is available in an optimized state through all ports. 675 */ 676 #define NVMET_MAX_ANAGRPS 128 677 #define NVMET_DEFAULT_ANA_GRPID 1 678 679 #define NVMET_KAS 10 680 #define NVMET_DISC_KATO_MS 120000 681 682 int __init nvmet_init_configfs(void); 683 void __exit nvmet_exit_configfs(void); 684 685 int __init nvmet_init_discovery(void); 686 void nvmet_exit_discovery(void); 687 688 extern struct nvmet_subsys *nvmet_disc_subsys; 689 extern struct rw_semaphore nvmet_config_sem; 690 691 extern u32 nvmet_ana_group_enabled[NVMET_MAX_ANAGRPS + 1]; 692 extern u64 nvmet_ana_chgcnt; 693 extern struct rw_semaphore nvmet_ana_sem; 694 695 bool nvmet_host_allowed(struct nvmet_subsys *subsys, const char *hostnqn); 696 697 int nvmet_bdev_ns_enable(struct nvmet_ns *ns); 698 int nvmet_file_ns_enable(struct nvmet_ns *ns); 699 void nvmet_bdev_ns_disable(struct nvmet_ns *ns); 700 void nvmet_file_ns_disable(struct nvmet_ns *ns); 701 u16 nvmet_bdev_flush(struct nvmet_req *req); 702 u16 nvmet_file_flush(struct nvmet_req *req); 703 void nvmet_ns_changed(struct nvmet_subsys *subsys, u32 nsid); 704 void nvmet_bdev_ns_revalidate(struct nvmet_ns *ns); 705 void nvmet_file_ns_revalidate(struct nvmet_ns *ns); 706 bool nvmet_ns_revalidate(struct nvmet_ns *ns); 707 u16 blk_to_nvme_status(struct nvmet_req *req, blk_status_t blk_sts); 708 709 bool nvmet_bdev_zns_enable(struct nvmet_ns *ns); 710 void nvmet_execute_identify_ctrl_zns(struct nvmet_req *req); 711 void nvmet_execute_identify_ns_zns(struct nvmet_req *req); 712 void nvmet_bdev_execute_zone_mgmt_recv(struct nvmet_req *req); 713 void nvmet_bdev_execute_zone_mgmt_send(struct nvmet_req *req); 714 void nvmet_bdev_execute_zone_append(struct nvmet_req *req); 715 716 static inline u32 nvmet_rw_data_len(struct nvmet_req *req) 717 { 718 return ((u32)le16_to_cpu(req->cmd->rw.length) + 1) << 719 req->ns->blksize_shift; 720 } 721 722 static inline u32 nvmet_rw_metadata_len(struct nvmet_req *req) 723 { 724 if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY)) 725 return 0; 726 return ((u32)le16_to_cpu(req->cmd->rw.length) + 1) * 727 req->ns->metadata_size; 728 } 729 730 static inline u32 nvmet_dsm_len(struct nvmet_req *req) 731 { 732 return (le32_to_cpu(req->cmd->dsm.nr) + 1) * 733 sizeof(struct nvme_dsm_range); 734 } 735 736 static inline struct nvmet_subsys *nvmet_req_subsys(struct nvmet_req *req) 737 { 738 return req->sq->ctrl->subsys; 739 } 740 741 static inline bool nvmet_is_disc_subsys(struct nvmet_subsys *subsys) 742 { 743 return subsys->type != NVME_NQN_NVME; 744 } 745 746 static inline bool nvmet_is_pci_ctrl(struct nvmet_ctrl *ctrl) 747 { 748 return ctrl->port->disc_addr.trtype == NVMF_TRTYPE_PCI; 749 } 750 751 #ifdef CONFIG_NVME_TARGET_PASSTHRU 752 void nvmet_passthru_subsys_free(struct nvmet_subsys *subsys); 753 int nvmet_passthru_ctrl_enable(struct nvmet_subsys *subsys); 754 void nvmet_passthru_ctrl_disable(struct nvmet_subsys *subsys); 755 u16 nvmet_parse_passthru_admin_cmd(struct nvmet_req *req); 756 u16 nvmet_parse_passthru_io_cmd(struct nvmet_req *req); 757 static inline bool nvmet_is_passthru_subsys(struct nvmet_subsys *subsys) 758 { 759 return subsys->passthru_ctrl; 760 } 761 #else /* CONFIG_NVME_TARGET_PASSTHRU */ 762 static inline void nvmet_passthru_subsys_free(struct nvmet_subsys *subsys) 763 { 764 } 765 static inline void nvmet_passthru_ctrl_disable(struct nvmet_subsys *subsys) 766 { 767 } 768 static inline u16 nvmet_parse_passthru_admin_cmd(struct nvmet_req *req) 769 { 770 return 0; 771 } 772 static inline u16 nvmet_parse_passthru_io_cmd(struct nvmet_req *req) 773 { 774 return 0; 775 } 776 static inline bool nvmet_is_passthru_subsys(struct nvmet_subsys *subsys) 777 { 778 return NULL; 779 } 780 #endif /* CONFIG_NVME_TARGET_PASSTHRU */ 781 782 static inline bool nvmet_is_passthru_req(struct nvmet_req *req) 783 { 784 return nvmet_is_passthru_subsys(nvmet_req_subsys(req)); 785 } 786 787 void nvmet_passthrough_override_cap(struct nvmet_ctrl *ctrl); 788 789 u16 errno_to_nvme_status(struct nvmet_req *req, int errno); 790 u16 nvmet_report_invalid_opcode(struct nvmet_req *req); 791 792 static inline bool nvmet_cc_en(u32 cc) 793 { 794 return (cc & NVME_CC_ENABLE) >> NVME_CC_EN_SHIFT; 795 } 796 797 static inline u8 nvmet_cc_css(u32 cc) 798 { 799 return (cc & NVME_CC_CSS_MASK) >> NVME_CC_CSS_SHIFT; 800 } 801 802 static inline u8 nvmet_cc_mps(u32 cc) 803 { 804 return (cc & NVME_CC_MPS_MASK) >> NVME_CC_MPS_SHIFT; 805 } 806 807 static inline u8 nvmet_cc_ams(u32 cc) 808 { 809 return (cc & NVME_CC_AMS_MASK) >> NVME_CC_AMS_SHIFT; 810 } 811 812 static inline u8 nvmet_cc_shn(u32 cc) 813 { 814 return (cc & NVME_CC_SHN_MASK) >> NVME_CC_SHN_SHIFT; 815 } 816 817 static inline u8 nvmet_cc_iosqes(u32 cc) 818 { 819 return (cc & NVME_CC_IOSQES_MASK) >> NVME_CC_IOSQES_SHIFT; 820 } 821 822 static inline u8 nvmet_cc_iocqes(u32 cc) 823 { 824 return (cc & NVME_CC_IOCQES_MASK) >> NVME_CC_IOCQES_SHIFT; 825 } 826 827 /* Convert a 32-bit number to a 16-bit 0's based number */ 828 static inline __le16 to0based(u32 a) 829 { 830 return cpu_to_le16(clamp(a, 1U, 1U << 16) - 1); 831 } 832 833 static inline bool nvmet_ns_has_pi(struct nvmet_ns *ns) 834 { 835 if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY)) 836 return false; 837 return ns->pi_type && ns->metadata_size == sizeof(struct t10_pi_tuple); 838 } 839 840 static inline __le64 nvmet_sect_to_lba(struct nvmet_ns *ns, sector_t sect) 841 { 842 return cpu_to_le64(sect >> (ns->blksize_shift - SECTOR_SHIFT)); 843 } 844 845 static inline sector_t nvmet_lba_to_sect(struct nvmet_ns *ns, __le64 lba) 846 { 847 return le64_to_cpu(lba) << (ns->blksize_shift - SECTOR_SHIFT); 848 } 849 850 static inline bool nvmet_use_inline_bvec(struct nvmet_req *req) 851 { 852 return req->transfer_len <= NVMET_MAX_INLINE_DATA_LEN && 853 req->sg_cnt <= NVMET_MAX_INLINE_BIOVEC; 854 } 855 856 static inline void nvmet_req_bio_put(struct nvmet_req *req, struct bio *bio) 857 { 858 if (bio != &req->b.inline_bio) 859 bio_put(bio); 860 } 861 862 #ifdef CONFIG_NVME_TARGET_TCP_TLS 863 static inline key_serial_t nvmet_queue_tls_keyid(struct nvmet_sq *sq) 864 { 865 return sq->tls_key ? key_serial(sq->tls_key) : 0; 866 } 867 static inline void nvmet_sq_put_tls_key(struct nvmet_sq *sq) 868 { 869 if (sq->tls_key) { 870 key_put(sq->tls_key); 871 sq->tls_key = NULL; 872 } 873 } 874 #else 875 static inline key_serial_t nvmet_queue_tls_keyid(struct nvmet_sq *sq) { return 0; } 876 static inline void nvmet_sq_put_tls_key(struct nvmet_sq *sq) {} 877 #endif 878 #ifdef CONFIG_NVME_TARGET_AUTH 879 u32 nvmet_auth_send_data_len(struct nvmet_req *req); 880 void nvmet_execute_auth_send(struct nvmet_req *req); 881 u32 nvmet_auth_receive_data_len(struct nvmet_req *req); 882 void nvmet_execute_auth_receive(struct nvmet_req *req); 883 int nvmet_auth_set_key(struct nvmet_host *host, const char *secret, 884 bool set_ctrl); 885 int nvmet_auth_set_host_hash(struct nvmet_host *host, const char *hash); 886 u8 nvmet_setup_auth(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq); 887 void nvmet_auth_sq_init(struct nvmet_sq *sq); 888 void nvmet_destroy_auth(struct nvmet_ctrl *ctrl); 889 void nvmet_auth_sq_free(struct nvmet_sq *sq); 890 int nvmet_setup_dhgroup(struct nvmet_ctrl *ctrl, u8 dhgroup_id); 891 bool nvmet_check_auth_status(struct nvmet_req *req); 892 int nvmet_auth_host_hash(struct nvmet_req *req, u8 *response, 893 unsigned int hash_len); 894 int nvmet_auth_ctrl_hash(struct nvmet_req *req, u8 *response, 895 unsigned int hash_len); 896 static inline bool nvmet_has_auth(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq) 897 { 898 return ctrl->host_key != NULL && !nvmet_queue_tls_keyid(sq); 899 } 900 int nvmet_auth_ctrl_exponential(struct nvmet_req *req, 901 u8 *buf, int buf_size); 902 int nvmet_auth_ctrl_sesskey(struct nvmet_req *req, 903 u8 *buf, int buf_size); 904 void nvmet_auth_insert_psk(struct nvmet_sq *sq); 905 #else 906 static inline u8 nvmet_setup_auth(struct nvmet_ctrl *ctrl, 907 struct nvmet_sq *sq) 908 { 909 return 0; 910 } 911 static inline void nvmet_auth_sq_init(struct nvmet_sq *sq) 912 { 913 } 914 static inline void nvmet_destroy_auth(struct nvmet_ctrl *ctrl) {}; 915 static inline void nvmet_auth_sq_free(struct nvmet_sq *sq) {}; 916 static inline bool nvmet_check_auth_status(struct nvmet_req *req) 917 { 918 return true; 919 } 920 static inline bool nvmet_has_auth(struct nvmet_ctrl *ctrl, 921 struct nvmet_sq *sq) 922 { 923 return false; 924 } 925 static inline const char *nvmet_dhchap_dhgroup_name(u8 dhgid) { return NULL; } 926 static inline void nvmet_auth_insert_psk(struct nvmet_sq *sq) {}; 927 #endif 928 929 int nvmet_pr_init_ns(struct nvmet_ns *ns); 930 u16 nvmet_parse_pr_cmd(struct nvmet_req *req); 931 u16 nvmet_pr_check_cmd_access(struct nvmet_req *req); 932 int nvmet_ctrl_init_pr(struct nvmet_ctrl *ctrl); 933 void nvmet_ctrl_destroy_pr(struct nvmet_ctrl *ctrl); 934 void nvmet_pr_exit_ns(struct nvmet_ns *ns); 935 void nvmet_execute_get_log_page_resv(struct nvmet_req *req); 936 u16 nvmet_set_feat_resv_notif_mask(struct nvmet_req *req, u32 mask); 937 u16 nvmet_get_feat_resv_notif_mask(struct nvmet_req *req); 938 u16 nvmet_pr_get_ns_pc_ref(struct nvmet_req *req); 939 static inline void nvmet_pr_put_ns_pc_ref(struct nvmet_pr_per_ctrl_ref *pc_ref) 940 { 941 percpu_ref_put(&pc_ref->ref); 942 } 943 944 /* 945 * Data for the get_feature() and set_feature() operations of PCI target 946 * controllers. 947 */ 948 struct nvmet_feat_irq_coalesce { 949 u8 thr; 950 u8 time; 951 }; 952 953 struct nvmet_feat_irq_config { 954 u16 iv; 955 bool cd; 956 }; 957 958 struct nvmet_feat_arbitration { 959 u8 hpw; 960 u8 mpw; 961 u8 lpw; 962 u8 ab; 963 }; 964 965 #endif /* _NVMET_H */ 966