1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Common code for the NVMe target. 4 * Copyright (c) 2015-2016 HGST, a Western Digital Company. 5 */ 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 #include <linux/module.h> 8 #include <linux/random.h> 9 #include <linux/rculist.h> 10 #include <linux/pci-p2pdma.h> 11 #include <linux/scatterlist.h> 12 13 #include <generated/utsrelease.h> 14 15 #define CREATE_TRACE_POINTS 16 #include "trace.h" 17 18 #include "nvmet.h" 19 #include "debugfs.h" 20 21 struct kmem_cache *nvmet_bvec_cache; 22 struct workqueue_struct *buffered_io_wq; 23 struct workqueue_struct *zbd_wq; 24 static const struct nvmet_fabrics_ops *nvmet_transports[NVMF_TRTYPE_MAX]; 25 static DEFINE_IDA(cntlid_ida); 26 27 struct workqueue_struct *nvmet_wq; 28 EXPORT_SYMBOL_GPL(nvmet_wq); 29 30 /* 31 * This read/write semaphore is used to synchronize access to configuration 32 * information on a target system that will result in discovery log page 33 * information change for at least one host. 34 * The full list of resources to protected by this semaphore is: 35 * 36 * - subsystems list 37 * - per-subsystem allowed hosts list 38 * - allow_any_host subsystem attribute 39 * - nvmet_genctr 40 * - the nvmet_transports array 41 * 42 * When updating any of those lists/structures write lock should be obtained, 43 * while when reading (popolating discovery log page or checking host-subsystem 44 * link) read lock is obtained to allow concurrent reads. 45 */ 46 DECLARE_RWSEM(nvmet_config_sem); 47 48 u32 nvmet_ana_group_enabled[NVMET_MAX_ANAGRPS + 1]; 49 u64 nvmet_ana_chgcnt; 50 DECLARE_RWSEM(nvmet_ana_sem); 51 52 inline u16 errno_to_nvme_status(struct nvmet_req *req, int errno) 53 { 54 switch (errno) { 55 case 0: 56 return NVME_SC_SUCCESS; 57 case -ENOSPC: 58 req->error_loc = offsetof(struct nvme_rw_command, length); 59 return NVME_SC_CAP_EXCEEDED | NVME_STATUS_DNR; 60 case -EREMOTEIO: 61 req->error_loc = offsetof(struct nvme_rw_command, slba); 62 return NVME_SC_LBA_RANGE | NVME_STATUS_DNR; 63 case -EOPNOTSUPP: 64 req->error_loc = offsetof(struct nvme_common_command, opcode); 65 switch (req->cmd->common.opcode) { 66 case nvme_cmd_dsm: 67 case nvme_cmd_write_zeroes: 68 return NVME_SC_ONCS_NOT_SUPPORTED | NVME_STATUS_DNR; 69 default: 70 return NVME_SC_INVALID_OPCODE | NVME_STATUS_DNR; 71 } 72 break; 73 case -ENODATA: 74 req->error_loc = offsetof(struct nvme_rw_command, nsid); 75 return NVME_SC_ACCESS_DENIED; 76 case -EIO: 77 fallthrough; 78 default: 79 req->error_loc = offsetof(struct nvme_common_command, opcode); 80 return NVME_SC_INTERNAL | NVME_STATUS_DNR; 81 } 82 } 83 84 u16 nvmet_report_invalid_opcode(struct nvmet_req *req) 85 { 86 pr_debug("unhandled cmd %d on qid %d\n", req->cmd->common.opcode, 87 req->sq->qid); 88 89 req->error_loc = offsetof(struct nvme_common_command, opcode); 90 return NVME_SC_INVALID_OPCODE | NVME_STATUS_DNR; 91 } 92 93 static struct nvmet_subsys *nvmet_find_get_subsys(struct nvmet_port *port, 94 const char *subsysnqn); 95 96 u16 nvmet_copy_to_sgl(struct nvmet_req *req, off_t off, const void *buf, 97 size_t len) 98 { 99 if (sg_pcopy_from_buffer(req->sg, req->sg_cnt, buf, len, off) != len) { 100 req->error_loc = offsetof(struct nvme_common_command, dptr); 101 return NVME_SC_SGL_INVALID_DATA | NVME_STATUS_DNR; 102 } 103 return 0; 104 } 105 106 u16 nvmet_copy_from_sgl(struct nvmet_req *req, off_t off, void *buf, size_t len) 107 { 108 if (sg_pcopy_to_buffer(req->sg, req->sg_cnt, buf, len, off) != len) { 109 req->error_loc = offsetof(struct nvme_common_command, dptr); 110 return NVME_SC_SGL_INVALID_DATA | NVME_STATUS_DNR; 111 } 112 return 0; 113 } 114 115 u16 nvmet_zero_sgl(struct nvmet_req *req, off_t off, size_t len) 116 { 117 if (sg_zero_buffer(req->sg, req->sg_cnt, len, off) != len) { 118 req->error_loc = offsetof(struct nvme_common_command, dptr); 119 return NVME_SC_SGL_INVALID_DATA | NVME_STATUS_DNR; 120 } 121 return 0; 122 } 123 124 static u32 nvmet_max_nsid(struct nvmet_subsys *subsys) 125 { 126 struct nvmet_ns *cur; 127 unsigned long idx; 128 u32 nsid = 0; 129 130 nvmet_for_each_enabled_ns(&subsys->namespaces, idx, cur) 131 nsid = cur->nsid; 132 133 return nsid; 134 } 135 136 static u32 nvmet_async_event_result(struct nvmet_async_event *aen) 137 { 138 return aen->event_type | (aen->event_info << 8) | (aen->log_page << 16); 139 } 140 141 static void nvmet_async_events_failall(struct nvmet_ctrl *ctrl) 142 { 143 struct nvmet_req *req; 144 145 mutex_lock(&ctrl->lock); 146 while (ctrl->nr_async_event_cmds) { 147 req = ctrl->async_event_cmds[--ctrl->nr_async_event_cmds]; 148 mutex_unlock(&ctrl->lock); 149 nvmet_req_complete(req, NVME_SC_INTERNAL | NVME_STATUS_DNR); 150 mutex_lock(&ctrl->lock); 151 } 152 mutex_unlock(&ctrl->lock); 153 } 154 155 static void nvmet_async_events_process(struct nvmet_ctrl *ctrl) 156 { 157 struct nvmet_async_event *aen; 158 struct nvmet_req *req; 159 160 mutex_lock(&ctrl->lock); 161 while (ctrl->nr_async_event_cmds && !list_empty(&ctrl->async_events)) { 162 aen = list_first_entry(&ctrl->async_events, 163 struct nvmet_async_event, entry); 164 req = ctrl->async_event_cmds[--ctrl->nr_async_event_cmds]; 165 nvmet_set_result(req, nvmet_async_event_result(aen)); 166 167 list_del(&aen->entry); 168 kfree(aen); 169 170 mutex_unlock(&ctrl->lock); 171 trace_nvmet_async_event(ctrl, req->cqe->result.u32); 172 nvmet_req_complete(req, 0); 173 mutex_lock(&ctrl->lock); 174 } 175 mutex_unlock(&ctrl->lock); 176 } 177 178 static void nvmet_async_events_free(struct nvmet_ctrl *ctrl) 179 { 180 struct nvmet_async_event *aen, *tmp; 181 182 mutex_lock(&ctrl->lock); 183 list_for_each_entry_safe(aen, tmp, &ctrl->async_events, entry) { 184 list_del(&aen->entry); 185 kfree(aen); 186 } 187 mutex_unlock(&ctrl->lock); 188 } 189 190 static void nvmet_async_event_work(struct work_struct *work) 191 { 192 struct nvmet_ctrl *ctrl = 193 container_of(work, struct nvmet_ctrl, async_event_work); 194 195 nvmet_async_events_process(ctrl); 196 } 197 198 void nvmet_add_async_event(struct nvmet_ctrl *ctrl, u8 event_type, 199 u8 event_info, u8 log_page) 200 { 201 struct nvmet_async_event *aen; 202 203 aen = kmalloc(sizeof(*aen), GFP_KERNEL); 204 if (!aen) 205 return; 206 207 aen->event_type = event_type; 208 aen->event_info = event_info; 209 aen->log_page = log_page; 210 211 mutex_lock(&ctrl->lock); 212 list_add_tail(&aen->entry, &ctrl->async_events); 213 mutex_unlock(&ctrl->lock); 214 215 queue_work(nvmet_wq, &ctrl->async_event_work); 216 } 217 218 static void nvmet_add_to_changed_ns_log(struct nvmet_ctrl *ctrl, __le32 nsid) 219 { 220 u32 i; 221 222 mutex_lock(&ctrl->lock); 223 if (ctrl->nr_changed_ns > NVME_MAX_CHANGED_NAMESPACES) 224 goto out_unlock; 225 226 for (i = 0; i < ctrl->nr_changed_ns; i++) { 227 if (ctrl->changed_ns_list[i] == nsid) 228 goto out_unlock; 229 } 230 231 if (ctrl->nr_changed_ns == NVME_MAX_CHANGED_NAMESPACES) { 232 ctrl->changed_ns_list[0] = cpu_to_le32(0xffffffff); 233 ctrl->nr_changed_ns = U32_MAX; 234 goto out_unlock; 235 } 236 237 ctrl->changed_ns_list[ctrl->nr_changed_ns++] = nsid; 238 out_unlock: 239 mutex_unlock(&ctrl->lock); 240 } 241 242 void nvmet_ns_changed(struct nvmet_subsys *subsys, u32 nsid) 243 { 244 struct nvmet_ctrl *ctrl; 245 246 lockdep_assert_held(&subsys->lock); 247 248 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) { 249 nvmet_add_to_changed_ns_log(ctrl, cpu_to_le32(nsid)); 250 if (nvmet_aen_bit_disabled(ctrl, NVME_AEN_BIT_NS_ATTR)) 251 continue; 252 nvmet_add_async_event(ctrl, NVME_AER_NOTICE, 253 NVME_AER_NOTICE_NS_CHANGED, 254 NVME_LOG_CHANGED_NS); 255 } 256 } 257 258 void nvmet_send_ana_event(struct nvmet_subsys *subsys, 259 struct nvmet_port *port) 260 { 261 struct nvmet_ctrl *ctrl; 262 263 mutex_lock(&subsys->lock); 264 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) { 265 if (port && ctrl->port != port) 266 continue; 267 if (nvmet_aen_bit_disabled(ctrl, NVME_AEN_BIT_ANA_CHANGE)) 268 continue; 269 nvmet_add_async_event(ctrl, NVME_AER_NOTICE, 270 NVME_AER_NOTICE_ANA, NVME_LOG_ANA); 271 } 272 mutex_unlock(&subsys->lock); 273 } 274 275 void nvmet_port_send_ana_event(struct nvmet_port *port) 276 { 277 struct nvmet_subsys_link *p; 278 279 down_read(&nvmet_config_sem); 280 list_for_each_entry(p, &port->subsystems, entry) 281 nvmet_send_ana_event(p->subsys, port); 282 up_read(&nvmet_config_sem); 283 } 284 285 int nvmet_register_transport(const struct nvmet_fabrics_ops *ops) 286 { 287 int ret = 0; 288 289 down_write(&nvmet_config_sem); 290 if (nvmet_transports[ops->type]) 291 ret = -EINVAL; 292 else 293 nvmet_transports[ops->type] = ops; 294 up_write(&nvmet_config_sem); 295 296 return ret; 297 } 298 EXPORT_SYMBOL_GPL(nvmet_register_transport); 299 300 void nvmet_unregister_transport(const struct nvmet_fabrics_ops *ops) 301 { 302 down_write(&nvmet_config_sem); 303 nvmet_transports[ops->type] = NULL; 304 up_write(&nvmet_config_sem); 305 } 306 EXPORT_SYMBOL_GPL(nvmet_unregister_transport); 307 308 void nvmet_port_del_ctrls(struct nvmet_port *port, struct nvmet_subsys *subsys) 309 { 310 struct nvmet_ctrl *ctrl; 311 312 mutex_lock(&subsys->lock); 313 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) { 314 if (ctrl->port == port) 315 ctrl->ops->delete_ctrl(ctrl); 316 } 317 mutex_unlock(&subsys->lock); 318 } 319 320 int nvmet_enable_port(struct nvmet_port *port) 321 { 322 const struct nvmet_fabrics_ops *ops; 323 int ret; 324 325 lockdep_assert_held(&nvmet_config_sem); 326 327 ops = nvmet_transports[port->disc_addr.trtype]; 328 if (!ops) { 329 up_write(&nvmet_config_sem); 330 request_module("nvmet-transport-%d", port->disc_addr.trtype); 331 down_write(&nvmet_config_sem); 332 ops = nvmet_transports[port->disc_addr.trtype]; 333 if (!ops) { 334 pr_err("transport type %d not supported\n", 335 port->disc_addr.trtype); 336 return -EINVAL; 337 } 338 } 339 340 if (!try_module_get(ops->owner)) 341 return -EINVAL; 342 343 /* 344 * If the user requested PI support and the transport isn't pi capable, 345 * don't enable the port. 346 */ 347 if (port->pi_enable && !(ops->flags & NVMF_METADATA_SUPPORTED)) { 348 pr_err("T10-PI is not supported by transport type %d\n", 349 port->disc_addr.trtype); 350 ret = -EINVAL; 351 goto out_put; 352 } 353 354 ret = ops->add_port(port); 355 if (ret) 356 goto out_put; 357 358 /* If the transport didn't set inline_data_size, then disable it. */ 359 if (port->inline_data_size < 0) 360 port->inline_data_size = 0; 361 362 /* 363 * If the transport didn't set the max_queue_size properly, then clamp 364 * it to the target limits. Also set default values in case the 365 * transport didn't set it at all. 366 */ 367 if (port->max_queue_size < 0) 368 port->max_queue_size = NVMET_MAX_QUEUE_SIZE; 369 else 370 port->max_queue_size = clamp_t(int, port->max_queue_size, 371 NVMET_MIN_QUEUE_SIZE, 372 NVMET_MAX_QUEUE_SIZE); 373 374 port->enabled = true; 375 port->tr_ops = ops; 376 return 0; 377 378 out_put: 379 module_put(ops->owner); 380 return ret; 381 } 382 383 void nvmet_disable_port(struct nvmet_port *port) 384 { 385 const struct nvmet_fabrics_ops *ops; 386 387 lockdep_assert_held(&nvmet_config_sem); 388 389 port->enabled = false; 390 port->tr_ops = NULL; 391 392 ops = nvmet_transports[port->disc_addr.trtype]; 393 ops->remove_port(port); 394 module_put(ops->owner); 395 } 396 397 static void nvmet_keep_alive_timer(struct work_struct *work) 398 { 399 struct nvmet_ctrl *ctrl = container_of(to_delayed_work(work), 400 struct nvmet_ctrl, ka_work); 401 bool reset_tbkas = ctrl->reset_tbkas; 402 403 ctrl->reset_tbkas = false; 404 if (reset_tbkas) { 405 pr_debug("ctrl %d reschedule traffic based keep-alive timer\n", 406 ctrl->cntlid); 407 queue_delayed_work(nvmet_wq, &ctrl->ka_work, ctrl->kato * HZ); 408 return; 409 } 410 411 pr_err("ctrl %d keep-alive timer (%d seconds) expired!\n", 412 ctrl->cntlid, ctrl->kato); 413 414 nvmet_ctrl_fatal_error(ctrl); 415 } 416 417 void nvmet_start_keep_alive_timer(struct nvmet_ctrl *ctrl) 418 { 419 if (unlikely(ctrl->kato == 0)) 420 return; 421 422 pr_debug("ctrl %d start keep-alive timer for %d secs\n", 423 ctrl->cntlid, ctrl->kato); 424 425 queue_delayed_work(nvmet_wq, &ctrl->ka_work, ctrl->kato * HZ); 426 } 427 428 void nvmet_stop_keep_alive_timer(struct nvmet_ctrl *ctrl) 429 { 430 if (unlikely(ctrl->kato == 0)) 431 return; 432 433 pr_debug("ctrl %d stop keep-alive\n", ctrl->cntlid); 434 435 cancel_delayed_work_sync(&ctrl->ka_work); 436 } 437 438 u16 nvmet_req_find_ns(struct nvmet_req *req) 439 { 440 u32 nsid = le32_to_cpu(req->cmd->common.nsid); 441 struct nvmet_subsys *subsys = nvmet_req_subsys(req); 442 443 req->ns = xa_load(&subsys->namespaces, nsid); 444 if (unlikely(!req->ns || !req->ns->enabled)) { 445 req->error_loc = offsetof(struct nvme_common_command, nsid); 446 if (!req->ns) /* ns doesn't exist! */ 447 return NVME_SC_INVALID_NS | NVME_STATUS_DNR; 448 449 /* ns exists but it's disabled */ 450 req->ns = NULL; 451 return NVME_SC_INTERNAL_PATH_ERROR; 452 } 453 454 percpu_ref_get(&req->ns->ref); 455 return NVME_SC_SUCCESS; 456 } 457 458 static void nvmet_destroy_namespace(struct percpu_ref *ref) 459 { 460 struct nvmet_ns *ns = container_of(ref, struct nvmet_ns, ref); 461 462 complete(&ns->disable_done); 463 } 464 465 void nvmet_put_namespace(struct nvmet_ns *ns) 466 { 467 percpu_ref_put(&ns->ref); 468 } 469 470 static void nvmet_ns_dev_disable(struct nvmet_ns *ns) 471 { 472 nvmet_bdev_ns_disable(ns); 473 nvmet_file_ns_disable(ns); 474 } 475 476 static int nvmet_p2pmem_ns_enable(struct nvmet_ns *ns) 477 { 478 int ret; 479 struct pci_dev *p2p_dev; 480 481 if (!ns->use_p2pmem) 482 return 0; 483 484 if (!ns->bdev) { 485 pr_err("peer-to-peer DMA is not supported by non-block device namespaces\n"); 486 return -EINVAL; 487 } 488 489 if (!blk_queue_pci_p2pdma(ns->bdev->bd_disk->queue)) { 490 pr_err("peer-to-peer DMA is not supported by the driver of %s\n", 491 ns->device_path); 492 return -EINVAL; 493 } 494 495 if (ns->p2p_dev) { 496 ret = pci_p2pdma_distance(ns->p2p_dev, nvmet_ns_dev(ns), true); 497 if (ret < 0) 498 return -EINVAL; 499 } else { 500 /* 501 * Right now we just check that there is p2pmem available so 502 * we can report an error to the user right away if there 503 * is not. We'll find the actual device to use once we 504 * setup the controller when the port's device is available. 505 */ 506 507 p2p_dev = pci_p2pmem_find(nvmet_ns_dev(ns)); 508 if (!p2p_dev) { 509 pr_err("no peer-to-peer memory is available for %s\n", 510 ns->device_path); 511 return -EINVAL; 512 } 513 514 pci_dev_put(p2p_dev); 515 } 516 517 return 0; 518 } 519 520 /* 521 * Note: ctrl->subsys->lock should be held when calling this function 522 */ 523 static void nvmet_p2pmem_ns_add_p2p(struct nvmet_ctrl *ctrl, 524 struct nvmet_ns *ns) 525 { 526 struct device *clients[2]; 527 struct pci_dev *p2p_dev; 528 int ret; 529 530 if (!ctrl->p2p_client || !ns->use_p2pmem) 531 return; 532 533 if (ns->p2p_dev) { 534 ret = pci_p2pdma_distance(ns->p2p_dev, ctrl->p2p_client, true); 535 if (ret < 0) 536 return; 537 538 p2p_dev = pci_dev_get(ns->p2p_dev); 539 } else { 540 clients[0] = ctrl->p2p_client; 541 clients[1] = nvmet_ns_dev(ns); 542 543 p2p_dev = pci_p2pmem_find_many(clients, ARRAY_SIZE(clients)); 544 if (!p2p_dev) { 545 pr_err("no peer-to-peer memory is available that's supported by %s and %s\n", 546 dev_name(ctrl->p2p_client), ns->device_path); 547 return; 548 } 549 } 550 551 ret = radix_tree_insert(&ctrl->p2p_ns_map, ns->nsid, p2p_dev); 552 if (ret < 0) 553 pci_dev_put(p2p_dev); 554 555 pr_info("using p2pmem on %s for nsid %d\n", pci_name(p2p_dev), 556 ns->nsid); 557 } 558 559 bool nvmet_ns_revalidate(struct nvmet_ns *ns) 560 { 561 loff_t oldsize = ns->size; 562 563 if (ns->bdev) 564 nvmet_bdev_ns_revalidate(ns); 565 else 566 nvmet_file_ns_revalidate(ns); 567 568 return oldsize != ns->size; 569 } 570 571 int nvmet_ns_enable(struct nvmet_ns *ns) 572 { 573 struct nvmet_subsys *subsys = ns->subsys; 574 struct nvmet_ctrl *ctrl; 575 int ret; 576 577 mutex_lock(&subsys->lock); 578 ret = 0; 579 580 if (nvmet_is_passthru_subsys(subsys)) { 581 pr_info("cannot enable both passthru and regular namespaces for a single subsystem"); 582 goto out_unlock; 583 } 584 585 if (ns->enabled) 586 goto out_unlock; 587 588 ret = -EMFILE; 589 590 ret = nvmet_bdev_ns_enable(ns); 591 if (ret == -ENOTBLK) 592 ret = nvmet_file_ns_enable(ns); 593 if (ret) 594 goto out_unlock; 595 596 ret = nvmet_p2pmem_ns_enable(ns); 597 if (ret) 598 goto out_dev_disable; 599 600 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) 601 nvmet_p2pmem_ns_add_p2p(ctrl, ns); 602 603 if (ns->pr.enable) { 604 ret = nvmet_pr_init_ns(ns); 605 if (ret) 606 goto out_dev_put; 607 } 608 609 if (percpu_ref_init(&ns->ref, nvmet_destroy_namespace, 0, GFP_KERNEL)) 610 goto out_pr_exit; 611 612 nvmet_ns_changed(subsys, ns->nsid); 613 ns->enabled = true; 614 xa_set_mark(&subsys->namespaces, ns->nsid, NVMET_NS_ENABLED); 615 ret = 0; 616 out_unlock: 617 mutex_unlock(&subsys->lock); 618 return ret; 619 out_pr_exit: 620 if (ns->pr.enable) 621 nvmet_pr_exit_ns(ns); 622 out_dev_put: 623 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) 624 pci_dev_put(radix_tree_delete(&ctrl->p2p_ns_map, ns->nsid)); 625 out_dev_disable: 626 nvmet_ns_dev_disable(ns); 627 goto out_unlock; 628 } 629 630 void nvmet_ns_disable(struct nvmet_ns *ns) 631 { 632 struct nvmet_subsys *subsys = ns->subsys; 633 struct nvmet_ctrl *ctrl; 634 635 mutex_lock(&subsys->lock); 636 if (!ns->enabled) 637 goto out_unlock; 638 639 ns->enabled = false; 640 xa_clear_mark(&subsys->namespaces, ns->nsid, NVMET_NS_ENABLED); 641 642 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) 643 pci_dev_put(radix_tree_delete(&ctrl->p2p_ns_map, ns->nsid)); 644 645 mutex_unlock(&subsys->lock); 646 647 /* 648 * Now that we removed the namespaces from the lookup list, we 649 * can kill the per_cpu ref and wait for any remaining references 650 * to be dropped, as well as a RCU grace period for anyone only 651 * using the namepace under rcu_read_lock(). Note that we can't 652 * use call_rcu here as we need to ensure the namespaces have 653 * been fully destroyed before unloading the module. 654 */ 655 percpu_ref_kill(&ns->ref); 656 synchronize_rcu(); 657 wait_for_completion(&ns->disable_done); 658 percpu_ref_exit(&ns->ref); 659 660 if (ns->pr.enable) 661 nvmet_pr_exit_ns(ns); 662 663 mutex_lock(&subsys->lock); 664 nvmet_ns_changed(subsys, ns->nsid); 665 nvmet_ns_dev_disable(ns); 666 out_unlock: 667 mutex_unlock(&subsys->lock); 668 } 669 670 void nvmet_ns_free(struct nvmet_ns *ns) 671 { 672 struct nvmet_subsys *subsys = ns->subsys; 673 674 nvmet_ns_disable(ns); 675 676 mutex_lock(&subsys->lock); 677 678 xa_erase(&subsys->namespaces, ns->nsid); 679 if (ns->nsid == subsys->max_nsid) 680 subsys->max_nsid = nvmet_max_nsid(subsys); 681 682 subsys->nr_namespaces--; 683 mutex_unlock(&subsys->lock); 684 685 down_write(&nvmet_ana_sem); 686 nvmet_ana_group_enabled[ns->anagrpid]--; 687 up_write(&nvmet_ana_sem); 688 689 kfree(ns->device_path); 690 kfree(ns); 691 } 692 693 struct nvmet_ns *nvmet_ns_alloc(struct nvmet_subsys *subsys, u32 nsid) 694 { 695 struct nvmet_ns *ns; 696 697 mutex_lock(&subsys->lock); 698 699 if (subsys->nr_namespaces == NVMET_MAX_NAMESPACES) 700 goto out_unlock; 701 702 ns = kzalloc(sizeof(*ns), GFP_KERNEL); 703 if (!ns) 704 goto out_unlock; 705 706 init_completion(&ns->disable_done); 707 708 ns->nsid = nsid; 709 ns->subsys = subsys; 710 711 if (ns->nsid > subsys->max_nsid) 712 subsys->max_nsid = nsid; 713 714 if (xa_insert(&subsys->namespaces, ns->nsid, ns, GFP_KERNEL)) 715 goto out_exit; 716 717 subsys->nr_namespaces++; 718 719 mutex_unlock(&subsys->lock); 720 721 down_write(&nvmet_ana_sem); 722 ns->anagrpid = NVMET_DEFAULT_ANA_GRPID; 723 nvmet_ana_group_enabled[ns->anagrpid]++; 724 up_write(&nvmet_ana_sem); 725 726 uuid_gen(&ns->uuid); 727 ns->buffered_io = false; 728 ns->csi = NVME_CSI_NVM; 729 730 return ns; 731 out_exit: 732 subsys->max_nsid = nvmet_max_nsid(subsys); 733 kfree(ns); 734 out_unlock: 735 mutex_unlock(&subsys->lock); 736 return NULL; 737 } 738 739 static void nvmet_update_sq_head(struct nvmet_req *req) 740 { 741 if (req->sq->size) { 742 u32 old_sqhd, new_sqhd; 743 744 old_sqhd = READ_ONCE(req->sq->sqhd); 745 do { 746 new_sqhd = (old_sqhd + 1) % req->sq->size; 747 } while (!try_cmpxchg(&req->sq->sqhd, &old_sqhd, new_sqhd)); 748 } 749 req->cqe->sq_head = cpu_to_le16(req->sq->sqhd & 0x0000FFFF); 750 } 751 752 static void nvmet_set_error(struct nvmet_req *req, u16 status) 753 { 754 struct nvmet_ctrl *ctrl = req->sq->ctrl; 755 struct nvme_error_slot *new_error_slot; 756 unsigned long flags; 757 758 req->cqe->status = cpu_to_le16(status << 1); 759 760 if (!ctrl || req->error_loc == NVMET_NO_ERROR_LOC) 761 return; 762 763 spin_lock_irqsave(&ctrl->error_lock, flags); 764 ctrl->err_counter++; 765 new_error_slot = 766 &ctrl->slots[ctrl->err_counter % NVMET_ERROR_LOG_SLOTS]; 767 768 new_error_slot->error_count = cpu_to_le64(ctrl->err_counter); 769 new_error_slot->sqid = cpu_to_le16(req->sq->qid); 770 new_error_slot->cmdid = cpu_to_le16(req->cmd->common.command_id); 771 new_error_slot->status_field = cpu_to_le16(status << 1); 772 new_error_slot->param_error_location = cpu_to_le16(req->error_loc); 773 new_error_slot->lba = cpu_to_le64(req->error_slba); 774 new_error_slot->nsid = req->cmd->common.nsid; 775 spin_unlock_irqrestore(&ctrl->error_lock, flags); 776 777 /* set the more bit for this request */ 778 req->cqe->status |= cpu_to_le16(1 << 14); 779 } 780 781 static void __nvmet_req_complete(struct nvmet_req *req, u16 status) 782 { 783 struct nvmet_ns *ns = req->ns; 784 struct nvmet_pr_per_ctrl_ref *pc_ref = req->pc_ref; 785 786 if (!req->sq->sqhd_disabled) 787 nvmet_update_sq_head(req); 788 req->cqe->sq_id = cpu_to_le16(req->sq->qid); 789 req->cqe->command_id = req->cmd->common.command_id; 790 791 if (unlikely(status)) 792 nvmet_set_error(req, status); 793 794 trace_nvmet_req_complete(req); 795 796 req->ops->queue_response(req); 797 798 if (pc_ref) 799 nvmet_pr_put_ns_pc_ref(pc_ref); 800 if (ns) 801 nvmet_put_namespace(ns); 802 } 803 804 void nvmet_req_complete(struct nvmet_req *req, u16 status) 805 { 806 struct nvmet_sq *sq = req->sq; 807 808 __nvmet_req_complete(req, status); 809 percpu_ref_put(&sq->ref); 810 } 811 EXPORT_SYMBOL_GPL(nvmet_req_complete); 812 813 void nvmet_cq_setup(struct nvmet_ctrl *ctrl, struct nvmet_cq *cq, 814 u16 qid, u16 size) 815 { 816 cq->qid = qid; 817 cq->size = size; 818 } 819 820 void nvmet_sq_setup(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq, 821 u16 qid, u16 size) 822 { 823 sq->sqhd = 0; 824 sq->qid = qid; 825 sq->size = size; 826 827 ctrl->sqs[qid] = sq; 828 } 829 830 static void nvmet_confirm_sq(struct percpu_ref *ref) 831 { 832 struct nvmet_sq *sq = container_of(ref, struct nvmet_sq, ref); 833 834 complete(&sq->confirm_done); 835 } 836 837 u16 nvmet_check_cqid(struct nvmet_ctrl *ctrl, u16 cqid) 838 { 839 if (!ctrl->sqs) 840 return NVME_SC_INTERNAL | NVME_STATUS_DNR; 841 842 if (cqid > ctrl->subsys->max_qid) 843 return NVME_SC_QID_INVALID | NVME_STATUS_DNR; 844 845 /* 846 * Note: For PCI controllers, the NVMe specifications allows multiple 847 * SQs to share a single CQ. However, we do not support this yet, so 848 * check that there is no SQ defined for a CQ. If one exist, then the 849 * CQ ID is invalid for creation as well as when the CQ is being 850 * deleted (as that would mean that the SQ was not deleted before the 851 * CQ). 852 */ 853 if (ctrl->sqs[cqid]) 854 return NVME_SC_QID_INVALID | NVME_STATUS_DNR; 855 856 return NVME_SC_SUCCESS; 857 } 858 859 u16 nvmet_cq_create(struct nvmet_ctrl *ctrl, struct nvmet_cq *cq, 860 u16 qid, u16 size) 861 { 862 u16 status; 863 864 status = nvmet_check_cqid(ctrl, qid); 865 if (status != NVME_SC_SUCCESS) 866 return status; 867 868 nvmet_cq_setup(ctrl, cq, qid, size); 869 870 return NVME_SC_SUCCESS; 871 } 872 EXPORT_SYMBOL_GPL(nvmet_cq_create); 873 874 u16 nvmet_check_sqid(struct nvmet_ctrl *ctrl, u16 sqid, 875 bool create) 876 { 877 if (!ctrl->sqs) 878 return NVME_SC_INTERNAL | NVME_STATUS_DNR; 879 880 if (sqid > ctrl->subsys->max_qid) 881 return NVME_SC_QID_INVALID | NVME_STATUS_DNR; 882 883 if ((create && ctrl->sqs[sqid]) || 884 (!create && !ctrl->sqs[sqid])) 885 return NVME_SC_QID_INVALID | NVME_STATUS_DNR; 886 887 return NVME_SC_SUCCESS; 888 } 889 890 u16 nvmet_sq_create(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq, 891 u16 sqid, u16 size) 892 { 893 u16 status; 894 int ret; 895 896 if (!kref_get_unless_zero(&ctrl->ref)) 897 return NVME_SC_INTERNAL | NVME_STATUS_DNR; 898 899 status = nvmet_check_sqid(ctrl, sqid, true); 900 if (status != NVME_SC_SUCCESS) 901 return status; 902 903 ret = nvmet_sq_init(sq); 904 if (ret) { 905 status = NVME_SC_INTERNAL | NVME_STATUS_DNR; 906 goto ctrl_put; 907 } 908 909 nvmet_sq_setup(ctrl, sq, sqid, size); 910 sq->ctrl = ctrl; 911 912 return NVME_SC_SUCCESS; 913 914 ctrl_put: 915 nvmet_ctrl_put(ctrl); 916 return status; 917 } 918 EXPORT_SYMBOL_GPL(nvmet_sq_create); 919 920 void nvmet_sq_destroy(struct nvmet_sq *sq) 921 { 922 struct nvmet_ctrl *ctrl = sq->ctrl; 923 924 /* 925 * If this is the admin queue, complete all AERs so that our 926 * queue doesn't have outstanding requests on it. 927 */ 928 if (ctrl && ctrl->sqs && ctrl->sqs[0] == sq) 929 nvmet_async_events_failall(ctrl); 930 percpu_ref_kill_and_confirm(&sq->ref, nvmet_confirm_sq); 931 wait_for_completion(&sq->confirm_done); 932 wait_for_completion(&sq->free_done); 933 percpu_ref_exit(&sq->ref); 934 nvmet_auth_sq_free(sq); 935 936 /* 937 * we must reference the ctrl again after waiting for inflight IO 938 * to complete. Because admin connect may have sneaked in after we 939 * store sq->ctrl locally, but before we killed the percpu_ref. the 940 * admin connect allocates and assigns sq->ctrl, which now needs a 941 * final ref put, as this ctrl is going away. 942 */ 943 ctrl = sq->ctrl; 944 945 if (ctrl) { 946 /* 947 * The teardown flow may take some time, and the host may not 948 * send us keep-alive during this period, hence reset the 949 * traffic based keep-alive timer so we don't trigger a 950 * controller teardown as a result of a keep-alive expiration. 951 */ 952 ctrl->reset_tbkas = true; 953 sq->ctrl->sqs[sq->qid] = NULL; 954 nvmet_ctrl_put(ctrl); 955 sq->ctrl = NULL; /* allows reusing the queue later */ 956 } 957 } 958 EXPORT_SYMBOL_GPL(nvmet_sq_destroy); 959 960 static void nvmet_sq_free(struct percpu_ref *ref) 961 { 962 struct nvmet_sq *sq = container_of(ref, struct nvmet_sq, ref); 963 964 complete(&sq->free_done); 965 } 966 967 int nvmet_sq_init(struct nvmet_sq *sq) 968 { 969 int ret; 970 971 ret = percpu_ref_init(&sq->ref, nvmet_sq_free, 0, GFP_KERNEL); 972 if (ret) { 973 pr_err("percpu_ref init failed!\n"); 974 return ret; 975 } 976 init_completion(&sq->free_done); 977 init_completion(&sq->confirm_done); 978 nvmet_auth_sq_init(sq); 979 980 return 0; 981 } 982 EXPORT_SYMBOL_GPL(nvmet_sq_init); 983 984 static inline u16 nvmet_check_ana_state(struct nvmet_port *port, 985 struct nvmet_ns *ns) 986 { 987 enum nvme_ana_state state = port->ana_state[ns->anagrpid]; 988 989 if (unlikely(state == NVME_ANA_INACCESSIBLE)) 990 return NVME_SC_ANA_INACCESSIBLE; 991 if (unlikely(state == NVME_ANA_PERSISTENT_LOSS)) 992 return NVME_SC_ANA_PERSISTENT_LOSS; 993 if (unlikely(state == NVME_ANA_CHANGE)) 994 return NVME_SC_ANA_TRANSITION; 995 return 0; 996 } 997 998 static inline u16 nvmet_io_cmd_check_access(struct nvmet_req *req) 999 { 1000 if (unlikely(req->ns->readonly)) { 1001 switch (req->cmd->common.opcode) { 1002 case nvme_cmd_read: 1003 case nvme_cmd_flush: 1004 break; 1005 default: 1006 return NVME_SC_NS_WRITE_PROTECTED; 1007 } 1008 } 1009 1010 return 0; 1011 } 1012 1013 static u32 nvmet_io_cmd_transfer_len(struct nvmet_req *req) 1014 { 1015 struct nvme_command *cmd = req->cmd; 1016 u32 metadata_len = 0; 1017 1018 if (nvme_is_fabrics(cmd)) 1019 return nvmet_fabrics_io_cmd_data_len(req); 1020 1021 if (!req->ns) 1022 return 0; 1023 1024 switch (req->cmd->common.opcode) { 1025 case nvme_cmd_read: 1026 case nvme_cmd_write: 1027 case nvme_cmd_zone_append: 1028 if (req->sq->ctrl->pi_support && nvmet_ns_has_pi(req->ns)) 1029 metadata_len = nvmet_rw_metadata_len(req); 1030 return nvmet_rw_data_len(req) + metadata_len; 1031 case nvme_cmd_dsm: 1032 return nvmet_dsm_len(req); 1033 case nvme_cmd_zone_mgmt_recv: 1034 return (le32_to_cpu(req->cmd->zmr.numd) + 1) << 2; 1035 default: 1036 return 0; 1037 } 1038 } 1039 1040 static u16 nvmet_parse_io_cmd(struct nvmet_req *req) 1041 { 1042 struct nvme_command *cmd = req->cmd; 1043 u16 ret; 1044 1045 if (nvme_is_fabrics(cmd)) 1046 return nvmet_parse_fabrics_io_cmd(req); 1047 1048 if (unlikely(!nvmet_check_auth_status(req))) 1049 return NVME_SC_AUTH_REQUIRED | NVME_STATUS_DNR; 1050 1051 ret = nvmet_check_ctrl_status(req); 1052 if (unlikely(ret)) 1053 return ret; 1054 1055 if (nvmet_is_passthru_req(req)) 1056 return nvmet_parse_passthru_io_cmd(req); 1057 1058 ret = nvmet_req_find_ns(req); 1059 if (unlikely(ret)) 1060 return ret; 1061 1062 ret = nvmet_check_ana_state(req->port, req->ns); 1063 if (unlikely(ret)) { 1064 req->error_loc = offsetof(struct nvme_common_command, nsid); 1065 return ret; 1066 } 1067 ret = nvmet_io_cmd_check_access(req); 1068 if (unlikely(ret)) { 1069 req->error_loc = offsetof(struct nvme_common_command, nsid); 1070 return ret; 1071 } 1072 1073 if (req->ns->pr.enable) { 1074 ret = nvmet_parse_pr_cmd(req); 1075 if (!ret) 1076 return ret; 1077 } 1078 1079 switch (req->ns->csi) { 1080 case NVME_CSI_NVM: 1081 if (req->ns->file) 1082 ret = nvmet_file_parse_io_cmd(req); 1083 else 1084 ret = nvmet_bdev_parse_io_cmd(req); 1085 break; 1086 case NVME_CSI_ZNS: 1087 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED)) 1088 ret = nvmet_bdev_zns_parse_io_cmd(req); 1089 else 1090 ret = NVME_SC_INVALID_IO_CMD_SET; 1091 break; 1092 default: 1093 ret = NVME_SC_INVALID_IO_CMD_SET; 1094 } 1095 if (ret) 1096 return ret; 1097 1098 if (req->ns->pr.enable) { 1099 ret = nvmet_pr_check_cmd_access(req); 1100 if (ret) 1101 return ret; 1102 1103 ret = nvmet_pr_get_ns_pc_ref(req); 1104 } 1105 return ret; 1106 } 1107 1108 bool nvmet_req_init(struct nvmet_req *req, struct nvmet_cq *cq, 1109 struct nvmet_sq *sq, const struct nvmet_fabrics_ops *ops) 1110 { 1111 u8 flags = req->cmd->common.flags; 1112 u16 status; 1113 1114 req->cq = cq; 1115 req->sq = sq; 1116 req->ops = ops; 1117 req->sg = NULL; 1118 req->metadata_sg = NULL; 1119 req->sg_cnt = 0; 1120 req->metadata_sg_cnt = 0; 1121 req->transfer_len = 0; 1122 req->metadata_len = 0; 1123 req->cqe->result.u64 = 0; 1124 req->cqe->status = 0; 1125 req->cqe->sq_head = 0; 1126 req->ns = NULL; 1127 req->error_loc = NVMET_NO_ERROR_LOC; 1128 req->error_slba = 0; 1129 req->pc_ref = NULL; 1130 1131 /* no support for fused commands yet */ 1132 if (unlikely(flags & (NVME_CMD_FUSE_FIRST | NVME_CMD_FUSE_SECOND))) { 1133 req->error_loc = offsetof(struct nvme_common_command, flags); 1134 status = NVME_SC_INVALID_FIELD | NVME_STATUS_DNR; 1135 goto fail; 1136 } 1137 1138 /* 1139 * For fabrics, PSDT field shall describe metadata pointer (MPTR) that 1140 * contains an address of a single contiguous physical buffer that is 1141 * byte aligned. For PCI controllers, this is optional so not enforced. 1142 */ 1143 if (unlikely((flags & NVME_CMD_SGL_ALL) != NVME_CMD_SGL_METABUF)) { 1144 if (!req->sq->ctrl || !nvmet_is_pci_ctrl(req->sq->ctrl)) { 1145 req->error_loc = 1146 offsetof(struct nvme_common_command, flags); 1147 status = NVME_SC_INVALID_FIELD | NVME_STATUS_DNR; 1148 goto fail; 1149 } 1150 } 1151 1152 if (unlikely(!req->sq->ctrl)) 1153 /* will return an error for any non-connect command: */ 1154 status = nvmet_parse_connect_cmd(req); 1155 else if (likely(req->sq->qid != 0)) 1156 status = nvmet_parse_io_cmd(req); 1157 else 1158 status = nvmet_parse_admin_cmd(req); 1159 1160 if (status) 1161 goto fail; 1162 1163 trace_nvmet_req_init(req, req->cmd); 1164 1165 if (unlikely(!percpu_ref_tryget_live(&sq->ref))) { 1166 status = NVME_SC_INVALID_FIELD | NVME_STATUS_DNR; 1167 goto fail; 1168 } 1169 1170 if (sq->ctrl) 1171 sq->ctrl->reset_tbkas = true; 1172 1173 return true; 1174 1175 fail: 1176 __nvmet_req_complete(req, status); 1177 return false; 1178 } 1179 EXPORT_SYMBOL_GPL(nvmet_req_init); 1180 1181 void nvmet_req_uninit(struct nvmet_req *req) 1182 { 1183 percpu_ref_put(&req->sq->ref); 1184 if (req->pc_ref) 1185 nvmet_pr_put_ns_pc_ref(req->pc_ref); 1186 if (req->ns) 1187 nvmet_put_namespace(req->ns); 1188 } 1189 EXPORT_SYMBOL_GPL(nvmet_req_uninit); 1190 1191 size_t nvmet_req_transfer_len(struct nvmet_req *req) 1192 { 1193 if (likely(req->sq->qid != 0)) 1194 return nvmet_io_cmd_transfer_len(req); 1195 if (unlikely(!req->sq->ctrl)) 1196 return nvmet_connect_cmd_data_len(req); 1197 return nvmet_admin_cmd_data_len(req); 1198 } 1199 EXPORT_SYMBOL_GPL(nvmet_req_transfer_len); 1200 1201 bool nvmet_check_transfer_len(struct nvmet_req *req, size_t len) 1202 { 1203 if (unlikely(len != req->transfer_len)) { 1204 u16 status; 1205 1206 req->error_loc = offsetof(struct nvme_common_command, dptr); 1207 if (req->cmd->common.flags & NVME_CMD_SGL_ALL) 1208 status = NVME_SC_SGL_INVALID_DATA; 1209 else 1210 status = NVME_SC_INVALID_FIELD; 1211 nvmet_req_complete(req, status | NVME_STATUS_DNR); 1212 return false; 1213 } 1214 1215 return true; 1216 } 1217 EXPORT_SYMBOL_GPL(nvmet_check_transfer_len); 1218 1219 bool nvmet_check_data_len_lte(struct nvmet_req *req, size_t data_len) 1220 { 1221 if (unlikely(data_len > req->transfer_len)) { 1222 u16 status; 1223 1224 req->error_loc = offsetof(struct nvme_common_command, dptr); 1225 if (req->cmd->common.flags & NVME_CMD_SGL_ALL) 1226 status = NVME_SC_SGL_INVALID_DATA; 1227 else 1228 status = NVME_SC_INVALID_FIELD; 1229 nvmet_req_complete(req, status | NVME_STATUS_DNR); 1230 return false; 1231 } 1232 1233 return true; 1234 } 1235 1236 static unsigned int nvmet_data_transfer_len(struct nvmet_req *req) 1237 { 1238 return req->transfer_len - req->metadata_len; 1239 } 1240 1241 static int nvmet_req_alloc_p2pmem_sgls(struct pci_dev *p2p_dev, 1242 struct nvmet_req *req) 1243 { 1244 req->sg = pci_p2pmem_alloc_sgl(p2p_dev, &req->sg_cnt, 1245 nvmet_data_transfer_len(req)); 1246 if (!req->sg) 1247 goto out_err; 1248 1249 if (req->metadata_len) { 1250 req->metadata_sg = pci_p2pmem_alloc_sgl(p2p_dev, 1251 &req->metadata_sg_cnt, req->metadata_len); 1252 if (!req->metadata_sg) 1253 goto out_free_sg; 1254 } 1255 1256 req->p2p_dev = p2p_dev; 1257 1258 return 0; 1259 out_free_sg: 1260 pci_p2pmem_free_sgl(req->p2p_dev, req->sg); 1261 out_err: 1262 return -ENOMEM; 1263 } 1264 1265 static struct pci_dev *nvmet_req_find_p2p_dev(struct nvmet_req *req) 1266 { 1267 if (!IS_ENABLED(CONFIG_PCI_P2PDMA) || 1268 !req->sq->ctrl || !req->sq->qid || !req->ns) 1269 return NULL; 1270 return radix_tree_lookup(&req->sq->ctrl->p2p_ns_map, req->ns->nsid); 1271 } 1272 1273 int nvmet_req_alloc_sgls(struct nvmet_req *req) 1274 { 1275 struct pci_dev *p2p_dev = nvmet_req_find_p2p_dev(req); 1276 1277 if (p2p_dev && !nvmet_req_alloc_p2pmem_sgls(p2p_dev, req)) 1278 return 0; 1279 1280 req->sg = sgl_alloc(nvmet_data_transfer_len(req), GFP_KERNEL, 1281 &req->sg_cnt); 1282 if (unlikely(!req->sg)) 1283 goto out; 1284 1285 if (req->metadata_len) { 1286 req->metadata_sg = sgl_alloc(req->metadata_len, GFP_KERNEL, 1287 &req->metadata_sg_cnt); 1288 if (unlikely(!req->metadata_sg)) 1289 goto out_free; 1290 } 1291 1292 return 0; 1293 out_free: 1294 sgl_free(req->sg); 1295 out: 1296 return -ENOMEM; 1297 } 1298 EXPORT_SYMBOL_GPL(nvmet_req_alloc_sgls); 1299 1300 void nvmet_req_free_sgls(struct nvmet_req *req) 1301 { 1302 if (req->p2p_dev) { 1303 pci_p2pmem_free_sgl(req->p2p_dev, req->sg); 1304 if (req->metadata_sg) 1305 pci_p2pmem_free_sgl(req->p2p_dev, req->metadata_sg); 1306 req->p2p_dev = NULL; 1307 } else { 1308 sgl_free(req->sg); 1309 if (req->metadata_sg) 1310 sgl_free(req->metadata_sg); 1311 } 1312 1313 req->sg = NULL; 1314 req->metadata_sg = NULL; 1315 req->sg_cnt = 0; 1316 req->metadata_sg_cnt = 0; 1317 } 1318 EXPORT_SYMBOL_GPL(nvmet_req_free_sgls); 1319 1320 static inline bool nvmet_css_supported(u8 cc_css) 1321 { 1322 switch (cc_css << NVME_CC_CSS_SHIFT) { 1323 case NVME_CC_CSS_NVM: 1324 case NVME_CC_CSS_CSI: 1325 return true; 1326 default: 1327 return false; 1328 } 1329 } 1330 1331 static void nvmet_start_ctrl(struct nvmet_ctrl *ctrl) 1332 { 1333 lockdep_assert_held(&ctrl->lock); 1334 1335 /* 1336 * Only I/O controllers should verify iosqes,iocqes. 1337 * Strictly speaking, the spec says a discovery controller 1338 * should verify iosqes,iocqes are zeroed, however that 1339 * would break backwards compatibility, so don't enforce it. 1340 */ 1341 if (!nvmet_is_disc_subsys(ctrl->subsys) && 1342 (nvmet_cc_iosqes(ctrl->cc) != NVME_NVM_IOSQES || 1343 nvmet_cc_iocqes(ctrl->cc) != NVME_NVM_IOCQES)) { 1344 ctrl->csts = NVME_CSTS_CFS; 1345 return; 1346 } 1347 1348 if (nvmet_cc_mps(ctrl->cc) != 0 || 1349 nvmet_cc_ams(ctrl->cc) != 0 || 1350 !nvmet_css_supported(nvmet_cc_css(ctrl->cc))) { 1351 ctrl->csts = NVME_CSTS_CFS; 1352 return; 1353 } 1354 1355 ctrl->csts = NVME_CSTS_RDY; 1356 1357 /* 1358 * Controllers that are not yet enabled should not really enforce the 1359 * keep alive timeout, but we still want to track a timeout and cleanup 1360 * in case a host died before it enabled the controller. Hence, simply 1361 * reset the keep alive timer when the controller is enabled. 1362 */ 1363 if (ctrl->kato) 1364 mod_delayed_work(nvmet_wq, &ctrl->ka_work, ctrl->kato * HZ); 1365 } 1366 1367 static void nvmet_clear_ctrl(struct nvmet_ctrl *ctrl) 1368 { 1369 lockdep_assert_held(&ctrl->lock); 1370 1371 /* XXX: tear down queues? */ 1372 ctrl->csts &= ~NVME_CSTS_RDY; 1373 ctrl->cc = 0; 1374 } 1375 1376 void nvmet_update_cc(struct nvmet_ctrl *ctrl, u32 new) 1377 { 1378 u32 old; 1379 1380 mutex_lock(&ctrl->lock); 1381 old = ctrl->cc; 1382 ctrl->cc = new; 1383 1384 if (nvmet_cc_en(new) && !nvmet_cc_en(old)) 1385 nvmet_start_ctrl(ctrl); 1386 if (!nvmet_cc_en(new) && nvmet_cc_en(old)) 1387 nvmet_clear_ctrl(ctrl); 1388 if (nvmet_cc_shn(new) && !nvmet_cc_shn(old)) { 1389 nvmet_clear_ctrl(ctrl); 1390 ctrl->csts |= NVME_CSTS_SHST_CMPLT; 1391 } 1392 if (!nvmet_cc_shn(new) && nvmet_cc_shn(old)) 1393 ctrl->csts &= ~NVME_CSTS_SHST_CMPLT; 1394 mutex_unlock(&ctrl->lock); 1395 } 1396 EXPORT_SYMBOL_GPL(nvmet_update_cc); 1397 1398 static void nvmet_init_cap(struct nvmet_ctrl *ctrl) 1399 { 1400 /* command sets supported: NVMe command set: */ 1401 ctrl->cap = (1ULL << 37); 1402 /* Controller supports one or more I/O Command Sets */ 1403 ctrl->cap |= (1ULL << 43); 1404 /* CC.EN timeout in 500msec units: */ 1405 ctrl->cap |= (15ULL << 24); 1406 /* maximum queue entries supported: */ 1407 if (ctrl->ops->get_max_queue_size) 1408 ctrl->cap |= min_t(u16, ctrl->ops->get_max_queue_size(ctrl), 1409 ctrl->port->max_queue_size) - 1; 1410 else 1411 ctrl->cap |= ctrl->port->max_queue_size - 1; 1412 1413 if (nvmet_is_passthru_subsys(ctrl->subsys)) 1414 nvmet_passthrough_override_cap(ctrl); 1415 } 1416 1417 struct nvmet_ctrl *nvmet_ctrl_find_get(const char *subsysnqn, 1418 const char *hostnqn, u16 cntlid, 1419 struct nvmet_req *req) 1420 { 1421 struct nvmet_ctrl *ctrl = NULL; 1422 struct nvmet_subsys *subsys; 1423 1424 subsys = nvmet_find_get_subsys(req->port, subsysnqn); 1425 if (!subsys) { 1426 pr_warn("connect request for invalid subsystem %s!\n", 1427 subsysnqn); 1428 req->cqe->result.u32 = IPO_IATTR_CONNECT_DATA(subsysnqn); 1429 goto out; 1430 } 1431 1432 mutex_lock(&subsys->lock); 1433 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) { 1434 if (ctrl->cntlid == cntlid) { 1435 if (strncmp(hostnqn, ctrl->hostnqn, NVMF_NQN_SIZE)) { 1436 pr_warn("hostnqn mismatch.\n"); 1437 continue; 1438 } 1439 if (!kref_get_unless_zero(&ctrl->ref)) 1440 continue; 1441 1442 /* ctrl found */ 1443 goto found; 1444 } 1445 } 1446 1447 ctrl = NULL; /* ctrl not found */ 1448 pr_warn("could not find controller %d for subsys %s / host %s\n", 1449 cntlid, subsysnqn, hostnqn); 1450 req->cqe->result.u32 = IPO_IATTR_CONNECT_DATA(cntlid); 1451 1452 found: 1453 mutex_unlock(&subsys->lock); 1454 nvmet_subsys_put(subsys); 1455 out: 1456 return ctrl; 1457 } 1458 1459 u16 nvmet_check_ctrl_status(struct nvmet_req *req) 1460 { 1461 if (unlikely(!(req->sq->ctrl->cc & NVME_CC_ENABLE))) { 1462 pr_err("got cmd %d while CC.EN == 0 on qid = %d\n", 1463 req->cmd->common.opcode, req->sq->qid); 1464 return NVME_SC_CMD_SEQ_ERROR | NVME_STATUS_DNR; 1465 } 1466 1467 if (unlikely(!(req->sq->ctrl->csts & NVME_CSTS_RDY))) { 1468 pr_err("got cmd %d while CSTS.RDY == 0 on qid = %d\n", 1469 req->cmd->common.opcode, req->sq->qid); 1470 return NVME_SC_CMD_SEQ_ERROR | NVME_STATUS_DNR; 1471 } 1472 1473 if (unlikely(!nvmet_check_auth_status(req))) { 1474 pr_warn("qid %d not authenticated\n", req->sq->qid); 1475 return NVME_SC_AUTH_REQUIRED | NVME_STATUS_DNR; 1476 } 1477 return 0; 1478 } 1479 1480 bool nvmet_host_allowed(struct nvmet_subsys *subsys, const char *hostnqn) 1481 { 1482 struct nvmet_host_link *p; 1483 1484 lockdep_assert_held(&nvmet_config_sem); 1485 1486 if (subsys->allow_any_host) 1487 return true; 1488 1489 if (nvmet_is_disc_subsys(subsys)) /* allow all access to disc subsys */ 1490 return true; 1491 1492 list_for_each_entry(p, &subsys->hosts, entry) { 1493 if (!strcmp(nvmet_host_name(p->host), hostnqn)) 1494 return true; 1495 } 1496 1497 return false; 1498 } 1499 1500 /* 1501 * Note: ctrl->subsys->lock should be held when calling this function 1502 */ 1503 static void nvmet_setup_p2p_ns_map(struct nvmet_ctrl *ctrl, 1504 struct device *p2p_client) 1505 { 1506 struct nvmet_ns *ns; 1507 unsigned long idx; 1508 1509 if (!p2p_client) 1510 return; 1511 1512 ctrl->p2p_client = get_device(p2p_client); 1513 1514 nvmet_for_each_enabled_ns(&ctrl->subsys->namespaces, idx, ns) 1515 nvmet_p2pmem_ns_add_p2p(ctrl, ns); 1516 } 1517 1518 /* 1519 * Note: ctrl->subsys->lock should be held when calling this function 1520 */ 1521 static void nvmet_release_p2p_ns_map(struct nvmet_ctrl *ctrl) 1522 { 1523 struct radix_tree_iter iter; 1524 void __rcu **slot; 1525 1526 radix_tree_for_each_slot(slot, &ctrl->p2p_ns_map, &iter, 0) 1527 pci_dev_put(radix_tree_deref_slot(slot)); 1528 1529 put_device(ctrl->p2p_client); 1530 } 1531 1532 static void nvmet_fatal_error_handler(struct work_struct *work) 1533 { 1534 struct nvmet_ctrl *ctrl = 1535 container_of(work, struct nvmet_ctrl, fatal_err_work); 1536 1537 pr_err("ctrl %d fatal error occurred!\n", ctrl->cntlid); 1538 ctrl->ops->delete_ctrl(ctrl); 1539 } 1540 1541 struct nvmet_ctrl *nvmet_alloc_ctrl(struct nvmet_alloc_ctrl_args *args) 1542 { 1543 struct nvmet_subsys *subsys; 1544 struct nvmet_ctrl *ctrl; 1545 u32 kato = args->kato; 1546 u8 dhchap_status; 1547 int ret; 1548 1549 args->status = NVME_SC_CONNECT_INVALID_PARAM | NVME_STATUS_DNR; 1550 subsys = nvmet_find_get_subsys(args->port, args->subsysnqn); 1551 if (!subsys) { 1552 pr_warn("connect request for invalid subsystem %s!\n", 1553 args->subsysnqn); 1554 args->result = IPO_IATTR_CONNECT_DATA(subsysnqn); 1555 args->error_loc = offsetof(struct nvme_common_command, dptr); 1556 return NULL; 1557 } 1558 1559 down_read(&nvmet_config_sem); 1560 if (!nvmet_host_allowed(subsys, args->hostnqn)) { 1561 pr_info("connect by host %s for subsystem %s not allowed\n", 1562 args->hostnqn, args->subsysnqn); 1563 args->result = IPO_IATTR_CONNECT_DATA(hostnqn); 1564 up_read(&nvmet_config_sem); 1565 args->status = NVME_SC_CONNECT_INVALID_HOST | NVME_STATUS_DNR; 1566 args->error_loc = offsetof(struct nvme_common_command, dptr); 1567 goto out_put_subsystem; 1568 } 1569 up_read(&nvmet_config_sem); 1570 1571 args->status = NVME_SC_INTERNAL; 1572 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); 1573 if (!ctrl) 1574 goto out_put_subsystem; 1575 mutex_init(&ctrl->lock); 1576 1577 ctrl->port = args->port; 1578 ctrl->ops = args->ops; 1579 1580 #ifdef CONFIG_NVME_TARGET_PASSTHRU 1581 /* By default, set loop targets to clear IDS by default */ 1582 if (ctrl->port->disc_addr.trtype == NVMF_TRTYPE_LOOP) 1583 subsys->clear_ids = 1; 1584 #endif 1585 1586 INIT_WORK(&ctrl->async_event_work, nvmet_async_event_work); 1587 INIT_LIST_HEAD(&ctrl->async_events); 1588 INIT_RADIX_TREE(&ctrl->p2p_ns_map, GFP_KERNEL); 1589 INIT_WORK(&ctrl->fatal_err_work, nvmet_fatal_error_handler); 1590 INIT_DELAYED_WORK(&ctrl->ka_work, nvmet_keep_alive_timer); 1591 1592 memcpy(ctrl->subsysnqn, args->subsysnqn, NVMF_NQN_SIZE); 1593 memcpy(ctrl->hostnqn, args->hostnqn, NVMF_NQN_SIZE); 1594 1595 kref_init(&ctrl->ref); 1596 ctrl->subsys = subsys; 1597 ctrl->pi_support = ctrl->port->pi_enable && ctrl->subsys->pi_support; 1598 nvmet_init_cap(ctrl); 1599 WRITE_ONCE(ctrl->aen_enabled, NVMET_AEN_CFG_OPTIONAL); 1600 1601 ctrl->changed_ns_list = kmalloc_array(NVME_MAX_CHANGED_NAMESPACES, 1602 sizeof(__le32), GFP_KERNEL); 1603 if (!ctrl->changed_ns_list) 1604 goto out_free_ctrl; 1605 1606 ctrl->sqs = kcalloc(subsys->max_qid + 1, 1607 sizeof(struct nvmet_sq *), 1608 GFP_KERNEL); 1609 if (!ctrl->sqs) 1610 goto out_free_changed_ns_list; 1611 1612 ret = ida_alloc_range(&cntlid_ida, 1613 subsys->cntlid_min, subsys->cntlid_max, 1614 GFP_KERNEL); 1615 if (ret < 0) { 1616 args->status = NVME_SC_CONNECT_CTRL_BUSY | NVME_STATUS_DNR; 1617 goto out_free_sqs; 1618 } 1619 ctrl->cntlid = ret; 1620 1621 uuid_copy(&ctrl->hostid, args->hostid); 1622 1623 /* 1624 * Discovery controllers may use some arbitrary high value 1625 * in order to cleanup stale discovery sessions 1626 */ 1627 if (nvmet_is_disc_subsys(ctrl->subsys) && !kato) 1628 kato = NVMET_DISC_KATO_MS; 1629 1630 /* keep-alive timeout in seconds */ 1631 ctrl->kato = DIV_ROUND_UP(kato, 1000); 1632 1633 ctrl->err_counter = 0; 1634 spin_lock_init(&ctrl->error_lock); 1635 1636 nvmet_start_keep_alive_timer(ctrl); 1637 1638 mutex_lock(&subsys->lock); 1639 ret = nvmet_ctrl_init_pr(ctrl); 1640 if (ret) 1641 goto init_pr_fail; 1642 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 1643 nvmet_setup_p2p_ns_map(ctrl, args->p2p_client); 1644 nvmet_debugfs_ctrl_setup(ctrl); 1645 mutex_unlock(&subsys->lock); 1646 1647 if (args->hostid) 1648 uuid_copy(&ctrl->hostid, args->hostid); 1649 1650 dhchap_status = nvmet_setup_auth(ctrl); 1651 if (dhchap_status) { 1652 pr_err("Failed to setup authentication, dhchap status %u\n", 1653 dhchap_status); 1654 nvmet_ctrl_put(ctrl); 1655 if (dhchap_status == NVME_AUTH_DHCHAP_FAILURE_FAILED) 1656 args->status = 1657 NVME_SC_CONNECT_INVALID_HOST | NVME_STATUS_DNR; 1658 else 1659 args->status = NVME_SC_INTERNAL; 1660 return NULL; 1661 } 1662 1663 args->status = NVME_SC_SUCCESS; 1664 1665 pr_info("Created %s controller %d for subsystem %s for NQN %s%s%s.\n", 1666 nvmet_is_disc_subsys(ctrl->subsys) ? "discovery" : "nvm", 1667 ctrl->cntlid, ctrl->subsys->subsysnqn, ctrl->hostnqn, 1668 ctrl->pi_support ? " T10-PI is enabled" : "", 1669 nvmet_has_auth(ctrl) ? " with DH-HMAC-CHAP" : ""); 1670 1671 return ctrl; 1672 1673 init_pr_fail: 1674 mutex_unlock(&subsys->lock); 1675 nvmet_stop_keep_alive_timer(ctrl); 1676 ida_free(&cntlid_ida, ctrl->cntlid); 1677 out_free_sqs: 1678 kfree(ctrl->sqs); 1679 out_free_changed_ns_list: 1680 kfree(ctrl->changed_ns_list); 1681 out_free_ctrl: 1682 kfree(ctrl); 1683 out_put_subsystem: 1684 nvmet_subsys_put(subsys); 1685 return NULL; 1686 } 1687 EXPORT_SYMBOL_GPL(nvmet_alloc_ctrl); 1688 1689 static void nvmet_ctrl_free(struct kref *ref) 1690 { 1691 struct nvmet_ctrl *ctrl = container_of(ref, struct nvmet_ctrl, ref); 1692 struct nvmet_subsys *subsys = ctrl->subsys; 1693 1694 mutex_lock(&subsys->lock); 1695 nvmet_ctrl_destroy_pr(ctrl); 1696 nvmet_release_p2p_ns_map(ctrl); 1697 list_del(&ctrl->subsys_entry); 1698 mutex_unlock(&subsys->lock); 1699 1700 nvmet_stop_keep_alive_timer(ctrl); 1701 1702 flush_work(&ctrl->async_event_work); 1703 cancel_work_sync(&ctrl->fatal_err_work); 1704 1705 nvmet_destroy_auth(ctrl); 1706 1707 nvmet_debugfs_ctrl_free(ctrl); 1708 1709 ida_free(&cntlid_ida, ctrl->cntlid); 1710 1711 nvmet_async_events_free(ctrl); 1712 kfree(ctrl->sqs); 1713 kfree(ctrl->changed_ns_list); 1714 kfree(ctrl); 1715 1716 nvmet_subsys_put(subsys); 1717 } 1718 1719 void nvmet_ctrl_put(struct nvmet_ctrl *ctrl) 1720 { 1721 kref_put(&ctrl->ref, nvmet_ctrl_free); 1722 } 1723 EXPORT_SYMBOL_GPL(nvmet_ctrl_put); 1724 1725 void nvmet_ctrl_fatal_error(struct nvmet_ctrl *ctrl) 1726 { 1727 mutex_lock(&ctrl->lock); 1728 if (!(ctrl->csts & NVME_CSTS_CFS)) { 1729 ctrl->csts |= NVME_CSTS_CFS; 1730 queue_work(nvmet_wq, &ctrl->fatal_err_work); 1731 } 1732 mutex_unlock(&ctrl->lock); 1733 } 1734 EXPORT_SYMBOL_GPL(nvmet_ctrl_fatal_error); 1735 1736 ssize_t nvmet_ctrl_host_traddr(struct nvmet_ctrl *ctrl, 1737 char *traddr, size_t traddr_len) 1738 { 1739 if (!ctrl->ops->host_traddr) 1740 return -EOPNOTSUPP; 1741 return ctrl->ops->host_traddr(ctrl, traddr, traddr_len); 1742 } 1743 1744 static struct nvmet_subsys *nvmet_find_get_subsys(struct nvmet_port *port, 1745 const char *subsysnqn) 1746 { 1747 struct nvmet_subsys_link *p; 1748 1749 if (!port) 1750 return NULL; 1751 1752 if (!strcmp(NVME_DISC_SUBSYS_NAME, subsysnqn)) { 1753 if (!kref_get_unless_zero(&nvmet_disc_subsys->ref)) 1754 return NULL; 1755 return nvmet_disc_subsys; 1756 } 1757 1758 down_read(&nvmet_config_sem); 1759 if (!strncmp(nvmet_disc_subsys->subsysnqn, subsysnqn, 1760 NVMF_NQN_SIZE)) { 1761 if (kref_get_unless_zero(&nvmet_disc_subsys->ref)) { 1762 up_read(&nvmet_config_sem); 1763 return nvmet_disc_subsys; 1764 } 1765 } 1766 list_for_each_entry(p, &port->subsystems, entry) { 1767 if (!strncmp(p->subsys->subsysnqn, subsysnqn, 1768 NVMF_NQN_SIZE)) { 1769 if (!kref_get_unless_zero(&p->subsys->ref)) 1770 break; 1771 up_read(&nvmet_config_sem); 1772 return p->subsys; 1773 } 1774 } 1775 up_read(&nvmet_config_sem); 1776 return NULL; 1777 } 1778 1779 struct nvmet_subsys *nvmet_subsys_alloc(const char *subsysnqn, 1780 enum nvme_subsys_type type) 1781 { 1782 struct nvmet_subsys *subsys; 1783 char serial[NVMET_SN_MAX_SIZE / 2]; 1784 int ret; 1785 1786 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 1787 if (!subsys) 1788 return ERR_PTR(-ENOMEM); 1789 1790 subsys->ver = NVMET_DEFAULT_VS; 1791 /* generate a random serial number as our controllers are ephemeral: */ 1792 get_random_bytes(&serial, sizeof(serial)); 1793 bin2hex(subsys->serial, &serial, sizeof(serial)); 1794 1795 subsys->model_number = kstrdup(NVMET_DEFAULT_CTRL_MODEL, GFP_KERNEL); 1796 if (!subsys->model_number) { 1797 ret = -ENOMEM; 1798 goto free_subsys; 1799 } 1800 1801 subsys->ieee_oui = 0; 1802 1803 subsys->firmware_rev = kstrndup(UTS_RELEASE, NVMET_FR_MAX_SIZE, GFP_KERNEL); 1804 if (!subsys->firmware_rev) { 1805 ret = -ENOMEM; 1806 goto free_mn; 1807 } 1808 1809 switch (type) { 1810 case NVME_NQN_NVME: 1811 subsys->max_qid = NVMET_NR_QUEUES; 1812 break; 1813 case NVME_NQN_DISC: 1814 case NVME_NQN_CURR: 1815 subsys->max_qid = 0; 1816 break; 1817 default: 1818 pr_err("%s: Unknown Subsystem type - %d\n", __func__, type); 1819 ret = -EINVAL; 1820 goto free_fr; 1821 } 1822 subsys->type = type; 1823 subsys->subsysnqn = kstrndup(subsysnqn, NVMF_NQN_SIZE, 1824 GFP_KERNEL); 1825 if (!subsys->subsysnqn) { 1826 ret = -ENOMEM; 1827 goto free_fr; 1828 } 1829 subsys->cntlid_min = NVME_CNTLID_MIN; 1830 subsys->cntlid_max = NVME_CNTLID_MAX; 1831 kref_init(&subsys->ref); 1832 1833 mutex_init(&subsys->lock); 1834 xa_init(&subsys->namespaces); 1835 INIT_LIST_HEAD(&subsys->ctrls); 1836 INIT_LIST_HEAD(&subsys->hosts); 1837 1838 ret = nvmet_debugfs_subsys_setup(subsys); 1839 if (ret) 1840 goto free_subsysnqn; 1841 1842 return subsys; 1843 1844 free_subsysnqn: 1845 kfree(subsys->subsysnqn); 1846 free_fr: 1847 kfree(subsys->firmware_rev); 1848 free_mn: 1849 kfree(subsys->model_number); 1850 free_subsys: 1851 kfree(subsys); 1852 return ERR_PTR(ret); 1853 } 1854 1855 static void nvmet_subsys_free(struct kref *ref) 1856 { 1857 struct nvmet_subsys *subsys = 1858 container_of(ref, struct nvmet_subsys, ref); 1859 1860 WARN_ON_ONCE(!xa_empty(&subsys->namespaces)); 1861 1862 nvmet_debugfs_subsys_free(subsys); 1863 1864 xa_destroy(&subsys->namespaces); 1865 nvmet_passthru_subsys_free(subsys); 1866 1867 kfree(subsys->subsysnqn); 1868 kfree(subsys->model_number); 1869 kfree(subsys->firmware_rev); 1870 kfree(subsys); 1871 } 1872 1873 void nvmet_subsys_del_ctrls(struct nvmet_subsys *subsys) 1874 { 1875 struct nvmet_ctrl *ctrl; 1876 1877 mutex_lock(&subsys->lock); 1878 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) 1879 ctrl->ops->delete_ctrl(ctrl); 1880 mutex_unlock(&subsys->lock); 1881 } 1882 1883 void nvmet_subsys_put(struct nvmet_subsys *subsys) 1884 { 1885 kref_put(&subsys->ref, nvmet_subsys_free); 1886 } 1887 1888 static int __init nvmet_init(void) 1889 { 1890 int error = -ENOMEM; 1891 1892 nvmet_ana_group_enabled[NVMET_DEFAULT_ANA_GRPID] = 1; 1893 1894 nvmet_bvec_cache = kmem_cache_create("nvmet-bvec", 1895 NVMET_MAX_MPOOL_BVEC * sizeof(struct bio_vec), 0, 1896 SLAB_HWCACHE_ALIGN, NULL); 1897 if (!nvmet_bvec_cache) 1898 return -ENOMEM; 1899 1900 zbd_wq = alloc_workqueue("nvmet-zbd-wq", WQ_MEM_RECLAIM, 0); 1901 if (!zbd_wq) 1902 goto out_destroy_bvec_cache; 1903 1904 buffered_io_wq = alloc_workqueue("nvmet-buffered-io-wq", 1905 WQ_MEM_RECLAIM, 0); 1906 if (!buffered_io_wq) 1907 goto out_free_zbd_work_queue; 1908 1909 nvmet_wq = alloc_workqueue("nvmet-wq", 1910 WQ_MEM_RECLAIM | WQ_UNBOUND | WQ_SYSFS, 0); 1911 if (!nvmet_wq) 1912 goto out_free_buffered_work_queue; 1913 1914 error = nvmet_init_discovery(); 1915 if (error) 1916 goto out_free_nvmet_work_queue; 1917 1918 error = nvmet_init_debugfs(); 1919 if (error) 1920 goto out_exit_discovery; 1921 1922 error = nvmet_init_configfs(); 1923 if (error) 1924 goto out_exit_debugfs; 1925 1926 return 0; 1927 1928 out_exit_debugfs: 1929 nvmet_exit_debugfs(); 1930 out_exit_discovery: 1931 nvmet_exit_discovery(); 1932 out_free_nvmet_work_queue: 1933 destroy_workqueue(nvmet_wq); 1934 out_free_buffered_work_queue: 1935 destroy_workqueue(buffered_io_wq); 1936 out_free_zbd_work_queue: 1937 destroy_workqueue(zbd_wq); 1938 out_destroy_bvec_cache: 1939 kmem_cache_destroy(nvmet_bvec_cache); 1940 return error; 1941 } 1942 1943 static void __exit nvmet_exit(void) 1944 { 1945 nvmet_exit_configfs(); 1946 nvmet_exit_debugfs(); 1947 nvmet_exit_discovery(); 1948 ida_destroy(&cntlid_ida); 1949 destroy_workqueue(nvmet_wq); 1950 destroy_workqueue(buffered_io_wq); 1951 destroy_workqueue(zbd_wq); 1952 kmem_cache_destroy(nvmet_bvec_cache); 1953 1954 BUILD_BUG_ON(sizeof(struct nvmf_disc_rsp_page_entry) != 1024); 1955 BUILD_BUG_ON(sizeof(struct nvmf_disc_rsp_page_hdr) != 1024); 1956 } 1957 1958 module_init(nvmet_init); 1959 module_exit(nvmet_exit); 1960 1961 MODULE_DESCRIPTION("NVMe target core framework"); 1962 MODULE_LICENSE("GPL v2"); 1963