1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Common code for the NVMe target. 4 * Copyright (c) 2015-2016 HGST, a Western Digital Company. 5 */ 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 #include <linux/hex.h> 8 #include <linux/module.h> 9 #include <linux/random.h> 10 #include <linux/rculist.h> 11 #include <linux/pci-p2pdma.h> 12 #include <linux/scatterlist.h> 13 14 #include <generated/utsrelease.h> 15 16 #define CREATE_TRACE_POINTS 17 #include "trace.h" 18 19 #include "nvmet.h" 20 #include "debugfs.h" 21 22 struct kmem_cache *nvmet_bvec_cache; 23 struct workqueue_struct *buffered_io_wq; 24 struct workqueue_struct *zbd_wq; 25 static const struct nvmet_fabrics_ops *nvmet_transports[NVMF_TRTYPE_MAX]; 26 static DEFINE_IDA(cntlid_ida); 27 28 struct workqueue_struct *nvmet_wq; 29 EXPORT_SYMBOL_GPL(nvmet_wq); 30 struct workqueue_struct *nvmet_aen_wq; 31 EXPORT_SYMBOL_GPL(nvmet_aen_wq); 32 33 /* 34 * This read/write semaphore is used to synchronize access to configuration 35 * information on a target system that will result in discovery log page 36 * information change for at least one host. 37 * The full list of resources to protected by this semaphore is: 38 * 39 * - subsystems list 40 * - per-subsystem allowed hosts list 41 * - allow_any_host subsystem attribute 42 * - nvmet_genctr 43 * - the nvmet_transports array 44 * 45 * When updating any of those lists/structures write lock should be obtained, 46 * while when reading (populating discovery log page or checking host-subsystem 47 * link) read lock is obtained to allow concurrent reads. 48 */ 49 DECLARE_RWSEM(nvmet_config_sem); 50 51 u32 nvmet_ana_group_enabled[NVMET_MAX_ANAGRPS + 1]; 52 u64 nvmet_ana_chgcnt; 53 DECLARE_RWSEM(nvmet_ana_sem); 54 55 inline u16 errno_to_nvme_status(struct nvmet_req *req, int errno) 56 { 57 switch (errno) { 58 case 0: 59 return NVME_SC_SUCCESS; 60 case -ENOSPC: 61 req->error_loc = offsetof(struct nvme_rw_command, length); 62 return NVME_SC_CAP_EXCEEDED | NVME_STATUS_DNR; 63 case -EREMOTEIO: 64 req->error_loc = offsetof(struct nvme_rw_command, slba); 65 return NVME_SC_LBA_RANGE | NVME_STATUS_DNR; 66 case -EOPNOTSUPP: 67 req->error_loc = offsetof(struct nvme_common_command, opcode); 68 return NVME_SC_INVALID_OPCODE | NVME_STATUS_DNR; 69 case -ENODATA: 70 req->error_loc = offsetof(struct nvme_rw_command, nsid); 71 return NVME_SC_ACCESS_DENIED; 72 case -EIO: 73 fallthrough; 74 default: 75 req->error_loc = offsetof(struct nvme_common_command, opcode); 76 return NVME_SC_INTERNAL | NVME_STATUS_DNR; 77 } 78 } 79 80 u16 nvmet_report_invalid_opcode(struct nvmet_req *req) 81 { 82 pr_debug("unhandled cmd %d on qid %d\n", req->cmd->common.opcode, 83 req->sq->qid); 84 85 req->error_loc = offsetof(struct nvme_common_command, opcode); 86 return NVME_SC_INVALID_OPCODE | NVME_STATUS_DNR; 87 } 88 89 static struct nvmet_subsys *nvmet_find_get_subsys(struct nvmet_port *port, 90 const char *subsysnqn); 91 92 u16 nvmet_copy_to_sgl(struct nvmet_req *req, off_t off, const void *buf, 93 size_t len) 94 { 95 if (sg_pcopy_from_buffer(req->sg, req->sg_cnt, buf, len, off) != len) { 96 req->error_loc = offsetof(struct nvme_common_command, dptr); 97 return NVME_SC_SGL_INVALID_DATA | NVME_STATUS_DNR; 98 } 99 return 0; 100 } 101 102 u16 nvmet_copy_from_sgl(struct nvmet_req *req, off_t off, void *buf, size_t len) 103 { 104 if (sg_pcopy_to_buffer(req->sg, req->sg_cnt, buf, len, off) != len) { 105 req->error_loc = offsetof(struct nvme_common_command, dptr); 106 return NVME_SC_SGL_INVALID_DATA | NVME_STATUS_DNR; 107 } 108 return 0; 109 } 110 111 u16 nvmet_zero_sgl(struct nvmet_req *req, off_t off, size_t len) 112 { 113 if (sg_zero_buffer(req->sg, req->sg_cnt, len, off) != len) { 114 req->error_loc = offsetof(struct nvme_common_command, dptr); 115 return NVME_SC_SGL_INVALID_DATA | NVME_STATUS_DNR; 116 } 117 return 0; 118 } 119 120 static u32 nvmet_max_nsid(struct nvmet_subsys *subsys) 121 { 122 struct nvmet_ns *cur; 123 unsigned long idx; 124 u32 nsid = 0; 125 126 nvmet_for_each_enabled_ns(&subsys->namespaces, idx, cur) 127 nsid = cur->nsid; 128 129 return nsid; 130 } 131 132 static u32 nvmet_async_event_result(struct nvmet_async_event *aen) 133 { 134 return aen->event_type | (aen->event_info << 8) | (aen->log_page << 16); 135 } 136 137 static void nvmet_async_events_failall(struct nvmet_ctrl *ctrl) 138 { 139 struct nvmet_req *req; 140 141 mutex_lock(&ctrl->lock); 142 while (ctrl->nr_async_event_cmds) { 143 req = ctrl->async_event_cmds[--ctrl->nr_async_event_cmds]; 144 mutex_unlock(&ctrl->lock); 145 nvmet_req_complete(req, NVME_SC_INTERNAL | NVME_STATUS_DNR); 146 mutex_lock(&ctrl->lock); 147 } 148 mutex_unlock(&ctrl->lock); 149 } 150 151 static void nvmet_async_events_process(struct nvmet_ctrl *ctrl) 152 { 153 struct nvmet_async_event *aen; 154 struct nvmet_req *req; 155 156 mutex_lock(&ctrl->lock); 157 while (ctrl->nr_async_event_cmds && !list_empty(&ctrl->async_events)) { 158 aen = list_first_entry(&ctrl->async_events, 159 struct nvmet_async_event, entry); 160 req = ctrl->async_event_cmds[--ctrl->nr_async_event_cmds]; 161 nvmet_set_result(req, nvmet_async_event_result(aen)); 162 163 list_del(&aen->entry); 164 kfree(aen); 165 166 mutex_unlock(&ctrl->lock); 167 trace_nvmet_async_event(ctrl, req->cqe->result.u32); 168 nvmet_req_complete(req, 0); 169 mutex_lock(&ctrl->lock); 170 } 171 mutex_unlock(&ctrl->lock); 172 } 173 174 static void nvmet_async_events_free(struct nvmet_ctrl *ctrl) 175 { 176 struct nvmet_async_event *aen, *tmp; 177 178 mutex_lock(&ctrl->lock); 179 list_for_each_entry_safe(aen, tmp, &ctrl->async_events, entry) { 180 list_del(&aen->entry); 181 kfree(aen); 182 } 183 mutex_unlock(&ctrl->lock); 184 } 185 186 static void nvmet_async_event_work(struct work_struct *work) 187 { 188 struct nvmet_ctrl *ctrl = 189 container_of(work, struct nvmet_ctrl, async_event_work); 190 191 nvmet_async_events_process(ctrl); 192 } 193 194 void nvmet_add_async_event(struct nvmet_ctrl *ctrl, u8 event_type, 195 u8 event_info, u8 log_page) 196 { 197 struct nvmet_async_event *aen; 198 199 aen = kmalloc_obj(*aen); 200 if (!aen) 201 return; 202 203 aen->event_type = event_type; 204 aen->event_info = event_info; 205 aen->log_page = log_page; 206 207 mutex_lock(&ctrl->lock); 208 list_add_tail(&aen->entry, &ctrl->async_events); 209 mutex_unlock(&ctrl->lock); 210 211 queue_work(nvmet_aen_wq, &ctrl->async_event_work); 212 } 213 214 static void nvmet_add_to_changed_ns_log(struct nvmet_ctrl *ctrl, __le32 nsid) 215 { 216 u32 i; 217 218 mutex_lock(&ctrl->lock); 219 if (ctrl->nr_changed_ns > NVME_MAX_CHANGED_NAMESPACES) 220 goto out_unlock; 221 222 for (i = 0; i < ctrl->nr_changed_ns; i++) { 223 if (ctrl->changed_ns_list[i] == nsid) 224 goto out_unlock; 225 } 226 227 if (ctrl->nr_changed_ns == NVME_MAX_CHANGED_NAMESPACES) { 228 ctrl->changed_ns_list[0] = cpu_to_le32(0xffffffff); 229 ctrl->nr_changed_ns = U32_MAX; 230 goto out_unlock; 231 } 232 233 ctrl->changed_ns_list[ctrl->nr_changed_ns++] = nsid; 234 out_unlock: 235 mutex_unlock(&ctrl->lock); 236 } 237 238 void nvmet_ns_changed(struct nvmet_subsys *subsys, u32 nsid) 239 { 240 struct nvmet_ctrl *ctrl; 241 242 lockdep_assert_held(&subsys->lock); 243 244 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) { 245 nvmet_add_to_changed_ns_log(ctrl, cpu_to_le32(nsid)); 246 if (nvmet_aen_bit_disabled(ctrl, NVME_AEN_BIT_NS_ATTR)) 247 continue; 248 nvmet_add_async_event(ctrl, NVME_AER_NOTICE, 249 NVME_AER_NOTICE_NS_CHANGED, 250 NVME_LOG_CHANGED_NS); 251 } 252 } 253 254 void nvmet_send_ana_event(struct nvmet_subsys *subsys, 255 struct nvmet_port *port) 256 { 257 struct nvmet_ctrl *ctrl; 258 259 mutex_lock(&subsys->lock); 260 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) { 261 if (port && ctrl->port != port) 262 continue; 263 if (nvmet_aen_bit_disabled(ctrl, NVME_AEN_BIT_ANA_CHANGE)) 264 continue; 265 nvmet_add_async_event(ctrl, NVME_AER_NOTICE, 266 NVME_AER_NOTICE_ANA, NVME_LOG_ANA); 267 } 268 mutex_unlock(&subsys->lock); 269 } 270 271 void nvmet_port_send_ana_event(struct nvmet_port *port) 272 { 273 struct nvmet_subsys_link *p; 274 275 down_read(&nvmet_config_sem); 276 list_for_each_entry(p, &port->subsystems, entry) 277 nvmet_send_ana_event(p->subsys, port); 278 up_read(&nvmet_config_sem); 279 } 280 281 int nvmet_register_transport(const struct nvmet_fabrics_ops *ops) 282 { 283 int ret = 0; 284 285 down_write(&nvmet_config_sem); 286 if (nvmet_transports[ops->type]) 287 ret = -EINVAL; 288 else 289 nvmet_transports[ops->type] = ops; 290 up_write(&nvmet_config_sem); 291 292 return ret; 293 } 294 EXPORT_SYMBOL_GPL(nvmet_register_transport); 295 296 void nvmet_unregister_transport(const struct nvmet_fabrics_ops *ops) 297 { 298 down_write(&nvmet_config_sem); 299 nvmet_transports[ops->type] = NULL; 300 up_write(&nvmet_config_sem); 301 } 302 EXPORT_SYMBOL_GPL(nvmet_unregister_transport); 303 304 void nvmet_port_del_ctrls(struct nvmet_port *port, struct nvmet_subsys *subsys) 305 { 306 struct nvmet_ctrl *ctrl; 307 308 mutex_lock(&subsys->lock); 309 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) { 310 if (ctrl->port == port) 311 ctrl->ops->delete_ctrl(ctrl); 312 } 313 mutex_unlock(&subsys->lock); 314 } 315 316 int nvmet_enable_port(struct nvmet_port *port) 317 { 318 const struct nvmet_fabrics_ops *ops; 319 int ret; 320 321 lockdep_assert_held(&nvmet_config_sem); 322 323 if (port->disc_addr.trtype == NVMF_TRTYPE_MAX) 324 return -EINVAL; 325 326 ops = nvmet_transports[port->disc_addr.trtype]; 327 if (!ops) { 328 up_write(&nvmet_config_sem); 329 request_module("nvmet-transport-%d", port->disc_addr.trtype); 330 down_write(&nvmet_config_sem); 331 ops = nvmet_transports[port->disc_addr.trtype]; 332 if (!ops) { 333 pr_err("transport type %d not supported\n", 334 port->disc_addr.trtype); 335 return -EINVAL; 336 } 337 } 338 339 if (!try_module_get(ops->owner)) 340 return -EINVAL; 341 342 /* 343 * If the user requested PI support and the transport isn't pi capable, 344 * don't enable the port. 345 */ 346 if (port->pi_enable && !(ops->flags & NVMF_METADATA_SUPPORTED)) { 347 pr_err("T10-PI is not supported by transport type %d\n", 348 port->disc_addr.trtype); 349 ret = -EINVAL; 350 goto out_put; 351 } 352 353 ret = ops->add_port(port); 354 if (ret) 355 goto out_put; 356 357 /* If the transport didn't set inline_data_size, then disable it. */ 358 if (port->inline_data_size < 0) 359 port->inline_data_size = 0; 360 361 /* 362 * If the transport didn't set the max_queue_size properly, then clamp 363 * it to the target limits. Also set default values in case the 364 * transport didn't set it at all. 365 */ 366 if (port->max_queue_size < 0) 367 port->max_queue_size = NVMET_MAX_QUEUE_SIZE; 368 else 369 port->max_queue_size = clamp_t(int, port->max_queue_size, 370 NVMET_MIN_QUEUE_SIZE, 371 NVMET_MAX_QUEUE_SIZE); 372 373 /* 374 * If the transport didn't set the mdts properly, then clamp it to the 375 * target limits. Also set default values in case the transport didn't 376 * set it at all. 377 */ 378 if (port->mdts < 0 || port->mdts > NVMET_MAX_MDTS) 379 port->mdts = 0; 380 381 port->enabled = true; 382 port->tr_ops = ops; 383 return 0; 384 385 out_put: 386 module_put(ops->owner); 387 return ret; 388 } 389 390 void nvmet_disable_port(struct nvmet_port *port) 391 { 392 const struct nvmet_fabrics_ops *ops; 393 394 lockdep_assert_held(&nvmet_config_sem); 395 396 port->enabled = false; 397 port->tr_ops = NULL; 398 399 ops = nvmet_transports[port->disc_addr.trtype]; 400 ops->remove_port(port); 401 module_put(ops->owner); 402 } 403 404 static void nvmet_keep_alive_timer(struct work_struct *work) 405 { 406 struct nvmet_ctrl *ctrl = container_of(to_delayed_work(work), 407 struct nvmet_ctrl, ka_work); 408 bool reset_tbkas = ctrl->reset_tbkas; 409 410 ctrl->reset_tbkas = false; 411 if (reset_tbkas) { 412 pr_debug("ctrl %d reschedule traffic based keep-alive timer\n", 413 ctrl->cntlid); 414 queue_delayed_work(nvmet_wq, &ctrl->ka_work, ctrl->kato * HZ); 415 return; 416 } 417 418 pr_err("ctrl %d keep-alive timer (%d seconds) expired!\n", 419 ctrl->cntlid, ctrl->kato); 420 421 nvmet_ctrl_fatal_error(ctrl); 422 } 423 424 void nvmet_start_keep_alive_timer(struct nvmet_ctrl *ctrl) 425 { 426 if (unlikely(ctrl->kato == 0)) 427 return; 428 429 pr_debug("ctrl %d start keep-alive timer for %d secs\n", 430 ctrl->cntlid, ctrl->kato); 431 432 queue_delayed_work(nvmet_wq, &ctrl->ka_work, ctrl->kato * HZ); 433 } 434 435 void nvmet_stop_keep_alive_timer(struct nvmet_ctrl *ctrl) 436 { 437 if (unlikely(ctrl->kato == 0)) 438 return; 439 440 pr_debug("ctrl %d stop keep-alive\n", ctrl->cntlid); 441 442 cancel_delayed_work_sync(&ctrl->ka_work); 443 } 444 445 u16 nvmet_req_find_ns(struct nvmet_req *req) 446 { 447 u32 nsid = le32_to_cpu(req->cmd->common.nsid); 448 struct nvmet_subsys *subsys = nvmet_req_subsys(req); 449 450 req->ns = xa_load(&subsys->namespaces, nsid); 451 if (unlikely(!req->ns || !req->ns->enabled)) { 452 req->error_loc = offsetof(struct nvme_common_command, nsid); 453 if (!req->ns) /* ns doesn't exist! */ 454 return NVME_SC_INVALID_NS | NVME_STATUS_DNR; 455 456 /* ns exists but it's disabled */ 457 req->ns = NULL; 458 return NVME_SC_INTERNAL_PATH_ERROR; 459 } 460 461 percpu_ref_get(&req->ns->ref); 462 return NVME_SC_SUCCESS; 463 } 464 465 static void nvmet_destroy_namespace(struct percpu_ref *ref) 466 { 467 struct nvmet_ns *ns = container_of(ref, struct nvmet_ns, ref); 468 469 complete(&ns->disable_done); 470 } 471 472 void nvmet_put_namespace(struct nvmet_ns *ns) 473 { 474 percpu_ref_put(&ns->ref); 475 } 476 477 static void nvmet_ns_dev_disable(struct nvmet_ns *ns) 478 { 479 nvmet_bdev_ns_disable(ns); 480 nvmet_file_ns_disable(ns); 481 } 482 483 static int nvmet_p2pmem_ns_enable(struct nvmet_ns *ns) 484 { 485 int ret; 486 struct pci_dev *p2p_dev; 487 488 if (!ns->use_p2pmem) 489 return 0; 490 491 if (!ns->bdev) { 492 pr_err("peer-to-peer DMA is not supported by non-block device namespaces\n"); 493 return -EINVAL; 494 } 495 496 if (!blk_queue_pci_p2pdma(ns->bdev->bd_disk->queue)) { 497 pr_err("peer-to-peer DMA is not supported by the driver of %s\n", 498 ns->device_path); 499 return -EINVAL; 500 } 501 502 if (ns->p2p_dev) { 503 ret = pci_p2pdma_distance(ns->p2p_dev, nvmet_ns_dev(ns), true); 504 if (ret < 0) 505 return -EINVAL; 506 } else { 507 /* 508 * Right now we just check that there is p2pmem available so 509 * we can report an error to the user right away if there 510 * is not. We'll find the actual device to use once we 511 * setup the controller when the port's device is available. 512 */ 513 514 p2p_dev = pci_p2pmem_find(nvmet_ns_dev(ns)); 515 if (!p2p_dev) { 516 pr_err("no peer-to-peer memory is available for %s\n", 517 ns->device_path); 518 return -EINVAL; 519 } 520 521 pci_dev_put(p2p_dev); 522 } 523 524 return 0; 525 } 526 527 static void nvmet_p2pmem_ns_add_p2p(struct nvmet_ctrl *ctrl, 528 struct nvmet_ns *ns) 529 { 530 struct device *clients[2]; 531 struct pci_dev *p2p_dev; 532 int ret; 533 534 lockdep_assert_held(&ctrl->subsys->lock); 535 536 if (!ctrl->p2p_client || !ns->use_p2pmem) 537 return; 538 539 if (ns->p2p_dev) { 540 ret = pci_p2pdma_distance(ns->p2p_dev, ctrl->p2p_client, true); 541 if (ret < 0) 542 return; 543 544 p2p_dev = pci_dev_get(ns->p2p_dev); 545 } else { 546 clients[0] = ctrl->p2p_client; 547 clients[1] = nvmet_ns_dev(ns); 548 549 p2p_dev = pci_p2pmem_find_many(clients, ARRAY_SIZE(clients)); 550 if (!p2p_dev) { 551 pr_err("no peer-to-peer memory is available that's supported by %s and %s\n", 552 dev_name(ctrl->p2p_client), ns->device_path); 553 return; 554 } 555 } 556 557 ret = radix_tree_insert(&ctrl->p2p_ns_map, ns->nsid, p2p_dev); 558 if (ret < 0) 559 pci_dev_put(p2p_dev); 560 561 pr_info("using p2pmem on %s for nsid %u\n", pci_name(p2p_dev), 562 ns->nsid); 563 } 564 565 bool nvmet_ns_revalidate(struct nvmet_ns *ns) 566 { 567 loff_t oldsize = ns->size; 568 569 if (ns->bdev) 570 nvmet_bdev_ns_revalidate(ns); 571 else 572 nvmet_file_ns_revalidate(ns); 573 574 return oldsize != ns->size; 575 } 576 577 int nvmet_ns_enable(struct nvmet_ns *ns) 578 { 579 struct nvmet_subsys *subsys = ns->subsys; 580 struct nvmet_ctrl *ctrl; 581 int ret; 582 583 mutex_lock(&subsys->lock); 584 ret = 0; 585 586 if (nvmet_is_passthru_subsys(subsys)) { 587 pr_info("cannot enable both passthru and regular namespaces for a single subsystem"); 588 goto out_unlock; 589 } 590 591 if (ns->enabled) 592 goto out_unlock; 593 594 if (!ns->device_path) { 595 ret = -EINVAL; 596 goto out_unlock; 597 } 598 599 ret = nvmet_bdev_ns_enable(ns); 600 if (ret == -ENOTBLK) 601 ret = nvmet_file_ns_enable(ns); 602 if (ret) 603 goto out_unlock; 604 605 ret = nvmet_p2pmem_ns_enable(ns); 606 if (ret) 607 goto out_dev_disable; 608 609 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) 610 nvmet_p2pmem_ns_add_p2p(ctrl, ns); 611 612 if (ns->pr.enable) { 613 ret = nvmet_pr_init_ns(ns); 614 if (ret) 615 goto out_dev_put; 616 } 617 618 ret = percpu_ref_init(&ns->ref, nvmet_destroy_namespace, 0, GFP_KERNEL); 619 if (ret) 620 goto out_pr_exit; 621 622 nvmet_ns_changed(subsys, ns->nsid); 623 ns->enabled = true; 624 xa_set_mark(&subsys->namespaces, ns->nsid, NVMET_NS_ENABLED); 625 nvmet_debugfs_ns_setup(ns); 626 ret = 0; 627 out_unlock: 628 mutex_unlock(&subsys->lock); 629 return ret; 630 out_pr_exit: 631 if (ns->pr.enable) 632 nvmet_pr_exit_ns(ns); 633 out_dev_put: 634 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) 635 pci_dev_put(radix_tree_delete(&ctrl->p2p_ns_map, ns->nsid)); 636 out_dev_disable: 637 nvmet_ns_dev_disable(ns); 638 goto out_unlock; 639 } 640 641 void nvmet_ns_disable(struct nvmet_ns *ns) 642 { 643 struct nvmet_subsys *subsys = ns->subsys; 644 struct nvmet_ctrl *ctrl; 645 646 mutex_lock(&subsys->lock); 647 if (!ns->enabled) 648 goto out_unlock; 649 650 ns->enabled = false; 651 xa_clear_mark(&subsys->namespaces, ns->nsid, NVMET_NS_ENABLED); 652 nvmet_debugfs_ns_free(ns); 653 654 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) 655 pci_dev_put(radix_tree_delete(&ctrl->p2p_ns_map, ns->nsid)); 656 657 mutex_unlock(&subsys->lock); 658 659 /* 660 * Now that we removed the namespaces from the lookup list, we 661 * can kill the per_cpu ref and wait for any remaining references 662 * to be dropped, as well as a RCU grace period for anyone only 663 * using the namespace under rcu_read_lock(). Note that we can't 664 * use call_rcu here as we need to ensure the namespaces have 665 * been fully destroyed before unloading the module. 666 */ 667 percpu_ref_kill(&ns->ref); 668 synchronize_rcu(); 669 wait_for_completion(&ns->disable_done); 670 percpu_ref_exit(&ns->ref); 671 672 if (ns->pr.enable) 673 nvmet_pr_exit_ns(ns); 674 675 mutex_lock(&subsys->lock); 676 nvmet_ns_changed(subsys, ns->nsid); 677 nvmet_ns_dev_disable(ns); 678 out_unlock: 679 mutex_unlock(&subsys->lock); 680 } 681 682 void nvmet_ns_free(struct nvmet_ns *ns) 683 { 684 struct nvmet_subsys *subsys = ns->subsys; 685 686 nvmet_ns_disable(ns); 687 688 mutex_lock(&subsys->lock); 689 690 xa_erase(&subsys->namespaces, ns->nsid); 691 if (ns->nsid == subsys->max_nsid) 692 subsys->max_nsid = nvmet_max_nsid(subsys); 693 694 subsys->nr_namespaces--; 695 mutex_unlock(&subsys->lock); 696 697 down_write(&nvmet_ana_sem); 698 nvmet_ana_group_enabled[ns->anagrpid]--; 699 up_write(&nvmet_ana_sem); 700 701 kfree(ns->device_path); 702 kfree(ns); 703 } 704 705 struct nvmet_ns *nvmet_ns_alloc(struct nvmet_subsys *subsys, u32 nsid) 706 { 707 struct nvmet_ns *ns; 708 709 mutex_lock(&subsys->lock); 710 711 if (subsys->nr_namespaces == NVMET_MAX_NAMESPACES) 712 goto out_unlock; 713 714 ns = kzalloc_obj(*ns); 715 if (!ns) 716 goto out_unlock; 717 718 init_completion(&ns->disable_done); 719 720 ns->nsid = nsid; 721 ns->subsys = subsys; 722 723 if (ns->nsid > subsys->max_nsid) 724 subsys->max_nsid = nsid; 725 726 if (xa_insert(&subsys->namespaces, ns->nsid, ns, GFP_KERNEL)) 727 goto out_exit; 728 729 subsys->nr_namespaces++; 730 731 mutex_unlock(&subsys->lock); 732 733 down_write(&nvmet_ana_sem); 734 ns->anagrpid = NVMET_DEFAULT_ANA_GRPID; 735 nvmet_ana_group_enabled[ns->anagrpid]++; 736 up_write(&nvmet_ana_sem); 737 738 uuid_gen(&ns->uuid); 739 ns->buffered_io = false; 740 ns->csi = NVME_CSI_NVM; 741 742 return ns; 743 out_exit: 744 subsys->max_nsid = nvmet_max_nsid(subsys); 745 kfree(ns); 746 out_unlock: 747 mutex_unlock(&subsys->lock); 748 return NULL; 749 } 750 751 static void nvmet_update_sq_head(struct nvmet_req *req) 752 { 753 if (req->sq->size) { 754 u32 old_sqhd, new_sqhd; 755 756 old_sqhd = READ_ONCE(req->sq->sqhd); 757 do { 758 new_sqhd = (old_sqhd + 1) % req->sq->size; 759 } while (!try_cmpxchg(&req->sq->sqhd, &old_sqhd, new_sqhd)); 760 } 761 req->cqe->sq_head = cpu_to_le16(req->sq->sqhd & 0x0000FFFF); 762 } 763 764 static void nvmet_set_error(struct nvmet_req *req, u16 status) 765 { 766 struct nvmet_ctrl *ctrl = req->sq->ctrl; 767 struct nvme_error_slot *new_error_slot; 768 unsigned long flags; 769 770 req->cqe->status = cpu_to_le16(status << 1); 771 772 if (!ctrl || req->error_loc == NVMET_NO_ERROR_LOC) 773 return; 774 775 spin_lock_irqsave(&ctrl->error_lock, flags); 776 ctrl->err_counter++; 777 new_error_slot = 778 &ctrl->slots[ctrl->err_counter % NVMET_ERROR_LOG_SLOTS]; 779 780 new_error_slot->error_count = cpu_to_le64(ctrl->err_counter); 781 new_error_slot->sqid = cpu_to_le16(req->sq->qid); 782 new_error_slot->cmdid = cpu_to_le16(req->cmd->common.command_id); 783 new_error_slot->status_field = cpu_to_le16(status << 1); 784 new_error_slot->param_error_location = cpu_to_le16(req->error_loc); 785 new_error_slot->lba = cpu_to_le64(req->error_slba); 786 new_error_slot->nsid = req->cmd->common.nsid; 787 spin_unlock_irqrestore(&ctrl->error_lock, flags); 788 789 /* set the more bit for this request */ 790 req->cqe->status |= cpu_to_le16(1 << 14); 791 } 792 793 static void __nvmet_req_complete(struct nvmet_req *req, u16 status) 794 { 795 struct nvmet_ns *ns = req->ns; 796 struct nvmet_pr_per_ctrl_ref *pc_ref = req->pc_ref; 797 798 if (!req->sq->sqhd_disabled) 799 nvmet_update_sq_head(req); 800 req->cqe->sq_id = cpu_to_le16(req->sq->qid); 801 req->cqe->command_id = req->cmd->common.command_id; 802 803 if (unlikely(status)) 804 nvmet_set_error(req, status); 805 806 trace_nvmet_req_complete(req); 807 808 req->ops->queue_response(req); 809 810 if (pc_ref) 811 nvmet_pr_put_ns_pc_ref(pc_ref); 812 if (ns) 813 nvmet_put_namespace(ns); 814 } 815 816 void nvmet_req_complete(struct nvmet_req *req, u16 status) 817 { 818 struct nvmet_sq *sq = req->sq; 819 820 __nvmet_req_complete(req, status); 821 percpu_ref_put(&sq->ref); 822 } 823 EXPORT_SYMBOL_GPL(nvmet_req_complete); 824 825 void nvmet_cq_init(struct nvmet_cq *cq) 826 { 827 refcount_set(&cq->ref, 1); 828 } 829 EXPORT_SYMBOL_GPL(nvmet_cq_init); 830 831 bool nvmet_cq_get(struct nvmet_cq *cq) 832 { 833 return refcount_inc_not_zero(&cq->ref); 834 } 835 EXPORT_SYMBOL_GPL(nvmet_cq_get); 836 837 void nvmet_cq_put(struct nvmet_cq *cq) 838 { 839 if (refcount_dec_and_test(&cq->ref)) 840 nvmet_cq_destroy(cq); 841 } 842 EXPORT_SYMBOL_GPL(nvmet_cq_put); 843 844 void nvmet_cq_setup(struct nvmet_ctrl *ctrl, struct nvmet_cq *cq, 845 u16 qid, u16 size) 846 { 847 cq->qid = qid; 848 cq->size = size; 849 850 ctrl->cqs[qid] = cq; 851 } 852 853 void nvmet_cq_destroy(struct nvmet_cq *cq) 854 { 855 struct nvmet_ctrl *ctrl = cq->ctrl; 856 857 if (ctrl) { 858 ctrl->cqs[cq->qid] = NULL; 859 nvmet_ctrl_put(cq->ctrl); 860 cq->ctrl = NULL; 861 } 862 } 863 864 void nvmet_sq_setup(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq, 865 u16 qid, u16 size) 866 { 867 sq->sqhd = 0; 868 sq->qid = qid; 869 sq->size = size; 870 871 ctrl->sqs[qid] = sq; 872 } 873 874 static void nvmet_confirm_sq(struct percpu_ref *ref) 875 { 876 struct nvmet_sq *sq = container_of(ref, struct nvmet_sq, ref); 877 878 complete(&sq->confirm_done); 879 } 880 881 u16 nvmet_check_cqid(struct nvmet_ctrl *ctrl, u16 cqid, bool create) 882 { 883 if (!ctrl->cqs) 884 return NVME_SC_INTERNAL | NVME_STATUS_DNR; 885 886 if (cqid > ctrl->max_qid) 887 return NVME_SC_QID_INVALID | NVME_STATUS_DNR; 888 889 if ((create && ctrl->cqs[cqid]) || (!create && !ctrl->cqs[cqid])) 890 return NVME_SC_QID_INVALID | NVME_STATUS_DNR; 891 892 return NVME_SC_SUCCESS; 893 } 894 895 u16 nvmet_check_io_cqid(struct nvmet_ctrl *ctrl, u16 cqid, bool create) 896 { 897 if (!cqid) 898 return NVME_SC_QID_INVALID | NVME_STATUS_DNR; 899 return nvmet_check_cqid(ctrl, cqid, create); 900 } 901 902 bool nvmet_cq_in_use(struct nvmet_cq *cq) 903 { 904 return refcount_read(&cq->ref) > 1; 905 } 906 EXPORT_SYMBOL_GPL(nvmet_cq_in_use); 907 908 u16 nvmet_cq_create(struct nvmet_ctrl *ctrl, struct nvmet_cq *cq, 909 u16 qid, u16 size) 910 { 911 u16 status; 912 913 status = nvmet_check_cqid(ctrl, qid, true); 914 if (status != NVME_SC_SUCCESS) 915 return status; 916 917 if (!kref_get_unless_zero(&ctrl->ref)) 918 return NVME_SC_INTERNAL | NVME_STATUS_DNR; 919 cq->ctrl = ctrl; 920 921 nvmet_cq_init(cq); 922 nvmet_cq_setup(ctrl, cq, qid, size); 923 924 return NVME_SC_SUCCESS; 925 } 926 EXPORT_SYMBOL_GPL(nvmet_cq_create); 927 928 u16 nvmet_check_sqid(struct nvmet_ctrl *ctrl, u16 sqid, 929 bool create) 930 { 931 if (!ctrl->sqs) 932 return NVME_SC_INTERNAL | NVME_STATUS_DNR; 933 934 if (sqid > ctrl->max_qid) 935 return NVME_SC_QID_INVALID | NVME_STATUS_DNR; 936 937 if ((create && ctrl->sqs[sqid]) || 938 (!create && !ctrl->sqs[sqid])) 939 return NVME_SC_QID_INVALID | NVME_STATUS_DNR; 940 941 return NVME_SC_SUCCESS; 942 } 943 944 u16 nvmet_sq_create(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq, 945 struct nvmet_cq *cq, u16 sqid, u16 size) 946 { 947 u16 status; 948 int ret; 949 950 if (!kref_get_unless_zero(&ctrl->ref)) 951 return NVME_SC_INTERNAL | NVME_STATUS_DNR; 952 953 status = nvmet_check_sqid(ctrl, sqid, true); 954 if (status != NVME_SC_SUCCESS) 955 goto ctrl_put; 956 957 ret = nvmet_sq_init(sq, cq); 958 if (ret) { 959 status = NVME_SC_INTERNAL | NVME_STATUS_DNR; 960 goto ctrl_put; 961 } 962 963 nvmet_sq_setup(ctrl, sq, sqid, size); 964 sq->ctrl = ctrl; 965 966 return NVME_SC_SUCCESS; 967 968 ctrl_put: 969 nvmet_ctrl_put(ctrl); 970 return status; 971 } 972 EXPORT_SYMBOL_GPL(nvmet_sq_create); 973 974 void nvmet_sq_destroy(struct nvmet_sq *sq) 975 { 976 struct nvmet_ctrl *ctrl = sq->ctrl; 977 978 /* 979 * If this is the admin queue, complete all AERs so that our 980 * queue doesn't have outstanding requests on it. 981 */ 982 if (ctrl && ctrl->sqs && ctrl->sqs[0] == sq) 983 nvmet_async_events_failall(ctrl); 984 percpu_ref_kill_and_confirm(&sq->ref, nvmet_confirm_sq); 985 wait_for_completion(&sq->confirm_done); 986 wait_for_completion(&sq->free_done); 987 percpu_ref_exit(&sq->ref); 988 nvmet_auth_sq_destroy(sq); 989 nvmet_cq_put(sq->cq); 990 991 /* 992 * we must reference the ctrl again after waiting for inflight IO 993 * to complete. Because admin connect may have sneaked in after we 994 * store sq->ctrl locally, but before we killed the percpu_ref. the 995 * admin connect allocates and assigns sq->ctrl, which now needs a 996 * final ref put, as this ctrl is going away. 997 */ 998 ctrl = sq->ctrl; 999 1000 if (ctrl) { 1001 /* 1002 * The teardown flow may take some time, and the host may not 1003 * send us keep-alive during this period, hence reset the 1004 * traffic based keep-alive timer so we don't trigger a 1005 * controller teardown as a result of a keep-alive expiration. 1006 */ 1007 ctrl->reset_tbkas = true; 1008 sq->ctrl->sqs[sq->qid] = NULL; 1009 nvmet_ctrl_put(ctrl); 1010 sq->ctrl = NULL; /* allows reusing the queue later */ 1011 } 1012 } 1013 EXPORT_SYMBOL_GPL(nvmet_sq_destroy); 1014 1015 static void nvmet_sq_free(struct percpu_ref *ref) 1016 { 1017 struct nvmet_sq *sq = container_of(ref, struct nvmet_sq, ref); 1018 1019 complete(&sq->free_done); 1020 } 1021 1022 int nvmet_sq_init(struct nvmet_sq *sq, struct nvmet_cq *cq) 1023 { 1024 int ret; 1025 1026 if (!nvmet_cq_get(cq)) 1027 return -EINVAL; 1028 1029 ret = percpu_ref_init(&sq->ref, nvmet_sq_free, 0, GFP_KERNEL); 1030 if (ret) { 1031 pr_err("percpu_ref init failed!\n"); 1032 nvmet_cq_put(cq); 1033 return ret; 1034 } 1035 init_completion(&sq->free_done); 1036 init_completion(&sq->confirm_done); 1037 nvmet_auth_sq_init(sq); 1038 sq->cq = cq; 1039 1040 return 0; 1041 } 1042 EXPORT_SYMBOL_GPL(nvmet_sq_init); 1043 1044 static inline u16 nvmet_check_ana_state(struct nvmet_port *port, 1045 struct nvmet_ns *ns) 1046 { 1047 enum nvme_ana_state state = port->ana_state[ns->anagrpid]; 1048 1049 if (unlikely(state == NVME_ANA_INACCESSIBLE)) 1050 return NVME_SC_ANA_INACCESSIBLE; 1051 if (unlikely(state == NVME_ANA_PERSISTENT_LOSS)) 1052 return NVME_SC_ANA_PERSISTENT_LOSS; 1053 if (unlikely(state == NVME_ANA_CHANGE)) 1054 return NVME_SC_ANA_TRANSITION; 1055 return 0; 1056 } 1057 1058 static inline u16 nvmet_io_cmd_check_access(struct nvmet_req *req) 1059 { 1060 if (unlikely(req->ns->readonly)) { 1061 switch (req->cmd->common.opcode) { 1062 case nvme_cmd_read: 1063 case nvme_cmd_flush: 1064 break; 1065 default: 1066 return NVME_SC_NS_WRITE_PROTECTED; 1067 } 1068 } 1069 1070 return 0; 1071 } 1072 1073 static u32 nvmet_io_cmd_transfer_len(struct nvmet_req *req) 1074 { 1075 struct nvme_command *cmd = req->cmd; 1076 u32 metadata_len = 0; 1077 1078 if (nvme_is_fabrics(cmd)) 1079 return nvmet_fabrics_io_cmd_data_len(req); 1080 1081 if (!req->ns) 1082 return 0; 1083 1084 switch (req->cmd->common.opcode) { 1085 case nvme_cmd_read: 1086 case nvme_cmd_write: 1087 case nvme_cmd_zone_append: 1088 if (req->sq->ctrl->pi_support && nvmet_ns_has_pi(req->ns)) 1089 metadata_len = nvmet_rw_metadata_len(req); 1090 return nvmet_rw_data_len(req) + metadata_len; 1091 case nvme_cmd_dsm: 1092 return nvmet_dsm_len(req); 1093 case nvme_cmd_zone_mgmt_recv: 1094 return (le32_to_cpu(req->cmd->zmr.numd) + 1) << 2; 1095 default: 1096 return 0; 1097 } 1098 } 1099 1100 static u16 nvmet_parse_io_cmd(struct nvmet_req *req) 1101 { 1102 struct nvme_command *cmd = req->cmd; 1103 u16 ret; 1104 1105 if (nvme_is_fabrics(cmd)) 1106 return nvmet_parse_fabrics_io_cmd(req); 1107 1108 if (unlikely(!nvmet_check_auth_status(req))) 1109 return NVME_SC_AUTH_REQUIRED | NVME_STATUS_DNR; 1110 1111 ret = nvmet_check_ctrl_status(req); 1112 if (unlikely(ret)) 1113 return ret; 1114 1115 if (nvmet_is_passthru_req(req)) 1116 return nvmet_parse_passthru_io_cmd(req); 1117 1118 ret = nvmet_req_find_ns(req); 1119 if (unlikely(ret)) 1120 return ret; 1121 1122 ret = nvmet_check_ana_state(req->port, req->ns); 1123 if (unlikely(ret)) { 1124 req->error_loc = offsetof(struct nvme_common_command, nsid); 1125 return ret; 1126 } 1127 ret = nvmet_io_cmd_check_access(req); 1128 if (unlikely(ret)) { 1129 req->error_loc = offsetof(struct nvme_common_command, nsid); 1130 return ret; 1131 } 1132 1133 if (req->ns->pr.enable) { 1134 ret = nvmet_parse_pr_cmd(req); 1135 if (!ret) 1136 return ret; 1137 } 1138 1139 switch (req->ns->csi) { 1140 case NVME_CSI_NVM: 1141 if (req->ns->file) 1142 ret = nvmet_file_parse_io_cmd(req); 1143 else 1144 ret = nvmet_bdev_parse_io_cmd(req); 1145 break; 1146 case NVME_CSI_ZNS: 1147 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED)) 1148 ret = nvmet_bdev_zns_parse_io_cmd(req); 1149 else 1150 ret = NVME_SC_INVALID_IO_CMD_SET; 1151 break; 1152 default: 1153 ret = NVME_SC_INVALID_IO_CMD_SET; 1154 } 1155 if (ret) 1156 return ret; 1157 1158 if (req->ns->pr.enable) { 1159 ret = nvmet_pr_check_cmd_access(req); 1160 if (ret) 1161 return ret; 1162 1163 ret = nvmet_pr_get_ns_pc_ref(req); 1164 } 1165 return ret; 1166 } 1167 1168 bool nvmet_req_init(struct nvmet_req *req, struct nvmet_sq *sq, 1169 const struct nvmet_fabrics_ops *ops) 1170 { 1171 u8 flags = req->cmd->common.flags; 1172 u16 status; 1173 1174 req->cq = sq->cq; 1175 req->sq = sq; 1176 req->ops = ops; 1177 req->sg = NULL; 1178 req->metadata_sg = NULL; 1179 req->sg_cnt = 0; 1180 req->metadata_sg_cnt = 0; 1181 req->transfer_len = 0; 1182 req->metadata_len = 0; 1183 req->cqe->result.u64 = 0; 1184 req->cqe->status = 0; 1185 req->cqe->sq_head = 0; 1186 req->ns = NULL; 1187 req->error_loc = NVMET_NO_ERROR_LOC; 1188 req->error_slba = 0; 1189 req->pc_ref = NULL; 1190 1191 /* no support for fused commands yet */ 1192 if (unlikely(flags & (NVME_CMD_FUSE_FIRST | NVME_CMD_FUSE_SECOND))) { 1193 req->error_loc = offsetof(struct nvme_common_command, flags); 1194 status = NVME_SC_INVALID_FIELD | NVME_STATUS_DNR; 1195 goto fail; 1196 } 1197 1198 /* 1199 * For fabrics, PSDT field shall describe metadata pointer (MPTR) that 1200 * contains an address of a single contiguous physical buffer that is 1201 * byte aligned. For PCI controllers, this is optional so not enforced. 1202 */ 1203 if (unlikely((flags & NVME_CMD_SGL_ALL) != NVME_CMD_SGL_METABUF)) { 1204 if (!req->sq->ctrl || !nvmet_is_pci_ctrl(req->sq->ctrl)) { 1205 req->error_loc = 1206 offsetof(struct nvme_common_command, flags); 1207 status = NVME_SC_INVALID_FIELD | NVME_STATUS_DNR; 1208 goto fail; 1209 } 1210 } 1211 1212 if (unlikely(!req->sq->ctrl)) 1213 /* will return an error for any non-connect command: */ 1214 status = nvmet_parse_connect_cmd(req); 1215 else if (likely(req->sq->qid != 0)) 1216 status = nvmet_parse_io_cmd(req); 1217 else 1218 status = nvmet_parse_admin_cmd(req); 1219 1220 if (status) 1221 goto fail; 1222 1223 trace_nvmet_req_init(req, req->cmd); 1224 1225 if (unlikely(!percpu_ref_tryget_live(&sq->ref))) { 1226 status = NVME_SC_INVALID_FIELD | NVME_STATUS_DNR; 1227 goto fail; 1228 } 1229 1230 if (sq->ctrl) 1231 sq->ctrl->reset_tbkas = true; 1232 1233 return true; 1234 1235 fail: 1236 __nvmet_req_complete(req, status); 1237 return false; 1238 } 1239 EXPORT_SYMBOL_GPL(nvmet_req_init); 1240 1241 void nvmet_req_uninit(struct nvmet_req *req) 1242 { 1243 percpu_ref_put(&req->sq->ref); 1244 if (req->pc_ref) 1245 nvmet_pr_put_ns_pc_ref(req->pc_ref); 1246 if (req->ns) 1247 nvmet_put_namespace(req->ns); 1248 } 1249 EXPORT_SYMBOL_GPL(nvmet_req_uninit); 1250 1251 size_t nvmet_req_transfer_len(struct nvmet_req *req) 1252 { 1253 if (likely(req->sq->qid != 0)) 1254 return nvmet_io_cmd_transfer_len(req); 1255 if (unlikely(!req->sq->ctrl)) 1256 return nvmet_connect_cmd_data_len(req); 1257 return nvmet_admin_cmd_data_len(req); 1258 } 1259 EXPORT_SYMBOL_GPL(nvmet_req_transfer_len); 1260 1261 bool nvmet_check_transfer_len(struct nvmet_req *req, size_t len) 1262 { 1263 if (unlikely(len != req->transfer_len)) { 1264 u16 status; 1265 1266 req->error_loc = offsetof(struct nvme_common_command, dptr); 1267 if (req->cmd->common.flags & NVME_CMD_SGL_ALL) 1268 status = NVME_SC_SGL_INVALID_DATA; 1269 else 1270 status = NVME_SC_INVALID_FIELD; 1271 nvmet_req_complete(req, status | NVME_STATUS_DNR); 1272 return false; 1273 } 1274 1275 return true; 1276 } 1277 EXPORT_SYMBOL_GPL(nvmet_check_transfer_len); 1278 1279 bool nvmet_check_data_len_lte(struct nvmet_req *req, size_t data_len) 1280 { 1281 if (unlikely(data_len > req->transfer_len)) { 1282 u16 status; 1283 1284 req->error_loc = offsetof(struct nvme_common_command, dptr); 1285 if (req->cmd->common.flags & NVME_CMD_SGL_ALL) 1286 status = NVME_SC_SGL_INVALID_DATA; 1287 else 1288 status = NVME_SC_INVALID_FIELD; 1289 nvmet_req_complete(req, status | NVME_STATUS_DNR); 1290 return false; 1291 } 1292 1293 return true; 1294 } 1295 1296 static unsigned int nvmet_data_transfer_len(struct nvmet_req *req) 1297 { 1298 return req->transfer_len - req->metadata_len; 1299 } 1300 1301 static int nvmet_req_alloc_p2pmem_sgls(struct pci_dev *p2p_dev, 1302 struct nvmet_req *req) 1303 { 1304 req->sg = pci_p2pmem_alloc_sgl(p2p_dev, &req->sg_cnt, 1305 nvmet_data_transfer_len(req)); 1306 if (!req->sg) 1307 goto out_err; 1308 1309 if (req->metadata_len) { 1310 req->metadata_sg = pci_p2pmem_alloc_sgl(p2p_dev, 1311 &req->metadata_sg_cnt, req->metadata_len); 1312 if (!req->metadata_sg) 1313 goto out_free_sg; 1314 } 1315 1316 req->p2p_dev = p2p_dev; 1317 1318 return 0; 1319 out_free_sg: 1320 pci_p2pmem_free_sgl(req->p2p_dev, req->sg); 1321 out_err: 1322 return -ENOMEM; 1323 } 1324 1325 static struct pci_dev *nvmet_req_find_p2p_dev(struct nvmet_req *req) 1326 { 1327 if (!IS_ENABLED(CONFIG_PCI_P2PDMA) || 1328 !req->sq->ctrl || !req->sq->qid || !req->ns) 1329 return NULL; 1330 return radix_tree_lookup(&req->sq->ctrl->p2p_ns_map, req->ns->nsid); 1331 } 1332 1333 int nvmet_req_alloc_sgls(struct nvmet_req *req) 1334 { 1335 struct pci_dev *p2p_dev = nvmet_req_find_p2p_dev(req); 1336 1337 if (p2p_dev && !nvmet_req_alloc_p2pmem_sgls(p2p_dev, req)) 1338 return 0; 1339 1340 req->sg = sgl_alloc(nvmet_data_transfer_len(req), GFP_KERNEL, 1341 &req->sg_cnt); 1342 if (unlikely(!req->sg)) 1343 goto out; 1344 1345 if (req->metadata_len) { 1346 req->metadata_sg = sgl_alloc(req->metadata_len, GFP_KERNEL, 1347 &req->metadata_sg_cnt); 1348 if (unlikely(!req->metadata_sg)) 1349 goto out_free; 1350 } 1351 1352 return 0; 1353 out_free: 1354 sgl_free(req->sg); 1355 out: 1356 return -ENOMEM; 1357 } 1358 EXPORT_SYMBOL_GPL(nvmet_req_alloc_sgls); 1359 1360 void nvmet_req_free_sgls(struct nvmet_req *req) 1361 { 1362 if (req->p2p_dev) { 1363 pci_p2pmem_free_sgl(req->p2p_dev, req->sg); 1364 if (req->metadata_sg) 1365 pci_p2pmem_free_sgl(req->p2p_dev, req->metadata_sg); 1366 req->p2p_dev = NULL; 1367 } else { 1368 sgl_free(req->sg); 1369 if (req->metadata_sg) 1370 sgl_free(req->metadata_sg); 1371 } 1372 1373 req->sg = NULL; 1374 req->metadata_sg = NULL; 1375 req->sg_cnt = 0; 1376 req->metadata_sg_cnt = 0; 1377 } 1378 EXPORT_SYMBOL_GPL(nvmet_req_free_sgls); 1379 1380 static inline bool nvmet_css_supported(u8 cc_css) 1381 { 1382 switch (cc_css << NVME_CC_CSS_SHIFT) { 1383 case NVME_CC_CSS_NVM: 1384 case NVME_CC_CSS_CSI: 1385 return true; 1386 default: 1387 return false; 1388 } 1389 } 1390 1391 static void nvmet_start_ctrl(struct nvmet_ctrl *ctrl) 1392 { 1393 lockdep_assert_held(&ctrl->lock); 1394 1395 /* 1396 * Only I/O controllers should verify iosqes,iocqes. 1397 * Strictly speaking, the spec says a discovery controller 1398 * should verify iosqes,iocqes are zeroed, however that 1399 * would break backwards compatibility, so don't enforce it. 1400 */ 1401 if (!nvmet_is_disc_subsys(ctrl->subsys) && 1402 (nvmet_cc_iosqes(ctrl->cc) != NVME_NVM_IOSQES || 1403 nvmet_cc_iocqes(ctrl->cc) != NVME_NVM_IOCQES)) { 1404 ctrl->csts = NVME_CSTS_CFS; 1405 return; 1406 } 1407 1408 if (nvmet_cc_mps(ctrl->cc) != 0 || 1409 nvmet_cc_ams(ctrl->cc) != 0 || 1410 !nvmet_css_supported(nvmet_cc_css(ctrl->cc))) { 1411 ctrl->csts = NVME_CSTS_CFS; 1412 return; 1413 } 1414 1415 ctrl->csts = NVME_CSTS_RDY; 1416 1417 /* 1418 * Controllers that are not yet enabled should not really enforce the 1419 * keep alive timeout, but we still want to track a timeout and cleanup 1420 * in case a host died before it enabled the controller. Hence, simply 1421 * reset the keep alive timer when the controller is enabled. 1422 */ 1423 if (ctrl->kato) 1424 mod_delayed_work(nvmet_wq, &ctrl->ka_work, ctrl->kato * HZ); 1425 } 1426 1427 static void nvmet_clear_ctrl(struct nvmet_ctrl *ctrl) 1428 { 1429 lockdep_assert_held(&ctrl->lock); 1430 1431 /* XXX: tear down queues? */ 1432 ctrl->csts &= ~NVME_CSTS_RDY; 1433 ctrl->cc = 0; 1434 } 1435 1436 void nvmet_update_cc(struct nvmet_ctrl *ctrl, u32 new) 1437 { 1438 u32 old; 1439 1440 mutex_lock(&ctrl->lock); 1441 old = ctrl->cc; 1442 ctrl->cc = new; 1443 1444 if (nvmet_cc_en(new) && !nvmet_cc_en(old)) 1445 nvmet_start_ctrl(ctrl); 1446 if (!nvmet_cc_en(new) && nvmet_cc_en(old)) 1447 nvmet_clear_ctrl(ctrl); 1448 if (nvmet_cc_shn(new) && !nvmet_cc_shn(old)) { 1449 nvmet_clear_ctrl(ctrl); 1450 ctrl->csts |= NVME_CSTS_SHST_CMPLT; 1451 } 1452 if (!nvmet_cc_shn(new) && nvmet_cc_shn(old)) 1453 ctrl->csts &= ~NVME_CSTS_SHST_CMPLT; 1454 mutex_unlock(&ctrl->lock); 1455 } 1456 EXPORT_SYMBOL_GPL(nvmet_update_cc); 1457 1458 static void nvmet_init_cap(struct nvmet_ctrl *ctrl) 1459 { 1460 /* command sets supported: NVMe command set: */ 1461 ctrl->cap = (1ULL << 37); 1462 /* Controller supports one or more I/O Command Sets */ 1463 ctrl->cap |= (1ULL << 43); 1464 /* CC.EN timeout in 500msec units: */ 1465 ctrl->cap |= (15ULL << 24); 1466 /* maximum queue entries supported: */ 1467 if (ctrl->ops->get_max_queue_size) 1468 ctrl->cap |= min_t(u16, ctrl->ops->get_max_queue_size(ctrl), 1469 ctrl->port->max_queue_size) - 1; 1470 else 1471 ctrl->cap |= ctrl->port->max_queue_size - 1; 1472 1473 if (nvmet_is_passthru_subsys(ctrl->subsys)) 1474 nvmet_passthrough_override_cap(ctrl); 1475 } 1476 1477 struct nvmet_ctrl *nvmet_ctrl_find_get(const char *subsysnqn, 1478 const char *hostnqn, u16 cntlid, 1479 struct nvmet_req *req) 1480 { 1481 struct nvmet_ctrl *ctrl = NULL; 1482 struct nvmet_subsys *subsys; 1483 1484 subsys = nvmet_find_get_subsys(req->port, subsysnqn); 1485 if (!subsys) { 1486 pr_warn("connect request for invalid subsystem %s!\n", 1487 subsysnqn); 1488 req->cqe->result.u32 = IPO_IATTR_CONNECT_DATA(subsysnqn); 1489 goto out; 1490 } 1491 1492 mutex_lock(&subsys->lock); 1493 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) { 1494 if (ctrl->cntlid == cntlid) { 1495 if (strncmp(hostnqn, ctrl->hostnqn, NVMF_NQN_SIZE)) { 1496 pr_warn("hostnqn mismatch.\n"); 1497 continue; 1498 } 1499 if (!kref_get_unless_zero(&ctrl->ref)) 1500 continue; 1501 1502 /* ctrl found */ 1503 goto found; 1504 } 1505 } 1506 1507 ctrl = NULL; /* ctrl not found */ 1508 pr_warn("could not find controller %d for subsys %s / host %s\n", 1509 cntlid, subsysnqn, hostnqn); 1510 req->cqe->result.u32 = IPO_IATTR_CONNECT_DATA(cntlid); 1511 1512 found: 1513 mutex_unlock(&subsys->lock); 1514 nvmet_subsys_put(subsys); 1515 out: 1516 return ctrl; 1517 } 1518 1519 u16 nvmet_check_ctrl_status(struct nvmet_req *req) 1520 { 1521 if (unlikely(!(req->sq->ctrl->cc & NVME_CC_ENABLE))) { 1522 pr_err("got cmd %d while CC.EN == 0 on qid = %d\n", 1523 req->cmd->common.opcode, req->sq->qid); 1524 return NVME_SC_CMD_SEQ_ERROR | NVME_STATUS_DNR; 1525 } 1526 1527 if (unlikely(!(req->sq->ctrl->csts & NVME_CSTS_RDY))) { 1528 pr_err("got cmd %d while CSTS.RDY == 0 on qid = %d\n", 1529 req->cmd->common.opcode, req->sq->qid); 1530 return NVME_SC_CMD_SEQ_ERROR | NVME_STATUS_DNR; 1531 } 1532 1533 if (unlikely(!nvmet_check_auth_status(req))) { 1534 pr_warn("qid %d not authenticated\n", req->sq->qid); 1535 return NVME_SC_AUTH_REQUIRED | NVME_STATUS_DNR; 1536 } 1537 return 0; 1538 } 1539 1540 bool nvmet_host_allowed(struct nvmet_subsys *subsys, const char *hostnqn) 1541 { 1542 struct nvmet_host_link *p; 1543 1544 lockdep_assert_held(&nvmet_config_sem); 1545 1546 if (subsys->allow_any_host) 1547 return true; 1548 1549 if (nvmet_is_disc_subsys(subsys)) /* allow all access to disc subsys */ 1550 return true; 1551 1552 list_for_each_entry(p, &subsys->hosts, entry) { 1553 if (!strcmp(nvmet_host_name(p->host), hostnqn)) 1554 return true; 1555 } 1556 1557 return false; 1558 } 1559 1560 static void nvmet_setup_p2p_ns_map(struct nvmet_ctrl *ctrl, 1561 struct device *p2p_client) 1562 { 1563 struct nvmet_ns *ns; 1564 unsigned long idx; 1565 1566 lockdep_assert_held(&ctrl->subsys->lock); 1567 1568 if (!p2p_client) 1569 return; 1570 1571 ctrl->p2p_client = get_device(p2p_client); 1572 1573 nvmet_for_each_enabled_ns(&ctrl->subsys->namespaces, idx, ns) 1574 nvmet_p2pmem_ns_add_p2p(ctrl, ns); 1575 } 1576 1577 static void nvmet_release_p2p_ns_map(struct nvmet_ctrl *ctrl) 1578 { 1579 struct radix_tree_iter iter; 1580 void __rcu **slot; 1581 1582 lockdep_assert_held(&ctrl->subsys->lock); 1583 1584 radix_tree_for_each_slot(slot, &ctrl->p2p_ns_map, &iter, 0) 1585 pci_dev_put(radix_tree_deref_slot(slot)); 1586 1587 put_device(ctrl->p2p_client); 1588 } 1589 1590 static void nvmet_fatal_error_handler(struct work_struct *work) 1591 { 1592 struct nvmet_ctrl *ctrl = 1593 container_of(work, struct nvmet_ctrl, fatal_err_work); 1594 1595 pr_err("ctrl %d fatal error occurred!\n", ctrl->cntlid); 1596 ctrl->ops->delete_ctrl(ctrl); 1597 } 1598 1599 struct nvmet_ctrl *nvmet_alloc_ctrl(struct nvmet_alloc_ctrl_args *args) 1600 { 1601 struct nvmet_subsys *subsys; 1602 struct nvmet_ctrl *ctrl; 1603 u32 kato = args->kato; 1604 u8 dhchap_status; 1605 int ret; 1606 1607 args->status = NVME_SC_CONNECT_INVALID_PARAM | NVME_STATUS_DNR; 1608 subsys = nvmet_find_get_subsys(args->port, args->subsysnqn); 1609 if (!subsys) { 1610 pr_warn("connect request for invalid subsystem %s!\n", 1611 args->subsysnqn); 1612 args->result = IPO_IATTR_CONNECT_DATA(subsysnqn); 1613 args->error_loc = offsetof(struct nvme_common_command, dptr); 1614 return NULL; 1615 } 1616 1617 down_read(&nvmet_config_sem); 1618 if (!nvmet_host_allowed(subsys, args->hostnqn)) { 1619 pr_info("connect by host %s for subsystem %s not allowed\n", 1620 args->hostnqn, args->subsysnqn); 1621 args->result = IPO_IATTR_CONNECT_DATA(hostnqn); 1622 up_read(&nvmet_config_sem); 1623 args->status = NVME_SC_CONNECT_INVALID_HOST | NVME_STATUS_DNR; 1624 args->error_loc = offsetof(struct nvme_common_command, dptr); 1625 goto out_put_subsystem; 1626 } 1627 up_read(&nvmet_config_sem); 1628 1629 args->status = NVME_SC_INTERNAL; 1630 ctrl = kzalloc_obj(*ctrl); 1631 if (!ctrl) 1632 goto out_put_subsystem; 1633 mutex_init(&ctrl->lock); 1634 1635 ctrl->port = args->port; 1636 ctrl->ops = args->ops; 1637 1638 #ifdef CONFIG_NVME_TARGET_PASSTHRU 1639 /* By default, set loop targets to clear IDS by default */ 1640 if (ctrl->port->disc_addr.trtype == NVMF_TRTYPE_LOOP) 1641 subsys->clear_ids = 1; 1642 #endif 1643 1644 INIT_WORK(&ctrl->async_event_work, nvmet_async_event_work); 1645 INIT_LIST_HEAD(&ctrl->async_events); 1646 INIT_RADIX_TREE(&ctrl->p2p_ns_map, GFP_KERNEL); 1647 INIT_WORK(&ctrl->fatal_err_work, nvmet_fatal_error_handler); 1648 INIT_DELAYED_WORK(&ctrl->ka_work, nvmet_keep_alive_timer); 1649 1650 memcpy(ctrl->hostnqn, args->hostnqn, NVMF_NQN_SIZE); 1651 1652 kref_init(&ctrl->ref); 1653 ctrl->subsys = subsys; 1654 ctrl->pi_support = ctrl->port->pi_enable && ctrl->subsys->pi_support; 1655 nvmet_init_cap(ctrl); 1656 WRITE_ONCE(ctrl->aen_enabled, NVMET_AEN_CFG_OPTIONAL); 1657 1658 ctrl->changed_ns_list = kmalloc_array(NVME_MAX_CHANGED_NAMESPACES, 1659 sizeof(__le32), GFP_KERNEL); 1660 if (!ctrl->changed_ns_list) 1661 goto out_free_ctrl; 1662 1663 /* 1664 * Discovery controllers may use some arbitrary high value 1665 * in order to cleanup stale discovery sessions 1666 */ 1667 if (nvmet_is_disc_subsys(ctrl->subsys) && !kato) 1668 kato = NVMET_DISC_KATO_MS; 1669 1670 /* keep-alive timeout in seconds */ 1671 ctrl->kato = DIV_ROUND_UP(kato, 1000); 1672 1673 ctrl->err_counter = 0; 1674 spin_lock_init(&ctrl->error_lock); 1675 1676 down_read(&nvmet_config_sem); 1677 mutex_lock(&subsys->lock); 1678 1679 ctrl->max_qid = subsys->max_qid; 1680 1681 ctrl->sqs = kzalloc_objs(struct nvmet_sq *, ctrl->max_qid + 1); 1682 if (!ctrl->sqs) 1683 goto out_free_changed_ns_list; 1684 1685 ctrl->cqs = kzalloc_objs(struct nvmet_cq *, ctrl->max_qid + 1); 1686 if (!ctrl->cqs) 1687 goto out_free_sqs; 1688 1689 ret = ida_alloc_range(&cntlid_ida, 1690 subsys->cntlid_min, subsys->cntlid_max, 1691 GFP_KERNEL); 1692 if (ret < 0) { 1693 args->status = NVME_SC_CONNECT_CTRL_BUSY | NVME_STATUS_DNR; 1694 goto out_free_cqs; 1695 } 1696 ctrl->cntlid = ret; 1697 1698 ret = nvmet_ctrl_init_pr(ctrl); 1699 if (ret) 1700 goto init_pr_fail; 1701 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 1702 nvmet_setup_p2p_ns_map(ctrl, args->p2p_client); 1703 nvmet_debugfs_ctrl_setup(ctrl); 1704 mutex_unlock(&subsys->lock); 1705 up_read(&nvmet_config_sem); 1706 1707 nvmet_start_keep_alive_timer(ctrl); 1708 1709 if (args->hostid) 1710 uuid_copy(&ctrl->hostid, args->hostid); 1711 1712 dhchap_status = nvmet_setup_auth(ctrl, args->sq, false); 1713 if (dhchap_status) { 1714 pr_err("Failed to setup authentication, dhchap status %u\n", 1715 dhchap_status); 1716 nvmet_ctrl_put(ctrl); 1717 if (dhchap_status == NVME_AUTH_DHCHAP_FAILURE_FAILED) 1718 args->status = 1719 NVME_SC_CONNECT_INVALID_HOST | NVME_STATUS_DNR; 1720 else 1721 args->status = NVME_SC_INTERNAL; 1722 return NULL; 1723 } 1724 1725 args->status = NVME_SC_SUCCESS; 1726 1727 pr_info("Created %s controller %d for subsystem %s for NQN %s%s%s%s.\n", 1728 nvmet_is_disc_subsys(ctrl->subsys) ? "discovery" : "nvm", 1729 ctrl->cntlid, ctrl->subsys->subsysnqn, ctrl->hostnqn, 1730 ctrl->pi_support ? " T10-PI is enabled" : "", 1731 nvmet_has_auth(ctrl, args->sq) ? " with DH-HMAC-CHAP" : "", 1732 nvmet_queue_tls_keyid(args->sq) ? ", TLS" : ""); 1733 1734 return ctrl; 1735 1736 init_pr_fail: 1737 ida_free(&cntlid_ida, ctrl->cntlid); 1738 out_free_cqs: 1739 kfree(ctrl->cqs); 1740 out_free_sqs: 1741 kfree(ctrl->sqs); 1742 out_free_changed_ns_list: 1743 mutex_unlock(&subsys->lock); 1744 up_read(&nvmet_config_sem); 1745 kfree(ctrl->changed_ns_list); 1746 out_free_ctrl: 1747 kfree(ctrl); 1748 out_put_subsystem: 1749 nvmet_subsys_put(subsys); 1750 return NULL; 1751 } 1752 EXPORT_SYMBOL_GPL(nvmet_alloc_ctrl); 1753 1754 static void nvmet_ctrl_free(struct kref *ref) 1755 { 1756 struct nvmet_ctrl *ctrl = container_of(ref, struct nvmet_ctrl, ref); 1757 struct nvmet_subsys *subsys = ctrl->subsys; 1758 1759 mutex_lock(&subsys->lock); 1760 nvmet_ctrl_destroy_pr(ctrl); 1761 nvmet_release_p2p_ns_map(ctrl); 1762 list_del(&ctrl->subsys_entry); 1763 mutex_unlock(&subsys->lock); 1764 1765 nvmet_stop_keep_alive_timer(ctrl); 1766 1767 cancel_work_sync(&ctrl->async_event_work); 1768 cancel_work_sync(&ctrl->fatal_err_work); 1769 1770 nvmet_destroy_auth(ctrl); 1771 1772 nvmet_debugfs_ctrl_free(ctrl); 1773 1774 ida_free(&cntlid_ida, ctrl->cntlid); 1775 1776 nvmet_async_events_free(ctrl); 1777 kfree(ctrl->sqs); 1778 kfree(ctrl->cqs); 1779 kfree(ctrl->changed_ns_list); 1780 kfree(ctrl); 1781 1782 nvmet_subsys_put(subsys); 1783 } 1784 1785 void nvmet_ctrl_put(struct nvmet_ctrl *ctrl) 1786 { 1787 kref_put(&ctrl->ref, nvmet_ctrl_free); 1788 } 1789 EXPORT_SYMBOL_GPL(nvmet_ctrl_put); 1790 1791 void nvmet_ctrl_fatal_error(struct nvmet_ctrl *ctrl) 1792 { 1793 mutex_lock(&ctrl->lock); 1794 if (!(ctrl->csts & NVME_CSTS_CFS)) { 1795 ctrl->csts |= NVME_CSTS_CFS; 1796 queue_work(nvmet_wq, &ctrl->fatal_err_work); 1797 } 1798 mutex_unlock(&ctrl->lock); 1799 } 1800 EXPORT_SYMBOL_GPL(nvmet_ctrl_fatal_error); 1801 1802 ssize_t nvmet_ctrl_host_traddr(struct nvmet_ctrl *ctrl, 1803 char *traddr, size_t traddr_len) 1804 { 1805 if (!ctrl->ops->host_traddr) 1806 return -EOPNOTSUPP; 1807 return ctrl->ops->host_traddr(ctrl, traddr, traddr_len); 1808 } 1809 1810 static struct nvmet_subsys *nvmet_find_get_subsys(struct nvmet_port *port, 1811 const char *subsysnqn) 1812 { 1813 struct nvmet_subsys_link *p; 1814 1815 if (!port) 1816 return NULL; 1817 1818 if (!strcmp(NVME_DISC_SUBSYS_NAME, subsysnqn)) { 1819 if (!kref_get_unless_zero(&nvmet_disc_subsys->ref)) 1820 return NULL; 1821 return nvmet_disc_subsys; 1822 } 1823 1824 down_read(&nvmet_config_sem); 1825 if (!strncmp(nvmet_disc_subsys->subsysnqn, subsysnqn, 1826 NVMF_NQN_SIZE)) { 1827 if (kref_get_unless_zero(&nvmet_disc_subsys->ref)) { 1828 up_read(&nvmet_config_sem); 1829 return nvmet_disc_subsys; 1830 } 1831 } 1832 list_for_each_entry(p, &port->subsystems, entry) { 1833 if (!strncmp(p->subsys->subsysnqn, subsysnqn, 1834 NVMF_NQN_SIZE)) { 1835 if (!kref_get_unless_zero(&p->subsys->ref)) 1836 break; 1837 up_read(&nvmet_config_sem); 1838 return p->subsys; 1839 } 1840 } 1841 up_read(&nvmet_config_sem); 1842 return NULL; 1843 } 1844 1845 struct nvmet_subsys *nvmet_subsys_alloc(const char *subsysnqn, 1846 enum nvme_subsys_type type) 1847 { 1848 struct nvmet_subsys *subsys; 1849 char serial[NVMET_SN_MAX_SIZE / 2]; 1850 int ret; 1851 1852 subsys = kzalloc_obj(*subsys); 1853 if (!subsys) 1854 return ERR_PTR(-ENOMEM); 1855 1856 subsys->ver = NVMET_DEFAULT_VS; 1857 /* generate a random serial number as our controllers are ephemeral: */ 1858 get_random_bytes(&serial, sizeof(serial)); 1859 bin2hex(subsys->serial, &serial, sizeof(serial)); 1860 1861 subsys->model_number = kstrdup(NVMET_DEFAULT_CTRL_MODEL, GFP_KERNEL); 1862 if (!subsys->model_number) { 1863 ret = -ENOMEM; 1864 goto free_subsys; 1865 } 1866 1867 subsys->ieee_oui = 0; 1868 1869 subsys->firmware_rev = kstrndup(UTS_RELEASE, NVMET_FR_MAX_SIZE, GFP_KERNEL); 1870 if (!subsys->firmware_rev) { 1871 ret = -ENOMEM; 1872 goto free_mn; 1873 } 1874 1875 switch (type) { 1876 case NVME_NQN_NVME: 1877 subsys->max_qid = NVMET_NR_QUEUES; 1878 break; 1879 case NVME_NQN_DISC: 1880 case NVME_NQN_CURR: 1881 subsys->max_qid = 0; 1882 break; 1883 default: 1884 pr_err("%s: Unknown Subsystem type - %d\n", __func__, type); 1885 ret = -EINVAL; 1886 goto free_fr; 1887 } 1888 subsys->type = type; 1889 subsys->subsysnqn = kstrndup(subsysnqn, NVMF_NQN_SIZE, 1890 GFP_KERNEL); 1891 if (!subsys->subsysnqn) { 1892 ret = -ENOMEM; 1893 goto free_fr; 1894 } 1895 subsys->cntlid_min = NVME_CNTLID_MIN; 1896 subsys->cntlid_max = NVME_CNTLID_MAX; 1897 kref_init(&subsys->ref); 1898 1899 mutex_init(&subsys->lock); 1900 xa_init(&subsys->namespaces); 1901 INIT_LIST_HEAD(&subsys->ctrls); 1902 INIT_LIST_HEAD(&subsys->hosts); 1903 1904 ret = nvmet_debugfs_subsys_setup(subsys); 1905 if (ret) 1906 goto free_subsysnqn; 1907 1908 return subsys; 1909 1910 free_subsysnqn: 1911 kfree(subsys->subsysnqn); 1912 free_fr: 1913 kfree(subsys->firmware_rev); 1914 free_mn: 1915 kfree(subsys->model_number); 1916 free_subsys: 1917 kfree(subsys); 1918 return ERR_PTR(ret); 1919 } 1920 1921 static void nvmet_subsys_free(struct kref *ref) 1922 { 1923 struct nvmet_subsys *subsys = 1924 container_of(ref, struct nvmet_subsys, ref); 1925 1926 WARN_ON_ONCE(!list_empty(&subsys->ctrls)); 1927 WARN_ON_ONCE(!list_empty(&subsys->hosts)); 1928 WARN_ON_ONCE(!xa_empty(&subsys->namespaces)); 1929 1930 nvmet_debugfs_subsys_free(subsys); 1931 1932 xa_destroy(&subsys->namespaces); 1933 nvmet_passthru_subsys_free(subsys); 1934 1935 kfree(subsys->subsysnqn); 1936 kfree(subsys->model_number); 1937 kfree(subsys->firmware_rev); 1938 kfree(subsys); 1939 } 1940 1941 void nvmet_subsys_del_ctrls(struct nvmet_subsys *subsys) 1942 { 1943 struct nvmet_ctrl *ctrl; 1944 1945 mutex_lock(&subsys->lock); 1946 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) 1947 ctrl->ops->delete_ctrl(ctrl); 1948 mutex_unlock(&subsys->lock); 1949 } 1950 1951 void nvmet_subsys_put(struct nvmet_subsys *subsys) 1952 { 1953 kref_put(&subsys->ref, nvmet_subsys_free); 1954 } 1955 1956 static int __init nvmet_init(void) 1957 { 1958 int error = -ENOMEM; 1959 1960 nvmet_ana_group_enabled[NVMET_DEFAULT_ANA_GRPID] = 1; 1961 1962 nvmet_bvec_cache = kmem_cache_create("nvmet-bvec", 1963 NVMET_MAX_MPOOL_BVEC * sizeof(struct bio_vec), 0, 1964 SLAB_HWCACHE_ALIGN, NULL); 1965 if (!nvmet_bvec_cache) 1966 return -ENOMEM; 1967 1968 zbd_wq = alloc_workqueue("nvmet-zbd-wq", WQ_MEM_RECLAIM | WQ_PERCPU, 1969 0); 1970 if (!zbd_wq) 1971 goto out_destroy_bvec_cache; 1972 1973 buffered_io_wq = alloc_workqueue("nvmet-buffered-io-wq", 1974 WQ_MEM_RECLAIM | WQ_PERCPU, 0); 1975 if (!buffered_io_wq) 1976 goto out_free_zbd_work_queue; 1977 1978 nvmet_wq = alloc_workqueue("nvmet-wq", 1979 WQ_MEM_RECLAIM | WQ_UNBOUND | WQ_SYSFS, 0); 1980 if (!nvmet_wq) 1981 goto out_free_buffered_work_queue; 1982 1983 nvmet_aen_wq = alloc_workqueue("nvmet-aen-wq", 1984 WQ_MEM_RECLAIM | WQ_UNBOUND, 0); 1985 if (!nvmet_aen_wq) 1986 goto out_free_nvmet_work_queue; 1987 1988 error = nvmet_init_debugfs(); 1989 if (error) 1990 goto out_free_nvmet_aen_work_queue; 1991 1992 error = nvmet_init_discovery(); 1993 if (error) 1994 goto out_exit_debugfs; 1995 1996 error = nvmet_init_configfs(); 1997 if (error) 1998 goto out_exit_discovery; 1999 2000 return 0; 2001 2002 out_exit_discovery: 2003 nvmet_exit_discovery(); 2004 out_exit_debugfs: 2005 nvmet_exit_debugfs(); 2006 out_free_nvmet_aen_work_queue: 2007 destroy_workqueue(nvmet_aen_wq); 2008 out_free_nvmet_work_queue: 2009 destroy_workqueue(nvmet_wq); 2010 out_free_buffered_work_queue: 2011 destroy_workqueue(buffered_io_wq); 2012 out_free_zbd_work_queue: 2013 destroy_workqueue(zbd_wq); 2014 out_destroy_bvec_cache: 2015 kmem_cache_destroy(nvmet_bvec_cache); 2016 return error; 2017 } 2018 2019 static void __exit nvmet_exit(void) 2020 { 2021 nvmet_exit_configfs(); 2022 nvmet_exit_discovery(); 2023 nvmet_exit_debugfs(); 2024 ida_destroy(&cntlid_ida); 2025 destroy_workqueue(nvmet_aen_wq); 2026 destroy_workqueue(nvmet_wq); 2027 destroy_workqueue(buffered_io_wq); 2028 destroy_workqueue(zbd_wq); 2029 kmem_cache_destroy(nvmet_bvec_cache); 2030 2031 BUILD_BUG_ON(sizeof(struct nvmf_disc_rsp_page_entry) != 1024); 2032 BUILD_BUG_ON(sizeof(struct nvmf_disc_rsp_page_hdr) != 1024); 2033 } 2034 2035 module_init(nvmet_init); 2036 module_exit(nvmet_exit); 2037 2038 MODULE_DESCRIPTION("NVMe target core framework"); 2039 MODULE_LICENSE("GPL v2"); 2040