xref: /linux/drivers/nvme/host/rdma.c (revision aec499c75cf8e0b599be4d559e6922b613085f8f)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * NVMe over Fabrics RDMA host code.
4  * Copyright (c) 2015-2016 HGST, a Western Digital Company.
5  */
6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7 #include <linux/module.h>
8 #include <linux/init.h>
9 #include <linux/slab.h>
10 #include <rdma/mr_pool.h>
11 #include <linux/err.h>
12 #include <linux/string.h>
13 #include <linux/atomic.h>
14 #include <linux/blk-mq.h>
15 #include <linux/blk-mq-rdma.h>
16 #include <linux/blk-integrity.h>
17 #include <linux/types.h>
18 #include <linux/list.h>
19 #include <linux/mutex.h>
20 #include <linux/scatterlist.h>
21 #include <linux/nvme.h>
22 #include <asm/unaligned.h>
23 
24 #include <rdma/ib_verbs.h>
25 #include <rdma/rdma_cm.h>
26 #include <linux/nvme-rdma.h>
27 
28 #include "nvme.h"
29 #include "fabrics.h"
30 
31 
32 #define NVME_RDMA_CONNECT_TIMEOUT_MS	3000		/* 3 second */
33 
34 #define NVME_RDMA_MAX_SEGMENTS		256
35 
36 #define NVME_RDMA_MAX_INLINE_SEGMENTS	4
37 
38 #define NVME_RDMA_DATA_SGL_SIZE \
39 	(sizeof(struct scatterlist) * NVME_INLINE_SG_CNT)
40 #define NVME_RDMA_METADATA_SGL_SIZE \
41 	(sizeof(struct scatterlist) * NVME_INLINE_METADATA_SG_CNT)
42 
43 struct nvme_rdma_device {
44 	struct ib_device	*dev;
45 	struct ib_pd		*pd;
46 	struct kref		ref;
47 	struct list_head	entry;
48 	unsigned int		num_inline_segments;
49 };
50 
51 struct nvme_rdma_qe {
52 	struct ib_cqe		cqe;
53 	void			*data;
54 	u64			dma;
55 };
56 
57 struct nvme_rdma_sgl {
58 	int			nents;
59 	struct sg_table		sg_table;
60 };
61 
62 struct nvme_rdma_queue;
63 struct nvme_rdma_request {
64 	struct nvme_request	req;
65 	struct ib_mr		*mr;
66 	struct nvme_rdma_qe	sqe;
67 	union nvme_result	result;
68 	__le16			status;
69 	refcount_t		ref;
70 	struct ib_sge		sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
71 	u32			num_sge;
72 	struct ib_reg_wr	reg_wr;
73 	struct ib_cqe		reg_cqe;
74 	struct nvme_rdma_queue  *queue;
75 	struct nvme_rdma_sgl	data_sgl;
76 	struct nvme_rdma_sgl	*metadata_sgl;
77 	bool			use_sig_mr;
78 };
79 
80 enum nvme_rdma_queue_flags {
81 	NVME_RDMA_Q_ALLOCATED		= 0,
82 	NVME_RDMA_Q_LIVE		= 1,
83 	NVME_RDMA_Q_TR_READY		= 2,
84 };
85 
86 struct nvme_rdma_queue {
87 	struct nvme_rdma_qe	*rsp_ring;
88 	int			queue_size;
89 	size_t			cmnd_capsule_len;
90 	struct nvme_rdma_ctrl	*ctrl;
91 	struct nvme_rdma_device	*device;
92 	struct ib_cq		*ib_cq;
93 	struct ib_qp		*qp;
94 
95 	unsigned long		flags;
96 	struct rdma_cm_id	*cm_id;
97 	int			cm_error;
98 	struct completion	cm_done;
99 	bool			pi_support;
100 	int			cq_size;
101 	struct mutex		queue_lock;
102 };
103 
104 struct nvme_rdma_ctrl {
105 	/* read only in the hot path */
106 	struct nvme_rdma_queue	*queues;
107 
108 	/* other member variables */
109 	struct blk_mq_tag_set	tag_set;
110 	struct work_struct	err_work;
111 
112 	struct nvme_rdma_qe	async_event_sqe;
113 
114 	struct delayed_work	reconnect_work;
115 
116 	struct list_head	list;
117 
118 	struct blk_mq_tag_set	admin_tag_set;
119 	struct nvme_rdma_device	*device;
120 
121 	u32			max_fr_pages;
122 
123 	struct sockaddr_storage addr;
124 	struct sockaddr_storage src_addr;
125 
126 	struct nvme_ctrl	ctrl;
127 	bool			use_inline_data;
128 	u32			io_queues[HCTX_MAX_TYPES];
129 };
130 
131 static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
132 {
133 	return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
134 }
135 
136 static LIST_HEAD(device_list);
137 static DEFINE_MUTEX(device_list_mutex);
138 
139 static LIST_HEAD(nvme_rdma_ctrl_list);
140 static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
141 
142 /*
143  * Disabling this option makes small I/O goes faster, but is fundamentally
144  * unsafe.  With it turned off we will have to register a global rkey that
145  * allows read and write access to all physical memory.
146  */
147 static bool register_always = true;
148 module_param(register_always, bool, 0444);
149 MODULE_PARM_DESC(register_always,
150 	 "Use memory registration even for contiguous memory regions");
151 
152 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
153 		struct rdma_cm_event *event);
154 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
155 static void nvme_rdma_complete_rq(struct request *rq);
156 
157 static const struct blk_mq_ops nvme_rdma_mq_ops;
158 static const struct blk_mq_ops nvme_rdma_admin_mq_ops;
159 
160 static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
161 {
162 	return queue - queue->ctrl->queues;
163 }
164 
165 static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue)
166 {
167 	return nvme_rdma_queue_idx(queue) >
168 		queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] +
169 		queue->ctrl->io_queues[HCTX_TYPE_READ];
170 }
171 
172 static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
173 {
174 	return queue->cmnd_capsule_len - sizeof(struct nvme_command);
175 }
176 
177 static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
178 		size_t capsule_size, enum dma_data_direction dir)
179 {
180 	ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
181 	kfree(qe->data);
182 }
183 
184 static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
185 		size_t capsule_size, enum dma_data_direction dir)
186 {
187 	qe->data = kzalloc(capsule_size, GFP_KERNEL);
188 	if (!qe->data)
189 		return -ENOMEM;
190 
191 	qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
192 	if (ib_dma_mapping_error(ibdev, qe->dma)) {
193 		kfree(qe->data);
194 		qe->data = NULL;
195 		return -ENOMEM;
196 	}
197 
198 	return 0;
199 }
200 
201 static void nvme_rdma_free_ring(struct ib_device *ibdev,
202 		struct nvme_rdma_qe *ring, size_t ib_queue_size,
203 		size_t capsule_size, enum dma_data_direction dir)
204 {
205 	int i;
206 
207 	for (i = 0; i < ib_queue_size; i++)
208 		nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
209 	kfree(ring);
210 }
211 
212 static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
213 		size_t ib_queue_size, size_t capsule_size,
214 		enum dma_data_direction dir)
215 {
216 	struct nvme_rdma_qe *ring;
217 	int i;
218 
219 	ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL);
220 	if (!ring)
221 		return NULL;
222 
223 	/*
224 	 * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue
225 	 * lifetime. It's safe, since any chage in the underlying RDMA device
226 	 * will issue error recovery and queue re-creation.
227 	 */
228 	for (i = 0; i < ib_queue_size; i++) {
229 		if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
230 			goto out_free_ring;
231 	}
232 
233 	return ring;
234 
235 out_free_ring:
236 	nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
237 	return NULL;
238 }
239 
240 static void nvme_rdma_qp_event(struct ib_event *event, void *context)
241 {
242 	pr_debug("QP event %s (%d)\n",
243 		 ib_event_msg(event->event), event->event);
244 
245 }
246 
247 static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
248 {
249 	int ret;
250 
251 	ret = wait_for_completion_interruptible_timeout(&queue->cm_done,
252 			msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1);
253 	if (ret < 0)
254 		return ret;
255 	if (ret == 0)
256 		return -ETIMEDOUT;
257 	WARN_ON_ONCE(queue->cm_error > 0);
258 	return queue->cm_error;
259 }
260 
261 static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
262 {
263 	struct nvme_rdma_device *dev = queue->device;
264 	struct ib_qp_init_attr init_attr;
265 	int ret;
266 
267 	memset(&init_attr, 0, sizeof(init_attr));
268 	init_attr.event_handler = nvme_rdma_qp_event;
269 	/* +1 for drain */
270 	init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
271 	/* +1 for drain */
272 	init_attr.cap.max_recv_wr = queue->queue_size + 1;
273 	init_attr.cap.max_recv_sge = 1;
274 	init_attr.cap.max_send_sge = 1 + dev->num_inline_segments;
275 	init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
276 	init_attr.qp_type = IB_QPT_RC;
277 	init_attr.send_cq = queue->ib_cq;
278 	init_attr.recv_cq = queue->ib_cq;
279 	if (queue->pi_support)
280 		init_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN;
281 	init_attr.qp_context = queue;
282 
283 	ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
284 
285 	queue->qp = queue->cm_id->qp;
286 	return ret;
287 }
288 
289 static void nvme_rdma_exit_request(struct blk_mq_tag_set *set,
290 		struct request *rq, unsigned int hctx_idx)
291 {
292 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
293 
294 	kfree(req->sqe.data);
295 }
296 
297 static int nvme_rdma_init_request(struct blk_mq_tag_set *set,
298 		struct request *rq, unsigned int hctx_idx,
299 		unsigned int numa_node)
300 {
301 	struct nvme_rdma_ctrl *ctrl = set->driver_data;
302 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
303 	int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
304 	struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
305 
306 	nvme_req(rq)->ctrl = &ctrl->ctrl;
307 	req->sqe.data = kzalloc(sizeof(struct nvme_command), GFP_KERNEL);
308 	if (!req->sqe.data)
309 		return -ENOMEM;
310 
311 	/* metadata nvme_rdma_sgl struct is located after command's data SGL */
312 	if (queue->pi_support)
313 		req->metadata_sgl = (void *)nvme_req(rq) +
314 			sizeof(struct nvme_rdma_request) +
315 			NVME_RDMA_DATA_SGL_SIZE;
316 
317 	req->queue = queue;
318 	nvme_req(rq)->cmd = req->sqe.data;
319 
320 	return 0;
321 }
322 
323 static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
324 		unsigned int hctx_idx)
325 {
326 	struct nvme_rdma_ctrl *ctrl = data;
327 	struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
328 
329 	BUG_ON(hctx_idx >= ctrl->ctrl.queue_count);
330 
331 	hctx->driver_data = queue;
332 	return 0;
333 }
334 
335 static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
336 		unsigned int hctx_idx)
337 {
338 	struct nvme_rdma_ctrl *ctrl = data;
339 	struct nvme_rdma_queue *queue = &ctrl->queues[0];
340 
341 	BUG_ON(hctx_idx != 0);
342 
343 	hctx->driver_data = queue;
344 	return 0;
345 }
346 
347 static void nvme_rdma_free_dev(struct kref *ref)
348 {
349 	struct nvme_rdma_device *ndev =
350 		container_of(ref, struct nvme_rdma_device, ref);
351 
352 	mutex_lock(&device_list_mutex);
353 	list_del(&ndev->entry);
354 	mutex_unlock(&device_list_mutex);
355 
356 	ib_dealloc_pd(ndev->pd);
357 	kfree(ndev);
358 }
359 
360 static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
361 {
362 	kref_put(&dev->ref, nvme_rdma_free_dev);
363 }
364 
365 static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
366 {
367 	return kref_get_unless_zero(&dev->ref);
368 }
369 
370 static struct nvme_rdma_device *
371 nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
372 {
373 	struct nvme_rdma_device *ndev;
374 
375 	mutex_lock(&device_list_mutex);
376 	list_for_each_entry(ndev, &device_list, entry) {
377 		if (ndev->dev->node_guid == cm_id->device->node_guid &&
378 		    nvme_rdma_dev_get(ndev))
379 			goto out_unlock;
380 	}
381 
382 	ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
383 	if (!ndev)
384 		goto out_err;
385 
386 	ndev->dev = cm_id->device;
387 	kref_init(&ndev->ref);
388 
389 	ndev->pd = ib_alloc_pd(ndev->dev,
390 		register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
391 	if (IS_ERR(ndev->pd))
392 		goto out_free_dev;
393 
394 	if (!(ndev->dev->attrs.device_cap_flags &
395 	      IB_DEVICE_MEM_MGT_EXTENSIONS)) {
396 		dev_err(&ndev->dev->dev,
397 			"Memory registrations not supported.\n");
398 		goto out_free_pd;
399 	}
400 
401 	ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS,
402 					ndev->dev->attrs.max_send_sge - 1);
403 	list_add(&ndev->entry, &device_list);
404 out_unlock:
405 	mutex_unlock(&device_list_mutex);
406 	return ndev;
407 
408 out_free_pd:
409 	ib_dealloc_pd(ndev->pd);
410 out_free_dev:
411 	kfree(ndev);
412 out_err:
413 	mutex_unlock(&device_list_mutex);
414 	return NULL;
415 }
416 
417 static void nvme_rdma_free_cq(struct nvme_rdma_queue *queue)
418 {
419 	if (nvme_rdma_poll_queue(queue))
420 		ib_free_cq(queue->ib_cq);
421 	else
422 		ib_cq_pool_put(queue->ib_cq, queue->cq_size);
423 }
424 
425 static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
426 {
427 	struct nvme_rdma_device *dev;
428 	struct ib_device *ibdev;
429 
430 	if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags))
431 		return;
432 
433 	dev = queue->device;
434 	ibdev = dev->dev;
435 
436 	if (queue->pi_support)
437 		ib_mr_pool_destroy(queue->qp, &queue->qp->sig_mrs);
438 	ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
439 
440 	/*
441 	 * The cm_id object might have been destroyed during RDMA connection
442 	 * establishment error flow to avoid getting other cma events, thus
443 	 * the destruction of the QP shouldn't use rdma_cm API.
444 	 */
445 	ib_destroy_qp(queue->qp);
446 	nvme_rdma_free_cq(queue);
447 
448 	nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
449 			sizeof(struct nvme_completion), DMA_FROM_DEVICE);
450 
451 	nvme_rdma_dev_put(dev);
452 }
453 
454 static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev, bool pi_support)
455 {
456 	u32 max_page_list_len;
457 
458 	if (pi_support)
459 		max_page_list_len = ibdev->attrs.max_pi_fast_reg_page_list_len;
460 	else
461 		max_page_list_len = ibdev->attrs.max_fast_reg_page_list_len;
462 
463 	return min_t(u32, NVME_RDMA_MAX_SEGMENTS, max_page_list_len - 1);
464 }
465 
466 static int nvme_rdma_create_cq(struct ib_device *ibdev,
467 		struct nvme_rdma_queue *queue)
468 {
469 	int ret, comp_vector, idx = nvme_rdma_queue_idx(queue);
470 	enum ib_poll_context poll_ctx;
471 
472 	/*
473 	 * Spread I/O queues completion vectors according their queue index.
474 	 * Admin queues can always go on completion vector 0.
475 	 */
476 	comp_vector = (idx == 0 ? idx : idx - 1) % ibdev->num_comp_vectors;
477 
478 	/* Polling queues need direct cq polling context */
479 	if (nvme_rdma_poll_queue(queue)) {
480 		poll_ctx = IB_POLL_DIRECT;
481 		queue->ib_cq = ib_alloc_cq(ibdev, queue, queue->cq_size,
482 					   comp_vector, poll_ctx);
483 	} else {
484 		poll_ctx = IB_POLL_SOFTIRQ;
485 		queue->ib_cq = ib_cq_pool_get(ibdev, queue->cq_size,
486 					      comp_vector, poll_ctx);
487 	}
488 
489 	if (IS_ERR(queue->ib_cq)) {
490 		ret = PTR_ERR(queue->ib_cq);
491 		return ret;
492 	}
493 
494 	return 0;
495 }
496 
497 static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
498 {
499 	struct ib_device *ibdev;
500 	const int send_wr_factor = 3;			/* MR, SEND, INV */
501 	const int cq_factor = send_wr_factor + 1;	/* + RECV */
502 	int ret, pages_per_mr;
503 
504 	queue->device = nvme_rdma_find_get_device(queue->cm_id);
505 	if (!queue->device) {
506 		dev_err(queue->cm_id->device->dev.parent,
507 			"no client data found!\n");
508 		return -ECONNREFUSED;
509 	}
510 	ibdev = queue->device->dev;
511 
512 	/* +1 for ib_stop_cq */
513 	queue->cq_size = cq_factor * queue->queue_size + 1;
514 
515 	ret = nvme_rdma_create_cq(ibdev, queue);
516 	if (ret)
517 		goto out_put_dev;
518 
519 	ret = nvme_rdma_create_qp(queue, send_wr_factor);
520 	if (ret)
521 		goto out_destroy_ib_cq;
522 
523 	queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
524 			sizeof(struct nvme_completion), DMA_FROM_DEVICE);
525 	if (!queue->rsp_ring) {
526 		ret = -ENOMEM;
527 		goto out_destroy_qp;
528 	}
529 
530 	/*
531 	 * Currently we don't use SG_GAPS MR's so if the first entry is
532 	 * misaligned we'll end up using two entries for a single data page,
533 	 * so one additional entry is required.
534 	 */
535 	pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev, queue->pi_support) + 1;
536 	ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs,
537 			      queue->queue_size,
538 			      IB_MR_TYPE_MEM_REG,
539 			      pages_per_mr, 0);
540 	if (ret) {
541 		dev_err(queue->ctrl->ctrl.device,
542 			"failed to initialize MR pool sized %d for QID %d\n",
543 			queue->queue_size, nvme_rdma_queue_idx(queue));
544 		goto out_destroy_ring;
545 	}
546 
547 	if (queue->pi_support) {
548 		ret = ib_mr_pool_init(queue->qp, &queue->qp->sig_mrs,
549 				      queue->queue_size, IB_MR_TYPE_INTEGRITY,
550 				      pages_per_mr, pages_per_mr);
551 		if (ret) {
552 			dev_err(queue->ctrl->ctrl.device,
553 				"failed to initialize PI MR pool sized %d for QID %d\n",
554 				queue->queue_size, nvme_rdma_queue_idx(queue));
555 			goto out_destroy_mr_pool;
556 		}
557 	}
558 
559 	set_bit(NVME_RDMA_Q_TR_READY, &queue->flags);
560 
561 	return 0;
562 
563 out_destroy_mr_pool:
564 	ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
565 out_destroy_ring:
566 	nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
567 			    sizeof(struct nvme_completion), DMA_FROM_DEVICE);
568 out_destroy_qp:
569 	rdma_destroy_qp(queue->cm_id);
570 out_destroy_ib_cq:
571 	nvme_rdma_free_cq(queue);
572 out_put_dev:
573 	nvme_rdma_dev_put(queue->device);
574 	return ret;
575 }
576 
577 static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl,
578 		int idx, size_t queue_size)
579 {
580 	struct nvme_rdma_queue *queue;
581 	struct sockaddr *src_addr = NULL;
582 	int ret;
583 
584 	queue = &ctrl->queues[idx];
585 	mutex_init(&queue->queue_lock);
586 	queue->ctrl = ctrl;
587 	if (idx && ctrl->ctrl.max_integrity_segments)
588 		queue->pi_support = true;
589 	else
590 		queue->pi_support = false;
591 	init_completion(&queue->cm_done);
592 
593 	if (idx > 0)
594 		queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
595 	else
596 		queue->cmnd_capsule_len = sizeof(struct nvme_command);
597 
598 	queue->queue_size = queue_size;
599 
600 	queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
601 			RDMA_PS_TCP, IB_QPT_RC);
602 	if (IS_ERR(queue->cm_id)) {
603 		dev_info(ctrl->ctrl.device,
604 			"failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
605 		ret = PTR_ERR(queue->cm_id);
606 		goto out_destroy_mutex;
607 	}
608 
609 	if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
610 		src_addr = (struct sockaddr *)&ctrl->src_addr;
611 
612 	queue->cm_error = -ETIMEDOUT;
613 	ret = rdma_resolve_addr(queue->cm_id, src_addr,
614 			(struct sockaddr *)&ctrl->addr,
615 			NVME_RDMA_CONNECT_TIMEOUT_MS);
616 	if (ret) {
617 		dev_info(ctrl->ctrl.device,
618 			"rdma_resolve_addr failed (%d).\n", ret);
619 		goto out_destroy_cm_id;
620 	}
621 
622 	ret = nvme_rdma_wait_for_cm(queue);
623 	if (ret) {
624 		dev_info(ctrl->ctrl.device,
625 			"rdma connection establishment failed (%d)\n", ret);
626 		goto out_destroy_cm_id;
627 	}
628 
629 	set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags);
630 
631 	return 0;
632 
633 out_destroy_cm_id:
634 	rdma_destroy_id(queue->cm_id);
635 	nvme_rdma_destroy_queue_ib(queue);
636 out_destroy_mutex:
637 	mutex_destroy(&queue->queue_lock);
638 	return ret;
639 }
640 
641 static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
642 {
643 	rdma_disconnect(queue->cm_id);
644 	ib_drain_qp(queue->qp);
645 }
646 
647 static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
648 {
649 	mutex_lock(&queue->queue_lock);
650 	if (test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags))
651 		__nvme_rdma_stop_queue(queue);
652 	mutex_unlock(&queue->queue_lock);
653 }
654 
655 static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
656 {
657 	if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
658 		return;
659 
660 	rdma_destroy_id(queue->cm_id);
661 	nvme_rdma_destroy_queue_ib(queue);
662 	mutex_destroy(&queue->queue_lock);
663 }
664 
665 static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
666 {
667 	int i;
668 
669 	for (i = 1; i < ctrl->ctrl.queue_count; i++)
670 		nvme_rdma_free_queue(&ctrl->queues[i]);
671 }
672 
673 static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl)
674 {
675 	int i;
676 
677 	for (i = 1; i < ctrl->ctrl.queue_count; i++)
678 		nvme_rdma_stop_queue(&ctrl->queues[i]);
679 }
680 
681 static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx)
682 {
683 	struct nvme_rdma_queue *queue = &ctrl->queues[idx];
684 	int ret;
685 
686 	if (idx)
687 		ret = nvmf_connect_io_queue(&ctrl->ctrl, idx);
688 	else
689 		ret = nvmf_connect_admin_queue(&ctrl->ctrl);
690 
691 	if (!ret) {
692 		set_bit(NVME_RDMA_Q_LIVE, &queue->flags);
693 	} else {
694 		if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
695 			__nvme_rdma_stop_queue(queue);
696 		dev_info(ctrl->ctrl.device,
697 			"failed to connect queue: %d ret=%d\n", idx, ret);
698 	}
699 	return ret;
700 }
701 
702 static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl)
703 {
704 	int i, ret = 0;
705 
706 	for (i = 1; i < ctrl->ctrl.queue_count; i++) {
707 		ret = nvme_rdma_start_queue(ctrl, i);
708 		if (ret)
709 			goto out_stop_queues;
710 	}
711 
712 	return 0;
713 
714 out_stop_queues:
715 	for (i--; i >= 1; i--)
716 		nvme_rdma_stop_queue(&ctrl->queues[i]);
717 	return ret;
718 }
719 
720 static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl)
721 {
722 	struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
723 	struct ib_device *ibdev = ctrl->device->dev;
724 	unsigned int nr_io_queues, nr_default_queues;
725 	unsigned int nr_read_queues, nr_poll_queues;
726 	int i, ret;
727 
728 	nr_read_queues = min_t(unsigned int, ibdev->num_comp_vectors,
729 				min(opts->nr_io_queues, num_online_cpus()));
730 	nr_default_queues =  min_t(unsigned int, ibdev->num_comp_vectors,
731 				min(opts->nr_write_queues, num_online_cpus()));
732 	nr_poll_queues = min(opts->nr_poll_queues, num_online_cpus());
733 	nr_io_queues = nr_read_queues + nr_default_queues + nr_poll_queues;
734 
735 	ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues);
736 	if (ret)
737 		return ret;
738 
739 	if (nr_io_queues == 0) {
740 		dev_err(ctrl->ctrl.device,
741 			"unable to set any I/O queues\n");
742 		return -ENOMEM;
743 	}
744 
745 	ctrl->ctrl.queue_count = nr_io_queues + 1;
746 	dev_info(ctrl->ctrl.device,
747 		"creating %d I/O queues.\n", nr_io_queues);
748 
749 	if (opts->nr_write_queues && nr_read_queues < nr_io_queues) {
750 		/*
751 		 * separate read/write queues
752 		 * hand out dedicated default queues only after we have
753 		 * sufficient read queues.
754 		 */
755 		ctrl->io_queues[HCTX_TYPE_READ] = nr_read_queues;
756 		nr_io_queues -= ctrl->io_queues[HCTX_TYPE_READ];
757 		ctrl->io_queues[HCTX_TYPE_DEFAULT] =
758 			min(nr_default_queues, nr_io_queues);
759 		nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT];
760 	} else {
761 		/*
762 		 * shared read/write queues
763 		 * either no write queues were requested, or we don't have
764 		 * sufficient queue count to have dedicated default queues.
765 		 */
766 		ctrl->io_queues[HCTX_TYPE_DEFAULT] =
767 			min(nr_read_queues, nr_io_queues);
768 		nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT];
769 	}
770 
771 	if (opts->nr_poll_queues && nr_io_queues) {
772 		/* map dedicated poll queues only if we have queues left */
773 		ctrl->io_queues[HCTX_TYPE_POLL] =
774 			min(nr_poll_queues, nr_io_queues);
775 	}
776 
777 	for (i = 1; i < ctrl->ctrl.queue_count; i++) {
778 		ret = nvme_rdma_alloc_queue(ctrl, i,
779 				ctrl->ctrl.sqsize + 1);
780 		if (ret)
781 			goto out_free_queues;
782 	}
783 
784 	return 0;
785 
786 out_free_queues:
787 	for (i--; i >= 1; i--)
788 		nvme_rdma_free_queue(&ctrl->queues[i]);
789 
790 	return ret;
791 }
792 
793 static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl,
794 		bool admin)
795 {
796 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
797 	struct blk_mq_tag_set *set;
798 	int ret;
799 
800 	if (admin) {
801 		set = &ctrl->admin_tag_set;
802 		memset(set, 0, sizeof(*set));
803 		set->ops = &nvme_rdma_admin_mq_ops;
804 		set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
805 		set->reserved_tags = NVMF_RESERVED_TAGS;
806 		set->numa_node = nctrl->numa_node;
807 		set->cmd_size = sizeof(struct nvme_rdma_request) +
808 				NVME_RDMA_DATA_SGL_SIZE;
809 		set->driver_data = ctrl;
810 		set->nr_hw_queues = 1;
811 		set->timeout = NVME_ADMIN_TIMEOUT;
812 		set->flags = BLK_MQ_F_NO_SCHED;
813 	} else {
814 		set = &ctrl->tag_set;
815 		memset(set, 0, sizeof(*set));
816 		set->ops = &nvme_rdma_mq_ops;
817 		set->queue_depth = nctrl->sqsize + 1;
818 		set->reserved_tags = NVMF_RESERVED_TAGS;
819 		set->numa_node = nctrl->numa_node;
820 		set->flags = BLK_MQ_F_SHOULD_MERGE;
821 		set->cmd_size = sizeof(struct nvme_rdma_request) +
822 				NVME_RDMA_DATA_SGL_SIZE;
823 		if (nctrl->max_integrity_segments)
824 			set->cmd_size += sizeof(struct nvme_rdma_sgl) +
825 					 NVME_RDMA_METADATA_SGL_SIZE;
826 		set->driver_data = ctrl;
827 		set->nr_hw_queues = nctrl->queue_count - 1;
828 		set->timeout = NVME_IO_TIMEOUT;
829 		set->nr_maps = nctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2;
830 	}
831 
832 	ret = blk_mq_alloc_tag_set(set);
833 	if (ret)
834 		return ERR_PTR(ret);
835 
836 	return set;
837 }
838 
839 static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl,
840 		bool remove)
841 {
842 	if (remove) {
843 		blk_cleanup_queue(ctrl->ctrl.admin_q);
844 		blk_cleanup_queue(ctrl->ctrl.fabrics_q);
845 		blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
846 	}
847 	if (ctrl->async_event_sqe.data) {
848 		cancel_work_sync(&ctrl->ctrl.async_event_work);
849 		nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
850 				sizeof(struct nvme_command), DMA_TO_DEVICE);
851 		ctrl->async_event_sqe.data = NULL;
852 	}
853 	nvme_rdma_free_queue(&ctrl->queues[0]);
854 }
855 
856 static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl,
857 		bool new)
858 {
859 	bool pi_capable = false;
860 	int error;
861 
862 	error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH);
863 	if (error)
864 		return error;
865 
866 	ctrl->device = ctrl->queues[0].device;
867 	ctrl->ctrl.numa_node = ibdev_to_node(ctrl->device->dev);
868 
869 	/* T10-PI support */
870 	if (ctrl->device->dev->attrs.device_cap_flags &
871 	    IB_DEVICE_INTEGRITY_HANDOVER)
872 		pi_capable = true;
873 
874 	ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev,
875 							pi_capable);
876 
877 	/*
878 	 * Bind the async event SQE DMA mapping to the admin queue lifetime.
879 	 * It's safe, since any chage in the underlying RDMA device will issue
880 	 * error recovery and queue re-creation.
881 	 */
882 	error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe,
883 			sizeof(struct nvme_command), DMA_TO_DEVICE);
884 	if (error)
885 		goto out_free_queue;
886 
887 	if (new) {
888 		ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true);
889 		if (IS_ERR(ctrl->ctrl.admin_tagset)) {
890 			error = PTR_ERR(ctrl->ctrl.admin_tagset);
891 			goto out_free_async_qe;
892 		}
893 
894 		ctrl->ctrl.fabrics_q = blk_mq_init_queue(&ctrl->admin_tag_set);
895 		if (IS_ERR(ctrl->ctrl.fabrics_q)) {
896 			error = PTR_ERR(ctrl->ctrl.fabrics_q);
897 			goto out_free_tagset;
898 		}
899 
900 		ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set);
901 		if (IS_ERR(ctrl->ctrl.admin_q)) {
902 			error = PTR_ERR(ctrl->ctrl.admin_q);
903 			goto out_cleanup_fabrics_q;
904 		}
905 	}
906 
907 	error = nvme_rdma_start_queue(ctrl, 0);
908 	if (error)
909 		goto out_cleanup_queue;
910 
911 	error = nvme_enable_ctrl(&ctrl->ctrl);
912 	if (error)
913 		goto out_stop_queue;
914 
915 	ctrl->ctrl.max_segments = ctrl->max_fr_pages;
916 	ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9);
917 	if (pi_capable)
918 		ctrl->ctrl.max_integrity_segments = ctrl->max_fr_pages;
919 	else
920 		ctrl->ctrl.max_integrity_segments = 0;
921 
922 	nvme_start_admin_queue(&ctrl->ctrl);
923 
924 	error = nvme_init_ctrl_finish(&ctrl->ctrl);
925 	if (error)
926 		goto out_quiesce_queue;
927 
928 	return 0;
929 
930 out_quiesce_queue:
931 	nvme_stop_admin_queue(&ctrl->ctrl);
932 	blk_sync_queue(ctrl->ctrl.admin_q);
933 out_stop_queue:
934 	nvme_rdma_stop_queue(&ctrl->queues[0]);
935 	nvme_cancel_admin_tagset(&ctrl->ctrl);
936 out_cleanup_queue:
937 	if (new)
938 		blk_cleanup_queue(ctrl->ctrl.admin_q);
939 out_cleanup_fabrics_q:
940 	if (new)
941 		blk_cleanup_queue(ctrl->ctrl.fabrics_q);
942 out_free_tagset:
943 	if (new)
944 		blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
945 out_free_async_qe:
946 	if (ctrl->async_event_sqe.data) {
947 		nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
948 			sizeof(struct nvme_command), DMA_TO_DEVICE);
949 		ctrl->async_event_sqe.data = NULL;
950 	}
951 out_free_queue:
952 	nvme_rdma_free_queue(&ctrl->queues[0]);
953 	return error;
954 }
955 
956 static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl,
957 		bool remove)
958 {
959 	if (remove) {
960 		blk_cleanup_queue(ctrl->ctrl.connect_q);
961 		blk_mq_free_tag_set(ctrl->ctrl.tagset);
962 	}
963 	nvme_rdma_free_io_queues(ctrl);
964 }
965 
966 static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
967 {
968 	int ret;
969 
970 	ret = nvme_rdma_alloc_io_queues(ctrl);
971 	if (ret)
972 		return ret;
973 
974 	if (new) {
975 		ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false);
976 		if (IS_ERR(ctrl->ctrl.tagset)) {
977 			ret = PTR_ERR(ctrl->ctrl.tagset);
978 			goto out_free_io_queues;
979 		}
980 
981 		ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set);
982 		if (IS_ERR(ctrl->ctrl.connect_q)) {
983 			ret = PTR_ERR(ctrl->ctrl.connect_q);
984 			goto out_free_tag_set;
985 		}
986 	}
987 
988 	ret = nvme_rdma_start_io_queues(ctrl);
989 	if (ret)
990 		goto out_cleanup_connect_q;
991 
992 	if (!new) {
993 		nvme_start_queues(&ctrl->ctrl);
994 		if (!nvme_wait_freeze_timeout(&ctrl->ctrl, NVME_IO_TIMEOUT)) {
995 			/*
996 			 * If we timed out waiting for freeze we are likely to
997 			 * be stuck.  Fail the controller initialization just
998 			 * to be safe.
999 			 */
1000 			ret = -ENODEV;
1001 			goto out_wait_freeze_timed_out;
1002 		}
1003 		blk_mq_update_nr_hw_queues(ctrl->ctrl.tagset,
1004 			ctrl->ctrl.queue_count - 1);
1005 		nvme_unfreeze(&ctrl->ctrl);
1006 	}
1007 
1008 	return 0;
1009 
1010 out_wait_freeze_timed_out:
1011 	nvme_stop_queues(&ctrl->ctrl);
1012 	nvme_sync_io_queues(&ctrl->ctrl);
1013 	nvme_rdma_stop_io_queues(ctrl);
1014 out_cleanup_connect_q:
1015 	nvme_cancel_tagset(&ctrl->ctrl);
1016 	if (new)
1017 		blk_cleanup_queue(ctrl->ctrl.connect_q);
1018 out_free_tag_set:
1019 	if (new)
1020 		blk_mq_free_tag_set(ctrl->ctrl.tagset);
1021 out_free_io_queues:
1022 	nvme_rdma_free_io_queues(ctrl);
1023 	return ret;
1024 }
1025 
1026 static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl,
1027 		bool remove)
1028 {
1029 	nvme_stop_admin_queue(&ctrl->ctrl);
1030 	blk_sync_queue(ctrl->ctrl.admin_q);
1031 	nvme_rdma_stop_queue(&ctrl->queues[0]);
1032 	nvme_cancel_admin_tagset(&ctrl->ctrl);
1033 	if (remove)
1034 		nvme_start_admin_queue(&ctrl->ctrl);
1035 	nvme_rdma_destroy_admin_queue(ctrl, remove);
1036 }
1037 
1038 static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl,
1039 		bool remove)
1040 {
1041 	if (ctrl->ctrl.queue_count > 1) {
1042 		nvme_start_freeze(&ctrl->ctrl);
1043 		nvme_stop_queues(&ctrl->ctrl);
1044 		nvme_sync_io_queues(&ctrl->ctrl);
1045 		nvme_rdma_stop_io_queues(ctrl);
1046 		nvme_cancel_tagset(&ctrl->ctrl);
1047 		if (remove)
1048 			nvme_start_queues(&ctrl->ctrl);
1049 		nvme_rdma_destroy_io_queues(ctrl, remove);
1050 	}
1051 }
1052 
1053 static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
1054 {
1055 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
1056 
1057 	if (list_empty(&ctrl->list))
1058 		goto free_ctrl;
1059 
1060 	mutex_lock(&nvme_rdma_ctrl_mutex);
1061 	list_del(&ctrl->list);
1062 	mutex_unlock(&nvme_rdma_ctrl_mutex);
1063 
1064 	nvmf_free_options(nctrl->opts);
1065 free_ctrl:
1066 	kfree(ctrl->queues);
1067 	kfree(ctrl);
1068 }
1069 
1070 static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl)
1071 {
1072 	/* If we are resetting/deleting then do nothing */
1073 	if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) {
1074 		WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW ||
1075 			ctrl->ctrl.state == NVME_CTRL_LIVE);
1076 		return;
1077 	}
1078 
1079 	if (nvmf_should_reconnect(&ctrl->ctrl)) {
1080 		dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n",
1081 			ctrl->ctrl.opts->reconnect_delay);
1082 		queue_delayed_work(nvme_wq, &ctrl->reconnect_work,
1083 				ctrl->ctrl.opts->reconnect_delay * HZ);
1084 	} else {
1085 		nvme_delete_ctrl(&ctrl->ctrl);
1086 	}
1087 }
1088 
1089 static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new)
1090 {
1091 	int ret;
1092 	bool changed;
1093 
1094 	ret = nvme_rdma_configure_admin_queue(ctrl, new);
1095 	if (ret)
1096 		return ret;
1097 
1098 	if (ctrl->ctrl.icdoff) {
1099 		ret = -EOPNOTSUPP;
1100 		dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
1101 		goto destroy_admin;
1102 	}
1103 
1104 	if (!(ctrl->ctrl.sgls & (1 << 2))) {
1105 		ret = -EOPNOTSUPP;
1106 		dev_err(ctrl->ctrl.device,
1107 			"Mandatory keyed sgls are not supported!\n");
1108 		goto destroy_admin;
1109 	}
1110 
1111 	if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) {
1112 		dev_warn(ctrl->ctrl.device,
1113 			"queue_size %zu > ctrl sqsize %u, clamping down\n",
1114 			ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1);
1115 	}
1116 
1117 	if (ctrl->ctrl.sqsize + 1 > NVME_RDMA_MAX_QUEUE_SIZE) {
1118 		dev_warn(ctrl->ctrl.device,
1119 			"ctrl sqsize %u > max queue size %u, clamping down\n",
1120 			ctrl->ctrl.sqsize + 1, NVME_RDMA_MAX_QUEUE_SIZE);
1121 		ctrl->ctrl.sqsize = NVME_RDMA_MAX_QUEUE_SIZE - 1;
1122 	}
1123 
1124 	if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) {
1125 		dev_warn(ctrl->ctrl.device,
1126 			"sqsize %u > ctrl maxcmd %u, clamping down\n",
1127 			ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd);
1128 		ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1;
1129 	}
1130 
1131 	if (ctrl->ctrl.sgls & (1 << 20))
1132 		ctrl->use_inline_data = true;
1133 
1134 	if (ctrl->ctrl.queue_count > 1) {
1135 		ret = nvme_rdma_configure_io_queues(ctrl, new);
1136 		if (ret)
1137 			goto destroy_admin;
1138 	}
1139 
1140 	changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
1141 	if (!changed) {
1142 		/*
1143 		 * state change failure is ok if we started ctrl delete,
1144 		 * unless we're during creation of a new controller to
1145 		 * avoid races with teardown flow.
1146 		 */
1147 		WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING &&
1148 			     ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO);
1149 		WARN_ON_ONCE(new);
1150 		ret = -EINVAL;
1151 		goto destroy_io;
1152 	}
1153 
1154 	nvme_start_ctrl(&ctrl->ctrl);
1155 	return 0;
1156 
1157 destroy_io:
1158 	if (ctrl->ctrl.queue_count > 1) {
1159 		nvme_stop_queues(&ctrl->ctrl);
1160 		nvme_sync_io_queues(&ctrl->ctrl);
1161 		nvme_rdma_stop_io_queues(ctrl);
1162 		nvme_cancel_tagset(&ctrl->ctrl);
1163 		nvme_rdma_destroy_io_queues(ctrl, new);
1164 	}
1165 destroy_admin:
1166 	nvme_stop_admin_queue(&ctrl->ctrl);
1167 	blk_sync_queue(ctrl->ctrl.admin_q);
1168 	nvme_rdma_stop_queue(&ctrl->queues[0]);
1169 	nvme_cancel_admin_tagset(&ctrl->ctrl);
1170 	nvme_rdma_destroy_admin_queue(ctrl, new);
1171 	return ret;
1172 }
1173 
1174 static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
1175 {
1176 	struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
1177 			struct nvme_rdma_ctrl, reconnect_work);
1178 
1179 	++ctrl->ctrl.nr_reconnects;
1180 
1181 	if (nvme_rdma_setup_ctrl(ctrl, false))
1182 		goto requeue;
1183 
1184 	dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n",
1185 			ctrl->ctrl.nr_reconnects);
1186 
1187 	ctrl->ctrl.nr_reconnects = 0;
1188 
1189 	return;
1190 
1191 requeue:
1192 	dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n",
1193 			ctrl->ctrl.nr_reconnects);
1194 	nvme_rdma_reconnect_or_remove(ctrl);
1195 }
1196 
1197 static void nvme_rdma_error_recovery_work(struct work_struct *work)
1198 {
1199 	struct nvme_rdma_ctrl *ctrl = container_of(work,
1200 			struct nvme_rdma_ctrl, err_work);
1201 
1202 	nvme_stop_keep_alive(&ctrl->ctrl);
1203 	flush_work(&ctrl->ctrl.async_event_work);
1204 	nvme_rdma_teardown_io_queues(ctrl, false);
1205 	nvme_start_queues(&ctrl->ctrl);
1206 	nvme_rdma_teardown_admin_queue(ctrl, false);
1207 	nvme_start_admin_queue(&ctrl->ctrl);
1208 
1209 	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
1210 		/* state change failure is ok if we started ctrl delete */
1211 		WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING &&
1212 			     ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO);
1213 		return;
1214 	}
1215 
1216 	nvme_rdma_reconnect_or_remove(ctrl);
1217 }
1218 
1219 static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
1220 {
1221 	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
1222 		return;
1223 
1224 	dev_warn(ctrl->ctrl.device, "starting error recovery\n");
1225 	queue_work(nvme_reset_wq, &ctrl->err_work);
1226 }
1227 
1228 static void nvme_rdma_end_request(struct nvme_rdma_request *req)
1229 {
1230 	struct request *rq = blk_mq_rq_from_pdu(req);
1231 
1232 	if (!refcount_dec_and_test(&req->ref))
1233 		return;
1234 	if (!nvme_try_complete_req(rq, req->status, req->result))
1235 		nvme_rdma_complete_rq(rq);
1236 }
1237 
1238 static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
1239 		const char *op)
1240 {
1241 	struct nvme_rdma_queue *queue = wc->qp->qp_context;
1242 	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1243 
1244 	if (ctrl->ctrl.state == NVME_CTRL_LIVE)
1245 		dev_info(ctrl->ctrl.device,
1246 			     "%s for CQE 0x%p failed with status %s (%d)\n",
1247 			     op, wc->wr_cqe,
1248 			     ib_wc_status_msg(wc->status), wc->status);
1249 	nvme_rdma_error_recovery(ctrl);
1250 }
1251 
1252 static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
1253 {
1254 	if (unlikely(wc->status != IB_WC_SUCCESS))
1255 		nvme_rdma_wr_error(cq, wc, "MEMREG");
1256 }
1257 
1258 static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
1259 {
1260 	struct nvme_rdma_request *req =
1261 		container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe);
1262 
1263 	if (unlikely(wc->status != IB_WC_SUCCESS))
1264 		nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
1265 	else
1266 		nvme_rdma_end_request(req);
1267 }
1268 
1269 static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
1270 		struct nvme_rdma_request *req)
1271 {
1272 	struct ib_send_wr wr = {
1273 		.opcode		    = IB_WR_LOCAL_INV,
1274 		.next		    = NULL,
1275 		.num_sge	    = 0,
1276 		.send_flags	    = IB_SEND_SIGNALED,
1277 		.ex.invalidate_rkey = req->mr->rkey,
1278 	};
1279 
1280 	req->reg_cqe.done = nvme_rdma_inv_rkey_done;
1281 	wr.wr_cqe = &req->reg_cqe;
1282 
1283 	return ib_post_send(queue->qp, &wr, NULL);
1284 }
1285 
1286 static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
1287 		struct request *rq)
1288 {
1289 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1290 	struct nvme_rdma_device *dev = queue->device;
1291 	struct ib_device *ibdev = dev->dev;
1292 	struct list_head *pool = &queue->qp->rdma_mrs;
1293 
1294 	if (!blk_rq_nr_phys_segments(rq))
1295 		return;
1296 
1297 	if (blk_integrity_rq(rq)) {
1298 		ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl,
1299 				req->metadata_sgl->nents, rq_dma_dir(rq));
1300 		sg_free_table_chained(&req->metadata_sgl->sg_table,
1301 				      NVME_INLINE_METADATA_SG_CNT);
1302 	}
1303 
1304 	if (req->use_sig_mr)
1305 		pool = &queue->qp->sig_mrs;
1306 
1307 	if (req->mr) {
1308 		ib_mr_pool_put(queue->qp, pool, req->mr);
1309 		req->mr = NULL;
1310 	}
1311 
1312 	ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents,
1313 			rq_dma_dir(rq));
1314 	sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT);
1315 }
1316 
1317 static int nvme_rdma_set_sg_null(struct nvme_command *c)
1318 {
1319 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1320 
1321 	sg->addr = 0;
1322 	put_unaligned_le24(0, sg->length);
1323 	put_unaligned_le32(0, sg->key);
1324 	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1325 	return 0;
1326 }
1327 
1328 static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
1329 		struct nvme_rdma_request *req, struct nvme_command *c,
1330 		int count)
1331 {
1332 	struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
1333 	struct ib_sge *sge = &req->sge[1];
1334 	struct scatterlist *sgl;
1335 	u32 len = 0;
1336 	int i;
1337 
1338 	for_each_sg(req->data_sgl.sg_table.sgl, sgl, count, i) {
1339 		sge->addr = sg_dma_address(sgl);
1340 		sge->length = sg_dma_len(sgl);
1341 		sge->lkey = queue->device->pd->local_dma_lkey;
1342 		len += sge->length;
1343 		sge++;
1344 	}
1345 
1346 	sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
1347 	sg->length = cpu_to_le32(len);
1348 	sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
1349 
1350 	req->num_sge += count;
1351 	return 0;
1352 }
1353 
1354 static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
1355 		struct nvme_rdma_request *req, struct nvme_command *c)
1356 {
1357 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1358 
1359 	sg->addr = cpu_to_le64(sg_dma_address(req->data_sgl.sg_table.sgl));
1360 	put_unaligned_le24(sg_dma_len(req->data_sgl.sg_table.sgl), sg->length);
1361 	put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
1362 	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1363 	return 0;
1364 }
1365 
1366 static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
1367 		struct nvme_rdma_request *req, struct nvme_command *c,
1368 		int count)
1369 {
1370 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1371 	int nr;
1372 
1373 	req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs);
1374 	if (WARN_ON_ONCE(!req->mr))
1375 		return -EAGAIN;
1376 
1377 	/*
1378 	 * Align the MR to a 4K page size to match the ctrl page size and
1379 	 * the block virtual boundary.
1380 	 */
1381 	nr = ib_map_mr_sg(req->mr, req->data_sgl.sg_table.sgl, count, NULL,
1382 			  SZ_4K);
1383 	if (unlikely(nr < count)) {
1384 		ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
1385 		req->mr = NULL;
1386 		if (nr < 0)
1387 			return nr;
1388 		return -EINVAL;
1389 	}
1390 
1391 	ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1392 
1393 	req->reg_cqe.done = nvme_rdma_memreg_done;
1394 	memset(&req->reg_wr, 0, sizeof(req->reg_wr));
1395 	req->reg_wr.wr.opcode = IB_WR_REG_MR;
1396 	req->reg_wr.wr.wr_cqe = &req->reg_cqe;
1397 	req->reg_wr.wr.num_sge = 0;
1398 	req->reg_wr.mr = req->mr;
1399 	req->reg_wr.key = req->mr->rkey;
1400 	req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
1401 			     IB_ACCESS_REMOTE_READ |
1402 			     IB_ACCESS_REMOTE_WRITE;
1403 
1404 	sg->addr = cpu_to_le64(req->mr->iova);
1405 	put_unaligned_le24(req->mr->length, sg->length);
1406 	put_unaligned_le32(req->mr->rkey, sg->key);
1407 	sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
1408 			NVME_SGL_FMT_INVALIDATE;
1409 
1410 	return 0;
1411 }
1412 
1413 static void nvme_rdma_set_sig_domain(struct blk_integrity *bi,
1414 		struct nvme_command *cmd, struct ib_sig_domain *domain,
1415 		u16 control, u8 pi_type)
1416 {
1417 	domain->sig_type = IB_SIG_TYPE_T10_DIF;
1418 	domain->sig.dif.bg_type = IB_T10DIF_CRC;
1419 	domain->sig.dif.pi_interval = 1 << bi->interval_exp;
1420 	domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag);
1421 	if (control & NVME_RW_PRINFO_PRCHK_REF)
1422 		domain->sig.dif.ref_remap = true;
1423 
1424 	domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.apptag);
1425 	domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.appmask);
1426 	domain->sig.dif.app_escape = true;
1427 	if (pi_type == NVME_NS_DPS_PI_TYPE3)
1428 		domain->sig.dif.ref_escape = true;
1429 }
1430 
1431 static void nvme_rdma_set_sig_attrs(struct blk_integrity *bi,
1432 		struct nvme_command *cmd, struct ib_sig_attrs *sig_attrs,
1433 		u8 pi_type)
1434 {
1435 	u16 control = le16_to_cpu(cmd->rw.control);
1436 
1437 	memset(sig_attrs, 0, sizeof(*sig_attrs));
1438 	if (control & NVME_RW_PRINFO_PRACT) {
1439 		/* for WRITE_INSERT/READ_STRIP no memory domain */
1440 		sig_attrs->mem.sig_type = IB_SIG_TYPE_NONE;
1441 		nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control,
1442 					 pi_type);
1443 		/* Clear the PRACT bit since HCA will generate/verify the PI */
1444 		control &= ~NVME_RW_PRINFO_PRACT;
1445 		cmd->rw.control = cpu_to_le16(control);
1446 	} else {
1447 		/* for WRITE_PASS/READ_PASS both wire/memory domains exist */
1448 		nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control,
1449 					 pi_type);
1450 		nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control,
1451 					 pi_type);
1452 	}
1453 }
1454 
1455 static void nvme_rdma_set_prot_checks(struct nvme_command *cmd, u8 *mask)
1456 {
1457 	*mask = 0;
1458 	if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_REF)
1459 		*mask |= IB_SIG_CHECK_REFTAG;
1460 	if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_GUARD)
1461 		*mask |= IB_SIG_CHECK_GUARD;
1462 }
1463 
1464 static void nvme_rdma_sig_done(struct ib_cq *cq, struct ib_wc *wc)
1465 {
1466 	if (unlikely(wc->status != IB_WC_SUCCESS))
1467 		nvme_rdma_wr_error(cq, wc, "SIG");
1468 }
1469 
1470 static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue,
1471 		struct nvme_rdma_request *req, struct nvme_command *c,
1472 		int count, int pi_count)
1473 {
1474 	struct nvme_rdma_sgl *sgl = &req->data_sgl;
1475 	struct ib_reg_wr *wr = &req->reg_wr;
1476 	struct request *rq = blk_mq_rq_from_pdu(req);
1477 	struct nvme_ns *ns = rq->q->queuedata;
1478 	struct bio *bio = rq->bio;
1479 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1480 	int nr;
1481 
1482 	req->mr = ib_mr_pool_get(queue->qp, &queue->qp->sig_mrs);
1483 	if (WARN_ON_ONCE(!req->mr))
1484 		return -EAGAIN;
1485 
1486 	nr = ib_map_mr_sg_pi(req->mr, sgl->sg_table.sgl, count, NULL,
1487 			     req->metadata_sgl->sg_table.sgl, pi_count, NULL,
1488 			     SZ_4K);
1489 	if (unlikely(nr))
1490 		goto mr_put;
1491 
1492 	nvme_rdma_set_sig_attrs(blk_get_integrity(bio->bi_bdev->bd_disk), c,
1493 				req->mr->sig_attrs, ns->pi_type);
1494 	nvme_rdma_set_prot_checks(c, &req->mr->sig_attrs->check_mask);
1495 
1496 	ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1497 
1498 	req->reg_cqe.done = nvme_rdma_sig_done;
1499 	memset(wr, 0, sizeof(*wr));
1500 	wr->wr.opcode = IB_WR_REG_MR_INTEGRITY;
1501 	wr->wr.wr_cqe = &req->reg_cqe;
1502 	wr->wr.num_sge = 0;
1503 	wr->wr.send_flags = 0;
1504 	wr->mr = req->mr;
1505 	wr->key = req->mr->rkey;
1506 	wr->access = IB_ACCESS_LOCAL_WRITE |
1507 		     IB_ACCESS_REMOTE_READ |
1508 		     IB_ACCESS_REMOTE_WRITE;
1509 
1510 	sg->addr = cpu_to_le64(req->mr->iova);
1511 	put_unaligned_le24(req->mr->length, sg->length);
1512 	put_unaligned_le32(req->mr->rkey, sg->key);
1513 	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1514 
1515 	return 0;
1516 
1517 mr_put:
1518 	ib_mr_pool_put(queue->qp, &queue->qp->sig_mrs, req->mr);
1519 	req->mr = NULL;
1520 	if (nr < 0)
1521 		return nr;
1522 	return -EINVAL;
1523 }
1524 
1525 static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
1526 		struct request *rq, struct nvme_command *c)
1527 {
1528 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1529 	struct nvme_rdma_device *dev = queue->device;
1530 	struct ib_device *ibdev = dev->dev;
1531 	int pi_count = 0;
1532 	int count, ret;
1533 
1534 	req->num_sge = 1;
1535 	refcount_set(&req->ref, 2); /* send and recv completions */
1536 
1537 	c->common.flags |= NVME_CMD_SGL_METABUF;
1538 
1539 	if (!blk_rq_nr_phys_segments(rq))
1540 		return nvme_rdma_set_sg_null(c);
1541 
1542 	req->data_sgl.sg_table.sgl = (struct scatterlist *)(req + 1);
1543 	ret = sg_alloc_table_chained(&req->data_sgl.sg_table,
1544 			blk_rq_nr_phys_segments(rq), req->data_sgl.sg_table.sgl,
1545 			NVME_INLINE_SG_CNT);
1546 	if (ret)
1547 		return -ENOMEM;
1548 
1549 	req->data_sgl.nents = blk_rq_map_sg(rq->q, rq,
1550 					    req->data_sgl.sg_table.sgl);
1551 
1552 	count = ib_dma_map_sg(ibdev, req->data_sgl.sg_table.sgl,
1553 			      req->data_sgl.nents, rq_dma_dir(rq));
1554 	if (unlikely(count <= 0)) {
1555 		ret = -EIO;
1556 		goto out_free_table;
1557 	}
1558 
1559 	if (blk_integrity_rq(rq)) {
1560 		req->metadata_sgl->sg_table.sgl =
1561 			(struct scatterlist *)(req->metadata_sgl + 1);
1562 		ret = sg_alloc_table_chained(&req->metadata_sgl->sg_table,
1563 				blk_rq_count_integrity_sg(rq->q, rq->bio),
1564 				req->metadata_sgl->sg_table.sgl,
1565 				NVME_INLINE_METADATA_SG_CNT);
1566 		if (unlikely(ret)) {
1567 			ret = -ENOMEM;
1568 			goto out_unmap_sg;
1569 		}
1570 
1571 		req->metadata_sgl->nents = blk_rq_map_integrity_sg(rq->q,
1572 				rq->bio, req->metadata_sgl->sg_table.sgl);
1573 		pi_count = ib_dma_map_sg(ibdev,
1574 					 req->metadata_sgl->sg_table.sgl,
1575 					 req->metadata_sgl->nents,
1576 					 rq_dma_dir(rq));
1577 		if (unlikely(pi_count <= 0)) {
1578 			ret = -EIO;
1579 			goto out_free_pi_table;
1580 		}
1581 	}
1582 
1583 	if (req->use_sig_mr) {
1584 		ret = nvme_rdma_map_sg_pi(queue, req, c, count, pi_count);
1585 		goto out;
1586 	}
1587 
1588 	if (count <= dev->num_inline_segments) {
1589 		if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) &&
1590 		    queue->ctrl->use_inline_data &&
1591 		    blk_rq_payload_bytes(rq) <=
1592 				nvme_rdma_inline_data_size(queue)) {
1593 			ret = nvme_rdma_map_sg_inline(queue, req, c, count);
1594 			goto out;
1595 		}
1596 
1597 		if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) {
1598 			ret = nvme_rdma_map_sg_single(queue, req, c);
1599 			goto out;
1600 		}
1601 	}
1602 
1603 	ret = nvme_rdma_map_sg_fr(queue, req, c, count);
1604 out:
1605 	if (unlikely(ret))
1606 		goto out_unmap_pi_sg;
1607 
1608 	return 0;
1609 
1610 out_unmap_pi_sg:
1611 	if (blk_integrity_rq(rq))
1612 		ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl,
1613 				req->metadata_sgl->nents, rq_dma_dir(rq));
1614 out_free_pi_table:
1615 	if (blk_integrity_rq(rq))
1616 		sg_free_table_chained(&req->metadata_sgl->sg_table,
1617 				      NVME_INLINE_METADATA_SG_CNT);
1618 out_unmap_sg:
1619 	ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents,
1620 			rq_dma_dir(rq));
1621 out_free_table:
1622 	sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT);
1623 	return ret;
1624 }
1625 
1626 static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
1627 {
1628 	struct nvme_rdma_qe *qe =
1629 		container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1630 	struct nvme_rdma_request *req =
1631 		container_of(qe, struct nvme_rdma_request, sqe);
1632 
1633 	if (unlikely(wc->status != IB_WC_SUCCESS))
1634 		nvme_rdma_wr_error(cq, wc, "SEND");
1635 	else
1636 		nvme_rdma_end_request(req);
1637 }
1638 
1639 static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
1640 		struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
1641 		struct ib_send_wr *first)
1642 {
1643 	struct ib_send_wr wr;
1644 	int ret;
1645 
1646 	sge->addr   = qe->dma;
1647 	sge->length = sizeof(struct nvme_command);
1648 	sge->lkey   = queue->device->pd->local_dma_lkey;
1649 
1650 	wr.next       = NULL;
1651 	wr.wr_cqe     = &qe->cqe;
1652 	wr.sg_list    = sge;
1653 	wr.num_sge    = num_sge;
1654 	wr.opcode     = IB_WR_SEND;
1655 	wr.send_flags = IB_SEND_SIGNALED;
1656 
1657 	if (first)
1658 		first->next = &wr;
1659 	else
1660 		first = &wr;
1661 
1662 	ret = ib_post_send(queue->qp, first, NULL);
1663 	if (unlikely(ret)) {
1664 		dev_err(queue->ctrl->ctrl.device,
1665 			     "%s failed with error code %d\n", __func__, ret);
1666 	}
1667 	return ret;
1668 }
1669 
1670 static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
1671 		struct nvme_rdma_qe *qe)
1672 {
1673 	struct ib_recv_wr wr;
1674 	struct ib_sge list;
1675 	int ret;
1676 
1677 	list.addr   = qe->dma;
1678 	list.length = sizeof(struct nvme_completion);
1679 	list.lkey   = queue->device->pd->local_dma_lkey;
1680 
1681 	qe->cqe.done = nvme_rdma_recv_done;
1682 
1683 	wr.next     = NULL;
1684 	wr.wr_cqe   = &qe->cqe;
1685 	wr.sg_list  = &list;
1686 	wr.num_sge  = 1;
1687 
1688 	ret = ib_post_recv(queue->qp, &wr, NULL);
1689 	if (unlikely(ret)) {
1690 		dev_err(queue->ctrl->ctrl.device,
1691 			"%s failed with error code %d\n", __func__, ret);
1692 	}
1693 	return ret;
1694 }
1695 
1696 static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
1697 {
1698 	u32 queue_idx = nvme_rdma_queue_idx(queue);
1699 
1700 	if (queue_idx == 0)
1701 		return queue->ctrl->admin_tag_set.tags[queue_idx];
1702 	return queue->ctrl->tag_set.tags[queue_idx - 1];
1703 }
1704 
1705 static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc)
1706 {
1707 	if (unlikely(wc->status != IB_WC_SUCCESS))
1708 		nvme_rdma_wr_error(cq, wc, "ASYNC");
1709 }
1710 
1711 static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg)
1712 {
1713 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
1714 	struct nvme_rdma_queue *queue = &ctrl->queues[0];
1715 	struct ib_device *dev = queue->device->dev;
1716 	struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
1717 	struct nvme_command *cmd = sqe->data;
1718 	struct ib_sge sge;
1719 	int ret;
1720 
1721 	ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
1722 
1723 	memset(cmd, 0, sizeof(*cmd));
1724 	cmd->common.opcode = nvme_admin_async_event;
1725 	cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH;
1726 	cmd->common.flags |= NVME_CMD_SGL_METABUF;
1727 	nvme_rdma_set_sg_null(cmd);
1728 
1729 	sqe->cqe.done = nvme_rdma_async_done;
1730 
1731 	ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
1732 			DMA_TO_DEVICE);
1733 
1734 	ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL);
1735 	WARN_ON_ONCE(ret);
1736 }
1737 
1738 static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
1739 		struct nvme_completion *cqe, struct ib_wc *wc)
1740 {
1741 	struct request *rq;
1742 	struct nvme_rdma_request *req;
1743 
1744 	rq = nvme_find_rq(nvme_rdma_tagset(queue), cqe->command_id);
1745 	if (!rq) {
1746 		dev_err(queue->ctrl->ctrl.device,
1747 			"got bad command_id %#x on QP %#x\n",
1748 			cqe->command_id, queue->qp->qp_num);
1749 		nvme_rdma_error_recovery(queue->ctrl);
1750 		return;
1751 	}
1752 	req = blk_mq_rq_to_pdu(rq);
1753 
1754 	req->status = cqe->status;
1755 	req->result = cqe->result;
1756 
1757 	if (wc->wc_flags & IB_WC_WITH_INVALIDATE) {
1758 		if (unlikely(!req->mr ||
1759 			     wc->ex.invalidate_rkey != req->mr->rkey)) {
1760 			dev_err(queue->ctrl->ctrl.device,
1761 				"Bogus remote invalidation for rkey %#x\n",
1762 				req->mr ? req->mr->rkey : 0);
1763 			nvme_rdma_error_recovery(queue->ctrl);
1764 		}
1765 	} else if (req->mr) {
1766 		int ret;
1767 
1768 		ret = nvme_rdma_inv_rkey(queue, req);
1769 		if (unlikely(ret < 0)) {
1770 			dev_err(queue->ctrl->ctrl.device,
1771 				"Queueing INV WR for rkey %#x failed (%d)\n",
1772 				req->mr->rkey, ret);
1773 			nvme_rdma_error_recovery(queue->ctrl);
1774 		}
1775 		/* the local invalidation completion will end the request */
1776 		return;
1777 	}
1778 
1779 	nvme_rdma_end_request(req);
1780 }
1781 
1782 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
1783 {
1784 	struct nvme_rdma_qe *qe =
1785 		container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1786 	struct nvme_rdma_queue *queue = wc->qp->qp_context;
1787 	struct ib_device *ibdev = queue->device->dev;
1788 	struct nvme_completion *cqe = qe->data;
1789 	const size_t len = sizeof(struct nvme_completion);
1790 
1791 	if (unlikely(wc->status != IB_WC_SUCCESS)) {
1792 		nvme_rdma_wr_error(cq, wc, "RECV");
1793 		return;
1794 	}
1795 
1796 	/* sanity checking for received data length */
1797 	if (unlikely(wc->byte_len < len)) {
1798 		dev_err(queue->ctrl->ctrl.device,
1799 			"Unexpected nvme completion length(%d)\n", wc->byte_len);
1800 		nvme_rdma_error_recovery(queue->ctrl);
1801 		return;
1802 	}
1803 
1804 	ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1805 	/*
1806 	 * AEN requests are special as they don't time out and can
1807 	 * survive any kind of queue freeze and often don't respond to
1808 	 * aborts.  We don't even bother to allocate a struct request
1809 	 * for them but rather special case them here.
1810 	 */
1811 	if (unlikely(nvme_is_aen_req(nvme_rdma_queue_idx(queue),
1812 				     cqe->command_id)))
1813 		nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status,
1814 				&cqe->result);
1815 	else
1816 		nvme_rdma_process_nvme_rsp(queue, cqe, wc);
1817 	ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1818 
1819 	nvme_rdma_post_recv(queue, qe);
1820 }
1821 
1822 static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
1823 {
1824 	int ret, i;
1825 
1826 	for (i = 0; i < queue->queue_size; i++) {
1827 		ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
1828 		if (ret)
1829 			return ret;
1830 	}
1831 
1832 	return 0;
1833 }
1834 
1835 static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
1836 		struct rdma_cm_event *ev)
1837 {
1838 	struct rdma_cm_id *cm_id = queue->cm_id;
1839 	int status = ev->status;
1840 	const char *rej_msg;
1841 	const struct nvme_rdma_cm_rej *rej_data;
1842 	u8 rej_data_len;
1843 
1844 	rej_msg = rdma_reject_msg(cm_id, status);
1845 	rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len);
1846 
1847 	if (rej_data && rej_data_len >= sizeof(u16)) {
1848 		u16 sts = le16_to_cpu(rej_data->sts);
1849 
1850 		dev_err(queue->ctrl->ctrl.device,
1851 		      "Connect rejected: status %d (%s) nvme status %d (%s).\n",
1852 		      status, rej_msg, sts, nvme_rdma_cm_msg(sts));
1853 	} else {
1854 		dev_err(queue->ctrl->ctrl.device,
1855 			"Connect rejected: status %d (%s).\n", status, rej_msg);
1856 	}
1857 
1858 	return -ECONNRESET;
1859 }
1860 
1861 static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
1862 {
1863 	struct nvme_ctrl *ctrl = &queue->ctrl->ctrl;
1864 	int ret;
1865 
1866 	ret = nvme_rdma_create_queue_ib(queue);
1867 	if (ret)
1868 		return ret;
1869 
1870 	if (ctrl->opts->tos >= 0)
1871 		rdma_set_service_type(queue->cm_id, ctrl->opts->tos);
1872 	ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS);
1873 	if (ret) {
1874 		dev_err(ctrl->device, "rdma_resolve_route failed (%d).\n",
1875 			queue->cm_error);
1876 		goto out_destroy_queue;
1877 	}
1878 
1879 	return 0;
1880 
1881 out_destroy_queue:
1882 	nvme_rdma_destroy_queue_ib(queue);
1883 	return ret;
1884 }
1885 
1886 static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
1887 {
1888 	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1889 	struct rdma_conn_param param = { };
1890 	struct nvme_rdma_cm_req priv = { };
1891 	int ret;
1892 
1893 	param.qp_num = queue->qp->qp_num;
1894 	param.flow_control = 1;
1895 
1896 	param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom;
1897 	/* maximum retry count */
1898 	param.retry_count = 7;
1899 	param.rnr_retry_count = 7;
1900 	param.private_data = &priv;
1901 	param.private_data_len = sizeof(priv);
1902 
1903 	priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
1904 	priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
1905 	/*
1906 	 * set the admin queue depth to the minimum size
1907 	 * specified by the Fabrics standard.
1908 	 */
1909 	if (priv.qid == 0) {
1910 		priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH);
1911 		priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1);
1912 	} else {
1913 		/*
1914 		 * current interpretation of the fabrics spec
1915 		 * is at minimum you make hrqsize sqsize+1, or a
1916 		 * 1's based representation of sqsize.
1917 		 */
1918 		priv.hrqsize = cpu_to_le16(queue->queue_size);
1919 		priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
1920 	}
1921 
1922 	ret = rdma_connect_locked(queue->cm_id, &param);
1923 	if (ret) {
1924 		dev_err(ctrl->ctrl.device,
1925 			"rdma_connect_locked failed (%d).\n", ret);
1926 		return ret;
1927 	}
1928 
1929 	return 0;
1930 }
1931 
1932 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
1933 		struct rdma_cm_event *ev)
1934 {
1935 	struct nvme_rdma_queue *queue = cm_id->context;
1936 	int cm_error = 0;
1937 
1938 	dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
1939 		rdma_event_msg(ev->event), ev->event,
1940 		ev->status, cm_id);
1941 
1942 	switch (ev->event) {
1943 	case RDMA_CM_EVENT_ADDR_RESOLVED:
1944 		cm_error = nvme_rdma_addr_resolved(queue);
1945 		break;
1946 	case RDMA_CM_EVENT_ROUTE_RESOLVED:
1947 		cm_error = nvme_rdma_route_resolved(queue);
1948 		break;
1949 	case RDMA_CM_EVENT_ESTABLISHED:
1950 		queue->cm_error = nvme_rdma_conn_established(queue);
1951 		/* complete cm_done regardless of success/failure */
1952 		complete(&queue->cm_done);
1953 		return 0;
1954 	case RDMA_CM_EVENT_REJECTED:
1955 		cm_error = nvme_rdma_conn_rejected(queue, ev);
1956 		break;
1957 	case RDMA_CM_EVENT_ROUTE_ERROR:
1958 	case RDMA_CM_EVENT_CONNECT_ERROR:
1959 	case RDMA_CM_EVENT_UNREACHABLE:
1960 	case RDMA_CM_EVENT_ADDR_ERROR:
1961 		dev_dbg(queue->ctrl->ctrl.device,
1962 			"CM error event %d\n", ev->event);
1963 		cm_error = -ECONNRESET;
1964 		break;
1965 	case RDMA_CM_EVENT_DISCONNECTED:
1966 	case RDMA_CM_EVENT_ADDR_CHANGE:
1967 	case RDMA_CM_EVENT_TIMEWAIT_EXIT:
1968 		dev_dbg(queue->ctrl->ctrl.device,
1969 			"disconnect received - connection closed\n");
1970 		nvme_rdma_error_recovery(queue->ctrl);
1971 		break;
1972 	case RDMA_CM_EVENT_DEVICE_REMOVAL:
1973 		/* device removal is handled via the ib_client API */
1974 		break;
1975 	default:
1976 		dev_err(queue->ctrl->ctrl.device,
1977 			"Unexpected RDMA CM event (%d)\n", ev->event);
1978 		nvme_rdma_error_recovery(queue->ctrl);
1979 		break;
1980 	}
1981 
1982 	if (cm_error) {
1983 		queue->cm_error = cm_error;
1984 		complete(&queue->cm_done);
1985 	}
1986 
1987 	return 0;
1988 }
1989 
1990 static void nvme_rdma_complete_timed_out(struct request *rq)
1991 {
1992 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1993 	struct nvme_rdma_queue *queue = req->queue;
1994 
1995 	nvme_rdma_stop_queue(queue);
1996 	if (blk_mq_request_started(rq) && !blk_mq_request_completed(rq)) {
1997 		nvme_req(rq)->status = NVME_SC_HOST_ABORTED_CMD;
1998 		blk_mq_complete_request(rq);
1999 	}
2000 }
2001 
2002 static enum blk_eh_timer_return
2003 nvme_rdma_timeout(struct request *rq, bool reserved)
2004 {
2005 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
2006 	struct nvme_rdma_queue *queue = req->queue;
2007 	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
2008 
2009 	dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n",
2010 		 rq->tag, nvme_rdma_queue_idx(queue));
2011 
2012 	if (ctrl->ctrl.state != NVME_CTRL_LIVE) {
2013 		/*
2014 		 * If we are resetting, connecting or deleting we should
2015 		 * complete immediately because we may block controller
2016 		 * teardown or setup sequence
2017 		 * - ctrl disable/shutdown fabrics requests
2018 		 * - connect requests
2019 		 * - initialization admin requests
2020 		 * - I/O requests that entered after unquiescing and
2021 		 *   the controller stopped responding
2022 		 *
2023 		 * All other requests should be cancelled by the error
2024 		 * recovery work, so it's fine that we fail it here.
2025 		 */
2026 		nvme_rdma_complete_timed_out(rq);
2027 		return BLK_EH_DONE;
2028 	}
2029 
2030 	/*
2031 	 * LIVE state should trigger the normal error recovery which will
2032 	 * handle completing this request.
2033 	 */
2034 	nvme_rdma_error_recovery(ctrl);
2035 	return BLK_EH_RESET_TIMER;
2036 }
2037 
2038 static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
2039 		const struct blk_mq_queue_data *bd)
2040 {
2041 	struct nvme_ns *ns = hctx->queue->queuedata;
2042 	struct nvme_rdma_queue *queue = hctx->driver_data;
2043 	struct request *rq = bd->rq;
2044 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
2045 	struct nvme_rdma_qe *sqe = &req->sqe;
2046 	struct nvme_command *c = nvme_req(rq)->cmd;
2047 	struct ib_device *dev;
2048 	bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags);
2049 	blk_status_t ret;
2050 	int err;
2051 
2052 	WARN_ON_ONCE(rq->tag < 0);
2053 
2054 	if (!nvme_check_ready(&queue->ctrl->ctrl, rq, queue_ready))
2055 		return nvme_fail_nonready_command(&queue->ctrl->ctrl, rq);
2056 
2057 	dev = queue->device->dev;
2058 
2059 	req->sqe.dma = ib_dma_map_single(dev, req->sqe.data,
2060 					 sizeof(struct nvme_command),
2061 					 DMA_TO_DEVICE);
2062 	err = ib_dma_mapping_error(dev, req->sqe.dma);
2063 	if (unlikely(err))
2064 		return BLK_STS_RESOURCE;
2065 
2066 	ib_dma_sync_single_for_cpu(dev, sqe->dma,
2067 			sizeof(struct nvme_command), DMA_TO_DEVICE);
2068 
2069 	ret = nvme_setup_cmd(ns, rq);
2070 	if (ret)
2071 		goto unmap_qe;
2072 
2073 	blk_mq_start_request(rq);
2074 
2075 	if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) &&
2076 	    queue->pi_support &&
2077 	    (c->common.opcode == nvme_cmd_write ||
2078 	     c->common.opcode == nvme_cmd_read) &&
2079 	    nvme_ns_has_pi(ns))
2080 		req->use_sig_mr = true;
2081 	else
2082 		req->use_sig_mr = false;
2083 
2084 	err = nvme_rdma_map_data(queue, rq, c);
2085 	if (unlikely(err < 0)) {
2086 		dev_err(queue->ctrl->ctrl.device,
2087 			     "Failed to map data (%d)\n", err);
2088 		goto err;
2089 	}
2090 
2091 	sqe->cqe.done = nvme_rdma_send_done;
2092 
2093 	ib_dma_sync_single_for_device(dev, sqe->dma,
2094 			sizeof(struct nvme_command), DMA_TO_DEVICE);
2095 
2096 	err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
2097 			req->mr ? &req->reg_wr.wr : NULL);
2098 	if (unlikely(err))
2099 		goto err_unmap;
2100 
2101 	return BLK_STS_OK;
2102 
2103 err_unmap:
2104 	nvme_rdma_unmap_data(queue, rq);
2105 err:
2106 	if (err == -EIO)
2107 		ret = nvme_host_path_error(rq);
2108 	else if (err == -ENOMEM || err == -EAGAIN)
2109 		ret = BLK_STS_RESOURCE;
2110 	else
2111 		ret = BLK_STS_IOERR;
2112 	nvme_cleanup_cmd(rq);
2113 unmap_qe:
2114 	ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command),
2115 			    DMA_TO_DEVICE);
2116 	return ret;
2117 }
2118 
2119 static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, struct io_comp_batch *iob)
2120 {
2121 	struct nvme_rdma_queue *queue = hctx->driver_data;
2122 
2123 	return ib_process_cq_direct(queue->ib_cq, -1);
2124 }
2125 
2126 static void nvme_rdma_check_pi_status(struct nvme_rdma_request *req)
2127 {
2128 	struct request *rq = blk_mq_rq_from_pdu(req);
2129 	struct ib_mr_status mr_status;
2130 	int ret;
2131 
2132 	ret = ib_check_mr_status(req->mr, IB_MR_CHECK_SIG_STATUS, &mr_status);
2133 	if (ret) {
2134 		pr_err("ib_check_mr_status failed, ret %d\n", ret);
2135 		nvme_req(rq)->status = NVME_SC_INVALID_PI;
2136 		return;
2137 	}
2138 
2139 	if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) {
2140 		switch (mr_status.sig_err.err_type) {
2141 		case IB_SIG_BAD_GUARD:
2142 			nvme_req(rq)->status = NVME_SC_GUARD_CHECK;
2143 			break;
2144 		case IB_SIG_BAD_REFTAG:
2145 			nvme_req(rq)->status = NVME_SC_REFTAG_CHECK;
2146 			break;
2147 		case IB_SIG_BAD_APPTAG:
2148 			nvme_req(rq)->status = NVME_SC_APPTAG_CHECK;
2149 			break;
2150 		}
2151 		pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n",
2152 		       mr_status.sig_err.err_type, mr_status.sig_err.expected,
2153 		       mr_status.sig_err.actual);
2154 	}
2155 }
2156 
2157 static void nvme_rdma_complete_rq(struct request *rq)
2158 {
2159 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
2160 	struct nvme_rdma_queue *queue = req->queue;
2161 	struct ib_device *ibdev = queue->device->dev;
2162 
2163 	if (req->use_sig_mr)
2164 		nvme_rdma_check_pi_status(req);
2165 
2166 	nvme_rdma_unmap_data(queue, rq);
2167 	ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command),
2168 			    DMA_TO_DEVICE);
2169 	nvme_complete_rq(rq);
2170 }
2171 
2172 static int nvme_rdma_map_queues(struct blk_mq_tag_set *set)
2173 {
2174 	struct nvme_rdma_ctrl *ctrl = set->driver_data;
2175 	struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
2176 
2177 	if (opts->nr_write_queues && ctrl->io_queues[HCTX_TYPE_READ]) {
2178 		/* separate read/write queues */
2179 		set->map[HCTX_TYPE_DEFAULT].nr_queues =
2180 			ctrl->io_queues[HCTX_TYPE_DEFAULT];
2181 		set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
2182 		set->map[HCTX_TYPE_READ].nr_queues =
2183 			ctrl->io_queues[HCTX_TYPE_READ];
2184 		set->map[HCTX_TYPE_READ].queue_offset =
2185 			ctrl->io_queues[HCTX_TYPE_DEFAULT];
2186 	} else {
2187 		/* shared read/write queues */
2188 		set->map[HCTX_TYPE_DEFAULT].nr_queues =
2189 			ctrl->io_queues[HCTX_TYPE_DEFAULT];
2190 		set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
2191 		set->map[HCTX_TYPE_READ].nr_queues =
2192 			ctrl->io_queues[HCTX_TYPE_DEFAULT];
2193 		set->map[HCTX_TYPE_READ].queue_offset = 0;
2194 	}
2195 	blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT],
2196 			ctrl->device->dev, 0);
2197 	blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ],
2198 			ctrl->device->dev, 0);
2199 
2200 	if (opts->nr_poll_queues && ctrl->io_queues[HCTX_TYPE_POLL]) {
2201 		/* map dedicated poll queues only if we have queues left */
2202 		set->map[HCTX_TYPE_POLL].nr_queues =
2203 				ctrl->io_queues[HCTX_TYPE_POLL];
2204 		set->map[HCTX_TYPE_POLL].queue_offset =
2205 			ctrl->io_queues[HCTX_TYPE_DEFAULT] +
2206 			ctrl->io_queues[HCTX_TYPE_READ];
2207 		blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]);
2208 	}
2209 
2210 	dev_info(ctrl->ctrl.device,
2211 		"mapped %d/%d/%d default/read/poll queues.\n",
2212 		ctrl->io_queues[HCTX_TYPE_DEFAULT],
2213 		ctrl->io_queues[HCTX_TYPE_READ],
2214 		ctrl->io_queues[HCTX_TYPE_POLL]);
2215 
2216 	return 0;
2217 }
2218 
2219 static const struct blk_mq_ops nvme_rdma_mq_ops = {
2220 	.queue_rq	= nvme_rdma_queue_rq,
2221 	.complete	= nvme_rdma_complete_rq,
2222 	.init_request	= nvme_rdma_init_request,
2223 	.exit_request	= nvme_rdma_exit_request,
2224 	.init_hctx	= nvme_rdma_init_hctx,
2225 	.timeout	= nvme_rdma_timeout,
2226 	.map_queues	= nvme_rdma_map_queues,
2227 	.poll		= nvme_rdma_poll,
2228 };
2229 
2230 static const struct blk_mq_ops nvme_rdma_admin_mq_ops = {
2231 	.queue_rq	= nvme_rdma_queue_rq,
2232 	.complete	= nvme_rdma_complete_rq,
2233 	.init_request	= nvme_rdma_init_request,
2234 	.exit_request	= nvme_rdma_exit_request,
2235 	.init_hctx	= nvme_rdma_init_admin_hctx,
2236 	.timeout	= nvme_rdma_timeout,
2237 };
2238 
2239 static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
2240 {
2241 	cancel_work_sync(&ctrl->err_work);
2242 	cancel_delayed_work_sync(&ctrl->reconnect_work);
2243 
2244 	nvme_rdma_teardown_io_queues(ctrl, shutdown);
2245 	nvme_stop_admin_queue(&ctrl->ctrl);
2246 	if (shutdown)
2247 		nvme_shutdown_ctrl(&ctrl->ctrl);
2248 	else
2249 		nvme_disable_ctrl(&ctrl->ctrl);
2250 	nvme_rdma_teardown_admin_queue(ctrl, shutdown);
2251 }
2252 
2253 static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl)
2254 {
2255 	nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true);
2256 }
2257 
2258 static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
2259 {
2260 	struct nvme_rdma_ctrl *ctrl =
2261 		container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work);
2262 
2263 	nvme_stop_ctrl(&ctrl->ctrl);
2264 	nvme_rdma_shutdown_ctrl(ctrl, false);
2265 
2266 	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
2267 		/* state change failure should never happen */
2268 		WARN_ON_ONCE(1);
2269 		return;
2270 	}
2271 
2272 	if (nvme_rdma_setup_ctrl(ctrl, false))
2273 		goto out_fail;
2274 
2275 	return;
2276 
2277 out_fail:
2278 	++ctrl->ctrl.nr_reconnects;
2279 	nvme_rdma_reconnect_or_remove(ctrl);
2280 }
2281 
2282 static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
2283 	.name			= "rdma",
2284 	.module			= THIS_MODULE,
2285 	.flags			= NVME_F_FABRICS | NVME_F_METADATA_SUPPORTED,
2286 	.reg_read32		= nvmf_reg_read32,
2287 	.reg_read64		= nvmf_reg_read64,
2288 	.reg_write32		= nvmf_reg_write32,
2289 	.free_ctrl		= nvme_rdma_free_ctrl,
2290 	.submit_async_event	= nvme_rdma_submit_async_event,
2291 	.delete_ctrl		= nvme_rdma_delete_ctrl,
2292 	.get_address		= nvmf_get_address,
2293 };
2294 
2295 /*
2296  * Fails a connection request if it matches an existing controller
2297  * (association) with the same tuple:
2298  * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN>
2299  *
2300  * if local address is not specified in the request, it will match an
2301  * existing controller with all the other parameters the same and no
2302  * local port address specified as well.
2303  *
2304  * The ports don't need to be compared as they are intrinsically
2305  * already matched by the port pointers supplied.
2306  */
2307 static bool
2308 nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts)
2309 {
2310 	struct nvme_rdma_ctrl *ctrl;
2311 	bool found = false;
2312 
2313 	mutex_lock(&nvme_rdma_ctrl_mutex);
2314 	list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2315 		found = nvmf_ip_options_match(&ctrl->ctrl, opts);
2316 		if (found)
2317 			break;
2318 	}
2319 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2320 
2321 	return found;
2322 }
2323 
2324 static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
2325 		struct nvmf_ctrl_options *opts)
2326 {
2327 	struct nvme_rdma_ctrl *ctrl;
2328 	int ret;
2329 	bool changed;
2330 
2331 	ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
2332 	if (!ctrl)
2333 		return ERR_PTR(-ENOMEM);
2334 	ctrl->ctrl.opts = opts;
2335 	INIT_LIST_HEAD(&ctrl->list);
2336 
2337 	if (!(opts->mask & NVMF_OPT_TRSVCID)) {
2338 		opts->trsvcid =
2339 			kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL);
2340 		if (!opts->trsvcid) {
2341 			ret = -ENOMEM;
2342 			goto out_free_ctrl;
2343 		}
2344 		opts->mask |= NVMF_OPT_TRSVCID;
2345 	}
2346 
2347 	ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
2348 			opts->traddr, opts->trsvcid, &ctrl->addr);
2349 	if (ret) {
2350 		pr_err("malformed address passed: %s:%s\n",
2351 			opts->traddr, opts->trsvcid);
2352 		goto out_free_ctrl;
2353 	}
2354 
2355 	if (opts->mask & NVMF_OPT_HOST_TRADDR) {
2356 		ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
2357 			opts->host_traddr, NULL, &ctrl->src_addr);
2358 		if (ret) {
2359 			pr_err("malformed src address passed: %s\n",
2360 			       opts->host_traddr);
2361 			goto out_free_ctrl;
2362 		}
2363 	}
2364 
2365 	if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) {
2366 		ret = -EALREADY;
2367 		goto out_free_ctrl;
2368 	}
2369 
2370 	INIT_DELAYED_WORK(&ctrl->reconnect_work,
2371 			nvme_rdma_reconnect_ctrl_work);
2372 	INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
2373 	INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work);
2374 
2375 	ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues +
2376 				opts->nr_poll_queues + 1;
2377 	ctrl->ctrl.sqsize = opts->queue_size - 1;
2378 	ctrl->ctrl.kato = opts->kato;
2379 
2380 	ret = -ENOMEM;
2381 	ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues),
2382 				GFP_KERNEL);
2383 	if (!ctrl->queues)
2384 		goto out_free_ctrl;
2385 
2386 	ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
2387 				0 /* no quirks, we're perfect! */);
2388 	if (ret)
2389 		goto out_kfree_queues;
2390 
2391 	changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING);
2392 	WARN_ON_ONCE(!changed);
2393 
2394 	ret = nvme_rdma_setup_ctrl(ctrl, true);
2395 	if (ret)
2396 		goto out_uninit_ctrl;
2397 
2398 	dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n",
2399 		nvmf_ctrl_subsysnqn(&ctrl->ctrl), &ctrl->addr);
2400 
2401 	mutex_lock(&nvme_rdma_ctrl_mutex);
2402 	list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
2403 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2404 
2405 	return &ctrl->ctrl;
2406 
2407 out_uninit_ctrl:
2408 	nvme_uninit_ctrl(&ctrl->ctrl);
2409 	nvme_put_ctrl(&ctrl->ctrl);
2410 	if (ret > 0)
2411 		ret = -EIO;
2412 	return ERR_PTR(ret);
2413 out_kfree_queues:
2414 	kfree(ctrl->queues);
2415 out_free_ctrl:
2416 	kfree(ctrl);
2417 	return ERR_PTR(ret);
2418 }
2419 
2420 static struct nvmf_transport_ops nvme_rdma_transport = {
2421 	.name		= "rdma",
2422 	.module		= THIS_MODULE,
2423 	.required_opts	= NVMF_OPT_TRADDR,
2424 	.allowed_opts	= NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY |
2425 			  NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO |
2426 			  NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES |
2427 			  NVMF_OPT_TOS,
2428 	.create_ctrl	= nvme_rdma_create_ctrl,
2429 };
2430 
2431 static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
2432 {
2433 	struct nvme_rdma_ctrl *ctrl;
2434 	struct nvme_rdma_device *ndev;
2435 	bool found = false;
2436 
2437 	mutex_lock(&device_list_mutex);
2438 	list_for_each_entry(ndev, &device_list, entry) {
2439 		if (ndev->dev == ib_device) {
2440 			found = true;
2441 			break;
2442 		}
2443 	}
2444 	mutex_unlock(&device_list_mutex);
2445 
2446 	if (!found)
2447 		return;
2448 
2449 	/* Delete all controllers using this device */
2450 	mutex_lock(&nvme_rdma_ctrl_mutex);
2451 	list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2452 		if (ctrl->device->dev != ib_device)
2453 			continue;
2454 		nvme_delete_ctrl(&ctrl->ctrl);
2455 	}
2456 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2457 
2458 	flush_workqueue(nvme_delete_wq);
2459 }
2460 
2461 static struct ib_client nvme_rdma_ib_client = {
2462 	.name   = "nvme_rdma",
2463 	.remove = nvme_rdma_remove_one
2464 };
2465 
2466 static int __init nvme_rdma_init_module(void)
2467 {
2468 	int ret;
2469 
2470 	ret = ib_register_client(&nvme_rdma_ib_client);
2471 	if (ret)
2472 		return ret;
2473 
2474 	ret = nvmf_register_transport(&nvme_rdma_transport);
2475 	if (ret)
2476 		goto err_unreg_client;
2477 
2478 	return 0;
2479 
2480 err_unreg_client:
2481 	ib_unregister_client(&nvme_rdma_ib_client);
2482 	return ret;
2483 }
2484 
2485 static void __exit nvme_rdma_cleanup_module(void)
2486 {
2487 	struct nvme_rdma_ctrl *ctrl;
2488 
2489 	nvmf_unregister_transport(&nvme_rdma_transport);
2490 	ib_unregister_client(&nvme_rdma_ib_client);
2491 
2492 	mutex_lock(&nvme_rdma_ctrl_mutex);
2493 	list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list)
2494 		nvme_delete_ctrl(&ctrl->ctrl);
2495 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2496 	flush_workqueue(nvme_delete_wq);
2497 }
2498 
2499 module_init(nvme_rdma_init_module);
2500 module_exit(nvme_rdma_cleanup_module);
2501 
2502 MODULE_LICENSE("GPL v2");
2503