xref: /linux/drivers/nvme/host/rdma.c (revision a1c3be890440a1769ed6f822376a3e3ab0d42994)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * NVMe over Fabrics RDMA host code.
4  * Copyright (c) 2015-2016 HGST, a Western Digital Company.
5  */
6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7 #include <linux/module.h>
8 #include <linux/init.h>
9 #include <linux/slab.h>
10 #include <rdma/mr_pool.h>
11 #include <linux/err.h>
12 #include <linux/string.h>
13 #include <linux/atomic.h>
14 #include <linux/blk-mq.h>
15 #include <linux/blk-mq-rdma.h>
16 #include <linux/types.h>
17 #include <linux/list.h>
18 #include <linux/mutex.h>
19 #include <linux/scatterlist.h>
20 #include <linux/nvme.h>
21 #include <asm/unaligned.h>
22 
23 #include <rdma/ib_verbs.h>
24 #include <rdma/rdma_cm.h>
25 #include <linux/nvme-rdma.h>
26 
27 #include "nvme.h"
28 #include "fabrics.h"
29 
30 
31 #define NVME_RDMA_CONNECT_TIMEOUT_MS	3000		/* 3 second */
32 
33 #define NVME_RDMA_MAX_SEGMENTS		256
34 
35 #define NVME_RDMA_MAX_INLINE_SEGMENTS	4
36 
37 #define NVME_RDMA_DATA_SGL_SIZE \
38 	(sizeof(struct scatterlist) * NVME_INLINE_SG_CNT)
39 #define NVME_RDMA_METADATA_SGL_SIZE \
40 	(sizeof(struct scatterlist) * NVME_INLINE_METADATA_SG_CNT)
41 
42 struct nvme_rdma_device {
43 	struct ib_device	*dev;
44 	struct ib_pd		*pd;
45 	struct kref		ref;
46 	struct list_head	entry;
47 	unsigned int		num_inline_segments;
48 };
49 
50 struct nvme_rdma_qe {
51 	struct ib_cqe		cqe;
52 	void			*data;
53 	u64			dma;
54 };
55 
56 struct nvme_rdma_sgl {
57 	int			nents;
58 	struct sg_table		sg_table;
59 };
60 
61 struct nvme_rdma_queue;
62 struct nvme_rdma_request {
63 	struct nvme_request	req;
64 	struct ib_mr		*mr;
65 	struct nvme_rdma_qe	sqe;
66 	union nvme_result	result;
67 	__le16			status;
68 	refcount_t		ref;
69 	struct ib_sge		sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
70 	u32			num_sge;
71 	struct ib_reg_wr	reg_wr;
72 	struct ib_cqe		reg_cqe;
73 	struct nvme_rdma_queue  *queue;
74 	struct nvme_rdma_sgl	data_sgl;
75 	struct nvme_rdma_sgl	*metadata_sgl;
76 	bool			use_sig_mr;
77 };
78 
79 enum nvme_rdma_queue_flags {
80 	NVME_RDMA_Q_ALLOCATED		= 0,
81 	NVME_RDMA_Q_LIVE		= 1,
82 	NVME_RDMA_Q_TR_READY		= 2,
83 };
84 
85 struct nvme_rdma_queue {
86 	struct nvme_rdma_qe	*rsp_ring;
87 	int			queue_size;
88 	size_t			cmnd_capsule_len;
89 	struct nvme_rdma_ctrl	*ctrl;
90 	struct nvme_rdma_device	*device;
91 	struct ib_cq		*ib_cq;
92 	struct ib_qp		*qp;
93 
94 	unsigned long		flags;
95 	struct rdma_cm_id	*cm_id;
96 	int			cm_error;
97 	struct completion	cm_done;
98 	bool			pi_support;
99 	int			cq_size;
100 	struct mutex		queue_lock;
101 };
102 
103 struct nvme_rdma_ctrl {
104 	/* read only in the hot path */
105 	struct nvme_rdma_queue	*queues;
106 
107 	/* other member variables */
108 	struct blk_mq_tag_set	tag_set;
109 	struct work_struct	err_work;
110 
111 	struct nvme_rdma_qe	async_event_sqe;
112 
113 	struct delayed_work	reconnect_work;
114 
115 	struct list_head	list;
116 
117 	struct blk_mq_tag_set	admin_tag_set;
118 	struct nvme_rdma_device	*device;
119 
120 	u32			max_fr_pages;
121 
122 	struct sockaddr_storage addr;
123 	struct sockaddr_storage src_addr;
124 
125 	struct nvme_ctrl	ctrl;
126 	bool			use_inline_data;
127 	u32			io_queues[HCTX_MAX_TYPES];
128 };
129 
130 static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
131 {
132 	return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
133 }
134 
135 static LIST_HEAD(device_list);
136 static DEFINE_MUTEX(device_list_mutex);
137 
138 static LIST_HEAD(nvme_rdma_ctrl_list);
139 static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
140 
141 /*
142  * Disabling this option makes small I/O goes faster, but is fundamentally
143  * unsafe.  With it turned off we will have to register a global rkey that
144  * allows read and write access to all physical memory.
145  */
146 static bool register_always = true;
147 module_param(register_always, bool, 0444);
148 MODULE_PARM_DESC(register_always,
149 	 "Use memory registration even for contiguous memory regions");
150 
151 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
152 		struct rdma_cm_event *event);
153 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
154 static void nvme_rdma_complete_rq(struct request *rq);
155 
156 static const struct blk_mq_ops nvme_rdma_mq_ops;
157 static const struct blk_mq_ops nvme_rdma_admin_mq_ops;
158 
159 static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
160 {
161 	return queue - queue->ctrl->queues;
162 }
163 
164 static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue)
165 {
166 	return nvme_rdma_queue_idx(queue) >
167 		queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] +
168 		queue->ctrl->io_queues[HCTX_TYPE_READ];
169 }
170 
171 static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
172 {
173 	return queue->cmnd_capsule_len - sizeof(struct nvme_command);
174 }
175 
176 static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
177 		size_t capsule_size, enum dma_data_direction dir)
178 {
179 	ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
180 	kfree(qe->data);
181 }
182 
183 static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
184 		size_t capsule_size, enum dma_data_direction dir)
185 {
186 	qe->data = kzalloc(capsule_size, GFP_KERNEL);
187 	if (!qe->data)
188 		return -ENOMEM;
189 
190 	qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
191 	if (ib_dma_mapping_error(ibdev, qe->dma)) {
192 		kfree(qe->data);
193 		qe->data = NULL;
194 		return -ENOMEM;
195 	}
196 
197 	return 0;
198 }
199 
200 static void nvme_rdma_free_ring(struct ib_device *ibdev,
201 		struct nvme_rdma_qe *ring, size_t ib_queue_size,
202 		size_t capsule_size, enum dma_data_direction dir)
203 {
204 	int i;
205 
206 	for (i = 0; i < ib_queue_size; i++)
207 		nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
208 	kfree(ring);
209 }
210 
211 static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
212 		size_t ib_queue_size, size_t capsule_size,
213 		enum dma_data_direction dir)
214 {
215 	struct nvme_rdma_qe *ring;
216 	int i;
217 
218 	ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL);
219 	if (!ring)
220 		return NULL;
221 
222 	/*
223 	 * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue
224 	 * lifetime. It's safe, since any chage in the underlying RDMA device
225 	 * will issue error recovery and queue re-creation.
226 	 */
227 	for (i = 0; i < ib_queue_size; i++) {
228 		if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
229 			goto out_free_ring;
230 	}
231 
232 	return ring;
233 
234 out_free_ring:
235 	nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
236 	return NULL;
237 }
238 
239 static void nvme_rdma_qp_event(struct ib_event *event, void *context)
240 {
241 	pr_debug("QP event %s (%d)\n",
242 		 ib_event_msg(event->event), event->event);
243 
244 }
245 
246 static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
247 {
248 	int ret;
249 
250 	ret = wait_for_completion_interruptible_timeout(&queue->cm_done,
251 			msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1);
252 	if (ret < 0)
253 		return ret;
254 	if (ret == 0)
255 		return -ETIMEDOUT;
256 	WARN_ON_ONCE(queue->cm_error > 0);
257 	return queue->cm_error;
258 }
259 
260 static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
261 {
262 	struct nvme_rdma_device *dev = queue->device;
263 	struct ib_qp_init_attr init_attr;
264 	int ret;
265 
266 	memset(&init_attr, 0, sizeof(init_attr));
267 	init_attr.event_handler = nvme_rdma_qp_event;
268 	/* +1 for drain */
269 	init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
270 	/* +1 for drain */
271 	init_attr.cap.max_recv_wr = queue->queue_size + 1;
272 	init_attr.cap.max_recv_sge = 1;
273 	init_attr.cap.max_send_sge = 1 + dev->num_inline_segments;
274 	init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
275 	init_attr.qp_type = IB_QPT_RC;
276 	init_attr.send_cq = queue->ib_cq;
277 	init_attr.recv_cq = queue->ib_cq;
278 	if (queue->pi_support)
279 		init_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN;
280 	init_attr.qp_context = queue;
281 
282 	ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
283 
284 	queue->qp = queue->cm_id->qp;
285 	return ret;
286 }
287 
288 static void nvme_rdma_exit_request(struct blk_mq_tag_set *set,
289 		struct request *rq, unsigned int hctx_idx)
290 {
291 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
292 
293 	kfree(req->sqe.data);
294 }
295 
296 static int nvme_rdma_init_request(struct blk_mq_tag_set *set,
297 		struct request *rq, unsigned int hctx_idx,
298 		unsigned int numa_node)
299 {
300 	struct nvme_rdma_ctrl *ctrl = set->driver_data;
301 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
302 	int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
303 	struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
304 
305 	nvme_req(rq)->ctrl = &ctrl->ctrl;
306 	req->sqe.data = kzalloc(sizeof(struct nvme_command), GFP_KERNEL);
307 	if (!req->sqe.data)
308 		return -ENOMEM;
309 
310 	/* metadata nvme_rdma_sgl struct is located after command's data SGL */
311 	if (queue->pi_support)
312 		req->metadata_sgl = (void *)nvme_req(rq) +
313 			sizeof(struct nvme_rdma_request) +
314 			NVME_RDMA_DATA_SGL_SIZE;
315 
316 	req->queue = queue;
317 
318 	return 0;
319 }
320 
321 static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
322 		unsigned int hctx_idx)
323 {
324 	struct nvme_rdma_ctrl *ctrl = data;
325 	struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
326 
327 	BUG_ON(hctx_idx >= ctrl->ctrl.queue_count);
328 
329 	hctx->driver_data = queue;
330 	return 0;
331 }
332 
333 static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
334 		unsigned int hctx_idx)
335 {
336 	struct nvme_rdma_ctrl *ctrl = data;
337 	struct nvme_rdma_queue *queue = &ctrl->queues[0];
338 
339 	BUG_ON(hctx_idx != 0);
340 
341 	hctx->driver_data = queue;
342 	return 0;
343 }
344 
345 static void nvme_rdma_free_dev(struct kref *ref)
346 {
347 	struct nvme_rdma_device *ndev =
348 		container_of(ref, struct nvme_rdma_device, ref);
349 
350 	mutex_lock(&device_list_mutex);
351 	list_del(&ndev->entry);
352 	mutex_unlock(&device_list_mutex);
353 
354 	ib_dealloc_pd(ndev->pd);
355 	kfree(ndev);
356 }
357 
358 static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
359 {
360 	kref_put(&dev->ref, nvme_rdma_free_dev);
361 }
362 
363 static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
364 {
365 	return kref_get_unless_zero(&dev->ref);
366 }
367 
368 static struct nvme_rdma_device *
369 nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
370 {
371 	struct nvme_rdma_device *ndev;
372 
373 	mutex_lock(&device_list_mutex);
374 	list_for_each_entry(ndev, &device_list, entry) {
375 		if (ndev->dev->node_guid == cm_id->device->node_guid &&
376 		    nvme_rdma_dev_get(ndev))
377 			goto out_unlock;
378 	}
379 
380 	ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
381 	if (!ndev)
382 		goto out_err;
383 
384 	ndev->dev = cm_id->device;
385 	kref_init(&ndev->ref);
386 
387 	ndev->pd = ib_alloc_pd(ndev->dev,
388 		register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
389 	if (IS_ERR(ndev->pd))
390 		goto out_free_dev;
391 
392 	if (!(ndev->dev->attrs.device_cap_flags &
393 	      IB_DEVICE_MEM_MGT_EXTENSIONS)) {
394 		dev_err(&ndev->dev->dev,
395 			"Memory registrations not supported.\n");
396 		goto out_free_pd;
397 	}
398 
399 	ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS,
400 					ndev->dev->attrs.max_send_sge - 1);
401 	list_add(&ndev->entry, &device_list);
402 out_unlock:
403 	mutex_unlock(&device_list_mutex);
404 	return ndev;
405 
406 out_free_pd:
407 	ib_dealloc_pd(ndev->pd);
408 out_free_dev:
409 	kfree(ndev);
410 out_err:
411 	mutex_unlock(&device_list_mutex);
412 	return NULL;
413 }
414 
415 static void nvme_rdma_free_cq(struct nvme_rdma_queue *queue)
416 {
417 	if (nvme_rdma_poll_queue(queue))
418 		ib_free_cq(queue->ib_cq);
419 	else
420 		ib_cq_pool_put(queue->ib_cq, queue->cq_size);
421 }
422 
423 static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
424 {
425 	struct nvme_rdma_device *dev;
426 	struct ib_device *ibdev;
427 
428 	if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags))
429 		return;
430 
431 	dev = queue->device;
432 	ibdev = dev->dev;
433 
434 	if (queue->pi_support)
435 		ib_mr_pool_destroy(queue->qp, &queue->qp->sig_mrs);
436 	ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
437 
438 	/*
439 	 * The cm_id object might have been destroyed during RDMA connection
440 	 * establishment error flow to avoid getting other cma events, thus
441 	 * the destruction of the QP shouldn't use rdma_cm API.
442 	 */
443 	ib_destroy_qp(queue->qp);
444 	nvme_rdma_free_cq(queue);
445 
446 	nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
447 			sizeof(struct nvme_completion), DMA_FROM_DEVICE);
448 
449 	nvme_rdma_dev_put(dev);
450 }
451 
452 static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev, bool pi_support)
453 {
454 	u32 max_page_list_len;
455 
456 	if (pi_support)
457 		max_page_list_len = ibdev->attrs.max_pi_fast_reg_page_list_len;
458 	else
459 		max_page_list_len = ibdev->attrs.max_fast_reg_page_list_len;
460 
461 	return min_t(u32, NVME_RDMA_MAX_SEGMENTS, max_page_list_len - 1);
462 }
463 
464 static int nvme_rdma_create_cq(struct ib_device *ibdev,
465 		struct nvme_rdma_queue *queue)
466 {
467 	int ret, comp_vector, idx = nvme_rdma_queue_idx(queue);
468 	enum ib_poll_context poll_ctx;
469 
470 	/*
471 	 * Spread I/O queues completion vectors according their queue index.
472 	 * Admin queues can always go on completion vector 0.
473 	 */
474 	comp_vector = (idx == 0 ? idx : idx - 1) % ibdev->num_comp_vectors;
475 
476 	/* Polling queues need direct cq polling context */
477 	if (nvme_rdma_poll_queue(queue)) {
478 		poll_ctx = IB_POLL_DIRECT;
479 		queue->ib_cq = ib_alloc_cq(ibdev, queue, queue->cq_size,
480 					   comp_vector, poll_ctx);
481 	} else {
482 		poll_ctx = IB_POLL_SOFTIRQ;
483 		queue->ib_cq = ib_cq_pool_get(ibdev, queue->cq_size,
484 					      comp_vector, poll_ctx);
485 	}
486 
487 	if (IS_ERR(queue->ib_cq)) {
488 		ret = PTR_ERR(queue->ib_cq);
489 		return ret;
490 	}
491 
492 	return 0;
493 }
494 
495 static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
496 {
497 	struct ib_device *ibdev;
498 	const int send_wr_factor = 3;			/* MR, SEND, INV */
499 	const int cq_factor = send_wr_factor + 1;	/* + RECV */
500 	int ret, pages_per_mr;
501 
502 	queue->device = nvme_rdma_find_get_device(queue->cm_id);
503 	if (!queue->device) {
504 		dev_err(queue->cm_id->device->dev.parent,
505 			"no client data found!\n");
506 		return -ECONNREFUSED;
507 	}
508 	ibdev = queue->device->dev;
509 
510 	/* +1 for ib_stop_cq */
511 	queue->cq_size = cq_factor * queue->queue_size + 1;
512 
513 	ret = nvme_rdma_create_cq(ibdev, queue);
514 	if (ret)
515 		goto out_put_dev;
516 
517 	ret = nvme_rdma_create_qp(queue, send_wr_factor);
518 	if (ret)
519 		goto out_destroy_ib_cq;
520 
521 	queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
522 			sizeof(struct nvme_completion), DMA_FROM_DEVICE);
523 	if (!queue->rsp_ring) {
524 		ret = -ENOMEM;
525 		goto out_destroy_qp;
526 	}
527 
528 	/*
529 	 * Currently we don't use SG_GAPS MR's so if the first entry is
530 	 * misaligned we'll end up using two entries for a single data page,
531 	 * so one additional entry is required.
532 	 */
533 	pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev, queue->pi_support) + 1;
534 	ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs,
535 			      queue->queue_size,
536 			      IB_MR_TYPE_MEM_REG,
537 			      pages_per_mr, 0);
538 	if (ret) {
539 		dev_err(queue->ctrl->ctrl.device,
540 			"failed to initialize MR pool sized %d for QID %d\n",
541 			queue->queue_size, nvme_rdma_queue_idx(queue));
542 		goto out_destroy_ring;
543 	}
544 
545 	if (queue->pi_support) {
546 		ret = ib_mr_pool_init(queue->qp, &queue->qp->sig_mrs,
547 				      queue->queue_size, IB_MR_TYPE_INTEGRITY,
548 				      pages_per_mr, pages_per_mr);
549 		if (ret) {
550 			dev_err(queue->ctrl->ctrl.device,
551 				"failed to initialize PI MR pool sized %d for QID %d\n",
552 				queue->queue_size, nvme_rdma_queue_idx(queue));
553 			goto out_destroy_mr_pool;
554 		}
555 	}
556 
557 	set_bit(NVME_RDMA_Q_TR_READY, &queue->flags);
558 
559 	return 0;
560 
561 out_destroy_mr_pool:
562 	ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
563 out_destroy_ring:
564 	nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
565 			    sizeof(struct nvme_completion), DMA_FROM_DEVICE);
566 out_destroy_qp:
567 	rdma_destroy_qp(queue->cm_id);
568 out_destroy_ib_cq:
569 	nvme_rdma_free_cq(queue);
570 out_put_dev:
571 	nvme_rdma_dev_put(queue->device);
572 	return ret;
573 }
574 
575 static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl,
576 		int idx, size_t queue_size)
577 {
578 	struct nvme_rdma_queue *queue;
579 	struct sockaddr *src_addr = NULL;
580 	int ret;
581 
582 	queue = &ctrl->queues[idx];
583 	mutex_init(&queue->queue_lock);
584 	queue->ctrl = ctrl;
585 	if (idx && ctrl->ctrl.max_integrity_segments)
586 		queue->pi_support = true;
587 	else
588 		queue->pi_support = false;
589 	init_completion(&queue->cm_done);
590 
591 	if (idx > 0)
592 		queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
593 	else
594 		queue->cmnd_capsule_len = sizeof(struct nvme_command);
595 
596 	queue->queue_size = queue_size;
597 
598 	queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
599 			RDMA_PS_TCP, IB_QPT_RC);
600 	if (IS_ERR(queue->cm_id)) {
601 		dev_info(ctrl->ctrl.device,
602 			"failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
603 		ret = PTR_ERR(queue->cm_id);
604 		goto out_destroy_mutex;
605 	}
606 
607 	if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
608 		src_addr = (struct sockaddr *)&ctrl->src_addr;
609 
610 	queue->cm_error = -ETIMEDOUT;
611 	ret = rdma_resolve_addr(queue->cm_id, src_addr,
612 			(struct sockaddr *)&ctrl->addr,
613 			NVME_RDMA_CONNECT_TIMEOUT_MS);
614 	if (ret) {
615 		dev_info(ctrl->ctrl.device,
616 			"rdma_resolve_addr failed (%d).\n", ret);
617 		goto out_destroy_cm_id;
618 	}
619 
620 	ret = nvme_rdma_wait_for_cm(queue);
621 	if (ret) {
622 		dev_info(ctrl->ctrl.device,
623 			"rdma connection establishment failed (%d)\n", ret);
624 		goto out_destroy_cm_id;
625 	}
626 
627 	set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags);
628 
629 	return 0;
630 
631 out_destroy_cm_id:
632 	rdma_destroy_id(queue->cm_id);
633 	nvme_rdma_destroy_queue_ib(queue);
634 out_destroy_mutex:
635 	mutex_destroy(&queue->queue_lock);
636 	return ret;
637 }
638 
639 static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
640 {
641 	rdma_disconnect(queue->cm_id);
642 	ib_drain_qp(queue->qp);
643 }
644 
645 static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
646 {
647 	mutex_lock(&queue->queue_lock);
648 	if (test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags))
649 		__nvme_rdma_stop_queue(queue);
650 	mutex_unlock(&queue->queue_lock);
651 }
652 
653 static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
654 {
655 	if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
656 		return;
657 
658 	nvme_rdma_destroy_queue_ib(queue);
659 	rdma_destroy_id(queue->cm_id);
660 	mutex_destroy(&queue->queue_lock);
661 }
662 
663 static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
664 {
665 	int i;
666 
667 	for (i = 1; i < ctrl->ctrl.queue_count; i++)
668 		nvme_rdma_free_queue(&ctrl->queues[i]);
669 }
670 
671 static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl)
672 {
673 	int i;
674 
675 	for (i = 1; i < ctrl->ctrl.queue_count; i++)
676 		nvme_rdma_stop_queue(&ctrl->queues[i]);
677 }
678 
679 static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx)
680 {
681 	struct nvme_rdma_queue *queue = &ctrl->queues[idx];
682 	bool poll = nvme_rdma_poll_queue(queue);
683 	int ret;
684 
685 	if (idx)
686 		ret = nvmf_connect_io_queue(&ctrl->ctrl, idx, poll);
687 	else
688 		ret = nvmf_connect_admin_queue(&ctrl->ctrl);
689 
690 	if (!ret) {
691 		set_bit(NVME_RDMA_Q_LIVE, &queue->flags);
692 	} else {
693 		if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
694 			__nvme_rdma_stop_queue(queue);
695 		dev_info(ctrl->ctrl.device,
696 			"failed to connect queue: %d ret=%d\n", idx, ret);
697 	}
698 	return ret;
699 }
700 
701 static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl)
702 {
703 	int i, ret = 0;
704 
705 	for (i = 1; i < ctrl->ctrl.queue_count; i++) {
706 		ret = nvme_rdma_start_queue(ctrl, i);
707 		if (ret)
708 			goto out_stop_queues;
709 	}
710 
711 	return 0;
712 
713 out_stop_queues:
714 	for (i--; i >= 1; i--)
715 		nvme_rdma_stop_queue(&ctrl->queues[i]);
716 	return ret;
717 }
718 
719 static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl)
720 {
721 	struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
722 	struct ib_device *ibdev = ctrl->device->dev;
723 	unsigned int nr_io_queues, nr_default_queues;
724 	unsigned int nr_read_queues, nr_poll_queues;
725 	int i, ret;
726 
727 	nr_read_queues = min_t(unsigned int, ibdev->num_comp_vectors,
728 				min(opts->nr_io_queues, num_online_cpus()));
729 	nr_default_queues =  min_t(unsigned int, ibdev->num_comp_vectors,
730 				min(opts->nr_write_queues, num_online_cpus()));
731 	nr_poll_queues = min(opts->nr_poll_queues, num_online_cpus());
732 	nr_io_queues = nr_read_queues + nr_default_queues + nr_poll_queues;
733 
734 	ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues);
735 	if (ret)
736 		return ret;
737 
738 	ctrl->ctrl.queue_count = nr_io_queues + 1;
739 	if (ctrl->ctrl.queue_count < 2)
740 		return 0;
741 
742 	dev_info(ctrl->ctrl.device,
743 		"creating %d I/O queues.\n", nr_io_queues);
744 
745 	if (opts->nr_write_queues && nr_read_queues < nr_io_queues) {
746 		/*
747 		 * separate read/write queues
748 		 * hand out dedicated default queues only after we have
749 		 * sufficient read queues.
750 		 */
751 		ctrl->io_queues[HCTX_TYPE_READ] = nr_read_queues;
752 		nr_io_queues -= ctrl->io_queues[HCTX_TYPE_READ];
753 		ctrl->io_queues[HCTX_TYPE_DEFAULT] =
754 			min(nr_default_queues, nr_io_queues);
755 		nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT];
756 	} else {
757 		/*
758 		 * shared read/write queues
759 		 * either no write queues were requested, or we don't have
760 		 * sufficient queue count to have dedicated default queues.
761 		 */
762 		ctrl->io_queues[HCTX_TYPE_DEFAULT] =
763 			min(nr_read_queues, nr_io_queues);
764 		nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT];
765 	}
766 
767 	if (opts->nr_poll_queues && nr_io_queues) {
768 		/* map dedicated poll queues only if we have queues left */
769 		ctrl->io_queues[HCTX_TYPE_POLL] =
770 			min(nr_poll_queues, nr_io_queues);
771 	}
772 
773 	for (i = 1; i < ctrl->ctrl.queue_count; i++) {
774 		ret = nvme_rdma_alloc_queue(ctrl, i,
775 				ctrl->ctrl.sqsize + 1);
776 		if (ret)
777 			goto out_free_queues;
778 	}
779 
780 	return 0;
781 
782 out_free_queues:
783 	for (i--; i >= 1; i--)
784 		nvme_rdma_free_queue(&ctrl->queues[i]);
785 
786 	return ret;
787 }
788 
789 static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl,
790 		bool admin)
791 {
792 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
793 	struct blk_mq_tag_set *set;
794 	int ret;
795 
796 	if (admin) {
797 		set = &ctrl->admin_tag_set;
798 		memset(set, 0, sizeof(*set));
799 		set->ops = &nvme_rdma_admin_mq_ops;
800 		set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
801 		set->reserved_tags = 2; /* connect + keep-alive */
802 		set->numa_node = nctrl->numa_node;
803 		set->cmd_size = sizeof(struct nvme_rdma_request) +
804 				NVME_RDMA_DATA_SGL_SIZE;
805 		set->driver_data = ctrl;
806 		set->nr_hw_queues = 1;
807 		set->timeout = NVME_ADMIN_TIMEOUT;
808 		set->flags = BLK_MQ_F_NO_SCHED;
809 	} else {
810 		set = &ctrl->tag_set;
811 		memset(set, 0, sizeof(*set));
812 		set->ops = &nvme_rdma_mq_ops;
813 		set->queue_depth = nctrl->sqsize + 1;
814 		set->reserved_tags = 1; /* fabric connect */
815 		set->numa_node = nctrl->numa_node;
816 		set->flags = BLK_MQ_F_SHOULD_MERGE;
817 		set->cmd_size = sizeof(struct nvme_rdma_request) +
818 				NVME_RDMA_DATA_SGL_SIZE;
819 		if (nctrl->max_integrity_segments)
820 			set->cmd_size += sizeof(struct nvme_rdma_sgl) +
821 					 NVME_RDMA_METADATA_SGL_SIZE;
822 		set->driver_data = ctrl;
823 		set->nr_hw_queues = nctrl->queue_count - 1;
824 		set->timeout = NVME_IO_TIMEOUT;
825 		set->nr_maps = nctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2;
826 	}
827 
828 	ret = blk_mq_alloc_tag_set(set);
829 	if (ret)
830 		return ERR_PTR(ret);
831 
832 	return set;
833 }
834 
835 static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl,
836 		bool remove)
837 {
838 	if (remove) {
839 		blk_cleanup_queue(ctrl->ctrl.admin_q);
840 		blk_cleanup_queue(ctrl->ctrl.fabrics_q);
841 		blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
842 	}
843 	if (ctrl->async_event_sqe.data) {
844 		cancel_work_sync(&ctrl->ctrl.async_event_work);
845 		nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
846 				sizeof(struct nvme_command), DMA_TO_DEVICE);
847 		ctrl->async_event_sqe.data = NULL;
848 	}
849 	nvme_rdma_free_queue(&ctrl->queues[0]);
850 }
851 
852 static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl,
853 		bool new)
854 {
855 	bool pi_capable = false;
856 	int error;
857 
858 	error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH);
859 	if (error)
860 		return error;
861 
862 	ctrl->device = ctrl->queues[0].device;
863 	ctrl->ctrl.numa_node = ibdev_to_node(ctrl->device->dev);
864 
865 	/* T10-PI support */
866 	if (ctrl->device->dev->attrs.device_cap_flags &
867 	    IB_DEVICE_INTEGRITY_HANDOVER)
868 		pi_capable = true;
869 
870 	ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev,
871 							pi_capable);
872 
873 	/*
874 	 * Bind the async event SQE DMA mapping to the admin queue lifetime.
875 	 * It's safe, since any chage in the underlying RDMA device will issue
876 	 * error recovery and queue re-creation.
877 	 */
878 	error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe,
879 			sizeof(struct nvme_command), DMA_TO_DEVICE);
880 	if (error)
881 		goto out_free_queue;
882 
883 	if (new) {
884 		ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true);
885 		if (IS_ERR(ctrl->ctrl.admin_tagset)) {
886 			error = PTR_ERR(ctrl->ctrl.admin_tagset);
887 			goto out_free_async_qe;
888 		}
889 
890 		ctrl->ctrl.fabrics_q = blk_mq_init_queue(&ctrl->admin_tag_set);
891 		if (IS_ERR(ctrl->ctrl.fabrics_q)) {
892 			error = PTR_ERR(ctrl->ctrl.fabrics_q);
893 			goto out_free_tagset;
894 		}
895 
896 		ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set);
897 		if (IS_ERR(ctrl->ctrl.admin_q)) {
898 			error = PTR_ERR(ctrl->ctrl.admin_q);
899 			goto out_cleanup_fabrics_q;
900 		}
901 	}
902 
903 	error = nvme_rdma_start_queue(ctrl, 0);
904 	if (error)
905 		goto out_cleanup_queue;
906 
907 	error = nvme_enable_ctrl(&ctrl->ctrl);
908 	if (error)
909 		goto out_stop_queue;
910 
911 	ctrl->ctrl.max_segments = ctrl->max_fr_pages;
912 	ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9);
913 	if (pi_capable)
914 		ctrl->ctrl.max_integrity_segments = ctrl->max_fr_pages;
915 	else
916 		ctrl->ctrl.max_integrity_segments = 0;
917 
918 	blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
919 
920 	error = nvme_init_identify(&ctrl->ctrl);
921 	if (error)
922 		goto out_quiesce_queue;
923 
924 	return 0;
925 
926 out_quiesce_queue:
927 	blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
928 	blk_sync_queue(ctrl->ctrl.admin_q);
929 out_stop_queue:
930 	nvme_rdma_stop_queue(&ctrl->queues[0]);
931 	nvme_cancel_admin_tagset(&ctrl->ctrl);
932 out_cleanup_queue:
933 	if (new)
934 		blk_cleanup_queue(ctrl->ctrl.admin_q);
935 out_cleanup_fabrics_q:
936 	if (new)
937 		blk_cleanup_queue(ctrl->ctrl.fabrics_q);
938 out_free_tagset:
939 	if (new)
940 		blk_mq_free_tag_set(ctrl->ctrl.admin_tagset);
941 out_free_async_qe:
942 	if (ctrl->async_event_sqe.data) {
943 		nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
944 			sizeof(struct nvme_command), DMA_TO_DEVICE);
945 		ctrl->async_event_sqe.data = NULL;
946 	}
947 out_free_queue:
948 	nvme_rdma_free_queue(&ctrl->queues[0]);
949 	return error;
950 }
951 
952 static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl,
953 		bool remove)
954 {
955 	if (remove) {
956 		blk_cleanup_queue(ctrl->ctrl.connect_q);
957 		blk_mq_free_tag_set(ctrl->ctrl.tagset);
958 	}
959 	nvme_rdma_free_io_queues(ctrl);
960 }
961 
962 static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
963 {
964 	int ret;
965 
966 	ret = nvme_rdma_alloc_io_queues(ctrl);
967 	if (ret)
968 		return ret;
969 
970 	if (new) {
971 		ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false);
972 		if (IS_ERR(ctrl->ctrl.tagset)) {
973 			ret = PTR_ERR(ctrl->ctrl.tagset);
974 			goto out_free_io_queues;
975 		}
976 
977 		ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set);
978 		if (IS_ERR(ctrl->ctrl.connect_q)) {
979 			ret = PTR_ERR(ctrl->ctrl.connect_q);
980 			goto out_free_tag_set;
981 		}
982 	}
983 
984 	ret = nvme_rdma_start_io_queues(ctrl);
985 	if (ret)
986 		goto out_cleanup_connect_q;
987 
988 	if (!new) {
989 		nvme_start_queues(&ctrl->ctrl);
990 		if (!nvme_wait_freeze_timeout(&ctrl->ctrl, NVME_IO_TIMEOUT)) {
991 			/*
992 			 * If we timed out waiting for freeze we are likely to
993 			 * be stuck.  Fail the controller initialization just
994 			 * to be safe.
995 			 */
996 			ret = -ENODEV;
997 			goto out_wait_freeze_timed_out;
998 		}
999 		blk_mq_update_nr_hw_queues(ctrl->ctrl.tagset,
1000 			ctrl->ctrl.queue_count - 1);
1001 		nvme_unfreeze(&ctrl->ctrl);
1002 	}
1003 
1004 	return 0;
1005 
1006 out_wait_freeze_timed_out:
1007 	nvme_stop_queues(&ctrl->ctrl);
1008 	nvme_sync_io_queues(&ctrl->ctrl);
1009 	nvme_rdma_stop_io_queues(ctrl);
1010 out_cleanup_connect_q:
1011 	nvme_cancel_tagset(&ctrl->ctrl);
1012 	if (new)
1013 		blk_cleanup_queue(ctrl->ctrl.connect_q);
1014 out_free_tag_set:
1015 	if (new)
1016 		blk_mq_free_tag_set(ctrl->ctrl.tagset);
1017 out_free_io_queues:
1018 	nvme_rdma_free_io_queues(ctrl);
1019 	return ret;
1020 }
1021 
1022 static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl,
1023 		bool remove)
1024 {
1025 	blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
1026 	blk_sync_queue(ctrl->ctrl.admin_q);
1027 	nvme_rdma_stop_queue(&ctrl->queues[0]);
1028 	nvme_cancel_admin_tagset(&ctrl->ctrl);
1029 	if (remove)
1030 		blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
1031 	nvme_rdma_destroy_admin_queue(ctrl, remove);
1032 }
1033 
1034 static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl,
1035 		bool remove)
1036 {
1037 	if (ctrl->ctrl.queue_count > 1) {
1038 		nvme_start_freeze(&ctrl->ctrl);
1039 		nvme_stop_queues(&ctrl->ctrl);
1040 		nvme_sync_io_queues(&ctrl->ctrl);
1041 		nvme_rdma_stop_io_queues(ctrl);
1042 		nvme_cancel_tagset(&ctrl->ctrl);
1043 		if (remove)
1044 			nvme_start_queues(&ctrl->ctrl);
1045 		nvme_rdma_destroy_io_queues(ctrl, remove);
1046 	}
1047 }
1048 
1049 static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
1050 {
1051 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
1052 
1053 	if (list_empty(&ctrl->list))
1054 		goto free_ctrl;
1055 
1056 	mutex_lock(&nvme_rdma_ctrl_mutex);
1057 	list_del(&ctrl->list);
1058 	mutex_unlock(&nvme_rdma_ctrl_mutex);
1059 
1060 	nvmf_free_options(nctrl->opts);
1061 free_ctrl:
1062 	kfree(ctrl->queues);
1063 	kfree(ctrl);
1064 }
1065 
1066 static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl)
1067 {
1068 	/* If we are resetting/deleting then do nothing */
1069 	if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) {
1070 		WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW ||
1071 			ctrl->ctrl.state == NVME_CTRL_LIVE);
1072 		return;
1073 	}
1074 
1075 	if (nvmf_should_reconnect(&ctrl->ctrl)) {
1076 		dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n",
1077 			ctrl->ctrl.opts->reconnect_delay);
1078 		queue_delayed_work(nvme_wq, &ctrl->reconnect_work,
1079 				ctrl->ctrl.opts->reconnect_delay * HZ);
1080 	} else {
1081 		nvme_delete_ctrl(&ctrl->ctrl);
1082 	}
1083 }
1084 
1085 static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new)
1086 {
1087 	int ret = -EINVAL;
1088 	bool changed;
1089 
1090 	ret = nvme_rdma_configure_admin_queue(ctrl, new);
1091 	if (ret)
1092 		return ret;
1093 
1094 	if (ctrl->ctrl.icdoff) {
1095 		dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
1096 		goto destroy_admin;
1097 	}
1098 
1099 	if (!(ctrl->ctrl.sgls & (1 << 2))) {
1100 		dev_err(ctrl->ctrl.device,
1101 			"Mandatory keyed sgls are not supported!\n");
1102 		goto destroy_admin;
1103 	}
1104 
1105 	if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) {
1106 		dev_warn(ctrl->ctrl.device,
1107 			"queue_size %zu > ctrl sqsize %u, clamping down\n",
1108 			ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1);
1109 	}
1110 
1111 	if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) {
1112 		dev_warn(ctrl->ctrl.device,
1113 			"sqsize %u > ctrl maxcmd %u, clamping down\n",
1114 			ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd);
1115 		ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1;
1116 	}
1117 
1118 	if (ctrl->ctrl.sgls & (1 << 20))
1119 		ctrl->use_inline_data = true;
1120 
1121 	if (ctrl->ctrl.queue_count > 1) {
1122 		ret = nvme_rdma_configure_io_queues(ctrl, new);
1123 		if (ret)
1124 			goto destroy_admin;
1125 	}
1126 
1127 	changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
1128 	if (!changed) {
1129 		/*
1130 		 * state change failure is ok if we started ctrl delete,
1131 		 * unless we're during creation of a new controller to
1132 		 * avoid races with teardown flow.
1133 		 */
1134 		WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING &&
1135 			     ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO);
1136 		WARN_ON_ONCE(new);
1137 		ret = -EINVAL;
1138 		goto destroy_io;
1139 	}
1140 
1141 	nvme_start_ctrl(&ctrl->ctrl);
1142 	return 0;
1143 
1144 destroy_io:
1145 	if (ctrl->ctrl.queue_count > 1) {
1146 		nvme_stop_queues(&ctrl->ctrl);
1147 		nvme_sync_io_queues(&ctrl->ctrl);
1148 		nvme_rdma_stop_io_queues(ctrl);
1149 		nvme_cancel_tagset(&ctrl->ctrl);
1150 		nvme_rdma_destroy_io_queues(ctrl, new);
1151 	}
1152 destroy_admin:
1153 	blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
1154 	blk_sync_queue(ctrl->ctrl.admin_q);
1155 	nvme_rdma_stop_queue(&ctrl->queues[0]);
1156 	nvme_cancel_admin_tagset(&ctrl->ctrl);
1157 	nvme_rdma_destroy_admin_queue(ctrl, new);
1158 	return ret;
1159 }
1160 
1161 static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
1162 {
1163 	struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
1164 			struct nvme_rdma_ctrl, reconnect_work);
1165 
1166 	++ctrl->ctrl.nr_reconnects;
1167 
1168 	if (nvme_rdma_setup_ctrl(ctrl, false))
1169 		goto requeue;
1170 
1171 	dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n",
1172 			ctrl->ctrl.nr_reconnects);
1173 
1174 	ctrl->ctrl.nr_reconnects = 0;
1175 
1176 	return;
1177 
1178 requeue:
1179 	dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n",
1180 			ctrl->ctrl.nr_reconnects);
1181 	nvme_rdma_reconnect_or_remove(ctrl);
1182 }
1183 
1184 static void nvme_rdma_error_recovery_work(struct work_struct *work)
1185 {
1186 	struct nvme_rdma_ctrl *ctrl = container_of(work,
1187 			struct nvme_rdma_ctrl, err_work);
1188 
1189 	nvme_stop_keep_alive(&ctrl->ctrl);
1190 	nvme_rdma_teardown_io_queues(ctrl, false);
1191 	nvme_start_queues(&ctrl->ctrl);
1192 	nvme_rdma_teardown_admin_queue(ctrl, false);
1193 	blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
1194 
1195 	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
1196 		/* state change failure is ok if we started ctrl delete */
1197 		WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING &&
1198 			     ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO);
1199 		return;
1200 	}
1201 
1202 	nvme_rdma_reconnect_or_remove(ctrl);
1203 }
1204 
1205 static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
1206 {
1207 	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
1208 		return;
1209 
1210 	dev_warn(ctrl->ctrl.device, "starting error recovery\n");
1211 	queue_work(nvme_reset_wq, &ctrl->err_work);
1212 }
1213 
1214 static void nvme_rdma_end_request(struct nvme_rdma_request *req)
1215 {
1216 	struct request *rq = blk_mq_rq_from_pdu(req);
1217 
1218 	if (!refcount_dec_and_test(&req->ref))
1219 		return;
1220 	if (!nvme_try_complete_req(rq, req->status, req->result))
1221 		nvme_rdma_complete_rq(rq);
1222 }
1223 
1224 static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
1225 		const char *op)
1226 {
1227 	struct nvme_rdma_queue *queue = wc->qp->qp_context;
1228 	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1229 
1230 	if (ctrl->ctrl.state == NVME_CTRL_LIVE)
1231 		dev_info(ctrl->ctrl.device,
1232 			     "%s for CQE 0x%p failed with status %s (%d)\n",
1233 			     op, wc->wr_cqe,
1234 			     ib_wc_status_msg(wc->status), wc->status);
1235 	nvme_rdma_error_recovery(ctrl);
1236 }
1237 
1238 static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
1239 {
1240 	if (unlikely(wc->status != IB_WC_SUCCESS))
1241 		nvme_rdma_wr_error(cq, wc, "MEMREG");
1242 }
1243 
1244 static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
1245 {
1246 	struct nvme_rdma_request *req =
1247 		container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe);
1248 
1249 	if (unlikely(wc->status != IB_WC_SUCCESS))
1250 		nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
1251 	else
1252 		nvme_rdma_end_request(req);
1253 }
1254 
1255 static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
1256 		struct nvme_rdma_request *req)
1257 {
1258 	struct ib_send_wr wr = {
1259 		.opcode		    = IB_WR_LOCAL_INV,
1260 		.next		    = NULL,
1261 		.num_sge	    = 0,
1262 		.send_flags	    = IB_SEND_SIGNALED,
1263 		.ex.invalidate_rkey = req->mr->rkey,
1264 	};
1265 
1266 	req->reg_cqe.done = nvme_rdma_inv_rkey_done;
1267 	wr.wr_cqe = &req->reg_cqe;
1268 
1269 	return ib_post_send(queue->qp, &wr, NULL);
1270 }
1271 
1272 static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
1273 		struct request *rq)
1274 {
1275 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1276 	struct nvme_rdma_device *dev = queue->device;
1277 	struct ib_device *ibdev = dev->dev;
1278 	struct list_head *pool = &queue->qp->rdma_mrs;
1279 
1280 	if (!blk_rq_nr_phys_segments(rq))
1281 		return;
1282 
1283 	if (blk_integrity_rq(rq)) {
1284 		ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl,
1285 				req->metadata_sgl->nents, rq_dma_dir(rq));
1286 		sg_free_table_chained(&req->metadata_sgl->sg_table,
1287 				      NVME_INLINE_METADATA_SG_CNT);
1288 	}
1289 
1290 	if (req->use_sig_mr)
1291 		pool = &queue->qp->sig_mrs;
1292 
1293 	if (req->mr) {
1294 		ib_mr_pool_put(queue->qp, pool, req->mr);
1295 		req->mr = NULL;
1296 	}
1297 
1298 	ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents,
1299 			rq_dma_dir(rq));
1300 	sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT);
1301 }
1302 
1303 static int nvme_rdma_set_sg_null(struct nvme_command *c)
1304 {
1305 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1306 
1307 	sg->addr = 0;
1308 	put_unaligned_le24(0, sg->length);
1309 	put_unaligned_le32(0, sg->key);
1310 	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1311 	return 0;
1312 }
1313 
1314 static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
1315 		struct nvme_rdma_request *req, struct nvme_command *c,
1316 		int count)
1317 {
1318 	struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
1319 	struct scatterlist *sgl = req->data_sgl.sg_table.sgl;
1320 	struct ib_sge *sge = &req->sge[1];
1321 	u32 len = 0;
1322 	int i;
1323 
1324 	for (i = 0; i < count; i++, sgl++, sge++) {
1325 		sge->addr = sg_dma_address(sgl);
1326 		sge->length = sg_dma_len(sgl);
1327 		sge->lkey = queue->device->pd->local_dma_lkey;
1328 		len += sge->length;
1329 	}
1330 
1331 	sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
1332 	sg->length = cpu_to_le32(len);
1333 	sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
1334 
1335 	req->num_sge += count;
1336 	return 0;
1337 }
1338 
1339 static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
1340 		struct nvme_rdma_request *req, struct nvme_command *c)
1341 {
1342 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1343 
1344 	sg->addr = cpu_to_le64(sg_dma_address(req->data_sgl.sg_table.sgl));
1345 	put_unaligned_le24(sg_dma_len(req->data_sgl.sg_table.sgl), sg->length);
1346 	put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
1347 	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1348 	return 0;
1349 }
1350 
1351 static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
1352 		struct nvme_rdma_request *req, struct nvme_command *c,
1353 		int count)
1354 {
1355 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1356 	int nr;
1357 
1358 	req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs);
1359 	if (WARN_ON_ONCE(!req->mr))
1360 		return -EAGAIN;
1361 
1362 	/*
1363 	 * Align the MR to a 4K page size to match the ctrl page size and
1364 	 * the block virtual boundary.
1365 	 */
1366 	nr = ib_map_mr_sg(req->mr, req->data_sgl.sg_table.sgl, count, NULL,
1367 			  SZ_4K);
1368 	if (unlikely(nr < count)) {
1369 		ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
1370 		req->mr = NULL;
1371 		if (nr < 0)
1372 			return nr;
1373 		return -EINVAL;
1374 	}
1375 
1376 	ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1377 
1378 	req->reg_cqe.done = nvme_rdma_memreg_done;
1379 	memset(&req->reg_wr, 0, sizeof(req->reg_wr));
1380 	req->reg_wr.wr.opcode = IB_WR_REG_MR;
1381 	req->reg_wr.wr.wr_cqe = &req->reg_cqe;
1382 	req->reg_wr.wr.num_sge = 0;
1383 	req->reg_wr.mr = req->mr;
1384 	req->reg_wr.key = req->mr->rkey;
1385 	req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
1386 			     IB_ACCESS_REMOTE_READ |
1387 			     IB_ACCESS_REMOTE_WRITE;
1388 
1389 	sg->addr = cpu_to_le64(req->mr->iova);
1390 	put_unaligned_le24(req->mr->length, sg->length);
1391 	put_unaligned_le32(req->mr->rkey, sg->key);
1392 	sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
1393 			NVME_SGL_FMT_INVALIDATE;
1394 
1395 	return 0;
1396 }
1397 
1398 static void nvme_rdma_set_sig_domain(struct blk_integrity *bi,
1399 		struct nvme_command *cmd, struct ib_sig_domain *domain,
1400 		u16 control, u8 pi_type)
1401 {
1402 	domain->sig_type = IB_SIG_TYPE_T10_DIF;
1403 	domain->sig.dif.bg_type = IB_T10DIF_CRC;
1404 	domain->sig.dif.pi_interval = 1 << bi->interval_exp;
1405 	domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag);
1406 	if (control & NVME_RW_PRINFO_PRCHK_REF)
1407 		domain->sig.dif.ref_remap = true;
1408 
1409 	domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.apptag);
1410 	domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.appmask);
1411 	domain->sig.dif.app_escape = true;
1412 	if (pi_type == NVME_NS_DPS_PI_TYPE3)
1413 		domain->sig.dif.ref_escape = true;
1414 }
1415 
1416 static void nvme_rdma_set_sig_attrs(struct blk_integrity *bi,
1417 		struct nvme_command *cmd, struct ib_sig_attrs *sig_attrs,
1418 		u8 pi_type)
1419 {
1420 	u16 control = le16_to_cpu(cmd->rw.control);
1421 
1422 	memset(sig_attrs, 0, sizeof(*sig_attrs));
1423 	if (control & NVME_RW_PRINFO_PRACT) {
1424 		/* for WRITE_INSERT/READ_STRIP no memory domain */
1425 		sig_attrs->mem.sig_type = IB_SIG_TYPE_NONE;
1426 		nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control,
1427 					 pi_type);
1428 		/* Clear the PRACT bit since HCA will generate/verify the PI */
1429 		control &= ~NVME_RW_PRINFO_PRACT;
1430 		cmd->rw.control = cpu_to_le16(control);
1431 	} else {
1432 		/* for WRITE_PASS/READ_PASS both wire/memory domains exist */
1433 		nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control,
1434 					 pi_type);
1435 		nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control,
1436 					 pi_type);
1437 	}
1438 }
1439 
1440 static void nvme_rdma_set_prot_checks(struct nvme_command *cmd, u8 *mask)
1441 {
1442 	*mask = 0;
1443 	if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_REF)
1444 		*mask |= IB_SIG_CHECK_REFTAG;
1445 	if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_GUARD)
1446 		*mask |= IB_SIG_CHECK_GUARD;
1447 }
1448 
1449 static void nvme_rdma_sig_done(struct ib_cq *cq, struct ib_wc *wc)
1450 {
1451 	if (unlikely(wc->status != IB_WC_SUCCESS))
1452 		nvme_rdma_wr_error(cq, wc, "SIG");
1453 }
1454 
1455 static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue,
1456 		struct nvme_rdma_request *req, struct nvme_command *c,
1457 		int count, int pi_count)
1458 {
1459 	struct nvme_rdma_sgl *sgl = &req->data_sgl;
1460 	struct ib_reg_wr *wr = &req->reg_wr;
1461 	struct request *rq = blk_mq_rq_from_pdu(req);
1462 	struct nvme_ns *ns = rq->q->queuedata;
1463 	struct bio *bio = rq->bio;
1464 	struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
1465 	int nr;
1466 
1467 	req->mr = ib_mr_pool_get(queue->qp, &queue->qp->sig_mrs);
1468 	if (WARN_ON_ONCE(!req->mr))
1469 		return -EAGAIN;
1470 
1471 	nr = ib_map_mr_sg_pi(req->mr, sgl->sg_table.sgl, count, NULL,
1472 			     req->metadata_sgl->sg_table.sgl, pi_count, NULL,
1473 			     SZ_4K);
1474 	if (unlikely(nr))
1475 		goto mr_put;
1476 
1477 	nvme_rdma_set_sig_attrs(blk_get_integrity(bio->bi_bdev->bd_disk), c,
1478 				req->mr->sig_attrs, ns->pi_type);
1479 	nvme_rdma_set_prot_checks(c, &req->mr->sig_attrs->check_mask);
1480 
1481 	ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
1482 
1483 	req->reg_cqe.done = nvme_rdma_sig_done;
1484 	memset(wr, 0, sizeof(*wr));
1485 	wr->wr.opcode = IB_WR_REG_MR_INTEGRITY;
1486 	wr->wr.wr_cqe = &req->reg_cqe;
1487 	wr->wr.num_sge = 0;
1488 	wr->wr.send_flags = 0;
1489 	wr->mr = req->mr;
1490 	wr->key = req->mr->rkey;
1491 	wr->access = IB_ACCESS_LOCAL_WRITE |
1492 		     IB_ACCESS_REMOTE_READ |
1493 		     IB_ACCESS_REMOTE_WRITE;
1494 
1495 	sg->addr = cpu_to_le64(req->mr->iova);
1496 	put_unaligned_le24(req->mr->length, sg->length);
1497 	put_unaligned_le32(req->mr->rkey, sg->key);
1498 	sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
1499 
1500 	return 0;
1501 
1502 mr_put:
1503 	ib_mr_pool_put(queue->qp, &queue->qp->sig_mrs, req->mr);
1504 	req->mr = NULL;
1505 	if (nr < 0)
1506 		return nr;
1507 	return -EINVAL;
1508 }
1509 
1510 static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
1511 		struct request *rq, struct nvme_command *c)
1512 {
1513 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1514 	struct nvme_rdma_device *dev = queue->device;
1515 	struct ib_device *ibdev = dev->dev;
1516 	int pi_count = 0;
1517 	int count, ret;
1518 
1519 	req->num_sge = 1;
1520 	refcount_set(&req->ref, 2); /* send and recv completions */
1521 
1522 	c->common.flags |= NVME_CMD_SGL_METABUF;
1523 
1524 	if (!blk_rq_nr_phys_segments(rq))
1525 		return nvme_rdma_set_sg_null(c);
1526 
1527 	req->data_sgl.sg_table.sgl = (struct scatterlist *)(req + 1);
1528 	ret = sg_alloc_table_chained(&req->data_sgl.sg_table,
1529 			blk_rq_nr_phys_segments(rq), req->data_sgl.sg_table.sgl,
1530 			NVME_INLINE_SG_CNT);
1531 	if (ret)
1532 		return -ENOMEM;
1533 
1534 	req->data_sgl.nents = blk_rq_map_sg(rq->q, rq,
1535 					    req->data_sgl.sg_table.sgl);
1536 
1537 	count = ib_dma_map_sg(ibdev, req->data_sgl.sg_table.sgl,
1538 			      req->data_sgl.nents, rq_dma_dir(rq));
1539 	if (unlikely(count <= 0)) {
1540 		ret = -EIO;
1541 		goto out_free_table;
1542 	}
1543 
1544 	if (blk_integrity_rq(rq)) {
1545 		req->metadata_sgl->sg_table.sgl =
1546 			(struct scatterlist *)(req->metadata_sgl + 1);
1547 		ret = sg_alloc_table_chained(&req->metadata_sgl->sg_table,
1548 				blk_rq_count_integrity_sg(rq->q, rq->bio),
1549 				req->metadata_sgl->sg_table.sgl,
1550 				NVME_INLINE_METADATA_SG_CNT);
1551 		if (unlikely(ret)) {
1552 			ret = -ENOMEM;
1553 			goto out_unmap_sg;
1554 		}
1555 
1556 		req->metadata_sgl->nents = blk_rq_map_integrity_sg(rq->q,
1557 				rq->bio, req->metadata_sgl->sg_table.sgl);
1558 		pi_count = ib_dma_map_sg(ibdev,
1559 					 req->metadata_sgl->sg_table.sgl,
1560 					 req->metadata_sgl->nents,
1561 					 rq_dma_dir(rq));
1562 		if (unlikely(pi_count <= 0)) {
1563 			ret = -EIO;
1564 			goto out_free_pi_table;
1565 		}
1566 	}
1567 
1568 	if (req->use_sig_mr) {
1569 		ret = nvme_rdma_map_sg_pi(queue, req, c, count, pi_count);
1570 		goto out;
1571 	}
1572 
1573 	if (count <= dev->num_inline_segments) {
1574 		if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) &&
1575 		    queue->ctrl->use_inline_data &&
1576 		    blk_rq_payload_bytes(rq) <=
1577 				nvme_rdma_inline_data_size(queue)) {
1578 			ret = nvme_rdma_map_sg_inline(queue, req, c, count);
1579 			goto out;
1580 		}
1581 
1582 		if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) {
1583 			ret = nvme_rdma_map_sg_single(queue, req, c);
1584 			goto out;
1585 		}
1586 	}
1587 
1588 	ret = nvme_rdma_map_sg_fr(queue, req, c, count);
1589 out:
1590 	if (unlikely(ret))
1591 		goto out_unmap_pi_sg;
1592 
1593 	return 0;
1594 
1595 out_unmap_pi_sg:
1596 	if (blk_integrity_rq(rq))
1597 		ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl,
1598 				req->metadata_sgl->nents, rq_dma_dir(rq));
1599 out_free_pi_table:
1600 	if (blk_integrity_rq(rq))
1601 		sg_free_table_chained(&req->metadata_sgl->sg_table,
1602 				      NVME_INLINE_METADATA_SG_CNT);
1603 out_unmap_sg:
1604 	ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents,
1605 			rq_dma_dir(rq));
1606 out_free_table:
1607 	sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT);
1608 	return ret;
1609 }
1610 
1611 static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
1612 {
1613 	struct nvme_rdma_qe *qe =
1614 		container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1615 	struct nvme_rdma_request *req =
1616 		container_of(qe, struct nvme_rdma_request, sqe);
1617 
1618 	if (unlikely(wc->status != IB_WC_SUCCESS))
1619 		nvme_rdma_wr_error(cq, wc, "SEND");
1620 	else
1621 		nvme_rdma_end_request(req);
1622 }
1623 
1624 static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
1625 		struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
1626 		struct ib_send_wr *first)
1627 {
1628 	struct ib_send_wr wr;
1629 	int ret;
1630 
1631 	sge->addr   = qe->dma;
1632 	sge->length = sizeof(struct nvme_command);
1633 	sge->lkey   = queue->device->pd->local_dma_lkey;
1634 
1635 	wr.next       = NULL;
1636 	wr.wr_cqe     = &qe->cqe;
1637 	wr.sg_list    = sge;
1638 	wr.num_sge    = num_sge;
1639 	wr.opcode     = IB_WR_SEND;
1640 	wr.send_flags = IB_SEND_SIGNALED;
1641 
1642 	if (first)
1643 		first->next = &wr;
1644 	else
1645 		first = &wr;
1646 
1647 	ret = ib_post_send(queue->qp, first, NULL);
1648 	if (unlikely(ret)) {
1649 		dev_err(queue->ctrl->ctrl.device,
1650 			     "%s failed with error code %d\n", __func__, ret);
1651 	}
1652 	return ret;
1653 }
1654 
1655 static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
1656 		struct nvme_rdma_qe *qe)
1657 {
1658 	struct ib_recv_wr wr;
1659 	struct ib_sge list;
1660 	int ret;
1661 
1662 	list.addr   = qe->dma;
1663 	list.length = sizeof(struct nvme_completion);
1664 	list.lkey   = queue->device->pd->local_dma_lkey;
1665 
1666 	qe->cqe.done = nvme_rdma_recv_done;
1667 
1668 	wr.next     = NULL;
1669 	wr.wr_cqe   = &qe->cqe;
1670 	wr.sg_list  = &list;
1671 	wr.num_sge  = 1;
1672 
1673 	ret = ib_post_recv(queue->qp, &wr, NULL);
1674 	if (unlikely(ret)) {
1675 		dev_err(queue->ctrl->ctrl.device,
1676 			"%s failed with error code %d\n", __func__, ret);
1677 	}
1678 	return ret;
1679 }
1680 
1681 static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
1682 {
1683 	u32 queue_idx = nvme_rdma_queue_idx(queue);
1684 
1685 	if (queue_idx == 0)
1686 		return queue->ctrl->admin_tag_set.tags[queue_idx];
1687 	return queue->ctrl->tag_set.tags[queue_idx - 1];
1688 }
1689 
1690 static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc)
1691 {
1692 	if (unlikely(wc->status != IB_WC_SUCCESS))
1693 		nvme_rdma_wr_error(cq, wc, "ASYNC");
1694 }
1695 
1696 static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg)
1697 {
1698 	struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
1699 	struct nvme_rdma_queue *queue = &ctrl->queues[0];
1700 	struct ib_device *dev = queue->device->dev;
1701 	struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
1702 	struct nvme_command *cmd = sqe->data;
1703 	struct ib_sge sge;
1704 	int ret;
1705 
1706 	ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
1707 
1708 	memset(cmd, 0, sizeof(*cmd));
1709 	cmd->common.opcode = nvme_admin_async_event;
1710 	cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH;
1711 	cmd->common.flags |= NVME_CMD_SGL_METABUF;
1712 	nvme_rdma_set_sg_null(cmd);
1713 
1714 	sqe->cqe.done = nvme_rdma_async_done;
1715 
1716 	ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
1717 			DMA_TO_DEVICE);
1718 
1719 	ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL);
1720 	WARN_ON_ONCE(ret);
1721 }
1722 
1723 static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
1724 		struct nvme_completion *cqe, struct ib_wc *wc)
1725 {
1726 	struct request *rq;
1727 	struct nvme_rdma_request *req;
1728 
1729 	rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id);
1730 	if (!rq) {
1731 		dev_err(queue->ctrl->ctrl.device,
1732 			"tag 0x%x on QP %#x not found\n",
1733 			cqe->command_id, queue->qp->qp_num);
1734 		nvme_rdma_error_recovery(queue->ctrl);
1735 		return;
1736 	}
1737 	req = blk_mq_rq_to_pdu(rq);
1738 
1739 	req->status = cqe->status;
1740 	req->result = cqe->result;
1741 
1742 	if (wc->wc_flags & IB_WC_WITH_INVALIDATE) {
1743 		if (unlikely(!req->mr ||
1744 			     wc->ex.invalidate_rkey != req->mr->rkey)) {
1745 			dev_err(queue->ctrl->ctrl.device,
1746 				"Bogus remote invalidation for rkey %#x\n",
1747 				req->mr ? req->mr->rkey : 0);
1748 			nvme_rdma_error_recovery(queue->ctrl);
1749 		}
1750 	} else if (req->mr) {
1751 		int ret;
1752 
1753 		ret = nvme_rdma_inv_rkey(queue, req);
1754 		if (unlikely(ret < 0)) {
1755 			dev_err(queue->ctrl->ctrl.device,
1756 				"Queueing INV WR for rkey %#x failed (%d)\n",
1757 				req->mr->rkey, ret);
1758 			nvme_rdma_error_recovery(queue->ctrl);
1759 		}
1760 		/* the local invalidation completion will end the request */
1761 		return;
1762 	}
1763 
1764 	nvme_rdma_end_request(req);
1765 }
1766 
1767 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
1768 {
1769 	struct nvme_rdma_qe *qe =
1770 		container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
1771 	struct nvme_rdma_queue *queue = wc->qp->qp_context;
1772 	struct ib_device *ibdev = queue->device->dev;
1773 	struct nvme_completion *cqe = qe->data;
1774 	const size_t len = sizeof(struct nvme_completion);
1775 
1776 	if (unlikely(wc->status != IB_WC_SUCCESS)) {
1777 		nvme_rdma_wr_error(cq, wc, "RECV");
1778 		return;
1779 	}
1780 
1781 	/* sanity checking for received data length */
1782 	if (unlikely(wc->byte_len < len)) {
1783 		dev_err(queue->ctrl->ctrl.device,
1784 			"Unexpected nvme completion length(%d)\n", wc->byte_len);
1785 		nvme_rdma_error_recovery(queue->ctrl);
1786 		return;
1787 	}
1788 
1789 	ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1790 	/*
1791 	 * AEN requests are special as they don't time out and can
1792 	 * survive any kind of queue freeze and often don't respond to
1793 	 * aborts.  We don't even bother to allocate a struct request
1794 	 * for them but rather special case them here.
1795 	 */
1796 	if (unlikely(nvme_is_aen_req(nvme_rdma_queue_idx(queue),
1797 				     cqe->command_id)))
1798 		nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status,
1799 				&cqe->result);
1800 	else
1801 		nvme_rdma_process_nvme_rsp(queue, cqe, wc);
1802 	ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
1803 
1804 	nvme_rdma_post_recv(queue, qe);
1805 }
1806 
1807 static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
1808 {
1809 	int ret, i;
1810 
1811 	for (i = 0; i < queue->queue_size; i++) {
1812 		ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
1813 		if (ret)
1814 			goto out_destroy_queue_ib;
1815 	}
1816 
1817 	return 0;
1818 
1819 out_destroy_queue_ib:
1820 	nvme_rdma_destroy_queue_ib(queue);
1821 	return ret;
1822 }
1823 
1824 static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
1825 		struct rdma_cm_event *ev)
1826 {
1827 	struct rdma_cm_id *cm_id = queue->cm_id;
1828 	int status = ev->status;
1829 	const char *rej_msg;
1830 	const struct nvme_rdma_cm_rej *rej_data;
1831 	u8 rej_data_len;
1832 
1833 	rej_msg = rdma_reject_msg(cm_id, status);
1834 	rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len);
1835 
1836 	if (rej_data && rej_data_len >= sizeof(u16)) {
1837 		u16 sts = le16_to_cpu(rej_data->sts);
1838 
1839 		dev_err(queue->ctrl->ctrl.device,
1840 		      "Connect rejected: status %d (%s) nvme status %d (%s).\n",
1841 		      status, rej_msg, sts, nvme_rdma_cm_msg(sts));
1842 	} else {
1843 		dev_err(queue->ctrl->ctrl.device,
1844 			"Connect rejected: status %d (%s).\n", status, rej_msg);
1845 	}
1846 
1847 	return -ECONNRESET;
1848 }
1849 
1850 static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
1851 {
1852 	struct nvme_ctrl *ctrl = &queue->ctrl->ctrl;
1853 	int ret;
1854 
1855 	ret = nvme_rdma_create_queue_ib(queue);
1856 	if (ret)
1857 		return ret;
1858 
1859 	if (ctrl->opts->tos >= 0)
1860 		rdma_set_service_type(queue->cm_id, ctrl->opts->tos);
1861 	ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS);
1862 	if (ret) {
1863 		dev_err(ctrl->device, "rdma_resolve_route failed (%d).\n",
1864 			queue->cm_error);
1865 		goto out_destroy_queue;
1866 	}
1867 
1868 	return 0;
1869 
1870 out_destroy_queue:
1871 	nvme_rdma_destroy_queue_ib(queue);
1872 	return ret;
1873 }
1874 
1875 static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
1876 {
1877 	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
1878 	struct rdma_conn_param param = { };
1879 	struct nvme_rdma_cm_req priv = { };
1880 	int ret;
1881 
1882 	param.qp_num = queue->qp->qp_num;
1883 	param.flow_control = 1;
1884 
1885 	param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom;
1886 	/* maximum retry count */
1887 	param.retry_count = 7;
1888 	param.rnr_retry_count = 7;
1889 	param.private_data = &priv;
1890 	param.private_data_len = sizeof(priv);
1891 
1892 	priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
1893 	priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
1894 	/*
1895 	 * set the admin queue depth to the minimum size
1896 	 * specified by the Fabrics standard.
1897 	 */
1898 	if (priv.qid == 0) {
1899 		priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH);
1900 		priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1);
1901 	} else {
1902 		/*
1903 		 * current interpretation of the fabrics spec
1904 		 * is at minimum you make hrqsize sqsize+1, or a
1905 		 * 1's based representation of sqsize.
1906 		 */
1907 		priv.hrqsize = cpu_to_le16(queue->queue_size);
1908 		priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
1909 	}
1910 
1911 	ret = rdma_connect_locked(queue->cm_id, &param);
1912 	if (ret) {
1913 		dev_err(ctrl->ctrl.device,
1914 			"rdma_connect_locked failed (%d).\n", ret);
1915 		goto out_destroy_queue_ib;
1916 	}
1917 
1918 	return 0;
1919 
1920 out_destroy_queue_ib:
1921 	nvme_rdma_destroy_queue_ib(queue);
1922 	return ret;
1923 }
1924 
1925 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
1926 		struct rdma_cm_event *ev)
1927 {
1928 	struct nvme_rdma_queue *queue = cm_id->context;
1929 	int cm_error = 0;
1930 
1931 	dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
1932 		rdma_event_msg(ev->event), ev->event,
1933 		ev->status, cm_id);
1934 
1935 	switch (ev->event) {
1936 	case RDMA_CM_EVENT_ADDR_RESOLVED:
1937 		cm_error = nvme_rdma_addr_resolved(queue);
1938 		break;
1939 	case RDMA_CM_EVENT_ROUTE_RESOLVED:
1940 		cm_error = nvme_rdma_route_resolved(queue);
1941 		break;
1942 	case RDMA_CM_EVENT_ESTABLISHED:
1943 		queue->cm_error = nvme_rdma_conn_established(queue);
1944 		/* complete cm_done regardless of success/failure */
1945 		complete(&queue->cm_done);
1946 		return 0;
1947 	case RDMA_CM_EVENT_REJECTED:
1948 		cm_error = nvme_rdma_conn_rejected(queue, ev);
1949 		break;
1950 	case RDMA_CM_EVENT_ROUTE_ERROR:
1951 	case RDMA_CM_EVENT_CONNECT_ERROR:
1952 	case RDMA_CM_EVENT_UNREACHABLE:
1953 		nvme_rdma_destroy_queue_ib(queue);
1954 		fallthrough;
1955 	case RDMA_CM_EVENT_ADDR_ERROR:
1956 		dev_dbg(queue->ctrl->ctrl.device,
1957 			"CM error event %d\n", ev->event);
1958 		cm_error = -ECONNRESET;
1959 		break;
1960 	case RDMA_CM_EVENT_DISCONNECTED:
1961 	case RDMA_CM_EVENT_ADDR_CHANGE:
1962 	case RDMA_CM_EVENT_TIMEWAIT_EXIT:
1963 		dev_dbg(queue->ctrl->ctrl.device,
1964 			"disconnect received - connection closed\n");
1965 		nvme_rdma_error_recovery(queue->ctrl);
1966 		break;
1967 	case RDMA_CM_EVENT_DEVICE_REMOVAL:
1968 		/* device removal is handled via the ib_client API */
1969 		break;
1970 	default:
1971 		dev_err(queue->ctrl->ctrl.device,
1972 			"Unexpected RDMA CM event (%d)\n", ev->event);
1973 		nvme_rdma_error_recovery(queue->ctrl);
1974 		break;
1975 	}
1976 
1977 	if (cm_error) {
1978 		queue->cm_error = cm_error;
1979 		complete(&queue->cm_done);
1980 	}
1981 
1982 	return 0;
1983 }
1984 
1985 static void nvme_rdma_complete_timed_out(struct request *rq)
1986 {
1987 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
1988 	struct nvme_rdma_queue *queue = req->queue;
1989 
1990 	nvme_rdma_stop_queue(queue);
1991 	if (blk_mq_request_started(rq) && !blk_mq_request_completed(rq)) {
1992 		nvme_req(rq)->status = NVME_SC_HOST_ABORTED_CMD;
1993 		blk_mq_complete_request(rq);
1994 	}
1995 }
1996 
1997 static enum blk_eh_timer_return
1998 nvme_rdma_timeout(struct request *rq, bool reserved)
1999 {
2000 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
2001 	struct nvme_rdma_queue *queue = req->queue;
2002 	struct nvme_rdma_ctrl *ctrl = queue->ctrl;
2003 
2004 	dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n",
2005 		 rq->tag, nvme_rdma_queue_idx(queue));
2006 
2007 	if (ctrl->ctrl.state != NVME_CTRL_LIVE) {
2008 		/*
2009 		 * If we are resetting, connecting or deleting we should
2010 		 * complete immediately because we may block controller
2011 		 * teardown or setup sequence
2012 		 * - ctrl disable/shutdown fabrics requests
2013 		 * - connect requests
2014 		 * - initialization admin requests
2015 		 * - I/O requests that entered after unquiescing and
2016 		 *   the controller stopped responding
2017 		 *
2018 		 * All other requests should be cancelled by the error
2019 		 * recovery work, so it's fine that we fail it here.
2020 		 */
2021 		nvme_rdma_complete_timed_out(rq);
2022 		return BLK_EH_DONE;
2023 	}
2024 
2025 	/*
2026 	 * LIVE state should trigger the normal error recovery which will
2027 	 * handle completing this request.
2028 	 */
2029 	nvme_rdma_error_recovery(ctrl);
2030 	return BLK_EH_RESET_TIMER;
2031 }
2032 
2033 static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
2034 		const struct blk_mq_queue_data *bd)
2035 {
2036 	struct nvme_ns *ns = hctx->queue->queuedata;
2037 	struct nvme_rdma_queue *queue = hctx->driver_data;
2038 	struct request *rq = bd->rq;
2039 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
2040 	struct nvme_rdma_qe *sqe = &req->sqe;
2041 	struct nvme_command *c = sqe->data;
2042 	struct ib_device *dev;
2043 	bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags);
2044 	blk_status_t ret;
2045 	int err;
2046 
2047 	WARN_ON_ONCE(rq->tag < 0);
2048 
2049 	if (!nvmf_check_ready(&queue->ctrl->ctrl, rq, queue_ready))
2050 		return nvmf_fail_nonready_command(&queue->ctrl->ctrl, rq);
2051 
2052 	dev = queue->device->dev;
2053 
2054 	req->sqe.dma = ib_dma_map_single(dev, req->sqe.data,
2055 					 sizeof(struct nvme_command),
2056 					 DMA_TO_DEVICE);
2057 	err = ib_dma_mapping_error(dev, req->sqe.dma);
2058 	if (unlikely(err))
2059 		return BLK_STS_RESOURCE;
2060 
2061 	ib_dma_sync_single_for_cpu(dev, sqe->dma,
2062 			sizeof(struct nvme_command), DMA_TO_DEVICE);
2063 
2064 	ret = nvme_setup_cmd(ns, rq, c);
2065 	if (ret)
2066 		goto unmap_qe;
2067 
2068 	blk_mq_start_request(rq);
2069 
2070 	if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) &&
2071 	    queue->pi_support &&
2072 	    (c->common.opcode == nvme_cmd_write ||
2073 	     c->common.opcode == nvme_cmd_read) &&
2074 	    nvme_ns_has_pi(ns))
2075 		req->use_sig_mr = true;
2076 	else
2077 		req->use_sig_mr = false;
2078 
2079 	err = nvme_rdma_map_data(queue, rq, c);
2080 	if (unlikely(err < 0)) {
2081 		dev_err(queue->ctrl->ctrl.device,
2082 			     "Failed to map data (%d)\n", err);
2083 		goto err;
2084 	}
2085 
2086 	sqe->cqe.done = nvme_rdma_send_done;
2087 
2088 	ib_dma_sync_single_for_device(dev, sqe->dma,
2089 			sizeof(struct nvme_command), DMA_TO_DEVICE);
2090 
2091 	err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
2092 			req->mr ? &req->reg_wr.wr : NULL);
2093 	if (unlikely(err))
2094 		goto err_unmap;
2095 
2096 	return BLK_STS_OK;
2097 
2098 err_unmap:
2099 	nvme_rdma_unmap_data(queue, rq);
2100 err:
2101 	if (err == -EIO)
2102 		ret = nvme_host_path_error(rq);
2103 	else if (err == -ENOMEM || err == -EAGAIN)
2104 		ret = BLK_STS_RESOURCE;
2105 	else
2106 		ret = BLK_STS_IOERR;
2107 	nvme_cleanup_cmd(rq);
2108 unmap_qe:
2109 	ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command),
2110 			    DMA_TO_DEVICE);
2111 	return ret;
2112 }
2113 
2114 static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx)
2115 {
2116 	struct nvme_rdma_queue *queue = hctx->driver_data;
2117 
2118 	return ib_process_cq_direct(queue->ib_cq, -1);
2119 }
2120 
2121 static void nvme_rdma_check_pi_status(struct nvme_rdma_request *req)
2122 {
2123 	struct request *rq = blk_mq_rq_from_pdu(req);
2124 	struct ib_mr_status mr_status;
2125 	int ret;
2126 
2127 	ret = ib_check_mr_status(req->mr, IB_MR_CHECK_SIG_STATUS, &mr_status);
2128 	if (ret) {
2129 		pr_err("ib_check_mr_status failed, ret %d\n", ret);
2130 		nvme_req(rq)->status = NVME_SC_INVALID_PI;
2131 		return;
2132 	}
2133 
2134 	if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) {
2135 		switch (mr_status.sig_err.err_type) {
2136 		case IB_SIG_BAD_GUARD:
2137 			nvme_req(rq)->status = NVME_SC_GUARD_CHECK;
2138 			break;
2139 		case IB_SIG_BAD_REFTAG:
2140 			nvme_req(rq)->status = NVME_SC_REFTAG_CHECK;
2141 			break;
2142 		case IB_SIG_BAD_APPTAG:
2143 			nvme_req(rq)->status = NVME_SC_APPTAG_CHECK;
2144 			break;
2145 		}
2146 		pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n",
2147 		       mr_status.sig_err.err_type, mr_status.sig_err.expected,
2148 		       mr_status.sig_err.actual);
2149 	}
2150 }
2151 
2152 static void nvme_rdma_complete_rq(struct request *rq)
2153 {
2154 	struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
2155 	struct nvme_rdma_queue *queue = req->queue;
2156 	struct ib_device *ibdev = queue->device->dev;
2157 
2158 	if (req->use_sig_mr)
2159 		nvme_rdma_check_pi_status(req);
2160 
2161 	nvme_rdma_unmap_data(queue, rq);
2162 	ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command),
2163 			    DMA_TO_DEVICE);
2164 	nvme_complete_rq(rq);
2165 }
2166 
2167 static int nvme_rdma_map_queues(struct blk_mq_tag_set *set)
2168 {
2169 	struct nvme_rdma_ctrl *ctrl = set->driver_data;
2170 	struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
2171 
2172 	if (opts->nr_write_queues && ctrl->io_queues[HCTX_TYPE_READ]) {
2173 		/* separate read/write queues */
2174 		set->map[HCTX_TYPE_DEFAULT].nr_queues =
2175 			ctrl->io_queues[HCTX_TYPE_DEFAULT];
2176 		set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
2177 		set->map[HCTX_TYPE_READ].nr_queues =
2178 			ctrl->io_queues[HCTX_TYPE_READ];
2179 		set->map[HCTX_TYPE_READ].queue_offset =
2180 			ctrl->io_queues[HCTX_TYPE_DEFAULT];
2181 	} else {
2182 		/* shared read/write queues */
2183 		set->map[HCTX_TYPE_DEFAULT].nr_queues =
2184 			ctrl->io_queues[HCTX_TYPE_DEFAULT];
2185 		set->map[HCTX_TYPE_DEFAULT].queue_offset = 0;
2186 		set->map[HCTX_TYPE_READ].nr_queues =
2187 			ctrl->io_queues[HCTX_TYPE_DEFAULT];
2188 		set->map[HCTX_TYPE_READ].queue_offset = 0;
2189 	}
2190 	blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT],
2191 			ctrl->device->dev, 0);
2192 	blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ],
2193 			ctrl->device->dev, 0);
2194 
2195 	if (opts->nr_poll_queues && ctrl->io_queues[HCTX_TYPE_POLL]) {
2196 		/* map dedicated poll queues only if we have queues left */
2197 		set->map[HCTX_TYPE_POLL].nr_queues =
2198 				ctrl->io_queues[HCTX_TYPE_POLL];
2199 		set->map[HCTX_TYPE_POLL].queue_offset =
2200 			ctrl->io_queues[HCTX_TYPE_DEFAULT] +
2201 			ctrl->io_queues[HCTX_TYPE_READ];
2202 		blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]);
2203 	}
2204 
2205 	dev_info(ctrl->ctrl.device,
2206 		"mapped %d/%d/%d default/read/poll queues.\n",
2207 		ctrl->io_queues[HCTX_TYPE_DEFAULT],
2208 		ctrl->io_queues[HCTX_TYPE_READ],
2209 		ctrl->io_queues[HCTX_TYPE_POLL]);
2210 
2211 	return 0;
2212 }
2213 
2214 static const struct blk_mq_ops nvme_rdma_mq_ops = {
2215 	.queue_rq	= nvme_rdma_queue_rq,
2216 	.complete	= nvme_rdma_complete_rq,
2217 	.init_request	= nvme_rdma_init_request,
2218 	.exit_request	= nvme_rdma_exit_request,
2219 	.init_hctx	= nvme_rdma_init_hctx,
2220 	.timeout	= nvme_rdma_timeout,
2221 	.map_queues	= nvme_rdma_map_queues,
2222 	.poll		= nvme_rdma_poll,
2223 };
2224 
2225 static const struct blk_mq_ops nvme_rdma_admin_mq_ops = {
2226 	.queue_rq	= nvme_rdma_queue_rq,
2227 	.complete	= nvme_rdma_complete_rq,
2228 	.init_request	= nvme_rdma_init_request,
2229 	.exit_request	= nvme_rdma_exit_request,
2230 	.init_hctx	= nvme_rdma_init_admin_hctx,
2231 	.timeout	= nvme_rdma_timeout,
2232 };
2233 
2234 static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
2235 {
2236 	cancel_work_sync(&ctrl->err_work);
2237 	cancel_delayed_work_sync(&ctrl->reconnect_work);
2238 
2239 	nvme_rdma_teardown_io_queues(ctrl, shutdown);
2240 	blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
2241 	if (shutdown)
2242 		nvme_shutdown_ctrl(&ctrl->ctrl);
2243 	else
2244 		nvme_disable_ctrl(&ctrl->ctrl);
2245 	nvme_rdma_teardown_admin_queue(ctrl, shutdown);
2246 }
2247 
2248 static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl)
2249 {
2250 	nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true);
2251 }
2252 
2253 static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
2254 {
2255 	struct nvme_rdma_ctrl *ctrl =
2256 		container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work);
2257 
2258 	nvme_stop_ctrl(&ctrl->ctrl);
2259 	nvme_rdma_shutdown_ctrl(ctrl, false);
2260 
2261 	if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
2262 		/* state change failure should never happen */
2263 		WARN_ON_ONCE(1);
2264 		return;
2265 	}
2266 
2267 	if (nvme_rdma_setup_ctrl(ctrl, false))
2268 		goto out_fail;
2269 
2270 	return;
2271 
2272 out_fail:
2273 	++ctrl->ctrl.nr_reconnects;
2274 	nvme_rdma_reconnect_or_remove(ctrl);
2275 }
2276 
2277 static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
2278 	.name			= "rdma",
2279 	.module			= THIS_MODULE,
2280 	.flags			= NVME_F_FABRICS | NVME_F_METADATA_SUPPORTED,
2281 	.reg_read32		= nvmf_reg_read32,
2282 	.reg_read64		= nvmf_reg_read64,
2283 	.reg_write32		= nvmf_reg_write32,
2284 	.free_ctrl		= nvme_rdma_free_ctrl,
2285 	.submit_async_event	= nvme_rdma_submit_async_event,
2286 	.delete_ctrl		= nvme_rdma_delete_ctrl,
2287 	.get_address		= nvmf_get_address,
2288 };
2289 
2290 /*
2291  * Fails a connection request if it matches an existing controller
2292  * (association) with the same tuple:
2293  * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN>
2294  *
2295  * if local address is not specified in the request, it will match an
2296  * existing controller with all the other parameters the same and no
2297  * local port address specified as well.
2298  *
2299  * The ports don't need to be compared as they are intrinsically
2300  * already matched by the port pointers supplied.
2301  */
2302 static bool
2303 nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts)
2304 {
2305 	struct nvme_rdma_ctrl *ctrl;
2306 	bool found = false;
2307 
2308 	mutex_lock(&nvme_rdma_ctrl_mutex);
2309 	list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2310 		found = nvmf_ip_options_match(&ctrl->ctrl, opts);
2311 		if (found)
2312 			break;
2313 	}
2314 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2315 
2316 	return found;
2317 }
2318 
2319 static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
2320 		struct nvmf_ctrl_options *opts)
2321 {
2322 	struct nvme_rdma_ctrl *ctrl;
2323 	int ret;
2324 	bool changed;
2325 
2326 	ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
2327 	if (!ctrl)
2328 		return ERR_PTR(-ENOMEM);
2329 	ctrl->ctrl.opts = opts;
2330 	INIT_LIST_HEAD(&ctrl->list);
2331 
2332 	if (!(opts->mask & NVMF_OPT_TRSVCID)) {
2333 		opts->trsvcid =
2334 			kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL);
2335 		if (!opts->trsvcid) {
2336 			ret = -ENOMEM;
2337 			goto out_free_ctrl;
2338 		}
2339 		opts->mask |= NVMF_OPT_TRSVCID;
2340 	}
2341 
2342 	ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
2343 			opts->traddr, opts->trsvcid, &ctrl->addr);
2344 	if (ret) {
2345 		pr_err("malformed address passed: %s:%s\n",
2346 			opts->traddr, opts->trsvcid);
2347 		goto out_free_ctrl;
2348 	}
2349 
2350 	if (opts->mask & NVMF_OPT_HOST_TRADDR) {
2351 		ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
2352 			opts->host_traddr, NULL, &ctrl->src_addr);
2353 		if (ret) {
2354 			pr_err("malformed src address passed: %s\n",
2355 			       opts->host_traddr);
2356 			goto out_free_ctrl;
2357 		}
2358 	}
2359 
2360 	if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) {
2361 		ret = -EALREADY;
2362 		goto out_free_ctrl;
2363 	}
2364 
2365 	INIT_DELAYED_WORK(&ctrl->reconnect_work,
2366 			nvme_rdma_reconnect_ctrl_work);
2367 	INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
2368 	INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work);
2369 
2370 	ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues +
2371 				opts->nr_poll_queues + 1;
2372 	ctrl->ctrl.sqsize = opts->queue_size - 1;
2373 	ctrl->ctrl.kato = opts->kato;
2374 
2375 	ret = -ENOMEM;
2376 	ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues),
2377 				GFP_KERNEL);
2378 	if (!ctrl->queues)
2379 		goto out_free_ctrl;
2380 
2381 	ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
2382 				0 /* no quirks, we're perfect! */);
2383 	if (ret)
2384 		goto out_kfree_queues;
2385 
2386 	changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING);
2387 	WARN_ON_ONCE(!changed);
2388 
2389 	ret = nvme_rdma_setup_ctrl(ctrl, true);
2390 	if (ret)
2391 		goto out_uninit_ctrl;
2392 
2393 	dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n",
2394 		ctrl->ctrl.opts->subsysnqn, &ctrl->addr);
2395 
2396 	mutex_lock(&nvme_rdma_ctrl_mutex);
2397 	list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
2398 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2399 
2400 	return &ctrl->ctrl;
2401 
2402 out_uninit_ctrl:
2403 	nvme_uninit_ctrl(&ctrl->ctrl);
2404 	nvme_put_ctrl(&ctrl->ctrl);
2405 	if (ret > 0)
2406 		ret = -EIO;
2407 	return ERR_PTR(ret);
2408 out_kfree_queues:
2409 	kfree(ctrl->queues);
2410 out_free_ctrl:
2411 	kfree(ctrl);
2412 	return ERR_PTR(ret);
2413 }
2414 
2415 static struct nvmf_transport_ops nvme_rdma_transport = {
2416 	.name		= "rdma",
2417 	.module		= THIS_MODULE,
2418 	.required_opts	= NVMF_OPT_TRADDR,
2419 	.allowed_opts	= NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY |
2420 			  NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO |
2421 			  NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES |
2422 			  NVMF_OPT_TOS,
2423 	.create_ctrl	= nvme_rdma_create_ctrl,
2424 };
2425 
2426 static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
2427 {
2428 	struct nvme_rdma_ctrl *ctrl;
2429 	struct nvme_rdma_device *ndev;
2430 	bool found = false;
2431 
2432 	mutex_lock(&device_list_mutex);
2433 	list_for_each_entry(ndev, &device_list, entry) {
2434 		if (ndev->dev == ib_device) {
2435 			found = true;
2436 			break;
2437 		}
2438 	}
2439 	mutex_unlock(&device_list_mutex);
2440 
2441 	if (!found)
2442 		return;
2443 
2444 	/* Delete all controllers using this device */
2445 	mutex_lock(&nvme_rdma_ctrl_mutex);
2446 	list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
2447 		if (ctrl->device->dev != ib_device)
2448 			continue;
2449 		nvme_delete_ctrl(&ctrl->ctrl);
2450 	}
2451 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2452 
2453 	flush_workqueue(nvme_delete_wq);
2454 }
2455 
2456 static struct ib_client nvme_rdma_ib_client = {
2457 	.name   = "nvme_rdma",
2458 	.remove = nvme_rdma_remove_one
2459 };
2460 
2461 static int __init nvme_rdma_init_module(void)
2462 {
2463 	int ret;
2464 
2465 	ret = ib_register_client(&nvme_rdma_ib_client);
2466 	if (ret)
2467 		return ret;
2468 
2469 	ret = nvmf_register_transport(&nvme_rdma_transport);
2470 	if (ret)
2471 		goto err_unreg_client;
2472 
2473 	return 0;
2474 
2475 err_unreg_client:
2476 	ib_unregister_client(&nvme_rdma_ib_client);
2477 	return ret;
2478 }
2479 
2480 static void __exit nvme_rdma_cleanup_module(void)
2481 {
2482 	struct nvme_rdma_ctrl *ctrl;
2483 
2484 	nvmf_unregister_transport(&nvme_rdma_transport);
2485 	ib_unregister_client(&nvme_rdma_ib_client);
2486 
2487 	mutex_lock(&nvme_rdma_ctrl_mutex);
2488 	list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list)
2489 		nvme_delete_ctrl(&ctrl->ctrl);
2490 	mutex_unlock(&nvme_rdma_ctrl_mutex);
2491 	flush_workqueue(nvme_delete_wq);
2492 }
2493 
2494 module_init(nvme_rdma_init_module);
2495 module_exit(nvme_rdma_cleanup_module);
2496 
2497 MODULE_LICENSE("GPL v2");
2498