1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/sed-opal.h> 15 #include <linux/fault-inject.h> 16 #include <linux/rcupdate.h> 17 #include <linux/wait.h> 18 #include <linux/t10-pi.h> 19 #include <linux/ratelimit_types.h> 20 21 #include <trace/events/block.h> 22 23 extern const struct pr_ops nvme_pr_ops; 24 25 extern unsigned int nvme_io_timeout; 26 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 27 28 extern unsigned int admin_timeout; 29 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 30 31 #define NVME_DEFAULT_KATO 5 32 33 #ifdef CONFIG_ARCH_NO_SG_CHAIN 34 #define NVME_INLINE_SG_CNT 0 35 #define NVME_INLINE_METADATA_SG_CNT 0 36 #else 37 #define NVME_INLINE_SG_CNT 2 38 #define NVME_INLINE_METADATA_SG_CNT 1 39 #endif 40 41 /* 42 * Default to a 4K page size, with the intention to update this 43 * path in the future to accommodate architectures with differing 44 * kernel and IO page sizes. 45 */ 46 #define NVME_CTRL_PAGE_SHIFT 12 47 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 48 49 extern struct workqueue_struct *nvme_wq; 50 extern struct workqueue_struct *nvme_reset_wq; 51 extern struct workqueue_struct *nvme_delete_wq; 52 extern struct mutex nvme_subsystems_lock; 53 54 /* 55 * List of workarounds for devices that required behavior not specified in 56 * the standard. 57 */ 58 enum nvme_quirks { 59 /* 60 * Prefers I/O aligned to a stripe size specified in a vendor 61 * specific Identify field. 62 */ 63 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 64 65 /* 66 * The controller doesn't handle Identify value others than 0 or 1 67 * correctly. 68 */ 69 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 70 71 /* 72 * The controller deterministically returns O's on reads to 73 * logical blocks that deallocate was called on. 74 */ 75 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 76 77 /* 78 * The controller needs a delay before starts checking the device 79 * readiness, which is done by reading the NVME_CSTS_RDY bit. 80 */ 81 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 82 83 /* 84 * APST should not be used. 85 */ 86 NVME_QUIRK_NO_APST = (1 << 4), 87 88 /* 89 * The deepest sleep state should not be used. 90 */ 91 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 92 93 /* 94 * Problems seen with concurrent commands 95 */ 96 NVME_QUIRK_QDEPTH_ONE = (1 << 6), 97 98 /* 99 * Set MEDIUM priority on SQ creation 100 */ 101 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 102 103 /* 104 * Ignore device provided subnqn. 105 */ 106 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 107 108 /* 109 * Broken Write Zeroes. 110 */ 111 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 112 113 /* 114 * Force simple suspend/resume path. 115 */ 116 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 117 118 /* 119 * Use only one interrupt vector for all queues 120 */ 121 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 122 123 /* 124 * Use non-standard 128 bytes SQEs. 125 */ 126 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 127 128 /* 129 * Prevent tag overlap between queues 130 */ 131 NVME_QUIRK_SHARED_TAGS = (1 << 13), 132 133 /* 134 * Don't change the value of the temperature threshold feature 135 */ 136 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 137 138 /* 139 * The controller doesn't handle the Identify Namespace 140 * Identification Descriptor list subcommand despite claiming 141 * NVMe 1.3 compliance. 142 */ 143 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 144 145 /* 146 * The controller does not properly handle DMA addresses over 147 * 48 bits. 148 */ 149 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 150 151 /* 152 * The controller requires the command_id value be limited, so skip 153 * encoding the generation sequence number. 154 */ 155 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 156 157 /* 158 * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 159 */ 160 NVME_QUIRK_BOGUS_NID = (1 << 18), 161 162 /* 163 * No temperature thresholds for channels other than 0 (Composite). 164 */ 165 NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19), 166 167 /* 168 * Disables simple suspend/resume path. 169 */ 170 NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND = (1 << 20), 171 172 /* 173 * MSI (but not MSI-X) interrupts are broken and never fire. 174 */ 175 NVME_QUIRK_BROKEN_MSI = (1 << 21), 176 177 /* 178 * Align dma pool segment size to 512 bytes 179 */ 180 NVME_QUIRK_DMAPOOL_ALIGN_512 = (1 << 22), 181 }; 182 183 /* 184 * Common request structure for NVMe passthrough. All drivers must have 185 * this structure as the first member of their request-private data. 186 */ 187 struct nvme_request { 188 struct nvme_command *cmd; 189 union nvme_result result; 190 u8 genctr; 191 u8 retries; 192 u8 flags; 193 u16 status; 194 #ifdef CONFIG_NVME_MULTIPATH 195 unsigned long start_time; 196 #endif 197 struct nvme_ctrl *ctrl; 198 }; 199 200 /* 201 * Mark a bio as coming in through the mpath node. 202 */ 203 #define REQ_NVME_MPATH REQ_DRV 204 205 enum { 206 NVME_REQ_CANCELLED = (1 << 0), 207 NVME_REQ_USERCMD = (1 << 1), 208 NVME_MPATH_IO_STATS = (1 << 2), 209 NVME_MPATH_CNT_ACTIVE = (1 << 3), 210 }; 211 212 static inline struct nvme_request *nvme_req(struct request *req) 213 { 214 return blk_mq_rq_to_pdu(req); 215 } 216 217 static inline u16 nvme_req_qid(struct request *req) 218 { 219 if (!req->q->queuedata) 220 return 0; 221 222 return req->mq_hctx->queue_num + 1; 223 } 224 225 /* The below value is the specific amount of delay needed before checking 226 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 227 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 228 * found empirically. 229 */ 230 #define NVME_QUIRK_DELAY_AMOUNT 2300 231 232 /* 233 * enum nvme_ctrl_state: Controller state 234 * 235 * @NVME_CTRL_NEW: New controller just allocated, initial state 236 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 237 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 238 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 239 * transport 240 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 241 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 242 * disabled/failed immediately. This state comes 243 * after all async event processing took place and 244 * before ns removal and the controller deletion 245 * progress 246 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 247 * shutdown or removal. In this case we forcibly 248 * kill all inflight I/O as they have no chance to 249 * complete 250 */ 251 enum nvme_ctrl_state { 252 NVME_CTRL_NEW, 253 NVME_CTRL_LIVE, 254 NVME_CTRL_RESETTING, 255 NVME_CTRL_CONNECTING, 256 NVME_CTRL_DELETING, 257 NVME_CTRL_DELETING_NOIO, 258 NVME_CTRL_DEAD, 259 }; 260 261 struct nvme_fault_inject { 262 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 263 struct fault_attr attr; 264 struct dentry *parent; 265 bool dont_retry; /* DNR, do not retry */ 266 u16 status; /* status code */ 267 #endif 268 }; 269 270 enum nvme_ctrl_flags { 271 NVME_CTRL_FAILFAST_EXPIRED = 0, 272 NVME_CTRL_ADMIN_Q_STOPPED = 1, 273 NVME_CTRL_STARTED_ONCE = 2, 274 NVME_CTRL_STOPPED = 3, 275 NVME_CTRL_SKIP_ID_CNS_CS = 4, 276 NVME_CTRL_DIRTY_CAPABILITY = 5, 277 NVME_CTRL_FROZEN = 6, 278 }; 279 280 struct nvme_ctrl { 281 bool comp_seen; 282 bool identified; 283 bool passthru_err_log_enabled; 284 enum nvme_ctrl_state state; 285 spinlock_t lock; 286 struct mutex scan_lock; 287 const struct nvme_ctrl_ops *ops; 288 struct request_queue *admin_q; 289 struct request_queue *connect_q; 290 struct request_queue *fabrics_q; 291 struct device *dev; 292 int instance; 293 int numa_node; 294 struct blk_mq_tag_set *tagset; 295 struct blk_mq_tag_set *admin_tagset; 296 struct list_head namespaces; 297 struct mutex namespaces_lock; 298 struct srcu_struct srcu; 299 struct device ctrl_device; 300 struct device *device; /* char device */ 301 #ifdef CONFIG_NVME_HWMON 302 struct device *hwmon_device; 303 #endif 304 struct cdev cdev; 305 struct work_struct reset_work; 306 struct work_struct delete_work; 307 wait_queue_head_t state_wq; 308 309 struct nvme_subsystem *subsys; 310 struct list_head subsys_entry; 311 312 struct opal_dev *opal_dev; 313 314 u16 cntlid; 315 316 u16 mtfa; 317 u32 ctrl_config; 318 u32 queue_count; 319 320 u64 cap; 321 u32 max_hw_sectors; 322 u32 max_segments; 323 u32 max_integrity_segments; 324 u32 max_zeroes_sectors; 325 #ifdef CONFIG_BLK_DEV_ZONED 326 u32 max_zone_append; 327 #endif 328 u16 crdt[3]; 329 u16 oncs; 330 u8 dmrl; 331 u32 dmrsl; 332 u16 oacs; 333 u16 sqsize; 334 u32 max_namespaces; 335 atomic_t abort_limit; 336 u8 vwc; 337 u32 vs; 338 u32 sgls; 339 u16 kas; 340 u8 npss; 341 u8 apsta; 342 u16 wctemp; 343 u16 cctemp; 344 u32 oaes; 345 u32 aen_result; 346 u32 ctratt; 347 unsigned int shutdown_timeout; 348 unsigned int kato; 349 bool subsystem; 350 unsigned long quirks; 351 struct nvme_id_power_state psd[32]; 352 struct nvme_effects_log *effects; 353 struct xarray cels; 354 struct work_struct scan_work; 355 struct work_struct async_event_work; 356 struct delayed_work ka_work; 357 struct delayed_work failfast_work; 358 struct nvme_command ka_cmd; 359 unsigned long ka_last_check_time; 360 struct work_struct fw_act_work; 361 unsigned long events; 362 363 #ifdef CONFIG_NVME_MULTIPATH 364 /* asymmetric namespace access: */ 365 u8 anacap; 366 u8 anatt; 367 u32 anagrpmax; 368 u32 nanagrpid; 369 struct mutex ana_lock; 370 struct nvme_ana_rsp_hdr *ana_log_buf; 371 size_t ana_log_size; 372 struct timer_list anatt_timer; 373 struct work_struct ana_work; 374 atomic_t nr_active; 375 #endif 376 377 #ifdef CONFIG_NVME_HOST_AUTH 378 struct work_struct dhchap_auth_work; 379 struct mutex dhchap_auth_mutex; 380 struct nvme_dhchap_queue_context *dhchap_ctxs; 381 struct nvme_dhchap_key *host_key; 382 struct nvme_dhchap_key *ctrl_key; 383 u16 transaction; 384 #endif 385 key_serial_t tls_pskid; 386 387 /* Power saving configuration */ 388 u64 ps_max_latency_us; 389 bool apst_enabled; 390 391 /* PCIe only: */ 392 u16 hmmaxd; 393 u32 hmpre; 394 u32 hmmin; 395 u32 hmminds; 396 397 /* Fabrics only */ 398 u32 ioccsz; 399 u32 iorcsz; 400 u16 icdoff; 401 u16 maxcmd; 402 int nr_reconnects; 403 unsigned long flags; 404 struct nvmf_ctrl_options *opts; 405 406 struct page *discard_page; 407 unsigned long discard_page_busy; 408 409 struct nvme_fault_inject fault_inject; 410 411 enum nvme_ctrl_type cntrltype; 412 enum nvme_dctype dctype; 413 }; 414 415 static inline enum nvme_ctrl_state nvme_ctrl_state(struct nvme_ctrl *ctrl) 416 { 417 return READ_ONCE(ctrl->state); 418 } 419 420 enum nvme_iopolicy { 421 NVME_IOPOLICY_NUMA, 422 NVME_IOPOLICY_RR, 423 NVME_IOPOLICY_QD, 424 }; 425 426 struct nvme_subsystem { 427 int instance; 428 struct device dev; 429 /* 430 * Because we unregister the device on the last put we need 431 * a separate refcount. 432 */ 433 struct kref ref; 434 struct list_head entry; 435 struct mutex lock; 436 struct list_head ctrls; 437 struct list_head nsheads; 438 char subnqn[NVMF_NQN_SIZE]; 439 char serial[20]; 440 char model[40]; 441 char firmware_rev[8]; 442 u8 cmic; 443 enum nvme_subsys_type subtype; 444 u16 vendor_id; 445 u16 awupf; /* 0's based awupf value. */ 446 struct ida ns_ida; 447 #ifdef CONFIG_NVME_MULTIPATH 448 enum nvme_iopolicy iopolicy; 449 #endif 450 }; 451 452 /* 453 * Container structure for uniqueue namespace identifiers. 454 */ 455 struct nvme_ns_ids { 456 u8 eui64[8]; 457 u8 nguid[16]; 458 uuid_t uuid; 459 u8 csi; 460 }; 461 462 /* 463 * Anchor structure for namespaces. There is one for each namespace in a 464 * NVMe subsystem that any of our controllers can see, and the namespace 465 * structure for each controller is chained of it. For private namespaces 466 * there is a 1:1 relation to our namespace structures, that is ->list 467 * only ever has a single entry for private namespaces. 468 */ 469 struct nvme_ns_head { 470 struct list_head list; 471 struct srcu_struct srcu; 472 struct nvme_subsystem *subsys; 473 struct nvme_ns_ids ids; 474 u8 lba_shift; 475 u16 ms; 476 u16 pi_size; 477 u8 pi_type; 478 u8 guard_type; 479 struct list_head entry; 480 struct kref ref; 481 bool shared; 482 bool rotational; 483 bool passthru_err_log_enabled; 484 struct nvme_effects_log *effects; 485 u64 nuse; 486 unsigned ns_id; 487 int instance; 488 #ifdef CONFIG_BLK_DEV_ZONED 489 u64 zsze; 490 #endif 491 unsigned long features; 492 493 struct ratelimit_state rs_nuse; 494 495 struct cdev cdev; 496 struct device cdev_device; 497 498 struct gendisk *disk; 499 #ifdef CONFIG_NVME_MULTIPATH 500 struct bio_list requeue_list; 501 spinlock_t requeue_lock; 502 struct work_struct requeue_work; 503 struct work_struct partition_scan_work; 504 struct mutex lock; 505 unsigned long flags; 506 #define NVME_NSHEAD_DISK_LIVE 0 507 struct nvme_ns __rcu *current_path[]; 508 #endif 509 }; 510 511 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 512 { 513 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 514 } 515 516 enum nvme_ns_features { 517 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 518 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 519 NVME_NS_DEAC = 1 << 2, /* DEAC bit in Write Zeores supported */ 520 }; 521 522 struct nvme_ns { 523 struct list_head list; 524 525 struct nvme_ctrl *ctrl; 526 struct request_queue *queue; 527 struct gendisk *disk; 528 #ifdef CONFIG_NVME_MULTIPATH 529 enum nvme_ana_state ana_state; 530 u32 ana_grpid; 531 #endif 532 struct list_head siblings; 533 struct kref kref; 534 struct nvme_ns_head *head; 535 536 unsigned long flags; 537 #define NVME_NS_REMOVING 0 538 #define NVME_NS_ANA_PENDING 2 539 #define NVME_NS_FORCE_RO 3 540 #define NVME_NS_READY 4 541 542 struct cdev cdev; 543 struct device cdev_device; 544 545 struct nvme_fault_inject fault_inject; 546 }; 547 548 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 549 static inline bool nvme_ns_has_pi(struct nvme_ns_head *head) 550 { 551 return head->pi_type && head->ms == head->pi_size; 552 } 553 554 struct nvme_ctrl_ops { 555 const char *name; 556 struct module *module; 557 unsigned int flags; 558 #define NVME_F_FABRICS (1 << 0) 559 #define NVME_F_METADATA_SUPPORTED (1 << 1) 560 #define NVME_F_BLOCKING (1 << 2) 561 562 const struct attribute_group **dev_attr_groups; 563 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 564 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 565 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 566 void (*free_ctrl)(struct nvme_ctrl *ctrl); 567 void (*submit_async_event)(struct nvme_ctrl *ctrl); 568 int (*subsystem_reset)(struct nvme_ctrl *ctrl); 569 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 570 void (*stop_ctrl)(struct nvme_ctrl *ctrl); 571 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 572 void (*print_device_info)(struct nvme_ctrl *ctrl); 573 bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl); 574 }; 575 576 /* 577 * nvme command_id is constructed as such: 578 * | xxxx | xxxxxxxxxxxx | 579 * gen request tag 580 */ 581 #define nvme_genctr_mask(gen) (gen & 0xf) 582 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 583 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 584 #define nvme_tag_from_cid(cid) (cid & 0xfff) 585 586 static inline u16 nvme_cid(struct request *rq) 587 { 588 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 589 } 590 591 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 592 u16 command_id) 593 { 594 u8 genctr = nvme_genctr_from_cid(command_id); 595 u16 tag = nvme_tag_from_cid(command_id); 596 struct request *rq; 597 598 rq = blk_mq_tag_to_rq(tags, tag); 599 if (unlikely(!rq)) { 600 pr_err("could not locate request for tag %#x\n", 601 tag); 602 return NULL; 603 } 604 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 605 dev_err(nvme_req(rq)->ctrl->device, 606 "request %#x genctr mismatch (got %#x expected %#x)\n", 607 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 608 return NULL; 609 } 610 return rq; 611 } 612 613 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 614 u16 command_id) 615 { 616 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 617 } 618 619 /* 620 * Return the length of the string without the space padding 621 */ 622 static inline int nvme_strlen(char *s, int len) 623 { 624 while (s[len - 1] == ' ') 625 len--; 626 return len; 627 } 628 629 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 630 { 631 struct nvme_subsystem *subsys = ctrl->subsys; 632 633 if (ctrl->ops->print_device_info) { 634 ctrl->ops->print_device_info(ctrl); 635 return; 636 } 637 638 dev_err(ctrl->device, 639 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 640 nvme_strlen(subsys->model, sizeof(subsys->model)), 641 subsys->model, nvme_strlen(subsys->firmware_rev, 642 sizeof(subsys->firmware_rev)), 643 subsys->firmware_rev); 644 } 645 646 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 647 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 648 const char *dev_name); 649 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 650 void nvme_should_fail(struct request *req); 651 #else 652 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 653 const char *dev_name) 654 { 655 } 656 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 657 { 658 } 659 static inline void nvme_should_fail(struct request *req) {} 660 #endif 661 662 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 663 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 664 665 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 666 { 667 if (!ctrl->subsystem || !ctrl->ops->subsystem_reset) 668 return -ENOTTY; 669 return ctrl->ops->subsystem_reset(ctrl); 670 } 671 672 /* 673 * Convert a 512B sector number to a device logical block number. 674 */ 675 static inline u64 nvme_sect_to_lba(struct nvme_ns_head *head, sector_t sector) 676 { 677 return sector >> (head->lba_shift - SECTOR_SHIFT); 678 } 679 680 /* 681 * Convert a device logical block number to a 512B sector number. 682 */ 683 static inline sector_t nvme_lba_to_sect(struct nvme_ns_head *head, u64 lba) 684 { 685 return lba << (head->lba_shift - SECTOR_SHIFT); 686 } 687 688 /* 689 * Convert byte length to nvme's 0-based num dwords 690 */ 691 static inline u32 nvme_bytes_to_numd(size_t len) 692 { 693 return (len >> 2) - 1; 694 } 695 696 static inline bool nvme_is_ana_error(u16 status) 697 { 698 switch (status & NVME_SCT_SC_MASK) { 699 case NVME_SC_ANA_TRANSITION: 700 case NVME_SC_ANA_INACCESSIBLE: 701 case NVME_SC_ANA_PERSISTENT_LOSS: 702 return true; 703 default: 704 return false; 705 } 706 } 707 708 static inline bool nvme_is_path_error(u16 status) 709 { 710 /* check for a status code type of 'path related status' */ 711 return (status & NVME_SCT_MASK) == NVME_SCT_PATH; 712 } 713 714 /* 715 * Fill in the status and result information from the CQE, and then figure out 716 * if blk-mq will need to use IPI magic to complete the request, and if yes do 717 * so. If not let the caller complete the request without an indirect function 718 * call. 719 */ 720 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 721 union nvme_result result) 722 { 723 struct nvme_request *rq = nvme_req(req); 724 struct nvme_ctrl *ctrl = rq->ctrl; 725 726 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 727 rq->genctr++; 728 729 rq->status = le16_to_cpu(status) >> 1; 730 rq->result = result; 731 /* inject error when permitted by fault injection framework */ 732 nvme_should_fail(req); 733 if (unlikely(blk_should_fake_timeout(req->q))) 734 return true; 735 return blk_mq_complete_request_remote(req); 736 } 737 738 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 739 { 740 get_device(ctrl->device); 741 } 742 743 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 744 { 745 put_device(ctrl->device); 746 } 747 748 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 749 { 750 return !qid && 751 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 752 } 753 754 /* 755 * Returns true for sink states that can't ever transition back to live. 756 */ 757 static inline bool nvme_state_terminal(struct nvme_ctrl *ctrl) 758 { 759 switch (nvme_ctrl_state(ctrl)) { 760 case NVME_CTRL_NEW: 761 case NVME_CTRL_LIVE: 762 case NVME_CTRL_RESETTING: 763 case NVME_CTRL_CONNECTING: 764 return false; 765 case NVME_CTRL_DELETING: 766 case NVME_CTRL_DELETING_NOIO: 767 case NVME_CTRL_DEAD: 768 return true; 769 default: 770 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 771 return true; 772 } 773 } 774 775 void nvme_end_req(struct request *req); 776 void nvme_complete_rq(struct request *req); 777 void nvme_complete_batch_req(struct request *req); 778 779 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 780 void (*fn)(struct request *rq)) 781 { 782 struct request *req; 783 784 rq_list_for_each(&iob->req_list, req) { 785 fn(req); 786 nvme_complete_batch_req(req); 787 } 788 blk_mq_end_request_batch(iob); 789 } 790 791 blk_status_t nvme_host_path_error(struct request *req); 792 bool nvme_cancel_request(struct request *req, void *data); 793 void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 794 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 795 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 796 enum nvme_ctrl_state new_state); 797 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown); 798 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 799 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 800 const struct nvme_ctrl_ops *ops, unsigned long quirks); 801 int nvme_add_ctrl(struct nvme_ctrl *ctrl); 802 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 803 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 804 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 805 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended); 806 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 807 const struct blk_mq_ops *ops, unsigned int cmd_size); 808 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl); 809 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 810 const struct blk_mq_ops *ops, unsigned int nr_maps, 811 unsigned int cmd_size); 812 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl); 813 814 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 815 816 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 817 volatile union nvme_result *res); 818 819 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl); 820 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl); 821 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl); 822 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl); 823 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl); 824 void nvme_sync_queues(struct nvme_ctrl *ctrl); 825 void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 826 void nvme_unfreeze(struct nvme_ctrl *ctrl); 827 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 828 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 829 void nvme_start_freeze(struct nvme_ctrl *ctrl); 830 831 static inline enum req_op nvme_req_op(struct nvme_command *cmd) 832 { 833 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 834 } 835 836 #define NVME_QID_ANY -1 837 void nvme_init_request(struct request *req, struct nvme_command *cmd); 838 void nvme_cleanup_cmd(struct request *req); 839 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 840 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 841 struct request *req); 842 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 843 bool queue_live, enum nvme_ctrl_state state); 844 845 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 846 bool queue_live) 847 { 848 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 849 850 if (likely(state == NVME_CTRL_LIVE)) 851 return true; 852 if (ctrl->ops->flags & NVME_F_FABRICS && state == NVME_CTRL_DELETING) 853 return queue_live; 854 return __nvme_check_ready(ctrl, rq, queue_live, state); 855 } 856 857 /* 858 * NSID shall be unique for all shared namespaces, or if at least one of the 859 * following conditions is met: 860 * 1. Namespace Management is supported by the controller 861 * 2. ANA is supported by the controller 862 * 3. NVM Set are supported by the controller 863 * 864 * In other case, private namespace are not required to report a unique NSID. 865 */ 866 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 867 struct nvme_ns_head *head) 868 { 869 return head->shared || 870 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 871 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 872 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 873 } 874 875 /* 876 * Flags for __nvme_submit_sync_cmd() 877 */ 878 typedef __u32 __bitwise nvme_submit_flags_t; 879 880 enum { 881 /* Insert request at the head of the queue */ 882 NVME_SUBMIT_AT_HEAD = (__force nvme_submit_flags_t)(1 << 0), 883 /* Set BLK_MQ_REQ_NOWAIT when allocating request */ 884 NVME_SUBMIT_NOWAIT = (__force nvme_submit_flags_t)(1 << 1), 885 /* Set BLK_MQ_REQ_RESERVED when allocating request */ 886 NVME_SUBMIT_RESERVED = (__force nvme_submit_flags_t)(1 << 2), 887 /* Retry command when NVME_STATUS_DNR is not set in the result */ 888 NVME_SUBMIT_RETRY = (__force nvme_submit_flags_t)(1 << 3), 889 }; 890 891 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 892 void *buf, unsigned bufflen); 893 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 894 union nvme_result *result, void *buffer, unsigned bufflen, 895 int qid, nvme_submit_flags_t flags); 896 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 897 unsigned int dword11, void *buffer, size_t buflen, 898 u32 *result); 899 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 900 unsigned int dword11, void *buffer, size_t buflen, 901 u32 *result); 902 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 903 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 904 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 905 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 906 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 907 void nvme_queue_scan(struct nvme_ctrl *ctrl); 908 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 909 void *log, size_t size, u64 offset); 910 bool nvme_tryget_ns_head(struct nvme_ns_head *head); 911 void nvme_put_ns_head(struct nvme_ns_head *head); 912 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 913 const struct file_operations *fops, struct module *owner); 914 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 915 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode, 916 unsigned int cmd, unsigned long arg); 917 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 918 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode, 919 unsigned int cmd, unsigned long arg); 920 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 921 unsigned long arg); 922 long nvme_dev_ioctl(struct file *file, unsigned int cmd, 923 unsigned long arg); 924 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 925 struct io_comp_batch *iob, unsigned int poll_flags); 926 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 927 unsigned int issue_flags); 928 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 929 unsigned int issue_flags); 930 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 931 struct nvme_id_ns **id); 932 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 933 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 934 935 extern const struct attribute_group *nvme_ns_attr_groups[]; 936 extern const struct pr_ops nvme_pr_ops; 937 extern const struct block_device_operations nvme_ns_head_ops; 938 extern const struct attribute_group nvme_dev_attrs_group; 939 extern const struct attribute_group *nvme_subsys_attrs_groups[]; 940 extern const struct attribute_group *nvme_dev_attr_groups[]; 941 extern const struct block_device_operations nvme_bdev_ops; 942 943 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 944 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 945 #ifdef CONFIG_NVME_MULTIPATH 946 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 947 { 948 return ctrl->ana_log_buf != NULL; 949 } 950 951 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 952 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 953 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 954 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 955 void nvme_failover_req(struct request *req); 956 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 957 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 958 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid); 959 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 960 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 961 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 962 void nvme_mpath_update(struct nvme_ctrl *ctrl); 963 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 964 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 965 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 966 void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 967 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 968 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 969 void nvme_mpath_start_request(struct request *rq); 970 void nvme_mpath_end_request(struct request *rq); 971 972 static inline void nvme_trace_bio_complete(struct request *req) 973 { 974 struct nvme_ns *ns = req->q->queuedata; 975 976 if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio) 977 trace_block_bio_complete(ns->head->disk->queue, req->bio); 978 } 979 980 extern bool multipath; 981 extern struct device_attribute dev_attr_ana_grpid; 982 extern struct device_attribute dev_attr_ana_state; 983 extern struct device_attribute subsys_attr_iopolicy; 984 985 static inline bool nvme_disk_is_ns_head(struct gendisk *disk) 986 { 987 return disk->fops == &nvme_ns_head_ops; 988 } 989 #else 990 #define multipath false 991 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 992 { 993 return false; 994 } 995 static inline void nvme_failover_req(struct request *req) 996 { 997 } 998 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 999 { 1000 } 1001 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 1002 struct nvme_ns_head *head) 1003 { 1004 return 0; 1005 } 1006 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid) 1007 { 1008 } 1009 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 1010 { 1011 } 1012 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 1013 { 1014 return false; 1015 } 1016 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 1017 { 1018 } 1019 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 1020 { 1021 } 1022 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 1023 { 1024 } 1025 static inline void nvme_trace_bio_complete(struct request *req) 1026 { 1027 } 1028 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 1029 { 1030 } 1031 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 1032 struct nvme_id_ctrl *id) 1033 { 1034 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 1035 dev_warn(ctrl->device, 1036 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 1037 return 0; 1038 } 1039 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 1040 { 1041 } 1042 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 1043 { 1044 } 1045 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 1046 { 1047 } 1048 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 1049 { 1050 } 1051 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 1052 { 1053 } 1054 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 1055 { 1056 } 1057 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 1058 { 1059 } 1060 static inline void nvme_mpath_start_request(struct request *rq) 1061 { 1062 } 1063 static inline void nvme_mpath_end_request(struct request *rq) 1064 { 1065 } 1066 static inline bool nvme_disk_is_ns_head(struct gendisk *disk) 1067 { 1068 return false; 1069 } 1070 #endif /* CONFIG_NVME_MULTIPATH */ 1071 1072 int nvme_ns_get_unique_id(struct nvme_ns *ns, u8 id[16], 1073 enum blk_unique_id type); 1074 1075 struct nvme_zone_info { 1076 u64 zone_size; 1077 unsigned int max_open_zones; 1078 unsigned int max_active_zones; 1079 }; 1080 1081 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 1082 unsigned int nr_zones, report_zones_cb cb, void *data); 1083 int nvme_query_zone_info(struct nvme_ns *ns, unsigned lbaf, 1084 struct nvme_zone_info *zi); 1085 void nvme_update_zone_info(struct nvme_ns *ns, struct queue_limits *lim, 1086 struct nvme_zone_info *zi); 1087 #ifdef CONFIG_BLK_DEV_ZONED 1088 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 1089 struct nvme_command *cmnd, 1090 enum nvme_zone_mgmt_action action); 1091 #else 1092 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 1093 struct request *req, struct nvme_command *cmnd, 1094 enum nvme_zone_mgmt_action action) 1095 { 1096 return BLK_STS_NOTSUPP; 1097 } 1098 #endif 1099 1100 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 1101 { 1102 struct gendisk *disk = dev_to_disk(dev); 1103 1104 WARN_ON(nvme_disk_is_ns_head(disk)); 1105 return disk->private_data; 1106 } 1107 1108 #ifdef CONFIG_NVME_HWMON 1109 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 1110 void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 1111 #else 1112 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 1113 { 1114 return 0; 1115 } 1116 1117 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 1118 { 1119 } 1120 #endif 1121 1122 static inline void nvme_start_request(struct request *rq) 1123 { 1124 if (rq->cmd_flags & REQ_NVME_MPATH) 1125 nvme_mpath_start_request(rq); 1126 blk_mq_start_request(rq); 1127 } 1128 1129 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 1130 { 1131 return ctrl->sgls & (NVME_CTRL_SGLS_BYTE_ALIGNED | 1132 NVME_CTRL_SGLS_DWORD_ALIGNED); 1133 } 1134 1135 static inline bool nvme_ctrl_meta_sgl_supported(struct nvme_ctrl *ctrl) 1136 { 1137 if (ctrl->ops->flags & NVME_F_FABRICS) 1138 return true; 1139 return ctrl->sgls & NVME_CTRL_SGLS_MSDS; 1140 } 1141 1142 #ifdef CONFIG_NVME_HOST_AUTH 1143 int __init nvme_init_auth(void); 1144 void __exit nvme_exit_auth(void); 1145 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl); 1146 void nvme_auth_stop(struct nvme_ctrl *ctrl); 1147 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid); 1148 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid); 1149 void nvme_auth_free(struct nvme_ctrl *ctrl); 1150 #else 1151 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) 1152 { 1153 return 0; 1154 } 1155 static inline int __init nvme_init_auth(void) 1156 { 1157 return 0; 1158 } 1159 static inline void __exit nvme_exit_auth(void) 1160 { 1161 } 1162 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {}; 1163 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid) 1164 { 1165 return -EPROTONOSUPPORT; 1166 } 1167 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid) 1168 { 1169 return -EPROTONOSUPPORT; 1170 } 1171 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {}; 1172 #endif 1173 1174 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1175 u8 opcode); 1176 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode); 1177 int nvme_execute_rq(struct request *rq, bool at_head); 1178 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1179 struct nvme_command *cmd, int status); 1180 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 1181 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 1182 bool nvme_get_ns(struct nvme_ns *ns); 1183 void nvme_put_ns(struct nvme_ns *ns); 1184 1185 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 1186 { 1187 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 1188 } 1189 1190 #ifdef CONFIG_NVME_VERBOSE_ERRORS 1191 const char *nvme_get_error_status_str(u16 status); 1192 const char *nvme_get_opcode_str(u8 opcode); 1193 const char *nvme_get_admin_opcode_str(u8 opcode); 1194 const char *nvme_get_fabrics_opcode_str(u8 opcode); 1195 #else /* CONFIG_NVME_VERBOSE_ERRORS */ 1196 static inline const char *nvme_get_error_status_str(u16 status) 1197 { 1198 return "I/O Error"; 1199 } 1200 static inline const char *nvme_get_opcode_str(u8 opcode) 1201 { 1202 return "I/O Cmd"; 1203 } 1204 static inline const char *nvme_get_admin_opcode_str(u8 opcode) 1205 { 1206 return "Admin Cmd"; 1207 } 1208 1209 static inline const char *nvme_get_fabrics_opcode_str(u8 opcode) 1210 { 1211 return "Fabrics Cmd"; 1212 } 1213 #endif /* CONFIG_NVME_VERBOSE_ERRORS */ 1214 1215 static inline const char *nvme_opcode_str(int qid, u8 opcode) 1216 { 1217 return qid ? nvme_get_opcode_str(opcode) : 1218 nvme_get_admin_opcode_str(opcode); 1219 } 1220 1221 static inline const char *nvme_fabrics_opcode_str( 1222 int qid, const struct nvme_command *cmd) 1223 { 1224 if (nvme_is_fabrics(cmd)) 1225 return nvme_get_fabrics_opcode_str(cmd->fabrics.fctype); 1226 1227 return nvme_opcode_str(qid, cmd->common.opcode); 1228 } 1229 #endif /* _NVME_H */ 1230