1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/sed-opal.h> 15 #include <linux/fault-inject.h> 16 #include <linux/rcupdate.h> 17 #include <linux/wait.h> 18 #include <linux/t10-pi.h> 19 20 #include <trace/events/block.h> 21 22 extern unsigned int nvme_io_timeout; 23 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 24 25 extern unsigned int admin_timeout; 26 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 27 28 #define NVME_DEFAULT_KATO 5 29 30 #ifdef CONFIG_ARCH_NO_SG_CHAIN 31 #define NVME_INLINE_SG_CNT 0 32 #define NVME_INLINE_METADATA_SG_CNT 0 33 #else 34 #define NVME_INLINE_SG_CNT 2 35 #define NVME_INLINE_METADATA_SG_CNT 1 36 #endif 37 38 /* 39 * Default to a 4K page size, with the intention to update this 40 * path in the future to accommodate architectures with differing 41 * kernel and IO page sizes. 42 */ 43 #define NVME_CTRL_PAGE_SHIFT 12 44 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 45 46 extern struct workqueue_struct *nvme_wq; 47 extern struct workqueue_struct *nvme_reset_wq; 48 extern struct workqueue_struct *nvme_delete_wq; 49 50 /* 51 * List of workarounds for devices that required behavior not specified in 52 * the standard. 53 */ 54 enum nvme_quirks { 55 /* 56 * Prefers I/O aligned to a stripe size specified in a vendor 57 * specific Identify field. 58 */ 59 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 60 61 /* 62 * The controller doesn't handle Identify value others than 0 or 1 63 * correctly. 64 */ 65 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 66 67 /* 68 * The controller deterministically returns O's on reads to 69 * logical blocks that deallocate was called on. 70 */ 71 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 72 73 /* 74 * The controller needs a delay before starts checking the device 75 * readiness, which is done by reading the NVME_CSTS_RDY bit. 76 */ 77 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 78 79 /* 80 * APST should not be used. 81 */ 82 NVME_QUIRK_NO_APST = (1 << 4), 83 84 /* 85 * The deepest sleep state should not be used. 86 */ 87 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 88 89 /* 90 * Set MEDIUM priority on SQ creation 91 */ 92 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 93 94 /* 95 * Ignore device provided subnqn. 96 */ 97 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 98 99 /* 100 * Broken Write Zeroes. 101 */ 102 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 103 104 /* 105 * Force simple suspend/resume path. 106 */ 107 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 108 109 /* 110 * Use only one interrupt vector for all queues 111 */ 112 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 113 114 /* 115 * Use non-standard 128 bytes SQEs. 116 */ 117 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 118 119 /* 120 * Prevent tag overlap between queues 121 */ 122 NVME_QUIRK_SHARED_TAGS = (1 << 13), 123 124 /* 125 * Don't change the value of the temperature threshold feature 126 */ 127 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 128 129 /* 130 * The controller doesn't handle the Identify Namespace 131 * Identification Descriptor list subcommand despite claiming 132 * NVMe 1.3 compliance. 133 */ 134 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 135 136 /* 137 * The controller does not properly handle DMA addresses over 138 * 48 bits. 139 */ 140 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 141 142 /* 143 * The controller requires the command_id value be be limited, so skip 144 * encoding the generation sequence number. 145 */ 146 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 147 148 /* 149 * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 150 */ 151 NVME_QUIRK_BOGUS_NID = (1 << 18), 152 }; 153 154 /* 155 * Common request structure for NVMe passthrough. All drivers must have 156 * this structure as the first member of their request-private data. 157 */ 158 struct nvme_request { 159 struct nvme_command *cmd; 160 union nvme_result result; 161 u8 genctr; 162 u8 retries; 163 u8 flags; 164 u16 status; 165 struct nvme_ctrl *ctrl; 166 }; 167 168 /* 169 * Mark a bio as coming in through the mpath node. 170 */ 171 #define REQ_NVME_MPATH REQ_DRV 172 173 enum { 174 NVME_REQ_CANCELLED = (1 << 0), 175 NVME_REQ_USERCMD = (1 << 1), 176 }; 177 178 static inline struct nvme_request *nvme_req(struct request *req) 179 { 180 return blk_mq_rq_to_pdu(req); 181 } 182 183 static inline u16 nvme_req_qid(struct request *req) 184 { 185 if (!req->q->queuedata) 186 return 0; 187 188 return req->mq_hctx->queue_num + 1; 189 } 190 191 /* The below value is the specific amount of delay needed before checking 192 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 193 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 194 * found empirically. 195 */ 196 #define NVME_QUIRK_DELAY_AMOUNT 2300 197 198 /* 199 * enum nvme_ctrl_state: Controller state 200 * 201 * @NVME_CTRL_NEW: New controller just allocated, initial state 202 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 203 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 204 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 205 * transport 206 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 207 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 208 * disabled/failed immediately. This state comes 209 * after all async event processing took place and 210 * before ns removal and the controller deletion 211 * progress 212 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 213 * shutdown or removal. In this case we forcibly 214 * kill all inflight I/O as they have no chance to 215 * complete 216 */ 217 enum nvme_ctrl_state { 218 NVME_CTRL_NEW, 219 NVME_CTRL_LIVE, 220 NVME_CTRL_RESETTING, 221 NVME_CTRL_CONNECTING, 222 NVME_CTRL_DELETING, 223 NVME_CTRL_DELETING_NOIO, 224 NVME_CTRL_DEAD, 225 }; 226 227 struct nvme_fault_inject { 228 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 229 struct fault_attr attr; 230 struct dentry *parent; 231 bool dont_retry; /* DNR, do not retry */ 232 u16 status; /* status code */ 233 #endif 234 }; 235 236 struct nvme_ctrl { 237 bool comp_seen; 238 enum nvme_ctrl_state state; 239 bool identified; 240 spinlock_t lock; 241 struct mutex scan_lock; 242 const struct nvme_ctrl_ops *ops; 243 struct request_queue *admin_q; 244 struct request_queue *connect_q; 245 struct request_queue *fabrics_q; 246 struct device *dev; 247 int instance; 248 int numa_node; 249 struct blk_mq_tag_set *tagset; 250 struct blk_mq_tag_set *admin_tagset; 251 struct list_head namespaces; 252 struct rw_semaphore namespaces_rwsem; 253 struct device ctrl_device; 254 struct device *device; /* char device */ 255 #ifdef CONFIG_NVME_HWMON 256 struct device *hwmon_device; 257 #endif 258 struct cdev cdev; 259 struct work_struct reset_work; 260 struct work_struct delete_work; 261 wait_queue_head_t state_wq; 262 263 struct nvme_subsystem *subsys; 264 struct list_head subsys_entry; 265 266 struct opal_dev *opal_dev; 267 268 char name[12]; 269 u16 cntlid; 270 271 u32 ctrl_config; 272 u16 mtfa; 273 u32 queue_count; 274 275 u64 cap; 276 u32 max_hw_sectors; 277 u32 max_segments; 278 u32 max_integrity_segments; 279 u32 max_discard_sectors; 280 u32 max_discard_segments; 281 u32 max_zeroes_sectors; 282 #ifdef CONFIG_BLK_DEV_ZONED 283 u32 max_zone_append; 284 #endif 285 u16 crdt[3]; 286 u16 oncs; 287 u16 oacs; 288 u16 sqsize; 289 u32 max_namespaces; 290 atomic_t abort_limit; 291 u8 vwc; 292 u32 vs; 293 u32 sgls; 294 u16 kas; 295 u8 npss; 296 u8 apsta; 297 u16 wctemp; 298 u16 cctemp; 299 u32 oaes; 300 u32 aen_result; 301 u32 ctratt; 302 unsigned int shutdown_timeout; 303 unsigned int kato; 304 bool subsystem; 305 unsigned long quirks; 306 struct nvme_id_power_state psd[32]; 307 struct nvme_effects_log *effects; 308 struct xarray cels; 309 struct work_struct scan_work; 310 struct work_struct async_event_work; 311 struct delayed_work ka_work; 312 struct delayed_work failfast_work; 313 struct nvme_command ka_cmd; 314 struct work_struct fw_act_work; 315 unsigned long events; 316 317 #ifdef CONFIG_NVME_MULTIPATH 318 /* asymmetric namespace access: */ 319 u8 anacap; 320 u8 anatt; 321 u32 anagrpmax; 322 u32 nanagrpid; 323 struct mutex ana_lock; 324 struct nvme_ana_rsp_hdr *ana_log_buf; 325 size_t ana_log_size; 326 struct timer_list anatt_timer; 327 struct work_struct ana_work; 328 #endif 329 330 /* Power saving configuration */ 331 u64 ps_max_latency_us; 332 bool apst_enabled; 333 334 /* PCIe only: */ 335 u32 hmpre; 336 u32 hmmin; 337 u32 hmminds; 338 u16 hmmaxd; 339 340 /* Fabrics only */ 341 u32 ioccsz; 342 u32 iorcsz; 343 u16 icdoff; 344 u16 maxcmd; 345 int nr_reconnects; 346 unsigned long flags; 347 #define NVME_CTRL_FAILFAST_EXPIRED 0 348 #define NVME_CTRL_ADMIN_Q_STOPPED 1 349 struct nvmf_ctrl_options *opts; 350 351 struct page *discard_page; 352 unsigned long discard_page_busy; 353 354 struct nvme_fault_inject fault_inject; 355 356 enum nvme_ctrl_type cntrltype; 357 enum nvme_dctype dctype; 358 }; 359 360 enum nvme_iopolicy { 361 NVME_IOPOLICY_NUMA, 362 NVME_IOPOLICY_RR, 363 }; 364 365 struct nvme_subsystem { 366 int instance; 367 struct device dev; 368 /* 369 * Because we unregister the device on the last put we need 370 * a separate refcount. 371 */ 372 struct kref ref; 373 struct list_head entry; 374 struct mutex lock; 375 struct list_head ctrls; 376 struct list_head nsheads; 377 char subnqn[NVMF_NQN_SIZE]; 378 char serial[20]; 379 char model[40]; 380 char firmware_rev[8]; 381 u8 cmic; 382 enum nvme_subsys_type subtype; 383 u16 vendor_id; 384 u16 awupf; /* 0's based awupf value. */ 385 struct ida ns_ida; 386 #ifdef CONFIG_NVME_MULTIPATH 387 enum nvme_iopolicy iopolicy; 388 #endif 389 }; 390 391 /* 392 * Container structure for uniqueue namespace identifiers. 393 */ 394 struct nvme_ns_ids { 395 u8 eui64[8]; 396 u8 nguid[16]; 397 uuid_t uuid; 398 u8 csi; 399 }; 400 401 /* 402 * Anchor structure for namespaces. There is one for each namespace in a 403 * NVMe subsystem that any of our controllers can see, and the namespace 404 * structure for each controller is chained of it. For private namespaces 405 * there is a 1:1 relation to our namespace structures, that is ->list 406 * only ever has a single entry for private namespaces. 407 */ 408 struct nvme_ns_head { 409 struct list_head list; 410 struct srcu_struct srcu; 411 struct nvme_subsystem *subsys; 412 unsigned ns_id; 413 struct nvme_ns_ids ids; 414 struct list_head entry; 415 struct kref ref; 416 bool shared; 417 int instance; 418 struct nvme_effects_log *effects; 419 420 struct cdev cdev; 421 struct device cdev_device; 422 423 struct gendisk *disk; 424 #ifdef CONFIG_NVME_MULTIPATH 425 struct bio_list requeue_list; 426 spinlock_t requeue_lock; 427 struct work_struct requeue_work; 428 struct mutex lock; 429 unsigned long flags; 430 #define NVME_NSHEAD_DISK_LIVE 0 431 struct nvme_ns __rcu *current_path[]; 432 #endif 433 }; 434 435 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 436 { 437 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 438 } 439 440 enum nvme_ns_features { 441 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 442 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 443 }; 444 445 struct nvme_ns { 446 struct list_head list; 447 448 struct nvme_ctrl *ctrl; 449 struct request_queue *queue; 450 struct gendisk *disk; 451 #ifdef CONFIG_NVME_MULTIPATH 452 enum nvme_ana_state ana_state; 453 u32 ana_grpid; 454 #endif 455 struct list_head siblings; 456 struct kref kref; 457 struct nvme_ns_head *head; 458 459 int lba_shift; 460 u16 ms; 461 u16 pi_size; 462 u16 sgs; 463 u32 sws; 464 u8 pi_type; 465 u8 guard_type; 466 #ifdef CONFIG_BLK_DEV_ZONED 467 u64 zsze; 468 #endif 469 unsigned long features; 470 unsigned long flags; 471 #define NVME_NS_REMOVING 0 472 #define NVME_NS_DEAD 1 473 #define NVME_NS_ANA_PENDING 2 474 #define NVME_NS_FORCE_RO 3 475 #define NVME_NS_READY 4 476 #define NVME_NS_STOPPED 5 477 478 struct cdev cdev; 479 struct device cdev_device; 480 481 struct nvme_fault_inject fault_inject; 482 483 }; 484 485 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 486 static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 487 { 488 return ns->pi_type && ns->ms == ns->pi_size; 489 } 490 491 struct nvme_ctrl_ops { 492 const char *name; 493 struct module *module; 494 unsigned int flags; 495 #define NVME_F_FABRICS (1 << 0) 496 #define NVME_F_METADATA_SUPPORTED (1 << 1) 497 #define NVME_F_PCI_P2PDMA (1 << 2) 498 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 499 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 500 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 501 void (*free_ctrl)(struct nvme_ctrl *ctrl); 502 void (*submit_async_event)(struct nvme_ctrl *ctrl); 503 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 504 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 505 }; 506 507 /* 508 * nvme command_id is constructed as such: 509 * | xxxx | xxxxxxxxxxxx | 510 * gen request tag 511 */ 512 #define nvme_genctr_mask(gen) (gen & 0xf) 513 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 514 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 515 #define nvme_tag_from_cid(cid) (cid & 0xfff) 516 517 static inline u16 nvme_cid(struct request *rq) 518 { 519 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 520 } 521 522 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 523 u16 command_id) 524 { 525 u8 genctr = nvme_genctr_from_cid(command_id); 526 u16 tag = nvme_tag_from_cid(command_id); 527 struct request *rq; 528 529 rq = blk_mq_tag_to_rq(tags, tag); 530 if (unlikely(!rq)) { 531 pr_err("could not locate request for tag %#x\n", 532 tag); 533 return NULL; 534 } 535 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 536 dev_err(nvme_req(rq)->ctrl->device, 537 "request %#x genctr mismatch (got %#x expected %#x)\n", 538 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 539 return NULL; 540 } 541 return rq; 542 } 543 544 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 545 u16 command_id) 546 { 547 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 548 } 549 550 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 551 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 552 const char *dev_name); 553 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 554 void nvme_should_fail(struct request *req); 555 #else 556 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 557 const char *dev_name) 558 { 559 } 560 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 561 { 562 } 563 static inline void nvme_should_fail(struct request *req) {} 564 #endif 565 566 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 567 { 568 if (!ctrl->subsystem) 569 return -ENOTTY; 570 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); 571 } 572 573 /* 574 * Convert a 512B sector number to a device logical block number. 575 */ 576 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector) 577 { 578 return sector >> (ns->lba_shift - SECTOR_SHIFT); 579 } 580 581 /* 582 * Convert a device logical block number to a 512B sector number. 583 */ 584 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba) 585 { 586 return lba << (ns->lba_shift - SECTOR_SHIFT); 587 } 588 589 /* 590 * Convert byte length to nvme's 0-based num dwords 591 */ 592 static inline u32 nvme_bytes_to_numd(size_t len) 593 { 594 return (len >> 2) - 1; 595 } 596 597 static inline bool nvme_is_ana_error(u16 status) 598 { 599 switch (status & 0x7ff) { 600 case NVME_SC_ANA_TRANSITION: 601 case NVME_SC_ANA_INACCESSIBLE: 602 case NVME_SC_ANA_PERSISTENT_LOSS: 603 return true; 604 default: 605 return false; 606 } 607 } 608 609 static inline bool nvme_is_path_error(u16 status) 610 { 611 /* check for a status code type of 'path related status' */ 612 return (status & 0x700) == 0x300; 613 } 614 615 /* 616 * Fill in the status and result information from the CQE, and then figure out 617 * if blk-mq will need to use IPI magic to complete the request, and if yes do 618 * so. If not let the caller complete the request without an indirect function 619 * call. 620 */ 621 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 622 union nvme_result result) 623 { 624 struct nvme_request *rq = nvme_req(req); 625 struct nvme_ctrl *ctrl = rq->ctrl; 626 627 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 628 rq->genctr++; 629 630 rq->status = le16_to_cpu(status) >> 1; 631 rq->result = result; 632 /* inject error when permitted by fault injection framework */ 633 nvme_should_fail(req); 634 if (unlikely(blk_should_fake_timeout(req->q))) 635 return true; 636 return blk_mq_complete_request_remote(req); 637 } 638 639 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 640 { 641 get_device(ctrl->device); 642 } 643 644 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 645 { 646 put_device(ctrl->device); 647 } 648 649 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 650 { 651 return !qid && 652 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 653 } 654 655 void nvme_complete_rq(struct request *req); 656 void nvme_complete_batch_req(struct request *req); 657 658 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 659 void (*fn)(struct request *rq)) 660 { 661 struct request *req; 662 663 rq_list_for_each(&iob->req_list, req) { 664 fn(req); 665 nvme_complete_batch_req(req); 666 } 667 blk_mq_end_request_batch(iob); 668 } 669 670 blk_status_t nvme_host_path_error(struct request *req); 671 bool nvme_cancel_request(struct request *req, void *data, bool reserved); 672 void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 673 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 674 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 675 enum nvme_ctrl_state new_state); 676 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 677 int nvme_disable_ctrl(struct nvme_ctrl *ctrl); 678 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 679 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); 680 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 681 const struct nvme_ctrl_ops *ops, unsigned long quirks); 682 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 683 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 684 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 685 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl); 686 687 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 688 689 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 690 bool send); 691 692 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 693 volatile union nvme_result *res); 694 695 void nvme_stop_queues(struct nvme_ctrl *ctrl); 696 void nvme_start_queues(struct nvme_ctrl *ctrl); 697 void nvme_stop_admin_queue(struct nvme_ctrl *ctrl); 698 void nvme_start_admin_queue(struct nvme_ctrl *ctrl); 699 void nvme_kill_queues(struct nvme_ctrl *ctrl); 700 void nvme_sync_queues(struct nvme_ctrl *ctrl); 701 void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 702 void nvme_unfreeze(struct nvme_ctrl *ctrl); 703 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 704 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 705 void nvme_start_freeze(struct nvme_ctrl *ctrl); 706 707 static inline unsigned int nvme_req_op(struct nvme_command *cmd) 708 { 709 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 710 } 711 712 #define NVME_QID_ANY -1 713 void nvme_init_request(struct request *req, struct nvme_command *cmd); 714 void nvme_cleanup_cmd(struct request *req); 715 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 716 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 717 struct request *req); 718 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 719 bool queue_live); 720 721 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 722 bool queue_live) 723 { 724 if (likely(ctrl->state == NVME_CTRL_LIVE)) 725 return true; 726 if (ctrl->ops->flags & NVME_F_FABRICS && 727 ctrl->state == NVME_CTRL_DELETING) 728 return queue_live; 729 return __nvme_check_ready(ctrl, rq, queue_live); 730 } 731 732 /* 733 * NSID shall be unique for all shared namespaces, or if at least one of the 734 * following conditions is met: 735 * 1. Namespace Management is supported by the controller 736 * 2. ANA is supported by the controller 737 * 3. NVM Set are supported by the controller 738 * 739 * In other case, private namespace are not required to report a unique NSID. 740 */ 741 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 742 struct nvme_ns_head *head) 743 { 744 return head->shared || 745 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 746 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 747 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 748 } 749 750 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 751 void *buf, unsigned bufflen); 752 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 753 union nvme_result *result, void *buffer, unsigned bufflen, 754 unsigned timeout, int qid, int at_head, 755 blk_mq_req_flags_t flags); 756 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 757 unsigned int dword11, void *buffer, size_t buflen, 758 u32 *result); 759 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 760 unsigned int dword11, void *buffer, size_t buflen, 761 u32 *result); 762 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 763 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 764 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 765 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 766 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 767 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 768 void nvme_queue_scan(struct nvme_ctrl *ctrl); 769 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 770 void *log, size_t size, u64 offset); 771 bool nvme_tryget_ns_head(struct nvme_ns_head *head); 772 void nvme_put_ns_head(struct nvme_ns_head *head); 773 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 774 const struct file_operations *fops, struct module *owner); 775 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 776 int nvme_ioctl(struct block_device *bdev, fmode_t mode, 777 unsigned int cmd, unsigned long arg); 778 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 779 int nvme_ns_head_ioctl(struct block_device *bdev, fmode_t mode, 780 unsigned int cmd, unsigned long arg); 781 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 782 unsigned long arg); 783 long nvme_dev_ioctl(struct file *file, unsigned int cmd, 784 unsigned long arg); 785 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 786 787 extern const struct attribute_group *nvme_ns_id_attr_groups[]; 788 extern const struct pr_ops nvme_pr_ops; 789 extern const struct block_device_operations nvme_ns_head_ops; 790 791 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 792 #ifdef CONFIG_NVME_MULTIPATH 793 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 794 { 795 return ctrl->ana_log_buf != NULL; 796 } 797 798 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 799 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 800 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 801 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 802 void nvme_failover_req(struct request *req); 803 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 804 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 805 void nvme_mpath_add_disk(struct nvme_ns *ns, struct nvme_id_ns *id); 806 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 807 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 808 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 809 void nvme_mpath_update(struct nvme_ctrl *ctrl); 810 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 811 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 812 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 813 void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 814 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 815 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 816 817 static inline void nvme_trace_bio_complete(struct request *req) 818 { 819 struct nvme_ns *ns = req->q->queuedata; 820 821 if (req->cmd_flags & REQ_NVME_MPATH) 822 trace_block_bio_complete(ns->head->disk->queue, req->bio); 823 } 824 825 extern bool multipath; 826 extern struct device_attribute dev_attr_ana_grpid; 827 extern struct device_attribute dev_attr_ana_state; 828 extern struct device_attribute subsys_attr_iopolicy; 829 830 #else 831 #define multipath false 832 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 833 { 834 return false; 835 } 836 static inline void nvme_failover_req(struct request *req) 837 { 838 } 839 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 840 { 841 } 842 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 843 struct nvme_ns_head *head) 844 { 845 return 0; 846 } 847 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, 848 struct nvme_id_ns *id) 849 { 850 } 851 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 852 { 853 } 854 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 855 { 856 return false; 857 } 858 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 859 { 860 } 861 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 862 { 863 } 864 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 865 { 866 } 867 static inline void nvme_trace_bio_complete(struct request *req) 868 { 869 } 870 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 871 { 872 } 873 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 874 struct nvme_id_ctrl *id) 875 { 876 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 877 dev_warn(ctrl->device, 878 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 879 return 0; 880 } 881 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 882 { 883 } 884 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 885 { 886 } 887 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 888 { 889 } 890 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 891 { 892 } 893 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 894 { 895 } 896 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 897 { 898 } 899 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 900 { 901 } 902 #endif /* CONFIG_NVME_MULTIPATH */ 903 904 int nvme_revalidate_zones(struct nvme_ns *ns); 905 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 906 unsigned int nr_zones, report_zones_cb cb, void *data); 907 #ifdef CONFIG_BLK_DEV_ZONED 908 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf); 909 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 910 struct nvme_command *cmnd, 911 enum nvme_zone_mgmt_action action); 912 #else 913 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 914 struct request *req, struct nvme_command *cmnd, 915 enum nvme_zone_mgmt_action action) 916 { 917 return BLK_STS_NOTSUPP; 918 } 919 920 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf) 921 { 922 dev_warn(ns->ctrl->device, 923 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n"); 924 return -EPROTONOSUPPORT; 925 } 926 #endif 927 928 static inline int nvme_ctrl_init_connect_q(struct nvme_ctrl *ctrl) 929 { 930 ctrl->connect_q = blk_mq_init_queue(ctrl->tagset); 931 if (IS_ERR(ctrl->connect_q)) 932 return PTR_ERR(ctrl->connect_q); 933 return 0; 934 } 935 936 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 937 { 938 return dev_to_disk(dev)->private_data; 939 } 940 941 #ifdef CONFIG_NVME_HWMON 942 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 943 void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 944 #else 945 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 946 { 947 return 0; 948 } 949 950 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 951 { 952 } 953 #endif 954 955 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 956 { 957 return ctrl->sgls & ((1 << 0) | (1 << 1)); 958 } 959 960 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 961 u8 opcode); 962 int nvme_execute_passthru_rq(struct request *rq); 963 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 964 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 965 void nvme_put_ns(struct nvme_ns *ns); 966 967 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 968 { 969 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 970 } 971 972 #ifdef CONFIG_NVME_VERBOSE_ERRORS 973 const unsigned char *nvme_get_error_status_str(u16 status); 974 const unsigned char *nvme_get_opcode_str(u8 opcode); 975 const unsigned char *nvme_get_admin_opcode_str(u8 opcode); 976 #else /* CONFIG_NVME_VERBOSE_ERRORS */ 977 static inline const unsigned char *nvme_get_error_status_str(u16 status) 978 { 979 return "I/O Error"; 980 } 981 static inline const unsigned char *nvme_get_opcode_str(u8 opcode) 982 { 983 return "I/O Cmd"; 984 } 985 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode) 986 { 987 return "Admin Cmd"; 988 } 989 #endif /* CONFIG_NVME_VERBOSE_ERRORS */ 990 991 #endif /* _NVME_H */ 992