1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2011-2014, Intel Corporation. 4 */ 5 6 #ifndef _NVME_H 7 #define _NVME_H 8 9 #include <linux/nvme.h> 10 #include <linux/cdev.h> 11 #include <linux/pci.h> 12 #include <linux/kref.h> 13 #include <linux/blk-mq.h> 14 #include <linux/sed-opal.h> 15 #include <linux/fault-inject.h> 16 #include <linux/rcupdate.h> 17 #include <linux/wait.h> 18 #include <linux/t10-pi.h> 19 #include <linux/ratelimit_types.h> 20 21 #include <trace/events/block.h> 22 23 extern const struct pr_ops nvme_pr_ops; 24 25 extern unsigned int nvme_io_timeout; 26 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 27 28 extern unsigned int admin_timeout; 29 #define NVME_ADMIN_TIMEOUT (admin_timeout * HZ) 30 31 #define NVME_DEFAULT_KATO 5 32 33 #ifdef CONFIG_ARCH_NO_SG_CHAIN 34 #define NVME_INLINE_SG_CNT 0 35 #define NVME_INLINE_METADATA_SG_CNT 0 36 #else 37 #define NVME_INLINE_SG_CNT 2 38 #define NVME_INLINE_METADATA_SG_CNT 1 39 #endif 40 41 /* 42 * Default to a 4K page size, with the intention to update this 43 * path in the future to accommodate architectures with differing 44 * kernel and IO page sizes. 45 */ 46 #define NVME_CTRL_PAGE_SHIFT 12 47 #define NVME_CTRL_PAGE_SIZE (1 << NVME_CTRL_PAGE_SHIFT) 48 49 extern struct workqueue_struct *nvme_wq; 50 extern struct workqueue_struct *nvme_reset_wq; 51 extern struct workqueue_struct *nvme_delete_wq; 52 extern struct mutex nvme_subsystems_lock; 53 54 /* 55 * List of workarounds for devices that required behavior not specified in 56 * the standard. 57 */ 58 enum nvme_quirks { 59 /* 60 * Prefers I/O aligned to a stripe size specified in a vendor 61 * specific Identify field. 62 */ 63 NVME_QUIRK_STRIPE_SIZE = (1 << 0), 64 65 /* 66 * The controller doesn't handle Identify value others than 0 or 1 67 * correctly. 68 */ 69 NVME_QUIRK_IDENTIFY_CNS = (1 << 1), 70 71 /* 72 * The controller deterministically returns O's on reads to 73 * logical blocks that deallocate was called on. 74 */ 75 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2), 76 77 /* 78 * The controller needs a delay before starts checking the device 79 * readiness, which is done by reading the NVME_CSTS_RDY bit. 80 */ 81 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3), 82 83 /* 84 * APST should not be used. 85 */ 86 NVME_QUIRK_NO_APST = (1 << 4), 87 88 /* 89 * The deepest sleep state should not be used. 90 */ 91 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5), 92 93 /* 94 * Set MEDIUM priority on SQ creation 95 */ 96 NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7), 97 98 /* 99 * Ignore device provided subnqn. 100 */ 101 NVME_QUIRK_IGNORE_DEV_SUBNQN = (1 << 8), 102 103 /* 104 * Broken Write Zeroes. 105 */ 106 NVME_QUIRK_DISABLE_WRITE_ZEROES = (1 << 9), 107 108 /* 109 * Force simple suspend/resume path. 110 */ 111 NVME_QUIRK_SIMPLE_SUSPEND = (1 << 10), 112 113 /* 114 * Use only one interrupt vector for all queues 115 */ 116 NVME_QUIRK_SINGLE_VECTOR = (1 << 11), 117 118 /* 119 * Use non-standard 128 bytes SQEs. 120 */ 121 NVME_QUIRK_128_BYTES_SQES = (1 << 12), 122 123 /* 124 * Prevent tag overlap between queues 125 */ 126 NVME_QUIRK_SHARED_TAGS = (1 << 13), 127 128 /* 129 * Don't change the value of the temperature threshold feature 130 */ 131 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14), 132 133 /* 134 * The controller doesn't handle the Identify Namespace 135 * Identification Descriptor list subcommand despite claiming 136 * NVMe 1.3 compliance. 137 */ 138 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15), 139 140 /* 141 * The controller does not properly handle DMA addresses over 142 * 48 bits. 143 */ 144 NVME_QUIRK_DMA_ADDRESS_BITS_48 = (1 << 16), 145 146 /* 147 * The controller requires the command_id value be limited, so skip 148 * encoding the generation sequence number. 149 */ 150 NVME_QUIRK_SKIP_CID_GEN = (1 << 17), 151 152 /* 153 * Reports garbage in the namespace identifiers (eui64, nguid, uuid). 154 */ 155 NVME_QUIRK_BOGUS_NID = (1 << 18), 156 157 /* 158 * No temperature thresholds for channels other than 0 (Composite). 159 */ 160 NVME_QUIRK_NO_SECONDARY_TEMP_THRESH = (1 << 19), 161 162 /* 163 * Disables simple suspend/resume path. 164 */ 165 NVME_QUIRK_FORCE_NO_SIMPLE_SUSPEND = (1 << 20), 166 167 /* 168 * MSI (but not MSI-X) interrupts are broken and never fire. 169 */ 170 NVME_QUIRK_BROKEN_MSI = (1 << 21), 171 }; 172 173 /* 174 * Common request structure for NVMe passthrough. All drivers must have 175 * this structure as the first member of their request-private data. 176 */ 177 struct nvme_request { 178 struct nvme_command *cmd; 179 union nvme_result result; 180 u8 genctr; 181 u8 retries; 182 u8 flags; 183 u16 status; 184 #ifdef CONFIG_NVME_MULTIPATH 185 unsigned long start_time; 186 #endif 187 struct nvme_ctrl *ctrl; 188 }; 189 190 /* 191 * Mark a bio as coming in through the mpath node. 192 */ 193 #define REQ_NVME_MPATH REQ_DRV 194 195 enum { 196 NVME_REQ_CANCELLED = (1 << 0), 197 NVME_REQ_USERCMD = (1 << 1), 198 NVME_MPATH_IO_STATS = (1 << 2), 199 NVME_MPATH_CNT_ACTIVE = (1 << 3), 200 }; 201 202 static inline struct nvme_request *nvme_req(struct request *req) 203 { 204 return blk_mq_rq_to_pdu(req); 205 } 206 207 static inline u16 nvme_req_qid(struct request *req) 208 { 209 if (!req->q->queuedata) 210 return 0; 211 212 return req->mq_hctx->queue_num + 1; 213 } 214 215 /* The below value is the specific amount of delay needed before checking 216 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the 217 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was 218 * found empirically. 219 */ 220 #define NVME_QUIRK_DELAY_AMOUNT 2300 221 222 /* 223 * enum nvme_ctrl_state: Controller state 224 * 225 * @NVME_CTRL_NEW: New controller just allocated, initial state 226 * @NVME_CTRL_LIVE: Controller is connected and I/O capable 227 * @NVME_CTRL_RESETTING: Controller is resetting (or scheduled reset) 228 * @NVME_CTRL_CONNECTING: Controller is disconnected, now connecting the 229 * transport 230 * @NVME_CTRL_DELETING: Controller is deleting (or scheduled deletion) 231 * @NVME_CTRL_DELETING_NOIO: Controller is deleting and I/O is not 232 * disabled/failed immediately. This state comes 233 * after all async event processing took place and 234 * before ns removal and the controller deletion 235 * progress 236 * @NVME_CTRL_DEAD: Controller is non-present/unresponsive during 237 * shutdown or removal. In this case we forcibly 238 * kill all inflight I/O as they have no chance to 239 * complete 240 */ 241 enum nvme_ctrl_state { 242 NVME_CTRL_NEW, 243 NVME_CTRL_LIVE, 244 NVME_CTRL_RESETTING, 245 NVME_CTRL_CONNECTING, 246 NVME_CTRL_DELETING, 247 NVME_CTRL_DELETING_NOIO, 248 NVME_CTRL_DEAD, 249 }; 250 251 struct nvme_fault_inject { 252 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 253 struct fault_attr attr; 254 struct dentry *parent; 255 bool dont_retry; /* DNR, do not retry */ 256 u16 status; /* status code */ 257 #endif 258 }; 259 260 enum nvme_ctrl_flags { 261 NVME_CTRL_FAILFAST_EXPIRED = 0, 262 NVME_CTRL_ADMIN_Q_STOPPED = 1, 263 NVME_CTRL_STARTED_ONCE = 2, 264 NVME_CTRL_STOPPED = 3, 265 NVME_CTRL_SKIP_ID_CNS_CS = 4, 266 NVME_CTRL_DIRTY_CAPABILITY = 5, 267 NVME_CTRL_FROZEN = 6, 268 }; 269 270 struct nvme_ctrl { 271 bool comp_seen; 272 bool identified; 273 bool passthru_err_log_enabled; 274 enum nvme_ctrl_state state; 275 spinlock_t lock; 276 struct mutex scan_lock; 277 const struct nvme_ctrl_ops *ops; 278 struct request_queue *admin_q; 279 struct request_queue *connect_q; 280 struct request_queue *fabrics_q; 281 struct device *dev; 282 int instance; 283 int numa_node; 284 struct blk_mq_tag_set *tagset; 285 struct blk_mq_tag_set *admin_tagset; 286 struct list_head namespaces; 287 struct mutex namespaces_lock; 288 struct srcu_struct srcu; 289 struct device ctrl_device; 290 struct device *device; /* char device */ 291 #ifdef CONFIG_NVME_HWMON 292 struct device *hwmon_device; 293 #endif 294 struct cdev cdev; 295 struct work_struct reset_work; 296 struct work_struct delete_work; 297 wait_queue_head_t state_wq; 298 299 struct nvme_subsystem *subsys; 300 struct list_head subsys_entry; 301 302 struct opal_dev *opal_dev; 303 304 char name[12]; 305 u16 cntlid; 306 307 u16 mtfa; 308 u32 ctrl_config; 309 u32 queue_count; 310 311 u64 cap; 312 u32 max_hw_sectors; 313 u32 max_segments; 314 u32 max_integrity_segments; 315 u32 max_zeroes_sectors; 316 #ifdef CONFIG_BLK_DEV_ZONED 317 u32 max_zone_append; 318 #endif 319 u16 crdt[3]; 320 u16 oncs; 321 u8 dmrl; 322 u32 dmrsl; 323 u16 oacs; 324 u16 sqsize; 325 u32 max_namespaces; 326 atomic_t abort_limit; 327 u8 vwc; 328 u32 vs; 329 u32 sgls; 330 u16 kas; 331 u8 npss; 332 u8 apsta; 333 u16 wctemp; 334 u16 cctemp; 335 u32 oaes; 336 u32 aen_result; 337 u32 ctratt; 338 unsigned int shutdown_timeout; 339 unsigned int kato; 340 bool subsystem; 341 unsigned long quirks; 342 struct nvme_id_power_state psd[32]; 343 struct nvme_effects_log *effects; 344 struct xarray cels; 345 struct work_struct scan_work; 346 struct work_struct async_event_work; 347 struct delayed_work ka_work; 348 struct delayed_work failfast_work; 349 struct nvme_command ka_cmd; 350 unsigned long ka_last_check_time; 351 struct work_struct fw_act_work; 352 unsigned long events; 353 354 #ifdef CONFIG_NVME_MULTIPATH 355 /* asymmetric namespace access: */ 356 u8 anacap; 357 u8 anatt; 358 u32 anagrpmax; 359 u32 nanagrpid; 360 struct mutex ana_lock; 361 struct nvme_ana_rsp_hdr *ana_log_buf; 362 size_t ana_log_size; 363 struct timer_list anatt_timer; 364 struct work_struct ana_work; 365 atomic_t nr_active; 366 #endif 367 368 #ifdef CONFIG_NVME_HOST_AUTH 369 struct work_struct dhchap_auth_work; 370 struct mutex dhchap_auth_mutex; 371 struct nvme_dhchap_queue_context *dhchap_ctxs; 372 struct nvme_dhchap_key *host_key; 373 struct nvme_dhchap_key *ctrl_key; 374 u16 transaction; 375 #endif 376 struct key *tls_key; 377 378 /* Power saving configuration */ 379 u64 ps_max_latency_us; 380 bool apst_enabled; 381 382 /* PCIe only: */ 383 u16 hmmaxd; 384 u32 hmpre; 385 u32 hmmin; 386 u32 hmminds; 387 388 /* Fabrics only */ 389 u32 ioccsz; 390 u32 iorcsz; 391 u16 icdoff; 392 u16 maxcmd; 393 int nr_reconnects; 394 unsigned long flags; 395 struct nvmf_ctrl_options *opts; 396 397 struct page *discard_page; 398 unsigned long discard_page_busy; 399 400 struct nvme_fault_inject fault_inject; 401 402 enum nvme_ctrl_type cntrltype; 403 enum nvme_dctype dctype; 404 }; 405 406 static inline enum nvme_ctrl_state nvme_ctrl_state(struct nvme_ctrl *ctrl) 407 { 408 return READ_ONCE(ctrl->state); 409 } 410 411 enum nvme_iopolicy { 412 NVME_IOPOLICY_NUMA, 413 NVME_IOPOLICY_RR, 414 NVME_IOPOLICY_QD, 415 }; 416 417 struct nvme_subsystem { 418 int instance; 419 struct device dev; 420 /* 421 * Because we unregister the device on the last put we need 422 * a separate refcount. 423 */ 424 struct kref ref; 425 struct list_head entry; 426 struct mutex lock; 427 struct list_head ctrls; 428 struct list_head nsheads; 429 char subnqn[NVMF_NQN_SIZE]; 430 char serial[20]; 431 char model[40]; 432 char firmware_rev[8]; 433 u8 cmic; 434 enum nvme_subsys_type subtype; 435 u16 vendor_id; 436 u16 awupf; /* 0's based awupf value. */ 437 struct ida ns_ida; 438 #ifdef CONFIG_NVME_MULTIPATH 439 enum nvme_iopolicy iopolicy; 440 #endif 441 }; 442 443 /* 444 * Container structure for uniqueue namespace identifiers. 445 */ 446 struct nvme_ns_ids { 447 u8 eui64[8]; 448 u8 nguid[16]; 449 uuid_t uuid; 450 u8 csi; 451 }; 452 453 /* 454 * Anchor structure for namespaces. There is one for each namespace in a 455 * NVMe subsystem that any of our controllers can see, and the namespace 456 * structure for each controller is chained of it. For private namespaces 457 * there is a 1:1 relation to our namespace structures, that is ->list 458 * only ever has a single entry for private namespaces. 459 */ 460 struct nvme_ns_head { 461 struct list_head list; 462 struct srcu_struct srcu; 463 struct nvme_subsystem *subsys; 464 struct nvme_ns_ids ids; 465 u8 lba_shift; 466 u16 ms; 467 u16 pi_size; 468 u8 pi_type; 469 u8 guard_type; 470 struct list_head entry; 471 struct kref ref; 472 bool shared; 473 bool passthru_err_log_enabled; 474 struct nvme_effects_log *effects; 475 u64 nuse; 476 unsigned ns_id; 477 int instance; 478 #ifdef CONFIG_BLK_DEV_ZONED 479 u64 zsze; 480 #endif 481 unsigned long features; 482 483 struct ratelimit_state rs_nuse; 484 485 struct cdev cdev; 486 struct device cdev_device; 487 488 struct gendisk *disk; 489 #ifdef CONFIG_NVME_MULTIPATH 490 struct bio_list requeue_list; 491 spinlock_t requeue_lock; 492 struct work_struct requeue_work; 493 struct mutex lock; 494 unsigned long flags; 495 #define NVME_NSHEAD_DISK_LIVE 0 496 struct nvme_ns __rcu *current_path[]; 497 #endif 498 }; 499 500 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head) 501 { 502 return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk; 503 } 504 505 enum nvme_ns_features { 506 NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */ 507 NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */ 508 NVME_NS_DEAC = 1 << 2, /* DEAC bit in Write Zeores supported */ 509 }; 510 511 struct nvme_ns { 512 struct list_head list; 513 514 struct nvme_ctrl *ctrl; 515 struct request_queue *queue; 516 struct gendisk *disk; 517 #ifdef CONFIG_NVME_MULTIPATH 518 enum nvme_ana_state ana_state; 519 u32 ana_grpid; 520 #endif 521 struct list_head siblings; 522 struct kref kref; 523 struct nvme_ns_head *head; 524 525 unsigned long flags; 526 #define NVME_NS_REMOVING 0 527 #define NVME_NS_ANA_PENDING 2 528 #define NVME_NS_FORCE_RO 3 529 #define NVME_NS_READY 4 530 531 struct cdev cdev; 532 struct device cdev_device; 533 534 struct nvme_fault_inject fault_inject; 535 }; 536 537 /* NVMe ns supports metadata actions by the controller (generate/strip) */ 538 static inline bool nvme_ns_has_pi(struct nvme_ns_head *head) 539 { 540 return head->pi_type && head->ms == head->pi_size; 541 } 542 543 struct nvme_ctrl_ops { 544 const char *name; 545 struct module *module; 546 unsigned int flags; 547 #define NVME_F_FABRICS (1 << 0) 548 #define NVME_F_METADATA_SUPPORTED (1 << 1) 549 #define NVME_F_BLOCKING (1 << 2) 550 551 const struct attribute_group **dev_attr_groups; 552 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); 553 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); 554 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); 555 void (*free_ctrl)(struct nvme_ctrl *ctrl); 556 void (*submit_async_event)(struct nvme_ctrl *ctrl); 557 int (*subsystem_reset)(struct nvme_ctrl *ctrl); 558 void (*delete_ctrl)(struct nvme_ctrl *ctrl); 559 void (*stop_ctrl)(struct nvme_ctrl *ctrl); 560 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size); 561 void (*print_device_info)(struct nvme_ctrl *ctrl); 562 bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl); 563 }; 564 565 /* 566 * nvme command_id is constructed as such: 567 * | xxxx | xxxxxxxxxxxx | 568 * gen request tag 569 */ 570 #define nvme_genctr_mask(gen) (gen & 0xf) 571 #define nvme_cid_install_genctr(gen) (nvme_genctr_mask(gen) << 12) 572 #define nvme_genctr_from_cid(cid) ((cid & 0xf000) >> 12) 573 #define nvme_tag_from_cid(cid) (cid & 0xfff) 574 575 static inline u16 nvme_cid(struct request *rq) 576 { 577 return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag; 578 } 579 580 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags, 581 u16 command_id) 582 { 583 u8 genctr = nvme_genctr_from_cid(command_id); 584 u16 tag = nvme_tag_from_cid(command_id); 585 struct request *rq; 586 587 rq = blk_mq_tag_to_rq(tags, tag); 588 if (unlikely(!rq)) { 589 pr_err("could not locate request for tag %#x\n", 590 tag); 591 return NULL; 592 } 593 if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) { 594 dev_err(nvme_req(rq)->ctrl->device, 595 "request %#x genctr mismatch (got %#x expected %#x)\n", 596 tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr)); 597 return NULL; 598 } 599 return rq; 600 } 601 602 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags, 603 u16 command_id) 604 { 605 return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id)); 606 } 607 608 /* 609 * Return the length of the string without the space padding 610 */ 611 static inline int nvme_strlen(char *s, int len) 612 { 613 while (s[len - 1] == ' ') 614 len--; 615 return len; 616 } 617 618 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl) 619 { 620 struct nvme_subsystem *subsys = ctrl->subsys; 621 622 if (ctrl->ops->print_device_info) { 623 ctrl->ops->print_device_info(ctrl); 624 return; 625 } 626 627 dev_err(ctrl->device, 628 "VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id, 629 nvme_strlen(subsys->model, sizeof(subsys->model)), 630 subsys->model, nvme_strlen(subsys->firmware_rev, 631 sizeof(subsys->firmware_rev)), 632 subsys->firmware_rev); 633 } 634 635 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS 636 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 637 const char *dev_name); 638 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject); 639 void nvme_should_fail(struct request *req); 640 #else 641 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj, 642 const char *dev_name) 643 { 644 } 645 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj) 646 { 647 } 648 static inline void nvme_should_fail(struct request *req) {} 649 #endif 650 651 bool nvme_wait_reset(struct nvme_ctrl *ctrl); 652 int nvme_try_sched_reset(struct nvme_ctrl *ctrl); 653 654 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) 655 { 656 if (!ctrl->subsystem || !ctrl->ops->subsystem_reset) 657 return -ENOTTY; 658 return ctrl->ops->subsystem_reset(ctrl); 659 } 660 661 /* 662 * Convert a 512B sector number to a device logical block number. 663 */ 664 static inline u64 nvme_sect_to_lba(struct nvme_ns_head *head, sector_t sector) 665 { 666 return sector >> (head->lba_shift - SECTOR_SHIFT); 667 } 668 669 /* 670 * Convert a device logical block number to a 512B sector number. 671 */ 672 static inline sector_t nvme_lba_to_sect(struct nvme_ns_head *head, u64 lba) 673 { 674 return lba << (head->lba_shift - SECTOR_SHIFT); 675 } 676 677 /* 678 * Convert byte length to nvme's 0-based num dwords 679 */ 680 static inline u32 nvme_bytes_to_numd(size_t len) 681 { 682 return (len >> 2) - 1; 683 } 684 685 static inline bool nvme_is_ana_error(u16 status) 686 { 687 switch (status & NVME_SCT_SC_MASK) { 688 case NVME_SC_ANA_TRANSITION: 689 case NVME_SC_ANA_INACCESSIBLE: 690 case NVME_SC_ANA_PERSISTENT_LOSS: 691 return true; 692 default: 693 return false; 694 } 695 } 696 697 static inline bool nvme_is_path_error(u16 status) 698 { 699 /* check for a status code type of 'path related status' */ 700 return (status & NVME_SCT_MASK) == NVME_SCT_PATH; 701 } 702 703 /* 704 * Fill in the status and result information from the CQE, and then figure out 705 * if blk-mq will need to use IPI magic to complete the request, and if yes do 706 * so. If not let the caller complete the request without an indirect function 707 * call. 708 */ 709 static inline bool nvme_try_complete_req(struct request *req, __le16 status, 710 union nvme_result result) 711 { 712 struct nvme_request *rq = nvme_req(req); 713 struct nvme_ctrl *ctrl = rq->ctrl; 714 715 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 716 rq->genctr++; 717 718 rq->status = le16_to_cpu(status) >> 1; 719 rq->result = result; 720 /* inject error when permitted by fault injection framework */ 721 nvme_should_fail(req); 722 if (unlikely(blk_should_fake_timeout(req->q))) 723 return true; 724 return blk_mq_complete_request_remote(req); 725 } 726 727 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl) 728 { 729 get_device(ctrl->device); 730 } 731 732 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl) 733 { 734 put_device(ctrl->device); 735 } 736 737 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id) 738 { 739 return !qid && 740 nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH; 741 } 742 743 /* 744 * Returns true for sink states that can't ever transition back to live. 745 */ 746 static inline bool nvme_state_terminal(struct nvme_ctrl *ctrl) 747 { 748 switch (nvme_ctrl_state(ctrl)) { 749 case NVME_CTRL_NEW: 750 case NVME_CTRL_LIVE: 751 case NVME_CTRL_RESETTING: 752 case NVME_CTRL_CONNECTING: 753 return false; 754 case NVME_CTRL_DELETING: 755 case NVME_CTRL_DELETING_NOIO: 756 case NVME_CTRL_DEAD: 757 return true; 758 default: 759 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 760 return true; 761 } 762 } 763 764 void nvme_end_req(struct request *req); 765 void nvme_complete_rq(struct request *req); 766 void nvme_complete_batch_req(struct request *req); 767 768 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob, 769 void (*fn)(struct request *rq)) 770 { 771 struct request *req; 772 773 rq_list_for_each(&iob->req_list, req) { 774 fn(req); 775 nvme_complete_batch_req(req); 776 } 777 blk_mq_end_request_batch(iob); 778 } 779 780 blk_status_t nvme_host_path_error(struct request *req); 781 bool nvme_cancel_request(struct request *req, void *data); 782 void nvme_cancel_tagset(struct nvme_ctrl *ctrl); 783 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl); 784 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 785 enum nvme_ctrl_state new_state); 786 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown); 787 int nvme_enable_ctrl(struct nvme_ctrl *ctrl); 788 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 789 const struct nvme_ctrl_ops *ops, unsigned long quirks); 790 int nvme_add_ctrl(struct nvme_ctrl *ctrl); 791 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); 792 void nvme_start_ctrl(struct nvme_ctrl *ctrl); 793 void nvme_stop_ctrl(struct nvme_ctrl *ctrl); 794 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended); 795 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 796 const struct blk_mq_ops *ops, unsigned int cmd_size); 797 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl); 798 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 799 const struct blk_mq_ops *ops, unsigned int nr_maps, 800 unsigned int cmd_size); 801 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl); 802 803 void nvme_remove_namespaces(struct nvme_ctrl *ctrl); 804 805 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 806 volatile union nvme_result *res); 807 808 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl); 809 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl); 810 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl); 811 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl); 812 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl); 813 void nvme_sync_queues(struct nvme_ctrl *ctrl); 814 void nvme_sync_io_queues(struct nvme_ctrl *ctrl); 815 void nvme_unfreeze(struct nvme_ctrl *ctrl); 816 void nvme_wait_freeze(struct nvme_ctrl *ctrl); 817 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout); 818 void nvme_start_freeze(struct nvme_ctrl *ctrl); 819 820 static inline enum req_op nvme_req_op(struct nvme_command *cmd) 821 { 822 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 823 } 824 825 #define NVME_QID_ANY -1 826 void nvme_init_request(struct request *req, struct nvme_command *cmd); 827 void nvme_cleanup_cmd(struct request *req); 828 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req); 829 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 830 struct request *req); 831 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 832 bool queue_live, enum nvme_ctrl_state state); 833 834 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 835 bool queue_live) 836 { 837 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 838 839 if (likely(state == NVME_CTRL_LIVE)) 840 return true; 841 if (ctrl->ops->flags & NVME_F_FABRICS && state == NVME_CTRL_DELETING) 842 return queue_live; 843 return __nvme_check_ready(ctrl, rq, queue_live, state); 844 } 845 846 /* 847 * NSID shall be unique for all shared namespaces, or if at least one of the 848 * following conditions is met: 849 * 1. Namespace Management is supported by the controller 850 * 2. ANA is supported by the controller 851 * 3. NVM Set are supported by the controller 852 * 853 * In other case, private namespace are not required to report a unique NSID. 854 */ 855 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl, 856 struct nvme_ns_head *head) 857 { 858 return head->shared || 859 (ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) || 860 (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) || 861 (ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS); 862 } 863 864 /* 865 * Flags for __nvme_submit_sync_cmd() 866 */ 867 typedef __u32 __bitwise nvme_submit_flags_t; 868 869 enum { 870 /* Insert request at the head of the queue */ 871 NVME_SUBMIT_AT_HEAD = (__force nvme_submit_flags_t)(1 << 0), 872 /* Set BLK_MQ_REQ_NOWAIT when allocating request */ 873 NVME_SUBMIT_NOWAIT = (__force nvme_submit_flags_t)(1 << 1), 874 /* Set BLK_MQ_REQ_RESERVED when allocating request */ 875 NVME_SUBMIT_RESERVED = (__force nvme_submit_flags_t)(1 << 2), 876 /* Retry command when NVME_STATUS_DNR is not set in the result */ 877 NVME_SUBMIT_RETRY = (__force nvme_submit_flags_t)(1 << 3), 878 }; 879 880 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 881 void *buf, unsigned bufflen); 882 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 883 union nvme_result *result, void *buffer, unsigned bufflen, 884 int qid, nvme_submit_flags_t flags); 885 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 886 unsigned int dword11, void *buffer, size_t buflen, 887 u32 *result); 888 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 889 unsigned int dword11, void *buffer, size_t buflen, 890 u32 *result); 891 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); 892 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); 893 int nvme_reset_ctrl(struct nvme_ctrl *ctrl); 894 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); 895 int nvme_delete_ctrl(struct nvme_ctrl *ctrl); 896 void nvme_queue_scan(struct nvme_ctrl *ctrl); 897 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 898 void *log, size_t size, u64 offset); 899 bool nvme_tryget_ns_head(struct nvme_ns_head *head); 900 void nvme_put_ns_head(struct nvme_ns_head *head); 901 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 902 const struct file_operations *fops, struct module *owner); 903 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device); 904 int nvme_ioctl(struct block_device *bdev, blk_mode_t mode, 905 unsigned int cmd, unsigned long arg); 906 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 907 int nvme_ns_head_ioctl(struct block_device *bdev, blk_mode_t mode, 908 unsigned int cmd, unsigned long arg); 909 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd, 910 unsigned long arg); 911 long nvme_dev_ioctl(struct file *file, unsigned int cmd, 912 unsigned long arg); 913 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd, 914 struct io_comp_batch *iob, unsigned int poll_flags); 915 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd, 916 unsigned int issue_flags); 917 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd, 918 unsigned int issue_flags); 919 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 920 struct nvme_id_ns **id); 921 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo); 922 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags); 923 924 extern const struct attribute_group *nvme_ns_attr_groups[]; 925 extern const struct pr_ops nvme_pr_ops; 926 extern const struct block_device_operations nvme_ns_head_ops; 927 extern const struct attribute_group nvme_dev_attrs_group; 928 extern const struct attribute_group *nvme_subsys_attrs_groups[]; 929 extern const struct attribute_group *nvme_dev_attr_groups[]; 930 extern const struct block_device_operations nvme_bdev_ops; 931 932 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl); 933 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head); 934 #ifdef CONFIG_NVME_MULTIPATH 935 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 936 { 937 return ctrl->ana_log_buf != NULL; 938 } 939 940 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys); 941 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys); 942 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys); 943 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys); 944 void nvme_failover_req(struct request *req); 945 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl); 946 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head); 947 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid); 948 void nvme_mpath_remove_disk(struct nvme_ns_head *head); 949 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id); 950 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl); 951 void nvme_mpath_update(struct nvme_ctrl *ctrl); 952 void nvme_mpath_uninit(struct nvme_ctrl *ctrl); 953 void nvme_mpath_stop(struct nvme_ctrl *ctrl); 954 bool nvme_mpath_clear_current_path(struct nvme_ns *ns); 955 void nvme_mpath_revalidate_paths(struct nvme_ns *ns); 956 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl); 957 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head); 958 void nvme_mpath_start_request(struct request *rq); 959 void nvme_mpath_end_request(struct request *rq); 960 961 static inline void nvme_trace_bio_complete(struct request *req) 962 { 963 struct nvme_ns *ns = req->q->queuedata; 964 965 if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio) 966 trace_block_bio_complete(ns->head->disk->queue, req->bio); 967 } 968 969 extern bool multipath; 970 extern struct device_attribute dev_attr_ana_grpid; 971 extern struct device_attribute dev_attr_ana_state; 972 extern struct device_attribute subsys_attr_iopolicy; 973 974 static inline bool nvme_disk_is_ns_head(struct gendisk *disk) 975 { 976 return disk->fops == &nvme_ns_head_ops; 977 } 978 #else 979 #define multipath false 980 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl) 981 { 982 return false; 983 } 984 static inline void nvme_failover_req(struct request *req) 985 { 986 } 987 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl) 988 { 989 } 990 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl, 991 struct nvme_ns_head *head) 992 { 993 return 0; 994 } 995 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid) 996 { 997 } 998 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head) 999 { 1000 } 1001 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns) 1002 { 1003 return false; 1004 } 1005 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns) 1006 { 1007 } 1008 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl) 1009 { 1010 } 1011 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head) 1012 { 1013 } 1014 static inline void nvme_trace_bio_complete(struct request *req) 1015 { 1016 } 1017 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl) 1018 { 1019 } 1020 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, 1021 struct nvme_id_ctrl *id) 1022 { 1023 if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) 1024 dev_warn(ctrl->device, 1025 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n"); 1026 return 0; 1027 } 1028 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl) 1029 { 1030 } 1031 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl) 1032 { 1033 } 1034 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl) 1035 { 1036 } 1037 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys) 1038 { 1039 } 1040 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) 1041 { 1042 } 1043 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys) 1044 { 1045 } 1046 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys) 1047 { 1048 } 1049 static inline void nvme_mpath_start_request(struct request *rq) 1050 { 1051 } 1052 static inline void nvme_mpath_end_request(struct request *rq) 1053 { 1054 } 1055 static inline bool nvme_disk_is_ns_head(struct gendisk *disk) 1056 { 1057 return false; 1058 } 1059 #endif /* CONFIG_NVME_MULTIPATH */ 1060 1061 int nvme_ns_get_unique_id(struct nvme_ns *ns, u8 id[16], 1062 enum blk_unique_id type); 1063 1064 struct nvme_zone_info { 1065 u64 zone_size; 1066 unsigned int max_open_zones; 1067 unsigned int max_active_zones; 1068 }; 1069 1070 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector, 1071 unsigned int nr_zones, report_zones_cb cb, void *data); 1072 int nvme_query_zone_info(struct nvme_ns *ns, unsigned lbaf, 1073 struct nvme_zone_info *zi); 1074 void nvme_update_zone_info(struct nvme_ns *ns, struct queue_limits *lim, 1075 struct nvme_zone_info *zi); 1076 #ifdef CONFIG_BLK_DEV_ZONED 1077 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req, 1078 struct nvme_command *cmnd, 1079 enum nvme_zone_mgmt_action action); 1080 #else 1081 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, 1082 struct request *req, struct nvme_command *cmnd, 1083 enum nvme_zone_mgmt_action action) 1084 { 1085 return BLK_STS_NOTSUPP; 1086 } 1087 #endif 1088 1089 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev) 1090 { 1091 struct gendisk *disk = dev_to_disk(dev); 1092 1093 WARN_ON(nvme_disk_is_ns_head(disk)); 1094 return disk->private_data; 1095 } 1096 1097 #ifdef CONFIG_NVME_HWMON 1098 int nvme_hwmon_init(struct nvme_ctrl *ctrl); 1099 void nvme_hwmon_exit(struct nvme_ctrl *ctrl); 1100 #else 1101 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl) 1102 { 1103 return 0; 1104 } 1105 1106 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl) 1107 { 1108 } 1109 #endif 1110 1111 static inline void nvme_start_request(struct request *rq) 1112 { 1113 if (rq->cmd_flags & REQ_NVME_MPATH) 1114 nvme_mpath_start_request(rq); 1115 blk_mq_start_request(rq); 1116 } 1117 1118 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl) 1119 { 1120 return ctrl->sgls & ((1 << 0) | (1 << 1)); 1121 } 1122 1123 #ifdef CONFIG_NVME_HOST_AUTH 1124 int __init nvme_init_auth(void); 1125 void __exit nvme_exit_auth(void); 1126 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl); 1127 void nvme_auth_stop(struct nvme_ctrl *ctrl); 1128 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid); 1129 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid); 1130 void nvme_auth_free(struct nvme_ctrl *ctrl); 1131 #else 1132 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl) 1133 { 1134 return 0; 1135 } 1136 static inline int __init nvme_init_auth(void) 1137 { 1138 return 0; 1139 } 1140 static inline void __exit nvme_exit_auth(void) 1141 { 1142 } 1143 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {}; 1144 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid) 1145 { 1146 return -EPROTONOSUPPORT; 1147 } 1148 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid) 1149 { 1150 return -EPROTONOSUPPORT; 1151 } 1152 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {}; 1153 #endif 1154 1155 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1156 u8 opcode); 1157 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode); 1158 int nvme_execute_rq(struct request *rq, bool at_head); 1159 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1160 struct nvme_command *cmd, int status); 1161 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file); 1162 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid); 1163 bool nvme_get_ns(struct nvme_ns *ns); 1164 void nvme_put_ns(struct nvme_ns *ns); 1165 1166 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl) 1167 { 1168 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 1169 } 1170 1171 #ifdef CONFIG_NVME_VERBOSE_ERRORS 1172 const char *nvme_get_error_status_str(u16 status); 1173 const char *nvme_get_opcode_str(u8 opcode); 1174 const char *nvme_get_admin_opcode_str(u8 opcode); 1175 const char *nvme_get_fabrics_opcode_str(u8 opcode); 1176 #else /* CONFIG_NVME_VERBOSE_ERRORS */ 1177 static inline const char *nvme_get_error_status_str(u16 status) 1178 { 1179 return "I/O Error"; 1180 } 1181 static inline const char *nvme_get_opcode_str(u8 opcode) 1182 { 1183 return "I/O Cmd"; 1184 } 1185 static inline const char *nvme_get_admin_opcode_str(u8 opcode) 1186 { 1187 return "Admin Cmd"; 1188 } 1189 1190 static inline const char *nvme_get_fabrics_opcode_str(u8 opcode) 1191 { 1192 return "Fabrics Cmd"; 1193 } 1194 #endif /* CONFIG_NVME_VERBOSE_ERRORS */ 1195 1196 static inline const char *nvme_opcode_str(int qid, u8 opcode) 1197 { 1198 return qid ? nvme_get_opcode_str(opcode) : 1199 nvme_get_admin_opcode_str(opcode); 1200 } 1201 1202 static inline const char *nvme_fabrics_opcode_str( 1203 int qid, const struct nvme_command *cmd) 1204 { 1205 if (nvme_is_fabrics(cmd)) 1206 return nvme_get_fabrics_opcode_str(cmd->fabrics.fctype); 1207 1208 return nvme_opcode_str(qid, cmd->common.opcode); 1209 } 1210 #endif /* _NVME_H */ 1211