xref: /linux/drivers/nvme/host/core.c (revision cfbbd4859882a5469f6f4945937a074ee78c4b46)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * NVM Express device driver
4  * Copyright (c) 2011-2014, Intel Corporation.
5  */
6 
7 #include <linux/async.h>
8 #include <linux/blkdev.h>
9 #include <linux/blk-mq.h>
10 #include <linux/blk-integrity.h>
11 #include <linux/compat.h>
12 #include <linux/delay.h>
13 #include <linux/errno.h>
14 #include <linux/hdreg.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/backing-dev.h>
18 #include <linux/slab.h>
19 #include <linux/types.h>
20 #include <linux/pr.h>
21 #include <linux/ptrace.h>
22 #include <linux/nvme_ioctl.h>
23 #include <linux/pm_qos.h>
24 #include <linux/ratelimit.h>
25 #include <linux/unaligned.h>
26 
27 #include "nvme.h"
28 #include "fabrics.h"
29 #include <linux/nvme-auth.h>
30 
31 #define CREATE_TRACE_POINTS
32 #include "trace.h"
33 
34 #define NVME_MINORS		(1U << MINORBITS)
35 
36 struct nvme_ns_info {
37 	struct nvme_ns_ids ids;
38 	u32 nsid;
39 	__le32 anagrpid;
40 	u8 pi_offset;
41 	bool is_shared;
42 	bool is_readonly;
43 	bool is_ready;
44 	bool is_removed;
45 };
46 
47 unsigned int admin_timeout = 60;
48 module_param(admin_timeout, uint, 0644);
49 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
50 EXPORT_SYMBOL_GPL(admin_timeout);
51 
52 unsigned int nvme_io_timeout = 30;
53 module_param_named(io_timeout, nvme_io_timeout, uint, 0644);
54 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
55 EXPORT_SYMBOL_GPL(nvme_io_timeout);
56 
57 static unsigned char shutdown_timeout = 5;
58 module_param(shutdown_timeout, byte, 0644);
59 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
60 
61 static u8 nvme_max_retries = 5;
62 module_param_named(max_retries, nvme_max_retries, byte, 0644);
63 MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
64 
65 static unsigned long default_ps_max_latency_us = 100000;
66 module_param(default_ps_max_latency_us, ulong, 0644);
67 MODULE_PARM_DESC(default_ps_max_latency_us,
68 		 "max power saving latency for new devices; use PM QOS to change per device");
69 
70 static bool force_apst;
71 module_param(force_apst, bool, 0644);
72 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
73 
74 static unsigned long apst_primary_timeout_ms = 100;
75 module_param(apst_primary_timeout_ms, ulong, 0644);
76 MODULE_PARM_DESC(apst_primary_timeout_ms,
77 	"primary APST timeout in ms");
78 
79 static unsigned long apst_secondary_timeout_ms = 2000;
80 module_param(apst_secondary_timeout_ms, ulong, 0644);
81 MODULE_PARM_DESC(apst_secondary_timeout_ms,
82 	"secondary APST timeout in ms");
83 
84 static unsigned long apst_primary_latency_tol_us = 15000;
85 module_param(apst_primary_latency_tol_us, ulong, 0644);
86 MODULE_PARM_DESC(apst_primary_latency_tol_us,
87 	"primary APST latency tolerance in us");
88 
89 static unsigned long apst_secondary_latency_tol_us = 100000;
90 module_param(apst_secondary_latency_tol_us, ulong, 0644);
91 MODULE_PARM_DESC(apst_secondary_latency_tol_us,
92 	"secondary APST latency tolerance in us");
93 
94 /*
95  * nvme_wq - hosts nvme related works that are not reset or delete
96  * nvme_reset_wq - hosts nvme reset works
97  * nvme_delete_wq - hosts nvme delete works
98  *
99  * nvme_wq will host works such as scan, aen handling, fw activation,
100  * keep-alive, periodic reconnects etc. nvme_reset_wq
101  * runs reset works which also flush works hosted on nvme_wq for
102  * serialization purposes. nvme_delete_wq host controller deletion
103  * works which flush reset works for serialization.
104  */
105 struct workqueue_struct *nvme_wq;
106 EXPORT_SYMBOL_GPL(nvme_wq);
107 
108 struct workqueue_struct *nvme_reset_wq;
109 EXPORT_SYMBOL_GPL(nvme_reset_wq);
110 
111 struct workqueue_struct *nvme_delete_wq;
112 EXPORT_SYMBOL_GPL(nvme_delete_wq);
113 
114 static LIST_HEAD(nvme_subsystems);
115 DEFINE_MUTEX(nvme_subsystems_lock);
116 
117 static DEFINE_IDA(nvme_instance_ida);
118 static dev_t nvme_ctrl_base_chr_devt;
119 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env);
120 static const struct class nvme_class = {
121 	.name = "nvme",
122 	.dev_uevent = nvme_class_uevent,
123 };
124 
125 static const struct class nvme_subsys_class = {
126 	.name = "nvme-subsystem",
127 };
128 
129 static DEFINE_IDA(nvme_ns_chr_minor_ida);
130 static dev_t nvme_ns_chr_devt;
131 static const struct class nvme_ns_chr_class = {
132 	.name = "nvme-generic",
133 };
134 
135 static void nvme_put_subsystem(struct nvme_subsystem *subsys);
136 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
137 					   unsigned nsid);
138 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
139 				   struct nvme_command *cmd);
140 
141 void nvme_queue_scan(struct nvme_ctrl *ctrl)
142 {
143 	/*
144 	 * Only new queue scan work when admin and IO queues are both alive
145 	 */
146 	if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset)
147 		queue_work(nvme_wq, &ctrl->scan_work);
148 }
149 
150 /*
151  * Use this function to proceed with scheduling reset_work for a controller
152  * that had previously been set to the resetting state. This is intended for
153  * code paths that can't be interrupted by other reset attempts. A hot removal
154  * may prevent this from succeeding.
155  */
156 int nvme_try_sched_reset(struct nvme_ctrl *ctrl)
157 {
158 	if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING)
159 		return -EBUSY;
160 	if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
161 		return -EBUSY;
162 	return 0;
163 }
164 EXPORT_SYMBOL_GPL(nvme_try_sched_reset);
165 
166 static void nvme_failfast_work(struct work_struct *work)
167 {
168 	struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
169 			struct nvme_ctrl, failfast_work);
170 
171 	if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING)
172 		return;
173 
174 	set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
175 	dev_info(ctrl->device, "failfast expired\n");
176 	nvme_kick_requeue_lists(ctrl);
177 }
178 
179 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl)
180 {
181 	if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1)
182 		return;
183 
184 	schedule_delayed_work(&ctrl->failfast_work,
185 			      ctrl->opts->fast_io_fail_tmo * HZ);
186 }
187 
188 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl)
189 {
190 	if (!ctrl->opts)
191 		return;
192 
193 	cancel_delayed_work_sync(&ctrl->failfast_work);
194 	clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
195 }
196 
197 
198 int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
199 {
200 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
201 		return -EBUSY;
202 	if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
203 		return -EBUSY;
204 	return 0;
205 }
206 EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
207 
208 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
209 {
210 	int ret;
211 
212 	ret = nvme_reset_ctrl(ctrl);
213 	if (!ret) {
214 		flush_work(&ctrl->reset_work);
215 		if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE)
216 			ret = -ENETRESET;
217 	}
218 
219 	return ret;
220 }
221 
222 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl)
223 {
224 	dev_info(ctrl->device,
225 		 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl));
226 
227 	flush_work(&ctrl->reset_work);
228 	nvme_stop_ctrl(ctrl);
229 	nvme_remove_namespaces(ctrl);
230 	ctrl->ops->delete_ctrl(ctrl);
231 	nvme_uninit_ctrl(ctrl);
232 }
233 
234 static void nvme_delete_ctrl_work(struct work_struct *work)
235 {
236 	struct nvme_ctrl *ctrl =
237 		container_of(work, struct nvme_ctrl, delete_work);
238 
239 	nvme_do_delete_ctrl(ctrl);
240 }
241 
242 int nvme_delete_ctrl(struct nvme_ctrl *ctrl)
243 {
244 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
245 		return -EBUSY;
246 	if (!queue_work(nvme_delete_wq, &ctrl->delete_work))
247 		return -EBUSY;
248 	return 0;
249 }
250 EXPORT_SYMBOL_GPL(nvme_delete_ctrl);
251 
252 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl)
253 {
254 	/*
255 	 * Keep a reference until nvme_do_delete_ctrl() complete,
256 	 * since ->delete_ctrl can free the controller.
257 	 */
258 	nvme_get_ctrl(ctrl);
259 	if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
260 		nvme_do_delete_ctrl(ctrl);
261 	nvme_put_ctrl(ctrl);
262 }
263 
264 static blk_status_t nvme_error_status(u16 status)
265 {
266 	switch (status & NVME_SCT_SC_MASK) {
267 	case NVME_SC_SUCCESS:
268 		return BLK_STS_OK;
269 	case NVME_SC_CAP_EXCEEDED:
270 		return BLK_STS_NOSPC;
271 	case NVME_SC_LBA_RANGE:
272 	case NVME_SC_CMD_INTERRUPTED:
273 	case NVME_SC_NS_NOT_READY:
274 		return BLK_STS_TARGET;
275 	case NVME_SC_BAD_ATTRIBUTES:
276 	case NVME_SC_ONCS_NOT_SUPPORTED:
277 	case NVME_SC_INVALID_OPCODE:
278 	case NVME_SC_INVALID_FIELD:
279 	case NVME_SC_INVALID_NS:
280 		return BLK_STS_NOTSUPP;
281 	case NVME_SC_WRITE_FAULT:
282 	case NVME_SC_READ_ERROR:
283 	case NVME_SC_UNWRITTEN_BLOCK:
284 	case NVME_SC_ACCESS_DENIED:
285 	case NVME_SC_READ_ONLY:
286 	case NVME_SC_COMPARE_FAILED:
287 		return BLK_STS_MEDIUM;
288 	case NVME_SC_GUARD_CHECK:
289 	case NVME_SC_APPTAG_CHECK:
290 	case NVME_SC_REFTAG_CHECK:
291 	case NVME_SC_INVALID_PI:
292 		return BLK_STS_PROTECTION;
293 	case NVME_SC_RESERVATION_CONFLICT:
294 		return BLK_STS_RESV_CONFLICT;
295 	case NVME_SC_HOST_PATH_ERROR:
296 		return BLK_STS_TRANSPORT;
297 	case NVME_SC_ZONE_TOO_MANY_ACTIVE:
298 		return BLK_STS_ZONE_ACTIVE_RESOURCE;
299 	case NVME_SC_ZONE_TOO_MANY_OPEN:
300 		return BLK_STS_ZONE_OPEN_RESOURCE;
301 	default:
302 		return BLK_STS_IOERR;
303 	}
304 }
305 
306 static void nvme_retry_req(struct request *req)
307 {
308 	unsigned long delay = 0;
309 	u16 crd;
310 
311 	/* The mask and shift result must be <= 3 */
312 	crd = (nvme_req(req)->status & NVME_STATUS_CRD) >> 11;
313 	if (crd)
314 		delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100;
315 
316 	nvme_req(req)->retries++;
317 	blk_mq_requeue_request(req, false);
318 	blk_mq_delay_kick_requeue_list(req->q, delay);
319 }
320 
321 static void nvme_log_error(struct request *req)
322 {
323 	struct nvme_ns *ns = req->q->queuedata;
324 	struct nvme_request *nr = nvme_req(req);
325 
326 	if (ns) {
327 		pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %u blocks, %s (sct 0x%x / sc 0x%x) %s%s\n",
328 		       ns->disk ? ns->disk->disk_name : "?",
329 		       nvme_get_opcode_str(nr->cmd->common.opcode),
330 		       nr->cmd->common.opcode,
331 		       nvme_sect_to_lba(ns->head, blk_rq_pos(req)),
332 		       blk_rq_bytes(req) >> ns->head->lba_shift,
333 		       nvme_get_error_status_str(nr->status),
334 		       NVME_SCT(nr->status),		/* Status Code Type */
335 		       nr->status & NVME_SC_MASK,	/* Status Code */
336 		       nr->status & NVME_STATUS_MORE ? "MORE " : "",
337 		       nr->status & NVME_STATUS_DNR  ? "DNR "  : "");
338 		return;
339 	}
340 
341 	pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n",
342 			   dev_name(nr->ctrl->device),
343 			   nvme_get_admin_opcode_str(nr->cmd->common.opcode),
344 			   nr->cmd->common.opcode,
345 			   nvme_get_error_status_str(nr->status),
346 			   NVME_SCT(nr->status),	/* Status Code Type */
347 			   nr->status & NVME_SC_MASK,	/* Status Code */
348 			   nr->status & NVME_STATUS_MORE ? "MORE " : "",
349 			   nr->status & NVME_STATUS_DNR  ? "DNR "  : "");
350 }
351 
352 static void nvme_log_err_passthru(struct request *req)
353 {
354 	struct nvme_ns *ns = req->q->queuedata;
355 	struct nvme_request *nr = nvme_req(req);
356 
357 	pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s"
358 		"cdw10=0x%x cdw11=0x%x cdw12=0x%x cdw13=0x%x cdw14=0x%x cdw15=0x%x\n",
359 		ns ? ns->disk->disk_name : dev_name(nr->ctrl->device),
360 		ns ? nvme_get_opcode_str(nr->cmd->common.opcode) :
361 		     nvme_get_admin_opcode_str(nr->cmd->common.opcode),
362 		nr->cmd->common.opcode,
363 		nvme_get_error_status_str(nr->status),
364 		NVME_SCT(nr->status),		/* Status Code Type */
365 		nr->status & NVME_SC_MASK,	/* Status Code */
366 		nr->status & NVME_STATUS_MORE ? "MORE " : "",
367 		nr->status & NVME_STATUS_DNR  ? "DNR "  : "",
368 		nr->cmd->common.cdw10,
369 		nr->cmd->common.cdw11,
370 		nr->cmd->common.cdw12,
371 		nr->cmd->common.cdw13,
372 		nr->cmd->common.cdw14,
373 		nr->cmd->common.cdw14);
374 }
375 
376 enum nvme_disposition {
377 	COMPLETE,
378 	RETRY,
379 	FAILOVER,
380 	AUTHENTICATE,
381 };
382 
383 static inline enum nvme_disposition nvme_decide_disposition(struct request *req)
384 {
385 	if (likely(nvme_req(req)->status == 0))
386 		return COMPLETE;
387 
388 	if (blk_noretry_request(req) ||
389 	    (nvme_req(req)->status & NVME_STATUS_DNR) ||
390 	    nvme_req(req)->retries >= nvme_max_retries)
391 		return COMPLETE;
392 
393 	if ((nvme_req(req)->status & NVME_SCT_SC_MASK) == NVME_SC_AUTH_REQUIRED)
394 		return AUTHENTICATE;
395 
396 	if (req->cmd_flags & REQ_NVME_MPATH) {
397 		if (nvme_is_path_error(nvme_req(req)->status) ||
398 		    blk_queue_dying(req->q))
399 			return FAILOVER;
400 	} else {
401 		if (blk_queue_dying(req->q))
402 			return COMPLETE;
403 	}
404 
405 	return RETRY;
406 }
407 
408 static inline void nvme_end_req_zoned(struct request *req)
409 {
410 	if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
411 	    req_op(req) == REQ_OP_ZONE_APPEND) {
412 		struct nvme_ns *ns = req->q->queuedata;
413 
414 		req->__sector = nvme_lba_to_sect(ns->head,
415 			le64_to_cpu(nvme_req(req)->result.u64));
416 	}
417 }
418 
419 static inline void __nvme_end_req(struct request *req)
420 {
421 	nvme_end_req_zoned(req);
422 	nvme_trace_bio_complete(req);
423 	if (req->cmd_flags & REQ_NVME_MPATH)
424 		nvme_mpath_end_request(req);
425 }
426 
427 void nvme_end_req(struct request *req)
428 {
429 	blk_status_t status = nvme_error_status(nvme_req(req)->status);
430 
431 	if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) {
432 		if (blk_rq_is_passthrough(req))
433 			nvme_log_err_passthru(req);
434 		else
435 			nvme_log_error(req);
436 	}
437 	__nvme_end_req(req);
438 	blk_mq_end_request(req, status);
439 }
440 
441 void nvme_complete_rq(struct request *req)
442 {
443 	struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
444 
445 	trace_nvme_complete_rq(req);
446 	nvme_cleanup_cmd(req);
447 
448 	/*
449 	 * Completions of long-running commands should not be able to
450 	 * defer sending of periodic keep alives, since the controller
451 	 * may have completed processing such commands a long time ago
452 	 * (arbitrarily close to command submission time).
453 	 * req->deadline - req->timeout is the command submission time
454 	 * in jiffies.
455 	 */
456 	if (ctrl->kas &&
457 	    req->deadline - req->timeout >= ctrl->ka_last_check_time)
458 		ctrl->comp_seen = true;
459 
460 	switch (nvme_decide_disposition(req)) {
461 	case COMPLETE:
462 		nvme_end_req(req);
463 		return;
464 	case RETRY:
465 		nvme_retry_req(req);
466 		return;
467 	case FAILOVER:
468 		nvme_failover_req(req);
469 		return;
470 	case AUTHENTICATE:
471 #ifdef CONFIG_NVME_HOST_AUTH
472 		queue_work(nvme_wq, &ctrl->dhchap_auth_work);
473 		nvme_retry_req(req);
474 #else
475 		nvme_end_req(req);
476 #endif
477 		return;
478 	}
479 }
480 EXPORT_SYMBOL_GPL(nvme_complete_rq);
481 
482 void nvme_complete_batch_req(struct request *req)
483 {
484 	trace_nvme_complete_rq(req);
485 	nvme_cleanup_cmd(req);
486 	__nvme_end_req(req);
487 }
488 EXPORT_SYMBOL_GPL(nvme_complete_batch_req);
489 
490 /*
491  * Called to unwind from ->queue_rq on a failed command submission so that the
492  * multipathing code gets called to potentially failover to another path.
493  * The caller needs to unwind all transport specific resource allocations and
494  * must return propagate the return value.
495  */
496 blk_status_t nvme_host_path_error(struct request *req)
497 {
498 	nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR;
499 	blk_mq_set_request_complete(req);
500 	nvme_complete_rq(req);
501 	return BLK_STS_OK;
502 }
503 EXPORT_SYMBOL_GPL(nvme_host_path_error);
504 
505 bool nvme_cancel_request(struct request *req, void *data)
506 {
507 	dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
508 				"Cancelling I/O %d", req->tag);
509 
510 	/* don't abort one completed or idle request */
511 	if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT)
512 		return true;
513 
514 	nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD;
515 	nvme_req(req)->flags |= NVME_REQ_CANCELLED;
516 	blk_mq_complete_request(req);
517 	return true;
518 }
519 EXPORT_SYMBOL_GPL(nvme_cancel_request);
520 
521 void nvme_cancel_tagset(struct nvme_ctrl *ctrl)
522 {
523 	if (ctrl->tagset) {
524 		blk_mq_tagset_busy_iter(ctrl->tagset,
525 				nvme_cancel_request, ctrl);
526 		blk_mq_tagset_wait_completed_request(ctrl->tagset);
527 	}
528 }
529 EXPORT_SYMBOL_GPL(nvme_cancel_tagset);
530 
531 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl)
532 {
533 	if (ctrl->admin_tagset) {
534 		blk_mq_tagset_busy_iter(ctrl->admin_tagset,
535 				nvme_cancel_request, ctrl);
536 		blk_mq_tagset_wait_completed_request(ctrl->admin_tagset);
537 	}
538 }
539 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset);
540 
541 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
542 		enum nvme_ctrl_state new_state)
543 {
544 	enum nvme_ctrl_state old_state;
545 	unsigned long flags;
546 	bool changed = false;
547 
548 	spin_lock_irqsave(&ctrl->lock, flags);
549 
550 	old_state = nvme_ctrl_state(ctrl);
551 	switch (new_state) {
552 	case NVME_CTRL_LIVE:
553 		switch (old_state) {
554 		case NVME_CTRL_NEW:
555 		case NVME_CTRL_RESETTING:
556 		case NVME_CTRL_CONNECTING:
557 			changed = true;
558 			fallthrough;
559 		default:
560 			break;
561 		}
562 		break;
563 	case NVME_CTRL_RESETTING:
564 		switch (old_state) {
565 		case NVME_CTRL_NEW:
566 		case NVME_CTRL_LIVE:
567 			changed = true;
568 			fallthrough;
569 		default:
570 			break;
571 		}
572 		break;
573 	case NVME_CTRL_CONNECTING:
574 		switch (old_state) {
575 		case NVME_CTRL_NEW:
576 		case NVME_CTRL_RESETTING:
577 			changed = true;
578 			fallthrough;
579 		default:
580 			break;
581 		}
582 		break;
583 	case NVME_CTRL_DELETING:
584 		switch (old_state) {
585 		case NVME_CTRL_LIVE:
586 		case NVME_CTRL_RESETTING:
587 		case NVME_CTRL_CONNECTING:
588 			changed = true;
589 			fallthrough;
590 		default:
591 			break;
592 		}
593 		break;
594 	case NVME_CTRL_DELETING_NOIO:
595 		switch (old_state) {
596 		case NVME_CTRL_DELETING:
597 		case NVME_CTRL_DEAD:
598 			changed = true;
599 			fallthrough;
600 		default:
601 			break;
602 		}
603 		break;
604 	case NVME_CTRL_DEAD:
605 		switch (old_state) {
606 		case NVME_CTRL_DELETING:
607 			changed = true;
608 			fallthrough;
609 		default:
610 			break;
611 		}
612 		break;
613 	default:
614 		break;
615 	}
616 
617 	if (changed) {
618 		WRITE_ONCE(ctrl->state, new_state);
619 		wake_up_all(&ctrl->state_wq);
620 	}
621 
622 	spin_unlock_irqrestore(&ctrl->lock, flags);
623 	if (!changed)
624 		return false;
625 
626 	if (new_state == NVME_CTRL_LIVE) {
627 		if (old_state == NVME_CTRL_CONNECTING)
628 			nvme_stop_failfast_work(ctrl);
629 		nvme_kick_requeue_lists(ctrl);
630 	} else if (new_state == NVME_CTRL_CONNECTING &&
631 		old_state == NVME_CTRL_RESETTING) {
632 		nvme_start_failfast_work(ctrl);
633 	}
634 	return changed;
635 }
636 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
637 
638 /*
639  * Waits for the controller state to be resetting, or returns false if it is
640  * not possible to ever transition to that state.
641  */
642 bool nvme_wait_reset(struct nvme_ctrl *ctrl)
643 {
644 	wait_event(ctrl->state_wq,
645 		   nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) ||
646 		   nvme_state_terminal(ctrl));
647 	return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING;
648 }
649 EXPORT_SYMBOL_GPL(nvme_wait_reset);
650 
651 static void nvme_free_ns_head(struct kref *ref)
652 {
653 	struct nvme_ns_head *head =
654 		container_of(ref, struct nvme_ns_head, ref);
655 
656 	nvme_mpath_remove_disk(head);
657 	ida_free(&head->subsys->ns_ida, head->instance);
658 	cleanup_srcu_struct(&head->srcu);
659 	nvme_put_subsystem(head->subsys);
660 	kfree(head);
661 }
662 
663 bool nvme_tryget_ns_head(struct nvme_ns_head *head)
664 {
665 	return kref_get_unless_zero(&head->ref);
666 }
667 
668 void nvme_put_ns_head(struct nvme_ns_head *head)
669 {
670 	kref_put(&head->ref, nvme_free_ns_head);
671 }
672 
673 static void nvme_free_ns(struct kref *kref)
674 {
675 	struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
676 
677 	put_disk(ns->disk);
678 	nvme_put_ns_head(ns->head);
679 	nvme_put_ctrl(ns->ctrl);
680 	kfree(ns);
681 }
682 
683 bool nvme_get_ns(struct nvme_ns *ns)
684 {
685 	return kref_get_unless_zero(&ns->kref);
686 }
687 
688 void nvme_put_ns(struct nvme_ns *ns)
689 {
690 	kref_put(&ns->kref, nvme_free_ns);
691 }
692 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU);
693 
694 static inline void nvme_clear_nvme_request(struct request *req)
695 {
696 	nvme_req(req)->status = 0;
697 	nvme_req(req)->retries = 0;
698 	nvme_req(req)->flags = 0;
699 	req->rq_flags |= RQF_DONTPREP;
700 }
701 
702 /* initialize a passthrough request */
703 void nvme_init_request(struct request *req, struct nvme_command *cmd)
704 {
705 	struct nvme_request *nr = nvme_req(req);
706 	bool logging_enabled;
707 
708 	if (req->q->queuedata) {
709 		struct nvme_ns *ns = req->q->disk->private_data;
710 
711 		logging_enabled = ns->head->passthru_err_log_enabled;
712 		req->timeout = NVME_IO_TIMEOUT;
713 	} else { /* no queuedata implies admin queue */
714 		logging_enabled = nr->ctrl->passthru_err_log_enabled;
715 		req->timeout = NVME_ADMIN_TIMEOUT;
716 	}
717 
718 	if (!logging_enabled)
719 		req->rq_flags |= RQF_QUIET;
720 
721 	/* passthru commands should let the driver set the SGL flags */
722 	cmd->common.flags &= ~NVME_CMD_SGL_ALL;
723 
724 	req->cmd_flags |= REQ_FAILFAST_DRIVER;
725 	if (req->mq_hctx->type == HCTX_TYPE_POLL)
726 		req->cmd_flags |= REQ_POLLED;
727 	nvme_clear_nvme_request(req);
728 	memcpy(nr->cmd, cmd, sizeof(*cmd));
729 }
730 EXPORT_SYMBOL_GPL(nvme_init_request);
731 
732 /*
733  * For something we're not in a state to send to the device the default action
734  * is to busy it and retry it after the controller state is recovered.  However,
735  * if the controller is deleting or if anything is marked for failfast or
736  * nvme multipath it is immediately failed.
737  *
738  * Note: commands used to initialize the controller will be marked for failfast.
739  * Note: nvme cli/ioctl commands are marked for failfast.
740  */
741 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
742 		struct request *rq)
743 {
744 	enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
745 
746 	if (state != NVME_CTRL_DELETING_NOIO &&
747 	    state != NVME_CTRL_DELETING &&
748 	    state != NVME_CTRL_DEAD &&
749 	    !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) &&
750 	    !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH))
751 		return BLK_STS_RESOURCE;
752 	return nvme_host_path_error(rq);
753 }
754 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command);
755 
756 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
757 		bool queue_live, enum nvme_ctrl_state state)
758 {
759 	struct nvme_request *req = nvme_req(rq);
760 
761 	/*
762 	 * currently we have a problem sending passthru commands
763 	 * on the admin_q if the controller is not LIVE because we can't
764 	 * make sure that they are going out after the admin connect,
765 	 * controller enable and/or other commands in the initialization
766 	 * sequence. until the controller will be LIVE, fail with
767 	 * BLK_STS_RESOURCE so that they will be rescheduled.
768 	 */
769 	if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD))
770 		return false;
771 
772 	if (ctrl->ops->flags & NVME_F_FABRICS) {
773 		/*
774 		 * Only allow commands on a live queue, except for the connect
775 		 * command, which is require to set the queue live in the
776 		 * appropinquate states.
777 		 */
778 		switch (state) {
779 		case NVME_CTRL_CONNECTING:
780 			if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) &&
781 			    (req->cmd->fabrics.fctype == nvme_fabrics_type_connect ||
782 			     req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send ||
783 			     req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive))
784 				return true;
785 			break;
786 		default:
787 			break;
788 		case NVME_CTRL_DEAD:
789 			return false;
790 		}
791 	}
792 
793 	return queue_live;
794 }
795 EXPORT_SYMBOL_GPL(__nvme_check_ready);
796 
797 static inline void nvme_setup_flush(struct nvme_ns *ns,
798 		struct nvme_command *cmnd)
799 {
800 	memset(cmnd, 0, sizeof(*cmnd));
801 	cmnd->common.opcode = nvme_cmd_flush;
802 	cmnd->common.nsid = cpu_to_le32(ns->head->ns_id);
803 }
804 
805 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
806 		struct nvme_command *cmnd)
807 {
808 	unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
809 	struct nvme_dsm_range *range;
810 	struct bio *bio;
811 
812 	/*
813 	 * Some devices do not consider the DSM 'Number of Ranges' field when
814 	 * determining how much data to DMA. Always allocate memory for maximum
815 	 * number of segments to prevent device reading beyond end of buffer.
816 	 */
817 	static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES;
818 
819 	range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN);
820 	if (!range) {
821 		/*
822 		 * If we fail allocation our range, fallback to the controller
823 		 * discard page. If that's also busy, it's safe to return
824 		 * busy, as we know we can make progress once that's freed.
825 		 */
826 		if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy))
827 			return BLK_STS_RESOURCE;
828 
829 		range = page_address(ns->ctrl->discard_page);
830 	}
831 
832 	if (queue_max_discard_segments(req->q) == 1) {
833 		u64 slba = nvme_sect_to_lba(ns->head, blk_rq_pos(req));
834 		u32 nlb = blk_rq_sectors(req) >> (ns->head->lba_shift - 9);
835 
836 		range[0].cattr = cpu_to_le32(0);
837 		range[0].nlb = cpu_to_le32(nlb);
838 		range[0].slba = cpu_to_le64(slba);
839 		n = 1;
840 	} else {
841 		__rq_for_each_bio(bio, req) {
842 			u64 slba = nvme_sect_to_lba(ns->head,
843 						    bio->bi_iter.bi_sector);
844 			u32 nlb = bio->bi_iter.bi_size >> ns->head->lba_shift;
845 
846 			if (n < segments) {
847 				range[n].cattr = cpu_to_le32(0);
848 				range[n].nlb = cpu_to_le32(nlb);
849 				range[n].slba = cpu_to_le64(slba);
850 			}
851 			n++;
852 		}
853 	}
854 
855 	if (WARN_ON_ONCE(n != segments)) {
856 		if (virt_to_page(range) == ns->ctrl->discard_page)
857 			clear_bit_unlock(0, &ns->ctrl->discard_page_busy);
858 		else
859 			kfree(range);
860 		return BLK_STS_IOERR;
861 	}
862 
863 	memset(cmnd, 0, sizeof(*cmnd));
864 	cmnd->dsm.opcode = nvme_cmd_dsm;
865 	cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id);
866 	cmnd->dsm.nr = cpu_to_le32(segments - 1);
867 	cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
868 
869 	bvec_set_virt(&req->special_vec, range, alloc_size);
870 	req->rq_flags |= RQF_SPECIAL_PAYLOAD;
871 
872 	return BLK_STS_OK;
873 }
874 
875 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd,
876 			      struct request *req)
877 {
878 	u32 upper, lower;
879 	u64 ref48;
880 
881 	/* both rw and write zeroes share the same reftag format */
882 	switch (ns->head->guard_type) {
883 	case NVME_NVM_NS_16B_GUARD:
884 		cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req));
885 		break;
886 	case NVME_NVM_NS_64B_GUARD:
887 		ref48 = ext_pi_ref_tag(req);
888 		lower = lower_32_bits(ref48);
889 		upper = upper_32_bits(ref48);
890 
891 		cmnd->rw.reftag = cpu_to_le32(lower);
892 		cmnd->rw.cdw3 = cpu_to_le32(upper);
893 		break;
894 	default:
895 		break;
896 	}
897 }
898 
899 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns,
900 		struct request *req, struct nvme_command *cmnd)
901 {
902 	memset(cmnd, 0, sizeof(*cmnd));
903 
904 	if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
905 		return nvme_setup_discard(ns, req, cmnd);
906 
907 	cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes;
908 	cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id);
909 	cmnd->write_zeroes.slba =
910 		cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
911 	cmnd->write_zeroes.length =
912 		cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
913 
914 	if (!(req->cmd_flags & REQ_NOUNMAP) &&
915 	    (ns->head->features & NVME_NS_DEAC))
916 		cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC);
917 
918 	if (nvme_ns_has_pi(ns->head)) {
919 		cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT);
920 
921 		switch (ns->head->pi_type) {
922 		case NVME_NS_DPS_PI_TYPE1:
923 		case NVME_NS_DPS_PI_TYPE2:
924 			nvme_set_ref_tag(ns, cmnd, req);
925 			break;
926 		}
927 	}
928 
929 	return BLK_STS_OK;
930 }
931 
932 /*
933  * NVMe does not support a dedicated command to issue an atomic write. A write
934  * which does adhere to the device atomic limits will silently be executed
935  * non-atomically. The request issuer should ensure that the write is within
936  * the queue atomic writes limits, but just validate this in case it is not.
937  */
938 static bool nvme_valid_atomic_write(struct request *req)
939 {
940 	struct request_queue *q = req->q;
941 	u32 boundary_bytes = queue_atomic_write_boundary_bytes(q);
942 
943 	if (blk_rq_bytes(req) > queue_atomic_write_unit_max_bytes(q))
944 		return false;
945 
946 	if (boundary_bytes) {
947 		u64 mask = boundary_bytes - 1, imask = ~mask;
948 		u64 start = blk_rq_pos(req) << SECTOR_SHIFT;
949 		u64 end = start + blk_rq_bytes(req) - 1;
950 
951 		/* If greater then must be crossing a boundary */
952 		if (blk_rq_bytes(req) > boundary_bytes)
953 			return false;
954 
955 		if ((start & imask) != (end & imask))
956 			return false;
957 	}
958 
959 	return true;
960 }
961 
962 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
963 		struct request *req, struct nvme_command *cmnd,
964 		enum nvme_opcode op)
965 {
966 	u16 control = 0;
967 	u32 dsmgmt = 0;
968 
969 	if (req->cmd_flags & REQ_FUA)
970 		control |= NVME_RW_FUA;
971 	if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
972 		control |= NVME_RW_LR;
973 
974 	if (req->cmd_flags & REQ_RAHEAD)
975 		dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
976 
977 	if (req->cmd_flags & REQ_ATOMIC && !nvme_valid_atomic_write(req))
978 		return BLK_STS_INVAL;
979 
980 	cmnd->rw.opcode = op;
981 	cmnd->rw.flags = 0;
982 	cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id);
983 	cmnd->rw.cdw2 = 0;
984 	cmnd->rw.cdw3 = 0;
985 	cmnd->rw.metadata = 0;
986 	cmnd->rw.slba =
987 		cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
988 	cmnd->rw.length =
989 		cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
990 	cmnd->rw.reftag = 0;
991 	cmnd->rw.lbat = 0;
992 	cmnd->rw.lbatm = 0;
993 
994 	if (ns->head->ms) {
995 		/*
996 		 * If formated with metadata, the block layer always provides a
997 		 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled.  Else
998 		 * we enable the PRACT bit for protection information or set the
999 		 * namespace capacity to zero to prevent any I/O.
1000 		 */
1001 		if (!blk_integrity_rq(req)) {
1002 			if (WARN_ON_ONCE(!nvme_ns_has_pi(ns->head)))
1003 				return BLK_STS_NOTSUPP;
1004 			control |= NVME_RW_PRINFO_PRACT;
1005 		}
1006 
1007 		switch (ns->head->pi_type) {
1008 		case NVME_NS_DPS_PI_TYPE3:
1009 			control |= NVME_RW_PRINFO_PRCHK_GUARD;
1010 			break;
1011 		case NVME_NS_DPS_PI_TYPE1:
1012 		case NVME_NS_DPS_PI_TYPE2:
1013 			control |= NVME_RW_PRINFO_PRCHK_GUARD |
1014 					NVME_RW_PRINFO_PRCHK_REF;
1015 			if (op == nvme_cmd_zone_append)
1016 				control |= NVME_RW_APPEND_PIREMAP;
1017 			nvme_set_ref_tag(ns, cmnd, req);
1018 			break;
1019 		}
1020 	}
1021 
1022 	cmnd->rw.control = cpu_to_le16(control);
1023 	cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
1024 	return 0;
1025 }
1026 
1027 void nvme_cleanup_cmd(struct request *req)
1028 {
1029 	if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
1030 		struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
1031 
1032 		if (req->special_vec.bv_page == ctrl->discard_page)
1033 			clear_bit_unlock(0, &ctrl->discard_page_busy);
1034 		else
1035 			kfree(bvec_virt(&req->special_vec));
1036 		req->rq_flags &= ~RQF_SPECIAL_PAYLOAD;
1037 	}
1038 }
1039 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd);
1040 
1041 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req)
1042 {
1043 	struct nvme_command *cmd = nvme_req(req)->cmd;
1044 	blk_status_t ret = BLK_STS_OK;
1045 
1046 	if (!(req->rq_flags & RQF_DONTPREP))
1047 		nvme_clear_nvme_request(req);
1048 
1049 	switch (req_op(req)) {
1050 	case REQ_OP_DRV_IN:
1051 	case REQ_OP_DRV_OUT:
1052 		/* these are setup prior to execution in nvme_init_request() */
1053 		break;
1054 	case REQ_OP_FLUSH:
1055 		nvme_setup_flush(ns, cmd);
1056 		break;
1057 	case REQ_OP_ZONE_RESET_ALL:
1058 	case REQ_OP_ZONE_RESET:
1059 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET);
1060 		break;
1061 	case REQ_OP_ZONE_OPEN:
1062 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN);
1063 		break;
1064 	case REQ_OP_ZONE_CLOSE:
1065 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE);
1066 		break;
1067 	case REQ_OP_ZONE_FINISH:
1068 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH);
1069 		break;
1070 	case REQ_OP_WRITE_ZEROES:
1071 		ret = nvme_setup_write_zeroes(ns, req, cmd);
1072 		break;
1073 	case REQ_OP_DISCARD:
1074 		ret = nvme_setup_discard(ns, req, cmd);
1075 		break;
1076 	case REQ_OP_READ:
1077 		ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read);
1078 		break;
1079 	case REQ_OP_WRITE:
1080 		ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write);
1081 		break;
1082 	case REQ_OP_ZONE_APPEND:
1083 		ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append);
1084 		break;
1085 	default:
1086 		WARN_ON_ONCE(1);
1087 		return BLK_STS_IOERR;
1088 	}
1089 
1090 	cmd->common.command_id = nvme_cid(req);
1091 	trace_nvme_setup_cmd(req, cmd);
1092 	return ret;
1093 }
1094 EXPORT_SYMBOL_GPL(nvme_setup_cmd);
1095 
1096 /*
1097  * Return values:
1098  * 0:  success
1099  * >0: nvme controller's cqe status response
1100  * <0: kernel error in lieu of controller response
1101  */
1102 int nvme_execute_rq(struct request *rq, bool at_head)
1103 {
1104 	blk_status_t status;
1105 
1106 	status = blk_execute_rq(rq, at_head);
1107 	if (nvme_req(rq)->flags & NVME_REQ_CANCELLED)
1108 		return -EINTR;
1109 	if (nvme_req(rq)->status)
1110 		return nvme_req(rq)->status;
1111 	return blk_status_to_errno(status);
1112 }
1113 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU);
1114 
1115 /*
1116  * Returns 0 on success.  If the result is negative, it's a Linux error code;
1117  * if the result is positive, it's an NVM Express status code
1118  */
1119 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1120 		union nvme_result *result, void *buffer, unsigned bufflen,
1121 		int qid, nvme_submit_flags_t flags)
1122 {
1123 	struct request *req;
1124 	int ret;
1125 	blk_mq_req_flags_t blk_flags = 0;
1126 
1127 	if (flags & NVME_SUBMIT_NOWAIT)
1128 		blk_flags |= BLK_MQ_REQ_NOWAIT;
1129 	if (flags & NVME_SUBMIT_RESERVED)
1130 		blk_flags |= BLK_MQ_REQ_RESERVED;
1131 	if (qid == NVME_QID_ANY)
1132 		req = blk_mq_alloc_request(q, nvme_req_op(cmd), blk_flags);
1133 	else
1134 		req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), blk_flags,
1135 						qid - 1);
1136 
1137 	if (IS_ERR(req))
1138 		return PTR_ERR(req);
1139 	nvme_init_request(req, cmd);
1140 	if (flags & NVME_SUBMIT_RETRY)
1141 		req->cmd_flags &= ~REQ_FAILFAST_DRIVER;
1142 
1143 	if (buffer && bufflen) {
1144 		ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
1145 		if (ret)
1146 			goto out;
1147 	}
1148 
1149 	ret = nvme_execute_rq(req, flags & NVME_SUBMIT_AT_HEAD);
1150 	if (result && ret >= 0)
1151 		*result = nvme_req(req)->result;
1152  out:
1153 	blk_mq_free_request(req);
1154 	return ret;
1155 }
1156 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
1157 
1158 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1159 		void *buffer, unsigned bufflen)
1160 {
1161 	return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen,
1162 			NVME_QID_ANY, 0);
1163 }
1164 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
1165 
1166 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1167 {
1168 	u32 effects = 0;
1169 
1170 	if (ns) {
1171 		effects = le32_to_cpu(ns->head->effects->iocs[opcode]);
1172 		if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC))
1173 			dev_warn_once(ctrl->device,
1174 				"IO command:%02x has unusual effects:%08x\n",
1175 				opcode, effects);
1176 
1177 		/*
1178 		 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues,
1179 		 * which would deadlock when done on an I/O command.  Note that
1180 		 * We already warn about an unusual effect above.
1181 		 */
1182 		effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1183 	} else {
1184 		effects = le32_to_cpu(ctrl->effects->acs[opcode]);
1185 
1186 		/* Ignore execution restrictions if any relaxation bits are set */
1187 		if (effects & NVME_CMD_EFFECTS_CSER_MASK)
1188 			effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1189 	}
1190 
1191 	return effects;
1192 }
1193 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU);
1194 
1195 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1196 {
1197 	u32 effects = nvme_command_effects(ctrl, ns, opcode);
1198 
1199 	/*
1200 	 * For simplicity, IO to all namespaces is quiesced even if the command
1201 	 * effects say only one namespace is affected.
1202 	 */
1203 	if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1204 		mutex_lock(&ctrl->scan_lock);
1205 		mutex_lock(&ctrl->subsys->lock);
1206 		nvme_mpath_start_freeze(ctrl->subsys);
1207 		nvme_mpath_wait_freeze(ctrl->subsys);
1208 		nvme_start_freeze(ctrl);
1209 		nvme_wait_freeze(ctrl);
1210 	}
1211 	return effects;
1212 }
1213 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU);
1214 
1215 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1216 		       struct nvme_command *cmd, int status)
1217 {
1218 	if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1219 		nvme_unfreeze(ctrl);
1220 		nvme_mpath_unfreeze(ctrl->subsys);
1221 		mutex_unlock(&ctrl->subsys->lock);
1222 		mutex_unlock(&ctrl->scan_lock);
1223 	}
1224 	if (effects & NVME_CMD_EFFECTS_CCC) {
1225 		if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY,
1226 				      &ctrl->flags)) {
1227 			dev_info(ctrl->device,
1228 "controller capabilities changed, reset may be required to take effect.\n");
1229 		}
1230 	}
1231 	if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) {
1232 		nvme_queue_scan(ctrl);
1233 		flush_work(&ctrl->scan_work);
1234 	}
1235 	if (ns)
1236 		return;
1237 
1238 	switch (cmd->common.opcode) {
1239 	case nvme_admin_set_features:
1240 		switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) {
1241 		case NVME_FEAT_KATO:
1242 			/*
1243 			 * Keep alive commands interval on the host should be
1244 			 * updated when KATO is modified by Set Features
1245 			 * commands.
1246 			 */
1247 			if (!status)
1248 				nvme_update_keep_alive(ctrl, cmd);
1249 			break;
1250 		default:
1251 			break;
1252 		}
1253 		break;
1254 	default:
1255 		break;
1256 	}
1257 }
1258 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU);
1259 
1260 /*
1261  * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1:
1262  *
1263  *   The host should send Keep Alive commands at half of the Keep Alive Timeout
1264  *   accounting for transport roundtrip times [..].
1265  */
1266 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl)
1267 {
1268 	unsigned long delay = ctrl->kato * HZ / 2;
1269 
1270 	/*
1271 	 * When using Traffic Based Keep Alive, we need to run
1272 	 * nvme_keep_alive_work at twice the normal frequency, as one
1273 	 * command completion can postpone sending a keep alive command
1274 	 * by up to twice the delay between runs.
1275 	 */
1276 	if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS)
1277 		delay /= 2;
1278 	return delay;
1279 }
1280 
1281 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl)
1282 {
1283 	unsigned long now = jiffies;
1284 	unsigned long delay = nvme_keep_alive_work_period(ctrl);
1285 	unsigned long ka_next_check_tm = ctrl->ka_last_check_time + delay;
1286 
1287 	if (time_after(now, ka_next_check_tm))
1288 		delay = 0;
1289 	else
1290 		delay = ka_next_check_tm - now;
1291 
1292 	queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1293 }
1294 
1295 static void nvme_keep_alive_finish(struct request *rq,
1296 		blk_status_t status, struct nvme_ctrl *ctrl)
1297 {
1298 	unsigned long rtt = jiffies - (rq->deadline - rq->timeout);
1299 	unsigned long delay = nvme_keep_alive_work_period(ctrl);
1300 	enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
1301 
1302 	/*
1303 	 * Subtract off the keepalive RTT so nvme_keep_alive_work runs
1304 	 * at the desired frequency.
1305 	 */
1306 	if (rtt <= delay) {
1307 		delay -= rtt;
1308 	} else {
1309 		dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n",
1310 			 jiffies_to_msecs(rtt));
1311 		delay = 0;
1312 	}
1313 
1314 	if (status) {
1315 		dev_err(ctrl->device,
1316 			"failed nvme_keep_alive_end_io error=%d\n",
1317 				status);
1318 		return;
1319 	}
1320 
1321 	ctrl->ka_last_check_time = jiffies;
1322 	ctrl->comp_seen = false;
1323 	if (state == NVME_CTRL_LIVE || state == NVME_CTRL_CONNECTING)
1324 		queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1325 }
1326 
1327 static void nvme_keep_alive_work(struct work_struct *work)
1328 {
1329 	struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
1330 			struct nvme_ctrl, ka_work);
1331 	bool comp_seen = ctrl->comp_seen;
1332 	struct request *rq;
1333 	blk_status_t status;
1334 
1335 	ctrl->ka_last_check_time = jiffies;
1336 
1337 	if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) {
1338 		dev_dbg(ctrl->device,
1339 			"reschedule traffic based keep-alive timer\n");
1340 		ctrl->comp_seen = false;
1341 		nvme_queue_keep_alive_work(ctrl);
1342 		return;
1343 	}
1344 
1345 	rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd),
1346 				  BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
1347 	if (IS_ERR(rq)) {
1348 		/* allocation failure, reset the controller */
1349 		dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq));
1350 		nvme_reset_ctrl(ctrl);
1351 		return;
1352 	}
1353 	nvme_init_request(rq, &ctrl->ka_cmd);
1354 
1355 	rq->timeout = ctrl->kato * HZ;
1356 	status = blk_execute_rq(rq, false);
1357 	nvme_keep_alive_finish(rq, status, ctrl);
1358 	blk_mq_free_request(rq);
1359 }
1360 
1361 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
1362 {
1363 	if (unlikely(ctrl->kato == 0))
1364 		return;
1365 
1366 	nvme_queue_keep_alive_work(ctrl);
1367 }
1368 
1369 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
1370 {
1371 	if (unlikely(ctrl->kato == 0))
1372 		return;
1373 
1374 	cancel_delayed_work_sync(&ctrl->ka_work);
1375 }
1376 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
1377 
1378 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
1379 				   struct nvme_command *cmd)
1380 {
1381 	unsigned int new_kato =
1382 		DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000);
1383 
1384 	dev_info(ctrl->device,
1385 		 "keep alive interval updated from %u ms to %u ms\n",
1386 		 ctrl->kato * 1000 / 2, new_kato * 1000 / 2);
1387 
1388 	nvme_stop_keep_alive(ctrl);
1389 	ctrl->kato = new_kato;
1390 	nvme_start_keep_alive(ctrl);
1391 }
1392 
1393 /*
1394  * In NVMe 1.0 the CNS field was just a binary controller or namespace
1395  * flag, thus sending any new CNS opcodes has a big chance of not working.
1396  * Qemu unfortunately had that bug after reporting a 1.1 version compliance
1397  * (but not for any later version).
1398  */
1399 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl)
1400 {
1401 	if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)
1402 		return ctrl->vs < NVME_VS(1, 2, 0);
1403 	return ctrl->vs < NVME_VS(1, 1, 0);
1404 }
1405 
1406 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
1407 {
1408 	struct nvme_command c = { };
1409 	int error;
1410 
1411 	/* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1412 	c.identify.opcode = nvme_admin_identify;
1413 	c.identify.cns = NVME_ID_CNS_CTRL;
1414 
1415 	*id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1416 	if (!*id)
1417 		return -ENOMEM;
1418 
1419 	error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1420 			sizeof(struct nvme_id_ctrl));
1421 	if (error) {
1422 		kfree(*id);
1423 		*id = NULL;
1424 	}
1425 	return error;
1426 }
1427 
1428 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids,
1429 		struct nvme_ns_id_desc *cur, bool *csi_seen)
1430 {
1431 	const char *warn_str = "ctrl returned bogus length:";
1432 	void *data = cur;
1433 
1434 	switch (cur->nidt) {
1435 	case NVME_NIDT_EUI64:
1436 		if (cur->nidl != NVME_NIDT_EUI64_LEN) {
1437 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n",
1438 				 warn_str, cur->nidl);
1439 			return -1;
1440 		}
1441 		if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1442 			return NVME_NIDT_EUI64_LEN;
1443 		memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN);
1444 		return NVME_NIDT_EUI64_LEN;
1445 	case NVME_NIDT_NGUID:
1446 		if (cur->nidl != NVME_NIDT_NGUID_LEN) {
1447 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n",
1448 				 warn_str, cur->nidl);
1449 			return -1;
1450 		}
1451 		if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1452 			return NVME_NIDT_NGUID_LEN;
1453 		memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN);
1454 		return NVME_NIDT_NGUID_LEN;
1455 	case NVME_NIDT_UUID:
1456 		if (cur->nidl != NVME_NIDT_UUID_LEN) {
1457 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n",
1458 				 warn_str, cur->nidl);
1459 			return -1;
1460 		}
1461 		if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1462 			return NVME_NIDT_UUID_LEN;
1463 		uuid_copy(&ids->uuid, data + sizeof(*cur));
1464 		return NVME_NIDT_UUID_LEN;
1465 	case NVME_NIDT_CSI:
1466 		if (cur->nidl != NVME_NIDT_CSI_LEN) {
1467 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n",
1468 				 warn_str, cur->nidl);
1469 			return -1;
1470 		}
1471 		memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN);
1472 		*csi_seen = true;
1473 		return NVME_NIDT_CSI_LEN;
1474 	default:
1475 		/* Skip unknown types */
1476 		return cur->nidl;
1477 	}
1478 }
1479 
1480 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl,
1481 		struct nvme_ns_info *info)
1482 {
1483 	struct nvme_command c = { };
1484 	bool csi_seen = false;
1485 	int status, pos, len;
1486 	void *data;
1487 
1488 	if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl))
1489 		return 0;
1490 	if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST)
1491 		return 0;
1492 
1493 	c.identify.opcode = nvme_admin_identify;
1494 	c.identify.nsid = cpu_to_le32(info->nsid);
1495 	c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
1496 
1497 	data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
1498 	if (!data)
1499 		return -ENOMEM;
1500 
1501 	status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
1502 				      NVME_IDENTIFY_DATA_SIZE);
1503 	if (status) {
1504 		dev_warn(ctrl->device,
1505 			"Identify Descriptors failed (nsid=%u, status=0x%x)\n",
1506 			info->nsid, status);
1507 		goto free_data;
1508 	}
1509 
1510 	for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
1511 		struct nvme_ns_id_desc *cur = data + pos;
1512 
1513 		if (cur->nidl == 0)
1514 			break;
1515 
1516 		len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen);
1517 		if (len < 0)
1518 			break;
1519 
1520 		len += sizeof(*cur);
1521 	}
1522 
1523 	if (nvme_multi_css(ctrl) && !csi_seen) {
1524 		dev_warn(ctrl->device, "Command set not reported for nsid:%d\n",
1525 			 info->nsid);
1526 		status = -EINVAL;
1527 	}
1528 
1529 free_data:
1530 	kfree(data);
1531 	return status;
1532 }
1533 
1534 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid,
1535 			struct nvme_id_ns **id)
1536 {
1537 	struct nvme_command c = { };
1538 	int error;
1539 
1540 	/* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1541 	c.identify.opcode = nvme_admin_identify;
1542 	c.identify.nsid = cpu_to_le32(nsid);
1543 	c.identify.cns = NVME_ID_CNS_NS;
1544 
1545 	*id = kmalloc(sizeof(**id), GFP_KERNEL);
1546 	if (!*id)
1547 		return -ENOMEM;
1548 
1549 	error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id));
1550 	if (error) {
1551 		dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error);
1552 		kfree(*id);
1553 		*id = NULL;
1554 	}
1555 	return error;
1556 }
1557 
1558 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl,
1559 		struct nvme_ns_info *info)
1560 {
1561 	struct nvme_ns_ids *ids = &info->ids;
1562 	struct nvme_id_ns *id;
1563 	int ret;
1564 
1565 	ret = nvme_identify_ns(ctrl, info->nsid, &id);
1566 	if (ret)
1567 		return ret;
1568 
1569 	if (id->ncap == 0) {
1570 		/* namespace not allocated or attached */
1571 		info->is_removed = true;
1572 		ret = -ENODEV;
1573 		goto error;
1574 	}
1575 
1576 	info->anagrpid = id->anagrpid;
1577 	info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1578 	info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1579 	info->is_ready = true;
1580 	if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) {
1581 		dev_info(ctrl->device,
1582 			 "Ignoring bogus Namespace Identifiers\n");
1583 	} else {
1584 		if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1585 		    !memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
1586 			memcpy(ids->eui64, id->eui64, sizeof(ids->eui64));
1587 		if (ctrl->vs >= NVME_VS(1, 2, 0) &&
1588 		    !memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
1589 			memcpy(ids->nguid, id->nguid, sizeof(ids->nguid));
1590 	}
1591 
1592 error:
1593 	kfree(id);
1594 	return ret;
1595 }
1596 
1597 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl,
1598 		struct nvme_ns_info *info)
1599 {
1600 	struct nvme_id_ns_cs_indep *id;
1601 	struct nvme_command c = {
1602 		.identify.opcode	= nvme_admin_identify,
1603 		.identify.nsid		= cpu_to_le32(info->nsid),
1604 		.identify.cns		= NVME_ID_CNS_NS_CS_INDEP,
1605 	};
1606 	int ret;
1607 
1608 	id = kmalloc(sizeof(*id), GFP_KERNEL);
1609 	if (!id)
1610 		return -ENOMEM;
1611 
1612 	ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
1613 	if (!ret) {
1614 		info->anagrpid = id->anagrpid;
1615 		info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1616 		info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1617 		info->is_ready = id->nstat & NVME_NSTAT_NRDY;
1618 	}
1619 	kfree(id);
1620 	return ret;
1621 }
1622 
1623 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid,
1624 		unsigned int dword11, void *buffer, size_t buflen, u32 *result)
1625 {
1626 	union nvme_result res = { 0 };
1627 	struct nvme_command c = { };
1628 	int ret;
1629 
1630 	c.features.opcode = op;
1631 	c.features.fid = cpu_to_le32(fid);
1632 	c.features.dword11 = cpu_to_le32(dword11);
1633 
1634 	ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
1635 			buffer, buflen, NVME_QID_ANY, 0);
1636 	if (ret >= 0 && result)
1637 		*result = le32_to_cpu(res.u32);
1638 	return ret;
1639 }
1640 
1641 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
1642 		      unsigned int dword11, void *buffer, size_t buflen,
1643 		      u32 *result)
1644 {
1645 	return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer,
1646 			     buflen, result);
1647 }
1648 EXPORT_SYMBOL_GPL(nvme_set_features);
1649 
1650 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
1651 		      unsigned int dword11, void *buffer, size_t buflen,
1652 		      u32 *result)
1653 {
1654 	return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer,
1655 			     buflen, result);
1656 }
1657 EXPORT_SYMBOL_GPL(nvme_get_features);
1658 
1659 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
1660 {
1661 	u32 q_count = (*count - 1) | ((*count - 1) << 16);
1662 	u32 result;
1663 	int status, nr_io_queues;
1664 
1665 	status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
1666 			&result);
1667 	if (status < 0)
1668 		return status;
1669 
1670 	/*
1671 	 * Degraded controllers might return an error when setting the queue
1672 	 * count.  We still want to be able to bring them online and offer
1673 	 * access to the admin queue, as that might be only way to fix them up.
1674 	 */
1675 	if (status > 0) {
1676 		dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
1677 		*count = 0;
1678 	} else {
1679 		nr_io_queues = min(result & 0xffff, result >> 16) + 1;
1680 		*count = min(*count, nr_io_queues);
1681 	}
1682 
1683 	return 0;
1684 }
1685 EXPORT_SYMBOL_GPL(nvme_set_queue_count);
1686 
1687 #define NVME_AEN_SUPPORTED \
1688 	(NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \
1689 	 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE)
1690 
1691 static void nvme_enable_aen(struct nvme_ctrl *ctrl)
1692 {
1693 	u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED;
1694 	int status;
1695 
1696 	if (!supported_aens)
1697 		return;
1698 
1699 	status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens,
1700 			NULL, 0, &result);
1701 	if (status)
1702 		dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n",
1703 			 supported_aens);
1704 
1705 	queue_work(nvme_wq, &ctrl->async_event_work);
1706 }
1707 
1708 static int nvme_ns_open(struct nvme_ns *ns)
1709 {
1710 
1711 	/* should never be called due to GENHD_FL_HIDDEN */
1712 	if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head)))
1713 		goto fail;
1714 	if (!nvme_get_ns(ns))
1715 		goto fail;
1716 	if (!try_module_get(ns->ctrl->ops->module))
1717 		goto fail_put_ns;
1718 
1719 	return 0;
1720 
1721 fail_put_ns:
1722 	nvme_put_ns(ns);
1723 fail:
1724 	return -ENXIO;
1725 }
1726 
1727 static void nvme_ns_release(struct nvme_ns *ns)
1728 {
1729 
1730 	module_put(ns->ctrl->ops->module);
1731 	nvme_put_ns(ns);
1732 }
1733 
1734 static int nvme_open(struct gendisk *disk, blk_mode_t mode)
1735 {
1736 	return nvme_ns_open(disk->private_data);
1737 }
1738 
1739 static void nvme_release(struct gendisk *disk)
1740 {
1741 	nvme_ns_release(disk->private_data);
1742 }
1743 
1744 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1745 {
1746 	/* some standard values */
1747 	geo->heads = 1 << 6;
1748 	geo->sectors = 1 << 5;
1749 	geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
1750 	return 0;
1751 }
1752 
1753 static bool nvme_init_integrity(struct nvme_ns_head *head,
1754 		struct queue_limits *lim, struct nvme_ns_info *info)
1755 {
1756 	struct blk_integrity *bi = &lim->integrity;
1757 
1758 	memset(bi, 0, sizeof(*bi));
1759 
1760 	if (!head->ms)
1761 		return true;
1762 
1763 	/*
1764 	 * PI can always be supported as we can ask the controller to simply
1765 	 * insert/strip it, which is not possible for other kinds of metadata.
1766 	 */
1767 	if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) ||
1768 	    !(head->features & NVME_NS_METADATA_SUPPORTED))
1769 		return nvme_ns_has_pi(head);
1770 
1771 	switch (head->pi_type) {
1772 	case NVME_NS_DPS_PI_TYPE3:
1773 		switch (head->guard_type) {
1774 		case NVME_NVM_NS_16B_GUARD:
1775 			bi->csum_type = BLK_INTEGRITY_CSUM_CRC;
1776 			bi->tag_size = sizeof(u16) + sizeof(u32);
1777 			bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1778 			break;
1779 		case NVME_NVM_NS_64B_GUARD:
1780 			bi->csum_type = BLK_INTEGRITY_CSUM_CRC64;
1781 			bi->tag_size = sizeof(u16) + 6;
1782 			bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1783 			break;
1784 		default:
1785 			break;
1786 		}
1787 		break;
1788 	case NVME_NS_DPS_PI_TYPE1:
1789 	case NVME_NS_DPS_PI_TYPE2:
1790 		switch (head->guard_type) {
1791 		case NVME_NVM_NS_16B_GUARD:
1792 			bi->csum_type = BLK_INTEGRITY_CSUM_CRC;
1793 			bi->tag_size = sizeof(u16);
1794 			bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE |
1795 				     BLK_INTEGRITY_REF_TAG;
1796 			break;
1797 		case NVME_NVM_NS_64B_GUARD:
1798 			bi->csum_type = BLK_INTEGRITY_CSUM_CRC64;
1799 			bi->tag_size = sizeof(u16);
1800 			bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE |
1801 				     BLK_INTEGRITY_REF_TAG;
1802 			break;
1803 		default:
1804 			break;
1805 		}
1806 		break;
1807 	default:
1808 		break;
1809 	}
1810 
1811 	bi->tuple_size = head->ms;
1812 	bi->pi_offset = info->pi_offset;
1813 	return true;
1814 }
1815 
1816 static void nvme_config_discard(struct nvme_ns *ns, struct queue_limits *lim)
1817 {
1818 	struct nvme_ctrl *ctrl = ns->ctrl;
1819 
1820 	if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns->head, UINT_MAX))
1821 		lim->max_hw_discard_sectors =
1822 			nvme_lba_to_sect(ns->head, ctrl->dmrsl);
1823 	else if (ctrl->oncs & NVME_CTRL_ONCS_DSM)
1824 		lim->max_hw_discard_sectors = UINT_MAX;
1825 	else
1826 		lim->max_hw_discard_sectors = 0;
1827 
1828 	lim->discard_granularity = lim->logical_block_size;
1829 
1830 	if (ctrl->dmrl)
1831 		lim->max_discard_segments = ctrl->dmrl;
1832 	else
1833 		lim->max_discard_segments = NVME_DSM_MAX_RANGES;
1834 }
1835 
1836 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b)
1837 {
1838 	return uuid_equal(&a->uuid, &b->uuid) &&
1839 		memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 &&
1840 		memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 &&
1841 		a->csi == b->csi;
1842 }
1843 
1844 static int nvme_identify_ns_nvm(struct nvme_ctrl *ctrl, unsigned int nsid,
1845 		struct nvme_id_ns_nvm **nvmp)
1846 {
1847 	struct nvme_command c = {
1848 		.identify.opcode	= nvme_admin_identify,
1849 		.identify.nsid		= cpu_to_le32(nsid),
1850 		.identify.cns		= NVME_ID_CNS_CS_NS,
1851 		.identify.csi		= NVME_CSI_NVM,
1852 	};
1853 	struct nvme_id_ns_nvm *nvm;
1854 	int ret;
1855 
1856 	nvm = kzalloc(sizeof(*nvm), GFP_KERNEL);
1857 	if (!nvm)
1858 		return -ENOMEM;
1859 
1860 	ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, nvm, sizeof(*nvm));
1861 	if (ret)
1862 		kfree(nvm);
1863 	else
1864 		*nvmp = nvm;
1865 	return ret;
1866 }
1867 
1868 static void nvme_configure_pi_elbas(struct nvme_ns_head *head,
1869 		struct nvme_id_ns *id, struct nvme_id_ns_nvm *nvm)
1870 {
1871 	u32 elbaf = le32_to_cpu(nvm->elbaf[nvme_lbaf_index(id->flbas)]);
1872 	u8 guard_type;
1873 
1874 	/* no support for storage tag formats right now */
1875 	if (nvme_elbaf_sts(elbaf))
1876 		return;
1877 
1878 	guard_type = nvme_elbaf_guard_type(elbaf);
1879 	if ((nvm->pic & NVME_ID_NS_NVM_QPIFS) &&
1880 	     guard_type == NVME_NVM_NS_QTYPE_GUARD)
1881 		guard_type = nvme_elbaf_qualified_guard_type(elbaf);
1882 
1883 	head->guard_type = guard_type;
1884 	switch (head->guard_type) {
1885 	case NVME_NVM_NS_64B_GUARD:
1886 		head->pi_size = sizeof(struct crc64_pi_tuple);
1887 		break;
1888 	case NVME_NVM_NS_16B_GUARD:
1889 		head->pi_size = sizeof(struct t10_pi_tuple);
1890 		break;
1891 	default:
1892 		break;
1893 	}
1894 }
1895 
1896 static void nvme_configure_metadata(struct nvme_ctrl *ctrl,
1897 		struct nvme_ns_head *head, struct nvme_id_ns *id,
1898 		struct nvme_id_ns_nvm *nvm, struct nvme_ns_info *info)
1899 {
1900 	head->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS);
1901 	head->pi_type = 0;
1902 	head->pi_size = 0;
1903 	head->ms = le16_to_cpu(id->lbaf[nvme_lbaf_index(id->flbas)].ms);
1904 	if (!head->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED))
1905 		return;
1906 
1907 	if (nvm && (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) {
1908 		nvme_configure_pi_elbas(head, id, nvm);
1909 	} else {
1910 		head->pi_size = sizeof(struct t10_pi_tuple);
1911 		head->guard_type = NVME_NVM_NS_16B_GUARD;
1912 	}
1913 
1914 	if (head->pi_size && head->ms >= head->pi_size)
1915 		head->pi_type = id->dps & NVME_NS_DPS_PI_MASK;
1916 	if (!(id->dps & NVME_NS_DPS_PI_FIRST))
1917 		info->pi_offset = head->ms - head->pi_size;
1918 
1919 	if (ctrl->ops->flags & NVME_F_FABRICS) {
1920 		/*
1921 		 * The NVMe over Fabrics specification only supports metadata as
1922 		 * part of the extended data LBA.  We rely on HCA/HBA support to
1923 		 * remap the separate metadata buffer from the block layer.
1924 		 */
1925 		if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT)))
1926 			return;
1927 
1928 		head->features |= NVME_NS_EXT_LBAS;
1929 
1930 		/*
1931 		 * The current fabrics transport drivers support namespace
1932 		 * metadata formats only if nvme_ns_has_pi() returns true.
1933 		 * Suppress support for all other formats so the namespace will
1934 		 * have a 0 capacity and not be usable through the block stack.
1935 		 *
1936 		 * Note, this check will need to be modified if any drivers
1937 		 * gain the ability to use other metadata formats.
1938 		 */
1939 		if (ctrl->max_integrity_segments && nvme_ns_has_pi(head))
1940 			head->features |= NVME_NS_METADATA_SUPPORTED;
1941 	} else {
1942 		/*
1943 		 * For PCIe controllers, we can't easily remap the separate
1944 		 * metadata buffer from the block layer and thus require a
1945 		 * separate metadata buffer for block layer metadata/PI support.
1946 		 * We allow extended LBAs for the passthrough interface, though.
1947 		 */
1948 		if (id->flbas & NVME_NS_FLBAS_META_EXT)
1949 			head->features |= NVME_NS_EXT_LBAS;
1950 		else
1951 			head->features |= NVME_NS_METADATA_SUPPORTED;
1952 	}
1953 }
1954 
1955 
1956 static void nvme_update_atomic_write_disk_info(struct nvme_ns *ns,
1957 			struct nvme_id_ns *id, struct queue_limits *lim,
1958 			u32 bs, u32 atomic_bs)
1959 {
1960 	unsigned int boundary = 0;
1961 
1962 	if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) {
1963 		if (le16_to_cpu(id->nabspf))
1964 			boundary = (le16_to_cpu(id->nabspf) + 1) * bs;
1965 	}
1966 	lim->atomic_write_hw_max = atomic_bs;
1967 	lim->atomic_write_hw_boundary = boundary;
1968 	lim->atomic_write_hw_unit_min = bs;
1969 	lim->atomic_write_hw_unit_max = rounddown_pow_of_two(atomic_bs);
1970 }
1971 
1972 static u32 nvme_max_drv_segments(struct nvme_ctrl *ctrl)
1973 {
1974 	return ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> SECTOR_SHIFT) + 1;
1975 }
1976 
1977 static void nvme_set_ctrl_limits(struct nvme_ctrl *ctrl,
1978 		struct queue_limits *lim)
1979 {
1980 	lim->max_hw_sectors = ctrl->max_hw_sectors;
1981 	lim->max_segments = min_t(u32, USHRT_MAX,
1982 		min_not_zero(nvme_max_drv_segments(ctrl), ctrl->max_segments));
1983 	lim->max_integrity_segments = ctrl->max_integrity_segments;
1984 	lim->virt_boundary_mask = NVME_CTRL_PAGE_SIZE - 1;
1985 	lim->max_segment_size = UINT_MAX;
1986 	lim->dma_alignment = 3;
1987 }
1988 
1989 static bool nvme_update_disk_info(struct nvme_ns *ns, struct nvme_id_ns *id,
1990 		struct queue_limits *lim)
1991 {
1992 	struct nvme_ns_head *head = ns->head;
1993 	u32 bs = 1U << head->lba_shift;
1994 	u32 atomic_bs, phys_bs, io_opt = 0;
1995 	bool valid = true;
1996 
1997 	/*
1998 	 * The block layer can't support LBA sizes larger than the page size
1999 	 * or smaller than a sector size yet, so catch this early and don't
2000 	 * allow block I/O.
2001 	 */
2002 	if (head->lba_shift > PAGE_SHIFT || head->lba_shift < SECTOR_SHIFT) {
2003 		bs = (1 << 9);
2004 		valid = false;
2005 	}
2006 
2007 	atomic_bs = phys_bs = bs;
2008 	if (id->nabo == 0) {
2009 		/*
2010 		 * Bit 1 indicates whether NAWUPF is defined for this namespace
2011 		 * and whether it should be used instead of AWUPF. If NAWUPF ==
2012 		 * 0 then AWUPF must be used instead.
2013 		 */
2014 		if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf)
2015 			atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs;
2016 		else
2017 			atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs;
2018 
2019 		nvme_update_atomic_write_disk_info(ns, id, lim, bs, atomic_bs);
2020 	}
2021 
2022 	if (id->nsfeat & NVME_NS_FEAT_IO_OPT) {
2023 		/* NPWG = Namespace Preferred Write Granularity */
2024 		phys_bs = bs * (1 + le16_to_cpu(id->npwg));
2025 		/* NOWS = Namespace Optimal Write Size */
2026 		if (id->nows)
2027 			io_opt = bs * (1 + le16_to_cpu(id->nows));
2028 	}
2029 
2030 	/*
2031 	 * Linux filesystems assume writing a single physical block is
2032 	 * an atomic operation. Hence limit the physical block size to the
2033 	 * value of the Atomic Write Unit Power Fail parameter.
2034 	 */
2035 	lim->logical_block_size = bs;
2036 	lim->physical_block_size = min(phys_bs, atomic_bs);
2037 	lim->io_min = phys_bs;
2038 	lim->io_opt = io_opt;
2039 	if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
2040 		lim->max_write_zeroes_sectors = UINT_MAX;
2041 	else
2042 		lim->max_write_zeroes_sectors = ns->ctrl->max_zeroes_sectors;
2043 	return valid;
2044 }
2045 
2046 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info)
2047 {
2048 	return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags);
2049 }
2050 
2051 static inline bool nvme_first_scan(struct gendisk *disk)
2052 {
2053 	/* nvme_alloc_ns() scans the disk prior to adding it */
2054 	return !disk_live(disk);
2055 }
2056 
2057 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id,
2058 		struct queue_limits *lim)
2059 {
2060 	struct nvme_ctrl *ctrl = ns->ctrl;
2061 	u32 iob;
2062 
2063 	if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) &&
2064 	    is_power_of_2(ctrl->max_hw_sectors))
2065 		iob = ctrl->max_hw_sectors;
2066 	else
2067 		iob = nvme_lba_to_sect(ns->head, le16_to_cpu(id->noiob));
2068 
2069 	if (!iob)
2070 		return;
2071 
2072 	if (!is_power_of_2(iob)) {
2073 		if (nvme_first_scan(ns->disk))
2074 			pr_warn("%s: ignoring unaligned IO boundary:%u\n",
2075 				ns->disk->disk_name, iob);
2076 		return;
2077 	}
2078 
2079 	if (blk_queue_is_zoned(ns->disk->queue)) {
2080 		if (nvme_first_scan(ns->disk))
2081 			pr_warn("%s: ignoring zoned namespace IO boundary\n",
2082 				ns->disk->disk_name);
2083 		return;
2084 	}
2085 
2086 	lim->chunk_sectors = iob;
2087 }
2088 
2089 static int nvme_update_ns_info_generic(struct nvme_ns *ns,
2090 		struct nvme_ns_info *info)
2091 {
2092 	struct queue_limits lim;
2093 	int ret;
2094 
2095 	blk_mq_freeze_queue(ns->disk->queue);
2096 	lim = queue_limits_start_update(ns->disk->queue);
2097 	nvme_set_ctrl_limits(ns->ctrl, &lim);
2098 	ret = queue_limits_commit_update(ns->disk->queue, &lim);
2099 	set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2100 	blk_mq_unfreeze_queue(ns->disk->queue);
2101 
2102 	/* Hide the block-interface for these devices */
2103 	if (!ret)
2104 		ret = -ENODEV;
2105 	return ret;
2106 }
2107 
2108 static int nvme_update_ns_info_block(struct nvme_ns *ns,
2109 		struct nvme_ns_info *info)
2110 {
2111 	struct queue_limits lim;
2112 	struct nvme_id_ns_nvm *nvm = NULL;
2113 	struct nvme_zone_info zi = {};
2114 	struct nvme_id_ns *id;
2115 	sector_t capacity;
2116 	unsigned lbaf;
2117 	int ret;
2118 
2119 	ret = nvme_identify_ns(ns->ctrl, info->nsid, &id);
2120 	if (ret)
2121 		return ret;
2122 
2123 	if (id->ncap == 0) {
2124 		/* namespace not allocated or attached */
2125 		info->is_removed = true;
2126 		ret = -ENXIO;
2127 		goto out;
2128 	}
2129 	lbaf = nvme_lbaf_index(id->flbas);
2130 
2131 	if (ns->ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) {
2132 		ret = nvme_identify_ns_nvm(ns->ctrl, info->nsid, &nvm);
2133 		if (ret < 0)
2134 			goto out;
2135 	}
2136 
2137 	if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
2138 	    ns->head->ids.csi == NVME_CSI_ZNS) {
2139 		ret = nvme_query_zone_info(ns, lbaf, &zi);
2140 		if (ret < 0)
2141 			goto out;
2142 	}
2143 
2144 	blk_mq_freeze_queue(ns->disk->queue);
2145 	ns->head->lba_shift = id->lbaf[lbaf].ds;
2146 	ns->head->nuse = le64_to_cpu(id->nuse);
2147 	capacity = nvme_lba_to_sect(ns->head, le64_to_cpu(id->nsze));
2148 
2149 	lim = queue_limits_start_update(ns->disk->queue);
2150 	nvme_set_ctrl_limits(ns->ctrl, &lim);
2151 	nvme_configure_metadata(ns->ctrl, ns->head, id, nvm, info);
2152 	nvme_set_chunk_sectors(ns, id, &lim);
2153 	if (!nvme_update_disk_info(ns, id, &lim))
2154 		capacity = 0;
2155 	nvme_config_discard(ns, &lim);
2156 	if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
2157 	    ns->head->ids.csi == NVME_CSI_ZNS)
2158 		nvme_update_zone_info(ns, &lim, &zi);
2159 
2160 	if (ns->ctrl->vwc & NVME_CTRL_VWC_PRESENT)
2161 		lim.features |= BLK_FEAT_WRITE_CACHE | BLK_FEAT_FUA;
2162 	else
2163 		lim.features &= ~(BLK_FEAT_WRITE_CACHE | BLK_FEAT_FUA);
2164 
2165 	/*
2166 	 * Register a metadata profile for PI, or the plain non-integrity NVMe
2167 	 * metadata masquerading as Type 0 if supported, otherwise reject block
2168 	 * I/O to namespaces with metadata except when the namespace supports
2169 	 * PI, as it can strip/insert in that case.
2170 	 */
2171 	if (!nvme_init_integrity(ns->head, &lim, info))
2172 		capacity = 0;
2173 
2174 	ret = queue_limits_commit_update(ns->disk->queue, &lim);
2175 	if (ret) {
2176 		blk_mq_unfreeze_queue(ns->disk->queue);
2177 		goto out;
2178 	}
2179 
2180 	set_capacity_and_notify(ns->disk, capacity);
2181 
2182 	/*
2183 	 * Only set the DEAC bit if the device guarantees that reads from
2184 	 * deallocated data return zeroes.  While the DEAC bit does not
2185 	 * require that, it must be a no-op if reads from deallocated data
2186 	 * do not return zeroes.
2187 	 */
2188 	if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3)))
2189 		ns->head->features |= NVME_NS_DEAC;
2190 	set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2191 	set_bit(NVME_NS_READY, &ns->flags);
2192 	blk_mq_unfreeze_queue(ns->disk->queue);
2193 
2194 	if (blk_queue_is_zoned(ns->queue)) {
2195 		ret = blk_revalidate_disk_zones(ns->disk);
2196 		if (ret && !nvme_first_scan(ns->disk))
2197 			goto out;
2198 	}
2199 
2200 	ret = 0;
2201 out:
2202 	kfree(nvm);
2203 	kfree(id);
2204 	return ret;
2205 }
2206 
2207 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info)
2208 {
2209 	bool unsupported = false;
2210 	int ret;
2211 
2212 	switch (info->ids.csi) {
2213 	case NVME_CSI_ZNS:
2214 		if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) {
2215 			dev_info(ns->ctrl->device,
2216 	"block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n",
2217 				info->nsid);
2218 			ret = nvme_update_ns_info_generic(ns, info);
2219 			break;
2220 		}
2221 		ret = nvme_update_ns_info_block(ns, info);
2222 		break;
2223 	case NVME_CSI_NVM:
2224 		ret = nvme_update_ns_info_block(ns, info);
2225 		break;
2226 	default:
2227 		dev_info(ns->ctrl->device,
2228 			"block device for nsid %u not supported (csi %u)\n",
2229 			info->nsid, info->ids.csi);
2230 		ret = nvme_update_ns_info_generic(ns, info);
2231 		break;
2232 	}
2233 
2234 	/*
2235 	 * If probing fails due an unsupported feature, hide the block device,
2236 	 * but still allow other access.
2237 	 */
2238 	if (ret == -ENODEV) {
2239 		ns->disk->flags |= GENHD_FL_HIDDEN;
2240 		set_bit(NVME_NS_READY, &ns->flags);
2241 		unsupported = true;
2242 		ret = 0;
2243 	}
2244 
2245 	if (!ret && nvme_ns_head_multipath(ns->head)) {
2246 		struct queue_limits *ns_lim = &ns->disk->queue->limits;
2247 		struct queue_limits lim;
2248 
2249 		blk_mq_freeze_queue(ns->head->disk->queue);
2250 		/*
2251 		 * queue_limits mixes values that are the hardware limitations
2252 		 * for bio splitting with what is the device configuration.
2253 		 *
2254 		 * For NVMe the device configuration can change after e.g. a
2255 		 * Format command, and we really want to pick up the new format
2256 		 * value here.  But we must still stack the queue limits to the
2257 		 * least common denominator for multipathing to split the bios
2258 		 * properly.
2259 		 *
2260 		 * To work around this, we explicitly set the device
2261 		 * configuration to those that we just queried, but only stack
2262 		 * the splitting limits in to make sure we still obey possibly
2263 		 * lower limitations of other controllers.
2264 		 */
2265 		lim = queue_limits_start_update(ns->head->disk->queue);
2266 		lim.logical_block_size = ns_lim->logical_block_size;
2267 		lim.physical_block_size = ns_lim->physical_block_size;
2268 		lim.io_min = ns_lim->io_min;
2269 		lim.io_opt = ns_lim->io_opt;
2270 		queue_limits_stack_bdev(&lim, ns->disk->part0, 0,
2271 					ns->head->disk->disk_name);
2272 		if (unsupported)
2273 			ns->head->disk->flags |= GENHD_FL_HIDDEN;
2274 		else
2275 			nvme_init_integrity(ns->head, &lim, info);
2276 		ret = queue_limits_commit_update(ns->head->disk->queue, &lim);
2277 
2278 		set_capacity_and_notify(ns->head->disk, get_capacity(ns->disk));
2279 		set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
2280 		nvme_mpath_revalidate_paths(ns);
2281 
2282 		blk_mq_unfreeze_queue(ns->head->disk->queue);
2283 	}
2284 
2285 	return ret;
2286 }
2287 
2288 int nvme_ns_get_unique_id(struct nvme_ns *ns, u8 id[16],
2289 		enum blk_unique_id type)
2290 {
2291 	struct nvme_ns_ids *ids = &ns->head->ids;
2292 
2293 	if (type != BLK_UID_EUI64)
2294 		return -EINVAL;
2295 
2296 	if (memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) {
2297 		memcpy(id, &ids->nguid, sizeof(ids->nguid));
2298 		return sizeof(ids->nguid);
2299 	}
2300 	if (memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) {
2301 		memcpy(id, &ids->eui64, sizeof(ids->eui64));
2302 		return sizeof(ids->eui64);
2303 	}
2304 
2305 	return -EINVAL;
2306 }
2307 
2308 static int nvme_get_unique_id(struct gendisk *disk, u8 id[16],
2309 		enum blk_unique_id type)
2310 {
2311 	return nvme_ns_get_unique_id(disk->private_data, id, type);
2312 }
2313 
2314 #ifdef CONFIG_BLK_SED_OPAL
2315 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
2316 		bool send)
2317 {
2318 	struct nvme_ctrl *ctrl = data;
2319 	struct nvme_command cmd = { };
2320 
2321 	if (send)
2322 		cmd.common.opcode = nvme_admin_security_send;
2323 	else
2324 		cmd.common.opcode = nvme_admin_security_recv;
2325 	cmd.common.nsid = 0;
2326 	cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
2327 	cmd.common.cdw11 = cpu_to_le32(len);
2328 
2329 	return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
2330 			NVME_QID_ANY, NVME_SUBMIT_AT_HEAD);
2331 }
2332 
2333 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2334 {
2335 	if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) {
2336 		if (!ctrl->opal_dev)
2337 			ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit);
2338 		else if (was_suspended)
2339 			opal_unlock_from_suspend(ctrl->opal_dev);
2340 	} else {
2341 		free_opal_dev(ctrl->opal_dev);
2342 		ctrl->opal_dev = NULL;
2343 	}
2344 }
2345 #else
2346 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2347 {
2348 }
2349 #endif /* CONFIG_BLK_SED_OPAL */
2350 
2351 #ifdef CONFIG_BLK_DEV_ZONED
2352 static int nvme_report_zones(struct gendisk *disk, sector_t sector,
2353 		unsigned int nr_zones, report_zones_cb cb, void *data)
2354 {
2355 	return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb,
2356 			data);
2357 }
2358 #else
2359 #define nvme_report_zones	NULL
2360 #endif /* CONFIG_BLK_DEV_ZONED */
2361 
2362 const struct block_device_operations nvme_bdev_ops = {
2363 	.owner		= THIS_MODULE,
2364 	.ioctl		= nvme_ioctl,
2365 	.compat_ioctl	= blkdev_compat_ptr_ioctl,
2366 	.open		= nvme_open,
2367 	.release	= nvme_release,
2368 	.getgeo		= nvme_getgeo,
2369 	.get_unique_id	= nvme_get_unique_id,
2370 	.report_zones	= nvme_report_zones,
2371 	.pr_ops		= &nvme_pr_ops,
2372 };
2373 
2374 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val,
2375 		u32 timeout, const char *op)
2376 {
2377 	unsigned long timeout_jiffies = jiffies + timeout * HZ;
2378 	u32 csts;
2379 	int ret;
2380 
2381 	while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
2382 		if (csts == ~0)
2383 			return -ENODEV;
2384 		if ((csts & mask) == val)
2385 			break;
2386 
2387 		usleep_range(1000, 2000);
2388 		if (fatal_signal_pending(current))
2389 			return -EINTR;
2390 		if (time_after(jiffies, timeout_jiffies)) {
2391 			dev_err(ctrl->device,
2392 				"Device not ready; aborting %s, CSTS=0x%x\n",
2393 				op, csts);
2394 			return -ENODEV;
2395 		}
2396 	}
2397 
2398 	return ret;
2399 }
2400 
2401 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown)
2402 {
2403 	int ret;
2404 
2405 	ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
2406 	if (shutdown)
2407 		ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
2408 	else
2409 		ctrl->ctrl_config &= ~NVME_CC_ENABLE;
2410 
2411 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2412 	if (ret)
2413 		return ret;
2414 
2415 	if (shutdown) {
2416 		return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK,
2417 				       NVME_CSTS_SHST_CMPLT,
2418 				       ctrl->shutdown_timeout, "shutdown");
2419 	}
2420 	if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
2421 		msleep(NVME_QUIRK_DELAY_AMOUNT);
2422 	return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0,
2423 			       (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset");
2424 }
2425 EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
2426 
2427 int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
2428 {
2429 	unsigned dev_page_min;
2430 	u32 timeout;
2431 	int ret;
2432 
2433 	ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2434 	if (ret) {
2435 		dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
2436 		return ret;
2437 	}
2438 	dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12;
2439 
2440 	if (NVME_CTRL_PAGE_SHIFT < dev_page_min) {
2441 		dev_err(ctrl->device,
2442 			"Minimum device page size %u too large for host (%u)\n",
2443 			1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT);
2444 		return -ENODEV;
2445 	}
2446 
2447 	if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI)
2448 		ctrl->ctrl_config = NVME_CC_CSS_CSI;
2449 	else
2450 		ctrl->ctrl_config = NVME_CC_CSS_NVM;
2451 
2452 	/*
2453 	 * Setting CRIME results in CSTS.RDY before the media is ready. This
2454 	 * makes it possible for media related commands to return the error
2455 	 * NVME_SC_ADMIN_COMMAND_MEDIA_NOT_READY. Until the driver is
2456 	 * restructured to handle retries, disable CC.CRIME.
2457 	 */
2458 	ctrl->ctrl_config &= ~NVME_CC_CRIME;
2459 
2460 	ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
2461 	ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
2462 	ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
2463 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2464 	if (ret)
2465 		return ret;
2466 
2467 	/* CAP value may change after initial CC write */
2468 	ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2469 	if (ret)
2470 		return ret;
2471 
2472 	timeout = NVME_CAP_TIMEOUT(ctrl->cap);
2473 	if (ctrl->cap & NVME_CAP_CRMS_CRWMS) {
2474 		u32 crto, ready_timeout;
2475 
2476 		ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto);
2477 		if (ret) {
2478 			dev_err(ctrl->device, "Reading CRTO failed (%d)\n",
2479 				ret);
2480 			return ret;
2481 		}
2482 
2483 		/*
2484 		 * CRTO should always be greater or equal to CAP.TO, but some
2485 		 * devices are known to get this wrong. Use the larger of the
2486 		 * two values.
2487 		 */
2488 		ready_timeout = NVME_CRTO_CRWMT(crto);
2489 
2490 		if (ready_timeout < timeout)
2491 			dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n",
2492 				      crto, ctrl->cap);
2493 		else
2494 			timeout = ready_timeout;
2495 	}
2496 
2497 	ctrl->ctrl_config |= NVME_CC_ENABLE;
2498 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2499 	if (ret)
2500 		return ret;
2501 	return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY,
2502 			       (timeout + 1) / 2, "initialisation");
2503 }
2504 EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
2505 
2506 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
2507 {
2508 	__le64 ts;
2509 	int ret;
2510 
2511 	if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
2512 		return 0;
2513 
2514 	ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
2515 	ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
2516 			NULL);
2517 	if (ret)
2518 		dev_warn_once(ctrl->device,
2519 			"could not set timestamp (%d)\n", ret);
2520 	return ret;
2521 }
2522 
2523 static int nvme_configure_host_options(struct nvme_ctrl *ctrl)
2524 {
2525 	struct nvme_feat_host_behavior *host;
2526 	u8 acre = 0, lbafee = 0;
2527 	int ret;
2528 
2529 	/* Don't bother enabling the feature if retry delay is not reported */
2530 	if (ctrl->crdt[0])
2531 		acre = NVME_ENABLE_ACRE;
2532 	if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)
2533 		lbafee = NVME_ENABLE_LBAFEE;
2534 
2535 	if (!acre && !lbafee)
2536 		return 0;
2537 
2538 	host = kzalloc(sizeof(*host), GFP_KERNEL);
2539 	if (!host)
2540 		return 0;
2541 
2542 	host->acre = acre;
2543 	host->lbafee = lbafee;
2544 	ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0,
2545 				host, sizeof(*host), NULL);
2546 	kfree(host);
2547 	return ret;
2548 }
2549 
2550 /*
2551  * The function checks whether the given total (exlat + enlat) latency of
2552  * a power state allows the latter to be used as an APST transition target.
2553  * It does so by comparing the latency to the primary and secondary latency
2554  * tolerances defined by module params. If there's a match, the corresponding
2555  * timeout value is returned and the matching tolerance index (1 or 2) is
2556  * reported.
2557  */
2558 static bool nvme_apst_get_transition_time(u64 total_latency,
2559 		u64 *transition_time, unsigned *last_index)
2560 {
2561 	if (total_latency <= apst_primary_latency_tol_us) {
2562 		if (*last_index == 1)
2563 			return false;
2564 		*last_index = 1;
2565 		*transition_time = apst_primary_timeout_ms;
2566 		return true;
2567 	}
2568 	if (apst_secondary_timeout_ms &&
2569 		total_latency <= apst_secondary_latency_tol_us) {
2570 		if (*last_index <= 2)
2571 			return false;
2572 		*last_index = 2;
2573 		*transition_time = apst_secondary_timeout_ms;
2574 		return true;
2575 	}
2576 	return false;
2577 }
2578 
2579 /*
2580  * APST (Autonomous Power State Transition) lets us program a table of power
2581  * state transitions that the controller will perform automatically.
2582  *
2583  * Depending on module params, one of the two supported techniques will be used:
2584  *
2585  * - If the parameters provide explicit timeouts and tolerances, they will be
2586  *   used to build a table with up to 2 non-operational states to transition to.
2587  *   The default parameter values were selected based on the values used by
2588  *   Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic
2589  *   regeneration of the APST table in the event of switching between external
2590  *   and battery power, the timeouts and tolerances reflect a compromise
2591  *   between values used by Microsoft for AC and battery scenarios.
2592  * - If not, we'll configure the table with a simple heuristic: we are willing
2593  *   to spend at most 2% of the time transitioning between power states.
2594  *   Therefore, when running in any given state, we will enter the next
2595  *   lower-power non-operational state after waiting 50 * (enlat + exlat)
2596  *   microseconds, as long as that state's exit latency is under the requested
2597  *   maximum latency.
2598  *
2599  * We will not autonomously enter any non-operational state for which the total
2600  * latency exceeds ps_max_latency_us.
2601  *
2602  * Users can set ps_max_latency_us to zero to turn off APST.
2603  */
2604 static int nvme_configure_apst(struct nvme_ctrl *ctrl)
2605 {
2606 	struct nvme_feat_auto_pst *table;
2607 	unsigned apste = 0;
2608 	u64 max_lat_us = 0;
2609 	__le64 target = 0;
2610 	int max_ps = -1;
2611 	int state;
2612 	int ret;
2613 	unsigned last_lt_index = UINT_MAX;
2614 
2615 	/*
2616 	 * If APST isn't supported or if we haven't been initialized yet,
2617 	 * then don't do anything.
2618 	 */
2619 	if (!ctrl->apsta)
2620 		return 0;
2621 
2622 	if (ctrl->npss > 31) {
2623 		dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
2624 		return 0;
2625 	}
2626 
2627 	table = kzalloc(sizeof(*table), GFP_KERNEL);
2628 	if (!table)
2629 		return 0;
2630 
2631 	if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
2632 		/* Turn off APST. */
2633 		dev_dbg(ctrl->device, "APST disabled\n");
2634 		goto done;
2635 	}
2636 
2637 	/*
2638 	 * Walk through all states from lowest- to highest-power.
2639 	 * According to the spec, lower-numbered states use more power.  NPSS,
2640 	 * despite the name, is the index of the lowest-power state, not the
2641 	 * number of states.
2642 	 */
2643 	for (state = (int)ctrl->npss; state >= 0; state--) {
2644 		u64 total_latency_us, exit_latency_us, transition_ms;
2645 
2646 		if (target)
2647 			table->entries[state] = target;
2648 
2649 		/*
2650 		 * Don't allow transitions to the deepest state if it's quirked
2651 		 * off.
2652 		 */
2653 		if (state == ctrl->npss &&
2654 		    (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
2655 			continue;
2656 
2657 		/*
2658 		 * Is this state a useful non-operational state for higher-power
2659 		 * states to autonomously transition to?
2660 		 */
2661 		if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE))
2662 			continue;
2663 
2664 		exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
2665 		if (exit_latency_us > ctrl->ps_max_latency_us)
2666 			continue;
2667 
2668 		total_latency_us = exit_latency_us +
2669 			le32_to_cpu(ctrl->psd[state].entry_lat);
2670 
2671 		/*
2672 		 * This state is good. It can be used as the APST idle target
2673 		 * for higher power states.
2674 		 */
2675 		if (apst_primary_timeout_ms && apst_primary_latency_tol_us) {
2676 			if (!nvme_apst_get_transition_time(total_latency_us,
2677 					&transition_ms, &last_lt_index))
2678 				continue;
2679 		} else {
2680 			transition_ms = total_latency_us + 19;
2681 			do_div(transition_ms, 20);
2682 			if (transition_ms > (1 << 24) - 1)
2683 				transition_ms = (1 << 24) - 1;
2684 		}
2685 
2686 		target = cpu_to_le64((state << 3) | (transition_ms << 8));
2687 		if (max_ps == -1)
2688 			max_ps = state;
2689 		if (total_latency_us > max_lat_us)
2690 			max_lat_us = total_latency_us;
2691 	}
2692 
2693 	if (max_ps == -1)
2694 		dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
2695 	else
2696 		dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
2697 			max_ps, max_lat_us, (int)sizeof(*table), table);
2698 	apste = 1;
2699 
2700 done:
2701 	ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
2702 				table, sizeof(*table), NULL);
2703 	if (ret)
2704 		dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
2705 	kfree(table);
2706 	return ret;
2707 }
2708 
2709 static void nvme_set_latency_tolerance(struct device *dev, s32 val)
2710 {
2711 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2712 	u64 latency;
2713 
2714 	switch (val) {
2715 	case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
2716 	case PM_QOS_LATENCY_ANY:
2717 		latency = U64_MAX;
2718 		break;
2719 
2720 	default:
2721 		latency = val;
2722 	}
2723 
2724 	if (ctrl->ps_max_latency_us != latency) {
2725 		ctrl->ps_max_latency_us = latency;
2726 		if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
2727 			nvme_configure_apst(ctrl);
2728 	}
2729 }
2730 
2731 struct nvme_core_quirk_entry {
2732 	/*
2733 	 * NVMe model and firmware strings are padded with spaces.  For
2734 	 * simplicity, strings in the quirk table are padded with NULLs
2735 	 * instead.
2736 	 */
2737 	u16 vid;
2738 	const char *mn;
2739 	const char *fr;
2740 	unsigned long quirks;
2741 };
2742 
2743 static const struct nvme_core_quirk_entry core_quirks[] = {
2744 	{
2745 		/*
2746 		 * This Toshiba device seems to die using any APST states.  See:
2747 		 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
2748 		 */
2749 		.vid = 0x1179,
2750 		.mn = "THNSF5256GPUK TOSHIBA",
2751 		.quirks = NVME_QUIRK_NO_APST,
2752 	},
2753 	{
2754 		/*
2755 		 * This LiteON CL1-3D*-Q11 firmware version has a race
2756 		 * condition associated with actions related to suspend to idle
2757 		 * LiteON has resolved the problem in future firmware
2758 		 */
2759 		.vid = 0x14a4,
2760 		.fr = "22301111",
2761 		.quirks = NVME_QUIRK_SIMPLE_SUSPEND,
2762 	},
2763 	{
2764 		/*
2765 		 * This Kioxia CD6-V Series / HPE PE8030 device times out and
2766 		 * aborts I/O during any load, but more easily reproducible
2767 		 * with discards (fstrim).
2768 		 *
2769 		 * The device is left in a state where it is also not possible
2770 		 * to use "nvme set-feature" to disable APST, but booting with
2771 		 * nvme_core.default_ps_max_latency=0 works.
2772 		 */
2773 		.vid = 0x1e0f,
2774 		.mn = "KCD6XVUL6T40",
2775 		.quirks = NVME_QUIRK_NO_APST,
2776 	},
2777 	{
2778 		/*
2779 		 * The external Samsung X5 SSD fails initialization without a
2780 		 * delay before checking if it is ready and has a whole set of
2781 		 * other problems.  To make this even more interesting, it
2782 		 * shares the PCI ID with internal Samsung 970 Evo Plus that
2783 		 * does not need or want these quirks.
2784 		 */
2785 		.vid = 0x144d,
2786 		.mn = "Samsung Portable SSD X5",
2787 		.quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY |
2788 			  NVME_QUIRK_NO_DEEPEST_PS |
2789 			  NVME_QUIRK_IGNORE_DEV_SUBNQN,
2790 	}
2791 };
2792 
2793 /* match is null-terminated but idstr is space-padded. */
2794 static bool string_matches(const char *idstr, const char *match, size_t len)
2795 {
2796 	size_t matchlen;
2797 
2798 	if (!match)
2799 		return true;
2800 
2801 	matchlen = strlen(match);
2802 	WARN_ON_ONCE(matchlen > len);
2803 
2804 	if (memcmp(idstr, match, matchlen))
2805 		return false;
2806 
2807 	for (; matchlen < len; matchlen++)
2808 		if (idstr[matchlen] != ' ')
2809 			return false;
2810 
2811 	return true;
2812 }
2813 
2814 static bool quirk_matches(const struct nvme_id_ctrl *id,
2815 			  const struct nvme_core_quirk_entry *q)
2816 {
2817 	return q->vid == le16_to_cpu(id->vid) &&
2818 		string_matches(id->mn, q->mn, sizeof(id->mn)) &&
2819 		string_matches(id->fr, q->fr, sizeof(id->fr));
2820 }
2821 
2822 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl,
2823 		struct nvme_id_ctrl *id)
2824 {
2825 	size_t nqnlen;
2826 	int off;
2827 
2828 	if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) {
2829 		nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
2830 		if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
2831 			strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE);
2832 			return;
2833 		}
2834 
2835 		if (ctrl->vs >= NVME_VS(1, 2, 1))
2836 			dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
2837 	}
2838 
2839 	/*
2840 	 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe
2841 	 * Base Specification 2.0.  It is slightly different from the format
2842 	 * specified there due to historic reasons, and we can't change it now.
2843 	 */
2844 	off = snprintf(subsys->subnqn, NVMF_NQN_SIZE,
2845 			"nqn.2014.08.org.nvmexpress:%04x%04x",
2846 			le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
2847 	memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn));
2848 	off += sizeof(id->sn);
2849 	memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn));
2850 	off += sizeof(id->mn);
2851 	memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off);
2852 }
2853 
2854 static void nvme_release_subsystem(struct device *dev)
2855 {
2856 	struct nvme_subsystem *subsys =
2857 		container_of(dev, struct nvme_subsystem, dev);
2858 
2859 	if (subsys->instance >= 0)
2860 		ida_free(&nvme_instance_ida, subsys->instance);
2861 	kfree(subsys);
2862 }
2863 
2864 static void nvme_destroy_subsystem(struct kref *ref)
2865 {
2866 	struct nvme_subsystem *subsys =
2867 			container_of(ref, struct nvme_subsystem, ref);
2868 
2869 	mutex_lock(&nvme_subsystems_lock);
2870 	list_del(&subsys->entry);
2871 	mutex_unlock(&nvme_subsystems_lock);
2872 
2873 	ida_destroy(&subsys->ns_ida);
2874 	device_del(&subsys->dev);
2875 	put_device(&subsys->dev);
2876 }
2877 
2878 static void nvme_put_subsystem(struct nvme_subsystem *subsys)
2879 {
2880 	kref_put(&subsys->ref, nvme_destroy_subsystem);
2881 }
2882 
2883 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn)
2884 {
2885 	struct nvme_subsystem *subsys;
2886 
2887 	lockdep_assert_held(&nvme_subsystems_lock);
2888 
2889 	/*
2890 	 * Fail matches for discovery subsystems. This results
2891 	 * in each discovery controller bound to a unique subsystem.
2892 	 * This avoids issues with validating controller values
2893 	 * that can only be true when there is a single unique subsystem.
2894 	 * There may be multiple and completely independent entities
2895 	 * that provide discovery controllers.
2896 	 */
2897 	if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME))
2898 		return NULL;
2899 
2900 	list_for_each_entry(subsys, &nvme_subsystems, entry) {
2901 		if (strcmp(subsys->subnqn, subsysnqn))
2902 			continue;
2903 		if (!kref_get_unless_zero(&subsys->ref))
2904 			continue;
2905 		return subsys;
2906 	}
2907 
2908 	return NULL;
2909 }
2910 
2911 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl)
2912 {
2913 	return ctrl->opts && ctrl->opts->discovery_nqn;
2914 }
2915 
2916 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys,
2917 		struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2918 {
2919 	struct nvme_ctrl *tmp;
2920 
2921 	lockdep_assert_held(&nvme_subsystems_lock);
2922 
2923 	list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) {
2924 		if (nvme_state_terminal(tmp))
2925 			continue;
2926 
2927 		if (tmp->cntlid == ctrl->cntlid) {
2928 			dev_err(ctrl->device,
2929 				"Duplicate cntlid %u with %s, subsys %s, rejecting\n",
2930 				ctrl->cntlid, dev_name(tmp->device),
2931 				subsys->subnqn);
2932 			return false;
2933 		}
2934 
2935 		if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) ||
2936 		    nvme_discovery_ctrl(ctrl))
2937 			continue;
2938 
2939 		dev_err(ctrl->device,
2940 			"Subsystem does not support multiple controllers\n");
2941 		return false;
2942 	}
2943 
2944 	return true;
2945 }
2946 
2947 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2948 {
2949 	struct nvme_subsystem *subsys, *found;
2950 	int ret;
2951 
2952 	subsys = kzalloc(sizeof(*subsys), GFP_KERNEL);
2953 	if (!subsys)
2954 		return -ENOMEM;
2955 
2956 	subsys->instance = -1;
2957 	mutex_init(&subsys->lock);
2958 	kref_init(&subsys->ref);
2959 	INIT_LIST_HEAD(&subsys->ctrls);
2960 	INIT_LIST_HEAD(&subsys->nsheads);
2961 	nvme_init_subnqn(subsys, ctrl, id);
2962 	memcpy(subsys->serial, id->sn, sizeof(subsys->serial));
2963 	memcpy(subsys->model, id->mn, sizeof(subsys->model));
2964 	subsys->vendor_id = le16_to_cpu(id->vid);
2965 	subsys->cmic = id->cmic;
2966 
2967 	/* Versions prior to 1.4 don't necessarily report a valid type */
2968 	if (id->cntrltype == NVME_CTRL_DISC ||
2969 	    !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME))
2970 		subsys->subtype = NVME_NQN_DISC;
2971 	else
2972 		subsys->subtype = NVME_NQN_NVME;
2973 
2974 	if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) {
2975 		dev_err(ctrl->device,
2976 			"Subsystem %s is not a discovery controller",
2977 			subsys->subnqn);
2978 		kfree(subsys);
2979 		return -EINVAL;
2980 	}
2981 	subsys->awupf = le16_to_cpu(id->awupf);
2982 	nvme_mpath_default_iopolicy(subsys);
2983 
2984 	subsys->dev.class = &nvme_subsys_class;
2985 	subsys->dev.release = nvme_release_subsystem;
2986 	subsys->dev.groups = nvme_subsys_attrs_groups;
2987 	dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance);
2988 	device_initialize(&subsys->dev);
2989 
2990 	mutex_lock(&nvme_subsystems_lock);
2991 	found = __nvme_find_get_subsystem(subsys->subnqn);
2992 	if (found) {
2993 		put_device(&subsys->dev);
2994 		subsys = found;
2995 
2996 		if (!nvme_validate_cntlid(subsys, ctrl, id)) {
2997 			ret = -EINVAL;
2998 			goto out_put_subsystem;
2999 		}
3000 	} else {
3001 		ret = device_add(&subsys->dev);
3002 		if (ret) {
3003 			dev_err(ctrl->device,
3004 				"failed to register subsystem device.\n");
3005 			put_device(&subsys->dev);
3006 			goto out_unlock;
3007 		}
3008 		ida_init(&subsys->ns_ida);
3009 		list_add_tail(&subsys->entry, &nvme_subsystems);
3010 	}
3011 
3012 	ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
3013 				dev_name(ctrl->device));
3014 	if (ret) {
3015 		dev_err(ctrl->device,
3016 			"failed to create sysfs link from subsystem.\n");
3017 		goto out_put_subsystem;
3018 	}
3019 
3020 	if (!found)
3021 		subsys->instance = ctrl->instance;
3022 	ctrl->subsys = subsys;
3023 	list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
3024 	mutex_unlock(&nvme_subsystems_lock);
3025 	return 0;
3026 
3027 out_put_subsystem:
3028 	nvme_put_subsystem(subsys);
3029 out_unlock:
3030 	mutex_unlock(&nvme_subsystems_lock);
3031 	return ret;
3032 }
3033 
3034 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
3035 		void *log, size_t size, u64 offset)
3036 {
3037 	struct nvme_command c = { };
3038 	u32 dwlen = nvme_bytes_to_numd(size);
3039 
3040 	c.get_log_page.opcode = nvme_admin_get_log_page;
3041 	c.get_log_page.nsid = cpu_to_le32(nsid);
3042 	c.get_log_page.lid = log_page;
3043 	c.get_log_page.lsp = lsp;
3044 	c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1));
3045 	c.get_log_page.numdu = cpu_to_le16(dwlen >> 16);
3046 	c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset));
3047 	c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset));
3048 	c.get_log_page.csi = csi;
3049 
3050 	return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size);
3051 }
3052 
3053 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi,
3054 				struct nvme_effects_log **log)
3055 {
3056 	struct nvme_effects_log	*cel = xa_load(&ctrl->cels, csi);
3057 	int ret;
3058 
3059 	if (cel)
3060 		goto out;
3061 
3062 	cel = kzalloc(sizeof(*cel), GFP_KERNEL);
3063 	if (!cel)
3064 		return -ENOMEM;
3065 
3066 	ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi,
3067 			cel, sizeof(*cel), 0);
3068 	if (ret) {
3069 		kfree(cel);
3070 		return ret;
3071 	}
3072 
3073 	xa_store(&ctrl->cels, csi, cel, GFP_KERNEL);
3074 out:
3075 	*log = cel;
3076 	return 0;
3077 }
3078 
3079 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units)
3080 {
3081 	u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val;
3082 
3083 	if (check_shl_overflow(1U, units + page_shift - 9, &val))
3084 		return UINT_MAX;
3085 	return val;
3086 }
3087 
3088 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl)
3089 {
3090 	struct nvme_command c = { };
3091 	struct nvme_id_ctrl_nvm *id;
3092 	int ret;
3093 
3094 	/*
3095 	 * Even though NVMe spec explicitly states that MDTS is not applicable
3096 	 * to the write-zeroes, we are cautious and limit the size to the
3097 	 * controllers max_hw_sectors value, which is based on the MDTS field
3098 	 * and possibly other limiting factors.
3099 	 */
3100 	if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) &&
3101 	    !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
3102 		ctrl->max_zeroes_sectors = ctrl->max_hw_sectors;
3103 	else
3104 		ctrl->max_zeroes_sectors = 0;
3105 
3106 	if (ctrl->subsys->subtype != NVME_NQN_NVME ||
3107 	    nvme_ctrl_limited_cns(ctrl) ||
3108 	    test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags))
3109 		return 0;
3110 
3111 	id = kzalloc(sizeof(*id), GFP_KERNEL);
3112 	if (!id)
3113 		return -ENOMEM;
3114 
3115 	c.identify.opcode = nvme_admin_identify;
3116 	c.identify.cns = NVME_ID_CNS_CS_CTRL;
3117 	c.identify.csi = NVME_CSI_NVM;
3118 
3119 	ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
3120 	if (ret)
3121 		goto free_data;
3122 
3123 	ctrl->dmrl = id->dmrl;
3124 	ctrl->dmrsl = le32_to_cpu(id->dmrsl);
3125 	if (id->wzsl)
3126 		ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl);
3127 
3128 free_data:
3129 	if (ret > 0)
3130 		set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags);
3131 	kfree(id);
3132 	return ret;
3133 }
3134 
3135 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl)
3136 {
3137 	struct nvme_effects_log	*log = ctrl->effects;
3138 
3139 	log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3140 						NVME_CMD_EFFECTS_NCC |
3141 						NVME_CMD_EFFECTS_CSE_MASK);
3142 	log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3143 						NVME_CMD_EFFECTS_CSE_MASK);
3144 
3145 	/*
3146 	 * The spec says the result of a security receive command depends on
3147 	 * the previous security send command. As such, many vendors log this
3148 	 * command as one to submitted only when no other commands to the same
3149 	 * namespace are outstanding. The intention is to tell the host to
3150 	 * prevent mixing security send and receive.
3151 	 *
3152 	 * This driver can only enforce such exclusive access against IO
3153 	 * queues, though. We are not readily able to enforce such a rule for
3154 	 * two commands to the admin queue, which is the only queue that
3155 	 * matters for this command.
3156 	 *
3157 	 * Rather than blindly freezing the IO queues for this effect that
3158 	 * doesn't even apply to IO, mask it off.
3159 	 */
3160 	log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK);
3161 
3162 	log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3163 	log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3164 	log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3165 }
3166 
3167 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3168 {
3169 	int ret = 0;
3170 
3171 	if (ctrl->effects)
3172 		return 0;
3173 
3174 	if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) {
3175 		ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3176 		if (ret < 0)
3177 			return ret;
3178 	}
3179 
3180 	if (!ctrl->effects) {
3181 		ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL);
3182 		if (!ctrl->effects)
3183 			return -ENOMEM;
3184 		xa_store(&ctrl->cels, NVME_CSI_NVM, ctrl->effects, GFP_KERNEL);
3185 	}
3186 
3187 	nvme_init_known_nvm_effects(ctrl);
3188 	return 0;
3189 }
3190 
3191 static int nvme_check_ctrl_fabric_info(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3192 {
3193 	/*
3194 	 * In fabrics we need to verify the cntlid matches the
3195 	 * admin connect
3196 	 */
3197 	if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
3198 		dev_err(ctrl->device,
3199 			"Mismatching cntlid: Connect %u vs Identify %u, rejecting\n",
3200 			ctrl->cntlid, le16_to_cpu(id->cntlid));
3201 		return -EINVAL;
3202 	}
3203 
3204 	if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) {
3205 		dev_err(ctrl->device,
3206 			"keep-alive support is mandatory for fabrics\n");
3207 		return -EINVAL;
3208 	}
3209 
3210 	if (!nvme_discovery_ctrl(ctrl) && ctrl->ioccsz < 4) {
3211 		dev_err(ctrl->device,
3212 			"I/O queue command capsule supported size %d < 4\n",
3213 			ctrl->ioccsz);
3214 		return -EINVAL;
3215 	}
3216 
3217 	if (!nvme_discovery_ctrl(ctrl) && ctrl->iorcsz < 1) {
3218 		dev_err(ctrl->device,
3219 			"I/O queue response capsule supported size %d < 1\n",
3220 			ctrl->iorcsz);
3221 		return -EINVAL;
3222 	}
3223 
3224 	if (!ctrl->maxcmd) {
3225 		dev_err(ctrl->device, "Maximum outstanding commands is 0\n");
3226 		return -EINVAL;
3227 	}
3228 
3229 	return 0;
3230 }
3231 
3232 static int nvme_init_identify(struct nvme_ctrl *ctrl)
3233 {
3234 	struct queue_limits lim;
3235 	struct nvme_id_ctrl *id;
3236 	u32 max_hw_sectors;
3237 	bool prev_apst_enabled;
3238 	int ret;
3239 
3240 	ret = nvme_identify_ctrl(ctrl, &id);
3241 	if (ret) {
3242 		dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
3243 		return -EIO;
3244 	}
3245 
3246 	if (!(ctrl->ops->flags & NVME_F_FABRICS))
3247 		ctrl->cntlid = le16_to_cpu(id->cntlid);
3248 
3249 	if (!ctrl->identified) {
3250 		unsigned int i;
3251 
3252 		/*
3253 		 * Check for quirks.  Quirk can depend on firmware version,
3254 		 * so, in principle, the set of quirks present can change
3255 		 * across a reset.  As a possible future enhancement, we
3256 		 * could re-scan for quirks every time we reinitialize
3257 		 * the device, but we'd have to make sure that the driver
3258 		 * behaves intelligently if the quirks change.
3259 		 */
3260 		for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
3261 			if (quirk_matches(id, &core_quirks[i]))
3262 				ctrl->quirks |= core_quirks[i].quirks;
3263 		}
3264 
3265 		ret = nvme_init_subsystem(ctrl, id);
3266 		if (ret)
3267 			goto out_free;
3268 
3269 		ret = nvme_init_effects(ctrl, id);
3270 		if (ret)
3271 			goto out_free;
3272 	}
3273 	memcpy(ctrl->subsys->firmware_rev, id->fr,
3274 	       sizeof(ctrl->subsys->firmware_rev));
3275 
3276 	if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
3277 		dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
3278 		ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
3279 	}
3280 
3281 	ctrl->crdt[0] = le16_to_cpu(id->crdt1);
3282 	ctrl->crdt[1] = le16_to_cpu(id->crdt2);
3283 	ctrl->crdt[2] = le16_to_cpu(id->crdt3);
3284 
3285 	ctrl->oacs = le16_to_cpu(id->oacs);
3286 	ctrl->oncs = le16_to_cpu(id->oncs);
3287 	ctrl->mtfa = le16_to_cpu(id->mtfa);
3288 	ctrl->oaes = le32_to_cpu(id->oaes);
3289 	ctrl->wctemp = le16_to_cpu(id->wctemp);
3290 	ctrl->cctemp = le16_to_cpu(id->cctemp);
3291 
3292 	atomic_set(&ctrl->abort_limit, id->acl + 1);
3293 	ctrl->vwc = id->vwc;
3294 	if (id->mdts)
3295 		max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts);
3296 	else
3297 		max_hw_sectors = UINT_MAX;
3298 	ctrl->max_hw_sectors =
3299 		min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
3300 
3301 	lim = queue_limits_start_update(ctrl->admin_q);
3302 	nvme_set_ctrl_limits(ctrl, &lim);
3303 	ret = queue_limits_commit_update(ctrl->admin_q, &lim);
3304 	if (ret)
3305 		goto out_free;
3306 
3307 	ctrl->sgls = le32_to_cpu(id->sgls);
3308 	ctrl->kas = le16_to_cpu(id->kas);
3309 	ctrl->max_namespaces = le32_to_cpu(id->mnan);
3310 	ctrl->ctratt = le32_to_cpu(id->ctratt);
3311 
3312 	ctrl->cntrltype = id->cntrltype;
3313 	ctrl->dctype = id->dctype;
3314 
3315 	if (id->rtd3e) {
3316 		/* us -> s */
3317 		u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC;
3318 
3319 		ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
3320 						 shutdown_timeout, 60);
3321 
3322 		if (ctrl->shutdown_timeout != shutdown_timeout)
3323 			dev_info(ctrl->device,
3324 				 "D3 entry latency set to %u seconds\n",
3325 				 ctrl->shutdown_timeout);
3326 	} else
3327 		ctrl->shutdown_timeout = shutdown_timeout;
3328 
3329 	ctrl->npss = id->npss;
3330 	ctrl->apsta = id->apsta;
3331 	prev_apst_enabled = ctrl->apst_enabled;
3332 	if (ctrl->quirks & NVME_QUIRK_NO_APST) {
3333 		if (force_apst && id->apsta) {
3334 			dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
3335 			ctrl->apst_enabled = true;
3336 		} else {
3337 			ctrl->apst_enabled = false;
3338 		}
3339 	} else {
3340 		ctrl->apst_enabled = id->apsta;
3341 	}
3342 	memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
3343 
3344 	if (ctrl->ops->flags & NVME_F_FABRICS) {
3345 		ctrl->icdoff = le16_to_cpu(id->icdoff);
3346 		ctrl->ioccsz = le32_to_cpu(id->ioccsz);
3347 		ctrl->iorcsz = le32_to_cpu(id->iorcsz);
3348 		ctrl->maxcmd = le16_to_cpu(id->maxcmd);
3349 
3350 		ret = nvme_check_ctrl_fabric_info(ctrl, id);
3351 		if (ret)
3352 			goto out_free;
3353 	} else {
3354 		ctrl->hmpre = le32_to_cpu(id->hmpre);
3355 		ctrl->hmmin = le32_to_cpu(id->hmmin);
3356 		ctrl->hmminds = le32_to_cpu(id->hmminds);
3357 		ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
3358 	}
3359 
3360 	ret = nvme_mpath_init_identify(ctrl, id);
3361 	if (ret < 0)
3362 		goto out_free;
3363 
3364 	if (ctrl->apst_enabled && !prev_apst_enabled)
3365 		dev_pm_qos_expose_latency_tolerance(ctrl->device);
3366 	else if (!ctrl->apst_enabled && prev_apst_enabled)
3367 		dev_pm_qos_hide_latency_tolerance(ctrl->device);
3368 
3369 out_free:
3370 	kfree(id);
3371 	return ret;
3372 }
3373 
3374 /*
3375  * Initialize the cached copies of the Identify data and various controller
3376  * register in our nvme_ctrl structure.  This should be called as soon as
3377  * the admin queue is fully up and running.
3378  */
3379 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended)
3380 {
3381 	int ret;
3382 
3383 	ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
3384 	if (ret) {
3385 		dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
3386 		return ret;
3387 	}
3388 
3389 	ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize);
3390 
3391 	if (ctrl->vs >= NVME_VS(1, 1, 0))
3392 		ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap);
3393 
3394 	ret = nvme_init_identify(ctrl);
3395 	if (ret)
3396 		return ret;
3397 
3398 	ret = nvme_configure_apst(ctrl);
3399 	if (ret < 0)
3400 		return ret;
3401 
3402 	ret = nvme_configure_timestamp(ctrl);
3403 	if (ret < 0)
3404 		return ret;
3405 
3406 	ret = nvme_configure_host_options(ctrl);
3407 	if (ret < 0)
3408 		return ret;
3409 
3410 	nvme_configure_opal(ctrl, was_suspended);
3411 
3412 	if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) {
3413 		/*
3414 		 * Do not return errors unless we are in a controller reset,
3415 		 * the controller works perfectly fine without hwmon.
3416 		 */
3417 		ret = nvme_hwmon_init(ctrl);
3418 		if (ret == -EINTR)
3419 			return ret;
3420 	}
3421 
3422 	clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags);
3423 	ctrl->identified = true;
3424 
3425 	nvme_start_keep_alive(ctrl);
3426 
3427 	return 0;
3428 }
3429 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish);
3430 
3431 static int nvme_dev_open(struct inode *inode, struct file *file)
3432 {
3433 	struct nvme_ctrl *ctrl =
3434 		container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3435 
3436 	switch (nvme_ctrl_state(ctrl)) {
3437 	case NVME_CTRL_LIVE:
3438 		break;
3439 	default:
3440 		return -EWOULDBLOCK;
3441 	}
3442 
3443 	nvme_get_ctrl(ctrl);
3444 	if (!try_module_get(ctrl->ops->module)) {
3445 		nvme_put_ctrl(ctrl);
3446 		return -EINVAL;
3447 	}
3448 
3449 	file->private_data = ctrl;
3450 	return 0;
3451 }
3452 
3453 static int nvme_dev_release(struct inode *inode, struct file *file)
3454 {
3455 	struct nvme_ctrl *ctrl =
3456 		container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3457 
3458 	module_put(ctrl->ops->module);
3459 	nvme_put_ctrl(ctrl);
3460 	return 0;
3461 }
3462 
3463 static const struct file_operations nvme_dev_fops = {
3464 	.owner		= THIS_MODULE,
3465 	.open		= nvme_dev_open,
3466 	.release	= nvme_dev_release,
3467 	.unlocked_ioctl	= nvme_dev_ioctl,
3468 	.compat_ioctl	= compat_ptr_ioctl,
3469 	.uring_cmd	= nvme_dev_uring_cmd,
3470 };
3471 
3472 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl,
3473 		unsigned nsid)
3474 {
3475 	struct nvme_ns_head *h;
3476 
3477 	lockdep_assert_held(&ctrl->subsys->lock);
3478 
3479 	list_for_each_entry(h, &ctrl->subsys->nsheads, entry) {
3480 		/*
3481 		 * Private namespaces can share NSIDs under some conditions.
3482 		 * In that case we can't use the same ns_head for namespaces
3483 		 * with the same NSID.
3484 		 */
3485 		if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h))
3486 			continue;
3487 		if (!list_empty(&h->list) && nvme_tryget_ns_head(h))
3488 			return h;
3489 	}
3490 
3491 	return NULL;
3492 }
3493 
3494 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys,
3495 		struct nvme_ns_ids *ids)
3496 {
3497 	bool has_uuid = !uuid_is_null(&ids->uuid);
3498 	bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid));
3499 	bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64));
3500 	struct nvme_ns_head *h;
3501 
3502 	lockdep_assert_held(&subsys->lock);
3503 
3504 	list_for_each_entry(h, &subsys->nsheads, entry) {
3505 		if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid))
3506 			return -EINVAL;
3507 		if (has_nguid &&
3508 		    memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0)
3509 			return -EINVAL;
3510 		if (has_eui64 &&
3511 		    memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0)
3512 			return -EINVAL;
3513 	}
3514 
3515 	return 0;
3516 }
3517 
3518 static void nvme_cdev_rel(struct device *dev)
3519 {
3520 	ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt));
3521 }
3522 
3523 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device)
3524 {
3525 	cdev_device_del(cdev, cdev_device);
3526 	put_device(cdev_device);
3527 }
3528 
3529 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
3530 		const struct file_operations *fops, struct module *owner)
3531 {
3532 	int minor, ret;
3533 
3534 	minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL);
3535 	if (minor < 0)
3536 		return minor;
3537 	cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor);
3538 	cdev_device->class = &nvme_ns_chr_class;
3539 	cdev_device->release = nvme_cdev_rel;
3540 	device_initialize(cdev_device);
3541 	cdev_init(cdev, fops);
3542 	cdev->owner = owner;
3543 	ret = cdev_device_add(cdev, cdev_device);
3544 	if (ret)
3545 		put_device(cdev_device);
3546 
3547 	return ret;
3548 }
3549 
3550 static int nvme_ns_chr_open(struct inode *inode, struct file *file)
3551 {
3552 	return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev));
3553 }
3554 
3555 static int nvme_ns_chr_release(struct inode *inode, struct file *file)
3556 {
3557 	nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev));
3558 	return 0;
3559 }
3560 
3561 static const struct file_operations nvme_ns_chr_fops = {
3562 	.owner		= THIS_MODULE,
3563 	.open		= nvme_ns_chr_open,
3564 	.release	= nvme_ns_chr_release,
3565 	.unlocked_ioctl	= nvme_ns_chr_ioctl,
3566 	.compat_ioctl	= compat_ptr_ioctl,
3567 	.uring_cmd	= nvme_ns_chr_uring_cmd,
3568 	.uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll,
3569 };
3570 
3571 static int nvme_add_ns_cdev(struct nvme_ns *ns)
3572 {
3573 	int ret;
3574 
3575 	ns->cdev_device.parent = ns->ctrl->device;
3576 	ret = dev_set_name(&ns->cdev_device, "ng%dn%d",
3577 			   ns->ctrl->instance, ns->head->instance);
3578 	if (ret)
3579 		return ret;
3580 
3581 	return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops,
3582 			     ns->ctrl->ops->module);
3583 }
3584 
3585 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl,
3586 		struct nvme_ns_info *info)
3587 {
3588 	struct nvme_ns_head *head;
3589 	size_t size = sizeof(*head);
3590 	int ret = -ENOMEM;
3591 
3592 #ifdef CONFIG_NVME_MULTIPATH
3593 	size += num_possible_nodes() * sizeof(struct nvme_ns *);
3594 #endif
3595 
3596 	head = kzalloc(size, GFP_KERNEL);
3597 	if (!head)
3598 		goto out;
3599 	ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL);
3600 	if (ret < 0)
3601 		goto out_free_head;
3602 	head->instance = ret;
3603 	INIT_LIST_HEAD(&head->list);
3604 	ret = init_srcu_struct(&head->srcu);
3605 	if (ret)
3606 		goto out_ida_remove;
3607 	head->subsys = ctrl->subsys;
3608 	head->ns_id = info->nsid;
3609 	head->ids = info->ids;
3610 	head->shared = info->is_shared;
3611 	ratelimit_state_init(&head->rs_nuse, 5 * HZ, 1);
3612 	ratelimit_set_flags(&head->rs_nuse, RATELIMIT_MSG_ON_RELEASE);
3613 	kref_init(&head->ref);
3614 
3615 	if (head->ids.csi) {
3616 		ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects);
3617 		if (ret)
3618 			goto out_cleanup_srcu;
3619 	} else
3620 		head->effects = ctrl->effects;
3621 
3622 	ret = nvme_mpath_alloc_disk(ctrl, head);
3623 	if (ret)
3624 		goto out_cleanup_srcu;
3625 
3626 	list_add_tail(&head->entry, &ctrl->subsys->nsheads);
3627 
3628 	kref_get(&ctrl->subsys->ref);
3629 
3630 	return head;
3631 out_cleanup_srcu:
3632 	cleanup_srcu_struct(&head->srcu);
3633 out_ida_remove:
3634 	ida_free(&ctrl->subsys->ns_ida, head->instance);
3635 out_free_head:
3636 	kfree(head);
3637 out:
3638 	if (ret > 0)
3639 		ret = blk_status_to_errno(nvme_error_status(ret));
3640 	return ERR_PTR(ret);
3641 }
3642 
3643 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this,
3644 		struct nvme_ns_ids *ids)
3645 {
3646 	struct nvme_subsystem *s;
3647 	int ret = 0;
3648 
3649 	/*
3650 	 * Note that this check is racy as we try to avoid holding the global
3651 	 * lock over the whole ns_head creation.  But it is only intended as
3652 	 * a sanity check anyway.
3653 	 */
3654 	mutex_lock(&nvme_subsystems_lock);
3655 	list_for_each_entry(s, &nvme_subsystems, entry) {
3656 		if (s == this)
3657 			continue;
3658 		mutex_lock(&s->lock);
3659 		ret = nvme_subsys_check_duplicate_ids(s, ids);
3660 		mutex_unlock(&s->lock);
3661 		if (ret)
3662 			break;
3663 	}
3664 	mutex_unlock(&nvme_subsystems_lock);
3665 
3666 	return ret;
3667 }
3668 
3669 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info)
3670 {
3671 	struct nvme_ctrl *ctrl = ns->ctrl;
3672 	struct nvme_ns_head *head = NULL;
3673 	int ret;
3674 
3675 	ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids);
3676 	if (ret) {
3677 		/*
3678 		 * We've found two different namespaces on two different
3679 		 * subsystems that report the same ID.  This is pretty nasty
3680 		 * for anything that actually requires unique device
3681 		 * identification.  In the kernel we need this for multipathing,
3682 		 * and in user space the /dev/disk/by-id/ links rely on it.
3683 		 *
3684 		 * If the device also claims to be multi-path capable back off
3685 		 * here now and refuse the probe the second device as this is a
3686 		 * recipe for data corruption.  If not this is probably a
3687 		 * cheap consumer device if on the PCIe bus, so let the user
3688 		 * proceed and use the shiny toy, but warn that with changing
3689 		 * probing order (which due to our async probing could just be
3690 		 * device taking longer to startup) the other device could show
3691 		 * up at any time.
3692 		 */
3693 		nvme_print_device_info(ctrl);
3694 		if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */
3695 		    ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) &&
3696 		     info->is_shared)) {
3697 			dev_err(ctrl->device,
3698 				"ignoring nsid %d because of duplicate IDs\n",
3699 				info->nsid);
3700 			return ret;
3701 		}
3702 
3703 		dev_err(ctrl->device,
3704 			"clearing duplicate IDs for nsid %d\n", info->nsid);
3705 		dev_err(ctrl->device,
3706 			"use of /dev/disk/by-id/ may cause data corruption\n");
3707 		memset(&info->ids.nguid, 0, sizeof(info->ids.nguid));
3708 		memset(&info->ids.uuid, 0, sizeof(info->ids.uuid));
3709 		memset(&info->ids.eui64, 0, sizeof(info->ids.eui64));
3710 		ctrl->quirks |= NVME_QUIRK_BOGUS_NID;
3711 	}
3712 
3713 	mutex_lock(&ctrl->subsys->lock);
3714 	head = nvme_find_ns_head(ctrl, info->nsid);
3715 	if (!head) {
3716 		ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids);
3717 		if (ret) {
3718 			dev_err(ctrl->device,
3719 				"duplicate IDs in subsystem for nsid %d\n",
3720 				info->nsid);
3721 			goto out_unlock;
3722 		}
3723 		head = nvme_alloc_ns_head(ctrl, info);
3724 		if (IS_ERR(head)) {
3725 			ret = PTR_ERR(head);
3726 			goto out_unlock;
3727 		}
3728 	} else {
3729 		ret = -EINVAL;
3730 		if (!info->is_shared || !head->shared) {
3731 			dev_err(ctrl->device,
3732 				"Duplicate unshared namespace %d\n",
3733 				info->nsid);
3734 			goto out_put_ns_head;
3735 		}
3736 		if (!nvme_ns_ids_equal(&head->ids, &info->ids)) {
3737 			dev_err(ctrl->device,
3738 				"IDs don't match for shared namespace %d\n",
3739 					info->nsid);
3740 			goto out_put_ns_head;
3741 		}
3742 
3743 		if (!multipath) {
3744 			dev_warn(ctrl->device,
3745 				"Found shared namespace %d, but multipathing not supported.\n",
3746 				info->nsid);
3747 			dev_warn_once(ctrl->device,
3748 				"Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0.\n");
3749 		}
3750 	}
3751 
3752 	list_add_tail_rcu(&ns->siblings, &head->list);
3753 	ns->head = head;
3754 	mutex_unlock(&ctrl->subsys->lock);
3755 	return 0;
3756 
3757 out_put_ns_head:
3758 	nvme_put_ns_head(head);
3759 out_unlock:
3760 	mutex_unlock(&ctrl->subsys->lock);
3761 	return ret;
3762 }
3763 
3764 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3765 {
3766 	struct nvme_ns *ns, *ret = NULL;
3767 	int srcu_idx;
3768 
3769 	srcu_idx = srcu_read_lock(&ctrl->srcu);
3770 	list_for_each_entry_rcu(ns, &ctrl->namespaces, list) {
3771 		if (ns->head->ns_id == nsid) {
3772 			if (!nvme_get_ns(ns))
3773 				continue;
3774 			ret = ns;
3775 			break;
3776 		}
3777 		if (ns->head->ns_id > nsid)
3778 			break;
3779 	}
3780 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
3781 	return ret;
3782 }
3783 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU);
3784 
3785 /*
3786  * Add the namespace to the controller list while keeping the list ordered.
3787  */
3788 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns)
3789 {
3790 	struct nvme_ns *tmp;
3791 
3792 	list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) {
3793 		if (tmp->head->ns_id < ns->head->ns_id) {
3794 			list_add_rcu(&ns->list, &tmp->list);
3795 			return;
3796 		}
3797 	}
3798 	list_add(&ns->list, &ns->ctrl->namespaces);
3799 }
3800 
3801 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info)
3802 {
3803 	struct queue_limits lim = { };
3804 	struct nvme_ns *ns;
3805 	struct gendisk *disk;
3806 	int node = ctrl->numa_node;
3807 
3808 	ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
3809 	if (!ns)
3810 		return;
3811 
3812 	if (ctrl->opts && ctrl->opts->data_digest)
3813 		lim.features |= BLK_FEAT_STABLE_WRITES;
3814 	if (ctrl->ops->supports_pci_p2pdma &&
3815 	    ctrl->ops->supports_pci_p2pdma(ctrl))
3816 		lim.features |= BLK_FEAT_PCI_P2PDMA;
3817 
3818 	disk = blk_mq_alloc_disk(ctrl->tagset, &lim, ns);
3819 	if (IS_ERR(disk))
3820 		goto out_free_ns;
3821 	disk->fops = &nvme_bdev_ops;
3822 	disk->private_data = ns;
3823 
3824 	ns->disk = disk;
3825 	ns->queue = disk->queue;
3826 	ns->ctrl = ctrl;
3827 	kref_init(&ns->kref);
3828 
3829 	if (nvme_init_ns_head(ns, info))
3830 		goto out_cleanup_disk;
3831 
3832 	/*
3833 	 * If multipathing is enabled, the device name for all disks and not
3834 	 * just those that represent shared namespaces needs to be based on the
3835 	 * subsystem instance.  Using the controller instance for private
3836 	 * namespaces could lead to naming collisions between shared and private
3837 	 * namespaces if they don't use a common numbering scheme.
3838 	 *
3839 	 * If multipathing is not enabled, disk names must use the controller
3840 	 * instance as shared namespaces will show up as multiple block
3841 	 * devices.
3842 	 */
3843 	if (nvme_ns_head_multipath(ns->head)) {
3844 		sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance,
3845 			ctrl->instance, ns->head->instance);
3846 		disk->flags |= GENHD_FL_HIDDEN;
3847 	} else if (multipath) {
3848 		sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance,
3849 			ns->head->instance);
3850 	} else {
3851 		sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance,
3852 			ns->head->instance);
3853 	}
3854 
3855 	if (nvme_update_ns_info(ns, info))
3856 		goto out_unlink_ns;
3857 
3858 	mutex_lock(&ctrl->namespaces_lock);
3859 	/*
3860 	 * Ensure that no namespaces are added to the ctrl list after the queues
3861 	 * are frozen, thereby avoiding a deadlock between scan and reset.
3862 	 */
3863 	if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) {
3864 		mutex_unlock(&ctrl->namespaces_lock);
3865 		goto out_unlink_ns;
3866 	}
3867 	nvme_ns_add_to_ctrl_list(ns);
3868 	mutex_unlock(&ctrl->namespaces_lock);
3869 	synchronize_srcu(&ctrl->srcu);
3870 	nvme_get_ctrl(ctrl);
3871 
3872 	if (device_add_disk(ctrl->device, ns->disk, nvme_ns_attr_groups))
3873 		goto out_cleanup_ns_from_list;
3874 
3875 	if (!nvme_ns_head_multipath(ns->head))
3876 		nvme_add_ns_cdev(ns);
3877 
3878 	nvme_mpath_add_disk(ns, info->anagrpid);
3879 	nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name);
3880 
3881 	/*
3882 	 * Set ns->disk->device->driver_data to ns so we can access
3883 	 * ns->head->passthru_err_log_enabled in
3884 	 * nvme_io_passthru_err_log_enabled_[store | show]().
3885 	 */
3886 	dev_set_drvdata(disk_to_dev(ns->disk), ns);
3887 
3888 	return;
3889 
3890  out_cleanup_ns_from_list:
3891 	nvme_put_ctrl(ctrl);
3892 	mutex_lock(&ctrl->namespaces_lock);
3893 	list_del_rcu(&ns->list);
3894 	mutex_unlock(&ctrl->namespaces_lock);
3895 	synchronize_srcu(&ctrl->srcu);
3896  out_unlink_ns:
3897 	mutex_lock(&ctrl->subsys->lock);
3898 	list_del_rcu(&ns->siblings);
3899 	if (list_empty(&ns->head->list))
3900 		list_del_init(&ns->head->entry);
3901 	mutex_unlock(&ctrl->subsys->lock);
3902 	nvme_put_ns_head(ns->head);
3903  out_cleanup_disk:
3904 	put_disk(disk);
3905  out_free_ns:
3906 	kfree(ns);
3907 }
3908 
3909 static void nvme_ns_remove(struct nvme_ns *ns)
3910 {
3911 	bool last_path = false;
3912 
3913 	if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
3914 		return;
3915 
3916 	clear_bit(NVME_NS_READY, &ns->flags);
3917 	set_capacity(ns->disk, 0);
3918 	nvme_fault_inject_fini(&ns->fault_inject);
3919 
3920 	/*
3921 	 * Ensure that !NVME_NS_READY is seen by other threads to prevent
3922 	 * this ns going back into current_path.
3923 	 */
3924 	synchronize_srcu(&ns->head->srcu);
3925 
3926 	/* wait for concurrent submissions */
3927 	if (nvme_mpath_clear_current_path(ns))
3928 		synchronize_srcu(&ns->head->srcu);
3929 
3930 	mutex_lock(&ns->ctrl->subsys->lock);
3931 	list_del_rcu(&ns->siblings);
3932 	if (list_empty(&ns->head->list)) {
3933 		list_del_init(&ns->head->entry);
3934 		last_path = true;
3935 	}
3936 	mutex_unlock(&ns->ctrl->subsys->lock);
3937 
3938 	/* guarantee not available in head->list */
3939 	synchronize_srcu(&ns->head->srcu);
3940 
3941 	if (!nvme_ns_head_multipath(ns->head))
3942 		nvme_cdev_del(&ns->cdev, &ns->cdev_device);
3943 	del_gendisk(ns->disk);
3944 
3945 	mutex_lock(&ns->ctrl->namespaces_lock);
3946 	list_del_rcu(&ns->list);
3947 	mutex_unlock(&ns->ctrl->namespaces_lock);
3948 	synchronize_srcu(&ns->ctrl->srcu);
3949 
3950 	if (last_path)
3951 		nvme_mpath_shutdown_disk(ns->head);
3952 	nvme_put_ns(ns);
3953 }
3954 
3955 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid)
3956 {
3957 	struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid);
3958 
3959 	if (ns) {
3960 		nvme_ns_remove(ns);
3961 		nvme_put_ns(ns);
3962 	}
3963 }
3964 
3965 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info)
3966 {
3967 	int ret = NVME_SC_INVALID_NS | NVME_STATUS_DNR;
3968 
3969 	if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) {
3970 		dev_err(ns->ctrl->device,
3971 			"identifiers changed for nsid %d\n", ns->head->ns_id);
3972 		goto out;
3973 	}
3974 
3975 	ret = nvme_update_ns_info(ns, info);
3976 out:
3977 	/*
3978 	 * Only remove the namespace if we got a fatal error back from the
3979 	 * device, otherwise ignore the error and just move on.
3980 	 *
3981 	 * TODO: we should probably schedule a delayed retry here.
3982 	 */
3983 	if (ret > 0 && (ret & NVME_STATUS_DNR))
3984 		nvme_ns_remove(ns);
3985 }
3986 
3987 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3988 {
3989 	struct nvme_ns_info info = { .nsid = nsid };
3990 	struct nvme_ns *ns;
3991 	int ret;
3992 
3993 	if (nvme_identify_ns_descs(ctrl, &info))
3994 		return;
3995 
3996 	if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) {
3997 		dev_warn(ctrl->device,
3998 			"command set not reported for nsid: %d\n", nsid);
3999 		return;
4000 	}
4001 
4002 	/*
4003 	 * If available try to use the Command Set Idependent Identify Namespace
4004 	 * data structure to find all the generic information that is needed to
4005 	 * set up a namespace.  If not fall back to the legacy version.
4006 	 */
4007 	if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) ||
4008 	    (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS))
4009 		ret = nvme_ns_info_from_id_cs_indep(ctrl, &info);
4010 	else
4011 		ret = nvme_ns_info_from_identify(ctrl, &info);
4012 
4013 	if (info.is_removed)
4014 		nvme_ns_remove_by_nsid(ctrl, nsid);
4015 
4016 	/*
4017 	 * Ignore the namespace if it is not ready. We will get an AEN once it
4018 	 * becomes ready and restart the scan.
4019 	 */
4020 	if (ret || !info.is_ready)
4021 		return;
4022 
4023 	ns = nvme_find_get_ns(ctrl, nsid);
4024 	if (ns) {
4025 		nvme_validate_ns(ns, &info);
4026 		nvme_put_ns(ns);
4027 	} else {
4028 		nvme_alloc_ns(ctrl, &info);
4029 	}
4030 }
4031 
4032 /**
4033  * struct async_scan_info - keeps track of controller & NSIDs to scan
4034  * @ctrl:	Controller on which namespaces are being scanned
4035  * @next_nsid:	Index of next NSID to scan in ns_list
4036  * @ns_list:	Pointer to list of NSIDs to scan
4037  *
4038  * Note: There is a single async_scan_info structure shared by all instances
4039  * of nvme_scan_ns_async() scanning a given controller, so the atomic
4040  * operations on next_nsid are critical to ensure each instance scans a unique
4041  * NSID.
4042  */
4043 struct async_scan_info {
4044 	struct nvme_ctrl *ctrl;
4045 	atomic_t next_nsid;
4046 	__le32 *ns_list;
4047 };
4048 
4049 static void nvme_scan_ns_async(void *data, async_cookie_t cookie)
4050 {
4051 	struct async_scan_info *scan_info = data;
4052 	int idx;
4053 	u32 nsid;
4054 
4055 	idx = (u32)atomic_fetch_inc(&scan_info->next_nsid);
4056 	nsid = le32_to_cpu(scan_info->ns_list[idx]);
4057 
4058 	nvme_scan_ns(scan_info->ctrl, nsid);
4059 }
4060 
4061 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
4062 					unsigned nsid)
4063 {
4064 	struct nvme_ns *ns, *next;
4065 	LIST_HEAD(rm_list);
4066 
4067 	mutex_lock(&ctrl->namespaces_lock);
4068 	list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
4069 		if (ns->head->ns_id > nsid) {
4070 			list_del_rcu(&ns->list);
4071 			synchronize_srcu(&ctrl->srcu);
4072 			list_add_tail_rcu(&ns->list, &rm_list);
4073 		}
4074 	}
4075 	mutex_unlock(&ctrl->namespaces_lock);
4076 
4077 	list_for_each_entry_safe(ns, next, &rm_list, list)
4078 		nvme_ns_remove(ns);
4079 }
4080 
4081 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl)
4082 {
4083 	const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32);
4084 	__le32 *ns_list;
4085 	u32 prev = 0;
4086 	int ret = 0, i;
4087 	ASYNC_DOMAIN(domain);
4088 	struct async_scan_info scan_info;
4089 
4090 	ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
4091 	if (!ns_list)
4092 		return -ENOMEM;
4093 
4094 	scan_info.ctrl = ctrl;
4095 	scan_info.ns_list = ns_list;
4096 	for (;;) {
4097 		struct nvme_command cmd = {
4098 			.identify.opcode	= nvme_admin_identify,
4099 			.identify.cns		= NVME_ID_CNS_NS_ACTIVE_LIST,
4100 			.identify.nsid		= cpu_to_le32(prev),
4101 		};
4102 
4103 		ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list,
4104 					    NVME_IDENTIFY_DATA_SIZE);
4105 		if (ret) {
4106 			dev_warn(ctrl->device,
4107 				"Identify NS List failed (status=0x%x)\n", ret);
4108 			goto free;
4109 		}
4110 
4111 		atomic_set(&scan_info.next_nsid, 0);
4112 		for (i = 0; i < nr_entries; i++) {
4113 			u32 nsid = le32_to_cpu(ns_list[i]);
4114 
4115 			if (!nsid)	/* end of the list? */
4116 				goto out;
4117 			async_schedule_domain(nvme_scan_ns_async, &scan_info,
4118 						&domain);
4119 			while (++prev < nsid)
4120 				nvme_ns_remove_by_nsid(ctrl, prev);
4121 		}
4122 		async_synchronize_full_domain(&domain);
4123 	}
4124  out:
4125 	nvme_remove_invalid_namespaces(ctrl, prev);
4126  free:
4127 	async_synchronize_full_domain(&domain);
4128 	kfree(ns_list);
4129 	return ret;
4130 }
4131 
4132 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl)
4133 {
4134 	struct nvme_id_ctrl *id;
4135 	u32 nn, i;
4136 
4137 	if (nvme_identify_ctrl(ctrl, &id))
4138 		return;
4139 	nn = le32_to_cpu(id->nn);
4140 	kfree(id);
4141 
4142 	for (i = 1; i <= nn; i++)
4143 		nvme_scan_ns(ctrl, i);
4144 
4145 	nvme_remove_invalid_namespaces(ctrl, nn);
4146 }
4147 
4148 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl)
4149 {
4150 	size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32);
4151 	__le32 *log;
4152 	int error;
4153 
4154 	log = kzalloc(log_size, GFP_KERNEL);
4155 	if (!log)
4156 		return;
4157 
4158 	/*
4159 	 * We need to read the log to clear the AEN, but we don't want to rely
4160 	 * on it for the changed namespace information as userspace could have
4161 	 * raced with us in reading the log page, which could cause us to miss
4162 	 * updates.
4163 	 */
4164 	error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0,
4165 			NVME_CSI_NVM, log, log_size, 0);
4166 	if (error)
4167 		dev_warn(ctrl->device,
4168 			"reading changed ns log failed: %d\n", error);
4169 
4170 	kfree(log);
4171 }
4172 
4173 static void nvme_scan_work(struct work_struct *work)
4174 {
4175 	struct nvme_ctrl *ctrl =
4176 		container_of(work, struct nvme_ctrl, scan_work);
4177 	int ret;
4178 
4179 	/* No tagset on a live ctrl means IO queues could not created */
4180 	if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset)
4181 		return;
4182 
4183 	/*
4184 	 * Identify controller limits can change at controller reset due to
4185 	 * new firmware download, even though it is not common we cannot ignore
4186 	 * such scenario. Controller's non-mdts limits are reported in the unit
4187 	 * of logical blocks that is dependent on the format of attached
4188 	 * namespace. Hence re-read the limits at the time of ns allocation.
4189 	 */
4190 	ret = nvme_init_non_mdts_limits(ctrl);
4191 	if (ret < 0) {
4192 		dev_warn(ctrl->device,
4193 			"reading non-mdts-limits failed: %d\n", ret);
4194 		return;
4195 	}
4196 
4197 	if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) {
4198 		dev_info(ctrl->device, "rescanning namespaces.\n");
4199 		nvme_clear_changed_ns_log(ctrl);
4200 	}
4201 
4202 	mutex_lock(&ctrl->scan_lock);
4203 	if (nvme_ctrl_limited_cns(ctrl)) {
4204 		nvme_scan_ns_sequential(ctrl);
4205 	} else {
4206 		/*
4207 		 * Fall back to sequential scan if DNR is set to handle broken
4208 		 * devices which should support Identify NS List (as per the VS
4209 		 * they report) but don't actually support it.
4210 		 */
4211 		ret = nvme_scan_ns_list(ctrl);
4212 		if (ret > 0 && ret & NVME_STATUS_DNR)
4213 			nvme_scan_ns_sequential(ctrl);
4214 	}
4215 	mutex_unlock(&ctrl->scan_lock);
4216 }
4217 
4218 /*
4219  * This function iterates the namespace list unlocked to allow recovery from
4220  * controller failure. It is up to the caller to ensure the namespace list is
4221  * not modified by scan work while this function is executing.
4222  */
4223 void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
4224 {
4225 	struct nvme_ns *ns, *next;
4226 	LIST_HEAD(ns_list);
4227 
4228 	/*
4229 	 * make sure to requeue I/O to all namespaces as these
4230 	 * might result from the scan itself and must complete
4231 	 * for the scan_work to make progress
4232 	 */
4233 	nvme_mpath_clear_ctrl_paths(ctrl);
4234 
4235 	/*
4236 	 * Unquiesce io queues so any pending IO won't hang, especially
4237 	 * those submitted from scan work
4238 	 */
4239 	nvme_unquiesce_io_queues(ctrl);
4240 
4241 	/* prevent racing with ns scanning */
4242 	flush_work(&ctrl->scan_work);
4243 
4244 	/*
4245 	 * The dead states indicates the controller was not gracefully
4246 	 * disconnected. In that case, we won't be able to flush any data while
4247 	 * removing the namespaces' disks; fail all the queues now to avoid
4248 	 * potentially having to clean up the failed sync later.
4249 	 */
4250 	if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD)
4251 		nvme_mark_namespaces_dead(ctrl);
4252 
4253 	/* this is a no-op when called from the controller reset handler */
4254 	nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO);
4255 
4256 	mutex_lock(&ctrl->namespaces_lock);
4257 	list_splice_init_rcu(&ctrl->namespaces, &ns_list, synchronize_rcu);
4258 	mutex_unlock(&ctrl->namespaces_lock);
4259 	synchronize_srcu(&ctrl->srcu);
4260 
4261 	list_for_each_entry_safe(ns, next, &ns_list, list)
4262 		nvme_ns_remove(ns);
4263 }
4264 EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
4265 
4266 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env)
4267 {
4268 	const struct nvme_ctrl *ctrl =
4269 		container_of(dev, struct nvme_ctrl, ctrl_device);
4270 	struct nvmf_ctrl_options *opts = ctrl->opts;
4271 	int ret;
4272 
4273 	ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name);
4274 	if (ret)
4275 		return ret;
4276 
4277 	if (opts) {
4278 		ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr);
4279 		if (ret)
4280 			return ret;
4281 
4282 		ret = add_uevent_var(env, "NVME_TRSVCID=%s",
4283 				opts->trsvcid ?: "none");
4284 		if (ret)
4285 			return ret;
4286 
4287 		ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s",
4288 				opts->host_traddr ?: "none");
4289 		if (ret)
4290 			return ret;
4291 
4292 		ret = add_uevent_var(env, "NVME_HOST_IFACE=%s",
4293 				opts->host_iface ?: "none");
4294 	}
4295 	return ret;
4296 }
4297 
4298 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata)
4299 {
4300 	char *envp[2] = { envdata, NULL };
4301 
4302 	kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4303 }
4304 
4305 static void nvme_aen_uevent(struct nvme_ctrl *ctrl)
4306 {
4307 	char *envp[2] = { NULL, NULL };
4308 	u32 aen_result = ctrl->aen_result;
4309 
4310 	ctrl->aen_result = 0;
4311 	if (!aen_result)
4312 		return;
4313 
4314 	envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result);
4315 	if (!envp[0])
4316 		return;
4317 	kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4318 	kfree(envp[0]);
4319 }
4320 
4321 static void nvme_async_event_work(struct work_struct *work)
4322 {
4323 	struct nvme_ctrl *ctrl =
4324 		container_of(work, struct nvme_ctrl, async_event_work);
4325 
4326 	nvme_aen_uevent(ctrl);
4327 
4328 	/*
4329 	 * The transport drivers must guarantee AER submission here is safe by
4330 	 * flushing ctrl async_event_work after changing the controller state
4331 	 * from LIVE and before freeing the admin queue.
4332 	*/
4333 	if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
4334 		ctrl->ops->submit_async_event(ctrl);
4335 }
4336 
4337 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
4338 {
4339 
4340 	u32 csts;
4341 
4342 	if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
4343 		return false;
4344 
4345 	if (csts == ~0)
4346 		return false;
4347 
4348 	return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
4349 }
4350 
4351 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
4352 {
4353 	struct nvme_fw_slot_info_log *log;
4354 	u8 next_fw_slot, cur_fw_slot;
4355 
4356 	log = kmalloc(sizeof(*log), GFP_KERNEL);
4357 	if (!log)
4358 		return;
4359 
4360 	if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM,
4361 			 log, sizeof(*log), 0)) {
4362 		dev_warn(ctrl->device, "Get FW SLOT INFO log error\n");
4363 		goto out_free_log;
4364 	}
4365 
4366 	cur_fw_slot = log->afi & 0x7;
4367 	next_fw_slot = (log->afi & 0x70) >> 4;
4368 	if (!cur_fw_slot || (next_fw_slot && (cur_fw_slot != next_fw_slot))) {
4369 		dev_info(ctrl->device,
4370 			 "Firmware is activated after next Controller Level Reset\n");
4371 		goto out_free_log;
4372 	}
4373 
4374 	memcpy(ctrl->subsys->firmware_rev, &log->frs[cur_fw_slot - 1],
4375 		sizeof(ctrl->subsys->firmware_rev));
4376 
4377 out_free_log:
4378 	kfree(log);
4379 }
4380 
4381 static void nvme_fw_act_work(struct work_struct *work)
4382 {
4383 	struct nvme_ctrl *ctrl = container_of(work,
4384 				struct nvme_ctrl, fw_act_work);
4385 	unsigned long fw_act_timeout;
4386 
4387 	nvme_auth_stop(ctrl);
4388 
4389 	if (ctrl->mtfa)
4390 		fw_act_timeout = jiffies +
4391 				msecs_to_jiffies(ctrl->mtfa * 100);
4392 	else
4393 		fw_act_timeout = jiffies +
4394 				msecs_to_jiffies(admin_timeout * 1000);
4395 
4396 	nvme_quiesce_io_queues(ctrl);
4397 	while (nvme_ctrl_pp_status(ctrl)) {
4398 		if (time_after(jiffies, fw_act_timeout)) {
4399 			dev_warn(ctrl->device,
4400 				"Fw activation timeout, reset controller\n");
4401 			nvme_try_sched_reset(ctrl);
4402 			return;
4403 		}
4404 		msleep(100);
4405 	}
4406 
4407 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE))
4408 		return;
4409 
4410 	nvme_unquiesce_io_queues(ctrl);
4411 	/* read FW slot information to clear the AER */
4412 	nvme_get_fw_slot_info(ctrl);
4413 
4414 	queue_work(nvme_wq, &ctrl->async_event_work);
4415 }
4416 
4417 static u32 nvme_aer_type(u32 result)
4418 {
4419 	return result & 0x7;
4420 }
4421 
4422 static u32 nvme_aer_subtype(u32 result)
4423 {
4424 	return (result & 0xff00) >> 8;
4425 }
4426 
4427 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result)
4428 {
4429 	u32 aer_notice_type = nvme_aer_subtype(result);
4430 	bool requeue = true;
4431 
4432 	switch (aer_notice_type) {
4433 	case NVME_AER_NOTICE_NS_CHANGED:
4434 		set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events);
4435 		nvme_queue_scan(ctrl);
4436 		break;
4437 	case NVME_AER_NOTICE_FW_ACT_STARTING:
4438 		/*
4439 		 * We are (ab)using the RESETTING state to prevent subsequent
4440 		 * recovery actions from interfering with the controller's
4441 		 * firmware activation.
4442 		 */
4443 		if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) {
4444 			requeue = false;
4445 			queue_work(nvme_wq, &ctrl->fw_act_work);
4446 		}
4447 		break;
4448 #ifdef CONFIG_NVME_MULTIPATH
4449 	case NVME_AER_NOTICE_ANA:
4450 		if (!ctrl->ana_log_buf)
4451 			break;
4452 		queue_work(nvme_wq, &ctrl->ana_work);
4453 		break;
4454 #endif
4455 	case NVME_AER_NOTICE_DISC_CHANGED:
4456 		ctrl->aen_result = result;
4457 		break;
4458 	default:
4459 		dev_warn(ctrl->device, "async event result %08x\n", result);
4460 	}
4461 	return requeue;
4462 }
4463 
4464 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl)
4465 {
4466 	dev_warn(ctrl->device,
4467 		"resetting controller due to persistent internal error\n");
4468 	nvme_reset_ctrl(ctrl);
4469 }
4470 
4471 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
4472 		volatile union nvme_result *res)
4473 {
4474 	u32 result = le32_to_cpu(res->u32);
4475 	u32 aer_type = nvme_aer_type(result);
4476 	u32 aer_subtype = nvme_aer_subtype(result);
4477 	bool requeue = true;
4478 
4479 	if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS)
4480 		return;
4481 
4482 	trace_nvme_async_event(ctrl, result);
4483 	switch (aer_type) {
4484 	case NVME_AER_NOTICE:
4485 		requeue = nvme_handle_aen_notice(ctrl, result);
4486 		break;
4487 	case NVME_AER_ERROR:
4488 		/*
4489 		 * For a persistent internal error, don't run async_event_work
4490 		 * to submit a new AER. The controller reset will do it.
4491 		 */
4492 		if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) {
4493 			nvme_handle_aer_persistent_error(ctrl);
4494 			return;
4495 		}
4496 		fallthrough;
4497 	case NVME_AER_SMART:
4498 	case NVME_AER_CSS:
4499 	case NVME_AER_VS:
4500 		ctrl->aen_result = result;
4501 		break;
4502 	default:
4503 		break;
4504 	}
4505 
4506 	if (requeue)
4507 		queue_work(nvme_wq, &ctrl->async_event_work);
4508 }
4509 EXPORT_SYMBOL_GPL(nvme_complete_async_event);
4510 
4511 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4512 		const struct blk_mq_ops *ops, unsigned int cmd_size)
4513 {
4514 	struct queue_limits lim = {};
4515 	int ret;
4516 
4517 	memset(set, 0, sizeof(*set));
4518 	set->ops = ops;
4519 	set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
4520 	if (ctrl->ops->flags & NVME_F_FABRICS)
4521 		/* Reserved for fabric connect and keep alive */
4522 		set->reserved_tags = 2;
4523 	set->numa_node = ctrl->numa_node;
4524 	set->flags = BLK_MQ_F_NO_SCHED;
4525 	if (ctrl->ops->flags & NVME_F_BLOCKING)
4526 		set->flags |= BLK_MQ_F_BLOCKING;
4527 	set->cmd_size = cmd_size;
4528 	set->driver_data = ctrl;
4529 	set->nr_hw_queues = 1;
4530 	set->timeout = NVME_ADMIN_TIMEOUT;
4531 	ret = blk_mq_alloc_tag_set(set);
4532 	if (ret)
4533 		return ret;
4534 
4535 	ctrl->admin_q = blk_mq_alloc_queue(set, &lim, NULL);
4536 	if (IS_ERR(ctrl->admin_q)) {
4537 		ret = PTR_ERR(ctrl->admin_q);
4538 		goto out_free_tagset;
4539 	}
4540 
4541 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4542 		ctrl->fabrics_q = blk_mq_alloc_queue(set, NULL, NULL);
4543 		if (IS_ERR(ctrl->fabrics_q)) {
4544 			ret = PTR_ERR(ctrl->fabrics_q);
4545 			goto out_cleanup_admin_q;
4546 		}
4547 	}
4548 
4549 	ctrl->admin_tagset = set;
4550 	return 0;
4551 
4552 out_cleanup_admin_q:
4553 	blk_mq_destroy_queue(ctrl->admin_q);
4554 	blk_put_queue(ctrl->admin_q);
4555 out_free_tagset:
4556 	blk_mq_free_tag_set(set);
4557 	ctrl->admin_q = NULL;
4558 	ctrl->fabrics_q = NULL;
4559 	return ret;
4560 }
4561 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set);
4562 
4563 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl)
4564 {
4565 	blk_mq_destroy_queue(ctrl->admin_q);
4566 	blk_put_queue(ctrl->admin_q);
4567 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4568 		blk_mq_destroy_queue(ctrl->fabrics_q);
4569 		blk_put_queue(ctrl->fabrics_q);
4570 	}
4571 	blk_mq_free_tag_set(ctrl->admin_tagset);
4572 }
4573 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set);
4574 
4575 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4576 		const struct blk_mq_ops *ops, unsigned int nr_maps,
4577 		unsigned int cmd_size)
4578 {
4579 	int ret;
4580 
4581 	memset(set, 0, sizeof(*set));
4582 	set->ops = ops;
4583 	set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1);
4584 	/*
4585 	 * Some Apple controllers requires tags to be unique across admin and
4586 	 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue.
4587 	 */
4588 	if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS)
4589 		set->reserved_tags = NVME_AQ_DEPTH;
4590 	else if (ctrl->ops->flags & NVME_F_FABRICS)
4591 		/* Reserved for fabric connect */
4592 		set->reserved_tags = 1;
4593 	set->numa_node = ctrl->numa_node;
4594 	set->flags = BLK_MQ_F_SHOULD_MERGE;
4595 	if (ctrl->ops->flags & NVME_F_BLOCKING)
4596 		set->flags |= BLK_MQ_F_BLOCKING;
4597 	set->cmd_size = cmd_size;
4598 	set->driver_data = ctrl;
4599 	set->nr_hw_queues = ctrl->queue_count - 1;
4600 	set->timeout = NVME_IO_TIMEOUT;
4601 	set->nr_maps = nr_maps;
4602 	ret = blk_mq_alloc_tag_set(set);
4603 	if (ret)
4604 		return ret;
4605 
4606 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4607 		struct queue_limits lim = {
4608 			.features	= BLK_FEAT_SKIP_TAGSET_QUIESCE,
4609 		};
4610 
4611 		ctrl->connect_q = blk_mq_alloc_queue(set, &lim, NULL);
4612         	if (IS_ERR(ctrl->connect_q)) {
4613 			ret = PTR_ERR(ctrl->connect_q);
4614 			goto out_free_tag_set;
4615 		}
4616 	}
4617 
4618 	ctrl->tagset = set;
4619 	return 0;
4620 
4621 out_free_tag_set:
4622 	blk_mq_free_tag_set(set);
4623 	ctrl->connect_q = NULL;
4624 	return ret;
4625 }
4626 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set);
4627 
4628 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl)
4629 {
4630 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4631 		blk_mq_destroy_queue(ctrl->connect_q);
4632 		blk_put_queue(ctrl->connect_q);
4633 	}
4634 	blk_mq_free_tag_set(ctrl->tagset);
4635 }
4636 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set);
4637 
4638 void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
4639 {
4640 	nvme_mpath_stop(ctrl);
4641 	nvme_auth_stop(ctrl);
4642 	nvme_stop_failfast_work(ctrl);
4643 	flush_work(&ctrl->async_event_work);
4644 	cancel_work_sync(&ctrl->fw_act_work);
4645 	if (ctrl->ops->stop_ctrl)
4646 		ctrl->ops->stop_ctrl(ctrl);
4647 }
4648 EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
4649 
4650 void nvme_start_ctrl(struct nvme_ctrl *ctrl)
4651 {
4652 	nvme_enable_aen(ctrl);
4653 
4654 	/*
4655 	 * persistent discovery controllers need to send indication to userspace
4656 	 * to re-read the discovery log page to learn about possible changes
4657 	 * that were missed. We identify persistent discovery controllers by
4658 	 * checking that they started once before, hence are reconnecting back.
4659 	 */
4660 	if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) &&
4661 	    nvme_discovery_ctrl(ctrl))
4662 		nvme_change_uevent(ctrl, "NVME_EVENT=rediscover");
4663 
4664 	if (ctrl->queue_count > 1) {
4665 		nvme_queue_scan(ctrl);
4666 		nvme_unquiesce_io_queues(ctrl);
4667 		nvme_mpath_update(ctrl);
4668 	}
4669 
4670 	nvme_change_uevent(ctrl, "NVME_EVENT=connected");
4671 	set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags);
4672 }
4673 EXPORT_SYMBOL_GPL(nvme_start_ctrl);
4674 
4675 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
4676 {
4677 	nvme_stop_keep_alive(ctrl);
4678 	nvme_hwmon_exit(ctrl);
4679 	nvme_fault_inject_fini(&ctrl->fault_inject);
4680 	dev_pm_qos_hide_latency_tolerance(ctrl->device);
4681 	cdev_device_del(&ctrl->cdev, ctrl->device);
4682 	nvme_put_ctrl(ctrl);
4683 }
4684 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
4685 
4686 static void nvme_free_cels(struct nvme_ctrl *ctrl)
4687 {
4688 	struct nvme_effects_log	*cel;
4689 	unsigned long i;
4690 
4691 	xa_for_each(&ctrl->cels, i, cel) {
4692 		xa_erase(&ctrl->cels, i);
4693 		kfree(cel);
4694 	}
4695 
4696 	xa_destroy(&ctrl->cels);
4697 }
4698 
4699 static void nvme_free_ctrl(struct device *dev)
4700 {
4701 	struct nvme_ctrl *ctrl =
4702 		container_of(dev, struct nvme_ctrl, ctrl_device);
4703 	struct nvme_subsystem *subsys = ctrl->subsys;
4704 
4705 	if (!subsys || ctrl->instance != subsys->instance)
4706 		ida_free(&nvme_instance_ida, ctrl->instance);
4707 	nvme_free_cels(ctrl);
4708 	nvme_mpath_uninit(ctrl);
4709 	cleanup_srcu_struct(&ctrl->srcu);
4710 	nvme_auth_stop(ctrl);
4711 	nvme_auth_free(ctrl);
4712 	__free_page(ctrl->discard_page);
4713 	free_opal_dev(ctrl->opal_dev);
4714 
4715 	if (subsys) {
4716 		mutex_lock(&nvme_subsystems_lock);
4717 		list_del(&ctrl->subsys_entry);
4718 		sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device));
4719 		mutex_unlock(&nvme_subsystems_lock);
4720 	}
4721 
4722 	ctrl->ops->free_ctrl(ctrl);
4723 
4724 	if (subsys)
4725 		nvme_put_subsystem(subsys);
4726 }
4727 
4728 /*
4729  * Initialize a NVMe controller structures.  This needs to be called during
4730  * earliest initialization so that we have the initialized structured around
4731  * during probing.
4732  *
4733  * On success, the caller must use the nvme_put_ctrl() to release this when
4734  * needed, which also invokes the ops->free_ctrl() callback.
4735  */
4736 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
4737 		const struct nvme_ctrl_ops *ops, unsigned long quirks)
4738 {
4739 	int ret;
4740 
4741 	WRITE_ONCE(ctrl->state, NVME_CTRL_NEW);
4742 	ctrl->passthru_err_log_enabled = false;
4743 	clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
4744 	spin_lock_init(&ctrl->lock);
4745 	mutex_init(&ctrl->namespaces_lock);
4746 
4747 	ret = init_srcu_struct(&ctrl->srcu);
4748 	if (ret)
4749 		return ret;
4750 
4751 	mutex_init(&ctrl->scan_lock);
4752 	INIT_LIST_HEAD(&ctrl->namespaces);
4753 	xa_init(&ctrl->cels);
4754 	ctrl->dev = dev;
4755 	ctrl->ops = ops;
4756 	ctrl->quirks = quirks;
4757 	ctrl->numa_node = NUMA_NO_NODE;
4758 	INIT_WORK(&ctrl->scan_work, nvme_scan_work);
4759 	INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
4760 	INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
4761 	INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work);
4762 	init_waitqueue_head(&ctrl->state_wq);
4763 
4764 	INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
4765 	INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work);
4766 	memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd));
4767 	ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive;
4768 	ctrl->ka_last_check_time = jiffies;
4769 
4770 	BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) >
4771 			PAGE_SIZE);
4772 	ctrl->discard_page = alloc_page(GFP_KERNEL);
4773 	if (!ctrl->discard_page) {
4774 		ret = -ENOMEM;
4775 		goto out;
4776 	}
4777 
4778 	ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL);
4779 	if (ret < 0)
4780 		goto out;
4781 	ctrl->instance = ret;
4782 
4783 	ret = nvme_auth_init_ctrl(ctrl);
4784 	if (ret)
4785 		goto out_release_instance;
4786 
4787 	nvme_mpath_init_ctrl(ctrl);
4788 
4789 	device_initialize(&ctrl->ctrl_device);
4790 	ctrl->device = &ctrl->ctrl_device;
4791 	ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt),
4792 			ctrl->instance);
4793 	ctrl->device->class = &nvme_class;
4794 	ctrl->device->parent = ctrl->dev;
4795 	if (ops->dev_attr_groups)
4796 		ctrl->device->groups = ops->dev_attr_groups;
4797 	else
4798 		ctrl->device->groups = nvme_dev_attr_groups;
4799 	ctrl->device->release = nvme_free_ctrl;
4800 	dev_set_drvdata(ctrl->device, ctrl);
4801 
4802 	return ret;
4803 
4804 out_release_instance:
4805 	ida_free(&nvme_instance_ida, ctrl->instance);
4806 out:
4807 	if (ctrl->discard_page)
4808 		__free_page(ctrl->discard_page);
4809 	cleanup_srcu_struct(&ctrl->srcu);
4810 	return ret;
4811 }
4812 EXPORT_SYMBOL_GPL(nvme_init_ctrl);
4813 
4814 /*
4815  * On success, returns with an elevated controller reference and caller must
4816  * use nvme_uninit_ctrl() to properly free resources associated with the ctrl.
4817  */
4818 int nvme_add_ctrl(struct nvme_ctrl *ctrl)
4819 {
4820 	int ret;
4821 
4822 	ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance);
4823 	if (ret)
4824 		return ret;
4825 
4826 	cdev_init(&ctrl->cdev, &nvme_dev_fops);
4827 	ctrl->cdev.owner = ctrl->ops->module;
4828 	ret = cdev_device_add(&ctrl->cdev, ctrl->device);
4829 	if (ret)
4830 		return ret;
4831 
4832 	/*
4833 	 * Initialize latency tolerance controls.  The sysfs files won't
4834 	 * be visible to userspace unless the device actually supports APST.
4835 	 */
4836 	ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
4837 	dev_pm_qos_update_user_latency_tolerance(ctrl->device,
4838 		min(default_ps_max_latency_us, (unsigned long)S32_MAX));
4839 
4840 	nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device));
4841 	nvme_get_ctrl(ctrl);
4842 
4843 	return 0;
4844 }
4845 EXPORT_SYMBOL_GPL(nvme_add_ctrl);
4846 
4847 /* let I/O to all namespaces fail in preparation for surprise removal */
4848 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl)
4849 {
4850 	struct nvme_ns *ns;
4851 	int srcu_idx;
4852 
4853 	srcu_idx = srcu_read_lock(&ctrl->srcu);
4854 	list_for_each_entry_rcu(ns, &ctrl->namespaces, list)
4855 		blk_mark_disk_dead(ns->disk);
4856 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
4857 }
4858 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead);
4859 
4860 void nvme_unfreeze(struct nvme_ctrl *ctrl)
4861 {
4862 	struct nvme_ns *ns;
4863 	int srcu_idx;
4864 
4865 	srcu_idx = srcu_read_lock(&ctrl->srcu);
4866 	list_for_each_entry_rcu(ns, &ctrl->namespaces, list)
4867 		blk_mq_unfreeze_queue(ns->queue);
4868 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
4869 	clear_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4870 }
4871 EXPORT_SYMBOL_GPL(nvme_unfreeze);
4872 
4873 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
4874 {
4875 	struct nvme_ns *ns;
4876 	int srcu_idx;
4877 
4878 	srcu_idx = srcu_read_lock(&ctrl->srcu);
4879 	list_for_each_entry_rcu(ns, &ctrl->namespaces, list) {
4880 		timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
4881 		if (timeout <= 0)
4882 			break;
4883 	}
4884 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
4885 	return timeout;
4886 }
4887 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
4888 
4889 void nvme_wait_freeze(struct nvme_ctrl *ctrl)
4890 {
4891 	struct nvme_ns *ns;
4892 	int srcu_idx;
4893 
4894 	srcu_idx = srcu_read_lock(&ctrl->srcu);
4895 	list_for_each_entry_rcu(ns, &ctrl->namespaces, list)
4896 		blk_mq_freeze_queue_wait(ns->queue);
4897 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
4898 }
4899 EXPORT_SYMBOL_GPL(nvme_wait_freeze);
4900 
4901 void nvme_start_freeze(struct nvme_ctrl *ctrl)
4902 {
4903 	struct nvme_ns *ns;
4904 	int srcu_idx;
4905 
4906 	set_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4907 	srcu_idx = srcu_read_lock(&ctrl->srcu);
4908 	list_for_each_entry_rcu(ns, &ctrl->namespaces, list)
4909 		blk_freeze_queue_start(ns->queue);
4910 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
4911 }
4912 EXPORT_SYMBOL_GPL(nvme_start_freeze);
4913 
4914 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl)
4915 {
4916 	if (!ctrl->tagset)
4917 		return;
4918 	if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags))
4919 		blk_mq_quiesce_tagset(ctrl->tagset);
4920 	else
4921 		blk_mq_wait_quiesce_done(ctrl->tagset);
4922 }
4923 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues);
4924 
4925 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl)
4926 {
4927 	if (!ctrl->tagset)
4928 		return;
4929 	if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags))
4930 		blk_mq_unquiesce_tagset(ctrl->tagset);
4931 }
4932 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues);
4933 
4934 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl)
4935 {
4936 	if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
4937 		blk_mq_quiesce_queue(ctrl->admin_q);
4938 	else
4939 		blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set);
4940 }
4941 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue);
4942 
4943 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl)
4944 {
4945 	if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
4946 		blk_mq_unquiesce_queue(ctrl->admin_q);
4947 }
4948 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue);
4949 
4950 void nvme_sync_io_queues(struct nvme_ctrl *ctrl)
4951 {
4952 	struct nvme_ns *ns;
4953 	int srcu_idx;
4954 
4955 	srcu_idx = srcu_read_lock(&ctrl->srcu);
4956 	list_for_each_entry_rcu(ns, &ctrl->namespaces, list)
4957 		blk_sync_queue(ns->queue);
4958 	srcu_read_unlock(&ctrl->srcu, srcu_idx);
4959 }
4960 EXPORT_SYMBOL_GPL(nvme_sync_io_queues);
4961 
4962 void nvme_sync_queues(struct nvme_ctrl *ctrl)
4963 {
4964 	nvme_sync_io_queues(ctrl);
4965 	if (ctrl->admin_q)
4966 		blk_sync_queue(ctrl->admin_q);
4967 }
4968 EXPORT_SYMBOL_GPL(nvme_sync_queues);
4969 
4970 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file)
4971 {
4972 	if (file->f_op != &nvme_dev_fops)
4973 		return NULL;
4974 	return file->private_data;
4975 }
4976 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU);
4977 
4978 /*
4979  * Check we didn't inadvertently grow the command structure sizes:
4980  */
4981 static inline void _nvme_check_size(void)
4982 {
4983 	BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64);
4984 	BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
4985 	BUILD_BUG_ON(sizeof(struct nvme_identify) != 64);
4986 	BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
4987 	BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64);
4988 	BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
4989 	BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64);
4990 	BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64);
4991 	BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
4992 	BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64);
4993 	BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
4994 	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE);
4995 	BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE);
4996 	BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) !=
4997 			NVME_IDENTIFY_DATA_SIZE);
4998 	BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE);
4999 	BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE);
5000 	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE);
5001 	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE);
5002 	BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
5003 	BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
5004 	BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64);
5005 	BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64);
5006 	BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512);
5007 }
5008 
5009 
5010 static int __init nvme_core_init(void)
5011 {
5012 	int result = -ENOMEM;
5013 
5014 	_nvme_check_size();
5015 
5016 	nvme_wq = alloc_workqueue("nvme-wq",
5017 			WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
5018 	if (!nvme_wq)
5019 		goto out;
5020 
5021 	nvme_reset_wq = alloc_workqueue("nvme-reset-wq",
5022 			WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
5023 	if (!nvme_reset_wq)
5024 		goto destroy_wq;
5025 
5026 	nvme_delete_wq = alloc_workqueue("nvme-delete-wq",
5027 			WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
5028 	if (!nvme_delete_wq)
5029 		goto destroy_reset_wq;
5030 
5031 	result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0,
5032 			NVME_MINORS, "nvme");
5033 	if (result < 0)
5034 		goto destroy_delete_wq;
5035 
5036 	result = class_register(&nvme_class);
5037 	if (result)
5038 		goto unregister_chrdev;
5039 
5040 	result = class_register(&nvme_subsys_class);
5041 	if (result)
5042 		goto destroy_class;
5043 
5044 	result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS,
5045 				     "nvme-generic");
5046 	if (result < 0)
5047 		goto destroy_subsys_class;
5048 
5049 	result = class_register(&nvme_ns_chr_class);
5050 	if (result)
5051 		goto unregister_generic_ns;
5052 
5053 	result = nvme_init_auth();
5054 	if (result)
5055 		goto destroy_ns_chr;
5056 	return 0;
5057 
5058 destroy_ns_chr:
5059 	class_unregister(&nvme_ns_chr_class);
5060 unregister_generic_ns:
5061 	unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
5062 destroy_subsys_class:
5063 	class_unregister(&nvme_subsys_class);
5064 destroy_class:
5065 	class_unregister(&nvme_class);
5066 unregister_chrdev:
5067 	unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
5068 destroy_delete_wq:
5069 	destroy_workqueue(nvme_delete_wq);
5070 destroy_reset_wq:
5071 	destroy_workqueue(nvme_reset_wq);
5072 destroy_wq:
5073 	destroy_workqueue(nvme_wq);
5074 out:
5075 	return result;
5076 }
5077 
5078 static void __exit nvme_core_exit(void)
5079 {
5080 	nvme_exit_auth();
5081 	class_unregister(&nvme_ns_chr_class);
5082 	class_unregister(&nvme_subsys_class);
5083 	class_unregister(&nvme_class);
5084 	unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
5085 	unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
5086 	destroy_workqueue(nvme_delete_wq);
5087 	destroy_workqueue(nvme_reset_wq);
5088 	destroy_workqueue(nvme_wq);
5089 	ida_destroy(&nvme_ns_chr_minor_ida);
5090 	ida_destroy(&nvme_instance_ida);
5091 }
5092 
5093 MODULE_LICENSE("GPL");
5094 MODULE_VERSION("1.0");
5095 MODULE_DESCRIPTION("NVMe host core framework");
5096 module_init(nvme_core_init);
5097 module_exit(nvme_core_exit);
5098