1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVM Express device driver 4 * Copyright (c) 2011-2014, Intel Corporation. 5 */ 6 7 #include <linux/blkdev.h> 8 #include <linux/blk-mq.h> 9 #include <linux/blk-integrity.h> 10 #include <linux/compat.h> 11 #include <linux/delay.h> 12 #include <linux/errno.h> 13 #include <linux/hdreg.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/backing-dev.h> 17 #include <linux/slab.h> 18 #include <linux/types.h> 19 #include <linux/pr.h> 20 #include <linux/ptrace.h> 21 #include <linux/nvme_ioctl.h> 22 #include <linux/pm_qos.h> 23 #include <asm/unaligned.h> 24 25 #include "nvme.h" 26 #include "fabrics.h" 27 #include <linux/nvme-auth.h> 28 29 #define CREATE_TRACE_POINTS 30 #include "trace.h" 31 32 #define NVME_MINORS (1U << MINORBITS) 33 34 struct nvme_ns_info { 35 struct nvme_ns_ids ids; 36 u32 nsid; 37 __le32 anagrpid; 38 bool is_shared; 39 bool is_readonly; 40 bool is_ready; 41 bool is_removed; 42 }; 43 44 unsigned int admin_timeout = 60; 45 module_param(admin_timeout, uint, 0644); 46 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 47 EXPORT_SYMBOL_GPL(admin_timeout); 48 49 unsigned int nvme_io_timeout = 30; 50 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 51 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 52 EXPORT_SYMBOL_GPL(nvme_io_timeout); 53 54 static unsigned char shutdown_timeout = 5; 55 module_param(shutdown_timeout, byte, 0644); 56 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 57 58 static u8 nvme_max_retries = 5; 59 module_param_named(max_retries, nvme_max_retries, byte, 0644); 60 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 61 62 static unsigned long default_ps_max_latency_us = 100000; 63 module_param(default_ps_max_latency_us, ulong, 0644); 64 MODULE_PARM_DESC(default_ps_max_latency_us, 65 "max power saving latency for new devices; use PM QOS to change per device"); 66 67 static bool force_apst; 68 module_param(force_apst, bool, 0644); 69 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 70 71 static unsigned long apst_primary_timeout_ms = 100; 72 module_param(apst_primary_timeout_ms, ulong, 0644); 73 MODULE_PARM_DESC(apst_primary_timeout_ms, 74 "primary APST timeout in ms"); 75 76 static unsigned long apst_secondary_timeout_ms = 2000; 77 module_param(apst_secondary_timeout_ms, ulong, 0644); 78 MODULE_PARM_DESC(apst_secondary_timeout_ms, 79 "secondary APST timeout in ms"); 80 81 static unsigned long apst_primary_latency_tol_us = 15000; 82 module_param(apst_primary_latency_tol_us, ulong, 0644); 83 MODULE_PARM_DESC(apst_primary_latency_tol_us, 84 "primary APST latency tolerance in us"); 85 86 static unsigned long apst_secondary_latency_tol_us = 100000; 87 module_param(apst_secondary_latency_tol_us, ulong, 0644); 88 MODULE_PARM_DESC(apst_secondary_latency_tol_us, 89 "secondary APST latency tolerance in us"); 90 91 /* 92 * nvme_wq - hosts nvme related works that are not reset or delete 93 * nvme_reset_wq - hosts nvme reset works 94 * nvme_delete_wq - hosts nvme delete works 95 * 96 * nvme_wq will host works such as scan, aen handling, fw activation, 97 * keep-alive, periodic reconnects etc. nvme_reset_wq 98 * runs reset works which also flush works hosted on nvme_wq for 99 * serialization purposes. nvme_delete_wq host controller deletion 100 * works which flush reset works for serialization. 101 */ 102 struct workqueue_struct *nvme_wq; 103 EXPORT_SYMBOL_GPL(nvme_wq); 104 105 struct workqueue_struct *nvme_reset_wq; 106 EXPORT_SYMBOL_GPL(nvme_reset_wq); 107 108 struct workqueue_struct *nvme_delete_wq; 109 EXPORT_SYMBOL_GPL(nvme_delete_wq); 110 111 static LIST_HEAD(nvme_subsystems); 112 static DEFINE_MUTEX(nvme_subsystems_lock); 113 114 static DEFINE_IDA(nvme_instance_ida); 115 static dev_t nvme_ctrl_base_chr_devt; 116 static struct class *nvme_class; 117 static struct class *nvme_subsys_class; 118 119 static DEFINE_IDA(nvme_ns_chr_minor_ida); 120 static dev_t nvme_ns_chr_devt; 121 static struct class *nvme_ns_chr_class; 122 123 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 124 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 125 unsigned nsid); 126 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 127 struct nvme_command *cmd); 128 129 void nvme_queue_scan(struct nvme_ctrl *ctrl) 130 { 131 /* 132 * Only new queue scan work when admin and IO queues are both alive 133 */ 134 if (ctrl->state == NVME_CTRL_LIVE && ctrl->tagset) 135 queue_work(nvme_wq, &ctrl->scan_work); 136 } 137 138 /* 139 * Use this function to proceed with scheduling reset_work for a controller 140 * that had previously been set to the resetting state. This is intended for 141 * code paths that can't be interrupted by other reset attempts. A hot removal 142 * may prevent this from succeeding. 143 */ 144 int nvme_try_sched_reset(struct nvme_ctrl *ctrl) 145 { 146 if (ctrl->state != NVME_CTRL_RESETTING) 147 return -EBUSY; 148 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 149 return -EBUSY; 150 return 0; 151 } 152 EXPORT_SYMBOL_GPL(nvme_try_sched_reset); 153 154 static void nvme_failfast_work(struct work_struct *work) 155 { 156 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 157 struct nvme_ctrl, failfast_work); 158 159 if (ctrl->state != NVME_CTRL_CONNECTING) 160 return; 161 162 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 163 dev_info(ctrl->device, "failfast expired\n"); 164 nvme_kick_requeue_lists(ctrl); 165 } 166 167 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl) 168 { 169 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1) 170 return; 171 172 schedule_delayed_work(&ctrl->failfast_work, 173 ctrl->opts->fast_io_fail_tmo * HZ); 174 } 175 176 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl) 177 { 178 if (!ctrl->opts) 179 return; 180 181 cancel_delayed_work_sync(&ctrl->failfast_work); 182 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 183 } 184 185 186 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 187 { 188 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 189 return -EBUSY; 190 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 191 return -EBUSY; 192 return 0; 193 } 194 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 195 196 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 197 { 198 int ret; 199 200 ret = nvme_reset_ctrl(ctrl); 201 if (!ret) { 202 flush_work(&ctrl->reset_work); 203 if (ctrl->state != NVME_CTRL_LIVE) 204 ret = -ENETRESET; 205 } 206 207 return ret; 208 } 209 210 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl) 211 { 212 dev_info(ctrl->device, 213 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl)); 214 215 flush_work(&ctrl->reset_work); 216 nvme_stop_ctrl(ctrl); 217 nvme_remove_namespaces(ctrl); 218 ctrl->ops->delete_ctrl(ctrl); 219 nvme_uninit_ctrl(ctrl); 220 } 221 222 static void nvme_delete_ctrl_work(struct work_struct *work) 223 { 224 struct nvme_ctrl *ctrl = 225 container_of(work, struct nvme_ctrl, delete_work); 226 227 nvme_do_delete_ctrl(ctrl); 228 } 229 230 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 231 { 232 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 233 return -EBUSY; 234 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 235 return -EBUSY; 236 return 0; 237 } 238 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 239 240 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 241 { 242 /* 243 * Keep a reference until nvme_do_delete_ctrl() complete, 244 * since ->delete_ctrl can free the controller. 245 */ 246 nvme_get_ctrl(ctrl); 247 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 248 nvme_do_delete_ctrl(ctrl); 249 nvme_put_ctrl(ctrl); 250 } 251 252 static blk_status_t nvme_error_status(u16 status) 253 { 254 switch (status & 0x7ff) { 255 case NVME_SC_SUCCESS: 256 return BLK_STS_OK; 257 case NVME_SC_CAP_EXCEEDED: 258 return BLK_STS_NOSPC; 259 case NVME_SC_LBA_RANGE: 260 case NVME_SC_CMD_INTERRUPTED: 261 case NVME_SC_NS_NOT_READY: 262 return BLK_STS_TARGET; 263 case NVME_SC_BAD_ATTRIBUTES: 264 case NVME_SC_ONCS_NOT_SUPPORTED: 265 case NVME_SC_INVALID_OPCODE: 266 case NVME_SC_INVALID_FIELD: 267 case NVME_SC_INVALID_NS: 268 return BLK_STS_NOTSUPP; 269 case NVME_SC_WRITE_FAULT: 270 case NVME_SC_READ_ERROR: 271 case NVME_SC_UNWRITTEN_BLOCK: 272 case NVME_SC_ACCESS_DENIED: 273 case NVME_SC_READ_ONLY: 274 case NVME_SC_COMPARE_FAILED: 275 return BLK_STS_MEDIUM; 276 case NVME_SC_GUARD_CHECK: 277 case NVME_SC_APPTAG_CHECK: 278 case NVME_SC_REFTAG_CHECK: 279 case NVME_SC_INVALID_PI: 280 return BLK_STS_PROTECTION; 281 case NVME_SC_RESERVATION_CONFLICT: 282 return BLK_STS_RESV_CONFLICT; 283 case NVME_SC_HOST_PATH_ERROR: 284 return BLK_STS_TRANSPORT; 285 case NVME_SC_ZONE_TOO_MANY_ACTIVE: 286 return BLK_STS_ZONE_ACTIVE_RESOURCE; 287 case NVME_SC_ZONE_TOO_MANY_OPEN: 288 return BLK_STS_ZONE_OPEN_RESOURCE; 289 default: 290 return BLK_STS_IOERR; 291 } 292 } 293 294 static void nvme_retry_req(struct request *req) 295 { 296 unsigned long delay = 0; 297 u16 crd; 298 299 /* The mask and shift result must be <= 3 */ 300 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11; 301 if (crd) 302 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100; 303 304 nvme_req(req)->retries++; 305 blk_mq_requeue_request(req, false); 306 blk_mq_delay_kick_requeue_list(req->q, delay); 307 } 308 309 static void nvme_log_error(struct request *req) 310 { 311 struct nvme_ns *ns = req->q->queuedata; 312 struct nvme_request *nr = nvme_req(req); 313 314 if (ns) { 315 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %llu blocks, %s (sct 0x%x / sc 0x%x) %s%s\n", 316 ns->disk ? ns->disk->disk_name : "?", 317 nvme_get_opcode_str(nr->cmd->common.opcode), 318 nr->cmd->common.opcode, 319 (unsigned long long)nvme_sect_to_lba(ns, blk_rq_pos(req)), 320 (unsigned long long)blk_rq_bytes(req) >> ns->lba_shift, 321 nvme_get_error_status_str(nr->status), 322 nr->status >> 8 & 7, /* Status Code Type */ 323 nr->status & 0xff, /* Status Code */ 324 nr->status & NVME_SC_MORE ? "MORE " : "", 325 nr->status & NVME_SC_DNR ? "DNR " : ""); 326 return; 327 } 328 329 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n", 330 dev_name(nr->ctrl->device), 331 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 332 nr->cmd->common.opcode, 333 nvme_get_error_status_str(nr->status), 334 nr->status >> 8 & 7, /* Status Code Type */ 335 nr->status & 0xff, /* Status Code */ 336 nr->status & NVME_SC_MORE ? "MORE " : "", 337 nr->status & NVME_SC_DNR ? "DNR " : ""); 338 } 339 340 enum nvme_disposition { 341 COMPLETE, 342 RETRY, 343 FAILOVER, 344 AUTHENTICATE, 345 }; 346 347 static inline enum nvme_disposition nvme_decide_disposition(struct request *req) 348 { 349 if (likely(nvme_req(req)->status == 0)) 350 return COMPLETE; 351 352 if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED) 353 return AUTHENTICATE; 354 355 if (blk_noretry_request(req) || 356 (nvme_req(req)->status & NVME_SC_DNR) || 357 nvme_req(req)->retries >= nvme_max_retries) 358 return COMPLETE; 359 360 if (req->cmd_flags & REQ_NVME_MPATH) { 361 if (nvme_is_path_error(nvme_req(req)->status) || 362 blk_queue_dying(req->q)) 363 return FAILOVER; 364 } else { 365 if (blk_queue_dying(req->q)) 366 return COMPLETE; 367 } 368 369 return RETRY; 370 } 371 372 static inline void nvme_end_req_zoned(struct request *req) 373 { 374 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 375 req_op(req) == REQ_OP_ZONE_APPEND) 376 req->__sector = nvme_lba_to_sect(req->q->queuedata, 377 le64_to_cpu(nvme_req(req)->result.u64)); 378 } 379 380 static inline void nvme_end_req(struct request *req) 381 { 382 blk_status_t status = nvme_error_status(nvme_req(req)->status); 383 384 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) 385 nvme_log_error(req); 386 nvme_end_req_zoned(req); 387 nvme_trace_bio_complete(req); 388 if (req->cmd_flags & REQ_NVME_MPATH) 389 nvme_mpath_end_request(req); 390 blk_mq_end_request(req, status); 391 } 392 393 void nvme_complete_rq(struct request *req) 394 { 395 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 396 397 trace_nvme_complete_rq(req); 398 nvme_cleanup_cmd(req); 399 400 /* 401 * Completions of long-running commands should not be able to 402 * defer sending of periodic keep alives, since the controller 403 * may have completed processing such commands a long time ago 404 * (arbitrarily close to command submission time). 405 * req->deadline - req->timeout is the command submission time 406 * in jiffies. 407 */ 408 if (ctrl->kas && 409 req->deadline - req->timeout >= ctrl->ka_last_check_time) 410 ctrl->comp_seen = true; 411 412 switch (nvme_decide_disposition(req)) { 413 case COMPLETE: 414 nvme_end_req(req); 415 return; 416 case RETRY: 417 nvme_retry_req(req); 418 return; 419 case FAILOVER: 420 nvme_failover_req(req); 421 return; 422 case AUTHENTICATE: 423 #ifdef CONFIG_NVME_HOST_AUTH 424 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 425 nvme_retry_req(req); 426 #else 427 nvme_end_req(req); 428 #endif 429 return; 430 } 431 } 432 EXPORT_SYMBOL_GPL(nvme_complete_rq); 433 434 void nvme_complete_batch_req(struct request *req) 435 { 436 trace_nvme_complete_rq(req); 437 nvme_cleanup_cmd(req); 438 nvme_end_req_zoned(req); 439 } 440 EXPORT_SYMBOL_GPL(nvme_complete_batch_req); 441 442 /* 443 * Called to unwind from ->queue_rq on a failed command submission so that the 444 * multipathing code gets called to potentially failover to another path. 445 * The caller needs to unwind all transport specific resource allocations and 446 * must return propagate the return value. 447 */ 448 blk_status_t nvme_host_path_error(struct request *req) 449 { 450 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR; 451 blk_mq_set_request_complete(req); 452 nvme_complete_rq(req); 453 return BLK_STS_OK; 454 } 455 EXPORT_SYMBOL_GPL(nvme_host_path_error); 456 457 bool nvme_cancel_request(struct request *req, void *data) 458 { 459 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 460 "Cancelling I/O %d", req->tag); 461 462 /* don't abort one completed or idle request */ 463 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT) 464 return true; 465 466 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD; 467 nvme_req(req)->flags |= NVME_REQ_CANCELLED; 468 blk_mq_complete_request(req); 469 return true; 470 } 471 EXPORT_SYMBOL_GPL(nvme_cancel_request); 472 473 void nvme_cancel_tagset(struct nvme_ctrl *ctrl) 474 { 475 if (ctrl->tagset) { 476 blk_mq_tagset_busy_iter(ctrl->tagset, 477 nvme_cancel_request, ctrl); 478 blk_mq_tagset_wait_completed_request(ctrl->tagset); 479 } 480 } 481 EXPORT_SYMBOL_GPL(nvme_cancel_tagset); 482 483 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl) 484 { 485 if (ctrl->admin_tagset) { 486 blk_mq_tagset_busy_iter(ctrl->admin_tagset, 487 nvme_cancel_request, ctrl); 488 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset); 489 } 490 } 491 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset); 492 493 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 494 enum nvme_ctrl_state new_state) 495 { 496 enum nvme_ctrl_state old_state; 497 unsigned long flags; 498 bool changed = false; 499 500 spin_lock_irqsave(&ctrl->lock, flags); 501 502 old_state = ctrl->state; 503 switch (new_state) { 504 case NVME_CTRL_LIVE: 505 switch (old_state) { 506 case NVME_CTRL_NEW: 507 case NVME_CTRL_RESETTING: 508 case NVME_CTRL_CONNECTING: 509 changed = true; 510 fallthrough; 511 default: 512 break; 513 } 514 break; 515 case NVME_CTRL_RESETTING: 516 switch (old_state) { 517 case NVME_CTRL_NEW: 518 case NVME_CTRL_LIVE: 519 changed = true; 520 fallthrough; 521 default: 522 break; 523 } 524 break; 525 case NVME_CTRL_CONNECTING: 526 switch (old_state) { 527 case NVME_CTRL_NEW: 528 case NVME_CTRL_RESETTING: 529 changed = true; 530 fallthrough; 531 default: 532 break; 533 } 534 break; 535 case NVME_CTRL_DELETING: 536 switch (old_state) { 537 case NVME_CTRL_LIVE: 538 case NVME_CTRL_RESETTING: 539 case NVME_CTRL_CONNECTING: 540 changed = true; 541 fallthrough; 542 default: 543 break; 544 } 545 break; 546 case NVME_CTRL_DELETING_NOIO: 547 switch (old_state) { 548 case NVME_CTRL_DELETING: 549 case NVME_CTRL_DEAD: 550 changed = true; 551 fallthrough; 552 default: 553 break; 554 } 555 break; 556 case NVME_CTRL_DEAD: 557 switch (old_state) { 558 case NVME_CTRL_DELETING: 559 changed = true; 560 fallthrough; 561 default: 562 break; 563 } 564 break; 565 default: 566 break; 567 } 568 569 if (changed) { 570 ctrl->state = new_state; 571 wake_up_all(&ctrl->state_wq); 572 } 573 574 spin_unlock_irqrestore(&ctrl->lock, flags); 575 if (!changed) 576 return false; 577 578 if (ctrl->state == NVME_CTRL_LIVE) { 579 if (old_state == NVME_CTRL_CONNECTING) 580 nvme_stop_failfast_work(ctrl); 581 nvme_kick_requeue_lists(ctrl); 582 } else if (ctrl->state == NVME_CTRL_CONNECTING && 583 old_state == NVME_CTRL_RESETTING) { 584 nvme_start_failfast_work(ctrl); 585 } 586 return changed; 587 } 588 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 589 590 /* 591 * Returns true for sink states that can't ever transition back to live. 592 */ 593 static bool nvme_state_terminal(struct nvme_ctrl *ctrl) 594 { 595 switch (ctrl->state) { 596 case NVME_CTRL_NEW: 597 case NVME_CTRL_LIVE: 598 case NVME_CTRL_RESETTING: 599 case NVME_CTRL_CONNECTING: 600 return false; 601 case NVME_CTRL_DELETING: 602 case NVME_CTRL_DELETING_NOIO: 603 case NVME_CTRL_DEAD: 604 return true; 605 default: 606 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 607 return true; 608 } 609 } 610 611 /* 612 * Waits for the controller state to be resetting, or returns false if it is 613 * not possible to ever transition to that state. 614 */ 615 bool nvme_wait_reset(struct nvme_ctrl *ctrl) 616 { 617 wait_event(ctrl->state_wq, 618 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) || 619 nvme_state_terminal(ctrl)); 620 return ctrl->state == NVME_CTRL_RESETTING; 621 } 622 EXPORT_SYMBOL_GPL(nvme_wait_reset); 623 624 static void nvme_free_ns_head(struct kref *ref) 625 { 626 struct nvme_ns_head *head = 627 container_of(ref, struct nvme_ns_head, ref); 628 629 nvme_mpath_remove_disk(head); 630 ida_free(&head->subsys->ns_ida, head->instance); 631 cleanup_srcu_struct(&head->srcu); 632 nvme_put_subsystem(head->subsys); 633 kfree(head); 634 } 635 636 bool nvme_tryget_ns_head(struct nvme_ns_head *head) 637 { 638 return kref_get_unless_zero(&head->ref); 639 } 640 641 void nvme_put_ns_head(struct nvme_ns_head *head) 642 { 643 kref_put(&head->ref, nvme_free_ns_head); 644 } 645 646 static void nvme_free_ns(struct kref *kref) 647 { 648 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 649 650 put_disk(ns->disk); 651 nvme_put_ns_head(ns->head); 652 nvme_put_ctrl(ns->ctrl); 653 kfree(ns); 654 } 655 656 static inline bool nvme_get_ns(struct nvme_ns *ns) 657 { 658 return kref_get_unless_zero(&ns->kref); 659 } 660 661 void nvme_put_ns(struct nvme_ns *ns) 662 { 663 kref_put(&ns->kref, nvme_free_ns); 664 } 665 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU); 666 667 static inline void nvme_clear_nvme_request(struct request *req) 668 { 669 nvme_req(req)->status = 0; 670 nvme_req(req)->retries = 0; 671 nvme_req(req)->flags = 0; 672 req->rq_flags |= RQF_DONTPREP; 673 } 674 675 /* initialize a passthrough request */ 676 void nvme_init_request(struct request *req, struct nvme_command *cmd) 677 { 678 if (req->q->queuedata) 679 req->timeout = NVME_IO_TIMEOUT; 680 else /* no queuedata implies admin queue */ 681 req->timeout = NVME_ADMIN_TIMEOUT; 682 683 /* passthru commands should let the driver set the SGL flags */ 684 cmd->common.flags &= ~NVME_CMD_SGL_ALL; 685 686 req->cmd_flags |= REQ_FAILFAST_DRIVER; 687 if (req->mq_hctx->type == HCTX_TYPE_POLL) 688 req->cmd_flags |= REQ_POLLED; 689 nvme_clear_nvme_request(req); 690 req->rq_flags |= RQF_QUIET; 691 memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd)); 692 } 693 EXPORT_SYMBOL_GPL(nvme_init_request); 694 695 /* 696 * For something we're not in a state to send to the device the default action 697 * is to busy it and retry it after the controller state is recovered. However, 698 * if the controller is deleting or if anything is marked for failfast or 699 * nvme multipath it is immediately failed. 700 * 701 * Note: commands used to initialize the controller will be marked for failfast. 702 * Note: nvme cli/ioctl commands are marked for failfast. 703 */ 704 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 705 struct request *rq) 706 { 707 if (ctrl->state != NVME_CTRL_DELETING_NOIO && 708 ctrl->state != NVME_CTRL_DELETING && 709 ctrl->state != NVME_CTRL_DEAD && 710 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) && 711 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH)) 712 return BLK_STS_RESOURCE; 713 return nvme_host_path_error(rq); 714 } 715 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command); 716 717 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 718 bool queue_live) 719 { 720 struct nvme_request *req = nvme_req(rq); 721 722 /* 723 * currently we have a problem sending passthru commands 724 * on the admin_q if the controller is not LIVE because we can't 725 * make sure that they are going out after the admin connect, 726 * controller enable and/or other commands in the initialization 727 * sequence. until the controller will be LIVE, fail with 728 * BLK_STS_RESOURCE so that they will be rescheduled. 729 */ 730 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD)) 731 return false; 732 733 if (ctrl->ops->flags & NVME_F_FABRICS) { 734 /* 735 * Only allow commands on a live queue, except for the connect 736 * command, which is require to set the queue live in the 737 * appropinquate states. 738 */ 739 switch (ctrl->state) { 740 case NVME_CTRL_CONNECTING: 741 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) && 742 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect || 743 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send || 744 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive)) 745 return true; 746 break; 747 default: 748 break; 749 case NVME_CTRL_DEAD: 750 return false; 751 } 752 } 753 754 return queue_live; 755 } 756 EXPORT_SYMBOL_GPL(__nvme_check_ready); 757 758 static inline void nvme_setup_flush(struct nvme_ns *ns, 759 struct nvme_command *cmnd) 760 { 761 memset(cmnd, 0, sizeof(*cmnd)); 762 cmnd->common.opcode = nvme_cmd_flush; 763 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 764 } 765 766 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 767 struct nvme_command *cmnd) 768 { 769 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 770 struct nvme_dsm_range *range; 771 struct bio *bio; 772 773 /* 774 * Some devices do not consider the DSM 'Number of Ranges' field when 775 * determining how much data to DMA. Always allocate memory for maximum 776 * number of segments to prevent device reading beyond end of buffer. 777 */ 778 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES; 779 780 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN); 781 if (!range) { 782 /* 783 * If we fail allocation our range, fallback to the controller 784 * discard page. If that's also busy, it's safe to return 785 * busy, as we know we can make progress once that's freed. 786 */ 787 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 788 return BLK_STS_RESOURCE; 789 790 range = page_address(ns->ctrl->discard_page); 791 } 792 793 if (queue_max_discard_segments(req->q) == 1) { 794 u64 slba = nvme_sect_to_lba(ns, blk_rq_pos(req)); 795 u32 nlb = blk_rq_sectors(req) >> (ns->lba_shift - 9); 796 797 range[0].cattr = cpu_to_le32(0); 798 range[0].nlb = cpu_to_le32(nlb); 799 range[0].slba = cpu_to_le64(slba); 800 n = 1; 801 } else { 802 __rq_for_each_bio(bio, req) { 803 u64 slba = nvme_sect_to_lba(ns, bio->bi_iter.bi_sector); 804 u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift; 805 806 if (n < segments) { 807 range[n].cattr = cpu_to_le32(0); 808 range[n].nlb = cpu_to_le32(nlb); 809 range[n].slba = cpu_to_le64(slba); 810 } 811 n++; 812 } 813 } 814 815 if (WARN_ON_ONCE(n != segments)) { 816 if (virt_to_page(range) == ns->ctrl->discard_page) 817 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 818 else 819 kfree(range); 820 return BLK_STS_IOERR; 821 } 822 823 memset(cmnd, 0, sizeof(*cmnd)); 824 cmnd->dsm.opcode = nvme_cmd_dsm; 825 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 826 cmnd->dsm.nr = cpu_to_le32(segments - 1); 827 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 828 829 bvec_set_virt(&req->special_vec, range, alloc_size); 830 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 831 832 return BLK_STS_OK; 833 } 834 835 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd, 836 struct request *req) 837 { 838 u32 upper, lower; 839 u64 ref48; 840 841 /* both rw and write zeroes share the same reftag format */ 842 switch (ns->guard_type) { 843 case NVME_NVM_NS_16B_GUARD: 844 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 845 break; 846 case NVME_NVM_NS_64B_GUARD: 847 ref48 = ext_pi_ref_tag(req); 848 lower = lower_32_bits(ref48); 849 upper = upper_32_bits(ref48); 850 851 cmnd->rw.reftag = cpu_to_le32(lower); 852 cmnd->rw.cdw3 = cpu_to_le32(upper); 853 break; 854 default: 855 break; 856 } 857 } 858 859 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns, 860 struct request *req, struct nvme_command *cmnd) 861 { 862 memset(cmnd, 0, sizeof(*cmnd)); 863 864 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 865 return nvme_setup_discard(ns, req, cmnd); 866 867 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes; 868 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id); 869 cmnd->write_zeroes.slba = 870 cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 871 cmnd->write_zeroes.length = 872 cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 873 874 if (!(req->cmd_flags & REQ_NOUNMAP) && (ns->features & NVME_NS_DEAC)) 875 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC); 876 877 if (nvme_ns_has_pi(ns)) { 878 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT); 879 880 switch (ns->pi_type) { 881 case NVME_NS_DPS_PI_TYPE1: 882 case NVME_NS_DPS_PI_TYPE2: 883 nvme_set_ref_tag(ns, cmnd, req); 884 break; 885 } 886 } 887 888 return BLK_STS_OK; 889 } 890 891 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 892 struct request *req, struct nvme_command *cmnd, 893 enum nvme_opcode op) 894 { 895 u16 control = 0; 896 u32 dsmgmt = 0; 897 898 if (req->cmd_flags & REQ_FUA) 899 control |= NVME_RW_FUA; 900 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 901 control |= NVME_RW_LR; 902 903 if (req->cmd_flags & REQ_RAHEAD) 904 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 905 906 cmnd->rw.opcode = op; 907 cmnd->rw.flags = 0; 908 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 909 cmnd->rw.cdw2 = 0; 910 cmnd->rw.cdw3 = 0; 911 cmnd->rw.metadata = 0; 912 cmnd->rw.slba = cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 913 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 914 cmnd->rw.reftag = 0; 915 cmnd->rw.apptag = 0; 916 cmnd->rw.appmask = 0; 917 918 if (ns->ms) { 919 /* 920 * If formated with metadata, the block layer always provides a 921 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 922 * we enable the PRACT bit for protection information or set the 923 * namespace capacity to zero to prevent any I/O. 924 */ 925 if (!blk_integrity_rq(req)) { 926 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns))) 927 return BLK_STS_NOTSUPP; 928 control |= NVME_RW_PRINFO_PRACT; 929 } 930 931 switch (ns->pi_type) { 932 case NVME_NS_DPS_PI_TYPE3: 933 control |= NVME_RW_PRINFO_PRCHK_GUARD; 934 break; 935 case NVME_NS_DPS_PI_TYPE1: 936 case NVME_NS_DPS_PI_TYPE2: 937 control |= NVME_RW_PRINFO_PRCHK_GUARD | 938 NVME_RW_PRINFO_PRCHK_REF; 939 if (op == nvme_cmd_zone_append) 940 control |= NVME_RW_APPEND_PIREMAP; 941 nvme_set_ref_tag(ns, cmnd, req); 942 break; 943 } 944 } 945 946 cmnd->rw.control = cpu_to_le16(control); 947 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 948 return 0; 949 } 950 951 void nvme_cleanup_cmd(struct request *req) 952 { 953 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 954 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 955 956 if (req->special_vec.bv_page == ctrl->discard_page) 957 clear_bit_unlock(0, &ctrl->discard_page_busy); 958 else 959 kfree(bvec_virt(&req->special_vec)); 960 } 961 } 962 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 963 964 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req) 965 { 966 struct nvme_command *cmd = nvme_req(req)->cmd; 967 blk_status_t ret = BLK_STS_OK; 968 969 if (!(req->rq_flags & RQF_DONTPREP)) 970 nvme_clear_nvme_request(req); 971 972 switch (req_op(req)) { 973 case REQ_OP_DRV_IN: 974 case REQ_OP_DRV_OUT: 975 /* these are setup prior to execution in nvme_init_request() */ 976 break; 977 case REQ_OP_FLUSH: 978 nvme_setup_flush(ns, cmd); 979 break; 980 case REQ_OP_ZONE_RESET_ALL: 981 case REQ_OP_ZONE_RESET: 982 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET); 983 break; 984 case REQ_OP_ZONE_OPEN: 985 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN); 986 break; 987 case REQ_OP_ZONE_CLOSE: 988 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE); 989 break; 990 case REQ_OP_ZONE_FINISH: 991 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH); 992 break; 993 case REQ_OP_WRITE_ZEROES: 994 ret = nvme_setup_write_zeroes(ns, req, cmd); 995 break; 996 case REQ_OP_DISCARD: 997 ret = nvme_setup_discard(ns, req, cmd); 998 break; 999 case REQ_OP_READ: 1000 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read); 1001 break; 1002 case REQ_OP_WRITE: 1003 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write); 1004 break; 1005 case REQ_OP_ZONE_APPEND: 1006 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append); 1007 break; 1008 default: 1009 WARN_ON_ONCE(1); 1010 return BLK_STS_IOERR; 1011 } 1012 1013 cmd->common.command_id = nvme_cid(req); 1014 trace_nvme_setup_cmd(req, cmd); 1015 return ret; 1016 } 1017 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 1018 1019 /* 1020 * Return values: 1021 * 0: success 1022 * >0: nvme controller's cqe status response 1023 * <0: kernel error in lieu of controller response 1024 */ 1025 int nvme_execute_rq(struct request *rq, bool at_head) 1026 { 1027 blk_status_t status; 1028 1029 status = blk_execute_rq(rq, at_head); 1030 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED) 1031 return -EINTR; 1032 if (nvme_req(rq)->status) 1033 return nvme_req(rq)->status; 1034 return blk_status_to_errno(status); 1035 } 1036 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU); 1037 1038 /* 1039 * Returns 0 on success. If the result is negative, it's a Linux error code; 1040 * if the result is positive, it's an NVM Express status code 1041 */ 1042 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1043 union nvme_result *result, void *buffer, unsigned bufflen, 1044 int qid, int at_head, blk_mq_req_flags_t flags) 1045 { 1046 struct request *req; 1047 int ret; 1048 1049 if (qid == NVME_QID_ANY) 1050 req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags); 1051 else 1052 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags, 1053 qid - 1); 1054 1055 if (IS_ERR(req)) 1056 return PTR_ERR(req); 1057 nvme_init_request(req, cmd); 1058 1059 if (buffer && bufflen) { 1060 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); 1061 if (ret) 1062 goto out; 1063 } 1064 1065 ret = nvme_execute_rq(req, at_head); 1066 if (result && ret >= 0) 1067 *result = nvme_req(req)->result; 1068 out: 1069 blk_mq_free_request(req); 1070 return ret; 1071 } 1072 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 1073 1074 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1075 void *buffer, unsigned bufflen) 1076 { 1077 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 1078 NVME_QID_ANY, 0, 0); 1079 } 1080 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 1081 1082 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1083 { 1084 u32 effects = 0; 1085 1086 if (ns) { 1087 effects = le32_to_cpu(ns->head->effects->iocs[opcode]); 1088 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC)) 1089 dev_warn_once(ctrl->device, 1090 "IO command:%02x has unusual effects:%08x\n", 1091 opcode, effects); 1092 1093 /* 1094 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues, 1095 * which would deadlock when done on an I/O command. Note that 1096 * We already warn about an unusual effect above. 1097 */ 1098 effects &= ~NVME_CMD_EFFECTS_CSE_MASK; 1099 } else { 1100 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1101 } 1102 1103 return effects; 1104 } 1105 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU); 1106 1107 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1108 { 1109 u32 effects = nvme_command_effects(ctrl, ns, opcode); 1110 1111 /* 1112 * For simplicity, IO to all namespaces is quiesced even if the command 1113 * effects say only one namespace is affected. 1114 */ 1115 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1116 mutex_lock(&ctrl->scan_lock); 1117 mutex_lock(&ctrl->subsys->lock); 1118 nvme_mpath_start_freeze(ctrl->subsys); 1119 nvme_mpath_wait_freeze(ctrl->subsys); 1120 nvme_start_freeze(ctrl); 1121 nvme_wait_freeze(ctrl); 1122 } 1123 return effects; 1124 } 1125 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU); 1126 1127 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1128 struct nvme_command *cmd, int status) 1129 { 1130 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1131 nvme_unfreeze(ctrl); 1132 nvme_mpath_unfreeze(ctrl->subsys); 1133 mutex_unlock(&ctrl->subsys->lock); 1134 mutex_unlock(&ctrl->scan_lock); 1135 } 1136 if (effects & NVME_CMD_EFFECTS_CCC) { 1137 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY, 1138 &ctrl->flags)) { 1139 dev_info(ctrl->device, 1140 "controller capabilities changed, reset may be required to take effect.\n"); 1141 } 1142 } 1143 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) { 1144 nvme_queue_scan(ctrl); 1145 flush_work(&ctrl->scan_work); 1146 } 1147 if (ns) 1148 return; 1149 1150 switch (cmd->common.opcode) { 1151 case nvme_admin_set_features: 1152 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) { 1153 case NVME_FEAT_KATO: 1154 /* 1155 * Keep alive commands interval on the host should be 1156 * updated when KATO is modified by Set Features 1157 * commands. 1158 */ 1159 if (!status) 1160 nvme_update_keep_alive(ctrl, cmd); 1161 break; 1162 default: 1163 break; 1164 } 1165 break; 1166 default: 1167 break; 1168 } 1169 } 1170 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU); 1171 1172 /* 1173 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1: 1174 * 1175 * The host should send Keep Alive commands at half of the Keep Alive Timeout 1176 * accounting for transport roundtrip times [..]. 1177 */ 1178 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl) 1179 { 1180 unsigned long delay = ctrl->kato * HZ / 2; 1181 1182 /* 1183 * When using Traffic Based Keep Alive, we need to run 1184 * nvme_keep_alive_work at twice the normal frequency, as one 1185 * command completion can postpone sending a keep alive command 1186 * by up to twice the delay between runs. 1187 */ 1188 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) 1189 delay /= 2; 1190 return delay; 1191 } 1192 1193 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl) 1194 { 1195 queue_delayed_work(nvme_wq, &ctrl->ka_work, 1196 nvme_keep_alive_work_period(ctrl)); 1197 } 1198 1199 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq, 1200 blk_status_t status) 1201 { 1202 struct nvme_ctrl *ctrl = rq->end_io_data; 1203 unsigned long flags; 1204 bool startka = false; 1205 unsigned long rtt = jiffies - (rq->deadline - rq->timeout); 1206 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1207 1208 /* 1209 * Subtract off the keepalive RTT so nvme_keep_alive_work runs 1210 * at the desired frequency. 1211 */ 1212 if (rtt <= delay) { 1213 delay -= rtt; 1214 } else { 1215 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n", 1216 jiffies_to_msecs(rtt)); 1217 delay = 0; 1218 } 1219 1220 blk_mq_free_request(rq); 1221 1222 if (status) { 1223 dev_err(ctrl->device, 1224 "failed nvme_keep_alive_end_io error=%d\n", 1225 status); 1226 return RQ_END_IO_NONE; 1227 } 1228 1229 ctrl->ka_last_check_time = jiffies; 1230 ctrl->comp_seen = false; 1231 spin_lock_irqsave(&ctrl->lock, flags); 1232 if (ctrl->state == NVME_CTRL_LIVE || 1233 ctrl->state == NVME_CTRL_CONNECTING) 1234 startka = true; 1235 spin_unlock_irqrestore(&ctrl->lock, flags); 1236 if (startka) 1237 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1238 return RQ_END_IO_NONE; 1239 } 1240 1241 static void nvme_keep_alive_work(struct work_struct *work) 1242 { 1243 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 1244 struct nvme_ctrl, ka_work); 1245 bool comp_seen = ctrl->comp_seen; 1246 struct request *rq; 1247 1248 ctrl->ka_last_check_time = jiffies; 1249 1250 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 1251 dev_dbg(ctrl->device, 1252 "reschedule traffic based keep-alive timer\n"); 1253 ctrl->comp_seen = false; 1254 nvme_queue_keep_alive_work(ctrl); 1255 return; 1256 } 1257 1258 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd), 1259 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT); 1260 if (IS_ERR(rq)) { 1261 /* allocation failure, reset the controller */ 1262 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq)); 1263 nvme_reset_ctrl(ctrl); 1264 return; 1265 } 1266 nvme_init_request(rq, &ctrl->ka_cmd); 1267 1268 rq->timeout = ctrl->kato * HZ; 1269 rq->end_io = nvme_keep_alive_end_io; 1270 rq->end_io_data = ctrl; 1271 blk_execute_rq_nowait(rq, false); 1272 } 1273 1274 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 1275 { 1276 if (unlikely(ctrl->kato == 0)) 1277 return; 1278 1279 nvme_queue_keep_alive_work(ctrl); 1280 } 1281 1282 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 1283 { 1284 if (unlikely(ctrl->kato == 0)) 1285 return; 1286 1287 cancel_delayed_work_sync(&ctrl->ka_work); 1288 } 1289 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 1290 1291 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 1292 struct nvme_command *cmd) 1293 { 1294 unsigned int new_kato = 1295 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000); 1296 1297 dev_info(ctrl->device, 1298 "keep alive interval updated from %u ms to %u ms\n", 1299 ctrl->kato * 1000 / 2, new_kato * 1000 / 2); 1300 1301 nvme_stop_keep_alive(ctrl); 1302 ctrl->kato = new_kato; 1303 nvme_start_keep_alive(ctrl); 1304 } 1305 1306 /* 1307 * In NVMe 1.0 the CNS field was just a binary controller or namespace 1308 * flag, thus sending any new CNS opcodes has a big chance of not working. 1309 * Qemu unfortunately had that bug after reporting a 1.1 version compliance 1310 * (but not for any later version). 1311 */ 1312 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl) 1313 { 1314 if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS) 1315 return ctrl->vs < NVME_VS(1, 2, 0); 1316 return ctrl->vs < NVME_VS(1, 1, 0); 1317 } 1318 1319 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 1320 { 1321 struct nvme_command c = { }; 1322 int error; 1323 1324 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1325 c.identify.opcode = nvme_admin_identify; 1326 c.identify.cns = NVME_ID_CNS_CTRL; 1327 1328 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 1329 if (!*id) 1330 return -ENOMEM; 1331 1332 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 1333 sizeof(struct nvme_id_ctrl)); 1334 if (error) 1335 kfree(*id); 1336 return error; 1337 } 1338 1339 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, 1340 struct nvme_ns_id_desc *cur, bool *csi_seen) 1341 { 1342 const char *warn_str = "ctrl returned bogus length:"; 1343 void *data = cur; 1344 1345 switch (cur->nidt) { 1346 case NVME_NIDT_EUI64: 1347 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1348 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n", 1349 warn_str, cur->nidl); 1350 return -1; 1351 } 1352 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1353 return NVME_NIDT_EUI64_LEN; 1354 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN); 1355 return NVME_NIDT_EUI64_LEN; 1356 case NVME_NIDT_NGUID: 1357 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1358 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n", 1359 warn_str, cur->nidl); 1360 return -1; 1361 } 1362 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1363 return NVME_NIDT_NGUID_LEN; 1364 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN); 1365 return NVME_NIDT_NGUID_LEN; 1366 case NVME_NIDT_UUID: 1367 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1368 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n", 1369 warn_str, cur->nidl); 1370 return -1; 1371 } 1372 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1373 return NVME_NIDT_UUID_LEN; 1374 uuid_copy(&ids->uuid, data + sizeof(*cur)); 1375 return NVME_NIDT_UUID_LEN; 1376 case NVME_NIDT_CSI: 1377 if (cur->nidl != NVME_NIDT_CSI_LEN) { 1378 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n", 1379 warn_str, cur->nidl); 1380 return -1; 1381 } 1382 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN); 1383 *csi_seen = true; 1384 return NVME_NIDT_CSI_LEN; 1385 default: 1386 /* Skip unknown types */ 1387 return cur->nidl; 1388 } 1389 } 1390 1391 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, 1392 struct nvme_ns_info *info) 1393 { 1394 struct nvme_command c = { }; 1395 bool csi_seen = false; 1396 int status, pos, len; 1397 void *data; 1398 1399 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl)) 1400 return 0; 1401 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST) 1402 return 0; 1403 1404 c.identify.opcode = nvme_admin_identify; 1405 c.identify.nsid = cpu_to_le32(info->nsid); 1406 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1407 1408 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1409 if (!data) 1410 return -ENOMEM; 1411 1412 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1413 NVME_IDENTIFY_DATA_SIZE); 1414 if (status) { 1415 dev_warn(ctrl->device, 1416 "Identify Descriptors failed (nsid=%u, status=0x%x)\n", 1417 info->nsid, status); 1418 goto free_data; 1419 } 1420 1421 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1422 struct nvme_ns_id_desc *cur = data + pos; 1423 1424 if (cur->nidl == 0) 1425 break; 1426 1427 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen); 1428 if (len < 0) 1429 break; 1430 1431 len += sizeof(*cur); 1432 } 1433 1434 if (nvme_multi_css(ctrl) && !csi_seen) { 1435 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n", 1436 info->nsid); 1437 status = -EINVAL; 1438 } 1439 1440 free_data: 1441 kfree(data); 1442 return status; 1443 } 1444 1445 static int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1446 struct nvme_id_ns **id) 1447 { 1448 struct nvme_command c = { }; 1449 int error; 1450 1451 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1452 c.identify.opcode = nvme_admin_identify; 1453 c.identify.nsid = cpu_to_le32(nsid); 1454 c.identify.cns = NVME_ID_CNS_NS; 1455 1456 *id = kmalloc(sizeof(**id), GFP_KERNEL); 1457 if (!*id) 1458 return -ENOMEM; 1459 1460 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id)); 1461 if (error) { 1462 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error); 1463 kfree(*id); 1464 } 1465 return error; 1466 } 1467 1468 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl, 1469 struct nvme_ns_info *info) 1470 { 1471 struct nvme_ns_ids *ids = &info->ids; 1472 struct nvme_id_ns *id; 1473 int ret; 1474 1475 ret = nvme_identify_ns(ctrl, info->nsid, &id); 1476 if (ret) 1477 return ret; 1478 1479 if (id->ncap == 0) { 1480 /* namespace not allocated or attached */ 1481 info->is_removed = true; 1482 return -ENODEV; 1483 } 1484 1485 info->anagrpid = id->anagrpid; 1486 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1487 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1488 info->is_ready = true; 1489 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) { 1490 dev_info(ctrl->device, 1491 "Ignoring bogus Namespace Identifiers\n"); 1492 } else { 1493 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1494 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 1495 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64)); 1496 if (ctrl->vs >= NVME_VS(1, 2, 0) && 1497 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 1498 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid)); 1499 } 1500 kfree(id); 1501 return 0; 1502 } 1503 1504 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl, 1505 struct nvme_ns_info *info) 1506 { 1507 struct nvme_id_ns_cs_indep *id; 1508 struct nvme_command c = { 1509 .identify.opcode = nvme_admin_identify, 1510 .identify.nsid = cpu_to_le32(info->nsid), 1511 .identify.cns = NVME_ID_CNS_NS_CS_INDEP, 1512 }; 1513 int ret; 1514 1515 id = kmalloc(sizeof(*id), GFP_KERNEL); 1516 if (!id) 1517 return -ENOMEM; 1518 1519 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 1520 if (!ret) { 1521 info->anagrpid = id->anagrpid; 1522 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1523 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1524 info->is_ready = id->nstat & NVME_NSTAT_NRDY; 1525 } 1526 kfree(id); 1527 return ret; 1528 } 1529 1530 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, 1531 unsigned int dword11, void *buffer, size_t buflen, u32 *result) 1532 { 1533 union nvme_result res = { 0 }; 1534 struct nvme_command c = { }; 1535 int ret; 1536 1537 c.features.opcode = op; 1538 c.features.fid = cpu_to_le32(fid); 1539 c.features.dword11 = cpu_to_le32(dword11); 1540 1541 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1542 buffer, buflen, NVME_QID_ANY, 0, 0); 1543 if (ret >= 0 && result) 1544 *result = le32_to_cpu(res.u32); 1545 return ret; 1546 } 1547 1548 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1549 unsigned int dword11, void *buffer, size_t buflen, 1550 u32 *result) 1551 { 1552 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer, 1553 buflen, result); 1554 } 1555 EXPORT_SYMBOL_GPL(nvme_set_features); 1556 1557 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1558 unsigned int dword11, void *buffer, size_t buflen, 1559 u32 *result) 1560 { 1561 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer, 1562 buflen, result); 1563 } 1564 EXPORT_SYMBOL_GPL(nvme_get_features); 1565 1566 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1567 { 1568 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1569 u32 result; 1570 int status, nr_io_queues; 1571 1572 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1573 &result); 1574 if (status < 0) 1575 return status; 1576 1577 /* 1578 * Degraded controllers might return an error when setting the queue 1579 * count. We still want to be able to bring them online and offer 1580 * access to the admin queue, as that might be only way to fix them up. 1581 */ 1582 if (status > 0) { 1583 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1584 *count = 0; 1585 } else { 1586 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1587 *count = min(*count, nr_io_queues); 1588 } 1589 1590 return 0; 1591 } 1592 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1593 1594 #define NVME_AEN_SUPPORTED \ 1595 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ 1596 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) 1597 1598 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1599 { 1600 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1601 int status; 1602 1603 if (!supported_aens) 1604 return; 1605 1606 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1607 NULL, 0, &result); 1608 if (status) 1609 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1610 supported_aens); 1611 1612 queue_work(nvme_wq, &ctrl->async_event_work); 1613 } 1614 1615 static int nvme_ns_open(struct nvme_ns *ns) 1616 { 1617 1618 /* should never be called due to GENHD_FL_HIDDEN */ 1619 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head))) 1620 goto fail; 1621 if (!nvme_get_ns(ns)) 1622 goto fail; 1623 if (!try_module_get(ns->ctrl->ops->module)) 1624 goto fail_put_ns; 1625 1626 return 0; 1627 1628 fail_put_ns: 1629 nvme_put_ns(ns); 1630 fail: 1631 return -ENXIO; 1632 } 1633 1634 static void nvme_ns_release(struct nvme_ns *ns) 1635 { 1636 1637 module_put(ns->ctrl->ops->module); 1638 nvme_put_ns(ns); 1639 } 1640 1641 static int nvme_open(struct gendisk *disk, blk_mode_t mode) 1642 { 1643 return nvme_ns_open(disk->private_data); 1644 } 1645 1646 static void nvme_release(struct gendisk *disk) 1647 { 1648 nvme_ns_release(disk->private_data); 1649 } 1650 1651 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1652 { 1653 /* some standard values */ 1654 geo->heads = 1 << 6; 1655 geo->sectors = 1 << 5; 1656 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1657 return 0; 1658 } 1659 1660 #ifdef CONFIG_BLK_DEV_INTEGRITY 1661 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns, 1662 u32 max_integrity_segments) 1663 { 1664 struct blk_integrity integrity = { }; 1665 1666 switch (ns->pi_type) { 1667 case NVME_NS_DPS_PI_TYPE3: 1668 switch (ns->guard_type) { 1669 case NVME_NVM_NS_16B_GUARD: 1670 integrity.profile = &t10_pi_type3_crc; 1671 integrity.tag_size = sizeof(u16) + sizeof(u32); 1672 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1673 break; 1674 case NVME_NVM_NS_64B_GUARD: 1675 integrity.profile = &ext_pi_type3_crc64; 1676 integrity.tag_size = sizeof(u16) + 6; 1677 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1678 break; 1679 default: 1680 integrity.profile = NULL; 1681 break; 1682 } 1683 break; 1684 case NVME_NS_DPS_PI_TYPE1: 1685 case NVME_NS_DPS_PI_TYPE2: 1686 switch (ns->guard_type) { 1687 case NVME_NVM_NS_16B_GUARD: 1688 integrity.profile = &t10_pi_type1_crc; 1689 integrity.tag_size = sizeof(u16); 1690 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1691 break; 1692 case NVME_NVM_NS_64B_GUARD: 1693 integrity.profile = &ext_pi_type1_crc64; 1694 integrity.tag_size = sizeof(u16); 1695 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1696 break; 1697 default: 1698 integrity.profile = NULL; 1699 break; 1700 } 1701 break; 1702 default: 1703 integrity.profile = NULL; 1704 break; 1705 } 1706 1707 integrity.tuple_size = ns->ms; 1708 blk_integrity_register(disk, &integrity); 1709 blk_queue_max_integrity_segments(disk->queue, max_integrity_segments); 1710 } 1711 #else 1712 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns, 1713 u32 max_integrity_segments) 1714 { 1715 } 1716 #endif /* CONFIG_BLK_DEV_INTEGRITY */ 1717 1718 static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns) 1719 { 1720 struct nvme_ctrl *ctrl = ns->ctrl; 1721 struct request_queue *queue = disk->queue; 1722 u32 size = queue_logical_block_size(queue); 1723 1724 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns, UINT_MAX)) 1725 ctrl->max_discard_sectors = nvme_lba_to_sect(ns, ctrl->dmrsl); 1726 1727 if (ctrl->max_discard_sectors == 0) { 1728 blk_queue_max_discard_sectors(queue, 0); 1729 return; 1730 } 1731 1732 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) < 1733 NVME_DSM_MAX_RANGES); 1734 1735 queue->limits.discard_granularity = size; 1736 1737 /* If discard is already enabled, don't reset queue limits */ 1738 if (queue->limits.max_discard_sectors) 1739 return; 1740 1741 blk_queue_max_discard_sectors(queue, ctrl->max_discard_sectors); 1742 blk_queue_max_discard_segments(queue, ctrl->max_discard_segments); 1743 1744 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 1745 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX); 1746 } 1747 1748 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 1749 { 1750 return uuid_equal(&a->uuid, &b->uuid) && 1751 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 1752 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 && 1753 a->csi == b->csi; 1754 } 1755 1756 static int nvme_init_ms(struct nvme_ns *ns, struct nvme_id_ns *id) 1757 { 1758 bool first = id->dps & NVME_NS_DPS_PI_FIRST; 1759 unsigned lbaf = nvme_lbaf_index(id->flbas); 1760 struct nvme_ctrl *ctrl = ns->ctrl; 1761 struct nvme_command c = { }; 1762 struct nvme_id_ns_nvm *nvm; 1763 int ret = 0; 1764 u32 elbaf; 1765 1766 ns->pi_size = 0; 1767 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms); 1768 if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) { 1769 ns->pi_size = sizeof(struct t10_pi_tuple); 1770 ns->guard_type = NVME_NVM_NS_16B_GUARD; 1771 goto set_pi; 1772 } 1773 1774 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); 1775 if (!nvm) 1776 return -ENOMEM; 1777 1778 c.identify.opcode = nvme_admin_identify; 1779 c.identify.nsid = cpu_to_le32(ns->head->ns_id); 1780 c.identify.cns = NVME_ID_CNS_CS_NS; 1781 c.identify.csi = NVME_CSI_NVM; 1782 1783 ret = nvme_submit_sync_cmd(ns->ctrl->admin_q, &c, nvm, sizeof(*nvm)); 1784 if (ret) 1785 goto free_data; 1786 1787 elbaf = le32_to_cpu(nvm->elbaf[lbaf]); 1788 1789 /* no support for storage tag formats right now */ 1790 if (nvme_elbaf_sts(elbaf)) 1791 goto free_data; 1792 1793 ns->guard_type = nvme_elbaf_guard_type(elbaf); 1794 switch (ns->guard_type) { 1795 case NVME_NVM_NS_64B_GUARD: 1796 ns->pi_size = sizeof(struct crc64_pi_tuple); 1797 break; 1798 case NVME_NVM_NS_16B_GUARD: 1799 ns->pi_size = sizeof(struct t10_pi_tuple); 1800 break; 1801 default: 1802 break; 1803 } 1804 1805 free_data: 1806 kfree(nvm); 1807 set_pi: 1808 if (ns->pi_size && (first || ns->ms == ns->pi_size)) 1809 ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1810 else 1811 ns->pi_type = 0; 1812 1813 return ret; 1814 } 1815 1816 static int nvme_configure_metadata(struct nvme_ns *ns, struct nvme_id_ns *id) 1817 { 1818 struct nvme_ctrl *ctrl = ns->ctrl; 1819 int ret; 1820 1821 ret = nvme_init_ms(ns, id); 1822 if (ret) 1823 return ret; 1824 1825 ns->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS); 1826 if (!ns->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 1827 return 0; 1828 1829 if (ctrl->ops->flags & NVME_F_FABRICS) { 1830 /* 1831 * The NVMe over Fabrics specification only supports metadata as 1832 * part of the extended data LBA. We rely on HCA/HBA support to 1833 * remap the separate metadata buffer from the block layer. 1834 */ 1835 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT))) 1836 return 0; 1837 1838 ns->features |= NVME_NS_EXT_LBAS; 1839 1840 /* 1841 * The current fabrics transport drivers support namespace 1842 * metadata formats only if nvme_ns_has_pi() returns true. 1843 * Suppress support for all other formats so the namespace will 1844 * have a 0 capacity and not be usable through the block stack. 1845 * 1846 * Note, this check will need to be modified if any drivers 1847 * gain the ability to use other metadata formats. 1848 */ 1849 if (ctrl->max_integrity_segments && nvme_ns_has_pi(ns)) 1850 ns->features |= NVME_NS_METADATA_SUPPORTED; 1851 } else { 1852 /* 1853 * For PCIe controllers, we can't easily remap the separate 1854 * metadata buffer from the block layer and thus require a 1855 * separate metadata buffer for block layer metadata/PI support. 1856 * We allow extended LBAs for the passthrough interface, though. 1857 */ 1858 if (id->flbas & NVME_NS_FLBAS_META_EXT) 1859 ns->features |= NVME_NS_EXT_LBAS; 1860 else 1861 ns->features |= NVME_NS_METADATA_SUPPORTED; 1862 } 1863 return 0; 1864 } 1865 1866 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl, 1867 struct request_queue *q) 1868 { 1869 bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT; 1870 1871 if (ctrl->max_hw_sectors) { 1872 u32 max_segments = 1873 (ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1; 1874 1875 max_segments = min_not_zero(max_segments, ctrl->max_segments); 1876 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors); 1877 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX)); 1878 } 1879 blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1); 1880 blk_queue_dma_alignment(q, 3); 1881 blk_queue_write_cache(q, vwc, vwc); 1882 } 1883 1884 static void nvme_update_disk_info(struct gendisk *disk, 1885 struct nvme_ns *ns, struct nvme_id_ns *id) 1886 { 1887 sector_t capacity = nvme_lba_to_sect(ns, le64_to_cpu(id->nsze)); 1888 u32 bs = 1U << ns->lba_shift; 1889 u32 atomic_bs, phys_bs, io_opt = 0; 1890 1891 /* 1892 * The block layer can't support LBA sizes larger than the page size 1893 * yet, so catch this early and don't allow block I/O. 1894 */ 1895 if (ns->lba_shift > PAGE_SHIFT) { 1896 capacity = 0; 1897 bs = (1 << 9); 1898 } 1899 1900 blk_integrity_unregister(disk); 1901 1902 atomic_bs = phys_bs = bs; 1903 if (id->nabo == 0) { 1904 /* 1905 * Bit 1 indicates whether NAWUPF is defined for this namespace 1906 * and whether it should be used instead of AWUPF. If NAWUPF == 1907 * 0 then AWUPF must be used instead. 1908 */ 1909 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) 1910 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs; 1911 else 1912 atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs; 1913 } 1914 1915 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) { 1916 /* NPWG = Namespace Preferred Write Granularity */ 1917 phys_bs = bs * (1 + le16_to_cpu(id->npwg)); 1918 /* NOWS = Namespace Optimal Write Size */ 1919 io_opt = bs * (1 + le16_to_cpu(id->nows)); 1920 } 1921 1922 blk_queue_logical_block_size(disk->queue, bs); 1923 /* 1924 * Linux filesystems assume writing a single physical block is 1925 * an atomic operation. Hence limit the physical block size to the 1926 * value of the Atomic Write Unit Power Fail parameter. 1927 */ 1928 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs)); 1929 blk_queue_io_min(disk->queue, phys_bs); 1930 blk_queue_io_opt(disk->queue, io_opt); 1931 1932 /* 1933 * Register a metadata profile for PI, or the plain non-integrity NVMe 1934 * metadata masquerading as Type 0 if supported, otherwise reject block 1935 * I/O to namespaces with metadata except when the namespace supports 1936 * PI, as it can strip/insert in that case. 1937 */ 1938 if (ns->ms) { 1939 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 1940 (ns->features & NVME_NS_METADATA_SUPPORTED)) 1941 nvme_init_integrity(disk, ns, 1942 ns->ctrl->max_integrity_segments); 1943 else if (!nvme_ns_has_pi(ns)) 1944 capacity = 0; 1945 } 1946 1947 set_capacity_and_notify(disk, capacity); 1948 1949 nvme_config_discard(disk, ns); 1950 blk_queue_max_write_zeroes_sectors(disk->queue, 1951 ns->ctrl->max_zeroes_sectors); 1952 } 1953 1954 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info) 1955 { 1956 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags); 1957 } 1958 1959 static inline bool nvme_first_scan(struct gendisk *disk) 1960 { 1961 /* nvme_alloc_ns() scans the disk prior to adding it */ 1962 return !disk_live(disk); 1963 } 1964 1965 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id) 1966 { 1967 struct nvme_ctrl *ctrl = ns->ctrl; 1968 u32 iob; 1969 1970 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 1971 is_power_of_2(ctrl->max_hw_sectors)) 1972 iob = ctrl->max_hw_sectors; 1973 else 1974 iob = nvme_lba_to_sect(ns, le16_to_cpu(id->noiob)); 1975 1976 if (!iob) 1977 return; 1978 1979 if (!is_power_of_2(iob)) { 1980 if (nvme_first_scan(ns->disk)) 1981 pr_warn("%s: ignoring unaligned IO boundary:%u\n", 1982 ns->disk->disk_name, iob); 1983 return; 1984 } 1985 1986 if (blk_queue_is_zoned(ns->disk->queue)) { 1987 if (nvme_first_scan(ns->disk)) 1988 pr_warn("%s: ignoring zoned namespace IO boundary\n", 1989 ns->disk->disk_name); 1990 return; 1991 } 1992 1993 blk_queue_chunk_sectors(ns->queue, iob); 1994 } 1995 1996 static int nvme_update_ns_info_generic(struct nvme_ns *ns, 1997 struct nvme_ns_info *info) 1998 { 1999 blk_mq_freeze_queue(ns->disk->queue); 2000 nvme_set_queue_limits(ns->ctrl, ns->queue); 2001 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2002 blk_mq_unfreeze_queue(ns->disk->queue); 2003 2004 if (nvme_ns_head_multipath(ns->head)) { 2005 blk_mq_freeze_queue(ns->head->disk->queue); 2006 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2007 nvme_mpath_revalidate_paths(ns); 2008 blk_stack_limits(&ns->head->disk->queue->limits, 2009 &ns->queue->limits, 0); 2010 ns->head->disk->flags |= GENHD_FL_HIDDEN; 2011 blk_mq_unfreeze_queue(ns->head->disk->queue); 2012 } 2013 2014 /* Hide the block-interface for these devices */ 2015 ns->disk->flags |= GENHD_FL_HIDDEN; 2016 set_bit(NVME_NS_READY, &ns->flags); 2017 2018 return 0; 2019 } 2020 2021 static int nvme_update_ns_info_block(struct nvme_ns *ns, 2022 struct nvme_ns_info *info) 2023 { 2024 struct nvme_id_ns *id; 2025 unsigned lbaf; 2026 int ret; 2027 2028 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id); 2029 if (ret) 2030 return ret; 2031 2032 blk_mq_freeze_queue(ns->disk->queue); 2033 lbaf = nvme_lbaf_index(id->flbas); 2034 ns->lba_shift = id->lbaf[lbaf].ds; 2035 nvme_set_queue_limits(ns->ctrl, ns->queue); 2036 2037 ret = nvme_configure_metadata(ns, id); 2038 if (ret < 0) { 2039 blk_mq_unfreeze_queue(ns->disk->queue); 2040 goto out; 2041 } 2042 nvme_set_chunk_sectors(ns, id); 2043 nvme_update_disk_info(ns->disk, ns, id); 2044 2045 if (ns->head->ids.csi == NVME_CSI_ZNS) { 2046 ret = nvme_update_zone_info(ns, lbaf); 2047 if (ret) { 2048 blk_mq_unfreeze_queue(ns->disk->queue); 2049 goto out; 2050 } 2051 } 2052 2053 /* 2054 * Only set the DEAC bit if the device guarantees that reads from 2055 * deallocated data return zeroes. While the DEAC bit does not 2056 * require that, it must be a no-op if reads from deallocated data 2057 * do not return zeroes. 2058 */ 2059 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3))) 2060 ns->features |= NVME_NS_DEAC; 2061 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2062 set_bit(NVME_NS_READY, &ns->flags); 2063 blk_mq_unfreeze_queue(ns->disk->queue); 2064 2065 if (blk_queue_is_zoned(ns->queue)) { 2066 ret = nvme_revalidate_zones(ns); 2067 if (ret && !nvme_first_scan(ns->disk)) 2068 goto out; 2069 } 2070 2071 if (nvme_ns_head_multipath(ns->head)) { 2072 blk_mq_freeze_queue(ns->head->disk->queue); 2073 nvme_update_disk_info(ns->head->disk, ns, id); 2074 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2075 nvme_mpath_revalidate_paths(ns); 2076 blk_stack_limits(&ns->head->disk->queue->limits, 2077 &ns->queue->limits, 0); 2078 disk_update_readahead(ns->head->disk); 2079 blk_mq_unfreeze_queue(ns->head->disk->queue); 2080 } 2081 2082 ret = 0; 2083 out: 2084 /* 2085 * If probing fails due an unsupported feature, hide the block device, 2086 * but still allow other access. 2087 */ 2088 if (ret == -ENODEV) { 2089 ns->disk->flags |= GENHD_FL_HIDDEN; 2090 set_bit(NVME_NS_READY, &ns->flags); 2091 ret = 0; 2092 } 2093 kfree(id); 2094 return ret; 2095 } 2096 2097 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info) 2098 { 2099 switch (info->ids.csi) { 2100 case NVME_CSI_ZNS: 2101 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 2102 dev_info(ns->ctrl->device, 2103 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n", 2104 info->nsid); 2105 return nvme_update_ns_info_generic(ns, info); 2106 } 2107 return nvme_update_ns_info_block(ns, info); 2108 case NVME_CSI_NVM: 2109 return nvme_update_ns_info_block(ns, info); 2110 default: 2111 dev_info(ns->ctrl->device, 2112 "block device for nsid %u not supported (csi %u)\n", 2113 info->nsid, info->ids.csi); 2114 return nvme_update_ns_info_generic(ns, info); 2115 } 2116 } 2117 2118 #ifdef CONFIG_BLK_SED_OPAL 2119 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2120 bool send) 2121 { 2122 struct nvme_ctrl *ctrl = data; 2123 struct nvme_command cmd = { }; 2124 2125 if (send) 2126 cmd.common.opcode = nvme_admin_security_send; 2127 else 2128 cmd.common.opcode = nvme_admin_security_recv; 2129 cmd.common.nsid = 0; 2130 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 2131 cmd.common.cdw11 = cpu_to_le32(len); 2132 2133 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 2134 NVME_QID_ANY, 1, 0); 2135 } 2136 2137 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2138 { 2139 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) { 2140 if (!ctrl->opal_dev) 2141 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit); 2142 else if (was_suspended) 2143 opal_unlock_from_suspend(ctrl->opal_dev); 2144 } else { 2145 free_opal_dev(ctrl->opal_dev); 2146 ctrl->opal_dev = NULL; 2147 } 2148 } 2149 #else 2150 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2151 { 2152 } 2153 #endif /* CONFIG_BLK_SED_OPAL */ 2154 2155 #ifdef CONFIG_BLK_DEV_ZONED 2156 static int nvme_report_zones(struct gendisk *disk, sector_t sector, 2157 unsigned int nr_zones, report_zones_cb cb, void *data) 2158 { 2159 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb, 2160 data); 2161 } 2162 #else 2163 #define nvme_report_zones NULL 2164 #endif /* CONFIG_BLK_DEV_ZONED */ 2165 2166 const struct block_device_operations nvme_bdev_ops = { 2167 .owner = THIS_MODULE, 2168 .ioctl = nvme_ioctl, 2169 .compat_ioctl = blkdev_compat_ptr_ioctl, 2170 .open = nvme_open, 2171 .release = nvme_release, 2172 .getgeo = nvme_getgeo, 2173 .report_zones = nvme_report_zones, 2174 .pr_ops = &nvme_pr_ops, 2175 }; 2176 2177 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val, 2178 u32 timeout, const char *op) 2179 { 2180 unsigned long timeout_jiffies = jiffies + timeout * HZ; 2181 u32 csts; 2182 int ret; 2183 2184 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2185 if (csts == ~0) 2186 return -ENODEV; 2187 if ((csts & mask) == val) 2188 break; 2189 2190 usleep_range(1000, 2000); 2191 if (fatal_signal_pending(current)) 2192 return -EINTR; 2193 if (time_after(jiffies, timeout_jiffies)) { 2194 dev_err(ctrl->device, 2195 "Device not ready; aborting %s, CSTS=0x%x\n", 2196 op, csts); 2197 return -ENODEV; 2198 } 2199 } 2200 2201 return ret; 2202 } 2203 2204 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown) 2205 { 2206 int ret; 2207 2208 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2209 if (shutdown) 2210 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 2211 else 2212 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 2213 2214 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2215 if (ret) 2216 return ret; 2217 2218 if (shutdown) { 2219 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK, 2220 NVME_CSTS_SHST_CMPLT, 2221 ctrl->shutdown_timeout, "shutdown"); 2222 } 2223 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 2224 msleep(NVME_QUIRK_DELAY_AMOUNT); 2225 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0, 2226 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset"); 2227 } 2228 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 2229 2230 int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 2231 { 2232 unsigned dev_page_min; 2233 u32 timeout; 2234 int ret; 2235 2236 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2237 if (ret) { 2238 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2239 return ret; 2240 } 2241 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2242 2243 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) { 2244 dev_err(ctrl->device, 2245 "Minimum device page size %u too large for host (%u)\n", 2246 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT); 2247 return -ENODEV; 2248 } 2249 2250 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI) 2251 ctrl->ctrl_config = NVME_CC_CSS_CSI; 2252 else 2253 ctrl->ctrl_config = NVME_CC_CSS_NVM; 2254 2255 if (ctrl->cap & NVME_CAP_CRMS_CRWMS && ctrl->cap & NVME_CAP_CRMS_CRIMS) 2256 ctrl->ctrl_config |= NVME_CC_CRIME; 2257 2258 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; 2259 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 2260 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 2261 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2262 if (ret) 2263 return ret; 2264 2265 /* Flush write to device (required if transport is PCI) */ 2266 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config); 2267 if (ret) 2268 return ret; 2269 2270 /* CAP value may change after initial CC write */ 2271 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2272 if (ret) 2273 return ret; 2274 2275 timeout = NVME_CAP_TIMEOUT(ctrl->cap); 2276 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) { 2277 u32 crto, ready_timeout; 2278 2279 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto); 2280 if (ret) { 2281 dev_err(ctrl->device, "Reading CRTO failed (%d)\n", 2282 ret); 2283 return ret; 2284 } 2285 2286 /* 2287 * CRTO should always be greater or equal to CAP.TO, but some 2288 * devices are known to get this wrong. Use the larger of the 2289 * two values. 2290 */ 2291 if (ctrl->ctrl_config & NVME_CC_CRIME) 2292 ready_timeout = NVME_CRTO_CRIMT(crto); 2293 else 2294 ready_timeout = NVME_CRTO_CRWMT(crto); 2295 2296 if (ready_timeout < timeout) 2297 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n", 2298 crto, ctrl->cap); 2299 else 2300 timeout = ready_timeout; 2301 } 2302 2303 ctrl->ctrl_config |= NVME_CC_ENABLE; 2304 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2305 if (ret) 2306 return ret; 2307 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY, 2308 (timeout + 1) / 2, "initialisation"); 2309 } 2310 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 2311 2312 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 2313 { 2314 __le64 ts; 2315 int ret; 2316 2317 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 2318 return 0; 2319 2320 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 2321 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 2322 NULL); 2323 if (ret) 2324 dev_warn_once(ctrl->device, 2325 "could not set timestamp (%d)\n", ret); 2326 return ret; 2327 } 2328 2329 static int nvme_configure_host_options(struct nvme_ctrl *ctrl) 2330 { 2331 struct nvme_feat_host_behavior *host; 2332 u8 acre = 0, lbafee = 0; 2333 int ret; 2334 2335 /* Don't bother enabling the feature if retry delay is not reported */ 2336 if (ctrl->crdt[0]) 2337 acre = NVME_ENABLE_ACRE; 2338 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) 2339 lbafee = NVME_ENABLE_LBAFEE; 2340 2341 if (!acre && !lbafee) 2342 return 0; 2343 2344 host = kzalloc(sizeof(*host), GFP_KERNEL); 2345 if (!host) 2346 return 0; 2347 2348 host->acre = acre; 2349 host->lbafee = lbafee; 2350 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 2351 host, sizeof(*host), NULL); 2352 kfree(host); 2353 return ret; 2354 } 2355 2356 /* 2357 * The function checks whether the given total (exlat + enlat) latency of 2358 * a power state allows the latter to be used as an APST transition target. 2359 * It does so by comparing the latency to the primary and secondary latency 2360 * tolerances defined by module params. If there's a match, the corresponding 2361 * timeout value is returned and the matching tolerance index (1 or 2) is 2362 * reported. 2363 */ 2364 static bool nvme_apst_get_transition_time(u64 total_latency, 2365 u64 *transition_time, unsigned *last_index) 2366 { 2367 if (total_latency <= apst_primary_latency_tol_us) { 2368 if (*last_index == 1) 2369 return false; 2370 *last_index = 1; 2371 *transition_time = apst_primary_timeout_ms; 2372 return true; 2373 } 2374 if (apst_secondary_timeout_ms && 2375 total_latency <= apst_secondary_latency_tol_us) { 2376 if (*last_index <= 2) 2377 return false; 2378 *last_index = 2; 2379 *transition_time = apst_secondary_timeout_ms; 2380 return true; 2381 } 2382 return false; 2383 } 2384 2385 /* 2386 * APST (Autonomous Power State Transition) lets us program a table of power 2387 * state transitions that the controller will perform automatically. 2388 * 2389 * Depending on module params, one of the two supported techniques will be used: 2390 * 2391 * - If the parameters provide explicit timeouts and tolerances, they will be 2392 * used to build a table with up to 2 non-operational states to transition to. 2393 * The default parameter values were selected based on the values used by 2394 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic 2395 * regeneration of the APST table in the event of switching between external 2396 * and battery power, the timeouts and tolerances reflect a compromise 2397 * between values used by Microsoft for AC and battery scenarios. 2398 * - If not, we'll configure the table with a simple heuristic: we are willing 2399 * to spend at most 2% of the time transitioning between power states. 2400 * Therefore, when running in any given state, we will enter the next 2401 * lower-power non-operational state after waiting 50 * (enlat + exlat) 2402 * microseconds, as long as that state's exit latency is under the requested 2403 * maximum latency. 2404 * 2405 * We will not autonomously enter any non-operational state for which the total 2406 * latency exceeds ps_max_latency_us. 2407 * 2408 * Users can set ps_max_latency_us to zero to turn off APST. 2409 */ 2410 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 2411 { 2412 struct nvme_feat_auto_pst *table; 2413 unsigned apste = 0; 2414 u64 max_lat_us = 0; 2415 __le64 target = 0; 2416 int max_ps = -1; 2417 int state; 2418 int ret; 2419 unsigned last_lt_index = UINT_MAX; 2420 2421 /* 2422 * If APST isn't supported or if we haven't been initialized yet, 2423 * then don't do anything. 2424 */ 2425 if (!ctrl->apsta) 2426 return 0; 2427 2428 if (ctrl->npss > 31) { 2429 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2430 return 0; 2431 } 2432 2433 table = kzalloc(sizeof(*table), GFP_KERNEL); 2434 if (!table) 2435 return 0; 2436 2437 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2438 /* Turn off APST. */ 2439 dev_dbg(ctrl->device, "APST disabled\n"); 2440 goto done; 2441 } 2442 2443 /* 2444 * Walk through all states from lowest- to highest-power. 2445 * According to the spec, lower-numbered states use more power. NPSS, 2446 * despite the name, is the index of the lowest-power state, not the 2447 * number of states. 2448 */ 2449 for (state = (int)ctrl->npss; state >= 0; state--) { 2450 u64 total_latency_us, exit_latency_us, transition_ms; 2451 2452 if (target) 2453 table->entries[state] = target; 2454 2455 /* 2456 * Don't allow transitions to the deepest state if it's quirked 2457 * off. 2458 */ 2459 if (state == ctrl->npss && 2460 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2461 continue; 2462 2463 /* 2464 * Is this state a useful non-operational state for higher-power 2465 * states to autonomously transition to? 2466 */ 2467 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE)) 2468 continue; 2469 2470 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2471 if (exit_latency_us > ctrl->ps_max_latency_us) 2472 continue; 2473 2474 total_latency_us = exit_latency_us + 2475 le32_to_cpu(ctrl->psd[state].entry_lat); 2476 2477 /* 2478 * This state is good. It can be used as the APST idle target 2479 * for higher power states. 2480 */ 2481 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) { 2482 if (!nvme_apst_get_transition_time(total_latency_us, 2483 &transition_ms, &last_lt_index)) 2484 continue; 2485 } else { 2486 transition_ms = total_latency_us + 19; 2487 do_div(transition_ms, 20); 2488 if (transition_ms > (1 << 24) - 1) 2489 transition_ms = (1 << 24) - 1; 2490 } 2491 2492 target = cpu_to_le64((state << 3) | (transition_ms << 8)); 2493 if (max_ps == -1) 2494 max_ps = state; 2495 if (total_latency_us > max_lat_us) 2496 max_lat_us = total_latency_us; 2497 } 2498 2499 if (max_ps == -1) 2500 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2501 else 2502 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2503 max_ps, max_lat_us, (int)sizeof(*table), table); 2504 apste = 1; 2505 2506 done: 2507 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2508 table, sizeof(*table), NULL); 2509 if (ret) 2510 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2511 kfree(table); 2512 return ret; 2513 } 2514 2515 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2516 { 2517 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2518 u64 latency; 2519 2520 switch (val) { 2521 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2522 case PM_QOS_LATENCY_ANY: 2523 latency = U64_MAX; 2524 break; 2525 2526 default: 2527 latency = val; 2528 } 2529 2530 if (ctrl->ps_max_latency_us != latency) { 2531 ctrl->ps_max_latency_us = latency; 2532 if (ctrl->state == NVME_CTRL_LIVE) 2533 nvme_configure_apst(ctrl); 2534 } 2535 } 2536 2537 struct nvme_core_quirk_entry { 2538 /* 2539 * NVMe model and firmware strings are padded with spaces. For 2540 * simplicity, strings in the quirk table are padded with NULLs 2541 * instead. 2542 */ 2543 u16 vid; 2544 const char *mn; 2545 const char *fr; 2546 unsigned long quirks; 2547 }; 2548 2549 static const struct nvme_core_quirk_entry core_quirks[] = { 2550 { 2551 /* 2552 * This Toshiba device seems to die using any APST states. See: 2553 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2554 */ 2555 .vid = 0x1179, 2556 .mn = "THNSF5256GPUK TOSHIBA", 2557 .quirks = NVME_QUIRK_NO_APST, 2558 }, 2559 { 2560 /* 2561 * This LiteON CL1-3D*-Q11 firmware version has a race 2562 * condition associated with actions related to suspend to idle 2563 * LiteON has resolved the problem in future firmware 2564 */ 2565 .vid = 0x14a4, 2566 .fr = "22301111", 2567 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 2568 }, 2569 { 2570 /* 2571 * This Kioxia CD6-V Series / HPE PE8030 device times out and 2572 * aborts I/O during any load, but more easily reproducible 2573 * with discards (fstrim). 2574 * 2575 * The device is left in a state where it is also not possible 2576 * to use "nvme set-feature" to disable APST, but booting with 2577 * nvme_core.default_ps_max_latency=0 works. 2578 */ 2579 .vid = 0x1e0f, 2580 .mn = "KCD6XVUL6T40", 2581 .quirks = NVME_QUIRK_NO_APST, 2582 }, 2583 { 2584 /* 2585 * The external Samsung X5 SSD fails initialization without a 2586 * delay before checking if it is ready and has a whole set of 2587 * other problems. To make this even more interesting, it 2588 * shares the PCI ID with internal Samsung 970 Evo Plus that 2589 * does not need or want these quirks. 2590 */ 2591 .vid = 0x144d, 2592 .mn = "Samsung Portable SSD X5", 2593 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY | 2594 NVME_QUIRK_NO_DEEPEST_PS | 2595 NVME_QUIRK_IGNORE_DEV_SUBNQN, 2596 } 2597 }; 2598 2599 /* match is null-terminated but idstr is space-padded. */ 2600 static bool string_matches(const char *idstr, const char *match, size_t len) 2601 { 2602 size_t matchlen; 2603 2604 if (!match) 2605 return true; 2606 2607 matchlen = strlen(match); 2608 WARN_ON_ONCE(matchlen > len); 2609 2610 if (memcmp(idstr, match, matchlen)) 2611 return false; 2612 2613 for (; matchlen < len; matchlen++) 2614 if (idstr[matchlen] != ' ') 2615 return false; 2616 2617 return true; 2618 } 2619 2620 static bool quirk_matches(const struct nvme_id_ctrl *id, 2621 const struct nvme_core_quirk_entry *q) 2622 { 2623 return q->vid == le16_to_cpu(id->vid) && 2624 string_matches(id->mn, q->mn, sizeof(id->mn)) && 2625 string_matches(id->fr, q->fr, sizeof(id->fr)); 2626 } 2627 2628 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 2629 struct nvme_id_ctrl *id) 2630 { 2631 size_t nqnlen; 2632 int off; 2633 2634 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 2635 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 2636 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 2637 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 2638 return; 2639 } 2640 2641 if (ctrl->vs >= NVME_VS(1, 2, 1)) 2642 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 2643 } 2644 2645 /* 2646 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe 2647 * Base Specification 2.0. It is slightly different from the format 2648 * specified there due to historic reasons, and we can't change it now. 2649 */ 2650 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 2651 "nqn.2014.08.org.nvmexpress:%04x%04x", 2652 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 2653 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 2654 off += sizeof(id->sn); 2655 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 2656 off += sizeof(id->mn); 2657 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 2658 } 2659 2660 static void nvme_release_subsystem(struct device *dev) 2661 { 2662 struct nvme_subsystem *subsys = 2663 container_of(dev, struct nvme_subsystem, dev); 2664 2665 if (subsys->instance >= 0) 2666 ida_free(&nvme_instance_ida, subsys->instance); 2667 kfree(subsys); 2668 } 2669 2670 static void nvme_destroy_subsystem(struct kref *ref) 2671 { 2672 struct nvme_subsystem *subsys = 2673 container_of(ref, struct nvme_subsystem, ref); 2674 2675 mutex_lock(&nvme_subsystems_lock); 2676 list_del(&subsys->entry); 2677 mutex_unlock(&nvme_subsystems_lock); 2678 2679 ida_destroy(&subsys->ns_ida); 2680 device_del(&subsys->dev); 2681 put_device(&subsys->dev); 2682 } 2683 2684 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 2685 { 2686 kref_put(&subsys->ref, nvme_destroy_subsystem); 2687 } 2688 2689 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 2690 { 2691 struct nvme_subsystem *subsys; 2692 2693 lockdep_assert_held(&nvme_subsystems_lock); 2694 2695 /* 2696 * Fail matches for discovery subsystems. This results 2697 * in each discovery controller bound to a unique subsystem. 2698 * This avoids issues with validating controller values 2699 * that can only be true when there is a single unique subsystem. 2700 * There may be multiple and completely independent entities 2701 * that provide discovery controllers. 2702 */ 2703 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME)) 2704 return NULL; 2705 2706 list_for_each_entry(subsys, &nvme_subsystems, entry) { 2707 if (strcmp(subsys->subnqn, subsysnqn)) 2708 continue; 2709 if (!kref_get_unless_zero(&subsys->ref)) 2710 continue; 2711 return subsys; 2712 } 2713 2714 return NULL; 2715 } 2716 2717 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl) 2718 { 2719 return ctrl->opts && ctrl->opts->discovery_nqn; 2720 } 2721 2722 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, 2723 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2724 { 2725 struct nvme_ctrl *tmp; 2726 2727 lockdep_assert_held(&nvme_subsystems_lock); 2728 2729 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) { 2730 if (nvme_state_terminal(tmp)) 2731 continue; 2732 2733 if (tmp->cntlid == ctrl->cntlid) { 2734 dev_err(ctrl->device, 2735 "Duplicate cntlid %u with %s, subsys %s, rejecting\n", 2736 ctrl->cntlid, dev_name(tmp->device), 2737 subsys->subnqn); 2738 return false; 2739 } 2740 2741 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) || 2742 nvme_discovery_ctrl(ctrl)) 2743 continue; 2744 2745 dev_err(ctrl->device, 2746 "Subsystem does not support multiple controllers\n"); 2747 return false; 2748 } 2749 2750 return true; 2751 } 2752 2753 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2754 { 2755 struct nvme_subsystem *subsys, *found; 2756 int ret; 2757 2758 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 2759 if (!subsys) 2760 return -ENOMEM; 2761 2762 subsys->instance = -1; 2763 mutex_init(&subsys->lock); 2764 kref_init(&subsys->ref); 2765 INIT_LIST_HEAD(&subsys->ctrls); 2766 INIT_LIST_HEAD(&subsys->nsheads); 2767 nvme_init_subnqn(subsys, ctrl, id); 2768 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 2769 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 2770 subsys->vendor_id = le16_to_cpu(id->vid); 2771 subsys->cmic = id->cmic; 2772 2773 /* Versions prior to 1.4 don't necessarily report a valid type */ 2774 if (id->cntrltype == NVME_CTRL_DISC || 2775 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME)) 2776 subsys->subtype = NVME_NQN_DISC; 2777 else 2778 subsys->subtype = NVME_NQN_NVME; 2779 2780 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) { 2781 dev_err(ctrl->device, 2782 "Subsystem %s is not a discovery controller", 2783 subsys->subnqn); 2784 kfree(subsys); 2785 return -EINVAL; 2786 } 2787 subsys->awupf = le16_to_cpu(id->awupf); 2788 nvme_mpath_default_iopolicy(subsys); 2789 2790 subsys->dev.class = nvme_subsys_class; 2791 subsys->dev.release = nvme_release_subsystem; 2792 subsys->dev.groups = nvme_subsys_attrs_groups; 2793 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance); 2794 device_initialize(&subsys->dev); 2795 2796 mutex_lock(&nvme_subsystems_lock); 2797 found = __nvme_find_get_subsystem(subsys->subnqn); 2798 if (found) { 2799 put_device(&subsys->dev); 2800 subsys = found; 2801 2802 if (!nvme_validate_cntlid(subsys, ctrl, id)) { 2803 ret = -EINVAL; 2804 goto out_put_subsystem; 2805 } 2806 } else { 2807 ret = device_add(&subsys->dev); 2808 if (ret) { 2809 dev_err(ctrl->device, 2810 "failed to register subsystem device.\n"); 2811 put_device(&subsys->dev); 2812 goto out_unlock; 2813 } 2814 ida_init(&subsys->ns_ida); 2815 list_add_tail(&subsys->entry, &nvme_subsystems); 2816 } 2817 2818 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 2819 dev_name(ctrl->device)); 2820 if (ret) { 2821 dev_err(ctrl->device, 2822 "failed to create sysfs link from subsystem.\n"); 2823 goto out_put_subsystem; 2824 } 2825 2826 if (!found) 2827 subsys->instance = ctrl->instance; 2828 ctrl->subsys = subsys; 2829 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 2830 mutex_unlock(&nvme_subsystems_lock); 2831 return 0; 2832 2833 out_put_subsystem: 2834 nvme_put_subsystem(subsys); 2835 out_unlock: 2836 mutex_unlock(&nvme_subsystems_lock); 2837 return ret; 2838 } 2839 2840 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 2841 void *log, size_t size, u64 offset) 2842 { 2843 struct nvme_command c = { }; 2844 u32 dwlen = nvme_bytes_to_numd(size); 2845 2846 c.get_log_page.opcode = nvme_admin_get_log_page; 2847 c.get_log_page.nsid = cpu_to_le32(nsid); 2848 c.get_log_page.lid = log_page; 2849 c.get_log_page.lsp = lsp; 2850 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 2851 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 2852 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 2853 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 2854 c.get_log_page.csi = csi; 2855 2856 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 2857 } 2858 2859 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi, 2860 struct nvme_effects_log **log) 2861 { 2862 struct nvme_effects_log *cel = xa_load(&ctrl->cels, csi); 2863 int ret; 2864 2865 if (cel) 2866 goto out; 2867 2868 cel = kzalloc(sizeof(*cel), GFP_KERNEL); 2869 if (!cel) 2870 return -ENOMEM; 2871 2872 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi, 2873 cel, sizeof(*cel), 0); 2874 if (ret) { 2875 kfree(cel); 2876 return ret; 2877 } 2878 2879 xa_store(&ctrl->cels, csi, cel, GFP_KERNEL); 2880 out: 2881 *log = cel; 2882 return 0; 2883 } 2884 2885 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units) 2886 { 2887 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val; 2888 2889 if (check_shl_overflow(1U, units + page_shift - 9, &val)) 2890 return UINT_MAX; 2891 return val; 2892 } 2893 2894 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl) 2895 { 2896 struct nvme_command c = { }; 2897 struct nvme_id_ctrl_nvm *id; 2898 int ret; 2899 2900 if (ctrl->oncs & NVME_CTRL_ONCS_DSM) { 2901 ctrl->max_discard_sectors = UINT_MAX; 2902 ctrl->max_discard_segments = NVME_DSM_MAX_RANGES; 2903 } else { 2904 ctrl->max_discard_sectors = 0; 2905 ctrl->max_discard_segments = 0; 2906 } 2907 2908 /* 2909 * Even though NVMe spec explicitly states that MDTS is not applicable 2910 * to the write-zeroes, we are cautious and limit the size to the 2911 * controllers max_hw_sectors value, which is based on the MDTS field 2912 * and possibly other limiting factors. 2913 */ 2914 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) && 2915 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)) 2916 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors; 2917 else 2918 ctrl->max_zeroes_sectors = 0; 2919 2920 if (ctrl->subsys->subtype != NVME_NQN_NVME || 2921 nvme_ctrl_limited_cns(ctrl) || 2922 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags)) 2923 return 0; 2924 2925 id = kzalloc(sizeof(*id), GFP_KERNEL); 2926 if (!id) 2927 return -ENOMEM; 2928 2929 c.identify.opcode = nvme_admin_identify; 2930 c.identify.cns = NVME_ID_CNS_CS_CTRL; 2931 c.identify.csi = NVME_CSI_NVM; 2932 2933 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 2934 if (ret) 2935 goto free_data; 2936 2937 if (id->dmrl) 2938 ctrl->max_discard_segments = id->dmrl; 2939 ctrl->dmrsl = le32_to_cpu(id->dmrsl); 2940 if (id->wzsl) 2941 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl); 2942 2943 free_data: 2944 if (ret > 0) 2945 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags); 2946 kfree(id); 2947 return ret; 2948 } 2949 2950 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl) 2951 { 2952 struct nvme_effects_log *log = ctrl->effects; 2953 2954 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 2955 NVME_CMD_EFFECTS_NCC | 2956 NVME_CMD_EFFECTS_CSE_MASK); 2957 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 2958 NVME_CMD_EFFECTS_CSE_MASK); 2959 2960 /* 2961 * The spec says the result of a security receive command depends on 2962 * the previous security send command. As such, many vendors log this 2963 * command as one to submitted only when no other commands to the same 2964 * namespace are outstanding. The intention is to tell the host to 2965 * prevent mixing security send and receive. 2966 * 2967 * This driver can only enforce such exclusive access against IO 2968 * queues, though. We are not readily able to enforce such a rule for 2969 * two commands to the admin queue, which is the only queue that 2970 * matters for this command. 2971 * 2972 * Rather than blindly freezing the IO queues for this effect that 2973 * doesn't even apply to IO, mask it off. 2974 */ 2975 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK); 2976 2977 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 2978 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 2979 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 2980 } 2981 2982 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2983 { 2984 int ret = 0; 2985 2986 if (ctrl->effects) 2987 return 0; 2988 2989 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 2990 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 2991 if (ret < 0) 2992 return ret; 2993 } 2994 2995 if (!ctrl->effects) { 2996 ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL); 2997 if (!ctrl->effects) 2998 return -ENOMEM; 2999 xa_store(&ctrl->cels, NVME_CSI_NVM, ctrl->effects, GFP_KERNEL); 3000 } 3001 3002 nvme_init_known_nvm_effects(ctrl); 3003 return 0; 3004 } 3005 3006 static int nvme_init_identify(struct nvme_ctrl *ctrl) 3007 { 3008 struct nvme_id_ctrl *id; 3009 u32 max_hw_sectors; 3010 bool prev_apst_enabled; 3011 int ret; 3012 3013 ret = nvme_identify_ctrl(ctrl, &id); 3014 if (ret) { 3015 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 3016 return -EIO; 3017 } 3018 3019 if (!(ctrl->ops->flags & NVME_F_FABRICS)) 3020 ctrl->cntlid = le16_to_cpu(id->cntlid); 3021 3022 if (!ctrl->identified) { 3023 unsigned int i; 3024 3025 /* 3026 * Check for quirks. Quirk can depend on firmware version, 3027 * so, in principle, the set of quirks present can change 3028 * across a reset. As a possible future enhancement, we 3029 * could re-scan for quirks every time we reinitialize 3030 * the device, but we'd have to make sure that the driver 3031 * behaves intelligently if the quirks change. 3032 */ 3033 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 3034 if (quirk_matches(id, &core_quirks[i])) 3035 ctrl->quirks |= core_quirks[i].quirks; 3036 } 3037 3038 ret = nvme_init_subsystem(ctrl, id); 3039 if (ret) 3040 goto out_free; 3041 3042 ret = nvme_init_effects(ctrl, id); 3043 if (ret) 3044 goto out_free; 3045 } 3046 memcpy(ctrl->subsys->firmware_rev, id->fr, 3047 sizeof(ctrl->subsys->firmware_rev)); 3048 3049 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 3050 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 3051 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 3052 } 3053 3054 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 3055 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 3056 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 3057 3058 ctrl->oacs = le16_to_cpu(id->oacs); 3059 ctrl->oncs = le16_to_cpu(id->oncs); 3060 ctrl->mtfa = le16_to_cpu(id->mtfa); 3061 ctrl->oaes = le32_to_cpu(id->oaes); 3062 ctrl->wctemp = le16_to_cpu(id->wctemp); 3063 ctrl->cctemp = le16_to_cpu(id->cctemp); 3064 3065 atomic_set(&ctrl->abort_limit, id->acl + 1); 3066 ctrl->vwc = id->vwc; 3067 if (id->mdts) 3068 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts); 3069 else 3070 max_hw_sectors = UINT_MAX; 3071 ctrl->max_hw_sectors = 3072 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 3073 3074 nvme_set_queue_limits(ctrl, ctrl->admin_q); 3075 ctrl->sgls = le32_to_cpu(id->sgls); 3076 ctrl->kas = le16_to_cpu(id->kas); 3077 ctrl->max_namespaces = le32_to_cpu(id->mnan); 3078 ctrl->ctratt = le32_to_cpu(id->ctratt); 3079 3080 ctrl->cntrltype = id->cntrltype; 3081 ctrl->dctype = id->dctype; 3082 3083 if (id->rtd3e) { 3084 /* us -> s */ 3085 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC; 3086 3087 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 3088 shutdown_timeout, 60); 3089 3090 if (ctrl->shutdown_timeout != shutdown_timeout) 3091 dev_info(ctrl->device, 3092 "Shutdown timeout set to %u seconds\n", 3093 ctrl->shutdown_timeout); 3094 } else 3095 ctrl->shutdown_timeout = shutdown_timeout; 3096 3097 ctrl->npss = id->npss; 3098 ctrl->apsta = id->apsta; 3099 prev_apst_enabled = ctrl->apst_enabled; 3100 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 3101 if (force_apst && id->apsta) { 3102 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 3103 ctrl->apst_enabled = true; 3104 } else { 3105 ctrl->apst_enabled = false; 3106 } 3107 } else { 3108 ctrl->apst_enabled = id->apsta; 3109 } 3110 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 3111 3112 if (ctrl->ops->flags & NVME_F_FABRICS) { 3113 ctrl->icdoff = le16_to_cpu(id->icdoff); 3114 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 3115 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 3116 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 3117 3118 /* 3119 * In fabrics we need to verify the cntlid matches the 3120 * admin connect 3121 */ 3122 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 3123 dev_err(ctrl->device, 3124 "Mismatching cntlid: Connect %u vs Identify " 3125 "%u, rejecting\n", 3126 ctrl->cntlid, le16_to_cpu(id->cntlid)); 3127 ret = -EINVAL; 3128 goto out_free; 3129 } 3130 3131 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) { 3132 dev_err(ctrl->device, 3133 "keep-alive support is mandatory for fabrics\n"); 3134 ret = -EINVAL; 3135 goto out_free; 3136 } 3137 } else { 3138 ctrl->hmpre = le32_to_cpu(id->hmpre); 3139 ctrl->hmmin = le32_to_cpu(id->hmmin); 3140 ctrl->hmminds = le32_to_cpu(id->hmminds); 3141 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 3142 } 3143 3144 ret = nvme_mpath_init_identify(ctrl, id); 3145 if (ret < 0) 3146 goto out_free; 3147 3148 if (ctrl->apst_enabled && !prev_apst_enabled) 3149 dev_pm_qos_expose_latency_tolerance(ctrl->device); 3150 else if (!ctrl->apst_enabled && prev_apst_enabled) 3151 dev_pm_qos_hide_latency_tolerance(ctrl->device); 3152 3153 out_free: 3154 kfree(id); 3155 return ret; 3156 } 3157 3158 /* 3159 * Initialize the cached copies of the Identify data and various controller 3160 * register in our nvme_ctrl structure. This should be called as soon as 3161 * the admin queue is fully up and running. 3162 */ 3163 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended) 3164 { 3165 int ret; 3166 3167 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 3168 if (ret) { 3169 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 3170 return ret; 3171 } 3172 3173 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize); 3174 3175 if (ctrl->vs >= NVME_VS(1, 1, 0)) 3176 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap); 3177 3178 ret = nvme_init_identify(ctrl); 3179 if (ret) 3180 return ret; 3181 3182 ret = nvme_configure_apst(ctrl); 3183 if (ret < 0) 3184 return ret; 3185 3186 ret = nvme_configure_timestamp(ctrl); 3187 if (ret < 0) 3188 return ret; 3189 3190 ret = nvme_configure_host_options(ctrl); 3191 if (ret < 0) 3192 return ret; 3193 3194 nvme_configure_opal(ctrl, was_suspended); 3195 3196 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) { 3197 /* 3198 * Do not return errors unless we are in a controller reset, 3199 * the controller works perfectly fine without hwmon. 3200 */ 3201 ret = nvme_hwmon_init(ctrl); 3202 if (ret == -EINTR) 3203 return ret; 3204 } 3205 3206 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags); 3207 ctrl->identified = true; 3208 3209 nvme_start_keep_alive(ctrl); 3210 3211 return 0; 3212 } 3213 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish); 3214 3215 static int nvme_dev_open(struct inode *inode, struct file *file) 3216 { 3217 struct nvme_ctrl *ctrl = 3218 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3219 3220 switch (ctrl->state) { 3221 case NVME_CTRL_LIVE: 3222 break; 3223 default: 3224 return -EWOULDBLOCK; 3225 } 3226 3227 nvme_get_ctrl(ctrl); 3228 if (!try_module_get(ctrl->ops->module)) { 3229 nvme_put_ctrl(ctrl); 3230 return -EINVAL; 3231 } 3232 3233 file->private_data = ctrl; 3234 return 0; 3235 } 3236 3237 static int nvme_dev_release(struct inode *inode, struct file *file) 3238 { 3239 struct nvme_ctrl *ctrl = 3240 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3241 3242 module_put(ctrl->ops->module); 3243 nvme_put_ctrl(ctrl); 3244 return 0; 3245 } 3246 3247 static const struct file_operations nvme_dev_fops = { 3248 .owner = THIS_MODULE, 3249 .open = nvme_dev_open, 3250 .release = nvme_dev_release, 3251 .unlocked_ioctl = nvme_dev_ioctl, 3252 .compat_ioctl = compat_ptr_ioctl, 3253 .uring_cmd = nvme_dev_uring_cmd, 3254 }; 3255 3256 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl, 3257 unsigned nsid) 3258 { 3259 struct nvme_ns_head *h; 3260 3261 lockdep_assert_held(&ctrl->subsys->lock); 3262 3263 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) { 3264 /* 3265 * Private namespaces can share NSIDs under some conditions. 3266 * In that case we can't use the same ns_head for namespaces 3267 * with the same NSID. 3268 */ 3269 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h)) 3270 continue; 3271 if (!list_empty(&h->list) && nvme_tryget_ns_head(h)) 3272 return h; 3273 } 3274 3275 return NULL; 3276 } 3277 3278 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys, 3279 struct nvme_ns_ids *ids) 3280 { 3281 bool has_uuid = !uuid_is_null(&ids->uuid); 3282 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid)); 3283 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 3284 struct nvme_ns_head *h; 3285 3286 lockdep_assert_held(&subsys->lock); 3287 3288 list_for_each_entry(h, &subsys->nsheads, entry) { 3289 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid)) 3290 return -EINVAL; 3291 if (has_nguid && 3292 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0) 3293 return -EINVAL; 3294 if (has_eui64 && 3295 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0) 3296 return -EINVAL; 3297 } 3298 3299 return 0; 3300 } 3301 3302 static void nvme_cdev_rel(struct device *dev) 3303 { 3304 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt)); 3305 } 3306 3307 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device) 3308 { 3309 cdev_device_del(cdev, cdev_device); 3310 put_device(cdev_device); 3311 } 3312 3313 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 3314 const struct file_operations *fops, struct module *owner) 3315 { 3316 int minor, ret; 3317 3318 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL); 3319 if (minor < 0) 3320 return minor; 3321 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor); 3322 cdev_device->class = nvme_ns_chr_class; 3323 cdev_device->release = nvme_cdev_rel; 3324 device_initialize(cdev_device); 3325 cdev_init(cdev, fops); 3326 cdev->owner = owner; 3327 ret = cdev_device_add(cdev, cdev_device); 3328 if (ret) 3329 put_device(cdev_device); 3330 3331 return ret; 3332 } 3333 3334 static int nvme_ns_chr_open(struct inode *inode, struct file *file) 3335 { 3336 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3337 } 3338 3339 static int nvme_ns_chr_release(struct inode *inode, struct file *file) 3340 { 3341 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3342 return 0; 3343 } 3344 3345 static const struct file_operations nvme_ns_chr_fops = { 3346 .owner = THIS_MODULE, 3347 .open = nvme_ns_chr_open, 3348 .release = nvme_ns_chr_release, 3349 .unlocked_ioctl = nvme_ns_chr_ioctl, 3350 .compat_ioctl = compat_ptr_ioctl, 3351 .uring_cmd = nvme_ns_chr_uring_cmd, 3352 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll, 3353 }; 3354 3355 static int nvme_add_ns_cdev(struct nvme_ns *ns) 3356 { 3357 int ret; 3358 3359 ns->cdev_device.parent = ns->ctrl->device; 3360 ret = dev_set_name(&ns->cdev_device, "ng%dn%d", 3361 ns->ctrl->instance, ns->head->instance); 3362 if (ret) 3363 return ret; 3364 3365 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops, 3366 ns->ctrl->ops->module); 3367 } 3368 3369 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 3370 struct nvme_ns_info *info) 3371 { 3372 struct nvme_ns_head *head; 3373 size_t size = sizeof(*head); 3374 int ret = -ENOMEM; 3375 3376 #ifdef CONFIG_NVME_MULTIPATH 3377 size += num_possible_nodes() * sizeof(struct nvme_ns *); 3378 #endif 3379 3380 head = kzalloc(size, GFP_KERNEL); 3381 if (!head) 3382 goto out; 3383 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL); 3384 if (ret < 0) 3385 goto out_free_head; 3386 head->instance = ret; 3387 INIT_LIST_HEAD(&head->list); 3388 ret = init_srcu_struct(&head->srcu); 3389 if (ret) 3390 goto out_ida_remove; 3391 head->subsys = ctrl->subsys; 3392 head->ns_id = info->nsid; 3393 head->ids = info->ids; 3394 head->shared = info->is_shared; 3395 kref_init(&head->ref); 3396 3397 if (head->ids.csi) { 3398 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects); 3399 if (ret) 3400 goto out_cleanup_srcu; 3401 } else 3402 head->effects = ctrl->effects; 3403 3404 ret = nvme_mpath_alloc_disk(ctrl, head); 3405 if (ret) 3406 goto out_cleanup_srcu; 3407 3408 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 3409 3410 kref_get(&ctrl->subsys->ref); 3411 3412 return head; 3413 out_cleanup_srcu: 3414 cleanup_srcu_struct(&head->srcu); 3415 out_ida_remove: 3416 ida_free(&ctrl->subsys->ns_ida, head->instance); 3417 out_free_head: 3418 kfree(head); 3419 out: 3420 if (ret > 0) 3421 ret = blk_status_to_errno(nvme_error_status(ret)); 3422 return ERR_PTR(ret); 3423 } 3424 3425 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this, 3426 struct nvme_ns_ids *ids) 3427 { 3428 struct nvme_subsystem *s; 3429 int ret = 0; 3430 3431 /* 3432 * Note that this check is racy as we try to avoid holding the global 3433 * lock over the whole ns_head creation. But it is only intended as 3434 * a sanity check anyway. 3435 */ 3436 mutex_lock(&nvme_subsystems_lock); 3437 list_for_each_entry(s, &nvme_subsystems, entry) { 3438 if (s == this) 3439 continue; 3440 mutex_lock(&s->lock); 3441 ret = nvme_subsys_check_duplicate_ids(s, ids); 3442 mutex_unlock(&s->lock); 3443 if (ret) 3444 break; 3445 } 3446 mutex_unlock(&nvme_subsystems_lock); 3447 3448 return ret; 3449 } 3450 3451 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info) 3452 { 3453 struct nvme_ctrl *ctrl = ns->ctrl; 3454 struct nvme_ns_head *head = NULL; 3455 int ret; 3456 3457 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids); 3458 if (ret) { 3459 /* 3460 * We've found two different namespaces on two different 3461 * subsystems that report the same ID. This is pretty nasty 3462 * for anything that actually requires unique device 3463 * identification. In the kernel we need this for multipathing, 3464 * and in user space the /dev/disk/by-id/ links rely on it. 3465 * 3466 * If the device also claims to be multi-path capable back off 3467 * here now and refuse the probe the second device as this is a 3468 * recipe for data corruption. If not this is probably a 3469 * cheap consumer device if on the PCIe bus, so let the user 3470 * proceed and use the shiny toy, but warn that with changing 3471 * probing order (which due to our async probing could just be 3472 * device taking longer to startup) the other device could show 3473 * up at any time. 3474 */ 3475 nvme_print_device_info(ctrl); 3476 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */ 3477 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) && 3478 info->is_shared)) { 3479 dev_err(ctrl->device, 3480 "ignoring nsid %d because of duplicate IDs\n", 3481 info->nsid); 3482 return ret; 3483 } 3484 3485 dev_err(ctrl->device, 3486 "clearing duplicate IDs for nsid %d\n", info->nsid); 3487 dev_err(ctrl->device, 3488 "use of /dev/disk/by-id/ may cause data corruption\n"); 3489 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid)); 3490 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid)); 3491 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64)); 3492 ctrl->quirks |= NVME_QUIRK_BOGUS_NID; 3493 } 3494 3495 mutex_lock(&ctrl->subsys->lock); 3496 head = nvme_find_ns_head(ctrl, info->nsid); 3497 if (!head) { 3498 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids); 3499 if (ret) { 3500 dev_err(ctrl->device, 3501 "duplicate IDs in subsystem for nsid %d\n", 3502 info->nsid); 3503 goto out_unlock; 3504 } 3505 head = nvme_alloc_ns_head(ctrl, info); 3506 if (IS_ERR(head)) { 3507 ret = PTR_ERR(head); 3508 goto out_unlock; 3509 } 3510 } else { 3511 ret = -EINVAL; 3512 if (!info->is_shared || !head->shared) { 3513 dev_err(ctrl->device, 3514 "Duplicate unshared namespace %d\n", 3515 info->nsid); 3516 goto out_put_ns_head; 3517 } 3518 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) { 3519 dev_err(ctrl->device, 3520 "IDs don't match for shared namespace %d\n", 3521 info->nsid); 3522 goto out_put_ns_head; 3523 } 3524 3525 if (!multipath) { 3526 dev_warn(ctrl->device, 3527 "Found shared namespace %d, but multipathing not supported.\n", 3528 info->nsid); 3529 dev_warn_once(ctrl->device, 3530 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0\n."); 3531 } 3532 } 3533 3534 list_add_tail_rcu(&ns->siblings, &head->list); 3535 ns->head = head; 3536 mutex_unlock(&ctrl->subsys->lock); 3537 return 0; 3538 3539 out_put_ns_head: 3540 nvme_put_ns_head(head); 3541 out_unlock: 3542 mutex_unlock(&ctrl->subsys->lock); 3543 return ret; 3544 } 3545 3546 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3547 { 3548 struct nvme_ns *ns, *ret = NULL; 3549 3550 down_read(&ctrl->namespaces_rwsem); 3551 list_for_each_entry(ns, &ctrl->namespaces, list) { 3552 if (ns->head->ns_id == nsid) { 3553 if (!nvme_get_ns(ns)) 3554 continue; 3555 ret = ns; 3556 break; 3557 } 3558 if (ns->head->ns_id > nsid) 3559 break; 3560 } 3561 up_read(&ctrl->namespaces_rwsem); 3562 return ret; 3563 } 3564 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU); 3565 3566 /* 3567 * Add the namespace to the controller list while keeping the list ordered. 3568 */ 3569 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns) 3570 { 3571 struct nvme_ns *tmp; 3572 3573 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) { 3574 if (tmp->head->ns_id < ns->head->ns_id) { 3575 list_add(&ns->list, &tmp->list); 3576 return; 3577 } 3578 } 3579 list_add(&ns->list, &ns->ctrl->namespaces); 3580 } 3581 3582 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info) 3583 { 3584 struct nvme_ns *ns; 3585 struct gendisk *disk; 3586 int node = ctrl->numa_node; 3587 3588 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 3589 if (!ns) 3590 return; 3591 3592 disk = blk_mq_alloc_disk(ctrl->tagset, ns); 3593 if (IS_ERR(disk)) 3594 goto out_free_ns; 3595 disk->fops = &nvme_bdev_ops; 3596 disk->private_data = ns; 3597 3598 ns->disk = disk; 3599 ns->queue = disk->queue; 3600 3601 if (ctrl->opts && ctrl->opts->data_digest) 3602 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue); 3603 3604 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue); 3605 if (ctrl->ops->supports_pci_p2pdma && 3606 ctrl->ops->supports_pci_p2pdma(ctrl)) 3607 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue); 3608 3609 ns->ctrl = ctrl; 3610 kref_init(&ns->kref); 3611 3612 if (nvme_init_ns_head(ns, info)) 3613 goto out_cleanup_disk; 3614 3615 /* 3616 * If multipathing is enabled, the device name for all disks and not 3617 * just those that represent shared namespaces needs to be based on the 3618 * subsystem instance. Using the controller instance for private 3619 * namespaces could lead to naming collisions between shared and private 3620 * namespaces if they don't use a common numbering scheme. 3621 * 3622 * If multipathing is not enabled, disk names must use the controller 3623 * instance as shared namespaces will show up as multiple block 3624 * devices. 3625 */ 3626 if (nvme_ns_head_multipath(ns->head)) { 3627 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance, 3628 ctrl->instance, ns->head->instance); 3629 disk->flags |= GENHD_FL_HIDDEN; 3630 } else if (multipath) { 3631 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance, 3632 ns->head->instance); 3633 } else { 3634 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, 3635 ns->head->instance); 3636 } 3637 3638 if (nvme_update_ns_info(ns, info)) 3639 goto out_unlink_ns; 3640 3641 down_write(&ctrl->namespaces_rwsem); 3642 nvme_ns_add_to_ctrl_list(ns); 3643 up_write(&ctrl->namespaces_rwsem); 3644 nvme_get_ctrl(ctrl); 3645 3646 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups)) 3647 goto out_cleanup_ns_from_list; 3648 3649 if (!nvme_ns_head_multipath(ns->head)) 3650 nvme_add_ns_cdev(ns); 3651 3652 nvme_mpath_add_disk(ns, info->anagrpid); 3653 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name); 3654 3655 return; 3656 3657 out_cleanup_ns_from_list: 3658 nvme_put_ctrl(ctrl); 3659 down_write(&ctrl->namespaces_rwsem); 3660 list_del_init(&ns->list); 3661 up_write(&ctrl->namespaces_rwsem); 3662 out_unlink_ns: 3663 mutex_lock(&ctrl->subsys->lock); 3664 list_del_rcu(&ns->siblings); 3665 if (list_empty(&ns->head->list)) 3666 list_del_init(&ns->head->entry); 3667 mutex_unlock(&ctrl->subsys->lock); 3668 nvme_put_ns_head(ns->head); 3669 out_cleanup_disk: 3670 put_disk(disk); 3671 out_free_ns: 3672 kfree(ns); 3673 } 3674 3675 static void nvme_ns_remove(struct nvme_ns *ns) 3676 { 3677 bool last_path = false; 3678 3679 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 3680 return; 3681 3682 clear_bit(NVME_NS_READY, &ns->flags); 3683 set_capacity(ns->disk, 0); 3684 nvme_fault_inject_fini(&ns->fault_inject); 3685 3686 /* 3687 * Ensure that !NVME_NS_READY is seen by other threads to prevent 3688 * this ns going back into current_path. 3689 */ 3690 synchronize_srcu(&ns->head->srcu); 3691 3692 /* wait for concurrent submissions */ 3693 if (nvme_mpath_clear_current_path(ns)) 3694 synchronize_srcu(&ns->head->srcu); 3695 3696 mutex_lock(&ns->ctrl->subsys->lock); 3697 list_del_rcu(&ns->siblings); 3698 if (list_empty(&ns->head->list)) { 3699 list_del_init(&ns->head->entry); 3700 last_path = true; 3701 } 3702 mutex_unlock(&ns->ctrl->subsys->lock); 3703 3704 /* guarantee not available in head->list */ 3705 synchronize_srcu(&ns->head->srcu); 3706 3707 if (!nvme_ns_head_multipath(ns->head)) 3708 nvme_cdev_del(&ns->cdev, &ns->cdev_device); 3709 del_gendisk(ns->disk); 3710 3711 down_write(&ns->ctrl->namespaces_rwsem); 3712 list_del_init(&ns->list); 3713 up_write(&ns->ctrl->namespaces_rwsem); 3714 3715 if (last_path) 3716 nvme_mpath_shutdown_disk(ns->head); 3717 nvme_put_ns(ns); 3718 } 3719 3720 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid) 3721 { 3722 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid); 3723 3724 if (ns) { 3725 nvme_ns_remove(ns); 3726 nvme_put_ns(ns); 3727 } 3728 } 3729 3730 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info) 3731 { 3732 int ret = NVME_SC_INVALID_NS | NVME_SC_DNR; 3733 3734 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) { 3735 dev_err(ns->ctrl->device, 3736 "identifiers changed for nsid %d\n", ns->head->ns_id); 3737 goto out; 3738 } 3739 3740 ret = nvme_update_ns_info(ns, info); 3741 out: 3742 /* 3743 * Only remove the namespace if we got a fatal error back from the 3744 * device, otherwise ignore the error and just move on. 3745 * 3746 * TODO: we should probably schedule a delayed retry here. 3747 */ 3748 if (ret > 0 && (ret & NVME_SC_DNR)) 3749 nvme_ns_remove(ns); 3750 } 3751 3752 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3753 { 3754 struct nvme_ns_info info = { .nsid = nsid }; 3755 struct nvme_ns *ns; 3756 int ret; 3757 3758 if (nvme_identify_ns_descs(ctrl, &info)) 3759 return; 3760 3761 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) { 3762 dev_warn(ctrl->device, 3763 "command set not reported for nsid: %d\n", nsid); 3764 return; 3765 } 3766 3767 /* 3768 * If available try to use the Command Set Idependent Identify Namespace 3769 * data structure to find all the generic information that is needed to 3770 * set up a namespace. If not fall back to the legacy version. 3771 */ 3772 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) || 3773 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS)) 3774 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info); 3775 else 3776 ret = nvme_ns_info_from_identify(ctrl, &info); 3777 3778 if (info.is_removed) 3779 nvme_ns_remove_by_nsid(ctrl, nsid); 3780 3781 /* 3782 * Ignore the namespace if it is not ready. We will get an AEN once it 3783 * becomes ready and restart the scan. 3784 */ 3785 if (ret || !info.is_ready) 3786 return; 3787 3788 ns = nvme_find_get_ns(ctrl, nsid); 3789 if (ns) { 3790 nvme_validate_ns(ns, &info); 3791 nvme_put_ns(ns); 3792 } else { 3793 nvme_alloc_ns(ctrl, &info); 3794 } 3795 } 3796 3797 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 3798 unsigned nsid) 3799 { 3800 struct nvme_ns *ns, *next; 3801 LIST_HEAD(rm_list); 3802 3803 down_write(&ctrl->namespaces_rwsem); 3804 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 3805 if (ns->head->ns_id > nsid) 3806 list_move_tail(&ns->list, &rm_list); 3807 } 3808 up_write(&ctrl->namespaces_rwsem); 3809 3810 list_for_each_entry_safe(ns, next, &rm_list, list) 3811 nvme_ns_remove(ns); 3812 3813 } 3814 3815 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl) 3816 { 3817 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32); 3818 __le32 *ns_list; 3819 u32 prev = 0; 3820 int ret = 0, i; 3821 3822 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 3823 if (!ns_list) 3824 return -ENOMEM; 3825 3826 for (;;) { 3827 struct nvme_command cmd = { 3828 .identify.opcode = nvme_admin_identify, 3829 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST, 3830 .identify.nsid = cpu_to_le32(prev), 3831 }; 3832 3833 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list, 3834 NVME_IDENTIFY_DATA_SIZE); 3835 if (ret) { 3836 dev_warn(ctrl->device, 3837 "Identify NS List failed (status=0x%x)\n", ret); 3838 goto free; 3839 } 3840 3841 for (i = 0; i < nr_entries; i++) { 3842 u32 nsid = le32_to_cpu(ns_list[i]); 3843 3844 if (!nsid) /* end of the list? */ 3845 goto out; 3846 nvme_scan_ns(ctrl, nsid); 3847 while (++prev < nsid) 3848 nvme_ns_remove_by_nsid(ctrl, prev); 3849 } 3850 } 3851 out: 3852 nvme_remove_invalid_namespaces(ctrl, prev); 3853 free: 3854 kfree(ns_list); 3855 return ret; 3856 } 3857 3858 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl) 3859 { 3860 struct nvme_id_ctrl *id; 3861 u32 nn, i; 3862 3863 if (nvme_identify_ctrl(ctrl, &id)) 3864 return; 3865 nn = le32_to_cpu(id->nn); 3866 kfree(id); 3867 3868 for (i = 1; i <= nn; i++) 3869 nvme_scan_ns(ctrl, i); 3870 3871 nvme_remove_invalid_namespaces(ctrl, nn); 3872 } 3873 3874 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 3875 { 3876 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 3877 __le32 *log; 3878 int error; 3879 3880 log = kzalloc(log_size, GFP_KERNEL); 3881 if (!log) 3882 return; 3883 3884 /* 3885 * We need to read the log to clear the AEN, but we don't want to rely 3886 * on it for the changed namespace information as userspace could have 3887 * raced with us in reading the log page, which could cause us to miss 3888 * updates. 3889 */ 3890 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, 3891 NVME_CSI_NVM, log, log_size, 0); 3892 if (error) 3893 dev_warn(ctrl->device, 3894 "reading changed ns log failed: %d\n", error); 3895 3896 kfree(log); 3897 } 3898 3899 static void nvme_scan_work(struct work_struct *work) 3900 { 3901 struct nvme_ctrl *ctrl = 3902 container_of(work, struct nvme_ctrl, scan_work); 3903 int ret; 3904 3905 /* No tagset on a live ctrl means IO queues could not created */ 3906 if (ctrl->state != NVME_CTRL_LIVE || !ctrl->tagset) 3907 return; 3908 3909 /* 3910 * Identify controller limits can change at controller reset due to 3911 * new firmware download, even though it is not common we cannot ignore 3912 * such scenario. Controller's non-mdts limits are reported in the unit 3913 * of logical blocks that is dependent on the format of attached 3914 * namespace. Hence re-read the limits at the time of ns allocation. 3915 */ 3916 ret = nvme_init_non_mdts_limits(ctrl); 3917 if (ret < 0) { 3918 dev_warn(ctrl->device, 3919 "reading non-mdts-limits failed: %d\n", ret); 3920 return; 3921 } 3922 3923 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 3924 dev_info(ctrl->device, "rescanning namespaces.\n"); 3925 nvme_clear_changed_ns_log(ctrl); 3926 } 3927 3928 mutex_lock(&ctrl->scan_lock); 3929 if (nvme_ctrl_limited_cns(ctrl)) { 3930 nvme_scan_ns_sequential(ctrl); 3931 } else { 3932 /* 3933 * Fall back to sequential scan if DNR is set to handle broken 3934 * devices which should support Identify NS List (as per the VS 3935 * they report) but don't actually support it. 3936 */ 3937 ret = nvme_scan_ns_list(ctrl); 3938 if (ret > 0 && ret & NVME_SC_DNR) 3939 nvme_scan_ns_sequential(ctrl); 3940 } 3941 mutex_unlock(&ctrl->scan_lock); 3942 } 3943 3944 /* 3945 * This function iterates the namespace list unlocked to allow recovery from 3946 * controller failure. It is up to the caller to ensure the namespace list is 3947 * not modified by scan work while this function is executing. 3948 */ 3949 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 3950 { 3951 struct nvme_ns *ns, *next; 3952 LIST_HEAD(ns_list); 3953 3954 /* 3955 * make sure to requeue I/O to all namespaces as these 3956 * might result from the scan itself and must complete 3957 * for the scan_work to make progress 3958 */ 3959 nvme_mpath_clear_ctrl_paths(ctrl); 3960 3961 /* 3962 * Unquiesce io queues so any pending IO won't hang, especially 3963 * those submitted from scan work 3964 */ 3965 nvme_unquiesce_io_queues(ctrl); 3966 3967 /* prevent racing with ns scanning */ 3968 flush_work(&ctrl->scan_work); 3969 3970 /* 3971 * The dead states indicates the controller was not gracefully 3972 * disconnected. In that case, we won't be able to flush any data while 3973 * removing the namespaces' disks; fail all the queues now to avoid 3974 * potentially having to clean up the failed sync later. 3975 */ 3976 if (ctrl->state == NVME_CTRL_DEAD) 3977 nvme_mark_namespaces_dead(ctrl); 3978 3979 /* this is a no-op when called from the controller reset handler */ 3980 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO); 3981 3982 down_write(&ctrl->namespaces_rwsem); 3983 list_splice_init(&ctrl->namespaces, &ns_list); 3984 up_write(&ctrl->namespaces_rwsem); 3985 3986 list_for_each_entry_safe(ns, next, &ns_list, list) 3987 nvme_ns_remove(ns); 3988 } 3989 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 3990 3991 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env) 3992 { 3993 const struct nvme_ctrl *ctrl = 3994 container_of(dev, struct nvme_ctrl, ctrl_device); 3995 struct nvmf_ctrl_options *opts = ctrl->opts; 3996 int ret; 3997 3998 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name); 3999 if (ret) 4000 return ret; 4001 4002 if (opts) { 4003 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr); 4004 if (ret) 4005 return ret; 4006 4007 ret = add_uevent_var(env, "NVME_TRSVCID=%s", 4008 opts->trsvcid ?: "none"); 4009 if (ret) 4010 return ret; 4011 4012 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s", 4013 opts->host_traddr ?: "none"); 4014 if (ret) 4015 return ret; 4016 4017 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s", 4018 opts->host_iface ?: "none"); 4019 } 4020 return ret; 4021 } 4022 4023 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata) 4024 { 4025 char *envp[2] = { envdata, NULL }; 4026 4027 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4028 } 4029 4030 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 4031 { 4032 char *envp[2] = { NULL, NULL }; 4033 u32 aen_result = ctrl->aen_result; 4034 4035 ctrl->aen_result = 0; 4036 if (!aen_result) 4037 return; 4038 4039 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 4040 if (!envp[0]) 4041 return; 4042 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4043 kfree(envp[0]); 4044 } 4045 4046 static void nvme_async_event_work(struct work_struct *work) 4047 { 4048 struct nvme_ctrl *ctrl = 4049 container_of(work, struct nvme_ctrl, async_event_work); 4050 4051 nvme_aen_uevent(ctrl); 4052 4053 /* 4054 * The transport drivers must guarantee AER submission here is safe by 4055 * flushing ctrl async_event_work after changing the controller state 4056 * from LIVE and before freeing the admin queue. 4057 */ 4058 if (ctrl->state == NVME_CTRL_LIVE) 4059 ctrl->ops->submit_async_event(ctrl); 4060 } 4061 4062 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 4063 { 4064 4065 u32 csts; 4066 4067 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 4068 return false; 4069 4070 if (csts == ~0) 4071 return false; 4072 4073 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 4074 } 4075 4076 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 4077 { 4078 struct nvme_fw_slot_info_log *log; 4079 4080 log = kmalloc(sizeof(*log), GFP_KERNEL); 4081 if (!log) 4082 return; 4083 4084 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM, 4085 log, sizeof(*log), 0)) { 4086 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 4087 goto out_free_log; 4088 } 4089 4090 if (log->afi & 0x70 || !(log->afi & 0x7)) { 4091 dev_info(ctrl->device, 4092 "Firmware is activated after next Controller Level Reset\n"); 4093 goto out_free_log; 4094 } 4095 4096 memcpy(ctrl->subsys->firmware_rev, &log->frs[(log->afi & 0x7) - 1], 4097 sizeof(ctrl->subsys->firmware_rev)); 4098 4099 out_free_log: 4100 kfree(log); 4101 } 4102 4103 static void nvme_fw_act_work(struct work_struct *work) 4104 { 4105 struct nvme_ctrl *ctrl = container_of(work, 4106 struct nvme_ctrl, fw_act_work); 4107 unsigned long fw_act_timeout; 4108 4109 if (ctrl->mtfa) 4110 fw_act_timeout = jiffies + 4111 msecs_to_jiffies(ctrl->mtfa * 100); 4112 else 4113 fw_act_timeout = jiffies + 4114 msecs_to_jiffies(admin_timeout * 1000); 4115 4116 nvme_quiesce_io_queues(ctrl); 4117 while (nvme_ctrl_pp_status(ctrl)) { 4118 if (time_after(jiffies, fw_act_timeout)) { 4119 dev_warn(ctrl->device, 4120 "Fw activation timeout, reset controller\n"); 4121 nvme_try_sched_reset(ctrl); 4122 return; 4123 } 4124 msleep(100); 4125 } 4126 4127 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE)) 4128 return; 4129 4130 nvme_unquiesce_io_queues(ctrl); 4131 /* read FW slot information to clear the AER */ 4132 nvme_get_fw_slot_info(ctrl); 4133 4134 queue_work(nvme_wq, &ctrl->async_event_work); 4135 } 4136 4137 static u32 nvme_aer_type(u32 result) 4138 { 4139 return result & 0x7; 4140 } 4141 4142 static u32 nvme_aer_subtype(u32 result) 4143 { 4144 return (result & 0xff00) >> 8; 4145 } 4146 4147 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 4148 { 4149 u32 aer_notice_type = nvme_aer_subtype(result); 4150 bool requeue = true; 4151 4152 switch (aer_notice_type) { 4153 case NVME_AER_NOTICE_NS_CHANGED: 4154 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 4155 nvme_queue_scan(ctrl); 4156 break; 4157 case NVME_AER_NOTICE_FW_ACT_STARTING: 4158 /* 4159 * We are (ab)using the RESETTING state to prevent subsequent 4160 * recovery actions from interfering with the controller's 4161 * firmware activation. 4162 */ 4163 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) { 4164 nvme_auth_stop(ctrl); 4165 requeue = false; 4166 queue_work(nvme_wq, &ctrl->fw_act_work); 4167 } 4168 break; 4169 #ifdef CONFIG_NVME_MULTIPATH 4170 case NVME_AER_NOTICE_ANA: 4171 if (!ctrl->ana_log_buf) 4172 break; 4173 queue_work(nvme_wq, &ctrl->ana_work); 4174 break; 4175 #endif 4176 case NVME_AER_NOTICE_DISC_CHANGED: 4177 ctrl->aen_result = result; 4178 break; 4179 default: 4180 dev_warn(ctrl->device, "async event result %08x\n", result); 4181 } 4182 return requeue; 4183 } 4184 4185 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl) 4186 { 4187 dev_warn(ctrl->device, "resetting controller due to AER\n"); 4188 nvme_reset_ctrl(ctrl); 4189 } 4190 4191 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 4192 volatile union nvme_result *res) 4193 { 4194 u32 result = le32_to_cpu(res->u32); 4195 u32 aer_type = nvme_aer_type(result); 4196 u32 aer_subtype = nvme_aer_subtype(result); 4197 bool requeue = true; 4198 4199 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 4200 return; 4201 4202 trace_nvme_async_event(ctrl, result); 4203 switch (aer_type) { 4204 case NVME_AER_NOTICE: 4205 requeue = nvme_handle_aen_notice(ctrl, result); 4206 break; 4207 case NVME_AER_ERROR: 4208 /* 4209 * For a persistent internal error, don't run async_event_work 4210 * to submit a new AER. The controller reset will do it. 4211 */ 4212 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) { 4213 nvme_handle_aer_persistent_error(ctrl); 4214 return; 4215 } 4216 fallthrough; 4217 case NVME_AER_SMART: 4218 case NVME_AER_CSS: 4219 case NVME_AER_VS: 4220 ctrl->aen_result = result; 4221 break; 4222 default: 4223 break; 4224 } 4225 4226 if (requeue) 4227 queue_work(nvme_wq, &ctrl->async_event_work); 4228 } 4229 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 4230 4231 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4232 const struct blk_mq_ops *ops, unsigned int cmd_size) 4233 { 4234 int ret; 4235 4236 memset(set, 0, sizeof(*set)); 4237 set->ops = ops; 4238 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 4239 if (ctrl->ops->flags & NVME_F_FABRICS) 4240 set->reserved_tags = NVMF_RESERVED_TAGS; 4241 set->numa_node = ctrl->numa_node; 4242 set->flags = BLK_MQ_F_NO_SCHED; 4243 if (ctrl->ops->flags & NVME_F_BLOCKING) 4244 set->flags |= BLK_MQ_F_BLOCKING; 4245 set->cmd_size = cmd_size; 4246 set->driver_data = ctrl; 4247 set->nr_hw_queues = 1; 4248 set->timeout = NVME_ADMIN_TIMEOUT; 4249 ret = blk_mq_alloc_tag_set(set); 4250 if (ret) 4251 return ret; 4252 4253 ctrl->admin_q = blk_mq_init_queue(set); 4254 if (IS_ERR(ctrl->admin_q)) { 4255 ret = PTR_ERR(ctrl->admin_q); 4256 goto out_free_tagset; 4257 } 4258 4259 if (ctrl->ops->flags & NVME_F_FABRICS) { 4260 ctrl->fabrics_q = blk_mq_init_queue(set); 4261 if (IS_ERR(ctrl->fabrics_q)) { 4262 ret = PTR_ERR(ctrl->fabrics_q); 4263 goto out_cleanup_admin_q; 4264 } 4265 } 4266 4267 ctrl->admin_tagset = set; 4268 return 0; 4269 4270 out_cleanup_admin_q: 4271 blk_mq_destroy_queue(ctrl->admin_q); 4272 blk_put_queue(ctrl->admin_q); 4273 out_free_tagset: 4274 blk_mq_free_tag_set(set); 4275 ctrl->admin_q = NULL; 4276 ctrl->fabrics_q = NULL; 4277 return ret; 4278 } 4279 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set); 4280 4281 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl) 4282 { 4283 blk_mq_destroy_queue(ctrl->admin_q); 4284 blk_put_queue(ctrl->admin_q); 4285 if (ctrl->ops->flags & NVME_F_FABRICS) { 4286 blk_mq_destroy_queue(ctrl->fabrics_q); 4287 blk_put_queue(ctrl->fabrics_q); 4288 } 4289 blk_mq_free_tag_set(ctrl->admin_tagset); 4290 } 4291 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set); 4292 4293 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4294 const struct blk_mq_ops *ops, unsigned int nr_maps, 4295 unsigned int cmd_size) 4296 { 4297 int ret; 4298 4299 memset(set, 0, sizeof(*set)); 4300 set->ops = ops; 4301 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1); 4302 /* 4303 * Some Apple controllers requires tags to be unique across admin and 4304 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue. 4305 */ 4306 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS) 4307 set->reserved_tags = NVME_AQ_DEPTH; 4308 else if (ctrl->ops->flags & NVME_F_FABRICS) 4309 set->reserved_tags = NVMF_RESERVED_TAGS; 4310 set->numa_node = ctrl->numa_node; 4311 set->flags = BLK_MQ_F_SHOULD_MERGE; 4312 if (ctrl->ops->flags & NVME_F_BLOCKING) 4313 set->flags |= BLK_MQ_F_BLOCKING; 4314 set->cmd_size = cmd_size, 4315 set->driver_data = ctrl; 4316 set->nr_hw_queues = ctrl->queue_count - 1; 4317 set->timeout = NVME_IO_TIMEOUT; 4318 set->nr_maps = nr_maps; 4319 ret = blk_mq_alloc_tag_set(set); 4320 if (ret) 4321 return ret; 4322 4323 if (ctrl->ops->flags & NVME_F_FABRICS) { 4324 ctrl->connect_q = blk_mq_init_queue(set); 4325 if (IS_ERR(ctrl->connect_q)) { 4326 ret = PTR_ERR(ctrl->connect_q); 4327 goto out_free_tag_set; 4328 } 4329 blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE, 4330 ctrl->connect_q); 4331 } 4332 4333 ctrl->tagset = set; 4334 return 0; 4335 4336 out_free_tag_set: 4337 blk_mq_free_tag_set(set); 4338 ctrl->connect_q = NULL; 4339 return ret; 4340 } 4341 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set); 4342 4343 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl) 4344 { 4345 if (ctrl->ops->flags & NVME_F_FABRICS) { 4346 blk_mq_destroy_queue(ctrl->connect_q); 4347 blk_put_queue(ctrl->connect_q); 4348 } 4349 blk_mq_free_tag_set(ctrl->tagset); 4350 } 4351 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set); 4352 4353 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 4354 { 4355 nvme_mpath_stop(ctrl); 4356 nvme_auth_stop(ctrl); 4357 nvme_stop_keep_alive(ctrl); 4358 nvme_stop_failfast_work(ctrl); 4359 flush_work(&ctrl->async_event_work); 4360 cancel_work_sync(&ctrl->fw_act_work); 4361 if (ctrl->ops->stop_ctrl) 4362 ctrl->ops->stop_ctrl(ctrl); 4363 } 4364 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 4365 4366 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 4367 { 4368 nvme_enable_aen(ctrl); 4369 4370 /* 4371 * persistent discovery controllers need to send indication to userspace 4372 * to re-read the discovery log page to learn about possible changes 4373 * that were missed. We identify persistent discovery controllers by 4374 * checking that they started once before, hence are reconnecting back. 4375 */ 4376 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) && 4377 nvme_discovery_ctrl(ctrl)) 4378 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover"); 4379 4380 if (ctrl->queue_count > 1) { 4381 nvme_queue_scan(ctrl); 4382 nvme_unquiesce_io_queues(ctrl); 4383 nvme_mpath_update(ctrl); 4384 } 4385 4386 nvme_change_uevent(ctrl, "NVME_EVENT=connected"); 4387 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags); 4388 } 4389 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 4390 4391 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 4392 { 4393 nvme_hwmon_exit(ctrl); 4394 nvme_fault_inject_fini(&ctrl->fault_inject); 4395 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4396 cdev_device_del(&ctrl->cdev, ctrl->device); 4397 nvme_put_ctrl(ctrl); 4398 } 4399 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 4400 4401 static void nvme_free_cels(struct nvme_ctrl *ctrl) 4402 { 4403 struct nvme_effects_log *cel; 4404 unsigned long i; 4405 4406 xa_for_each(&ctrl->cels, i, cel) { 4407 xa_erase(&ctrl->cels, i); 4408 kfree(cel); 4409 } 4410 4411 xa_destroy(&ctrl->cels); 4412 } 4413 4414 static void nvme_free_ctrl(struct device *dev) 4415 { 4416 struct nvme_ctrl *ctrl = 4417 container_of(dev, struct nvme_ctrl, ctrl_device); 4418 struct nvme_subsystem *subsys = ctrl->subsys; 4419 4420 if (!subsys || ctrl->instance != subsys->instance) 4421 ida_free(&nvme_instance_ida, ctrl->instance); 4422 key_put(ctrl->tls_key); 4423 nvme_free_cels(ctrl); 4424 nvme_mpath_uninit(ctrl); 4425 nvme_auth_stop(ctrl); 4426 nvme_auth_free(ctrl); 4427 __free_page(ctrl->discard_page); 4428 free_opal_dev(ctrl->opal_dev); 4429 4430 if (subsys) { 4431 mutex_lock(&nvme_subsystems_lock); 4432 list_del(&ctrl->subsys_entry); 4433 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 4434 mutex_unlock(&nvme_subsystems_lock); 4435 } 4436 4437 ctrl->ops->free_ctrl(ctrl); 4438 4439 if (subsys) 4440 nvme_put_subsystem(subsys); 4441 } 4442 4443 /* 4444 * Initialize a NVMe controller structures. This needs to be called during 4445 * earliest initialization so that we have the initialized structured around 4446 * during probing. 4447 */ 4448 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 4449 const struct nvme_ctrl_ops *ops, unsigned long quirks) 4450 { 4451 int ret; 4452 4453 ctrl->state = NVME_CTRL_NEW; 4454 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 4455 spin_lock_init(&ctrl->lock); 4456 mutex_init(&ctrl->scan_lock); 4457 INIT_LIST_HEAD(&ctrl->namespaces); 4458 xa_init(&ctrl->cels); 4459 init_rwsem(&ctrl->namespaces_rwsem); 4460 ctrl->dev = dev; 4461 ctrl->ops = ops; 4462 ctrl->quirks = quirks; 4463 ctrl->numa_node = NUMA_NO_NODE; 4464 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 4465 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 4466 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 4467 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 4468 init_waitqueue_head(&ctrl->state_wq); 4469 4470 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 4471 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work); 4472 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 4473 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 4474 4475 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 4476 PAGE_SIZE); 4477 ctrl->discard_page = alloc_page(GFP_KERNEL); 4478 if (!ctrl->discard_page) { 4479 ret = -ENOMEM; 4480 goto out; 4481 } 4482 4483 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL); 4484 if (ret < 0) 4485 goto out; 4486 ctrl->instance = ret; 4487 4488 device_initialize(&ctrl->ctrl_device); 4489 ctrl->device = &ctrl->ctrl_device; 4490 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt), 4491 ctrl->instance); 4492 ctrl->device->class = nvme_class; 4493 ctrl->device->parent = ctrl->dev; 4494 if (ops->dev_attr_groups) 4495 ctrl->device->groups = ops->dev_attr_groups; 4496 else 4497 ctrl->device->groups = nvme_dev_attr_groups; 4498 ctrl->device->release = nvme_free_ctrl; 4499 dev_set_drvdata(ctrl->device, ctrl); 4500 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 4501 if (ret) 4502 goto out_release_instance; 4503 4504 nvme_get_ctrl(ctrl); 4505 cdev_init(&ctrl->cdev, &nvme_dev_fops); 4506 ctrl->cdev.owner = ops->module; 4507 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 4508 if (ret) 4509 goto out_free_name; 4510 4511 /* 4512 * Initialize latency tolerance controls. The sysfs files won't 4513 * be visible to userspace unless the device actually supports APST. 4514 */ 4515 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 4516 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 4517 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 4518 4519 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device)); 4520 nvme_mpath_init_ctrl(ctrl); 4521 ret = nvme_auth_init_ctrl(ctrl); 4522 if (ret) 4523 goto out_free_cdev; 4524 4525 return 0; 4526 out_free_cdev: 4527 nvme_fault_inject_fini(&ctrl->fault_inject); 4528 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4529 cdev_device_del(&ctrl->cdev, ctrl->device); 4530 out_free_name: 4531 nvme_put_ctrl(ctrl); 4532 kfree_const(ctrl->device->kobj.name); 4533 out_release_instance: 4534 ida_free(&nvme_instance_ida, ctrl->instance); 4535 out: 4536 if (ctrl->discard_page) 4537 __free_page(ctrl->discard_page); 4538 return ret; 4539 } 4540 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 4541 4542 /* let I/O to all namespaces fail in preparation for surprise removal */ 4543 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl) 4544 { 4545 struct nvme_ns *ns; 4546 4547 down_read(&ctrl->namespaces_rwsem); 4548 list_for_each_entry(ns, &ctrl->namespaces, list) 4549 blk_mark_disk_dead(ns->disk); 4550 up_read(&ctrl->namespaces_rwsem); 4551 } 4552 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead); 4553 4554 void nvme_unfreeze(struct nvme_ctrl *ctrl) 4555 { 4556 struct nvme_ns *ns; 4557 4558 down_read(&ctrl->namespaces_rwsem); 4559 list_for_each_entry(ns, &ctrl->namespaces, list) 4560 blk_mq_unfreeze_queue(ns->queue); 4561 up_read(&ctrl->namespaces_rwsem); 4562 } 4563 EXPORT_SYMBOL_GPL(nvme_unfreeze); 4564 4565 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 4566 { 4567 struct nvme_ns *ns; 4568 4569 down_read(&ctrl->namespaces_rwsem); 4570 list_for_each_entry(ns, &ctrl->namespaces, list) { 4571 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 4572 if (timeout <= 0) 4573 break; 4574 } 4575 up_read(&ctrl->namespaces_rwsem); 4576 return timeout; 4577 } 4578 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 4579 4580 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 4581 { 4582 struct nvme_ns *ns; 4583 4584 down_read(&ctrl->namespaces_rwsem); 4585 list_for_each_entry(ns, &ctrl->namespaces, list) 4586 blk_mq_freeze_queue_wait(ns->queue); 4587 up_read(&ctrl->namespaces_rwsem); 4588 } 4589 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 4590 4591 void nvme_start_freeze(struct nvme_ctrl *ctrl) 4592 { 4593 struct nvme_ns *ns; 4594 4595 down_read(&ctrl->namespaces_rwsem); 4596 list_for_each_entry(ns, &ctrl->namespaces, list) 4597 blk_freeze_queue_start(ns->queue); 4598 up_read(&ctrl->namespaces_rwsem); 4599 } 4600 EXPORT_SYMBOL_GPL(nvme_start_freeze); 4601 4602 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl) 4603 { 4604 if (!ctrl->tagset) 4605 return; 4606 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4607 blk_mq_quiesce_tagset(ctrl->tagset); 4608 else 4609 blk_mq_wait_quiesce_done(ctrl->tagset); 4610 } 4611 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues); 4612 4613 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl) 4614 { 4615 if (!ctrl->tagset) 4616 return; 4617 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4618 blk_mq_unquiesce_tagset(ctrl->tagset); 4619 } 4620 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues); 4621 4622 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl) 4623 { 4624 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4625 blk_mq_quiesce_queue(ctrl->admin_q); 4626 else 4627 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set); 4628 } 4629 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue); 4630 4631 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl) 4632 { 4633 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4634 blk_mq_unquiesce_queue(ctrl->admin_q); 4635 } 4636 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue); 4637 4638 void nvme_sync_io_queues(struct nvme_ctrl *ctrl) 4639 { 4640 struct nvme_ns *ns; 4641 4642 down_read(&ctrl->namespaces_rwsem); 4643 list_for_each_entry(ns, &ctrl->namespaces, list) 4644 blk_sync_queue(ns->queue); 4645 up_read(&ctrl->namespaces_rwsem); 4646 } 4647 EXPORT_SYMBOL_GPL(nvme_sync_io_queues); 4648 4649 void nvme_sync_queues(struct nvme_ctrl *ctrl) 4650 { 4651 nvme_sync_io_queues(ctrl); 4652 if (ctrl->admin_q) 4653 blk_sync_queue(ctrl->admin_q); 4654 } 4655 EXPORT_SYMBOL_GPL(nvme_sync_queues); 4656 4657 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file) 4658 { 4659 if (file->f_op != &nvme_dev_fops) 4660 return NULL; 4661 return file->private_data; 4662 } 4663 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU); 4664 4665 /* 4666 * Check we didn't inadvertently grow the command structure sizes: 4667 */ 4668 static inline void _nvme_check_size(void) 4669 { 4670 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64); 4671 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 4672 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64); 4673 BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 4674 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64); 4675 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 4676 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64); 4677 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64); 4678 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 4679 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64); 4680 BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 4681 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE); 4682 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE); 4683 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) != 4684 NVME_IDENTIFY_DATA_SIZE); 4685 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE); 4686 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE); 4687 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE); 4688 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE); 4689 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 4690 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 4691 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 4692 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64); 4693 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512); 4694 } 4695 4696 4697 static int __init nvme_core_init(void) 4698 { 4699 int result = -ENOMEM; 4700 4701 _nvme_check_size(); 4702 4703 nvme_wq = alloc_workqueue("nvme-wq", 4704 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4705 if (!nvme_wq) 4706 goto out; 4707 4708 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", 4709 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4710 if (!nvme_reset_wq) 4711 goto destroy_wq; 4712 4713 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", 4714 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4715 if (!nvme_delete_wq) 4716 goto destroy_reset_wq; 4717 4718 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0, 4719 NVME_MINORS, "nvme"); 4720 if (result < 0) 4721 goto destroy_delete_wq; 4722 4723 nvme_class = class_create("nvme"); 4724 if (IS_ERR(nvme_class)) { 4725 result = PTR_ERR(nvme_class); 4726 goto unregister_chrdev; 4727 } 4728 nvme_class->dev_uevent = nvme_class_uevent; 4729 4730 nvme_subsys_class = class_create("nvme-subsystem"); 4731 if (IS_ERR(nvme_subsys_class)) { 4732 result = PTR_ERR(nvme_subsys_class); 4733 goto destroy_class; 4734 } 4735 4736 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS, 4737 "nvme-generic"); 4738 if (result < 0) 4739 goto destroy_subsys_class; 4740 4741 nvme_ns_chr_class = class_create("nvme-generic"); 4742 if (IS_ERR(nvme_ns_chr_class)) { 4743 result = PTR_ERR(nvme_ns_chr_class); 4744 goto unregister_generic_ns; 4745 } 4746 result = nvme_init_auth(); 4747 if (result) 4748 goto destroy_ns_chr; 4749 return 0; 4750 4751 destroy_ns_chr: 4752 class_destroy(nvme_ns_chr_class); 4753 unregister_generic_ns: 4754 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4755 destroy_subsys_class: 4756 class_destroy(nvme_subsys_class); 4757 destroy_class: 4758 class_destroy(nvme_class); 4759 unregister_chrdev: 4760 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4761 destroy_delete_wq: 4762 destroy_workqueue(nvme_delete_wq); 4763 destroy_reset_wq: 4764 destroy_workqueue(nvme_reset_wq); 4765 destroy_wq: 4766 destroy_workqueue(nvme_wq); 4767 out: 4768 return result; 4769 } 4770 4771 static void __exit nvme_core_exit(void) 4772 { 4773 nvme_exit_auth(); 4774 class_destroy(nvme_ns_chr_class); 4775 class_destroy(nvme_subsys_class); 4776 class_destroy(nvme_class); 4777 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4778 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4779 destroy_workqueue(nvme_delete_wq); 4780 destroy_workqueue(nvme_reset_wq); 4781 destroy_workqueue(nvme_wq); 4782 ida_destroy(&nvme_ns_chr_minor_ida); 4783 ida_destroy(&nvme_instance_ida); 4784 } 4785 4786 MODULE_LICENSE("GPL"); 4787 MODULE_VERSION("1.0"); 4788 module_init(nvme_core_init); 4789 module_exit(nvme_core_exit); 4790