1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVM Express device driver 4 * Copyright (c) 2011-2014, Intel Corporation. 5 */ 6 7 #include <linux/async.h> 8 #include <linux/blkdev.h> 9 #include <linux/blk-mq.h> 10 #include <linux/blk-integrity.h> 11 #include <linux/compat.h> 12 #include <linux/delay.h> 13 #include <linux/errno.h> 14 #include <linux/hdreg.h> 15 #include <linux/kernel.h> 16 #include <linux/module.h> 17 #include <linux/backing-dev.h> 18 #include <linux/slab.h> 19 #include <linux/types.h> 20 #include <linux/pr.h> 21 #include <linux/ptrace.h> 22 #include <linux/nvme_ioctl.h> 23 #include <linux/pm_qos.h> 24 #include <linux/ratelimit.h> 25 #include <linux/unaligned.h> 26 27 #include "nvme.h" 28 #include "fabrics.h" 29 #include <linux/nvme-auth.h> 30 31 #define CREATE_TRACE_POINTS 32 #include "trace.h" 33 34 #define NVME_MINORS (1U << MINORBITS) 35 36 struct nvme_ns_info { 37 struct nvme_ns_ids ids; 38 u32 nsid; 39 __le32 anagrpid; 40 u8 pi_offset; 41 u16 endgid; 42 u64 runs; 43 bool is_shared; 44 bool is_readonly; 45 bool is_ready; 46 bool is_removed; 47 bool is_rotational; 48 bool no_vwc; 49 }; 50 51 unsigned int admin_timeout = 60; 52 module_param(admin_timeout, uint, 0644); 53 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 54 EXPORT_SYMBOL_GPL(admin_timeout); 55 56 unsigned int nvme_io_timeout = 30; 57 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 58 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 59 EXPORT_SYMBOL_GPL(nvme_io_timeout); 60 61 static unsigned char shutdown_timeout = 5; 62 module_param(shutdown_timeout, byte, 0644); 63 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 64 65 static u8 nvme_max_retries = 5; 66 module_param_named(max_retries, nvme_max_retries, byte, 0644); 67 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 68 69 static unsigned long default_ps_max_latency_us = 100000; 70 module_param(default_ps_max_latency_us, ulong, 0644); 71 MODULE_PARM_DESC(default_ps_max_latency_us, 72 "max power saving latency for new devices; use PM QOS to change per device"); 73 74 static bool force_apst; 75 module_param(force_apst, bool, 0644); 76 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 77 78 static unsigned long apst_primary_timeout_ms = 100; 79 module_param(apst_primary_timeout_ms, ulong, 0644); 80 MODULE_PARM_DESC(apst_primary_timeout_ms, 81 "primary APST timeout in ms"); 82 83 static unsigned long apst_secondary_timeout_ms = 2000; 84 module_param(apst_secondary_timeout_ms, ulong, 0644); 85 MODULE_PARM_DESC(apst_secondary_timeout_ms, 86 "secondary APST timeout in ms"); 87 88 static unsigned long apst_primary_latency_tol_us = 15000; 89 module_param(apst_primary_latency_tol_us, ulong, 0644); 90 MODULE_PARM_DESC(apst_primary_latency_tol_us, 91 "primary APST latency tolerance in us"); 92 93 static unsigned long apst_secondary_latency_tol_us = 100000; 94 module_param(apst_secondary_latency_tol_us, ulong, 0644); 95 MODULE_PARM_DESC(apst_secondary_latency_tol_us, 96 "secondary APST latency tolerance in us"); 97 98 /* 99 * Older kernels didn't enable protection information if it was at an offset. 100 * Newer kernels do, so it breaks reads on the upgrade if such formats were 101 * used in prior kernels since the metadata written did not contain a valid 102 * checksum. 103 */ 104 static bool disable_pi_offsets = false; 105 module_param(disable_pi_offsets, bool, 0444); 106 MODULE_PARM_DESC(disable_pi_offsets, 107 "disable protection information if it has an offset"); 108 109 /* 110 * nvme_wq - hosts nvme related works that are not reset or delete 111 * nvme_reset_wq - hosts nvme reset works 112 * nvme_delete_wq - hosts nvme delete works 113 * 114 * nvme_wq will host works such as scan, aen handling, fw activation, 115 * keep-alive, periodic reconnects etc. nvme_reset_wq 116 * runs reset works which also flush works hosted on nvme_wq for 117 * serialization purposes. nvme_delete_wq host controller deletion 118 * works which flush reset works for serialization. 119 */ 120 struct workqueue_struct *nvme_wq; 121 EXPORT_SYMBOL_GPL(nvme_wq); 122 123 struct workqueue_struct *nvme_reset_wq; 124 EXPORT_SYMBOL_GPL(nvme_reset_wq); 125 126 struct workqueue_struct *nvme_delete_wq; 127 EXPORT_SYMBOL_GPL(nvme_delete_wq); 128 129 static LIST_HEAD(nvme_subsystems); 130 DEFINE_MUTEX(nvme_subsystems_lock); 131 132 static DEFINE_IDA(nvme_instance_ida); 133 static dev_t nvme_ctrl_base_chr_devt; 134 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env); 135 static const struct class nvme_class = { 136 .name = "nvme", 137 .dev_uevent = nvme_class_uevent, 138 }; 139 140 static const struct class nvme_subsys_class = { 141 .name = "nvme-subsystem", 142 }; 143 144 static DEFINE_IDA(nvme_ns_chr_minor_ida); 145 static dev_t nvme_ns_chr_devt; 146 static const struct class nvme_ns_chr_class = { 147 .name = "nvme-generic", 148 }; 149 150 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 151 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 152 unsigned nsid); 153 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 154 struct nvme_command *cmd); 155 static int nvme_get_log_lsi(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, 156 u8 lsp, u8 csi, void *log, size_t size, u64 offset, u16 lsi); 157 158 void nvme_queue_scan(struct nvme_ctrl *ctrl) 159 { 160 /* 161 * Only new queue scan work when admin and IO queues are both alive 162 */ 163 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset) 164 queue_work(nvme_wq, &ctrl->scan_work); 165 } 166 167 /* 168 * Use this function to proceed with scheduling reset_work for a controller 169 * that had previously been set to the resetting state. This is intended for 170 * code paths that can't be interrupted by other reset attempts. A hot removal 171 * may prevent this from succeeding. 172 */ 173 int nvme_try_sched_reset(struct nvme_ctrl *ctrl) 174 { 175 if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING) 176 return -EBUSY; 177 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 178 return -EBUSY; 179 return 0; 180 } 181 EXPORT_SYMBOL_GPL(nvme_try_sched_reset); 182 183 static void nvme_failfast_work(struct work_struct *work) 184 { 185 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 186 struct nvme_ctrl, failfast_work); 187 188 if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING) 189 return; 190 191 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 192 dev_info(ctrl->device, "failfast expired\n"); 193 nvme_kick_requeue_lists(ctrl); 194 } 195 196 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl) 197 { 198 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1) 199 return; 200 201 schedule_delayed_work(&ctrl->failfast_work, 202 ctrl->opts->fast_io_fail_tmo * HZ); 203 } 204 205 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl) 206 { 207 if (!ctrl->opts) 208 return; 209 210 cancel_delayed_work_sync(&ctrl->failfast_work); 211 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 212 } 213 214 215 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 216 { 217 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 218 return -EBUSY; 219 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 220 return -EBUSY; 221 return 0; 222 } 223 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 224 225 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 226 { 227 int ret; 228 229 ret = nvme_reset_ctrl(ctrl); 230 if (!ret) { 231 flush_work(&ctrl->reset_work); 232 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE) 233 ret = -ENETRESET; 234 } 235 236 return ret; 237 } 238 239 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl) 240 { 241 dev_info(ctrl->device, 242 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl)); 243 244 flush_work(&ctrl->reset_work); 245 nvme_stop_ctrl(ctrl); 246 nvme_remove_namespaces(ctrl); 247 ctrl->ops->delete_ctrl(ctrl); 248 nvme_uninit_ctrl(ctrl); 249 } 250 251 static void nvme_delete_ctrl_work(struct work_struct *work) 252 { 253 struct nvme_ctrl *ctrl = 254 container_of(work, struct nvme_ctrl, delete_work); 255 256 nvme_do_delete_ctrl(ctrl); 257 } 258 259 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 260 { 261 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 262 return -EBUSY; 263 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 264 return -EBUSY; 265 return 0; 266 } 267 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 268 269 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 270 { 271 /* 272 * Keep a reference until nvme_do_delete_ctrl() complete, 273 * since ->delete_ctrl can free the controller. 274 */ 275 nvme_get_ctrl(ctrl); 276 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 277 nvme_do_delete_ctrl(ctrl); 278 nvme_put_ctrl(ctrl); 279 } 280 281 static blk_status_t nvme_error_status(u16 status) 282 { 283 switch (status & NVME_SCT_SC_MASK) { 284 case NVME_SC_SUCCESS: 285 return BLK_STS_OK; 286 case NVME_SC_CAP_EXCEEDED: 287 return BLK_STS_NOSPC; 288 case NVME_SC_LBA_RANGE: 289 case NVME_SC_CMD_INTERRUPTED: 290 case NVME_SC_NS_NOT_READY: 291 return BLK_STS_TARGET; 292 case NVME_SC_BAD_ATTRIBUTES: 293 case NVME_SC_INVALID_OPCODE: 294 case NVME_SC_INVALID_FIELD: 295 case NVME_SC_INVALID_NS: 296 return BLK_STS_NOTSUPP; 297 case NVME_SC_WRITE_FAULT: 298 case NVME_SC_READ_ERROR: 299 case NVME_SC_UNWRITTEN_BLOCK: 300 case NVME_SC_ACCESS_DENIED: 301 case NVME_SC_READ_ONLY: 302 case NVME_SC_COMPARE_FAILED: 303 return BLK_STS_MEDIUM; 304 case NVME_SC_GUARD_CHECK: 305 case NVME_SC_APPTAG_CHECK: 306 case NVME_SC_REFTAG_CHECK: 307 case NVME_SC_INVALID_PI: 308 return BLK_STS_PROTECTION; 309 case NVME_SC_RESERVATION_CONFLICT: 310 return BLK_STS_RESV_CONFLICT; 311 case NVME_SC_HOST_PATH_ERROR: 312 return BLK_STS_TRANSPORT; 313 case NVME_SC_ZONE_TOO_MANY_ACTIVE: 314 return BLK_STS_ZONE_ACTIVE_RESOURCE; 315 case NVME_SC_ZONE_TOO_MANY_OPEN: 316 return BLK_STS_ZONE_OPEN_RESOURCE; 317 default: 318 return BLK_STS_IOERR; 319 } 320 } 321 322 static void nvme_retry_req(struct request *req) 323 { 324 unsigned long delay = 0; 325 u16 crd; 326 327 /* The mask and shift result must be <= 3 */ 328 crd = (nvme_req(req)->status & NVME_STATUS_CRD) >> 11; 329 if (crd) 330 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100; 331 332 nvme_req(req)->retries++; 333 blk_mq_requeue_request(req, false); 334 blk_mq_delay_kick_requeue_list(req->q, delay); 335 } 336 337 static void nvme_log_error(struct request *req) 338 { 339 struct nvme_ns *ns = req->q->queuedata; 340 struct nvme_request *nr = nvme_req(req); 341 342 if (ns) { 343 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %u blocks, %s (sct 0x%x / sc 0x%x) %s%s\n", 344 ns->disk ? ns->disk->disk_name : "?", 345 nvme_get_opcode_str(nr->cmd->common.opcode), 346 nr->cmd->common.opcode, 347 nvme_sect_to_lba(ns->head, blk_rq_pos(req)), 348 blk_rq_bytes(req) >> ns->head->lba_shift, 349 nvme_get_error_status_str(nr->status), 350 NVME_SCT(nr->status), /* Status Code Type */ 351 nr->status & NVME_SC_MASK, /* Status Code */ 352 nr->status & NVME_STATUS_MORE ? "MORE " : "", 353 nr->status & NVME_STATUS_DNR ? "DNR " : ""); 354 return; 355 } 356 357 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n", 358 dev_name(nr->ctrl->device), 359 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 360 nr->cmd->common.opcode, 361 nvme_get_error_status_str(nr->status), 362 NVME_SCT(nr->status), /* Status Code Type */ 363 nr->status & NVME_SC_MASK, /* Status Code */ 364 nr->status & NVME_STATUS_MORE ? "MORE " : "", 365 nr->status & NVME_STATUS_DNR ? "DNR " : ""); 366 } 367 368 static void nvme_log_err_passthru(struct request *req) 369 { 370 struct nvme_ns *ns = req->q->queuedata; 371 struct nvme_request *nr = nvme_req(req); 372 373 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s" 374 "cdw10=0x%x cdw11=0x%x cdw12=0x%x cdw13=0x%x cdw14=0x%x cdw15=0x%x\n", 375 ns ? ns->disk->disk_name : dev_name(nr->ctrl->device), 376 ns ? nvme_get_opcode_str(nr->cmd->common.opcode) : 377 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 378 nr->cmd->common.opcode, 379 nvme_get_error_status_str(nr->status), 380 NVME_SCT(nr->status), /* Status Code Type */ 381 nr->status & NVME_SC_MASK, /* Status Code */ 382 nr->status & NVME_STATUS_MORE ? "MORE " : "", 383 nr->status & NVME_STATUS_DNR ? "DNR " : "", 384 le32_to_cpu(nr->cmd->common.cdw10), 385 le32_to_cpu(nr->cmd->common.cdw11), 386 le32_to_cpu(nr->cmd->common.cdw12), 387 le32_to_cpu(nr->cmd->common.cdw13), 388 le32_to_cpu(nr->cmd->common.cdw14), 389 le32_to_cpu(nr->cmd->common.cdw15)); 390 } 391 392 enum nvme_disposition { 393 COMPLETE, 394 RETRY, 395 FAILOVER, 396 AUTHENTICATE, 397 }; 398 399 static inline enum nvme_disposition nvme_decide_disposition(struct request *req) 400 { 401 if (likely(nvme_req(req)->status == 0)) 402 return COMPLETE; 403 404 if (blk_noretry_request(req) || 405 (nvme_req(req)->status & NVME_STATUS_DNR) || 406 nvme_req(req)->retries >= nvme_max_retries) 407 return COMPLETE; 408 409 if ((nvme_req(req)->status & NVME_SCT_SC_MASK) == NVME_SC_AUTH_REQUIRED) 410 return AUTHENTICATE; 411 412 if (req->cmd_flags & REQ_NVME_MPATH) { 413 if (nvme_is_path_error(nvme_req(req)->status) || 414 blk_queue_dying(req->q)) 415 return FAILOVER; 416 } else { 417 if (blk_queue_dying(req->q)) 418 return COMPLETE; 419 } 420 421 return RETRY; 422 } 423 424 static inline void nvme_end_req_zoned(struct request *req) 425 { 426 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 427 req_op(req) == REQ_OP_ZONE_APPEND) { 428 struct nvme_ns *ns = req->q->queuedata; 429 430 req->__sector = nvme_lba_to_sect(ns->head, 431 le64_to_cpu(nvme_req(req)->result.u64)); 432 } 433 } 434 435 static inline void __nvme_end_req(struct request *req) 436 { 437 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) { 438 if (blk_rq_is_passthrough(req)) 439 nvme_log_err_passthru(req); 440 else 441 nvme_log_error(req); 442 } 443 nvme_end_req_zoned(req); 444 nvme_trace_bio_complete(req); 445 if (req->cmd_flags & REQ_NVME_MPATH) 446 nvme_mpath_end_request(req); 447 } 448 449 void nvme_end_req(struct request *req) 450 { 451 blk_status_t status = nvme_error_status(nvme_req(req)->status); 452 453 __nvme_end_req(req); 454 blk_mq_end_request(req, status); 455 } 456 457 void nvme_complete_rq(struct request *req) 458 { 459 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 460 461 trace_nvme_complete_rq(req); 462 nvme_cleanup_cmd(req); 463 464 /* 465 * Completions of long-running commands should not be able to 466 * defer sending of periodic keep alives, since the controller 467 * may have completed processing such commands a long time ago 468 * (arbitrarily close to command submission time). 469 * req->deadline - req->timeout is the command submission time 470 * in jiffies. 471 */ 472 if (ctrl->kas && 473 req->deadline - req->timeout >= ctrl->ka_last_check_time) 474 ctrl->comp_seen = true; 475 476 switch (nvme_decide_disposition(req)) { 477 case COMPLETE: 478 nvme_end_req(req); 479 return; 480 case RETRY: 481 nvme_retry_req(req); 482 return; 483 case FAILOVER: 484 nvme_failover_req(req); 485 return; 486 case AUTHENTICATE: 487 #ifdef CONFIG_NVME_HOST_AUTH 488 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 489 nvme_retry_req(req); 490 #else 491 nvme_end_req(req); 492 #endif 493 return; 494 } 495 } 496 EXPORT_SYMBOL_GPL(nvme_complete_rq); 497 498 void nvme_complete_batch_req(struct request *req) 499 { 500 trace_nvme_complete_rq(req); 501 nvme_cleanup_cmd(req); 502 __nvme_end_req(req); 503 } 504 EXPORT_SYMBOL_GPL(nvme_complete_batch_req); 505 506 /* 507 * Called to unwind from ->queue_rq on a failed command submission so that the 508 * multipathing code gets called to potentially failover to another path. 509 * The caller needs to unwind all transport specific resource allocations and 510 * must return propagate the return value. 511 */ 512 blk_status_t nvme_host_path_error(struct request *req) 513 { 514 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR; 515 blk_mq_set_request_complete(req); 516 nvme_complete_rq(req); 517 return BLK_STS_OK; 518 } 519 EXPORT_SYMBOL_GPL(nvme_host_path_error); 520 521 bool nvme_cancel_request(struct request *req, void *data) 522 { 523 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 524 "Cancelling I/O %d", req->tag); 525 526 /* don't abort one completed or idle request */ 527 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT) 528 return true; 529 530 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD; 531 nvme_req(req)->flags |= NVME_REQ_CANCELLED; 532 blk_mq_complete_request(req); 533 return true; 534 } 535 EXPORT_SYMBOL_GPL(nvme_cancel_request); 536 537 void nvme_cancel_tagset(struct nvme_ctrl *ctrl) 538 { 539 if (ctrl->tagset) { 540 blk_mq_tagset_busy_iter(ctrl->tagset, 541 nvme_cancel_request, ctrl); 542 blk_mq_tagset_wait_completed_request(ctrl->tagset); 543 } 544 } 545 EXPORT_SYMBOL_GPL(nvme_cancel_tagset); 546 547 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl) 548 { 549 if (ctrl->admin_tagset) { 550 blk_mq_tagset_busy_iter(ctrl->admin_tagset, 551 nvme_cancel_request, ctrl); 552 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset); 553 } 554 } 555 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset); 556 557 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 558 enum nvme_ctrl_state new_state) 559 { 560 enum nvme_ctrl_state old_state; 561 unsigned long flags; 562 bool changed = false; 563 564 spin_lock_irqsave(&ctrl->lock, flags); 565 566 old_state = nvme_ctrl_state(ctrl); 567 switch (new_state) { 568 case NVME_CTRL_LIVE: 569 switch (old_state) { 570 case NVME_CTRL_CONNECTING: 571 changed = true; 572 fallthrough; 573 default: 574 break; 575 } 576 break; 577 case NVME_CTRL_RESETTING: 578 switch (old_state) { 579 case NVME_CTRL_NEW: 580 case NVME_CTRL_LIVE: 581 changed = true; 582 fallthrough; 583 default: 584 break; 585 } 586 break; 587 case NVME_CTRL_CONNECTING: 588 switch (old_state) { 589 case NVME_CTRL_NEW: 590 case NVME_CTRL_RESETTING: 591 changed = true; 592 fallthrough; 593 default: 594 break; 595 } 596 break; 597 case NVME_CTRL_DELETING: 598 switch (old_state) { 599 case NVME_CTRL_LIVE: 600 case NVME_CTRL_RESETTING: 601 case NVME_CTRL_CONNECTING: 602 changed = true; 603 fallthrough; 604 default: 605 break; 606 } 607 break; 608 case NVME_CTRL_DELETING_NOIO: 609 switch (old_state) { 610 case NVME_CTRL_DELETING: 611 case NVME_CTRL_DEAD: 612 changed = true; 613 fallthrough; 614 default: 615 break; 616 } 617 break; 618 case NVME_CTRL_DEAD: 619 switch (old_state) { 620 case NVME_CTRL_DELETING: 621 changed = true; 622 fallthrough; 623 default: 624 break; 625 } 626 break; 627 default: 628 break; 629 } 630 631 if (changed) { 632 WRITE_ONCE(ctrl->state, new_state); 633 wake_up_all(&ctrl->state_wq); 634 } 635 636 spin_unlock_irqrestore(&ctrl->lock, flags); 637 if (!changed) 638 return false; 639 640 if (new_state == NVME_CTRL_LIVE) { 641 if (old_state == NVME_CTRL_CONNECTING) 642 nvme_stop_failfast_work(ctrl); 643 nvme_kick_requeue_lists(ctrl); 644 } else if (new_state == NVME_CTRL_CONNECTING && 645 old_state == NVME_CTRL_RESETTING) { 646 nvme_start_failfast_work(ctrl); 647 } 648 return changed; 649 } 650 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 651 652 /* 653 * Waits for the controller state to be resetting, or returns false if it is 654 * not possible to ever transition to that state. 655 */ 656 bool nvme_wait_reset(struct nvme_ctrl *ctrl) 657 { 658 wait_event(ctrl->state_wq, 659 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) || 660 nvme_state_terminal(ctrl)); 661 return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING; 662 } 663 EXPORT_SYMBOL_GPL(nvme_wait_reset); 664 665 static void nvme_free_ns_head(struct kref *ref) 666 { 667 struct nvme_ns_head *head = 668 container_of(ref, struct nvme_ns_head, ref); 669 670 nvme_mpath_put_disk(head); 671 ida_free(&head->subsys->ns_ida, head->instance); 672 cleanup_srcu_struct(&head->srcu); 673 nvme_put_subsystem(head->subsys); 674 kfree(head->plids); 675 kfree(head); 676 } 677 678 bool nvme_tryget_ns_head(struct nvme_ns_head *head) 679 { 680 return kref_get_unless_zero(&head->ref); 681 } 682 683 void nvme_put_ns_head(struct nvme_ns_head *head) 684 { 685 kref_put(&head->ref, nvme_free_ns_head); 686 } 687 688 static void nvme_free_ns(struct kref *kref) 689 { 690 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 691 692 put_disk(ns->disk); 693 nvme_put_ns_head(ns->head); 694 nvme_put_ctrl(ns->ctrl); 695 kfree(ns); 696 } 697 698 bool nvme_get_ns(struct nvme_ns *ns) 699 { 700 return kref_get_unless_zero(&ns->kref); 701 } 702 703 void nvme_put_ns(struct nvme_ns *ns) 704 { 705 kref_put(&ns->kref, nvme_free_ns); 706 } 707 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, "NVME_TARGET_PASSTHRU"); 708 709 static inline void nvme_clear_nvme_request(struct request *req) 710 { 711 nvme_req(req)->status = 0; 712 nvme_req(req)->retries = 0; 713 nvme_req(req)->flags = 0; 714 req->rq_flags |= RQF_DONTPREP; 715 } 716 717 /* initialize a passthrough request */ 718 void nvme_init_request(struct request *req, struct nvme_command *cmd) 719 { 720 struct nvme_request *nr = nvme_req(req); 721 bool logging_enabled; 722 723 if (req->q->queuedata) { 724 struct nvme_ns *ns = req->q->disk->private_data; 725 726 logging_enabled = ns->head->passthru_err_log_enabled; 727 req->timeout = NVME_IO_TIMEOUT; 728 } else { /* no queuedata implies admin queue */ 729 logging_enabled = nr->ctrl->passthru_err_log_enabled; 730 req->timeout = NVME_ADMIN_TIMEOUT; 731 } 732 733 if (!logging_enabled) 734 req->rq_flags |= RQF_QUIET; 735 736 /* passthru commands should let the driver set the SGL flags */ 737 cmd->common.flags &= ~NVME_CMD_SGL_ALL; 738 739 req->cmd_flags |= REQ_FAILFAST_DRIVER; 740 if (req->mq_hctx->type == HCTX_TYPE_POLL) 741 req->cmd_flags |= REQ_POLLED; 742 nvme_clear_nvme_request(req); 743 memcpy(nr->cmd, cmd, sizeof(*cmd)); 744 } 745 EXPORT_SYMBOL_GPL(nvme_init_request); 746 747 /* 748 * For something we're not in a state to send to the device the default action 749 * is to busy it and retry it after the controller state is recovered. However, 750 * if the controller is deleting or if anything is marked for failfast or 751 * nvme multipath it is immediately failed. 752 * 753 * Note: commands used to initialize the controller will be marked for failfast. 754 * Note: nvme cli/ioctl commands are marked for failfast. 755 */ 756 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 757 struct request *rq) 758 { 759 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 760 761 if (state != NVME_CTRL_DELETING_NOIO && 762 state != NVME_CTRL_DELETING && 763 state != NVME_CTRL_DEAD && 764 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) && 765 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH)) 766 return BLK_STS_RESOURCE; 767 768 if (!(rq->rq_flags & RQF_DONTPREP)) 769 nvme_clear_nvme_request(rq); 770 771 return nvme_host_path_error(rq); 772 } 773 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command); 774 775 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 776 bool queue_live, enum nvme_ctrl_state state) 777 { 778 struct nvme_request *req = nvme_req(rq); 779 780 /* 781 * currently we have a problem sending passthru commands 782 * on the admin_q if the controller is not LIVE because we can't 783 * make sure that they are going out after the admin connect, 784 * controller enable and/or other commands in the initialization 785 * sequence. until the controller will be LIVE, fail with 786 * BLK_STS_RESOURCE so that they will be rescheduled. 787 */ 788 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD)) 789 return false; 790 791 if (ctrl->ops->flags & NVME_F_FABRICS) { 792 /* 793 * Only allow commands on a live queue, except for the connect 794 * command, which is require to set the queue live in the 795 * appropinquate states. 796 */ 797 switch (state) { 798 case NVME_CTRL_CONNECTING: 799 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) && 800 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect || 801 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send || 802 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive)) 803 return true; 804 break; 805 default: 806 break; 807 case NVME_CTRL_DEAD: 808 return false; 809 } 810 } 811 812 return queue_live; 813 } 814 EXPORT_SYMBOL_GPL(__nvme_check_ready); 815 816 static inline void nvme_setup_flush(struct nvme_ns *ns, 817 struct nvme_command *cmnd) 818 { 819 memset(cmnd, 0, sizeof(*cmnd)); 820 cmnd->common.opcode = nvme_cmd_flush; 821 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 822 } 823 824 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 825 struct nvme_command *cmnd) 826 { 827 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 828 struct nvme_dsm_range *range; 829 struct bio *bio; 830 831 /* 832 * Some devices do not consider the DSM 'Number of Ranges' field when 833 * determining how much data to DMA. Always allocate memory for maximum 834 * number of segments to prevent device reading beyond end of buffer. 835 */ 836 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES; 837 838 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN); 839 if (!range) { 840 /* 841 * If we fail allocation our range, fallback to the controller 842 * discard page. If that's also busy, it's safe to return 843 * busy, as we know we can make progress once that's freed. 844 */ 845 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 846 return BLK_STS_RESOURCE; 847 848 range = page_address(ns->ctrl->discard_page); 849 } 850 851 if (queue_max_discard_segments(req->q) == 1) { 852 u64 slba = nvme_sect_to_lba(ns->head, blk_rq_pos(req)); 853 u32 nlb = blk_rq_sectors(req) >> (ns->head->lba_shift - 9); 854 855 range[0].cattr = cpu_to_le32(0); 856 range[0].nlb = cpu_to_le32(nlb); 857 range[0].slba = cpu_to_le64(slba); 858 n = 1; 859 } else { 860 __rq_for_each_bio(bio, req) { 861 u64 slba = nvme_sect_to_lba(ns->head, 862 bio->bi_iter.bi_sector); 863 u32 nlb = bio->bi_iter.bi_size >> ns->head->lba_shift; 864 865 if (n < segments) { 866 range[n].cattr = cpu_to_le32(0); 867 range[n].nlb = cpu_to_le32(nlb); 868 range[n].slba = cpu_to_le64(slba); 869 } 870 n++; 871 } 872 } 873 874 if (WARN_ON_ONCE(n != segments)) { 875 if (virt_to_page(range) == ns->ctrl->discard_page) 876 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 877 else 878 kfree(range); 879 return BLK_STS_IOERR; 880 } 881 882 memset(cmnd, 0, sizeof(*cmnd)); 883 cmnd->dsm.opcode = nvme_cmd_dsm; 884 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 885 cmnd->dsm.nr = cpu_to_le32(segments - 1); 886 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 887 888 bvec_set_virt(&req->special_vec, range, alloc_size); 889 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 890 891 return BLK_STS_OK; 892 } 893 894 static void nvme_set_app_tag(struct request *req, struct nvme_command *cmnd) 895 { 896 cmnd->rw.lbat = cpu_to_le16(bio_integrity(req->bio)->app_tag); 897 cmnd->rw.lbatm = cpu_to_le16(0xffff); 898 } 899 900 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd, 901 struct request *req) 902 { 903 u32 upper, lower; 904 u64 ref48; 905 906 /* both rw and write zeroes share the same reftag format */ 907 switch (ns->head->guard_type) { 908 case NVME_NVM_NS_16B_GUARD: 909 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 910 break; 911 case NVME_NVM_NS_64B_GUARD: 912 ref48 = ext_pi_ref_tag(req); 913 lower = lower_32_bits(ref48); 914 upper = upper_32_bits(ref48); 915 916 cmnd->rw.reftag = cpu_to_le32(lower); 917 cmnd->rw.cdw3 = cpu_to_le32(upper); 918 break; 919 default: 920 break; 921 } 922 } 923 924 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns, 925 struct request *req, struct nvme_command *cmnd) 926 { 927 memset(cmnd, 0, sizeof(*cmnd)); 928 929 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 930 return nvme_setup_discard(ns, req, cmnd); 931 932 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes; 933 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id); 934 cmnd->write_zeroes.slba = 935 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req))); 936 cmnd->write_zeroes.length = 937 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1); 938 939 if (!(req->cmd_flags & REQ_NOUNMAP) && 940 (ns->head->features & NVME_NS_DEAC)) 941 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC); 942 943 if (nvme_ns_has_pi(ns->head)) { 944 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT); 945 946 switch (ns->head->pi_type) { 947 case NVME_NS_DPS_PI_TYPE1: 948 case NVME_NS_DPS_PI_TYPE2: 949 nvme_set_ref_tag(ns, cmnd, req); 950 break; 951 } 952 } 953 954 return BLK_STS_OK; 955 } 956 957 /* 958 * NVMe does not support a dedicated command to issue an atomic write. A write 959 * which does adhere to the device atomic limits will silently be executed 960 * non-atomically. The request issuer should ensure that the write is within 961 * the queue atomic writes limits, but just validate this in case it is not. 962 */ 963 static bool nvme_valid_atomic_write(struct request *req) 964 { 965 struct request_queue *q = req->q; 966 u32 boundary_bytes = queue_atomic_write_boundary_bytes(q); 967 968 if (blk_rq_bytes(req) > queue_atomic_write_unit_max_bytes(q)) 969 return false; 970 971 if (boundary_bytes) { 972 u64 mask = boundary_bytes - 1, imask = ~mask; 973 u64 start = blk_rq_pos(req) << SECTOR_SHIFT; 974 u64 end = start + blk_rq_bytes(req) - 1; 975 976 /* If greater then must be crossing a boundary */ 977 if (blk_rq_bytes(req) > boundary_bytes) 978 return false; 979 980 if ((start & imask) != (end & imask)) 981 return false; 982 } 983 984 return true; 985 } 986 987 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 988 struct request *req, struct nvme_command *cmnd, 989 enum nvme_opcode op) 990 { 991 u16 control = 0; 992 u32 dsmgmt = 0; 993 994 if (req->cmd_flags & REQ_FUA) 995 control |= NVME_RW_FUA; 996 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 997 control |= NVME_RW_LR; 998 999 if (req->cmd_flags & REQ_RAHEAD) 1000 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 1001 1002 if (op == nvme_cmd_write && ns->head->nr_plids) { 1003 u16 write_stream = req->bio->bi_write_stream; 1004 1005 if (WARN_ON_ONCE(write_stream > ns->head->nr_plids)) 1006 return BLK_STS_INVAL; 1007 1008 if (write_stream) { 1009 dsmgmt |= ns->head->plids[write_stream - 1] << 16; 1010 control |= NVME_RW_DTYPE_DPLCMT; 1011 } 1012 } 1013 1014 if (req->cmd_flags & REQ_ATOMIC && !nvme_valid_atomic_write(req)) 1015 return BLK_STS_INVAL; 1016 1017 cmnd->rw.opcode = op; 1018 cmnd->rw.flags = 0; 1019 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 1020 cmnd->rw.cdw2 = 0; 1021 cmnd->rw.cdw3 = 0; 1022 cmnd->rw.metadata = 0; 1023 cmnd->rw.slba = 1024 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req))); 1025 cmnd->rw.length = 1026 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1); 1027 cmnd->rw.reftag = 0; 1028 cmnd->rw.lbat = 0; 1029 cmnd->rw.lbatm = 0; 1030 1031 if (ns->head->ms) { 1032 /* 1033 * If formatted with metadata, the block layer always provides a 1034 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 1035 * we enable the PRACT bit for protection information or set the 1036 * namespace capacity to zero to prevent any I/O. 1037 */ 1038 if (!blk_integrity_rq(req)) { 1039 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns->head))) 1040 return BLK_STS_NOTSUPP; 1041 control |= NVME_RW_PRINFO_PRACT; 1042 } 1043 1044 if (bio_integrity_flagged(req->bio, BIP_CHECK_GUARD)) 1045 control |= NVME_RW_PRINFO_PRCHK_GUARD; 1046 if (bio_integrity_flagged(req->bio, BIP_CHECK_REFTAG)) { 1047 control |= NVME_RW_PRINFO_PRCHK_REF; 1048 if (op == nvme_cmd_zone_append) 1049 control |= NVME_RW_APPEND_PIREMAP; 1050 nvme_set_ref_tag(ns, cmnd, req); 1051 } 1052 if (bio_integrity_flagged(req->bio, BIP_CHECK_APPTAG)) { 1053 control |= NVME_RW_PRINFO_PRCHK_APP; 1054 nvme_set_app_tag(req, cmnd); 1055 } 1056 } 1057 1058 cmnd->rw.control = cpu_to_le16(control); 1059 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 1060 return 0; 1061 } 1062 1063 void nvme_cleanup_cmd(struct request *req) 1064 { 1065 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 1066 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 1067 1068 if (req->special_vec.bv_page == ctrl->discard_page) 1069 clear_bit_unlock(0, &ctrl->discard_page_busy); 1070 else 1071 kfree(bvec_virt(&req->special_vec)); 1072 req->rq_flags &= ~RQF_SPECIAL_PAYLOAD; 1073 } 1074 } 1075 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 1076 1077 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req) 1078 { 1079 struct nvme_command *cmd = nvme_req(req)->cmd; 1080 blk_status_t ret = BLK_STS_OK; 1081 1082 if (!(req->rq_flags & RQF_DONTPREP)) 1083 nvme_clear_nvme_request(req); 1084 1085 switch (req_op(req)) { 1086 case REQ_OP_DRV_IN: 1087 case REQ_OP_DRV_OUT: 1088 /* these are setup prior to execution in nvme_init_request() */ 1089 break; 1090 case REQ_OP_FLUSH: 1091 nvme_setup_flush(ns, cmd); 1092 break; 1093 case REQ_OP_ZONE_RESET_ALL: 1094 case REQ_OP_ZONE_RESET: 1095 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET); 1096 break; 1097 case REQ_OP_ZONE_OPEN: 1098 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN); 1099 break; 1100 case REQ_OP_ZONE_CLOSE: 1101 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE); 1102 break; 1103 case REQ_OP_ZONE_FINISH: 1104 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH); 1105 break; 1106 case REQ_OP_WRITE_ZEROES: 1107 ret = nvme_setup_write_zeroes(ns, req, cmd); 1108 break; 1109 case REQ_OP_DISCARD: 1110 ret = nvme_setup_discard(ns, req, cmd); 1111 break; 1112 case REQ_OP_READ: 1113 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read); 1114 break; 1115 case REQ_OP_WRITE: 1116 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write); 1117 break; 1118 case REQ_OP_ZONE_APPEND: 1119 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append); 1120 break; 1121 default: 1122 WARN_ON_ONCE(1); 1123 return BLK_STS_IOERR; 1124 } 1125 1126 cmd->common.command_id = nvme_cid(req); 1127 trace_nvme_setup_cmd(req, cmd); 1128 return ret; 1129 } 1130 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 1131 1132 /* 1133 * Return values: 1134 * 0: success 1135 * >0: nvme controller's cqe status response 1136 * <0: kernel error in lieu of controller response 1137 */ 1138 int nvme_execute_rq(struct request *rq, bool at_head) 1139 { 1140 blk_status_t status; 1141 1142 status = blk_execute_rq(rq, at_head); 1143 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED) 1144 return -EINTR; 1145 if (nvme_req(rq)->status) 1146 return nvme_req(rq)->status; 1147 return blk_status_to_errno(status); 1148 } 1149 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, "NVME_TARGET_PASSTHRU"); 1150 1151 /* 1152 * Returns 0 on success. If the result is negative, it's a Linux error code; 1153 * if the result is positive, it's an NVM Express status code 1154 */ 1155 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1156 union nvme_result *result, void *buffer, unsigned bufflen, 1157 int qid, nvme_submit_flags_t flags) 1158 { 1159 struct request *req; 1160 int ret; 1161 blk_mq_req_flags_t blk_flags = 0; 1162 1163 if (flags & NVME_SUBMIT_NOWAIT) 1164 blk_flags |= BLK_MQ_REQ_NOWAIT; 1165 if (flags & NVME_SUBMIT_RESERVED) 1166 blk_flags |= BLK_MQ_REQ_RESERVED; 1167 if (qid == NVME_QID_ANY) 1168 req = blk_mq_alloc_request(q, nvme_req_op(cmd), blk_flags); 1169 else 1170 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), blk_flags, 1171 qid - 1); 1172 1173 if (IS_ERR(req)) 1174 return PTR_ERR(req); 1175 nvme_init_request(req, cmd); 1176 if (flags & NVME_SUBMIT_RETRY) 1177 req->cmd_flags &= ~REQ_FAILFAST_DRIVER; 1178 1179 if (buffer && bufflen) { 1180 ret = blk_rq_map_kern(req, buffer, bufflen, GFP_KERNEL); 1181 if (ret) 1182 goto out; 1183 } 1184 1185 ret = nvme_execute_rq(req, flags & NVME_SUBMIT_AT_HEAD); 1186 if (result && ret >= 0) 1187 *result = nvme_req(req)->result; 1188 out: 1189 blk_mq_free_request(req); 1190 return ret; 1191 } 1192 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 1193 1194 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1195 void *buffer, unsigned bufflen) 1196 { 1197 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 1198 NVME_QID_ANY, 0); 1199 } 1200 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 1201 1202 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1203 { 1204 u32 effects = 0; 1205 1206 if (ns) { 1207 effects = le32_to_cpu(ns->head->effects->iocs[opcode]); 1208 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC)) 1209 dev_warn_once(ctrl->device, 1210 "IO command:%02x has unusual effects:%08x\n", 1211 opcode, effects); 1212 1213 /* 1214 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues, 1215 * which would deadlock when done on an I/O command. Note that 1216 * We already warn about an unusual effect above. 1217 */ 1218 effects &= ~NVME_CMD_EFFECTS_CSE_MASK; 1219 } else { 1220 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1221 1222 /* Ignore execution restrictions if any relaxation bits are set */ 1223 if (effects & NVME_CMD_EFFECTS_CSER_MASK) 1224 effects &= ~NVME_CMD_EFFECTS_CSE_MASK; 1225 } 1226 1227 return effects; 1228 } 1229 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, "NVME_TARGET_PASSTHRU"); 1230 1231 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1232 { 1233 u32 effects = nvme_command_effects(ctrl, ns, opcode); 1234 1235 /* 1236 * For simplicity, IO to all namespaces is quiesced even if the command 1237 * effects say only one namespace is affected. 1238 */ 1239 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1240 mutex_lock(&ctrl->scan_lock); 1241 mutex_lock(&ctrl->subsys->lock); 1242 nvme_mpath_start_freeze(ctrl->subsys); 1243 nvme_mpath_wait_freeze(ctrl->subsys); 1244 nvme_start_freeze(ctrl); 1245 nvme_wait_freeze(ctrl); 1246 } 1247 return effects; 1248 } 1249 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, "NVME_TARGET_PASSTHRU"); 1250 1251 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1252 struct nvme_command *cmd, int status) 1253 { 1254 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1255 nvme_unfreeze(ctrl); 1256 nvme_mpath_unfreeze(ctrl->subsys); 1257 mutex_unlock(&ctrl->subsys->lock); 1258 mutex_unlock(&ctrl->scan_lock); 1259 } 1260 if (effects & NVME_CMD_EFFECTS_CCC) { 1261 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY, 1262 &ctrl->flags)) { 1263 dev_info(ctrl->device, 1264 "controller capabilities changed, reset may be required to take effect.\n"); 1265 } 1266 } 1267 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) { 1268 nvme_queue_scan(ctrl); 1269 flush_work(&ctrl->scan_work); 1270 } 1271 if (ns) 1272 return; 1273 1274 switch (cmd->common.opcode) { 1275 case nvme_admin_set_features: 1276 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) { 1277 case NVME_FEAT_KATO: 1278 /* 1279 * Keep alive commands interval on the host should be 1280 * updated when KATO is modified by Set Features 1281 * commands. 1282 */ 1283 if (!status) 1284 nvme_update_keep_alive(ctrl, cmd); 1285 break; 1286 default: 1287 break; 1288 } 1289 break; 1290 default: 1291 break; 1292 } 1293 } 1294 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, "NVME_TARGET_PASSTHRU"); 1295 1296 /* 1297 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1: 1298 * 1299 * The host should send Keep Alive commands at half of the Keep Alive Timeout 1300 * accounting for transport roundtrip times [..]. 1301 */ 1302 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl) 1303 { 1304 unsigned long delay = ctrl->kato * HZ / 2; 1305 1306 /* 1307 * When using Traffic Based Keep Alive, we need to run 1308 * nvme_keep_alive_work at twice the normal frequency, as one 1309 * command completion can postpone sending a keep alive command 1310 * by up to twice the delay between runs. 1311 */ 1312 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) 1313 delay /= 2; 1314 return delay; 1315 } 1316 1317 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl) 1318 { 1319 unsigned long now = jiffies; 1320 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1321 unsigned long ka_next_check_tm = ctrl->ka_last_check_time + delay; 1322 1323 if (time_after(now, ka_next_check_tm)) 1324 delay = 0; 1325 else 1326 delay = ka_next_check_tm - now; 1327 1328 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1329 } 1330 1331 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq, 1332 blk_status_t status) 1333 { 1334 struct nvme_ctrl *ctrl = rq->end_io_data; 1335 unsigned long rtt = jiffies - (rq->deadline - rq->timeout); 1336 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1337 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 1338 1339 /* 1340 * Subtract off the keepalive RTT so nvme_keep_alive_work runs 1341 * at the desired frequency. 1342 */ 1343 if (rtt <= delay) { 1344 delay -= rtt; 1345 } else { 1346 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n", 1347 jiffies_to_msecs(rtt)); 1348 delay = 0; 1349 } 1350 1351 blk_mq_free_request(rq); 1352 1353 if (status) { 1354 dev_err(ctrl->device, 1355 "failed nvme_keep_alive_end_io error=%d\n", 1356 status); 1357 return RQ_END_IO_NONE; 1358 } 1359 1360 ctrl->ka_last_check_time = jiffies; 1361 ctrl->comp_seen = false; 1362 if (state == NVME_CTRL_LIVE || state == NVME_CTRL_CONNECTING) 1363 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1364 return RQ_END_IO_NONE; 1365 } 1366 1367 static void nvme_keep_alive_work(struct work_struct *work) 1368 { 1369 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 1370 struct nvme_ctrl, ka_work); 1371 bool comp_seen = ctrl->comp_seen; 1372 struct request *rq; 1373 1374 ctrl->ka_last_check_time = jiffies; 1375 1376 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 1377 dev_dbg(ctrl->device, 1378 "reschedule traffic based keep-alive timer\n"); 1379 ctrl->comp_seen = false; 1380 nvme_queue_keep_alive_work(ctrl); 1381 return; 1382 } 1383 1384 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd), 1385 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT); 1386 if (IS_ERR(rq)) { 1387 /* allocation failure, reset the controller */ 1388 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq)); 1389 nvme_reset_ctrl(ctrl); 1390 return; 1391 } 1392 nvme_init_request(rq, &ctrl->ka_cmd); 1393 1394 rq->timeout = ctrl->kato * HZ; 1395 rq->end_io = nvme_keep_alive_end_io; 1396 rq->end_io_data = ctrl; 1397 blk_execute_rq_nowait(rq, false); 1398 } 1399 1400 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 1401 { 1402 if (unlikely(ctrl->kato == 0)) 1403 return; 1404 1405 nvme_queue_keep_alive_work(ctrl); 1406 } 1407 1408 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 1409 { 1410 if (unlikely(ctrl->kato == 0)) 1411 return; 1412 1413 cancel_delayed_work_sync(&ctrl->ka_work); 1414 } 1415 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 1416 1417 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 1418 struct nvme_command *cmd) 1419 { 1420 unsigned int new_kato = 1421 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000); 1422 1423 dev_info(ctrl->device, 1424 "keep alive interval updated from %u ms to %u ms\n", 1425 ctrl->kato * 1000 / 2, new_kato * 1000 / 2); 1426 1427 nvme_stop_keep_alive(ctrl); 1428 ctrl->kato = new_kato; 1429 nvme_start_keep_alive(ctrl); 1430 } 1431 1432 static bool nvme_id_cns_ok(struct nvme_ctrl *ctrl, u8 cns) 1433 { 1434 /* 1435 * The CNS field occupies a full byte starting with NVMe 1.2 1436 */ 1437 if (ctrl->vs >= NVME_VS(1, 2, 0)) 1438 return true; 1439 1440 /* 1441 * NVMe 1.1 expanded the CNS value to two bits, which means values 1442 * larger than that could get truncated and treated as an incorrect 1443 * value. 1444 * 1445 * Qemu implemented 1.0 behavior for controllers claiming 1.1 1446 * compliance, so they need to be quirked here. 1447 */ 1448 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1449 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) 1450 return cns <= 3; 1451 1452 /* 1453 * NVMe 1.0 used a single bit for the CNS value. 1454 */ 1455 return cns <= 1; 1456 } 1457 1458 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 1459 { 1460 struct nvme_command c = { }; 1461 int error; 1462 1463 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1464 c.identify.opcode = nvme_admin_identify; 1465 c.identify.cns = NVME_ID_CNS_CTRL; 1466 1467 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 1468 if (!*id) 1469 return -ENOMEM; 1470 1471 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 1472 sizeof(struct nvme_id_ctrl)); 1473 if (error) { 1474 kfree(*id); 1475 *id = NULL; 1476 } 1477 return error; 1478 } 1479 1480 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, 1481 struct nvme_ns_id_desc *cur, bool *csi_seen) 1482 { 1483 const char *warn_str = "ctrl returned bogus length:"; 1484 void *data = cur; 1485 1486 switch (cur->nidt) { 1487 case NVME_NIDT_EUI64: 1488 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1489 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n", 1490 warn_str, cur->nidl); 1491 return -1; 1492 } 1493 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1494 return NVME_NIDT_EUI64_LEN; 1495 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN); 1496 return NVME_NIDT_EUI64_LEN; 1497 case NVME_NIDT_NGUID: 1498 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1499 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n", 1500 warn_str, cur->nidl); 1501 return -1; 1502 } 1503 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1504 return NVME_NIDT_NGUID_LEN; 1505 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN); 1506 return NVME_NIDT_NGUID_LEN; 1507 case NVME_NIDT_UUID: 1508 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1509 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n", 1510 warn_str, cur->nidl); 1511 return -1; 1512 } 1513 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1514 return NVME_NIDT_UUID_LEN; 1515 uuid_copy(&ids->uuid, data + sizeof(*cur)); 1516 return NVME_NIDT_UUID_LEN; 1517 case NVME_NIDT_CSI: 1518 if (cur->nidl != NVME_NIDT_CSI_LEN) { 1519 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n", 1520 warn_str, cur->nidl); 1521 return -1; 1522 } 1523 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN); 1524 *csi_seen = true; 1525 return NVME_NIDT_CSI_LEN; 1526 default: 1527 /* Skip unknown types */ 1528 return cur->nidl; 1529 } 1530 } 1531 1532 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, 1533 struct nvme_ns_info *info) 1534 { 1535 struct nvme_command c = { }; 1536 bool csi_seen = false; 1537 int status, pos, len; 1538 void *data; 1539 1540 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl)) 1541 return 0; 1542 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST) 1543 return 0; 1544 1545 c.identify.opcode = nvme_admin_identify; 1546 c.identify.nsid = cpu_to_le32(info->nsid); 1547 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1548 1549 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1550 if (!data) 1551 return -ENOMEM; 1552 1553 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1554 NVME_IDENTIFY_DATA_SIZE); 1555 if (status) { 1556 dev_warn(ctrl->device, 1557 "Identify Descriptors failed (nsid=%u, status=0x%x)\n", 1558 info->nsid, status); 1559 goto free_data; 1560 } 1561 1562 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1563 struct nvme_ns_id_desc *cur = data + pos; 1564 1565 if (cur->nidl == 0) 1566 break; 1567 1568 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen); 1569 if (len < 0) 1570 break; 1571 1572 len += sizeof(*cur); 1573 } 1574 1575 if (nvme_multi_css(ctrl) && !csi_seen) { 1576 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n", 1577 info->nsid); 1578 status = -EINVAL; 1579 } 1580 1581 free_data: 1582 kfree(data); 1583 return status; 1584 } 1585 1586 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1587 struct nvme_id_ns **id) 1588 { 1589 struct nvme_command c = { }; 1590 int error; 1591 1592 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1593 c.identify.opcode = nvme_admin_identify; 1594 c.identify.nsid = cpu_to_le32(nsid); 1595 c.identify.cns = NVME_ID_CNS_NS; 1596 1597 *id = kmalloc(sizeof(**id), GFP_KERNEL); 1598 if (!*id) 1599 return -ENOMEM; 1600 1601 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id)); 1602 if (error) { 1603 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error); 1604 kfree(*id); 1605 *id = NULL; 1606 } 1607 return error; 1608 } 1609 1610 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl, 1611 struct nvme_ns_info *info) 1612 { 1613 struct nvme_ns_ids *ids = &info->ids; 1614 struct nvme_id_ns *id; 1615 int ret; 1616 1617 ret = nvme_identify_ns(ctrl, info->nsid, &id); 1618 if (ret) 1619 return ret; 1620 1621 if (id->ncap == 0) { 1622 /* namespace not allocated or attached */ 1623 info->is_removed = true; 1624 ret = -ENODEV; 1625 goto error; 1626 } 1627 1628 info->anagrpid = id->anagrpid; 1629 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1630 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1631 info->is_ready = true; 1632 info->endgid = le16_to_cpu(id->endgid); 1633 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) { 1634 dev_info(ctrl->device, 1635 "Ignoring bogus Namespace Identifiers\n"); 1636 } else { 1637 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1638 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 1639 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64)); 1640 if (ctrl->vs >= NVME_VS(1, 2, 0) && 1641 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 1642 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid)); 1643 } 1644 1645 error: 1646 kfree(id); 1647 return ret; 1648 } 1649 1650 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl, 1651 struct nvme_ns_info *info) 1652 { 1653 struct nvme_id_ns_cs_indep *id; 1654 struct nvme_command c = { 1655 .identify.opcode = nvme_admin_identify, 1656 .identify.nsid = cpu_to_le32(info->nsid), 1657 .identify.cns = NVME_ID_CNS_NS_CS_INDEP, 1658 }; 1659 int ret; 1660 1661 id = kmalloc(sizeof(*id), GFP_KERNEL); 1662 if (!id) 1663 return -ENOMEM; 1664 1665 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 1666 if (!ret) { 1667 info->anagrpid = id->anagrpid; 1668 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1669 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1670 info->is_ready = id->nstat & NVME_NSTAT_NRDY; 1671 info->is_rotational = id->nsfeat & NVME_NS_ROTATIONAL; 1672 info->no_vwc = id->nsfeat & NVME_NS_VWC_NOT_PRESENT; 1673 info->endgid = le16_to_cpu(id->endgid); 1674 } 1675 kfree(id); 1676 return ret; 1677 } 1678 1679 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, 1680 unsigned int dword11, void *buffer, size_t buflen, u32 *result) 1681 { 1682 union nvme_result res = { 0 }; 1683 struct nvme_command c = { }; 1684 int ret; 1685 1686 c.features.opcode = op; 1687 c.features.fid = cpu_to_le32(fid); 1688 c.features.dword11 = cpu_to_le32(dword11); 1689 1690 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1691 buffer, buflen, NVME_QID_ANY, 0); 1692 if (ret >= 0 && result) 1693 *result = le32_to_cpu(res.u32); 1694 return ret; 1695 } 1696 1697 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1698 unsigned int dword11, void *buffer, size_t buflen, 1699 void *result) 1700 { 1701 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer, 1702 buflen, result); 1703 } 1704 EXPORT_SYMBOL_GPL(nvme_set_features); 1705 1706 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1707 unsigned int dword11, void *buffer, size_t buflen, 1708 void *result) 1709 { 1710 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer, 1711 buflen, result); 1712 } 1713 EXPORT_SYMBOL_GPL(nvme_get_features); 1714 1715 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1716 { 1717 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1718 u32 result; 1719 int status, nr_io_queues; 1720 1721 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1722 &result); 1723 1724 /* 1725 * It's either a kernel error or the host observed a connection 1726 * lost. In either case it's not possible communicate with the 1727 * controller and thus enter the error code path. 1728 */ 1729 if (status < 0 || status == NVME_SC_HOST_PATH_ERROR) 1730 return status; 1731 1732 /* 1733 * Degraded controllers might return an error when setting the queue 1734 * count. We still want to be able to bring them online and offer 1735 * access to the admin queue, as that might be only way to fix them up. 1736 */ 1737 if (status > 0) { 1738 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1739 *count = 0; 1740 } else { 1741 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1742 *count = min(*count, nr_io_queues); 1743 } 1744 1745 return 0; 1746 } 1747 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1748 1749 #define NVME_AEN_SUPPORTED \ 1750 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ 1751 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) 1752 1753 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1754 { 1755 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1756 int status; 1757 1758 if (!supported_aens) 1759 return; 1760 1761 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1762 NULL, 0, &result); 1763 if (status) 1764 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1765 supported_aens); 1766 1767 queue_work(nvme_wq, &ctrl->async_event_work); 1768 } 1769 1770 static int nvme_ns_open(struct nvme_ns *ns) 1771 { 1772 1773 /* should never be called due to GENHD_FL_HIDDEN */ 1774 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head))) 1775 goto fail; 1776 if (!nvme_get_ns(ns)) 1777 goto fail; 1778 if (!try_module_get(ns->ctrl->ops->module)) 1779 goto fail_put_ns; 1780 1781 return 0; 1782 1783 fail_put_ns: 1784 nvme_put_ns(ns); 1785 fail: 1786 return -ENXIO; 1787 } 1788 1789 static void nvme_ns_release(struct nvme_ns *ns) 1790 { 1791 1792 module_put(ns->ctrl->ops->module); 1793 nvme_put_ns(ns); 1794 } 1795 1796 static int nvme_open(struct gendisk *disk, blk_mode_t mode) 1797 { 1798 return nvme_ns_open(disk->private_data); 1799 } 1800 1801 static void nvme_release(struct gendisk *disk) 1802 { 1803 nvme_ns_release(disk->private_data); 1804 } 1805 1806 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1807 { 1808 /* some standard values */ 1809 geo->heads = 1 << 6; 1810 geo->sectors = 1 << 5; 1811 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1812 return 0; 1813 } 1814 1815 static bool nvme_init_integrity(struct nvme_ns_head *head, 1816 struct queue_limits *lim, struct nvme_ns_info *info) 1817 { 1818 struct blk_integrity *bi = &lim->integrity; 1819 1820 memset(bi, 0, sizeof(*bi)); 1821 1822 if (!head->ms) 1823 return true; 1824 1825 /* 1826 * PI can always be supported as we can ask the controller to simply 1827 * insert/strip it, which is not possible for other kinds of metadata. 1828 */ 1829 if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) || 1830 !(head->features & NVME_NS_METADATA_SUPPORTED)) 1831 return nvme_ns_has_pi(head); 1832 1833 switch (head->pi_type) { 1834 case NVME_NS_DPS_PI_TYPE3: 1835 switch (head->guard_type) { 1836 case NVME_NVM_NS_16B_GUARD: 1837 bi->csum_type = BLK_INTEGRITY_CSUM_CRC; 1838 bi->tag_size = sizeof(u16) + sizeof(u32); 1839 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1840 break; 1841 case NVME_NVM_NS_64B_GUARD: 1842 bi->csum_type = BLK_INTEGRITY_CSUM_CRC64; 1843 bi->tag_size = sizeof(u16) + 6; 1844 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1845 break; 1846 default: 1847 break; 1848 } 1849 break; 1850 case NVME_NS_DPS_PI_TYPE1: 1851 case NVME_NS_DPS_PI_TYPE2: 1852 switch (head->guard_type) { 1853 case NVME_NVM_NS_16B_GUARD: 1854 bi->csum_type = BLK_INTEGRITY_CSUM_CRC; 1855 bi->tag_size = sizeof(u16); 1856 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE | 1857 BLK_INTEGRITY_REF_TAG; 1858 break; 1859 case NVME_NVM_NS_64B_GUARD: 1860 bi->csum_type = BLK_INTEGRITY_CSUM_CRC64; 1861 bi->tag_size = sizeof(u16); 1862 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE | 1863 BLK_INTEGRITY_REF_TAG; 1864 break; 1865 default: 1866 break; 1867 } 1868 break; 1869 default: 1870 break; 1871 } 1872 1873 bi->tuple_size = head->ms; 1874 bi->pi_offset = info->pi_offset; 1875 return true; 1876 } 1877 1878 static void nvme_config_discard(struct nvme_ns *ns, struct queue_limits *lim) 1879 { 1880 struct nvme_ctrl *ctrl = ns->ctrl; 1881 1882 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns->head, UINT_MAX)) 1883 lim->max_hw_discard_sectors = 1884 nvme_lba_to_sect(ns->head, ctrl->dmrsl); 1885 else if (ctrl->oncs & NVME_CTRL_ONCS_DSM) 1886 lim->max_hw_discard_sectors = UINT_MAX; 1887 else 1888 lim->max_hw_discard_sectors = 0; 1889 1890 lim->discard_granularity = lim->logical_block_size; 1891 1892 if (ctrl->dmrl) 1893 lim->max_discard_segments = ctrl->dmrl; 1894 else 1895 lim->max_discard_segments = NVME_DSM_MAX_RANGES; 1896 } 1897 1898 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 1899 { 1900 return uuid_equal(&a->uuid, &b->uuid) && 1901 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 1902 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 && 1903 a->csi == b->csi; 1904 } 1905 1906 static int nvme_identify_ns_nvm(struct nvme_ctrl *ctrl, unsigned int nsid, 1907 struct nvme_id_ns_nvm **nvmp) 1908 { 1909 struct nvme_command c = { 1910 .identify.opcode = nvme_admin_identify, 1911 .identify.nsid = cpu_to_le32(nsid), 1912 .identify.cns = NVME_ID_CNS_CS_NS, 1913 .identify.csi = NVME_CSI_NVM, 1914 }; 1915 struct nvme_id_ns_nvm *nvm; 1916 int ret; 1917 1918 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); 1919 if (!nvm) 1920 return -ENOMEM; 1921 1922 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, nvm, sizeof(*nvm)); 1923 if (ret) 1924 kfree(nvm); 1925 else 1926 *nvmp = nvm; 1927 return ret; 1928 } 1929 1930 static void nvme_configure_pi_elbas(struct nvme_ns_head *head, 1931 struct nvme_id_ns *id, struct nvme_id_ns_nvm *nvm) 1932 { 1933 u32 elbaf = le32_to_cpu(nvm->elbaf[nvme_lbaf_index(id->flbas)]); 1934 u8 guard_type; 1935 1936 /* no support for storage tag formats right now */ 1937 if (nvme_elbaf_sts(elbaf)) 1938 return; 1939 1940 guard_type = nvme_elbaf_guard_type(elbaf); 1941 if ((nvm->pic & NVME_ID_NS_NVM_QPIFS) && 1942 guard_type == NVME_NVM_NS_QTYPE_GUARD) 1943 guard_type = nvme_elbaf_qualified_guard_type(elbaf); 1944 1945 head->guard_type = guard_type; 1946 switch (head->guard_type) { 1947 case NVME_NVM_NS_64B_GUARD: 1948 head->pi_size = sizeof(struct crc64_pi_tuple); 1949 break; 1950 case NVME_NVM_NS_16B_GUARD: 1951 head->pi_size = sizeof(struct t10_pi_tuple); 1952 break; 1953 default: 1954 break; 1955 } 1956 } 1957 1958 static void nvme_configure_metadata(struct nvme_ctrl *ctrl, 1959 struct nvme_ns_head *head, struct nvme_id_ns *id, 1960 struct nvme_id_ns_nvm *nvm, struct nvme_ns_info *info) 1961 { 1962 head->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS); 1963 head->pi_type = 0; 1964 head->pi_size = 0; 1965 head->ms = le16_to_cpu(id->lbaf[nvme_lbaf_index(id->flbas)].ms); 1966 if (!head->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 1967 return; 1968 1969 if (nvm && (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) { 1970 nvme_configure_pi_elbas(head, id, nvm); 1971 } else { 1972 head->pi_size = sizeof(struct t10_pi_tuple); 1973 head->guard_type = NVME_NVM_NS_16B_GUARD; 1974 } 1975 1976 if (head->pi_size && head->ms >= head->pi_size) 1977 head->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1978 if (!(id->dps & NVME_NS_DPS_PI_FIRST)) { 1979 if (disable_pi_offsets) 1980 head->pi_type = 0; 1981 else 1982 info->pi_offset = head->ms - head->pi_size; 1983 } 1984 1985 if (ctrl->ops->flags & NVME_F_FABRICS) { 1986 /* 1987 * The NVMe over Fabrics specification only supports metadata as 1988 * part of the extended data LBA. We rely on HCA/HBA support to 1989 * remap the separate metadata buffer from the block layer. 1990 */ 1991 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT))) 1992 return; 1993 1994 head->features |= NVME_NS_EXT_LBAS; 1995 1996 /* 1997 * The current fabrics transport drivers support namespace 1998 * metadata formats only if nvme_ns_has_pi() returns true. 1999 * Suppress support for all other formats so the namespace will 2000 * have a 0 capacity and not be usable through the block stack. 2001 * 2002 * Note, this check will need to be modified if any drivers 2003 * gain the ability to use other metadata formats. 2004 */ 2005 if (ctrl->max_integrity_segments && nvme_ns_has_pi(head)) 2006 head->features |= NVME_NS_METADATA_SUPPORTED; 2007 } else { 2008 /* 2009 * For PCIe controllers, we can't easily remap the separate 2010 * metadata buffer from the block layer and thus require a 2011 * separate metadata buffer for block layer metadata/PI support. 2012 * We allow extended LBAs for the passthrough interface, though. 2013 */ 2014 if (id->flbas & NVME_NS_FLBAS_META_EXT) 2015 head->features |= NVME_NS_EXT_LBAS; 2016 else 2017 head->features |= NVME_NS_METADATA_SUPPORTED; 2018 } 2019 } 2020 2021 2022 static u32 nvme_configure_atomic_write(struct nvme_ns *ns, 2023 struct nvme_id_ns *id, struct queue_limits *lim, u32 bs) 2024 { 2025 u32 atomic_bs, boundary = 0; 2026 2027 /* 2028 * We do not support an offset for the atomic boundaries. 2029 */ 2030 if (id->nabo) 2031 return bs; 2032 2033 if ((id->nsfeat & NVME_NS_FEAT_ATOMICS) && id->nawupf) { 2034 /* 2035 * Use the per-namespace atomic write unit when available. 2036 */ 2037 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs; 2038 if (id->nabspf) 2039 boundary = (le16_to_cpu(id->nabspf) + 1) * bs; 2040 } else { 2041 /* 2042 * Use the controller wide atomic write unit. This sucks 2043 * because the limit is defined in terms of logical blocks while 2044 * namespaces can have different formats, and because there is 2045 * no clear language in the specification prohibiting different 2046 * values for different controllers in the subsystem. 2047 */ 2048 atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs; 2049 } 2050 2051 lim->atomic_write_hw_max = atomic_bs; 2052 lim->atomic_write_hw_boundary = boundary; 2053 lim->atomic_write_hw_unit_min = bs; 2054 lim->atomic_write_hw_unit_max = rounddown_pow_of_two(atomic_bs); 2055 lim->features |= BLK_FEAT_ATOMIC_WRITES; 2056 return atomic_bs; 2057 } 2058 2059 static u32 nvme_max_drv_segments(struct nvme_ctrl *ctrl) 2060 { 2061 return ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> SECTOR_SHIFT) + 1; 2062 } 2063 2064 static void nvme_set_ctrl_limits(struct nvme_ctrl *ctrl, 2065 struct queue_limits *lim) 2066 { 2067 lim->max_hw_sectors = ctrl->max_hw_sectors; 2068 lim->max_segments = min_t(u32, USHRT_MAX, 2069 min_not_zero(nvme_max_drv_segments(ctrl), ctrl->max_segments)); 2070 lim->max_integrity_segments = ctrl->max_integrity_segments; 2071 lim->virt_boundary_mask = NVME_CTRL_PAGE_SIZE - 1; 2072 lim->max_segment_size = UINT_MAX; 2073 lim->dma_alignment = 3; 2074 } 2075 2076 static bool nvme_update_disk_info(struct nvme_ns *ns, struct nvme_id_ns *id, 2077 struct queue_limits *lim) 2078 { 2079 struct nvme_ns_head *head = ns->head; 2080 u32 bs = 1U << head->lba_shift; 2081 u32 atomic_bs, phys_bs, io_opt = 0; 2082 bool valid = true; 2083 2084 /* 2085 * The block layer can't support LBA sizes larger than the page size 2086 * or smaller than a sector size yet, so catch this early and don't 2087 * allow block I/O. 2088 */ 2089 if (blk_validate_block_size(bs)) { 2090 bs = (1 << 9); 2091 valid = false; 2092 } 2093 2094 phys_bs = bs; 2095 atomic_bs = nvme_configure_atomic_write(ns, id, lim, bs); 2096 2097 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) { 2098 /* NPWG = Namespace Preferred Write Granularity */ 2099 phys_bs = bs * (1 + le16_to_cpu(id->npwg)); 2100 /* NOWS = Namespace Optimal Write Size */ 2101 if (id->nows) 2102 io_opt = bs * (1 + le16_to_cpu(id->nows)); 2103 } 2104 2105 /* 2106 * Linux filesystems assume writing a single physical block is 2107 * an atomic operation. Hence limit the physical block size to the 2108 * value of the Atomic Write Unit Power Fail parameter. 2109 */ 2110 lim->logical_block_size = bs; 2111 lim->physical_block_size = min(phys_bs, atomic_bs); 2112 lim->io_min = phys_bs; 2113 lim->io_opt = io_opt; 2114 if ((ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) && 2115 (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM)) 2116 lim->max_write_zeroes_sectors = UINT_MAX; 2117 else 2118 lim->max_write_zeroes_sectors = ns->ctrl->max_zeroes_sectors; 2119 return valid; 2120 } 2121 2122 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info) 2123 { 2124 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags); 2125 } 2126 2127 static inline bool nvme_first_scan(struct gendisk *disk) 2128 { 2129 /* nvme_alloc_ns() scans the disk prior to adding it */ 2130 return !disk_live(disk); 2131 } 2132 2133 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id, 2134 struct queue_limits *lim) 2135 { 2136 struct nvme_ctrl *ctrl = ns->ctrl; 2137 u32 iob; 2138 2139 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 2140 is_power_of_2(ctrl->max_hw_sectors)) 2141 iob = ctrl->max_hw_sectors; 2142 else 2143 iob = nvme_lba_to_sect(ns->head, le16_to_cpu(id->noiob)); 2144 2145 if (!iob) 2146 return; 2147 2148 if (!is_power_of_2(iob)) { 2149 if (nvme_first_scan(ns->disk)) 2150 pr_warn("%s: ignoring unaligned IO boundary:%u\n", 2151 ns->disk->disk_name, iob); 2152 return; 2153 } 2154 2155 if (blk_queue_is_zoned(ns->disk->queue)) { 2156 if (nvme_first_scan(ns->disk)) 2157 pr_warn("%s: ignoring zoned namespace IO boundary\n", 2158 ns->disk->disk_name); 2159 return; 2160 } 2161 2162 lim->chunk_sectors = iob; 2163 } 2164 2165 static int nvme_update_ns_info_generic(struct nvme_ns *ns, 2166 struct nvme_ns_info *info) 2167 { 2168 struct queue_limits lim; 2169 unsigned int memflags; 2170 int ret; 2171 2172 lim = queue_limits_start_update(ns->disk->queue); 2173 nvme_set_ctrl_limits(ns->ctrl, &lim); 2174 2175 memflags = blk_mq_freeze_queue(ns->disk->queue); 2176 ret = queue_limits_commit_update(ns->disk->queue, &lim); 2177 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2178 blk_mq_unfreeze_queue(ns->disk->queue, memflags); 2179 2180 /* Hide the block-interface for these devices */ 2181 if (!ret) 2182 ret = -ENODEV; 2183 return ret; 2184 } 2185 2186 static int nvme_query_fdp_granularity(struct nvme_ctrl *ctrl, 2187 struct nvme_ns_info *info, u8 fdp_idx) 2188 { 2189 struct nvme_fdp_config_log hdr, *h; 2190 struct nvme_fdp_config_desc *desc; 2191 size_t size = sizeof(hdr); 2192 void *log, *end; 2193 int i, n, ret; 2194 2195 ret = nvme_get_log_lsi(ctrl, 0, NVME_LOG_FDP_CONFIGS, 0, 2196 NVME_CSI_NVM, &hdr, size, 0, info->endgid); 2197 if (ret) { 2198 dev_warn(ctrl->device, 2199 "FDP configs log header status:0x%x endgid:%d\n", ret, 2200 info->endgid); 2201 return ret; 2202 } 2203 2204 size = le32_to_cpu(hdr.sze); 2205 if (size > PAGE_SIZE * MAX_ORDER_NR_PAGES) { 2206 dev_warn(ctrl->device, "FDP config size too large:%zu\n", 2207 size); 2208 return 0; 2209 } 2210 2211 h = kvmalloc(size, GFP_KERNEL); 2212 if (!h) 2213 return -ENOMEM; 2214 2215 ret = nvme_get_log_lsi(ctrl, 0, NVME_LOG_FDP_CONFIGS, 0, 2216 NVME_CSI_NVM, h, size, 0, info->endgid); 2217 if (ret) { 2218 dev_warn(ctrl->device, 2219 "FDP configs log status:0x%x endgid:%d\n", ret, 2220 info->endgid); 2221 goto out; 2222 } 2223 2224 n = le16_to_cpu(h->numfdpc) + 1; 2225 if (fdp_idx > n) { 2226 dev_warn(ctrl->device, "FDP index:%d out of range:%d\n", 2227 fdp_idx, n); 2228 /* Proceed without registering FDP streams */ 2229 ret = 0; 2230 goto out; 2231 } 2232 2233 log = h + 1; 2234 desc = log; 2235 end = log + size - sizeof(*h); 2236 for (i = 0; i < fdp_idx; i++) { 2237 log += le16_to_cpu(desc->dsze); 2238 desc = log; 2239 if (log >= end) { 2240 dev_warn(ctrl->device, 2241 "FDP invalid config descriptor list\n"); 2242 ret = 0; 2243 goto out; 2244 } 2245 } 2246 2247 if (le32_to_cpu(desc->nrg) > 1) { 2248 dev_warn(ctrl->device, "FDP NRG > 1 not supported\n"); 2249 ret = 0; 2250 goto out; 2251 } 2252 2253 info->runs = le64_to_cpu(desc->runs); 2254 out: 2255 kvfree(h); 2256 return ret; 2257 } 2258 2259 static int nvme_query_fdp_info(struct nvme_ns *ns, struct nvme_ns_info *info) 2260 { 2261 struct nvme_ns_head *head = ns->head; 2262 struct nvme_ctrl *ctrl = ns->ctrl; 2263 struct nvme_fdp_ruh_status *ruhs; 2264 struct nvme_fdp_config fdp; 2265 struct nvme_command c = {}; 2266 size_t size; 2267 int i, ret; 2268 2269 /* 2270 * The FDP configuration is static for the lifetime of the namespace, 2271 * so return immediately if we've already registered this namespace's 2272 * streams. 2273 */ 2274 if (head->nr_plids) 2275 return 0; 2276 2277 ret = nvme_get_features(ctrl, NVME_FEAT_FDP, info->endgid, NULL, 0, 2278 &fdp); 2279 if (ret) { 2280 dev_warn(ctrl->device, "FDP get feature status:0x%x\n", ret); 2281 return ret; 2282 } 2283 2284 if (!(fdp.flags & FDPCFG_FDPE)) 2285 return 0; 2286 2287 ret = nvme_query_fdp_granularity(ctrl, info, fdp.fdpcidx); 2288 if (!info->runs) 2289 return ret; 2290 2291 size = struct_size(ruhs, ruhsd, S8_MAX - 1); 2292 ruhs = kzalloc(size, GFP_KERNEL); 2293 if (!ruhs) 2294 return -ENOMEM; 2295 2296 c.imr.opcode = nvme_cmd_io_mgmt_recv; 2297 c.imr.nsid = cpu_to_le32(head->ns_id); 2298 c.imr.mo = NVME_IO_MGMT_RECV_MO_RUHS; 2299 c.imr.numd = cpu_to_le32(nvme_bytes_to_numd(size)); 2300 ret = nvme_submit_sync_cmd(ns->queue, &c, ruhs, size); 2301 if (ret) { 2302 dev_warn(ctrl->device, "FDP io-mgmt status:0x%x\n", ret); 2303 goto free; 2304 } 2305 2306 head->nr_plids = le16_to_cpu(ruhs->nruhsd); 2307 if (!head->nr_plids) 2308 goto free; 2309 2310 head->plids = kcalloc(head->nr_plids, sizeof(*head->plids), 2311 GFP_KERNEL); 2312 if (!head->plids) { 2313 dev_warn(ctrl->device, 2314 "failed to allocate %u FDP placement IDs\n", 2315 head->nr_plids); 2316 head->nr_plids = 0; 2317 ret = -ENOMEM; 2318 goto free; 2319 } 2320 2321 for (i = 0; i < head->nr_plids; i++) 2322 head->plids[i] = le16_to_cpu(ruhs->ruhsd[i].pid); 2323 free: 2324 kfree(ruhs); 2325 return ret; 2326 } 2327 2328 static int nvme_update_ns_info_block(struct nvme_ns *ns, 2329 struct nvme_ns_info *info) 2330 { 2331 struct queue_limits lim; 2332 struct nvme_id_ns_nvm *nvm = NULL; 2333 struct nvme_zone_info zi = {}; 2334 struct nvme_id_ns *id; 2335 unsigned int memflags; 2336 sector_t capacity; 2337 unsigned lbaf; 2338 int ret; 2339 2340 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id); 2341 if (ret) 2342 return ret; 2343 2344 if (id->ncap == 0) { 2345 /* namespace not allocated or attached */ 2346 info->is_removed = true; 2347 ret = -ENXIO; 2348 goto out; 2349 } 2350 lbaf = nvme_lbaf_index(id->flbas); 2351 2352 if (ns->ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) { 2353 ret = nvme_identify_ns_nvm(ns->ctrl, info->nsid, &nvm); 2354 if (ret < 0) 2355 goto out; 2356 } 2357 2358 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 2359 ns->head->ids.csi == NVME_CSI_ZNS) { 2360 ret = nvme_query_zone_info(ns, lbaf, &zi); 2361 if (ret < 0) 2362 goto out; 2363 } 2364 2365 if (ns->ctrl->ctratt & NVME_CTRL_ATTR_FDPS) { 2366 ret = nvme_query_fdp_info(ns, info); 2367 if (ret < 0) 2368 goto out; 2369 } 2370 2371 lim = queue_limits_start_update(ns->disk->queue); 2372 2373 memflags = blk_mq_freeze_queue(ns->disk->queue); 2374 ns->head->lba_shift = id->lbaf[lbaf].ds; 2375 ns->head->nuse = le64_to_cpu(id->nuse); 2376 capacity = nvme_lba_to_sect(ns->head, le64_to_cpu(id->nsze)); 2377 nvme_set_ctrl_limits(ns->ctrl, &lim); 2378 nvme_configure_metadata(ns->ctrl, ns->head, id, nvm, info); 2379 nvme_set_chunk_sectors(ns, id, &lim); 2380 if (!nvme_update_disk_info(ns, id, &lim)) 2381 capacity = 0; 2382 2383 nvme_config_discard(ns, &lim); 2384 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 2385 ns->head->ids.csi == NVME_CSI_ZNS) 2386 nvme_update_zone_info(ns, &lim, &zi); 2387 2388 if ((ns->ctrl->vwc & NVME_CTRL_VWC_PRESENT) && !info->no_vwc) 2389 lim.features |= BLK_FEAT_WRITE_CACHE | BLK_FEAT_FUA; 2390 else 2391 lim.features &= ~(BLK_FEAT_WRITE_CACHE | BLK_FEAT_FUA); 2392 2393 if (info->is_rotational) 2394 lim.features |= BLK_FEAT_ROTATIONAL; 2395 2396 /* 2397 * Register a metadata profile for PI, or the plain non-integrity NVMe 2398 * metadata masquerading as Type 0 if supported, otherwise reject block 2399 * I/O to namespaces with metadata except when the namespace supports 2400 * PI, as it can strip/insert in that case. 2401 */ 2402 if (!nvme_init_integrity(ns->head, &lim, info)) 2403 capacity = 0; 2404 2405 lim.max_write_streams = ns->head->nr_plids; 2406 if (lim.max_write_streams) 2407 lim.write_stream_granularity = min(info->runs, U32_MAX); 2408 else 2409 lim.write_stream_granularity = 0; 2410 2411 /* 2412 * Only set the DEAC bit if the device guarantees that reads from 2413 * deallocated data return zeroes. While the DEAC bit does not 2414 * require that, it must be a no-op if reads from deallocated data 2415 * do not return zeroes. 2416 */ 2417 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3))) { 2418 ns->head->features |= NVME_NS_DEAC; 2419 lim.max_hw_wzeroes_unmap_sectors = lim.max_write_zeroes_sectors; 2420 } 2421 2422 ret = queue_limits_commit_update(ns->disk->queue, &lim); 2423 if (ret) { 2424 blk_mq_unfreeze_queue(ns->disk->queue, memflags); 2425 goto out; 2426 } 2427 2428 set_capacity_and_notify(ns->disk, capacity); 2429 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2430 set_bit(NVME_NS_READY, &ns->flags); 2431 blk_mq_unfreeze_queue(ns->disk->queue, memflags); 2432 2433 if (blk_queue_is_zoned(ns->queue)) { 2434 ret = blk_revalidate_disk_zones(ns->disk); 2435 if (ret && !nvme_first_scan(ns->disk)) 2436 goto out; 2437 } 2438 2439 ret = 0; 2440 out: 2441 kfree(nvm); 2442 kfree(id); 2443 return ret; 2444 } 2445 2446 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info) 2447 { 2448 bool unsupported = false; 2449 int ret; 2450 2451 switch (info->ids.csi) { 2452 case NVME_CSI_ZNS: 2453 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 2454 dev_info(ns->ctrl->device, 2455 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n", 2456 info->nsid); 2457 ret = nvme_update_ns_info_generic(ns, info); 2458 break; 2459 } 2460 ret = nvme_update_ns_info_block(ns, info); 2461 break; 2462 case NVME_CSI_NVM: 2463 ret = nvme_update_ns_info_block(ns, info); 2464 break; 2465 default: 2466 dev_info(ns->ctrl->device, 2467 "block device for nsid %u not supported (csi %u)\n", 2468 info->nsid, info->ids.csi); 2469 ret = nvme_update_ns_info_generic(ns, info); 2470 break; 2471 } 2472 2473 /* 2474 * If probing fails due an unsupported feature, hide the block device, 2475 * but still allow other access. 2476 */ 2477 if (ret == -ENODEV) { 2478 ns->disk->flags |= GENHD_FL_HIDDEN; 2479 set_bit(NVME_NS_READY, &ns->flags); 2480 unsupported = true; 2481 ret = 0; 2482 } 2483 2484 if (!ret && nvme_ns_head_multipath(ns->head)) { 2485 struct queue_limits *ns_lim = &ns->disk->queue->limits; 2486 struct queue_limits lim; 2487 unsigned int memflags; 2488 2489 lim = queue_limits_start_update(ns->head->disk->queue); 2490 memflags = blk_mq_freeze_queue(ns->head->disk->queue); 2491 /* 2492 * queue_limits mixes values that are the hardware limitations 2493 * for bio splitting with what is the device configuration. 2494 * 2495 * For NVMe the device configuration can change after e.g. a 2496 * Format command, and we really want to pick up the new format 2497 * value here. But we must still stack the queue limits to the 2498 * least common denominator for multipathing to split the bios 2499 * properly. 2500 * 2501 * To work around this, we explicitly set the device 2502 * configuration to those that we just queried, but only stack 2503 * the splitting limits in to make sure we still obey possibly 2504 * lower limitations of other controllers. 2505 */ 2506 lim.logical_block_size = ns_lim->logical_block_size; 2507 lim.physical_block_size = ns_lim->physical_block_size; 2508 lim.io_min = ns_lim->io_min; 2509 lim.io_opt = ns_lim->io_opt; 2510 queue_limits_stack_bdev(&lim, ns->disk->part0, 0, 2511 ns->head->disk->disk_name); 2512 if (unsupported) 2513 ns->head->disk->flags |= GENHD_FL_HIDDEN; 2514 else 2515 nvme_init_integrity(ns->head, &lim, info); 2516 lim.max_write_streams = ns_lim->max_write_streams; 2517 lim.write_stream_granularity = ns_lim->write_stream_granularity; 2518 ret = queue_limits_commit_update(ns->head->disk->queue, &lim); 2519 2520 set_capacity_and_notify(ns->head->disk, get_capacity(ns->disk)); 2521 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2522 nvme_mpath_revalidate_paths(ns); 2523 2524 blk_mq_unfreeze_queue(ns->head->disk->queue, memflags); 2525 } 2526 2527 return ret; 2528 } 2529 2530 int nvme_ns_get_unique_id(struct nvme_ns *ns, u8 id[16], 2531 enum blk_unique_id type) 2532 { 2533 struct nvme_ns_ids *ids = &ns->head->ids; 2534 2535 if (type != BLK_UID_EUI64) 2536 return -EINVAL; 2537 2538 if (memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) { 2539 memcpy(id, &ids->nguid, sizeof(ids->nguid)); 2540 return sizeof(ids->nguid); 2541 } 2542 if (memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) { 2543 memcpy(id, &ids->eui64, sizeof(ids->eui64)); 2544 return sizeof(ids->eui64); 2545 } 2546 2547 return -EINVAL; 2548 } 2549 2550 static int nvme_get_unique_id(struct gendisk *disk, u8 id[16], 2551 enum blk_unique_id type) 2552 { 2553 return nvme_ns_get_unique_id(disk->private_data, id, type); 2554 } 2555 2556 #ifdef CONFIG_BLK_SED_OPAL 2557 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2558 bool send) 2559 { 2560 struct nvme_ctrl *ctrl = data; 2561 struct nvme_command cmd = { }; 2562 2563 if (send) 2564 cmd.common.opcode = nvme_admin_security_send; 2565 else 2566 cmd.common.opcode = nvme_admin_security_recv; 2567 cmd.common.nsid = 0; 2568 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 2569 cmd.common.cdw11 = cpu_to_le32(len); 2570 2571 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 2572 NVME_QID_ANY, NVME_SUBMIT_AT_HEAD); 2573 } 2574 2575 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2576 { 2577 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) { 2578 if (!ctrl->opal_dev) 2579 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit); 2580 else if (was_suspended) 2581 opal_unlock_from_suspend(ctrl->opal_dev); 2582 } else { 2583 free_opal_dev(ctrl->opal_dev); 2584 ctrl->opal_dev = NULL; 2585 } 2586 } 2587 #else 2588 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2589 { 2590 } 2591 #endif /* CONFIG_BLK_SED_OPAL */ 2592 2593 #ifdef CONFIG_BLK_DEV_ZONED 2594 static int nvme_report_zones(struct gendisk *disk, sector_t sector, 2595 unsigned int nr_zones, report_zones_cb cb, void *data) 2596 { 2597 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb, 2598 data); 2599 } 2600 #else 2601 #define nvme_report_zones NULL 2602 #endif /* CONFIG_BLK_DEV_ZONED */ 2603 2604 const struct block_device_operations nvme_bdev_ops = { 2605 .owner = THIS_MODULE, 2606 .ioctl = nvme_ioctl, 2607 .compat_ioctl = blkdev_compat_ptr_ioctl, 2608 .open = nvme_open, 2609 .release = nvme_release, 2610 .getgeo = nvme_getgeo, 2611 .get_unique_id = nvme_get_unique_id, 2612 .report_zones = nvme_report_zones, 2613 .pr_ops = &nvme_pr_ops, 2614 }; 2615 2616 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val, 2617 u32 timeout, const char *op) 2618 { 2619 unsigned long timeout_jiffies = jiffies + timeout * HZ; 2620 u32 csts; 2621 int ret; 2622 2623 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2624 if (csts == ~0) 2625 return -ENODEV; 2626 if ((csts & mask) == val) 2627 break; 2628 2629 usleep_range(1000, 2000); 2630 if (fatal_signal_pending(current)) 2631 return -EINTR; 2632 if (time_after(jiffies, timeout_jiffies)) { 2633 dev_err(ctrl->device, 2634 "Device not ready; aborting %s, CSTS=0x%x\n", 2635 op, csts); 2636 return -ENODEV; 2637 } 2638 } 2639 2640 return ret; 2641 } 2642 2643 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown) 2644 { 2645 int ret; 2646 2647 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2648 if (shutdown) 2649 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 2650 else 2651 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 2652 2653 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2654 if (ret) 2655 return ret; 2656 2657 if (shutdown) { 2658 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK, 2659 NVME_CSTS_SHST_CMPLT, 2660 ctrl->shutdown_timeout, "shutdown"); 2661 } 2662 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 2663 msleep(NVME_QUIRK_DELAY_AMOUNT); 2664 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0, 2665 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset"); 2666 } 2667 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 2668 2669 int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 2670 { 2671 unsigned dev_page_min; 2672 u32 timeout; 2673 int ret; 2674 2675 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2676 if (ret) { 2677 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2678 return ret; 2679 } 2680 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2681 2682 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) { 2683 dev_err(ctrl->device, 2684 "Minimum device page size %u too large for host (%u)\n", 2685 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT); 2686 return -ENODEV; 2687 } 2688 2689 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI) 2690 ctrl->ctrl_config = NVME_CC_CSS_CSI; 2691 else 2692 ctrl->ctrl_config = NVME_CC_CSS_NVM; 2693 2694 /* 2695 * Setting CRIME results in CSTS.RDY before the media is ready. This 2696 * makes it possible for media related commands to return the error 2697 * NVME_SC_ADMIN_COMMAND_MEDIA_NOT_READY. Until the driver is 2698 * restructured to handle retries, disable CC.CRIME. 2699 */ 2700 ctrl->ctrl_config &= ~NVME_CC_CRIME; 2701 2702 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; 2703 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 2704 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 2705 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2706 if (ret) 2707 return ret; 2708 2709 /* CAP value may change after initial CC write */ 2710 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2711 if (ret) 2712 return ret; 2713 2714 timeout = NVME_CAP_TIMEOUT(ctrl->cap); 2715 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) { 2716 u32 crto, ready_timeout; 2717 2718 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto); 2719 if (ret) { 2720 dev_err(ctrl->device, "Reading CRTO failed (%d)\n", 2721 ret); 2722 return ret; 2723 } 2724 2725 /* 2726 * CRTO should always be greater or equal to CAP.TO, but some 2727 * devices are known to get this wrong. Use the larger of the 2728 * two values. 2729 */ 2730 ready_timeout = NVME_CRTO_CRWMT(crto); 2731 2732 if (ready_timeout < timeout) 2733 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n", 2734 crto, ctrl->cap); 2735 else 2736 timeout = ready_timeout; 2737 } 2738 2739 ctrl->ctrl_config |= NVME_CC_ENABLE; 2740 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2741 if (ret) 2742 return ret; 2743 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY, 2744 (timeout + 1) / 2, "initialisation"); 2745 } 2746 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 2747 2748 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 2749 { 2750 __le64 ts; 2751 int ret; 2752 2753 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 2754 return 0; 2755 2756 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 2757 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 2758 NULL); 2759 if (ret) 2760 dev_warn_once(ctrl->device, 2761 "could not set timestamp (%d)\n", ret); 2762 return ret; 2763 } 2764 2765 static int nvme_configure_host_options(struct nvme_ctrl *ctrl) 2766 { 2767 struct nvme_feat_host_behavior *host; 2768 u8 acre = 0, lbafee = 0; 2769 int ret; 2770 2771 /* Don't bother enabling the feature if retry delay is not reported */ 2772 if (ctrl->crdt[0]) 2773 acre = NVME_ENABLE_ACRE; 2774 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) 2775 lbafee = NVME_ENABLE_LBAFEE; 2776 2777 if (!acre && !lbafee) 2778 return 0; 2779 2780 host = kzalloc(sizeof(*host), GFP_KERNEL); 2781 if (!host) 2782 return 0; 2783 2784 host->acre = acre; 2785 host->lbafee = lbafee; 2786 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 2787 host, sizeof(*host), NULL); 2788 kfree(host); 2789 return ret; 2790 } 2791 2792 /* 2793 * The function checks whether the given total (exlat + enlat) latency of 2794 * a power state allows the latter to be used as an APST transition target. 2795 * It does so by comparing the latency to the primary and secondary latency 2796 * tolerances defined by module params. If there's a match, the corresponding 2797 * timeout value is returned and the matching tolerance index (1 or 2) is 2798 * reported. 2799 */ 2800 static bool nvme_apst_get_transition_time(u64 total_latency, 2801 u64 *transition_time, unsigned *last_index) 2802 { 2803 if (total_latency <= apst_primary_latency_tol_us) { 2804 if (*last_index == 1) 2805 return false; 2806 *last_index = 1; 2807 *transition_time = apst_primary_timeout_ms; 2808 return true; 2809 } 2810 if (apst_secondary_timeout_ms && 2811 total_latency <= apst_secondary_latency_tol_us) { 2812 if (*last_index <= 2) 2813 return false; 2814 *last_index = 2; 2815 *transition_time = apst_secondary_timeout_ms; 2816 return true; 2817 } 2818 return false; 2819 } 2820 2821 /* 2822 * APST (Autonomous Power State Transition) lets us program a table of power 2823 * state transitions that the controller will perform automatically. 2824 * 2825 * Depending on module params, one of the two supported techniques will be used: 2826 * 2827 * - If the parameters provide explicit timeouts and tolerances, they will be 2828 * used to build a table with up to 2 non-operational states to transition to. 2829 * The default parameter values were selected based on the values used by 2830 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic 2831 * regeneration of the APST table in the event of switching between external 2832 * and battery power, the timeouts and tolerances reflect a compromise 2833 * between values used by Microsoft for AC and battery scenarios. 2834 * - If not, we'll configure the table with a simple heuristic: we are willing 2835 * to spend at most 2% of the time transitioning between power states. 2836 * Therefore, when running in any given state, we will enter the next 2837 * lower-power non-operational state after waiting 50 * (enlat + exlat) 2838 * microseconds, as long as that state's exit latency is under the requested 2839 * maximum latency. 2840 * 2841 * We will not autonomously enter any non-operational state for which the total 2842 * latency exceeds ps_max_latency_us. 2843 * 2844 * Users can set ps_max_latency_us to zero to turn off APST. 2845 */ 2846 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 2847 { 2848 struct nvme_feat_auto_pst *table; 2849 unsigned apste = 0; 2850 u64 max_lat_us = 0; 2851 __le64 target = 0; 2852 int max_ps = -1; 2853 int state; 2854 int ret; 2855 unsigned last_lt_index = UINT_MAX; 2856 2857 /* 2858 * If APST isn't supported or if we haven't been initialized yet, 2859 * then don't do anything. 2860 */ 2861 if (!ctrl->apsta) 2862 return 0; 2863 2864 if (ctrl->npss > 31) { 2865 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2866 return 0; 2867 } 2868 2869 table = kzalloc(sizeof(*table), GFP_KERNEL); 2870 if (!table) 2871 return 0; 2872 2873 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2874 /* Turn off APST. */ 2875 dev_dbg(ctrl->device, "APST disabled\n"); 2876 goto done; 2877 } 2878 2879 /* 2880 * Walk through all states from lowest- to highest-power. 2881 * According to the spec, lower-numbered states use more power. NPSS, 2882 * despite the name, is the index of the lowest-power state, not the 2883 * number of states. 2884 */ 2885 for (state = (int)ctrl->npss; state >= 0; state--) { 2886 u64 total_latency_us, exit_latency_us, transition_ms; 2887 2888 if (target) 2889 table->entries[state] = target; 2890 2891 /* 2892 * Don't allow transitions to the deepest state if it's quirked 2893 * off. 2894 */ 2895 if (state == ctrl->npss && 2896 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2897 continue; 2898 2899 /* 2900 * Is this state a useful non-operational state for higher-power 2901 * states to autonomously transition to? 2902 */ 2903 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE)) 2904 continue; 2905 2906 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2907 if (exit_latency_us > ctrl->ps_max_latency_us) 2908 continue; 2909 2910 total_latency_us = exit_latency_us + 2911 le32_to_cpu(ctrl->psd[state].entry_lat); 2912 2913 /* 2914 * This state is good. It can be used as the APST idle target 2915 * for higher power states. 2916 */ 2917 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) { 2918 if (!nvme_apst_get_transition_time(total_latency_us, 2919 &transition_ms, &last_lt_index)) 2920 continue; 2921 } else { 2922 transition_ms = total_latency_us + 19; 2923 do_div(transition_ms, 20); 2924 if (transition_ms > (1 << 24) - 1) 2925 transition_ms = (1 << 24) - 1; 2926 } 2927 2928 target = cpu_to_le64((state << 3) | (transition_ms << 8)); 2929 if (max_ps == -1) 2930 max_ps = state; 2931 if (total_latency_us > max_lat_us) 2932 max_lat_us = total_latency_us; 2933 } 2934 2935 if (max_ps == -1) 2936 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2937 else 2938 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2939 max_ps, max_lat_us, (int)sizeof(*table), table); 2940 apste = 1; 2941 2942 done: 2943 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2944 table, sizeof(*table), NULL); 2945 if (ret) 2946 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2947 kfree(table); 2948 return ret; 2949 } 2950 2951 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2952 { 2953 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2954 u64 latency; 2955 2956 switch (val) { 2957 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2958 case PM_QOS_LATENCY_ANY: 2959 latency = U64_MAX; 2960 break; 2961 2962 default: 2963 latency = val; 2964 } 2965 2966 if (ctrl->ps_max_latency_us != latency) { 2967 ctrl->ps_max_latency_us = latency; 2968 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 2969 nvme_configure_apst(ctrl); 2970 } 2971 } 2972 2973 struct nvme_core_quirk_entry { 2974 /* 2975 * NVMe model and firmware strings are padded with spaces. For 2976 * simplicity, strings in the quirk table are padded with NULLs 2977 * instead. 2978 */ 2979 u16 vid; 2980 const char *mn; 2981 const char *fr; 2982 unsigned long quirks; 2983 }; 2984 2985 static const struct nvme_core_quirk_entry core_quirks[] = { 2986 { 2987 /* 2988 * This Toshiba device seems to die using any APST states. See: 2989 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2990 */ 2991 .vid = 0x1179, 2992 .mn = "THNSF5256GPUK TOSHIBA", 2993 .quirks = NVME_QUIRK_NO_APST, 2994 }, 2995 { 2996 /* 2997 * This LiteON CL1-3D*-Q11 firmware version has a race 2998 * condition associated with actions related to suspend to idle 2999 * LiteON has resolved the problem in future firmware 3000 */ 3001 .vid = 0x14a4, 3002 .fr = "22301111", 3003 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 3004 }, 3005 { 3006 /* 3007 * This Kioxia CD6-V Series / HPE PE8030 device times out and 3008 * aborts I/O during any load, but more easily reproducible 3009 * with discards (fstrim). 3010 * 3011 * The device is left in a state where it is also not possible 3012 * to use "nvme set-feature" to disable APST, but booting with 3013 * nvme_core.default_ps_max_latency=0 works. 3014 */ 3015 .vid = 0x1e0f, 3016 .mn = "KCD6XVUL6T40", 3017 .quirks = NVME_QUIRK_NO_APST, 3018 }, 3019 { 3020 /* 3021 * The external Samsung X5 SSD fails initialization without a 3022 * delay before checking if it is ready and has a whole set of 3023 * other problems. To make this even more interesting, it 3024 * shares the PCI ID with internal Samsung 970 Evo Plus that 3025 * does not need or want these quirks. 3026 */ 3027 .vid = 0x144d, 3028 .mn = "Samsung Portable SSD X5", 3029 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY | 3030 NVME_QUIRK_NO_DEEPEST_PS | 3031 NVME_QUIRK_IGNORE_DEV_SUBNQN, 3032 } 3033 }; 3034 3035 /* match is null-terminated but idstr is space-padded. */ 3036 static bool string_matches(const char *idstr, const char *match, size_t len) 3037 { 3038 size_t matchlen; 3039 3040 if (!match) 3041 return true; 3042 3043 matchlen = strlen(match); 3044 WARN_ON_ONCE(matchlen > len); 3045 3046 if (memcmp(idstr, match, matchlen)) 3047 return false; 3048 3049 for (; matchlen < len; matchlen++) 3050 if (idstr[matchlen] != ' ') 3051 return false; 3052 3053 return true; 3054 } 3055 3056 static bool quirk_matches(const struct nvme_id_ctrl *id, 3057 const struct nvme_core_quirk_entry *q) 3058 { 3059 return q->vid == le16_to_cpu(id->vid) && 3060 string_matches(id->mn, q->mn, sizeof(id->mn)) && 3061 string_matches(id->fr, q->fr, sizeof(id->fr)); 3062 } 3063 3064 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 3065 struct nvme_id_ctrl *id) 3066 { 3067 size_t nqnlen; 3068 int off; 3069 3070 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 3071 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 3072 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 3073 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 3074 return; 3075 } 3076 3077 if (ctrl->vs >= NVME_VS(1, 2, 1)) 3078 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 3079 } 3080 3081 /* 3082 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe 3083 * Base Specification 2.0. It is slightly different from the format 3084 * specified there due to historic reasons, and we can't change it now. 3085 */ 3086 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 3087 "nqn.2014.08.org.nvmexpress:%04x%04x", 3088 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 3089 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 3090 off += sizeof(id->sn); 3091 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 3092 off += sizeof(id->mn); 3093 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 3094 } 3095 3096 static void nvme_release_subsystem(struct device *dev) 3097 { 3098 struct nvme_subsystem *subsys = 3099 container_of(dev, struct nvme_subsystem, dev); 3100 3101 if (subsys->instance >= 0) 3102 ida_free(&nvme_instance_ida, subsys->instance); 3103 kfree(subsys); 3104 } 3105 3106 static void nvme_destroy_subsystem(struct kref *ref) 3107 { 3108 struct nvme_subsystem *subsys = 3109 container_of(ref, struct nvme_subsystem, ref); 3110 3111 mutex_lock(&nvme_subsystems_lock); 3112 list_del(&subsys->entry); 3113 mutex_unlock(&nvme_subsystems_lock); 3114 3115 ida_destroy(&subsys->ns_ida); 3116 device_del(&subsys->dev); 3117 put_device(&subsys->dev); 3118 } 3119 3120 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 3121 { 3122 kref_put(&subsys->ref, nvme_destroy_subsystem); 3123 } 3124 3125 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 3126 { 3127 struct nvme_subsystem *subsys; 3128 3129 lockdep_assert_held(&nvme_subsystems_lock); 3130 3131 /* 3132 * Fail matches for discovery subsystems. This results 3133 * in each discovery controller bound to a unique subsystem. 3134 * This avoids issues with validating controller values 3135 * that can only be true when there is a single unique subsystem. 3136 * There may be multiple and completely independent entities 3137 * that provide discovery controllers. 3138 */ 3139 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME)) 3140 return NULL; 3141 3142 list_for_each_entry(subsys, &nvme_subsystems, entry) { 3143 if (strcmp(subsys->subnqn, subsysnqn)) 3144 continue; 3145 if (!kref_get_unless_zero(&subsys->ref)) 3146 continue; 3147 return subsys; 3148 } 3149 3150 return NULL; 3151 } 3152 3153 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl) 3154 { 3155 return ctrl->opts && ctrl->opts->discovery_nqn; 3156 } 3157 3158 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, 3159 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 3160 { 3161 struct nvme_ctrl *tmp; 3162 3163 lockdep_assert_held(&nvme_subsystems_lock); 3164 3165 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) { 3166 if (nvme_state_terminal(tmp)) 3167 continue; 3168 3169 if (tmp->cntlid == ctrl->cntlid) { 3170 dev_err(ctrl->device, 3171 "Duplicate cntlid %u with %s, subsys %s, rejecting\n", 3172 ctrl->cntlid, dev_name(tmp->device), 3173 subsys->subnqn); 3174 return false; 3175 } 3176 3177 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) || 3178 nvme_discovery_ctrl(ctrl)) 3179 continue; 3180 3181 dev_err(ctrl->device, 3182 "Subsystem does not support multiple controllers\n"); 3183 return false; 3184 } 3185 3186 return true; 3187 } 3188 3189 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 3190 { 3191 struct nvme_subsystem *subsys, *found; 3192 int ret; 3193 3194 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 3195 if (!subsys) 3196 return -ENOMEM; 3197 3198 subsys->instance = -1; 3199 mutex_init(&subsys->lock); 3200 kref_init(&subsys->ref); 3201 INIT_LIST_HEAD(&subsys->ctrls); 3202 INIT_LIST_HEAD(&subsys->nsheads); 3203 nvme_init_subnqn(subsys, ctrl, id); 3204 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 3205 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 3206 subsys->vendor_id = le16_to_cpu(id->vid); 3207 subsys->cmic = id->cmic; 3208 subsys->awupf = le16_to_cpu(id->awupf); 3209 3210 /* Versions prior to 1.4 don't necessarily report a valid type */ 3211 if (id->cntrltype == NVME_CTRL_DISC || 3212 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME)) 3213 subsys->subtype = NVME_NQN_DISC; 3214 else 3215 subsys->subtype = NVME_NQN_NVME; 3216 3217 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) { 3218 dev_err(ctrl->device, 3219 "Subsystem %s is not a discovery controller", 3220 subsys->subnqn); 3221 kfree(subsys); 3222 return -EINVAL; 3223 } 3224 nvme_mpath_default_iopolicy(subsys); 3225 3226 subsys->dev.class = &nvme_subsys_class; 3227 subsys->dev.release = nvme_release_subsystem; 3228 subsys->dev.groups = nvme_subsys_attrs_groups; 3229 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance); 3230 device_initialize(&subsys->dev); 3231 3232 mutex_lock(&nvme_subsystems_lock); 3233 found = __nvme_find_get_subsystem(subsys->subnqn); 3234 if (found) { 3235 put_device(&subsys->dev); 3236 subsys = found; 3237 3238 if (!nvme_validate_cntlid(subsys, ctrl, id)) { 3239 ret = -EINVAL; 3240 goto out_put_subsystem; 3241 } 3242 } else { 3243 ret = device_add(&subsys->dev); 3244 if (ret) { 3245 dev_err(ctrl->device, 3246 "failed to register subsystem device.\n"); 3247 put_device(&subsys->dev); 3248 goto out_unlock; 3249 } 3250 ida_init(&subsys->ns_ida); 3251 list_add_tail(&subsys->entry, &nvme_subsystems); 3252 } 3253 3254 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 3255 dev_name(ctrl->device)); 3256 if (ret) { 3257 dev_err(ctrl->device, 3258 "failed to create sysfs link from subsystem.\n"); 3259 goto out_put_subsystem; 3260 } 3261 3262 if (!found) 3263 subsys->instance = ctrl->instance; 3264 ctrl->subsys = subsys; 3265 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 3266 mutex_unlock(&nvme_subsystems_lock); 3267 return 0; 3268 3269 out_put_subsystem: 3270 nvme_put_subsystem(subsys); 3271 out_unlock: 3272 mutex_unlock(&nvme_subsystems_lock); 3273 return ret; 3274 } 3275 3276 static int nvme_get_log_lsi(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, 3277 u8 lsp, u8 csi, void *log, size_t size, u64 offset, u16 lsi) 3278 { 3279 struct nvme_command c = { }; 3280 u32 dwlen = nvme_bytes_to_numd(size); 3281 3282 c.get_log_page.opcode = nvme_admin_get_log_page; 3283 c.get_log_page.nsid = cpu_to_le32(nsid); 3284 c.get_log_page.lid = log_page; 3285 c.get_log_page.lsp = lsp; 3286 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 3287 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 3288 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 3289 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 3290 c.get_log_page.csi = csi; 3291 c.get_log_page.lsi = cpu_to_le16(lsi); 3292 3293 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 3294 } 3295 3296 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 3297 void *log, size_t size, u64 offset) 3298 { 3299 return nvme_get_log_lsi(ctrl, nsid, log_page, lsp, csi, log, size, 3300 offset, 0); 3301 } 3302 3303 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi, 3304 struct nvme_effects_log **log) 3305 { 3306 struct nvme_effects_log *old, *cel = xa_load(&ctrl->cels, csi); 3307 int ret; 3308 3309 if (cel) 3310 goto out; 3311 3312 cel = kzalloc(sizeof(*cel), GFP_KERNEL); 3313 if (!cel) 3314 return -ENOMEM; 3315 3316 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi, 3317 cel, sizeof(*cel), 0); 3318 if (ret) { 3319 kfree(cel); 3320 return ret; 3321 } 3322 3323 old = xa_store(&ctrl->cels, csi, cel, GFP_KERNEL); 3324 if (xa_is_err(old)) { 3325 kfree(cel); 3326 return xa_err(old); 3327 } 3328 out: 3329 *log = cel; 3330 return 0; 3331 } 3332 3333 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units) 3334 { 3335 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val; 3336 3337 if (check_shl_overflow(1U, units + page_shift - 9, &val)) 3338 return UINT_MAX; 3339 return val; 3340 } 3341 3342 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl) 3343 { 3344 struct nvme_command c = { }; 3345 struct nvme_id_ctrl_nvm *id; 3346 int ret; 3347 3348 /* 3349 * Even though NVMe spec explicitly states that MDTS is not applicable 3350 * to the write-zeroes, we are cautious and limit the size to the 3351 * controllers max_hw_sectors value, which is based on the MDTS field 3352 * and possibly other limiting factors. 3353 */ 3354 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) && 3355 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)) 3356 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors; 3357 else 3358 ctrl->max_zeroes_sectors = 0; 3359 3360 if (ctrl->subsys->subtype != NVME_NQN_NVME || 3361 !nvme_id_cns_ok(ctrl, NVME_ID_CNS_CS_CTRL) || 3362 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags)) 3363 return 0; 3364 3365 id = kzalloc(sizeof(*id), GFP_KERNEL); 3366 if (!id) 3367 return -ENOMEM; 3368 3369 c.identify.opcode = nvme_admin_identify; 3370 c.identify.cns = NVME_ID_CNS_CS_CTRL; 3371 c.identify.csi = NVME_CSI_NVM; 3372 3373 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 3374 if (ret) 3375 goto free_data; 3376 3377 ctrl->dmrl = id->dmrl; 3378 ctrl->dmrsl = le32_to_cpu(id->dmrsl); 3379 if (id->wzsl) 3380 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl); 3381 3382 free_data: 3383 if (ret > 0) 3384 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags); 3385 kfree(id); 3386 return ret; 3387 } 3388 3389 static int nvme_init_effects_log(struct nvme_ctrl *ctrl, 3390 u8 csi, struct nvme_effects_log **log) 3391 { 3392 struct nvme_effects_log *effects, *old; 3393 3394 effects = kzalloc(sizeof(*effects), GFP_KERNEL); 3395 if (!effects) 3396 return -ENOMEM; 3397 3398 old = xa_store(&ctrl->cels, csi, effects, GFP_KERNEL); 3399 if (xa_is_err(old)) { 3400 kfree(effects); 3401 return xa_err(old); 3402 } 3403 3404 *log = effects; 3405 return 0; 3406 } 3407 3408 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl) 3409 { 3410 struct nvme_effects_log *log = ctrl->effects; 3411 3412 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 3413 NVME_CMD_EFFECTS_NCC | 3414 NVME_CMD_EFFECTS_CSE_MASK); 3415 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 3416 NVME_CMD_EFFECTS_CSE_MASK); 3417 3418 /* 3419 * The spec says the result of a security receive command depends on 3420 * the previous security send command. As such, many vendors log this 3421 * command as one to submitted only when no other commands to the same 3422 * namespace are outstanding. The intention is to tell the host to 3423 * prevent mixing security send and receive. 3424 * 3425 * This driver can only enforce such exclusive access against IO 3426 * queues, though. We are not readily able to enforce such a rule for 3427 * two commands to the admin queue, which is the only queue that 3428 * matters for this command. 3429 * 3430 * Rather than blindly freezing the IO queues for this effect that 3431 * doesn't even apply to IO, mask it off. 3432 */ 3433 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK); 3434 3435 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3436 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3437 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3438 } 3439 3440 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 3441 { 3442 int ret = 0; 3443 3444 if (ctrl->effects) 3445 return 0; 3446 3447 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 3448 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 3449 if (ret < 0) 3450 return ret; 3451 } 3452 3453 if (!ctrl->effects) { 3454 ret = nvme_init_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 3455 if (ret < 0) 3456 return ret; 3457 } 3458 3459 nvme_init_known_nvm_effects(ctrl); 3460 return 0; 3461 } 3462 3463 static int nvme_check_ctrl_fabric_info(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 3464 { 3465 /* 3466 * In fabrics we need to verify the cntlid matches the 3467 * admin connect 3468 */ 3469 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 3470 dev_err(ctrl->device, 3471 "Mismatching cntlid: Connect %u vs Identify %u, rejecting\n", 3472 ctrl->cntlid, le16_to_cpu(id->cntlid)); 3473 return -EINVAL; 3474 } 3475 3476 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) { 3477 dev_err(ctrl->device, 3478 "keep-alive support is mandatory for fabrics\n"); 3479 return -EINVAL; 3480 } 3481 3482 if (!nvme_discovery_ctrl(ctrl) && ctrl->ioccsz < 4) { 3483 dev_err(ctrl->device, 3484 "I/O queue command capsule supported size %d < 4\n", 3485 ctrl->ioccsz); 3486 return -EINVAL; 3487 } 3488 3489 if (!nvme_discovery_ctrl(ctrl) && ctrl->iorcsz < 1) { 3490 dev_err(ctrl->device, 3491 "I/O queue response capsule supported size %d < 1\n", 3492 ctrl->iorcsz); 3493 return -EINVAL; 3494 } 3495 3496 if (!ctrl->maxcmd) { 3497 dev_warn(ctrl->device, 3498 "Firmware bug: maximum outstanding commands is 0\n"); 3499 ctrl->maxcmd = ctrl->sqsize + 1; 3500 } 3501 3502 return 0; 3503 } 3504 3505 static int nvme_init_identify(struct nvme_ctrl *ctrl) 3506 { 3507 struct queue_limits lim; 3508 struct nvme_id_ctrl *id; 3509 u32 max_hw_sectors; 3510 bool prev_apst_enabled; 3511 int ret; 3512 3513 ret = nvme_identify_ctrl(ctrl, &id); 3514 if (ret) { 3515 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 3516 return -EIO; 3517 } 3518 3519 if (!(ctrl->ops->flags & NVME_F_FABRICS)) 3520 ctrl->cntlid = le16_to_cpu(id->cntlid); 3521 3522 if (!ctrl->identified) { 3523 unsigned int i; 3524 3525 /* 3526 * Check for quirks. Quirk can depend on firmware version, 3527 * so, in principle, the set of quirks present can change 3528 * across a reset. As a possible future enhancement, we 3529 * could re-scan for quirks every time we reinitialize 3530 * the device, but we'd have to make sure that the driver 3531 * behaves intelligently if the quirks change. 3532 */ 3533 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 3534 if (quirk_matches(id, &core_quirks[i])) 3535 ctrl->quirks |= core_quirks[i].quirks; 3536 } 3537 3538 ret = nvme_init_subsystem(ctrl, id); 3539 if (ret) 3540 goto out_free; 3541 3542 ret = nvme_init_effects(ctrl, id); 3543 if (ret) 3544 goto out_free; 3545 } 3546 memcpy(ctrl->subsys->firmware_rev, id->fr, 3547 sizeof(ctrl->subsys->firmware_rev)); 3548 3549 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 3550 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 3551 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 3552 } 3553 3554 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 3555 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 3556 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 3557 3558 ctrl->oacs = le16_to_cpu(id->oacs); 3559 ctrl->oncs = le16_to_cpu(id->oncs); 3560 ctrl->mtfa = le16_to_cpu(id->mtfa); 3561 ctrl->oaes = le32_to_cpu(id->oaes); 3562 ctrl->wctemp = le16_to_cpu(id->wctemp); 3563 ctrl->cctemp = le16_to_cpu(id->cctemp); 3564 3565 atomic_set(&ctrl->abort_limit, id->acl + 1); 3566 ctrl->vwc = id->vwc; 3567 if (id->mdts) 3568 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts); 3569 else 3570 max_hw_sectors = UINT_MAX; 3571 ctrl->max_hw_sectors = 3572 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 3573 3574 lim = queue_limits_start_update(ctrl->admin_q); 3575 nvme_set_ctrl_limits(ctrl, &lim); 3576 ret = queue_limits_commit_update(ctrl->admin_q, &lim); 3577 if (ret) 3578 goto out_free; 3579 3580 ctrl->sgls = le32_to_cpu(id->sgls); 3581 ctrl->kas = le16_to_cpu(id->kas); 3582 ctrl->max_namespaces = le32_to_cpu(id->mnan); 3583 ctrl->ctratt = le32_to_cpu(id->ctratt); 3584 3585 ctrl->cntrltype = id->cntrltype; 3586 ctrl->dctype = id->dctype; 3587 3588 if (id->rtd3e) { 3589 /* us -> s */ 3590 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC; 3591 3592 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 3593 shutdown_timeout, 60); 3594 3595 if (ctrl->shutdown_timeout != shutdown_timeout) 3596 dev_info(ctrl->device, 3597 "D3 entry latency set to %u seconds\n", 3598 ctrl->shutdown_timeout); 3599 } else 3600 ctrl->shutdown_timeout = shutdown_timeout; 3601 3602 ctrl->npss = id->npss; 3603 ctrl->apsta = id->apsta; 3604 prev_apst_enabled = ctrl->apst_enabled; 3605 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 3606 if (force_apst && id->apsta) { 3607 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 3608 ctrl->apst_enabled = true; 3609 } else { 3610 ctrl->apst_enabled = false; 3611 } 3612 } else { 3613 ctrl->apst_enabled = id->apsta; 3614 } 3615 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 3616 3617 if (ctrl->ops->flags & NVME_F_FABRICS) { 3618 ctrl->icdoff = le16_to_cpu(id->icdoff); 3619 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 3620 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 3621 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 3622 3623 ret = nvme_check_ctrl_fabric_info(ctrl, id); 3624 if (ret) 3625 goto out_free; 3626 } else { 3627 ctrl->hmpre = le32_to_cpu(id->hmpre); 3628 ctrl->hmmin = le32_to_cpu(id->hmmin); 3629 ctrl->hmminds = le32_to_cpu(id->hmminds); 3630 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 3631 } 3632 3633 ret = nvme_mpath_init_identify(ctrl, id); 3634 if (ret < 0) 3635 goto out_free; 3636 3637 if (ctrl->apst_enabled && !prev_apst_enabled) 3638 dev_pm_qos_expose_latency_tolerance(ctrl->device); 3639 else if (!ctrl->apst_enabled && prev_apst_enabled) 3640 dev_pm_qos_hide_latency_tolerance(ctrl->device); 3641 out_free: 3642 kfree(id); 3643 return ret; 3644 } 3645 3646 /* 3647 * Initialize the cached copies of the Identify data and various controller 3648 * register in our nvme_ctrl structure. This should be called as soon as 3649 * the admin queue is fully up and running. 3650 */ 3651 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended) 3652 { 3653 int ret; 3654 3655 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 3656 if (ret) { 3657 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 3658 return ret; 3659 } 3660 3661 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize); 3662 3663 if (ctrl->vs >= NVME_VS(1, 1, 0)) 3664 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap); 3665 3666 ret = nvme_init_identify(ctrl); 3667 if (ret) 3668 return ret; 3669 3670 ret = nvme_configure_apst(ctrl); 3671 if (ret < 0) 3672 return ret; 3673 3674 ret = nvme_configure_timestamp(ctrl); 3675 if (ret < 0) 3676 return ret; 3677 3678 ret = nvme_configure_host_options(ctrl); 3679 if (ret < 0) 3680 return ret; 3681 3682 nvme_configure_opal(ctrl, was_suspended); 3683 3684 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) { 3685 /* 3686 * Do not return errors unless we are in a controller reset, 3687 * the controller works perfectly fine without hwmon. 3688 */ 3689 ret = nvme_hwmon_init(ctrl); 3690 if (ret == -EINTR) 3691 return ret; 3692 } 3693 3694 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags); 3695 ctrl->identified = true; 3696 3697 nvme_start_keep_alive(ctrl); 3698 3699 return 0; 3700 } 3701 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish); 3702 3703 static int nvme_dev_open(struct inode *inode, struct file *file) 3704 { 3705 struct nvme_ctrl *ctrl = 3706 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3707 3708 switch (nvme_ctrl_state(ctrl)) { 3709 case NVME_CTRL_LIVE: 3710 break; 3711 default: 3712 return -EWOULDBLOCK; 3713 } 3714 3715 nvme_get_ctrl(ctrl); 3716 if (!try_module_get(ctrl->ops->module)) { 3717 nvme_put_ctrl(ctrl); 3718 return -EINVAL; 3719 } 3720 3721 file->private_data = ctrl; 3722 return 0; 3723 } 3724 3725 static int nvme_dev_release(struct inode *inode, struct file *file) 3726 { 3727 struct nvme_ctrl *ctrl = 3728 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3729 3730 module_put(ctrl->ops->module); 3731 nvme_put_ctrl(ctrl); 3732 return 0; 3733 } 3734 3735 static const struct file_operations nvme_dev_fops = { 3736 .owner = THIS_MODULE, 3737 .open = nvme_dev_open, 3738 .release = nvme_dev_release, 3739 .unlocked_ioctl = nvme_dev_ioctl, 3740 .compat_ioctl = compat_ptr_ioctl, 3741 .uring_cmd = nvme_dev_uring_cmd, 3742 }; 3743 3744 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl, 3745 unsigned nsid) 3746 { 3747 struct nvme_ns_head *h; 3748 3749 lockdep_assert_held(&ctrl->subsys->lock); 3750 3751 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) { 3752 /* 3753 * Private namespaces can share NSIDs under some conditions. 3754 * In that case we can't use the same ns_head for namespaces 3755 * with the same NSID. 3756 */ 3757 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h)) 3758 continue; 3759 if (nvme_tryget_ns_head(h)) 3760 return h; 3761 } 3762 3763 return NULL; 3764 } 3765 3766 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys, 3767 struct nvme_ns_ids *ids) 3768 { 3769 bool has_uuid = !uuid_is_null(&ids->uuid); 3770 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid)); 3771 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 3772 struct nvme_ns_head *h; 3773 3774 lockdep_assert_held(&subsys->lock); 3775 3776 list_for_each_entry(h, &subsys->nsheads, entry) { 3777 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid)) 3778 return -EINVAL; 3779 if (has_nguid && 3780 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0) 3781 return -EINVAL; 3782 if (has_eui64 && 3783 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0) 3784 return -EINVAL; 3785 } 3786 3787 return 0; 3788 } 3789 3790 static void nvme_cdev_rel(struct device *dev) 3791 { 3792 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt)); 3793 } 3794 3795 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device) 3796 { 3797 cdev_device_del(cdev, cdev_device); 3798 put_device(cdev_device); 3799 } 3800 3801 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 3802 const struct file_operations *fops, struct module *owner) 3803 { 3804 int minor, ret; 3805 3806 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL); 3807 if (minor < 0) 3808 return minor; 3809 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor); 3810 cdev_device->class = &nvme_ns_chr_class; 3811 cdev_device->release = nvme_cdev_rel; 3812 device_initialize(cdev_device); 3813 cdev_init(cdev, fops); 3814 cdev->owner = owner; 3815 ret = cdev_device_add(cdev, cdev_device); 3816 if (ret) 3817 put_device(cdev_device); 3818 3819 return ret; 3820 } 3821 3822 static int nvme_ns_chr_open(struct inode *inode, struct file *file) 3823 { 3824 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3825 } 3826 3827 static int nvme_ns_chr_release(struct inode *inode, struct file *file) 3828 { 3829 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3830 return 0; 3831 } 3832 3833 static const struct file_operations nvme_ns_chr_fops = { 3834 .owner = THIS_MODULE, 3835 .open = nvme_ns_chr_open, 3836 .release = nvme_ns_chr_release, 3837 .unlocked_ioctl = nvme_ns_chr_ioctl, 3838 .compat_ioctl = compat_ptr_ioctl, 3839 .uring_cmd = nvme_ns_chr_uring_cmd, 3840 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll, 3841 }; 3842 3843 static int nvme_add_ns_cdev(struct nvme_ns *ns) 3844 { 3845 int ret; 3846 3847 ns->cdev_device.parent = ns->ctrl->device; 3848 ret = dev_set_name(&ns->cdev_device, "ng%dn%d", 3849 ns->ctrl->instance, ns->head->instance); 3850 if (ret) 3851 return ret; 3852 3853 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops, 3854 ns->ctrl->ops->module); 3855 } 3856 3857 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 3858 struct nvme_ns_info *info) 3859 { 3860 struct nvme_ns_head *head; 3861 size_t size = sizeof(*head); 3862 int ret = -ENOMEM; 3863 3864 #ifdef CONFIG_NVME_MULTIPATH 3865 size += num_possible_nodes() * sizeof(struct nvme_ns *); 3866 #endif 3867 3868 head = kzalloc(size, GFP_KERNEL); 3869 if (!head) 3870 goto out; 3871 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL); 3872 if (ret < 0) 3873 goto out_free_head; 3874 head->instance = ret; 3875 INIT_LIST_HEAD(&head->list); 3876 ret = init_srcu_struct(&head->srcu); 3877 if (ret) 3878 goto out_ida_remove; 3879 head->subsys = ctrl->subsys; 3880 head->ns_id = info->nsid; 3881 head->ids = info->ids; 3882 head->shared = info->is_shared; 3883 head->rotational = info->is_rotational; 3884 ratelimit_state_init(&head->rs_nuse, 5 * HZ, 1); 3885 ratelimit_set_flags(&head->rs_nuse, RATELIMIT_MSG_ON_RELEASE); 3886 kref_init(&head->ref); 3887 3888 if (head->ids.csi) { 3889 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects); 3890 if (ret) 3891 goto out_cleanup_srcu; 3892 } else 3893 head->effects = ctrl->effects; 3894 3895 ret = nvme_mpath_alloc_disk(ctrl, head); 3896 if (ret) 3897 goto out_cleanup_srcu; 3898 3899 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 3900 3901 kref_get(&ctrl->subsys->ref); 3902 3903 return head; 3904 out_cleanup_srcu: 3905 cleanup_srcu_struct(&head->srcu); 3906 out_ida_remove: 3907 ida_free(&ctrl->subsys->ns_ida, head->instance); 3908 out_free_head: 3909 kfree(head); 3910 out: 3911 if (ret > 0) 3912 ret = blk_status_to_errno(nvme_error_status(ret)); 3913 return ERR_PTR(ret); 3914 } 3915 3916 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this, 3917 struct nvme_ns_ids *ids) 3918 { 3919 struct nvme_subsystem *s; 3920 int ret = 0; 3921 3922 /* 3923 * Note that this check is racy as we try to avoid holding the global 3924 * lock over the whole ns_head creation. But it is only intended as 3925 * a sanity check anyway. 3926 */ 3927 mutex_lock(&nvme_subsystems_lock); 3928 list_for_each_entry(s, &nvme_subsystems, entry) { 3929 if (s == this) 3930 continue; 3931 mutex_lock(&s->lock); 3932 ret = nvme_subsys_check_duplicate_ids(s, ids); 3933 mutex_unlock(&s->lock); 3934 if (ret) 3935 break; 3936 } 3937 mutex_unlock(&nvme_subsystems_lock); 3938 3939 return ret; 3940 } 3941 3942 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info) 3943 { 3944 struct nvme_ctrl *ctrl = ns->ctrl; 3945 struct nvme_ns_head *head = NULL; 3946 int ret; 3947 3948 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids); 3949 if (ret) { 3950 /* 3951 * We've found two different namespaces on two different 3952 * subsystems that report the same ID. This is pretty nasty 3953 * for anything that actually requires unique device 3954 * identification. In the kernel we need this for multipathing, 3955 * and in user space the /dev/disk/by-id/ links rely on it. 3956 * 3957 * If the device also claims to be multi-path capable back off 3958 * here now and refuse the probe the second device as this is a 3959 * recipe for data corruption. If not this is probably a 3960 * cheap consumer device if on the PCIe bus, so let the user 3961 * proceed and use the shiny toy, but warn that with changing 3962 * probing order (which due to our async probing could just be 3963 * device taking longer to startup) the other device could show 3964 * up at any time. 3965 */ 3966 nvme_print_device_info(ctrl); 3967 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */ 3968 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) && 3969 info->is_shared)) { 3970 dev_err(ctrl->device, 3971 "ignoring nsid %d because of duplicate IDs\n", 3972 info->nsid); 3973 return ret; 3974 } 3975 3976 dev_err(ctrl->device, 3977 "clearing duplicate IDs for nsid %d\n", info->nsid); 3978 dev_err(ctrl->device, 3979 "use of /dev/disk/by-id/ may cause data corruption\n"); 3980 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid)); 3981 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid)); 3982 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64)); 3983 ctrl->quirks |= NVME_QUIRK_BOGUS_NID; 3984 } 3985 3986 mutex_lock(&ctrl->subsys->lock); 3987 head = nvme_find_ns_head(ctrl, info->nsid); 3988 if (!head) { 3989 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids); 3990 if (ret) { 3991 dev_err(ctrl->device, 3992 "duplicate IDs in subsystem for nsid %d\n", 3993 info->nsid); 3994 goto out_unlock; 3995 } 3996 head = nvme_alloc_ns_head(ctrl, info); 3997 if (IS_ERR(head)) { 3998 ret = PTR_ERR(head); 3999 goto out_unlock; 4000 } 4001 } else { 4002 ret = -EINVAL; 4003 if ((!info->is_shared || !head->shared) && 4004 !list_empty(&head->list)) { 4005 dev_err(ctrl->device, 4006 "Duplicate unshared namespace %d\n", 4007 info->nsid); 4008 goto out_put_ns_head; 4009 } 4010 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) { 4011 dev_err(ctrl->device, 4012 "IDs don't match for shared namespace %d\n", 4013 info->nsid); 4014 goto out_put_ns_head; 4015 } 4016 4017 if (!multipath) { 4018 dev_warn(ctrl->device, 4019 "Found shared namespace %d, but multipathing not supported.\n", 4020 info->nsid); 4021 dev_warn_once(ctrl->device, 4022 "Shared namespace support requires core_nvme.multipath=Y.\n"); 4023 } 4024 } 4025 4026 list_add_tail_rcu(&ns->siblings, &head->list); 4027 ns->head = head; 4028 mutex_unlock(&ctrl->subsys->lock); 4029 4030 #ifdef CONFIG_NVME_MULTIPATH 4031 cancel_delayed_work(&head->remove_work); 4032 #endif 4033 return 0; 4034 4035 out_put_ns_head: 4036 nvme_put_ns_head(head); 4037 out_unlock: 4038 mutex_unlock(&ctrl->subsys->lock); 4039 return ret; 4040 } 4041 4042 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 4043 { 4044 struct nvme_ns *ns, *ret = NULL; 4045 int srcu_idx; 4046 4047 srcu_idx = srcu_read_lock(&ctrl->srcu); 4048 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4049 srcu_read_lock_held(&ctrl->srcu)) { 4050 if (ns->head->ns_id == nsid) { 4051 if (!nvme_get_ns(ns)) 4052 continue; 4053 ret = ns; 4054 break; 4055 } 4056 if (ns->head->ns_id > nsid) 4057 break; 4058 } 4059 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4060 return ret; 4061 } 4062 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, "NVME_TARGET_PASSTHRU"); 4063 4064 /* 4065 * Add the namespace to the controller list while keeping the list ordered. 4066 */ 4067 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns) 4068 { 4069 struct nvme_ns *tmp; 4070 4071 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) { 4072 if (tmp->head->ns_id < ns->head->ns_id) { 4073 list_add_rcu(&ns->list, &tmp->list); 4074 return; 4075 } 4076 } 4077 list_add_rcu(&ns->list, &ns->ctrl->namespaces); 4078 } 4079 4080 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info) 4081 { 4082 struct queue_limits lim = { }; 4083 struct nvme_ns *ns; 4084 struct gendisk *disk; 4085 int node = ctrl->numa_node; 4086 bool last_path = false; 4087 4088 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 4089 if (!ns) 4090 return; 4091 4092 if (ctrl->opts && ctrl->opts->data_digest) 4093 lim.features |= BLK_FEAT_STABLE_WRITES; 4094 if (ctrl->ops->supports_pci_p2pdma && 4095 ctrl->ops->supports_pci_p2pdma(ctrl)) 4096 lim.features |= BLK_FEAT_PCI_P2PDMA; 4097 4098 disk = blk_mq_alloc_disk(ctrl->tagset, &lim, ns); 4099 if (IS_ERR(disk)) 4100 goto out_free_ns; 4101 disk->fops = &nvme_bdev_ops; 4102 disk->private_data = ns; 4103 4104 ns->disk = disk; 4105 ns->queue = disk->queue; 4106 ns->ctrl = ctrl; 4107 kref_init(&ns->kref); 4108 4109 if (nvme_init_ns_head(ns, info)) 4110 goto out_cleanup_disk; 4111 4112 /* 4113 * If multipathing is enabled, the device name for all disks and not 4114 * just those that represent shared namespaces needs to be based on the 4115 * subsystem instance. Using the controller instance for private 4116 * namespaces could lead to naming collisions between shared and private 4117 * namespaces if they don't use a common numbering scheme. 4118 * 4119 * If multipathing is not enabled, disk names must use the controller 4120 * instance as shared namespaces will show up as multiple block 4121 * devices. 4122 */ 4123 if (nvme_ns_head_multipath(ns->head)) { 4124 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance, 4125 ctrl->instance, ns->head->instance); 4126 disk->flags |= GENHD_FL_HIDDEN; 4127 } else if (multipath) { 4128 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance, 4129 ns->head->instance); 4130 } else { 4131 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, 4132 ns->head->instance); 4133 } 4134 4135 if (nvme_update_ns_info(ns, info)) 4136 goto out_unlink_ns; 4137 4138 mutex_lock(&ctrl->namespaces_lock); 4139 /* 4140 * Ensure that no namespaces are added to the ctrl list after the queues 4141 * are frozen, thereby avoiding a deadlock between scan and reset. 4142 */ 4143 if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) { 4144 mutex_unlock(&ctrl->namespaces_lock); 4145 goto out_unlink_ns; 4146 } 4147 nvme_ns_add_to_ctrl_list(ns); 4148 mutex_unlock(&ctrl->namespaces_lock); 4149 synchronize_srcu(&ctrl->srcu); 4150 nvme_get_ctrl(ctrl); 4151 4152 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_attr_groups)) 4153 goto out_cleanup_ns_from_list; 4154 4155 if (!nvme_ns_head_multipath(ns->head)) 4156 nvme_add_ns_cdev(ns); 4157 4158 nvme_mpath_add_disk(ns, info->anagrpid); 4159 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name); 4160 4161 /* 4162 * Set ns->disk->device->driver_data to ns so we can access 4163 * ns->head->passthru_err_log_enabled in 4164 * nvme_io_passthru_err_log_enabled_[store | show](). 4165 */ 4166 dev_set_drvdata(disk_to_dev(ns->disk), ns); 4167 4168 return; 4169 4170 out_cleanup_ns_from_list: 4171 nvme_put_ctrl(ctrl); 4172 mutex_lock(&ctrl->namespaces_lock); 4173 list_del_rcu(&ns->list); 4174 mutex_unlock(&ctrl->namespaces_lock); 4175 synchronize_srcu(&ctrl->srcu); 4176 out_unlink_ns: 4177 mutex_lock(&ctrl->subsys->lock); 4178 list_del_rcu(&ns->siblings); 4179 if (list_empty(&ns->head->list)) { 4180 list_del_init(&ns->head->entry); 4181 /* 4182 * If multipath is not configured, we still create a namespace 4183 * head (nshead), but head->disk is not initialized in that 4184 * case. As a result, only a single reference to nshead is held 4185 * (via kref_init()) when it is created. Therefore, ensure that 4186 * we do not release the reference to nshead twice if head->disk 4187 * is not present. 4188 */ 4189 if (ns->head->disk) 4190 last_path = true; 4191 } 4192 mutex_unlock(&ctrl->subsys->lock); 4193 if (last_path) 4194 nvme_put_ns_head(ns->head); 4195 nvme_put_ns_head(ns->head); 4196 out_cleanup_disk: 4197 put_disk(disk); 4198 out_free_ns: 4199 kfree(ns); 4200 } 4201 4202 static void nvme_ns_remove(struct nvme_ns *ns) 4203 { 4204 bool last_path = false; 4205 4206 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 4207 return; 4208 4209 clear_bit(NVME_NS_READY, &ns->flags); 4210 set_capacity(ns->disk, 0); 4211 nvme_fault_inject_fini(&ns->fault_inject); 4212 4213 /* 4214 * Ensure that !NVME_NS_READY is seen by other threads to prevent 4215 * this ns going back into current_path. 4216 */ 4217 synchronize_srcu(&ns->head->srcu); 4218 4219 /* wait for concurrent submissions */ 4220 if (nvme_mpath_clear_current_path(ns)) 4221 synchronize_srcu(&ns->head->srcu); 4222 4223 mutex_lock(&ns->ctrl->subsys->lock); 4224 list_del_rcu(&ns->siblings); 4225 if (list_empty(&ns->head->list)) { 4226 if (!nvme_mpath_queue_if_no_path(ns->head)) 4227 list_del_init(&ns->head->entry); 4228 last_path = true; 4229 } 4230 mutex_unlock(&ns->ctrl->subsys->lock); 4231 4232 /* guarantee not available in head->list */ 4233 synchronize_srcu(&ns->head->srcu); 4234 4235 if (!nvme_ns_head_multipath(ns->head)) 4236 nvme_cdev_del(&ns->cdev, &ns->cdev_device); 4237 4238 nvme_mpath_remove_sysfs_link(ns); 4239 4240 del_gendisk(ns->disk); 4241 4242 mutex_lock(&ns->ctrl->namespaces_lock); 4243 list_del_rcu(&ns->list); 4244 mutex_unlock(&ns->ctrl->namespaces_lock); 4245 synchronize_srcu(&ns->ctrl->srcu); 4246 4247 if (last_path) 4248 nvme_mpath_remove_disk(ns->head); 4249 nvme_put_ns(ns); 4250 } 4251 4252 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid) 4253 { 4254 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid); 4255 4256 if (ns) { 4257 nvme_ns_remove(ns); 4258 nvme_put_ns(ns); 4259 } 4260 } 4261 4262 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info) 4263 { 4264 int ret = NVME_SC_INVALID_NS | NVME_STATUS_DNR; 4265 4266 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) { 4267 dev_err(ns->ctrl->device, 4268 "identifiers changed for nsid %d\n", ns->head->ns_id); 4269 goto out; 4270 } 4271 4272 ret = nvme_update_ns_info(ns, info); 4273 out: 4274 /* 4275 * Only remove the namespace if we got a fatal error back from the 4276 * device, otherwise ignore the error and just move on. 4277 * 4278 * TODO: we should probably schedule a delayed retry here. 4279 */ 4280 if (ret > 0 && (ret & NVME_STATUS_DNR)) 4281 nvme_ns_remove(ns); 4282 } 4283 4284 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid) 4285 { 4286 struct nvme_ns_info info = { .nsid = nsid }; 4287 struct nvme_ns *ns; 4288 int ret = 1; 4289 4290 if (nvme_identify_ns_descs(ctrl, &info)) 4291 return; 4292 4293 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) { 4294 dev_warn(ctrl->device, 4295 "command set not reported for nsid: %d\n", nsid); 4296 return; 4297 } 4298 4299 /* 4300 * If available try to use the Command Set Idependent Identify Namespace 4301 * data structure to find all the generic information that is needed to 4302 * set up a namespace. If not fall back to the legacy version. 4303 */ 4304 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) || 4305 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS) || 4306 ctrl->vs >= NVME_VS(2, 0, 0)) 4307 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info); 4308 if (ret > 0) 4309 ret = nvme_ns_info_from_identify(ctrl, &info); 4310 4311 if (info.is_removed) 4312 nvme_ns_remove_by_nsid(ctrl, nsid); 4313 4314 /* 4315 * Ignore the namespace if it is not ready. We will get an AEN once it 4316 * becomes ready and restart the scan. 4317 */ 4318 if (ret || !info.is_ready) 4319 return; 4320 4321 ns = nvme_find_get_ns(ctrl, nsid); 4322 if (ns) { 4323 nvme_validate_ns(ns, &info); 4324 nvme_put_ns(ns); 4325 } else { 4326 nvme_alloc_ns(ctrl, &info); 4327 } 4328 } 4329 4330 /** 4331 * struct async_scan_info - keeps track of controller & NSIDs to scan 4332 * @ctrl: Controller on which namespaces are being scanned 4333 * @next_nsid: Index of next NSID to scan in ns_list 4334 * @ns_list: Pointer to list of NSIDs to scan 4335 * 4336 * Note: There is a single async_scan_info structure shared by all instances 4337 * of nvme_scan_ns_async() scanning a given controller, so the atomic 4338 * operations on next_nsid are critical to ensure each instance scans a unique 4339 * NSID. 4340 */ 4341 struct async_scan_info { 4342 struct nvme_ctrl *ctrl; 4343 atomic_t next_nsid; 4344 __le32 *ns_list; 4345 }; 4346 4347 static void nvme_scan_ns_async(void *data, async_cookie_t cookie) 4348 { 4349 struct async_scan_info *scan_info = data; 4350 int idx; 4351 u32 nsid; 4352 4353 idx = (u32)atomic_fetch_inc(&scan_info->next_nsid); 4354 nsid = le32_to_cpu(scan_info->ns_list[idx]); 4355 4356 nvme_scan_ns(scan_info->ctrl, nsid); 4357 } 4358 4359 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 4360 unsigned nsid) 4361 { 4362 struct nvme_ns *ns, *next; 4363 LIST_HEAD(rm_list); 4364 4365 mutex_lock(&ctrl->namespaces_lock); 4366 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 4367 if (ns->head->ns_id > nsid) { 4368 list_del_rcu(&ns->list); 4369 synchronize_srcu(&ctrl->srcu); 4370 list_add_tail_rcu(&ns->list, &rm_list); 4371 } 4372 } 4373 mutex_unlock(&ctrl->namespaces_lock); 4374 4375 list_for_each_entry_safe(ns, next, &rm_list, list) 4376 nvme_ns_remove(ns); 4377 } 4378 4379 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl) 4380 { 4381 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32); 4382 __le32 *ns_list; 4383 u32 prev = 0; 4384 int ret = 0, i; 4385 ASYNC_DOMAIN(domain); 4386 struct async_scan_info scan_info; 4387 4388 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 4389 if (!ns_list) 4390 return -ENOMEM; 4391 4392 scan_info.ctrl = ctrl; 4393 scan_info.ns_list = ns_list; 4394 for (;;) { 4395 struct nvme_command cmd = { 4396 .identify.opcode = nvme_admin_identify, 4397 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST, 4398 .identify.nsid = cpu_to_le32(prev), 4399 }; 4400 4401 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list, 4402 NVME_IDENTIFY_DATA_SIZE); 4403 if (ret) { 4404 dev_warn(ctrl->device, 4405 "Identify NS List failed (status=0x%x)\n", ret); 4406 goto free; 4407 } 4408 4409 atomic_set(&scan_info.next_nsid, 0); 4410 for (i = 0; i < nr_entries; i++) { 4411 u32 nsid = le32_to_cpu(ns_list[i]); 4412 4413 if (!nsid) /* end of the list? */ 4414 goto out; 4415 async_schedule_domain(nvme_scan_ns_async, &scan_info, 4416 &domain); 4417 while (++prev < nsid) 4418 nvme_ns_remove_by_nsid(ctrl, prev); 4419 } 4420 async_synchronize_full_domain(&domain); 4421 } 4422 out: 4423 nvme_remove_invalid_namespaces(ctrl, prev); 4424 free: 4425 async_synchronize_full_domain(&domain); 4426 kfree(ns_list); 4427 return ret; 4428 } 4429 4430 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl) 4431 { 4432 struct nvme_id_ctrl *id; 4433 u32 nn, i; 4434 4435 if (nvme_identify_ctrl(ctrl, &id)) 4436 return; 4437 nn = le32_to_cpu(id->nn); 4438 kfree(id); 4439 4440 for (i = 1; i <= nn; i++) 4441 nvme_scan_ns(ctrl, i); 4442 4443 nvme_remove_invalid_namespaces(ctrl, nn); 4444 } 4445 4446 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 4447 { 4448 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 4449 __le32 *log; 4450 int error; 4451 4452 log = kzalloc(log_size, GFP_KERNEL); 4453 if (!log) 4454 return; 4455 4456 /* 4457 * We need to read the log to clear the AEN, but we don't want to rely 4458 * on it for the changed namespace information as userspace could have 4459 * raced with us in reading the log page, which could cause us to miss 4460 * updates. 4461 */ 4462 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, 4463 NVME_CSI_NVM, log, log_size, 0); 4464 if (error) 4465 dev_warn(ctrl->device, 4466 "reading changed ns log failed: %d\n", error); 4467 4468 kfree(log); 4469 } 4470 4471 static void nvme_scan_work(struct work_struct *work) 4472 { 4473 struct nvme_ctrl *ctrl = 4474 container_of(work, struct nvme_ctrl, scan_work); 4475 int ret; 4476 4477 /* No tagset on a live ctrl means IO queues could not created */ 4478 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset) 4479 return; 4480 4481 /* 4482 * Identify controller limits can change at controller reset due to 4483 * new firmware download, even though it is not common we cannot ignore 4484 * such scenario. Controller's non-mdts limits are reported in the unit 4485 * of logical blocks that is dependent on the format of attached 4486 * namespace. Hence re-read the limits at the time of ns allocation. 4487 */ 4488 ret = nvme_init_non_mdts_limits(ctrl); 4489 if (ret < 0) { 4490 dev_warn(ctrl->device, 4491 "reading non-mdts-limits failed: %d\n", ret); 4492 return; 4493 } 4494 4495 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 4496 dev_info(ctrl->device, "rescanning namespaces.\n"); 4497 nvme_clear_changed_ns_log(ctrl); 4498 } 4499 4500 mutex_lock(&ctrl->scan_lock); 4501 if (!nvme_id_cns_ok(ctrl, NVME_ID_CNS_NS_ACTIVE_LIST)) { 4502 nvme_scan_ns_sequential(ctrl); 4503 } else { 4504 /* 4505 * Fall back to sequential scan if DNR is set to handle broken 4506 * devices which should support Identify NS List (as per the VS 4507 * they report) but don't actually support it. 4508 */ 4509 ret = nvme_scan_ns_list(ctrl); 4510 if (ret > 0 && ret & NVME_STATUS_DNR) 4511 nvme_scan_ns_sequential(ctrl); 4512 } 4513 mutex_unlock(&ctrl->scan_lock); 4514 4515 /* Requeue if we have missed AENs */ 4516 if (test_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) 4517 nvme_queue_scan(ctrl); 4518 #ifdef CONFIG_NVME_MULTIPATH 4519 else if (ctrl->ana_log_buf) 4520 /* Re-read the ANA log page to not miss updates */ 4521 queue_work(nvme_wq, &ctrl->ana_work); 4522 #endif 4523 } 4524 4525 /* 4526 * This function iterates the namespace list unlocked to allow recovery from 4527 * controller failure. It is up to the caller to ensure the namespace list is 4528 * not modified by scan work while this function is executing. 4529 */ 4530 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 4531 { 4532 struct nvme_ns *ns, *next; 4533 LIST_HEAD(ns_list); 4534 4535 /* 4536 * make sure to requeue I/O to all namespaces as these 4537 * might result from the scan itself and must complete 4538 * for the scan_work to make progress 4539 */ 4540 nvme_mpath_clear_ctrl_paths(ctrl); 4541 4542 /* 4543 * Unquiesce io queues so any pending IO won't hang, especially 4544 * those submitted from scan work 4545 */ 4546 nvme_unquiesce_io_queues(ctrl); 4547 4548 /* prevent racing with ns scanning */ 4549 flush_work(&ctrl->scan_work); 4550 4551 /* 4552 * The dead states indicates the controller was not gracefully 4553 * disconnected. In that case, we won't be able to flush any data while 4554 * removing the namespaces' disks; fail all the queues now to avoid 4555 * potentially having to clean up the failed sync later. 4556 */ 4557 if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD) 4558 nvme_mark_namespaces_dead(ctrl); 4559 4560 /* this is a no-op when called from the controller reset handler */ 4561 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO); 4562 4563 mutex_lock(&ctrl->namespaces_lock); 4564 list_splice_init_rcu(&ctrl->namespaces, &ns_list, synchronize_rcu); 4565 mutex_unlock(&ctrl->namespaces_lock); 4566 synchronize_srcu(&ctrl->srcu); 4567 4568 list_for_each_entry_safe(ns, next, &ns_list, list) 4569 nvme_ns_remove(ns); 4570 } 4571 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 4572 4573 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env) 4574 { 4575 const struct nvme_ctrl *ctrl = 4576 container_of(dev, struct nvme_ctrl, ctrl_device); 4577 struct nvmf_ctrl_options *opts = ctrl->opts; 4578 int ret; 4579 4580 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name); 4581 if (ret) 4582 return ret; 4583 4584 if (opts) { 4585 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr); 4586 if (ret) 4587 return ret; 4588 4589 ret = add_uevent_var(env, "NVME_TRSVCID=%s", 4590 opts->trsvcid ?: "none"); 4591 if (ret) 4592 return ret; 4593 4594 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s", 4595 opts->host_traddr ?: "none"); 4596 if (ret) 4597 return ret; 4598 4599 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s", 4600 opts->host_iface ?: "none"); 4601 } 4602 return ret; 4603 } 4604 4605 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata) 4606 { 4607 char *envp[2] = { envdata, NULL }; 4608 4609 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4610 } 4611 4612 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 4613 { 4614 char *envp[2] = { NULL, NULL }; 4615 u32 aen_result = ctrl->aen_result; 4616 4617 ctrl->aen_result = 0; 4618 if (!aen_result) 4619 return; 4620 4621 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 4622 if (!envp[0]) 4623 return; 4624 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4625 kfree(envp[0]); 4626 } 4627 4628 static void nvme_async_event_work(struct work_struct *work) 4629 { 4630 struct nvme_ctrl *ctrl = 4631 container_of(work, struct nvme_ctrl, async_event_work); 4632 4633 nvme_aen_uevent(ctrl); 4634 4635 /* 4636 * The transport drivers must guarantee AER submission here is safe by 4637 * flushing ctrl async_event_work after changing the controller state 4638 * from LIVE and before freeing the admin queue. 4639 */ 4640 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 4641 ctrl->ops->submit_async_event(ctrl); 4642 } 4643 4644 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 4645 { 4646 4647 u32 csts; 4648 4649 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 4650 return false; 4651 4652 if (csts == ~0) 4653 return false; 4654 4655 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 4656 } 4657 4658 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 4659 { 4660 struct nvme_fw_slot_info_log *log; 4661 u8 next_fw_slot, cur_fw_slot; 4662 4663 log = kmalloc(sizeof(*log), GFP_KERNEL); 4664 if (!log) 4665 return; 4666 4667 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM, 4668 log, sizeof(*log), 0)) { 4669 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 4670 goto out_free_log; 4671 } 4672 4673 cur_fw_slot = log->afi & 0x7; 4674 next_fw_slot = (log->afi & 0x70) >> 4; 4675 if (!cur_fw_slot || (next_fw_slot && (cur_fw_slot != next_fw_slot))) { 4676 dev_info(ctrl->device, 4677 "Firmware is activated after next Controller Level Reset\n"); 4678 goto out_free_log; 4679 } 4680 4681 memcpy(ctrl->subsys->firmware_rev, &log->frs[cur_fw_slot - 1], 4682 sizeof(ctrl->subsys->firmware_rev)); 4683 4684 out_free_log: 4685 kfree(log); 4686 } 4687 4688 static void nvme_fw_act_work(struct work_struct *work) 4689 { 4690 struct nvme_ctrl *ctrl = container_of(work, 4691 struct nvme_ctrl, fw_act_work); 4692 unsigned long fw_act_timeout; 4693 4694 nvme_auth_stop(ctrl); 4695 4696 if (ctrl->mtfa) 4697 fw_act_timeout = jiffies + msecs_to_jiffies(ctrl->mtfa * 100); 4698 else 4699 fw_act_timeout = jiffies + secs_to_jiffies(admin_timeout); 4700 4701 nvme_quiesce_io_queues(ctrl); 4702 while (nvme_ctrl_pp_status(ctrl)) { 4703 if (time_after(jiffies, fw_act_timeout)) { 4704 dev_warn(ctrl->device, 4705 "Fw activation timeout, reset controller\n"); 4706 nvme_try_sched_reset(ctrl); 4707 return; 4708 } 4709 msleep(100); 4710 } 4711 4712 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_CONNECTING) || 4713 !nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE)) 4714 return; 4715 4716 nvme_unquiesce_io_queues(ctrl); 4717 /* read FW slot information to clear the AER */ 4718 nvme_get_fw_slot_info(ctrl); 4719 4720 queue_work(nvme_wq, &ctrl->async_event_work); 4721 } 4722 4723 static u32 nvme_aer_type(u32 result) 4724 { 4725 return result & 0x7; 4726 } 4727 4728 static u32 nvme_aer_subtype(u32 result) 4729 { 4730 return (result & 0xff00) >> 8; 4731 } 4732 4733 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 4734 { 4735 u32 aer_notice_type = nvme_aer_subtype(result); 4736 bool requeue = true; 4737 4738 switch (aer_notice_type) { 4739 case NVME_AER_NOTICE_NS_CHANGED: 4740 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 4741 nvme_queue_scan(ctrl); 4742 break; 4743 case NVME_AER_NOTICE_FW_ACT_STARTING: 4744 /* 4745 * We are (ab)using the RESETTING state to prevent subsequent 4746 * recovery actions from interfering with the controller's 4747 * firmware activation. 4748 */ 4749 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) { 4750 requeue = false; 4751 queue_work(nvme_wq, &ctrl->fw_act_work); 4752 } 4753 break; 4754 #ifdef CONFIG_NVME_MULTIPATH 4755 case NVME_AER_NOTICE_ANA: 4756 if (!ctrl->ana_log_buf) 4757 break; 4758 queue_work(nvme_wq, &ctrl->ana_work); 4759 break; 4760 #endif 4761 case NVME_AER_NOTICE_DISC_CHANGED: 4762 ctrl->aen_result = result; 4763 break; 4764 default: 4765 dev_warn(ctrl->device, "async event result %08x\n", result); 4766 } 4767 return requeue; 4768 } 4769 4770 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl) 4771 { 4772 dev_warn(ctrl->device, 4773 "resetting controller due to persistent internal error\n"); 4774 nvme_reset_ctrl(ctrl); 4775 } 4776 4777 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 4778 volatile union nvme_result *res) 4779 { 4780 u32 result = le32_to_cpu(res->u32); 4781 u32 aer_type = nvme_aer_type(result); 4782 u32 aer_subtype = nvme_aer_subtype(result); 4783 bool requeue = true; 4784 4785 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 4786 return; 4787 4788 trace_nvme_async_event(ctrl, result); 4789 switch (aer_type) { 4790 case NVME_AER_NOTICE: 4791 requeue = nvme_handle_aen_notice(ctrl, result); 4792 break; 4793 case NVME_AER_ERROR: 4794 /* 4795 * For a persistent internal error, don't run async_event_work 4796 * to submit a new AER. The controller reset will do it. 4797 */ 4798 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) { 4799 nvme_handle_aer_persistent_error(ctrl); 4800 return; 4801 } 4802 fallthrough; 4803 case NVME_AER_SMART: 4804 case NVME_AER_CSS: 4805 case NVME_AER_VS: 4806 ctrl->aen_result = result; 4807 break; 4808 default: 4809 break; 4810 } 4811 4812 if (requeue) 4813 queue_work(nvme_wq, &ctrl->async_event_work); 4814 } 4815 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 4816 4817 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4818 const struct blk_mq_ops *ops, unsigned int cmd_size) 4819 { 4820 struct queue_limits lim = {}; 4821 int ret; 4822 4823 memset(set, 0, sizeof(*set)); 4824 set->ops = ops; 4825 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 4826 if (ctrl->ops->flags & NVME_F_FABRICS) 4827 /* Reserved for fabric connect and keep alive */ 4828 set->reserved_tags = 2; 4829 set->numa_node = ctrl->numa_node; 4830 if (ctrl->ops->flags & NVME_F_BLOCKING) 4831 set->flags |= BLK_MQ_F_BLOCKING; 4832 set->cmd_size = cmd_size; 4833 set->driver_data = ctrl; 4834 set->nr_hw_queues = 1; 4835 set->timeout = NVME_ADMIN_TIMEOUT; 4836 ret = blk_mq_alloc_tag_set(set); 4837 if (ret) 4838 return ret; 4839 4840 ctrl->admin_q = blk_mq_alloc_queue(set, &lim, NULL); 4841 if (IS_ERR(ctrl->admin_q)) { 4842 ret = PTR_ERR(ctrl->admin_q); 4843 goto out_free_tagset; 4844 } 4845 4846 if (ctrl->ops->flags & NVME_F_FABRICS) { 4847 ctrl->fabrics_q = blk_mq_alloc_queue(set, NULL, NULL); 4848 if (IS_ERR(ctrl->fabrics_q)) { 4849 ret = PTR_ERR(ctrl->fabrics_q); 4850 goto out_cleanup_admin_q; 4851 } 4852 } 4853 4854 ctrl->admin_tagset = set; 4855 return 0; 4856 4857 out_cleanup_admin_q: 4858 blk_mq_destroy_queue(ctrl->admin_q); 4859 blk_put_queue(ctrl->admin_q); 4860 out_free_tagset: 4861 blk_mq_free_tag_set(set); 4862 ctrl->admin_q = NULL; 4863 ctrl->fabrics_q = NULL; 4864 return ret; 4865 } 4866 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set); 4867 4868 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl) 4869 { 4870 /* 4871 * As we're about to destroy the queue and free tagset 4872 * we can not have keep-alive work running. 4873 */ 4874 nvme_stop_keep_alive(ctrl); 4875 blk_mq_destroy_queue(ctrl->admin_q); 4876 blk_put_queue(ctrl->admin_q); 4877 if (ctrl->ops->flags & NVME_F_FABRICS) { 4878 blk_mq_destroy_queue(ctrl->fabrics_q); 4879 blk_put_queue(ctrl->fabrics_q); 4880 } 4881 blk_mq_free_tag_set(ctrl->admin_tagset); 4882 } 4883 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set); 4884 4885 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4886 const struct blk_mq_ops *ops, unsigned int nr_maps, 4887 unsigned int cmd_size) 4888 { 4889 int ret; 4890 4891 memset(set, 0, sizeof(*set)); 4892 set->ops = ops; 4893 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1); 4894 /* 4895 * Some Apple controllers requires tags to be unique across admin and 4896 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue. 4897 */ 4898 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS) 4899 set->reserved_tags = NVME_AQ_DEPTH; 4900 else if (ctrl->ops->flags & NVME_F_FABRICS) 4901 /* Reserved for fabric connect */ 4902 set->reserved_tags = 1; 4903 set->numa_node = ctrl->numa_node; 4904 if (ctrl->ops->flags & NVME_F_BLOCKING) 4905 set->flags |= BLK_MQ_F_BLOCKING; 4906 set->cmd_size = cmd_size; 4907 set->driver_data = ctrl; 4908 set->nr_hw_queues = ctrl->queue_count - 1; 4909 set->timeout = NVME_IO_TIMEOUT; 4910 set->nr_maps = nr_maps; 4911 ret = blk_mq_alloc_tag_set(set); 4912 if (ret) 4913 return ret; 4914 4915 if (ctrl->ops->flags & NVME_F_FABRICS) { 4916 struct queue_limits lim = { 4917 .features = BLK_FEAT_SKIP_TAGSET_QUIESCE, 4918 }; 4919 4920 ctrl->connect_q = blk_mq_alloc_queue(set, &lim, NULL); 4921 if (IS_ERR(ctrl->connect_q)) { 4922 ret = PTR_ERR(ctrl->connect_q); 4923 goto out_free_tag_set; 4924 } 4925 } 4926 4927 ctrl->tagset = set; 4928 return 0; 4929 4930 out_free_tag_set: 4931 blk_mq_free_tag_set(set); 4932 ctrl->connect_q = NULL; 4933 return ret; 4934 } 4935 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set); 4936 4937 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl) 4938 { 4939 if (ctrl->ops->flags & NVME_F_FABRICS) { 4940 blk_mq_destroy_queue(ctrl->connect_q); 4941 blk_put_queue(ctrl->connect_q); 4942 } 4943 blk_mq_free_tag_set(ctrl->tagset); 4944 } 4945 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set); 4946 4947 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 4948 { 4949 nvme_mpath_stop(ctrl); 4950 nvme_auth_stop(ctrl); 4951 nvme_stop_failfast_work(ctrl); 4952 flush_work(&ctrl->async_event_work); 4953 cancel_work_sync(&ctrl->fw_act_work); 4954 if (ctrl->ops->stop_ctrl) 4955 ctrl->ops->stop_ctrl(ctrl); 4956 } 4957 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 4958 4959 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 4960 { 4961 nvme_enable_aen(ctrl); 4962 4963 /* 4964 * persistent discovery controllers need to send indication to userspace 4965 * to re-read the discovery log page to learn about possible changes 4966 * that were missed. We identify persistent discovery controllers by 4967 * checking that they started once before, hence are reconnecting back. 4968 */ 4969 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) && 4970 nvme_discovery_ctrl(ctrl)) 4971 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover"); 4972 4973 if (ctrl->queue_count > 1) { 4974 nvme_queue_scan(ctrl); 4975 nvme_unquiesce_io_queues(ctrl); 4976 nvme_mpath_update(ctrl); 4977 } 4978 4979 nvme_change_uevent(ctrl, "NVME_EVENT=connected"); 4980 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags); 4981 } 4982 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 4983 4984 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 4985 { 4986 nvme_stop_keep_alive(ctrl); 4987 nvme_hwmon_exit(ctrl); 4988 nvme_fault_inject_fini(&ctrl->fault_inject); 4989 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4990 cdev_device_del(&ctrl->cdev, ctrl->device); 4991 nvme_put_ctrl(ctrl); 4992 } 4993 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 4994 4995 static void nvme_free_cels(struct nvme_ctrl *ctrl) 4996 { 4997 struct nvme_effects_log *cel; 4998 unsigned long i; 4999 5000 xa_for_each(&ctrl->cels, i, cel) { 5001 xa_erase(&ctrl->cels, i); 5002 kfree(cel); 5003 } 5004 5005 xa_destroy(&ctrl->cels); 5006 } 5007 5008 static void nvme_free_ctrl(struct device *dev) 5009 { 5010 struct nvme_ctrl *ctrl = 5011 container_of(dev, struct nvme_ctrl, ctrl_device); 5012 struct nvme_subsystem *subsys = ctrl->subsys; 5013 5014 if (!subsys || ctrl->instance != subsys->instance) 5015 ida_free(&nvme_instance_ida, ctrl->instance); 5016 nvme_free_cels(ctrl); 5017 nvme_mpath_uninit(ctrl); 5018 cleanup_srcu_struct(&ctrl->srcu); 5019 nvme_auth_stop(ctrl); 5020 nvme_auth_free(ctrl); 5021 __free_page(ctrl->discard_page); 5022 free_opal_dev(ctrl->opal_dev); 5023 5024 if (subsys) { 5025 mutex_lock(&nvme_subsystems_lock); 5026 list_del(&ctrl->subsys_entry); 5027 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 5028 mutex_unlock(&nvme_subsystems_lock); 5029 } 5030 5031 ctrl->ops->free_ctrl(ctrl); 5032 5033 if (subsys) 5034 nvme_put_subsystem(subsys); 5035 } 5036 5037 /* 5038 * Initialize a NVMe controller structures. This needs to be called during 5039 * earliest initialization so that we have the initialized structured around 5040 * during probing. 5041 * 5042 * On success, the caller must use the nvme_put_ctrl() to release this when 5043 * needed, which also invokes the ops->free_ctrl() callback. 5044 */ 5045 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 5046 const struct nvme_ctrl_ops *ops, unsigned long quirks) 5047 { 5048 int ret; 5049 5050 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW); 5051 ctrl->passthru_err_log_enabled = false; 5052 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 5053 spin_lock_init(&ctrl->lock); 5054 mutex_init(&ctrl->namespaces_lock); 5055 5056 ret = init_srcu_struct(&ctrl->srcu); 5057 if (ret) 5058 return ret; 5059 5060 mutex_init(&ctrl->scan_lock); 5061 INIT_LIST_HEAD(&ctrl->namespaces); 5062 xa_init(&ctrl->cels); 5063 ctrl->dev = dev; 5064 ctrl->ops = ops; 5065 ctrl->quirks = quirks; 5066 ctrl->numa_node = NUMA_NO_NODE; 5067 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 5068 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 5069 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 5070 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 5071 init_waitqueue_head(&ctrl->state_wq); 5072 5073 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 5074 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work); 5075 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 5076 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 5077 ctrl->ka_last_check_time = jiffies; 5078 5079 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 5080 PAGE_SIZE); 5081 ctrl->discard_page = alloc_page(GFP_KERNEL); 5082 if (!ctrl->discard_page) { 5083 ret = -ENOMEM; 5084 goto out; 5085 } 5086 5087 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL); 5088 if (ret < 0) 5089 goto out; 5090 ctrl->instance = ret; 5091 5092 ret = nvme_auth_init_ctrl(ctrl); 5093 if (ret) 5094 goto out_release_instance; 5095 5096 nvme_mpath_init_ctrl(ctrl); 5097 5098 device_initialize(&ctrl->ctrl_device); 5099 ctrl->device = &ctrl->ctrl_device; 5100 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt), 5101 ctrl->instance); 5102 ctrl->device->class = &nvme_class; 5103 ctrl->device->parent = ctrl->dev; 5104 if (ops->dev_attr_groups) 5105 ctrl->device->groups = ops->dev_attr_groups; 5106 else 5107 ctrl->device->groups = nvme_dev_attr_groups; 5108 ctrl->device->release = nvme_free_ctrl; 5109 dev_set_drvdata(ctrl->device, ctrl); 5110 5111 return ret; 5112 5113 out_release_instance: 5114 ida_free(&nvme_instance_ida, ctrl->instance); 5115 out: 5116 if (ctrl->discard_page) 5117 __free_page(ctrl->discard_page); 5118 cleanup_srcu_struct(&ctrl->srcu); 5119 return ret; 5120 } 5121 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 5122 5123 /* 5124 * On success, returns with an elevated controller reference and caller must 5125 * use nvme_uninit_ctrl() to properly free resources associated with the ctrl. 5126 */ 5127 int nvme_add_ctrl(struct nvme_ctrl *ctrl) 5128 { 5129 int ret; 5130 5131 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 5132 if (ret) 5133 return ret; 5134 5135 cdev_init(&ctrl->cdev, &nvme_dev_fops); 5136 ctrl->cdev.owner = ctrl->ops->module; 5137 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 5138 if (ret) 5139 return ret; 5140 5141 /* 5142 * Initialize latency tolerance controls. The sysfs files won't 5143 * be visible to userspace unless the device actually supports APST. 5144 */ 5145 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 5146 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 5147 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 5148 5149 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device)); 5150 nvme_get_ctrl(ctrl); 5151 5152 return 0; 5153 } 5154 EXPORT_SYMBOL_GPL(nvme_add_ctrl); 5155 5156 /* let I/O to all namespaces fail in preparation for surprise removal */ 5157 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl) 5158 { 5159 struct nvme_ns *ns; 5160 int srcu_idx; 5161 5162 srcu_idx = srcu_read_lock(&ctrl->srcu); 5163 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 5164 srcu_read_lock_held(&ctrl->srcu)) 5165 blk_mark_disk_dead(ns->disk); 5166 srcu_read_unlock(&ctrl->srcu, srcu_idx); 5167 } 5168 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead); 5169 5170 void nvme_unfreeze(struct nvme_ctrl *ctrl) 5171 { 5172 struct nvme_ns *ns; 5173 int srcu_idx; 5174 5175 srcu_idx = srcu_read_lock(&ctrl->srcu); 5176 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 5177 srcu_read_lock_held(&ctrl->srcu)) 5178 blk_mq_unfreeze_queue_non_owner(ns->queue); 5179 srcu_read_unlock(&ctrl->srcu, srcu_idx); 5180 clear_bit(NVME_CTRL_FROZEN, &ctrl->flags); 5181 } 5182 EXPORT_SYMBOL_GPL(nvme_unfreeze); 5183 5184 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 5185 { 5186 struct nvme_ns *ns; 5187 int srcu_idx; 5188 5189 srcu_idx = srcu_read_lock(&ctrl->srcu); 5190 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 5191 srcu_read_lock_held(&ctrl->srcu)) { 5192 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 5193 if (timeout <= 0) 5194 break; 5195 } 5196 srcu_read_unlock(&ctrl->srcu, srcu_idx); 5197 return timeout; 5198 } 5199 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 5200 5201 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 5202 { 5203 struct nvme_ns *ns; 5204 int srcu_idx; 5205 5206 srcu_idx = srcu_read_lock(&ctrl->srcu); 5207 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 5208 srcu_read_lock_held(&ctrl->srcu)) 5209 blk_mq_freeze_queue_wait(ns->queue); 5210 srcu_read_unlock(&ctrl->srcu, srcu_idx); 5211 } 5212 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 5213 5214 void nvme_start_freeze(struct nvme_ctrl *ctrl) 5215 { 5216 struct nvme_ns *ns; 5217 int srcu_idx; 5218 5219 set_bit(NVME_CTRL_FROZEN, &ctrl->flags); 5220 srcu_idx = srcu_read_lock(&ctrl->srcu); 5221 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 5222 srcu_read_lock_held(&ctrl->srcu)) 5223 /* 5224 * Typical non_owner use case is from pci driver, in which 5225 * start_freeze is called from timeout work function, but 5226 * unfreeze is done in reset work context 5227 */ 5228 blk_freeze_queue_start_non_owner(ns->queue); 5229 srcu_read_unlock(&ctrl->srcu, srcu_idx); 5230 } 5231 EXPORT_SYMBOL_GPL(nvme_start_freeze); 5232 5233 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl) 5234 { 5235 if (!ctrl->tagset) 5236 return; 5237 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 5238 blk_mq_quiesce_tagset(ctrl->tagset); 5239 else 5240 blk_mq_wait_quiesce_done(ctrl->tagset); 5241 } 5242 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues); 5243 5244 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl) 5245 { 5246 if (!ctrl->tagset) 5247 return; 5248 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 5249 blk_mq_unquiesce_tagset(ctrl->tagset); 5250 } 5251 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues); 5252 5253 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl) 5254 { 5255 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 5256 blk_mq_quiesce_queue(ctrl->admin_q); 5257 else 5258 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set); 5259 } 5260 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue); 5261 5262 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl) 5263 { 5264 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 5265 blk_mq_unquiesce_queue(ctrl->admin_q); 5266 } 5267 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue); 5268 5269 void nvme_sync_io_queues(struct nvme_ctrl *ctrl) 5270 { 5271 struct nvme_ns *ns; 5272 int srcu_idx; 5273 5274 srcu_idx = srcu_read_lock(&ctrl->srcu); 5275 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 5276 srcu_read_lock_held(&ctrl->srcu)) 5277 blk_sync_queue(ns->queue); 5278 srcu_read_unlock(&ctrl->srcu, srcu_idx); 5279 } 5280 EXPORT_SYMBOL_GPL(nvme_sync_io_queues); 5281 5282 void nvme_sync_queues(struct nvme_ctrl *ctrl) 5283 { 5284 nvme_sync_io_queues(ctrl); 5285 if (ctrl->admin_q) 5286 blk_sync_queue(ctrl->admin_q); 5287 } 5288 EXPORT_SYMBOL_GPL(nvme_sync_queues); 5289 5290 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file) 5291 { 5292 if (file->f_op != &nvme_dev_fops) 5293 return NULL; 5294 return file->private_data; 5295 } 5296 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, "NVME_TARGET_PASSTHRU"); 5297 5298 /* 5299 * Check we didn't inadvertently grow the command structure sizes: 5300 */ 5301 static inline void _nvme_check_size(void) 5302 { 5303 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64); 5304 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 5305 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64); 5306 BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 5307 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64); 5308 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 5309 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64); 5310 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64); 5311 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 5312 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64); 5313 BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 5314 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE); 5315 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE); 5316 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) != 5317 NVME_IDENTIFY_DATA_SIZE); 5318 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE); 5319 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE); 5320 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE); 5321 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE); 5322 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 5323 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 5324 BUILD_BUG_ON(sizeof(struct nvme_endurance_group_log) != 512); 5325 BUILD_BUG_ON(sizeof(struct nvme_rotational_media_log) != 512); 5326 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 5327 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64); 5328 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512); 5329 } 5330 5331 5332 static int __init nvme_core_init(void) 5333 { 5334 unsigned int wq_flags = WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS; 5335 int result = -ENOMEM; 5336 5337 _nvme_check_size(); 5338 5339 nvme_wq = alloc_workqueue("nvme-wq", wq_flags, 0); 5340 if (!nvme_wq) 5341 goto out; 5342 5343 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", wq_flags, 0); 5344 if (!nvme_reset_wq) 5345 goto destroy_wq; 5346 5347 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", wq_flags, 0); 5348 if (!nvme_delete_wq) 5349 goto destroy_reset_wq; 5350 5351 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0, 5352 NVME_MINORS, "nvme"); 5353 if (result < 0) 5354 goto destroy_delete_wq; 5355 5356 result = class_register(&nvme_class); 5357 if (result) 5358 goto unregister_chrdev; 5359 5360 result = class_register(&nvme_subsys_class); 5361 if (result) 5362 goto destroy_class; 5363 5364 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS, 5365 "nvme-generic"); 5366 if (result < 0) 5367 goto destroy_subsys_class; 5368 5369 result = class_register(&nvme_ns_chr_class); 5370 if (result) 5371 goto unregister_generic_ns; 5372 5373 result = nvme_init_auth(); 5374 if (result) 5375 goto destroy_ns_chr; 5376 return 0; 5377 5378 destroy_ns_chr: 5379 class_unregister(&nvme_ns_chr_class); 5380 unregister_generic_ns: 5381 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 5382 destroy_subsys_class: 5383 class_unregister(&nvme_subsys_class); 5384 destroy_class: 5385 class_unregister(&nvme_class); 5386 unregister_chrdev: 5387 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 5388 destroy_delete_wq: 5389 destroy_workqueue(nvme_delete_wq); 5390 destroy_reset_wq: 5391 destroy_workqueue(nvme_reset_wq); 5392 destroy_wq: 5393 destroy_workqueue(nvme_wq); 5394 out: 5395 return result; 5396 } 5397 5398 static void __exit nvme_core_exit(void) 5399 { 5400 nvme_exit_auth(); 5401 class_unregister(&nvme_ns_chr_class); 5402 class_unregister(&nvme_subsys_class); 5403 class_unregister(&nvme_class); 5404 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 5405 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 5406 destroy_workqueue(nvme_delete_wq); 5407 destroy_workqueue(nvme_reset_wq); 5408 destroy_workqueue(nvme_wq); 5409 ida_destroy(&nvme_ns_chr_minor_ida); 5410 ida_destroy(&nvme_instance_ida); 5411 } 5412 5413 MODULE_LICENSE("GPL"); 5414 MODULE_VERSION("1.0"); 5415 MODULE_DESCRIPTION("NVMe host core framework"); 5416 module_init(nvme_core_init); 5417 module_exit(nvme_core_exit); 5418