1 /* 2 * NVM Express device driver 3 * Copyright (c) 2011-2014, Intel Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 */ 14 15 #include <linux/blkdev.h> 16 #include <linux/blk-mq.h> 17 #include <linux/delay.h> 18 #include <linux/errno.h> 19 #include <linux/hdreg.h> 20 #include <linux/kernel.h> 21 #include <linux/module.h> 22 #include <linux/list_sort.h> 23 #include <linux/slab.h> 24 #include <linux/types.h> 25 #include <linux/pr.h> 26 #include <linux/ptrace.h> 27 #include <linux/nvme_ioctl.h> 28 #include <linux/t10-pi.h> 29 #include <linux/pm_qos.h> 30 #include <asm/unaligned.h> 31 32 #include "nvme.h" 33 #include "fabrics.h" 34 35 #define NVME_MINORS (1U << MINORBITS) 36 37 unsigned char admin_timeout = 60; 38 module_param(admin_timeout, byte, 0644); 39 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 40 EXPORT_SYMBOL_GPL(admin_timeout); 41 42 unsigned char nvme_io_timeout = 30; 43 module_param_named(io_timeout, nvme_io_timeout, byte, 0644); 44 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 45 EXPORT_SYMBOL_GPL(nvme_io_timeout); 46 47 static unsigned char shutdown_timeout = 5; 48 module_param(shutdown_timeout, byte, 0644); 49 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 50 51 static u8 nvme_max_retries = 5; 52 module_param_named(max_retries, nvme_max_retries, byte, 0644); 53 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 54 55 static int nvme_char_major; 56 module_param(nvme_char_major, int, 0); 57 58 static unsigned long default_ps_max_latency_us = 100000; 59 module_param(default_ps_max_latency_us, ulong, 0644); 60 MODULE_PARM_DESC(default_ps_max_latency_us, 61 "max power saving latency for new devices; use PM QOS to change per device"); 62 63 static bool force_apst; 64 module_param(force_apst, bool, 0644); 65 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 66 67 static bool streams; 68 module_param(streams, bool, 0644); 69 MODULE_PARM_DESC(streams, "turn on support for Streams write directives"); 70 71 struct workqueue_struct *nvme_wq; 72 EXPORT_SYMBOL_GPL(nvme_wq); 73 74 static LIST_HEAD(nvme_ctrl_list); 75 static DEFINE_SPINLOCK(dev_list_lock); 76 77 static struct class *nvme_class; 78 79 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 80 { 81 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 82 return -EBUSY; 83 if (!queue_work(nvme_wq, &ctrl->reset_work)) 84 return -EBUSY; 85 return 0; 86 } 87 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 88 89 static int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 90 { 91 int ret; 92 93 ret = nvme_reset_ctrl(ctrl); 94 if (!ret) 95 flush_work(&ctrl->reset_work); 96 return ret; 97 } 98 99 static blk_status_t nvme_error_status(struct request *req) 100 { 101 switch (nvme_req(req)->status & 0x7ff) { 102 case NVME_SC_SUCCESS: 103 return BLK_STS_OK; 104 case NVME_SC_CAP_EXCEEDED: 105 return BLK_STS_NOSPC; 106 case NVME_SC_ONCS_NOT_SUPPORTED: 107 return BLK_STS_NOTSUPP; 108 case NVME_SC_WRITE_FAULT: 109 case NVME_SC_READ_ERROR: 110 case NVME_SC_UNWRITTEN_BLOCK: 111 return BLK_STS_MEDIUM; 112 default: 113 return BLK_STS_IOERR; 114 } 115 } 116 117 static inline bool nvme_req_needs_retry(struct request *req) 118 { 119 if (blk_noretry_request(req)) 120 return false; 121 if (nvme_req(req)->status & NVME_SC_DNR) 122 return false; 123 if (jiffies - req->start_time >= req->timeout) 124 return false; 125 if (nvme_req(req)->retries >= nvme_max_retries) 126 return false; 127 return true; 128 } 129 130 void nvme_complete_rq(struct request *req) 131 { 132 if (unlikely(nvme_req(req)->status && nvme_req_needs_retry(req))) { 133 nvme_req(req)->retries++; 134 blk_mq_requeue_request(req, true); 135 return; 136 } 137 138 blk_mq_end_request(req, nvme_error_status(req)); 139 } 140 EXPORT_SYMBOL_GPL(nvme_complete_rq); 141 142 void nvme_cancel_request(struct request *req, void *data, bool reserved) 143 { 144 int status; 145 146 if (!blk_mq_request_started(req)) 147 return; 148 149 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 150 "Cancelling I/O %d", req->tag); 151 152 status = NVME_SC_ABORT_REQ; 153 if (blk_queue_dying(req->q)) 154 status |= NVME_SC_DNR; 155 nvme_req(req)->status = status; 156 blk_mq_complete_request(req); 157 158 } 159 EXPORT_SYMBOL_GPL(nvme_cancel_request); 160 161 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 162 enum nvme_ctrl_state new_state) 163 { 164 enum nvme_ctrl_state old_state; 165 bool changed = false; 166 167 spin_lock_irq(&ctrl->lock); 168 169 old_state = ctrl->state; 170 switch (new_state) { 171 case NVME_CTRL_LIVE: 172 switch (old_state) { 173 case NVME_CTRL_NEW: 174 case NVME_CTRL_RESETTING: 175 case NVME_CTRL_RECONNECTING: 176 changed = true; 177 /* FALLTHRU */ 178 default: 179 break; 180 } 181 break; 182 case NVME_CTRL_RESETTING: 183 switch (old_state) { 184 case NVME_CTRL_NEW: 185 case NVME_CTRL_LIVE: 186 changed = true; 187 /* FALLTHRU */ 188 default: 189 break; 190 } 191 break; 192 case NVME_CTRL_RECONNECTING: 193 switch (old_state) { 194 case NVME_CTRL_LIVE: 195 changed = true; 196 /* FALLTHRU */ 197 default: 198 break; 199 } 200 break; 201 case NVME_CTRL_DELETING: 202 switch (old_state) { 203 case NVME_CTRL_LIVE: 204 case NVME_CTRL_RESETTING: 205 case NVME_CTRL_RECONNECTING: 206 changed = true; 207 /* FALLTHRU */ 208 default: 209 break; 210 } 211 break; 212 case NVME_CTRL_DEAD: 213 switch (old_state) { 214 case NVME_CTRL_DELETING: 215 changed = true; 216 /* FALLTHRU */ 217 default: 218 break; 219 } 220 break; 221 default: 222 break; 223 } 224 225 if (changed) 226 ctrl->state = new_state; 227 228 spin_unlock_irq(&ctrl->lock); 229 230 return changed; 231 } 232 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 233 234 static void nvme_free_ns(struct kref *kref) 235 { 236 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 237 238 if (ns->ndev) 239 nvme_nvm_unregister(ns); 240 241 if (ns->disk) { 242 spin_lock(&dev_list_lock); 243 ns->disk->private_data = NULL; 244 spin_unlock(&dev_list_lock); 245 } 246 247 put_disk(ns->disk); 248 ida_simple_remove(&ns->ctrl->ns_ida, ns->instance); 249 nvme_put_ctrl(ns->ctrl); 250 kfree(ns); 251 } 252 253 static void nvme_put_ns(struct nvme_ns *ns) 254 { 255 kref_put(&ns->kref, nvme_free_ns); 256 } 257 258 static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk) 259 { 260 struct nvme_ns *ns; 261 262 spin_lock(&dev_list_lock); 263 ns = disk->private_data; 264 if (ns) { 265 if (!kref_get_unless_zero(&ns->kref)) 266 goto fail; 267 if (!try_module_get(ns->ctrl->ops->module)) 268 goto fail_put_ns; 269 } 270 spin_unlock(&dev_list_lock); 271 272 return ns; 273 274 fail_put_ns: 275 kref_put(&ns->kref, nvme_free_ns); 276 fail: 277 spin_unlock(&dev_list_lock); 278 return NULL; 279 } 280 281 struct request *nvme_alloc_request(struct request_queue *q, 282 struct nvme_command *cmd, unsigned int flags, int qid) 283 { 284 unsigned op = nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 285 struct request *req; 286 287 if (qid == NVME_QID_ANY) { 288 req = blk_mq_alloc_request(q, op, flags); 289 } else { 290 req = blk_mq_alloc_request_hctx(q, op, flags, 291 qid ? qid - 1 : 0); 292 } 293 if (IS_ERR(req)) 294 return req; 295 296 req->cmd_flags |= REQ_FAILFAST_DRIVER; 297 nvme_req(req)->cmd = cmd; 298 299 return req; 300 } 301 EXPORT_SYMBOL_GPL(nvme_alloc_request); 302 303 static int nvme_toggle_streams(struct nvme_ctrl *ctrl, bool enable) 304 { 305 struct nvme_command c; 306 307 memset(&c, 0, sizeof(c)); 308 309 c.directive.opcode = nvme_admin_directive_send; 310 c.directive.nsid = cpu_to_le32(0xffffffff); 311 c.directive.doper = NVME_DIR_SND_ID_OP_ENABLE; 312 c.directive.dtype = NVME_DIR_IDENTIFY; 313 c.directive.tdtype = NVME_DIR_STREAMS; 314 c.directive.endir = enable ? NVME_DIR_ENDIR : 0; 315 316 return nvme_submit_sync_cmd(ctrl->admin_q, &c, NULL, 0); 317 } 318 319 static int nvme_disable_streams(struct nvme_ctrl *ctrl) 320 { 321 return nvme_toggle_streams(ctrl, false); 322 } 323 324 static int nvme_enable_streams(struct nvme_ctrl *ctrl) 325 { 326 return nvme_toggle_streams(ctrl, true); 327 } 328 329 static int nvme_get_stream_params(struct nvme_ctrl *ctrl, 330 struct streams_directive_params *s, u32 nsid) 331 { 332 struct nvme_command c; 333 334 memset(&c, 0, sizeof(c)); 335 memset(s, 0, sizeof(*s)); 336 337 c.directive.opcode = nvme_admin_directive_recv; 338 c.directive.nsid = cpu_to_le32(nsid); 339 c.directive.numd = cpu_to_le32((sizeof(*s) >> 2) - 1); 340 c.directive.doper = NVME_DIR_RCV_ST_OP_PARAM; 341 c.directive.dtype = NVME_DIR_STREAMS; 342 343 return nvme_submit_sync_cmd(ctrl->admin_q, &c, s, sizeof(*s)); 344 } 345 346 static int nvme_configure_directives(struct nvme_ctrl *ctrl) 347 { 348 struct streams_directive_params s; 349 int ret; 350 351 if (!(ctrl->oacs & NVME_CTRL_OACS_DIRECTIVES)) 352 return 0; 353 if (!streams) 354 return 0; 355 356 ret = nvme_enable_streams(ctrl); 357 if (ret) 358 return ret; 359 360 ret = nvme_get_stream_params(ctrl, &s, 0xffffffff); 361 if (ret) 362 return ret; 363 364 ctrl->nssa = le16_to_cpu(s.nssa); 365 if (ctrl->nssa < BLK_MAX_WRITE_HINTS - 1) { 366 dev_info(ctrl->device, "too few streams (%u) available\n", 367 ctrl->nssa); 368 nvme_disable_streams(ctrl); 369 return 0; 370 } 371 372 ctrl->nr_streams = min_t(unsigned, ctrl->nssa, BLK_MAX_WRITE_HINTS - 1); 373 dev_info(ctrl->device, "Using %u streams\n", ctrl->nr_streams); 374 return 0; 375 } 376 377 /* 378 * Check if 'req' has a write hint associated with it. If it does, assign 379 * a valid namespace stream to the write. 380 */ 381 static void nvme_assign_write_stream(struct nvme_ctrl *ctrl, 382 struct request *req, u16 *control, 383 u32 *dsmgmt) 384 { 385 enum rw_hint streamid = req->write_hint; 386 387 if (streamid == WRITE_LIFE_NOT_SET || streamid == WRITE_LIFE_NONE) 388 streamid = 0; 389 else { 390 streamid--; 391 if (WARN_ON_ONCE(streamid > ctrl->nr_streams)) 392 return; 393 394 *control |= NVME_RW_DTYPE_STREAMS; 395 *dsmgmt |= streamid << 16; 396 } 397 398 if (streamid < ARRAY_SIZE(req->q->write_hints)) 399 req->q->write_hints[streamid] += blk_rq_bytes(req) >> 9; 400 } 401 402 static inline void nvme_setup_flush(struct nvme_ns *ns, 403 struct nvme_command *cmnd) 404 { 405 memset(cmnd, 0, sizeof(*cmnd)); 406 cmnd->common.opcode = nvme_cmd_flush; 407 cmnd->common.nsid = cpu_to_le32(ns->ns_id); 408 } 409 410 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 411 struct nvme_command *cmnd) 412 { 413 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 414 struct nvme_dsm_range *range; 415 struct bio *bio; 416 417 range = kmalloc_array(segments, sizeof(*range), GFP_ATOMIC); 418 if (!range) 419 return BLK_STS_RESOURCE; 420 421 __rq_for_each_bio(bio, req) { 422 u64 slba = nvme_block_nr(ns, bio->bi_iter.bi_sector); 423 u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift; 424 425 range[n].cattr = cpu_to_le32(0); 426 range[n].nlb = cpu_to_le32(nlb); 427 range[n].slba = cpu_to_le64(slba); 428 n++; 429 } 430 431 if (WARN_ON_ONCE(n != segments)) { 432 kfree(range); 433 return BLK_STS_IOERR; 434 } 435 436 memset(cmnd, 0, sizeof(*cmnd)); 437 cmnd->dsm.opcode = nvme_cmd_dsm; 438 cmnd->dsm.nsid = cpu_to_le32(ns->ns_id); 439 cmnd->dsm.nr = cpu_to_le32(segments - 1); 440 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 441 442 req->special_vec.bv_page = virt_to_page(range); 443 req->special_vec.bv_offset = offset_in_page(range); 444 req->special_vec.bv_len = sizeof(*range) * segments; 445 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 446 447 return BLK_STS_OK; 448 } 449 450 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 451 struct request *req, struct nvme_command *cmnd) 452 { 453 struct nvme_ctrl *ctrl = ns->ctrl; 454 u16 control = 0; 455 u32 dsmgmt = 0; 456 457 /* 458 * If formated with metadata, require the block layer provide a buffer 459 * unless this namespace is formated such that the metadata can be 460 * stripped/generated by the controller with PRACT=1. 461 */ 462 if (ns && ns->ms && 463 (!ns->pi_type || ns->ms != sizeof(struct t10_pi_tuple)) && 464 !blk_integrity_rq(req) && !blk_rq_is_passthrough(req)) 465 return BLK_STS_NOTSUPP; 466 467 if (req->cmd_flags & REQ_FUA) 468 control |= NVME_RW_FUA; 469 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 470 control |= NVME_RW_LR; 471 472 if (req->cmd_flags & REQ_RAHEAD) 473 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 474 475 memset(cmnd, 0, sizeof(*cmnd)); 476 cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read); 477 cmnd->rw.nsid = cpu_to_le32(ns->ns_id); 478 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req))); 479 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 480 481 if (req_op(req) == REQ_OP_WRITE && ctrl->nr_streams) 482 nvme_assign_write_stream(ctrl, req, &control, &dsmgmt); 483 484 if (ns->ms) { 485 switch (ns->pi_type) { 486 case NVME_NS_DPS_PI_TYPE3: 487 control |= NVME_RW_PRINFO_PRCHK_GUARD; 488 break; 489 case NVME_NS_DPS_PI_TYPE1: 490 case NVME_NS_DPS_PI_TYPE2: 491 control |= NVME_RW_PRINFO_PRCHK_GUARD | 492 NVME_RW_PRINFO_PRCHK_REF; 493 cmnd->rw.reftag = cpu_to_le32( 494 nvme_block_nr(ns, blk_rq_pos(req))); 495 break; 496 } 497 if (!blk_integrity_rq(req)) 498 control |= NVME_RW_PRINFO_PRACT; 499 } 500 501 cmnd->rw.control = cpu_to_le16(control); 502 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 503 return 0; 504 } 505 506 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 507 struct nvme_command *cmd) 508 { 509 blk_status_t ret = BLK_STS_OK; 510 511 if (!(req->rq_flags & RQF_DONTPREP)) { 512 nvme_req(req)->retries = 0; 513 nvme_req(req)->flags = 0; 514 req->rq_flags |= RQF_DONTPREP; 515 } 516 517 switch (req_op(req)) { 518 case REQ_OP_DRV_IN: 519 case REQ_OP_DRV_OUT: 520 memcpy(cmd, nvme_req(req)->cmd, sizeof(*cmd)); 521 break; 522 case REQ_OP_FLUSH: 523 nvme_setup_flush(ns, cmd); 524 break; 525 case REQ_OP_WRITE_ZEROES: 526 /* currently only aliased to deallocate for a few ctrls: */ 527 case REQ_OP_DISCARD: 528 ret = nvme_setup_discard(ns, req, cmd); 529 break; 530 case REQ_OP_READ: 531 case REQ_OP_WRITE: 532 ret = nvme_setup_rw(ns, req, cmd); 533 break; 534 default: 535 WARN_ON_ONCE(1); 536 return BLK_STS_IOERR; 537 } 538 539 cmd->common.command_id = req->tag; 540 return ret; 541 } 542 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 543 544 /* 545 * Returns 0 on success. If the result is negative, it's a Linux error code; 546 * if the result is positive, it's an NVM Express status code 547 */ 548 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 549 union nvme_result *result, void *buffer, unsigned bufflen, 550 unsigned timeout, int qid, int at_head, int flags) 551 { 552 struct request *req; 553 int ret; 554 555 req = nvme_alloc_request(q, cmd, flags, qid); 556 if (IS_ERR(req)) 557 return PTR_ERR(req); 558 559 req->timeout = timeout ? timeout : ADMIN_TIMEOUT; 560 561 if (buffer && bufflen) { 562 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); 563 if (ret) 564 goto out; 565 } 566 567 blk_execute_rq(req->q, NULL, req, at_head); 568 if (result) 569 *result = nvme_req(req)->result; 570 if (nvme_req(req)->flags & NVME_REQ_CANCELLED) 571 ret = -EINTR; 572 else 573 ret = nvme_req(req)->status; 574 out: 575 blk_mq_free_request(req); 576 return ret; 577 } 578 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 579 580 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 581 void *buffer, unsigned bufflen) 582 { 583 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0, 584 NVME_QID_ANY, 0, 0); 585 } 586 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 587 588 int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, 589 void __user *ubuffer, unsigned bufflen, 590 void __user *meta_buffer, unsigned meta_len, u32 meta_seed, 591 u32 *result, unsigned timeout) 592 { 593 bool write = nvme_is_write(cmd); 594 struct nvme_ns *ns = q->queuedata; 595 struct gendisk *disk = ns ? ns->disk : NULL; 596 struct request *req; 597 struct bio *bio = NULL; 598 void *meta = NULL; 599 int ret; 600 601 req = nvme_alloc_request(q, cmd, 0, NVME_QID_ANY); 602 if (IS_ERR(req)) 603 return PTR_ERR(req); 604 605 req->timeout = timeout ? timeout : ADMIN_TIMEOUT; 606 607 if (ubuffer && bufflen) { 608 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, 609 GFP_KERNEL); 610 if (ret) 611 goto out; 612 bio = req->bio; 613 614 if (!disk) 615 goto submit; 616 bio->bi_disk = disk; 617 618 if (meta_buffer && meta_len) { 619 struct bio_integrity_payload *bip; 620 621 meta = kmalloc(meta_len, GFP_KERNEL); 622 if (!meta) { 623 ret = -ENOMEM; 624 goto out_unmap; 625 } 626 627 if (write) { 628 if (copy_from_user(meta, meta_buffer, 629 meta_len)) { 630 ret = -EFAULT; 631 goto out_free_meta; 632 } 633 } 634 635 bip = bio_integrity_alloc(bio, GFP_KERNEL, 1); 636 if (IS_ERR(bip)) { 637 ret = PTR_ERR(bip); 638 goto out_free_meta; 639 } 640 641 bip->bip_iter.bi_size = meta_len; 642 bip->bip_iter.bi_sector = meta_seed; 643 644 ret = bio_integrity_add_page(bio, virt_to_page(meta), 645 meta_len, offset_in_page(meta)); 646 if (ret != meta_len) { 647 ret = -ENOMEM; 648 goto out_free_meta; 649 } 650 } 651 } 652 submit: 653 blk_execute_rq(req->q, disk, req, 0); 654 if (nvme_req(req)->flags & NVME_REQ_CANCELLED) 655 ret = -EINTR; 656 else 657 ret = nvme_req(req)->status; 658 if (result) 659 *result = le32_to_cpu(nvme_req(req)->result.u32); 660 if (meta && !ret && !write) { 661 if (copy_to_user(meta_buffer, meta, meta_len)) 662 ret = -EFAULT; 663 } 664 out_free_meta: 665 kfree(meta); 666 out_unmap: 667 if (bio) 668 blk_rq_unmap_user(bio); 669 out: 670 blk_mq_free_request(req); 671 return ret; 672 } 673 674 int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, 675 void __user *ubuffer, unsigned bufflen, u32 *result, 676 unsigned timeout) 677 { 678 return __nvme_submit_user_cmd(q, cmd, ubuffer, bufflen, NULL, 0, 0, 679 result, timeout); 680 } 681 682 static void nvme_keep_alive_end_io(struct request *rq, blk_status_t status) 683 { 684 struct nvme_ctrl *ctrl = rq->end_io_data; 685 686 blk_mq_free_request(rq); 687 688 if (status) { 689 dev_err(ctrl->device, 690 "failed nvme_keep_alive_end_io error=%d\n", 691 status); 692 return; 693 } 694 695 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ); 696 } 697 698 static int nvme_keep_alive(struct nvme_ctrl *ctrl) 699 { 700 struct nvme_command c; 701 struct request *rq; 702 703 memset(&c, 0, sizeof(c)); 704 c.common.opcode = nvme_admin_keep_alive; 705 706 rq = nvme_alloc_request(ctrl->admin_q, &c, BLK_MQ_REQ_RESERVED, 707 NVME_QID_ANY); 708 if (IS_ERR(rq)) 709 return PTR_ERR(rq); 710 711 rq->timeout = ctrl->kato * HZ; 712 rq->end_io_data = ctrl; 713 714 blk_execute_rq_nowait(rq->q, NULL, rq, 0, nvme_keep_alive_end_io); 715 716 return 0; 717 } 718 719 static void nvme_keep_alive_work(struct work_struct *work) 720 { 721 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 722 struct nvme_ctrl, ka_work); 723 724 if (nvme_keep_alive(ctrl)) { 725 /* allocation failure, reset the controller */ 726 dev_err(ctrl->device, "keep-alive failed\n"); 727 nvme_reset_ctrl(ctrl); 728 return; 729 } 730 } 731 732 void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 733 { 734 if (unlikely(ctrl->kato == 0)) 735 return; 736 737 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 738 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ); 739 } 740 EXPORT_SYMBOL_GPL(nvme_start_keep_alive); 741 742 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 743 { 744 if (unlikely(ctrl->kato == 0)) 745 return; 746 747 cancel_delayed_work_sync(&ctrl->ka_work); 748 } 749 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 750 751 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 752 { 753 struct nvme_command c = { }; 754 int error; 755 756 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 757 c.identify.opcode = nvme_admin_identify; 758 c.identify.cns = NVME_ID_CNS_CTRL; 759 760 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 761 if (!*id) 762 return -ENOMEM; 763 764 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 765 sizeof(struct nvme_id_ctrl)); 766 if (error) 767 kfree(*id); 768 return error; 769 } 770 771 static int nvme_identify_ns_descs(struct nvme_ns *ns, unsigned nsid) 772 { 773 struct nvme_command c = { }; 774 int status; 775 void *data; 776 int pos; 777 int len; 778 779 c.identify.opcode = nvme_admin_identify; 780 c.identify.nsid = cpu_to_le32(nsid); 781 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 782 783 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 784 if (!data) 785 return -ENOMEM; 786 787 status = nvme_submit_sync_cmd(ns->ctrl->admin_q, &c, data, 788 NVME_IDENTIFY_DATA_SIZE); 789 if (status) 790 goto free_data; 791 792 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 793 struct nvme_ns_id_desc *cur = data + pos; 794 795 if (cur->nidl == 0) 796 break; 797 798 switch (cur->nidt) { 799 case NVME_NIDT_EUI64: 800 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 801 dev_warn(ns->ctrl->device, 802 "ctrl returned bogus length: %d for NVME_NIDT_EUI64\n", 803 cur->nidl); 804 goto free_data; 805 } 806 len = NVME_NIDT_EUI64_LEN; 807 memcpy(ns->eui, data + pos + sizeof(*cur), len); 808 break; 809 case NVME_NIDT_NGUID: 810 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 811 dev_warn(ns->ctrl->device, 812 "ctrl returned bogus length: %d for NVME_NIDT_NGUID\n", 813 cur->nidl); 814 goto free_data; 815 } 816 len = NVME_NIDT_NGUID_LEN; 817 memcpy(ns->nguid, data + pos + sizeof(*cur), len); 818 break; 819 case NVME_NIDT_UUID: 820 if (cur->nidl != NVME_NIDT_UUID_LEN) { 821 dev_warn(ns->ctrl->device, 822 "ctrl returned bogus length: %d for NVME_NIDT_UUID\n", 823 cur->nidl); 824 goto free_data; 825 } 826 len = NVME_NIDT_UUID_LEN; 827 uuid_copy(&ns->uuid, data + pos + sizeof(*cur)); 828 break; 829 default: 830 /* Skip unnkown types */ 831 len = cur->nidl; 832 break; 833 } 834 835 len += sizeof(*cur); 836 } 837 free_data: 838 kfree(data); 839 return status; 840 } 841 842 static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list) 843 { 844 struct nvme_command c = { }; 845 846 c.identify.opcode = nvme_admin_identify; 847 c.identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST; 848 c.identify.nsid = cpu_to_le32(nsid); 849 return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000); 850 } 851 852 static int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid, 853 struct nvme_id_ns **id) 854 { 855 struct nvme_command c = { }; 856 int error; 857 858 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 859 c.identify.opcode = nvme_admin_identify; 860 c.identify.nsid = cpu_to_le32(nsid); 861 c.identify.cns = NVME_ID_CNS_NS; 862 863 *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL); 864 if (!*id) 865 return -ENOMEM; 866 867 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 868 sizeof(struct nvme_id_ns)); 869 if (error) 870 kfree(*id); 871 return error; 872 } 873 874 static int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11, 875 void *buffer, size_t buflen, u32 *result) 876 { 877 struct nvme_command c; 878 union nvme_result res; 879 int ret; 880 881 memset(&c, 0, sizeof(c)); 882 c.features.opcode = nvme_admin_set_features; 883 c.features.fid = cpu_to_le32(fid); 884 c.features.dword11 = cpu_to_le32(dword11); 885 886 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 887 buffer, buflen, 0, NVME_QID_ANY, 0, 0); 888 if (ret >= 0 && result) 889 *result = le32_to_cpu(res.u32); 890 return ret; 891 } 892 893 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 894 { 895 u32 q_count = (*count - 1) | ((*count - 1) << 16); 896 u32 result; 897 int status, nr_io_queues; 898 899 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 900 &result); 901 if (status < 0) 902 return status; 903 904 /* 905 * Degraded controllers might return an error when setting the queue 906 * count. We still want to be able to bring them online and offer 907 * access to the admin queue, as that might be only way to fix them up. 908 */ 909 if (status > 0) { 910 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 911 *count = 0; 912 } else { 913 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 914 *count = min(*count, nr_io_queues); 915 } 916 917 return 0; 918 } 919 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 920 921 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio) 922 { 923 struct nvme_user_io io; 924 struct nvme_command c; 925 unsigned length, meta_len; 926 void __user *metadata; 927 928 if (copy_from_user(&io, uio, sizeof(io))) 929 return -EFAULT; 930 if (io.flags) 931 return -EINVAL; 932 933 switch (io.opcode) { 934 case nvme_cmd_write: 935 case nvme_cmd_read: 936 case nvme_cmd_compare: 937 break; 938 default: 939 return -EINVAL; 940 } 941 942 length = (io.nblocks + 1) << ns->lba_shift; 943 meta_len = (io.nblocks + 1) * ns->ms; 944 metadata = (void __user *)(uintptr_t)io.metadata; 945 946 if (ns->ext) { 947 length += meta_len; 948 meta_len = 0; 949 } else if (meta_len) { 950 if ((io.metadata & 3) || !io.metadata) 951 return -EINVAL; 952 } 953 954 memset(&c, 0, sizeof(c)); 955 c.rw.opcode = io.opcode; 956 c.rw.flags = io.flags; 957 c.rw.nsid = cpu_to_le32(ns->ns_id); 958 c.rw.slba = cpu_to_le64(io.slba); 959 c.rw.length = cpu_to_le16(io.nblocks); 960 c.rw.control = cpu_to_le16(io.control); 961 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt); 962 c.rw.reftag = cpu_to_le32(io.reftag); 963 c.rw.apptag = cpu_to_le16(io.apptag); 964 c.rw.appmask = cpu_to_le16(io.appmask); 965 966 return __nvme_submit_user_cmd(ns->queue, &c, 967 (void __user *)(uintptr_t)io.addr, length, 968 metadata, meta_len, io.slba, NULL, 0); 969 } 970 971 static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 972 struct nvme_passthru_cmd __user *ucmd) 973 { 974 struct nvme_passthru_cmd cmd; 975 struct nvme_command c; 976 unsigned timeout = 0; 977 int status; 978 979 if (!capable(CAP_SYS_ADMIN)) 980 return -EACCES; 981 if (copy_from_user(&cmd, ucmd, sizeof(cmd))) 982 return -EFAULT; 983 if (cmd.flags) 984 return -EINVAL; 985 986 memset(&c, 0, sizeof(c)); 987 c.common.opcode = cmd.opcode; 988 c.common.flags = cmd.flags; 989 c.common.nsid = cpu_to_le32(cmd.nsid); 990 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2); 991 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3); 992 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10); 993 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11); 994 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12); 995 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13); 996 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14); 997 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15); 998 999 if (cmd.timeout_ms) 1000 timeout = msecs_to_jiffies(cmd.timeout_ms); 1001 1002 status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c, 1003 (void __user *)(uintptr_t)cmd.addr, cmd.data_len, 1004 &cmd.result, timeout); 1005 if (status >= 0) { 1006 if (put_user(cmd.result, &ucmd->result)) 1007 return -EFAULT; 1008 } 1009 1010 return status; 1011 } 1012 1013 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, 1014 unsigned int cmd, unsigned long arg) 1015 { 1016 struct nvme_ns *ns = bdev->bd_disk->private_data; 1017 1018 switch (cmd) { 1019 case NVME_IOCTL_ID: 1020 force_successful_syscall_return(); 1021 return ns->ns_id; 1022 case NVME_IOCTL_ADMIN_CMD: 1023 return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg); 1024 case NVME_IOCTL_IO_CMD: 1025 return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg); 1026 case NVME_IOCTL_SUBMIT_IO: 1027 return nvme_submit_io(ns, (void __user *)arg); 1028 default: 1029 #ifdef CONFIG_NVM 1030 if (ns->ndev) 1031 return nvme_nvm_ioctl(ns, cmd, arg); 1032 #endif 1033 if (is_sed_ioctl(cmd)) 1034 return sed_ioctl(ns->ctrl->opal_dev, cmd, 1035 (void __user *) arg); 1036 return -ENOTTY; 1037 } 1038 } 1039 1040 #ifdef CONFIG_COMPAT 1041 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode, 1042 unsigned int cmd, unsigned long arg) 1043 { 1044 return nvme_ioctl(bdev, mode, cmd, arg); 1045 } 1046 #else 1047 #define nvme_compat_ioctl NULL 1048 #endif 1049 1050 static int nvme_open(struct block_device *bdev, fmode_t mode) 1051 { 1052 return nvme_get_ns_from_disk(bdev->bd_disk) ? 0 : -ENXIO; 1053 } 1054 1055 static void nvme_release(struct gendisk *disk, fmode_t mode) 1056 { 1057 struct nvme_ns *ns = disk->private_data; 1058 1059 module_put(ns->ctrl->ops->module); 1060 nvme_put_ns(ns); 1061 } 1062 1063 static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1064 { 1065 /* some standard values */ 1066 geo->heads = 1 << 6; 1067 geo->sectors = 1 << 5; 1068 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1069 return 0; 1070 } 1071 1072 #ifdef CONFIG_BLK_DEV_INTEGRITY 1073 static void nvme_prep_integrity(struct gendisk *disk, struct nvme_id_ns *id, 1074 u16 bs) 1075 { 1076 struct nvme_ns *ns = disk->private_data; 1077 u16 old_ms = ns->ms; 1078 u8 pi_type = 0; 1079 1080 ns->ms = le16_to_cpu(id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ms); 1081 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT); 1082 1083 /* PI implementation requires metadata equal t10 pi tuple size */ 1084 if (ns->ms == sizeof(struct t10_pi_tuple)) 1085 pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1086 1087 if (blk_get_integrity(disk) && 1088 (ns->pi_type != pi_type || ns->ms != old_ms || 1089 bs != queue_logical_block_size(disk->queue) || 1090 (ns->ms && ns->ext))) 1091 blk_integrity_unregister(disk); 1092 1093 ns->pi_type = pi_type; 1094 } 1095 1096 static void nvme_init_integrity(struct nvme_ns *ns) 1097 { 1098 struct blk_integrity integrity; 1099 1100 memset(&integrity, 0, sizeof(integrity)); 1101 switch (ns->pi_type) { 1102 case NVME_NS_DPS_PI_TYPE3: 1103 integrity.profile = &t10_pi_type3_crc; 1104 integrity.tag_size = sizeof(u16) + sizeof(u32); 1105 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1106 break; 1107 case NVME_NS_DPS_PI_TYPE1: 1108 case NVME_NS_DPS_PI_TYPE2: 1109 integrity.profile = &t10_pi_type1_crc; 1110 integrity.tag_size = sizeof(u16); 1111 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1112 break; 1113 default: 1114 integrity.profile = NULL; 1115 break; 1116 } 1117 integrity.tuple_size = ns->ms; 1118 blk_integrity_register(ns->disk, &integrity); 1119 blk_queue_max_integrity_segments(ns->queue, 1); 1120 } 1121 #else 1122 static void nvme_prep_integrity(struct gendisk *disk, struct nvme_id_ns *id, 1123 u16 bs) 1124 { 1125 } 1126 static void nvme_init_integrity(struct nvme_ns *ns) 1127 { 1128 } 1129 #endif /* CONFIG_BLK_DEV_INTEGRITY */ 1130 1131 static void nvme_set_chunk_size(struct nvme_ns *ns) 1132 { 1133 u32 chunk_size = (((u32)ns->noiob) << (ns->lba_shift - 9)); 1134 blk_queue_chunk_sectors(ns->queue, rounddown_pow_of_two(chunk_size)); 1135 } 1136 1137 static void nvme_config_discard(struct nvme_ns *ns) 1138 { 1139 struct nvme_ctrl *ctrl = ns->ctrl; 1140 u32 logical_block_size = queue_logical_block_size(ns->queue); 1141 1142 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) < 1143 NVME_DSM_MAX_RANGES); 1144 1145 if (ctrl->nr_streams && ns->sws && ns->sgs) { 1146 unsigned int sz = logical_block_size * ns->sws * ns->sgs; 1147 1148 ns->queue->limits.discard_alignment = sz; 1149 ns->queue->limits.discard_granularity = sz; 1150 } else { 1151 ns->queue->limits.discard_alignment = logical_block_size; 1152 ns->queue->limits.discard_granularity = logical_block_size; 1153 } 1154 blk_queue_max_discard_sectors(ns->queue, UINT_MAX); 1155 blk_queue_max_discard_segments(ns->queue, NVME_DSM_MAX_RANGES); 1156 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue); 1157 1158 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 1159 blk_queue_max_write_zeroes_sectors(ns->queue, UINT_MAX); 1160 } 1161 1162 static int nvme_revalidate_ns(struct nvme_ns *ns, struct nvme_id_ns **id) 1163 { 1164 if (nvme_identify_ns(ns->ctrl, ns->ns_id, id)) { 1165 dev_warn(ns->ctrl->dev, "%s: Identify failure\n", __func__); 1166 return -ENODEV; 1167 } 1168 1169 if ((*id)->ncap == 0) { 1170 kfree(*id); 1171 return -ENODEV; 1172 } 1173 1174 if (ns->ctrl->vs >= NVME_VS(1, 1, 0)) 1175 memcpy(ns->eui, (*id)->eui64, sizeof(ns->eui)); 1176 if (ns->ctrl->vs >= NVME_VS(1, 2, 0)) 1177 memcpy(ns->nguid, (*id)->nguid, sizeof(ns->nguid)); 1178 if (ns->ctrl->vs >= NVME_VS(1, 3, 0)) { 1179 /* Don't treat error as fatal we potentially 1180 * already have a NGUID or EUI-64 1181 */ 1182 if (nvme_identify_ns_descs(ns, ns->ns_id)) 1183 dev_warn(ns->ctrl->device, 1184 "%s: Identify Descriptors failed\n", __func__); 1185 } 1186 1187 return 0; 1188 } 1189 1190 static void __nvme_revalidate_disk(struct gendisk *disk, struct nvme_id_ns *id) 1191 { 1192 struct nvme_ns *ns = disk->private_data; 1193 struct nvme_ctrl *ctrl = ns->ctrl; 1194 u16 bs; 1195 1196 /* 1197 * If identify namespace failed, use default 512 byte block size so 1198 * block layer can use before failing read/write for 0 capacity. 1199 */ 1200 ns->lba_shift = id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ds; 1201 if (ns->lba_shift == 0) 1202 ns->lba_shift = 9; 1203 bs = 1 << ns->lba_shift; 1204 ns->noiob = le16_to_cpu(id->noiob); 1205 1206 blk_mq_freeze_queue(disk->queue); 1207 1208 if (ctrl->ops->flags & NVME_F_METADATA_SUPPORTED) 1209 nvme_prep_integrity(disk, id, bs); 1210 blk_queue_logical_block_size(ns->queue, bs); 1211 if (ns->noiob) 1212 nvme_set_chunk_size(ns); 1213 if (ns->ms && !blk_get_integrity(disk) && !ns->ext) 1214 nvme_init_integrity(ns); 1215 if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk)) 1216 set_capacity(disk, 0); 1217 else 1218 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9)); 1219 1220 if (ctrl->oncs & NVME_CTRL_ONCS_DSM) 1221 nvme_config_discard(ns); 1222 blk_mq_unfreeze_queue(disk->queue); 1223 } 1224 1225 static int nvme_revalidate_disk(struct gendisk *disk) 1226 { 1227 struct nvme_ns *ns = disk->private_data; 1228 struct nvme_id_ns *id = NULL; 1229 int ret; 1230 1231 if (test_bit(NVME_NS_DEAD, &ns->flags)) { 1232 set_capacity(disk, 0); 1233 return -ENODEV; 1234 } 1235 1236 ret = nvme_revalidate_ns(ns, &id); 1237 if (ret) 1238 return ret; 1239 1240 __nvme_revalidate_disk(disk, id); 1241 kfree(id); 1242 1243 return 0; 1244 } 1245 1246 static char nvme_pr_type(enum pr_type type) 1247 { 1248 switch (type) { 1249 case PR_WRITE_EXCLUSIVE: 1250 return 1; 1251 case PR_EXCLUSIVE_ACCESS: 1252 return 2; 1253 case PR_WRITE_EXCLUSIVE_REG_ONLY: 1254 return 3; 1255 case PR_EXCLUSIVE_ACCESS_REG_ONLY: 1256 return 4; 1257 case PR_WRITE_EXCLUSIVE_ALL_REGS: 1258 return 5; 1259 case PR_EXCLUSIVE_ACCESS_ALL_REGS: 1260 return 6; 1261 default: 1262 return 0; 1263 } 1264 }; 1265 1266 static int nvme_pr_command(struct block_device *bdev, u32 cdw10, 1267 u64 key, u64 sa_key, u8 op) 1268 { 1269 struct nvme_ns *ns = bdev->bd_disk->private_data; 1270 struct nvme_command c; 1271 u8 data[16] = { 0, }; 1272 1273 put_unaligned_le64(key, &data[0]); 1274 put_unaligned_le64(sa_key, &data[8]); 1275 1276 memset(&c, 0, sizeof(c)); 1277 c.common.opcode = op; 1278 c.common.nsid = cpu_to_le32(ns->ns_id); 1279 c.common.cdw10[0] = cpu_to_le32(cdw10); 1280 1281 return nvme_submit_sync_cmd(ns->queue, &c, data, 16); 1282 } 1283 1284 static int nvme_pr_register(struct block_device *bdev, u64 old, 1285 u64 new, unsigned flags) 1286 { 1287 u32 cdw10; 1288 1289 if (flags & ~PR_FL_IGNORE_KEY) 1290 return -EOPNOTSUPP; 1291 1292 cdw10 = old ? 2 : 0; 1293 cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0; 1294 cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */ 1295 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register); 1296 } 1297 1298 static int nvme_pr_reserve(struct block_device *bdev, u64 key, 1299 enum pr_type type, unsigned flags) 1300 { 1301 u32 cdw10; 1302 1303 if (flags & ~PR_FL_IGNORE_KEY) 1304 return -EOPNOTSUPP; 1305 1306 cdw10 = nvme_pr_type(type) << 8; 1307 cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0); 1308 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire); 1309 } 1310 1311 static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new, 1312 enum pr_type type, bool abort) 1313 { 1314 u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1; 1315 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire); 1316 } 1317 1318 static int nvme_pr_clear(struct block_device *bdev, u64 key) 1319 { 1320 u32 cdw10 = 1 | (key ? 1 << 3 : 0); 1321 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register); 1322 } 1323 1324 static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type) 1325 { 1326 u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0; 1327 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release); 1328 } 1329 1330 static const struct pr_ops nvme_pr_ops = { 1331 .pr_register = nvme_pr_register, 1332 .pr_reserve = nvme_pr_reserve, 1333 .pr_release = nvme_pr_release, 1334 .pr_preempt = nvme_pr_preempt, 1335 .pr_clear = nvme_pr_clear, 1336 }; 1337 1338 #ifdef CONFIG_BLK_SED_OPAL 1339 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 1340 bool send) 1341 { 1342 struct nvme_ctrl *ctrl = data; 1343 struct nvme_command cmd; 1344 1345 memset(&cmd, 0, sizeof(cmd)); 1346 if (send) 1347 cmd.common.opcode = nvme_admin_security_send; 1348 else 1349 cmd.common.opcode = nvme_admin_security_recv; 1350 cmd.common.nsid = 0; 1351 cmd.common.cdw10[0] = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 1352 cmd.common.cdw10[1] = cpu_to_le32(len); 1353 1354 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 1355 ADMIN_TIMEOUT, NVME_QID_ANY, 1, 0); 1356 } 1357 EXPORT_SYMBOL_GPL(nvme_sec_submit); 1358 #endif /* CONFIG_BLK_SED_OPAL */ 1359 1360 static const struct block_device_operations nvme_fops = { 1361 .owner = THIS_MODULE, 1362 .ioctl = nvme_ioctl, 1363 .compat_ioctl = nvme_compat_ioctl, 1364 .open = nvme_open, 1365 .release = nvme_release, 1366 .getgeo = nvme_getgeo, 1367 .revalidate_disk= nvme_revalidate_disk, 1368 .pr_ops = &nvme_pr_ops, 1369 }; 1370 1371 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled) 1372 { 1373 unsigned long timeout = 1374 ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies; 1375 u32 csts, bit = enabled ? NVME_CSTS_RDY : 0; 1376 int ret; 1377 1378 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 1379 if (csts == ~0) 1380 return -ENODEV; 1381 if ((csts & NVME_CSTS_RDY) == bit) 1382 break; 1383 1384 msleep(100); 1385 if (fatal_signal_pending(current)) 1386 return -EINTR; 1387 if (time_after(jiffies, timeout)) { 1388 dev_err(ctrl->device, 1389 "Device not ready; aborting %s\n", enabled ? 1390 "initialisation" : "reset"); 1391 return -ENODEV; 1392 } 1393 } 1394 1395 return ret; 1396 } 1397 1398 /* 1399 * If the device has been passed off to us in an enabled state, just clear 1400 * the enabled bit. The spec says we should set the 'shutdown notification 1401 * bits', but doing so may cause the device to complete commands to the 1402 * admin queue ... and we don't know what memory that might be pointing at! 1403 */ 1404 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap) 1405 { 1406 int ret; 1407 1408 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 1409 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 1410 1411 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 1412 if (ret) 1413 return ret; 1414 1415 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 1416 msleep(NVME_QUIRK_DELAY_AMOUNT); 1417 1418 return nvme_wait_ready(ctrl, cap, false); 1419 } 1420 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 1421 1422 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap) 1423 { 1424 /* 1425 * Default to a 4K page size, with the intention to update this 1426 * path in the future to accomodate architectures with differing 1427 * kernel and IO page sizes. 1428 */ 1429 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12; 1430 int ret; 1431 1432 if (page_shift < dev_page_min) { 1433 dev_err(ctrl->device, 1434 "Minimum device page size %u too large for host (%u)\n", 1435 1 << dev_page_min, 1 << page_shift); 1436 return -ENODEV; 1437 } 1438 1439 ctrl->page_size = 1 << page_shift; 1440 1441 ctrl->ctrl_config = NVME_CC_CSS_NVM; 1442 ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT; 1443 ctrl->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE; 1444 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 1445 ctrl->ctrl_config |= NVME_CC_ENABLE; 1446 1447 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 1448 if (ret) 1449 return ret; 1450 return nvme_wait_ready(ctrl, cap, true); 1451 } 1452 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 1453 1454 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl) 1455 { 1456 unsigned long timeout = jiffies + (shutdown_timeout * HZ); 1457 u32 csts; 1458 int ret; 1459 1460 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 1461 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 1462 1463 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 1464 if (ret) 1465 return ret; 1466 1467 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 1468 if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT) 1469 break; 1470 1471 msleep(100); 1472 if (fatal_signal_pending(current)) 1473 return -EINTR; 1474 if (time_after(jiffies, timeout)) { 1475 dev_err(ctrl->device, 1476 "Device shutdown incomplete; abort shutdown\n"); 1477 return -ENODEV; 1478 } 1479 } 1480 1481 return ret; 1482 } 1483 EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl); 1484 1485 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl, 1486 struct request_queue *q) 1487 { 1488 bool vwc = false; 1489 1490 if (ctrl->max_hw_sectors) { 1491 u32 max_segments = 1492 (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1; 1493 1494 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors); 1495 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX)); 1496 } 1497 if (ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) 1498 blk_queue_chunk_sectors(q, ctrl->max_hw_sectors); 1499 blk_queue_virt_boundary(q, ctrl->page_size - 1); 1500 if (ctrl->vwc & NVME_CTRL_VWC_PRESENT) 1501 vwc = true; 1502 blk_queue_write_cache(q, vwc, vwc); 1503 } 1504 1505 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 1506 { 1507 /* 1508 * APST (Autonomous Power State Transition) lets us program a 1509 * table of power state transitions that the controller will 1510 * perform automatically. We configure it with a simple 1511 * heuristic: we are willing to spend at most 2% of the time 1512 * transitioning between power states. Therefore, when running 1513 * in any given state, we will enter the next lower-power 1514 * non-operational state after waiting 50 * (enlat + exlat) 1515 * microseconds, as long as that state's exit latency is under 1516 * the requested maximum latency. 1517 * 1518 * We will not autonomously enter any non-operational state for 1519 * which the total latency exceeds ps_max_latency_us. Users 1520 * can set ps_max_latency_us to zero to turn off APST. 1521 */ 1522 1523 unsigned apste; 1524 struct nvme_feat_auto_pst *table; 1525 u64 max_lat_us = 0; 1526 int max_ps = -1; 1527 int ret; 1528 1529 /* 1530 * If APST isn't supported or if we haven't been initialized yet, 1531 * then don't do anything. 1532 */ 1533 if (!ctrl->apsta) 1534 return 0; 1535 1536 if (ctrl->npss > 31) { 1537 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 1538 return 0; 1539 } 1540 1541 table = kzalloc(sizeof(*table), GFP_KERNEL); 1542 if (!table) 1543 return 0; 1544 1545 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 1546 /* Turn off APST. */ 1547 apste = 0; 1548 dev_dbg(ctrl->device, "APST disabled\n"); 1549 } else { 1550 __le64 target = cpu_to_le64(0); 1551 int state; 1552 1553 /* 1554 * Walk through all states from lowest- to highest-power. 1555 * According to the spec, lower-numbered states use more 1556 * power. NPSS, despite the name, is the index of the 1557 * lowest-power state, not the number of states. 1558 */ 1559 for (state = (int)ctrl->npss; state >= 0; state--) { 1560 u64 total_latency_us, exit_latency_us, transition_ms; 1561 1562 if (target) 1563 table->entries[state] = target; 1564 1565 /* 1566 * Don't allow transitions to the deepest state 1567 * if it's quirked off. 1568 */ 1569 if (state == ctrl->npss && 1570 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 1571 continue; 1572 1573 /* 1574 * Is this state a useful non-operational state for 1575 * higher-power states to autonomously transition to? 1576 */ 1577 if (!(ctrl->psd[state].flags & 1578 NVME_PS_FLAGS_NON_OP_STATE)) 1579 continue; 1580 1581 exit_latency_us = 1582 (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 1583 if (exit_latency_us > ctrl->ps_max_latency_us) 1584 continue; 1585 1586 total_latency_us = 1587 exit_latency_us + 1588 le32_to_cpu(ctrl->psd[state].entry_lat); 1589 1590 /* 1591 * This state is good. Use it as the APST idle 1592 * target for higher power states. 1593 */ 1594 transition_ms = total_latency_us + 19; 1595 do_div(transition_ms, 20); 1596 if (transition_ms > (1 << 24) - 1) 1597 transition_ms = (1 << 24) - 1; 1598 1599 target = cpu_to_le64((state << 3) | 1600 (transition_ms << 8)); 1601 1602 if (max_ps == -1) 1603 max_ps = state; 1604 1605 if (total_latency_us > max_lat_us) 1606 max_lat_us = total_latency_us; 1607 } 1608 1609 apste = 1; 1610 1611 if (max_ps == -1) { 1612 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 1613 } else { 1614 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 1615 max_ps, max_lat_us, (int)sizeof(*table), table); 1616 } 1617 } 1618 1619 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 1620 table, sizeof(*table), NULL); 1621 if (ret) 1622 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 1623 1624 kfree(table); 1625 return ret; 1626 } 1627 1628 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 1629 { 1630 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 1631 u64 latency; 1632 1633 switch (val) { 1634 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 1635 case PM_QOS_LATENCY_ANY: 1636 latency = U64_MAX; 1637 break; 1638 1639 default: 1640 latency = val; 1641 } 1642 1643 if (ctrl->ps_max_latency_us != latency) { 1644 ctrl->ps_max_latency_us = latency; 1645 nvme_configure_apst(ctrl); 1646 } 1647 } 1648 1649 struct nvme_core_quirk_entry { 1650 /* 1651 * NVMe model and firmware strings are padded with spaces. For 1652 * simplicity, strings in the quirk table are padded with NULLs 1653 * instead. 1654 */ 1655 u16 vid; 1656 const char *mn; 1657 const char *fr; 1658 unsigned long quirks; 1659 }; 1660 1661 static const struct nvme_core_quirk_entry core_quirks[] = { 1662 { 1663 /* 1664 * This Toshiba device seems to die using any APST states. See: 1665 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 1666 */ 1667 .vid = 0x1179, 1668 .mn = "THNSF5256GPUK TOSHIBA", 1669 .quirks = NVME_QUIRK_NO_APST, 1670 } 1671 }; 1672 1673 /* match is null-terminated but idstr is space-padded. */ 1674 static bool string_matches(const char *idstr, const char *match, size_t len) 1675 { 1676 size_t matchlen; 1677 1678 if (!match) 1679 return true; 1680 1681 matchlen = strlen(match); 1682 WARN_ON_ONCE(matchlen > len); 1683 1684 if (memcmp(idstr, match, matchlen)) 1685 return false; 1686 1687 for (; matchlen < len; matchlen++) 1688 if (idstr[matchlen] != ' ') 1689 return false; 1690 1691 return true; 1692 } 1693 1694 static bool quirk_matches(const struct nvme_id_ctrl *id, 1695 const struct nvme_core_quirk_entry *q) 1696 { 1697 return q->vid == le16_to_cpu(id->vid) && 1698 string_matches(id->mn, q->mn, sizeof(id->mn)) && 1699 string_matches(id->fr, q->fr, sizeof(id->fr)); 1700 } 1701 1702 static void nvme_init_subnqn(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 1703 { 1704 size_t nqnlen; 1705 int off; 1706 1707 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 1708 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 1709 strcpy(ctrl->subnqn, id->subnqn); 1710 return; 1711 } 1712 1713 if (ctrl->vs >= NVME_VS(1, 2, 1)) 1714 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 1715 1716 /* Generate a "fake" NQN per Figure 254 in NVMe 1.3 + ECN 001 */ 1717 off = snprintf(ctrl->subnqn, NVMF_NQN_SIZE, 1718 "nqn.2014.08.org.nvmexpress:%4x%4x", 1719 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 1720 memcpy(ctrl->subnqn + off, id->sn, sizeof(id->sn)); 1721 off += sizeof(id->sn); 1722 memcpy(ctrl->subnqn + off, id->mn, sizeof(id->mn)); 1723 off += sizeof(id->mn); 1724 memset(ctrl->subnqn + off, 0, sizeof(ctrl->subnqn) - off); 1725 } 1726 1727 /* 1728 * Initialize the cached copies of the Identify data and various controller 1729 * register in our nvme_ctrl structure. This should be called as soon as 1730 * the admin queue is fully up and running. 1731 */ 1732 int nvme_init_identify(struct nvme_ctrl *ctrl) 1733 { 1734 struct nvme_id_ctrl *id; 1735 u64 cap; 1736 int ret, page_shift; 1737 u32 max_hw_sectors; 1738 bool prev_apst_enabled; 1739 1740 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 1741 if (ret) { 1742 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 1743 return ret; 1744 } 1745 1746 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap); 1747 if (ret) { 1748 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 1749 return ret; 1750 } 1751 page_shift = NVME_CAP_MPSMIN(cap) + 12; 1752 1753 if (ctrl->vs >= NVME_VS(1, 1, 0)) 1754 ctrl->subsystem = NVME_CAP_NSSRC(cap); 1755 1756 ret = nvme_identify_ctrl(ctrl, &id); 1757 if (ret) { 1758 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 1759 return -EIO; 1760 } 1761 1762 nvme_init_subnqn(ctrl, id); 1763 1764 if (!ctrl->identified) { 1765 /* 1766 * Check for quirks. Quirk can depend on firmware version, 1767 * so, in principle, the set of quirks present can change 1768 * across a reset. As a possible future enhancement, we 1769 * could re-scan for quirks every time we reinitialize 1770 * the device, but we'd have to make sure that the driver 1771 * behaves intelligently if the quirks change. 1772 */ 1773 1774 int i; 1775 1776 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 1777 if (quirk_matches(id, &core_quirks[i])) 1778 ctrl->quirks |= core_quirks[i].quirks; 1779 } 1780 } 1781 1782 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 1783 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 1784 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 1785 } 1786 1787 ctrl->oacs = le16_to_cpu(id->oacs); 1788 ctrl->vid = le16_to_cpu(id->vid); 1789 ctrl->oncs = le16_to_cpup(&id->oncs); 1790 atomic_set(&ctrl->abort_limit, id->acl + 1); 1791 ctrl->vwc = id->vwc; 1792 ctrl->cntlid = le16_to_cpup(&id->cntlid); 1793 memcpy(ctrl->serial, id->sn, sizeof(id->sn)); 1794 memcpy(ctrl->model, id->mn, sizeof(id->mn)); 1795 memcpy(ctrl->firmware_rev, id->fr, sizeof(id->fr)); 1796 if (id->mdts) 1797 max_hw_sectors = 1 << (id->mdts + page_shift - 9); 1798 else 1799 max_hw_sectors = UINT_MAX; 1800 ctrl->max_hw_sectors = 1801 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 1802 1803 nvme_set_queue_limits(ctrl, ctrl->admin_q); 1804 ctrl->sgls = le32_to_cpu(id->sgls); 1805 ctrl->kas = le16_to_cpu(id->kas); 1806 1807 ctrl->npss = id->npss; 1808 ctrl->apsta = id->apsta; 1809 prev_apst_enabled = ctrl->apst_enabled; 1810 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 1811 if (force_apst && id->apsta) { 1812 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 1813 ctrl->apst_enabled = true; 1814 } else { 1815 ctrl->apst_enabled = false; 1816 } 1817 } else { 1818 ctrl->apst_enabled = id->apsta; 1819 } 1820 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 1821 1822 if (ctrl->ops->flags & NVME_F_FABRICS) { 1823 ctrl->icdoff = le16_to_cpu(id->icdoff); 1824 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 1825 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 1826 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 1827 1828 /* 1829 * In fabrics we need to verify the cntlid matches the 1830 * admin connect 1831 */ 1832 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 1833 ret = -EINVAL; 1834 goto out_free; 1835 } 1836 1837 if (!ctrl->opts->discovery_nqn && !ctrl->kas) { 1838 dev_err(ctrl->device, 1839 "keep-alive support is mandatory for fabrics\n"); 1840 ret = -EINVAL; 1841 goto out_free; 1842 } 1843 } else { 1844 ctrl->cntlid = le16_to_cpu(id->cntlid); 1845 ctrl->hmpre = le32_to_cpu(id->hmpre); 1846 ctrl->hmmin = le32_to_cpu(id->hmmin); 1847 } 1848 1849 kfree(id); 1850 1851 if (ctrl->apst_enabled && !prev_apst_enabled) 1852 dev_pm_qos_expose_latency_tolerance(ctrl->device); 1853 else if (!ctrl->apst_enabled && prev_apst_enabled) 1854 dev_pm_qos_hide_latency_tolerance(ctrl->device); 1855 1856 ret = nvme_configure_apst(ctrl); 1857 if (ret < 0) 1858 return ret; 1859 1860 ret = nvme_configure_directives(ctrl); 1861 if (ret < 0) 1862 return ret; 1863 1864 ctrl->identified = true; 1865 1866 return 0; 1867 1868 out_free: 1869 kfree(id); 1870 return ret; 1871 } 1872 EXPORT_SYMBOL_GPL(nvme_init_identify); 1873 1874 static int nvme_dev_open(struct inode *inode, struct file *file) 1875 { 1876 struct nvme_ctrl *ctrl; 1877 int instance = iminor(inode); 1878 int ret = -ENODEV; 1879 1880 spin_lock(&dev_list_lock); 1881 list_for_each_entry(ctrl, &nvme_ctrl_list, node) { 1882 if (ctrl->instance != instance) 1883 continue; 1884 1885 if (!ctrl->admin_q) { 1886 ret = -EWOULDBLOCK; 1887 break; 1888 } 1889 if (!kref_get_unless_zero(&ctrl->kref)) 1890 break; 1891 file->private_data = ctrl; 1892 ret = 0; 1893 break; 1894 } 1895 spin_unlock(&dev_list_lock); 1896 1897 return ret; 1898 } 1899 1900 static int nvme_dev_release(struct inode *inode, struct file *file) 1901 { 1902 nvme_put_ctrl(file->private_data); 1903 return 0; 1904 } 1905 1906 static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp) 1907 { 1908 struct nvme_ns *ns; 1909 int ret; 1910 1911 mutex_lock(&ctrl->namespaces_mutex); 1912 if (list_empty(&ctrl->namespaces)) { 1913 ret = -ENOTTY; 1914 goto out_unlock; 1915 } 1916 1917 ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list); 1918 if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) { 1919 dev_warn(ctrl->device, 1920 "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n"); 1921 ret = -EINVAL; 1922 goto out_unlock; 1923 } 1924 1925 dev_warn(ctrl->device, 1926 "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n"); 1927 kref_get(&ns->kref); 1928 mutex_unlock(&ctrl->namespaces_mutex); 1929 1930 ret = nvme_user_cmd(ctrl, ns, argp); 1931 nvme_put_ns(ns); 1932 return ret; 1933 1934 out_unlock: 1935 mutex_unlock(&ctrl->namespaces_mutex); 1936 return ret; 1937 } 1938 1939 static long nvme_dev_ioctl(struct file *file, unsigned int cmd, 1940 unsigned long arg) 1941 { 1942 struct nvme_ctrl *ctrl = file->private_data; 1943 void __user *argp = (void __user *)arg; 1944 1945 switch (cmd) { 1946 case NVME_IOCTL_ADMIN_CMD: 1947 return nvme_user_cmd(ctrl, NULL, argp); 1948 case NVME_IOCTL_IO_CMD: 1949 return nvme_dev_user_cmd(ctrl, argp); 1950 case NVME_IOCTL_RESET: 1951 dev_warn(ctrl->device, "resetting controller\n"); 1952 return nvme_reset_ctrl_sync(ctrl); 1953 case NVME_IOCTL_SUBSYS_RESET: 1954 return nvme_reset_subsystem(ctrl); 1955 case NVME_IOCTL_RESCAN: 1956 nvme_queue_scan(ctrl); 1957 return 0; 1958 default: 1959 return -ENOTTY; 1960 } 1961 } 1962 1963 static const struct file_operations nvme_dev_fops = { 1964 .owner = THIS_MODULE, 1965 .open = nvme_dev_open, 1966 .release = nvme_dev_release, 1967 .unlocked_ioctl = nvme_dev_ioctl, 1968 .compat_ioctl = nvme_dev_ioctl, 1969 }; 1970 1971 static ssize_t nvme_sysfs_reset(struct device *dev, 1972 struct device_attribute *attr, const char *buf, 1973 size_t count) 1974 { 1975 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 1976 int ret; 1977 1978 ret = nvme_reset_ctrl_sync(ctrl); 1979 if (ret < 0) 1980 return ret; 1981 return count; 1982 } 1983 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset); 1984 1985 static ssize_t nvme_sysfs_rescan(struct device *dev, 1986 struct device_attribute *attr, const char *buf, 1987 size_t count) 1988 { 1989 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 1990 1991 nvme_queue_scan(ctrl); 1992 return count; 1993 } 1994 static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan); 1995 1996 static ssize_t wwid_show(struct device *dev, struct device_attribute *attr, 1997 char *buf) 1998 { 1999 struct nvme_ns *ns = nvme_get_ns_from_dev(dev); 2000 struct nvme_ctrl *ctrl = ns->ctrl; 2001 int serial_len = sizeof(ctrl->serial); 2002 int model_len = sizeof(ctrl->model); 2003 2004 if (!uuid_is_null(&ns->uuid)) 2005 return sprintf(buf, "uuid.%pU\n", &ns->uuid); 2006 2007 if (memchr_inv(ns->nguid, 0, sizeof(ns->nguid))) 2008 return sprintf(buf, "eui.%16phN\n", ns->nguid); 2009 2010 if (memchr_inv(ns->eui, 0, sizeof(ns->eui))) 2011 return sprintf(buf, "eui.%8phN\n", ns->eui); 2012 2013 while (serial_len > 0 && (ctrl->serial[serial_len - 1] == ' ' || 2014 ctrl->serial[serial_len - 1] == '\0')) 2015 serial_len--; 2016 while (model_len > 0 && (ctrl->model[model_len - 1] == ' ' || 2017 ctrl->model[model_len - 1] == '\0')) 2018 model_len--; 2019 2020 return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", ctrl->vid, 2021 serial_len, ctrl->serial, model_len, ctrl->model, ns->ns_id); 2022 } 2023 static DEVICE_ATTR(wwid, S_IRUGO, wwid_show, NULL); 2024 2025 static ssize_t nguid_show(struct device *dev, struct device_attribute *attr, 2026 char *buf) 2027 { 2028 struct nvme_ns *ns = nvme_get_ns_from_dev(dev); 2029 return sprintf(buf, "%pU\n", ns->nguid); 2030 } 2031 static DEVICE_ATTR(nguid, S_IRUGO, nguid_show, NULL); 2032 2033 static ssize_t uuid_show(struct device *dev, struct device_attribute *attr, 2034 char *buf) 2035 { 2036 struct nvme_ns *ns = nvme_get_ns_from_dev(dev); 2037 2038 /* For backward compatibility expose the NGUID to userspace if 2039 * we have no UUID set 2040 */ 2041 if (uuid_is_null(&ns->uuid)) { 2042 printk_ratelimited(KERN_WARNING 2043 "No UUID available providing old NGUID\n"); 2044 return sprintf(buf, "%pU\n", ns->nguid); 2045 } 2046 return sprintf(buf, "%pU\n", &ns->uuid); 2047 } 2048 static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL); 2049 2050 static ssize_t eui_show(struct device *dev, struct device_attribute *attr, 2051 char *buf) 2052 { 2053 struct nvme_ns *ns = nvme_get_ns_from_dev(dev); 2054 return sprintf(buf, "%8phd\n", ns->eui); 2055 } 2056 static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL); 2057 2058 static ssize_t nsid_show(struct device *dev, struct device_attribute *attr, 2059 char *buf) 2060 { 2061 struct nvme_ns *ns = nvme_get_ns_from_dev(dev); 2062 return sprintf(buf, "%d\n", ns->ns_id); 2063 } 2064 static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL); 2065 2066 static struct attribute *nvme_ns_attrs[] = { 2067 &dev_attr_wwid.attr, 2068 &dev_attr_uuid.attr, 2069 &dev_attr_nguid.attr, 2070 &dev_attr_eui.attr, 2071 &dev_attr_nsid.attr, 2072 NULL, 2073 }; 2074 2075 static umode_t nvme_ns_attrs_are_visible(struct kobject *kobj, 2076 struct attribute *a, int n) 2077 { 2078 struct device *dev = container_of(kobj, struct device, kobj); 2079 struct nvme_ns *ns = nvme_get_ns_from_dev(dev); 2080 2081 if (a == &dev_attr_uuid.attr) { 2082 if (uuid_is_null(&ns->uuid) || 2083 !memchr_inv(ns->nguid, 0, sizeof(ns->nguid))) 2084 return 0; 2085 } 2086 if (a == &dev_attr_nguid.attr) { 2087 if (!memchr_inv(ns->nguid, 0, sizeof(ns->nguid))) 2088 return 0; 2089 } 2090 if (a == &dev_attr_eui.attr) { 2091 if (!memchr_inv(ns->eui, 0, sizeof(ns->eui))) 2092 return 0; 2093 } 2094 return a->mode; 2095 } 2096 2097 static const struct attribute_group nvme_ns_attr_group = { 2098 .attrs = nvme_ns_attrs, 2099 .is_visible = nvme_ns_attrs_are_visible, 2100 }; 2101 2102 #define nvme_show_str_function(field) \ 2103 static ssize_t field##_show(struct device *dev, \ 2104 struct device_attribute *attr, char *buf) \ 2105 { \ 2106 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \ 2107 return sprintf(buf, "%.*s\n", (int)sizeof(ctrl->field), ctrl->field); \ 2108 } \ 2109 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL); 2110 2111 #define nvme_show_int_function(field) \ 2112 static ssize_t field##_show(struct device *dev, \ 2113 struct device_attribute *attr, char *buf) \ 2114 { \ 2115 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \ 2116 return sprintf(buf, "%d\n", ctrl->field); \ 2117 } \ 2118 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL); 2119 2120 nvme_show_str_function(model); 2121 nvme_show_str_function(serial); 2122 nvme_show_str_function(firmware_rev); 2123 nvme_show_int_function(cntlid); 2124 2125 static ssize_t nvme_sysfs_delete(struct device *dev, 2126 struct device_attribute *attr, const char *buf, 2127 size_t count) 2128 { 2129 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2130 2131 if (device_remove_file_self(dev, attr)) 2132 ctrl->ops->delete_ctrl(ctrl); 2133 return count; 2134 } 2135 static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete); 2136 2137 static ssize_t nvme_sysfs_show_transport(struct device *dev, 2138 struct device_attribute *attr, 2139 char *buf) 2140 { 2141 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2142 2143 return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->ops->name); 2144 } 2145 static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL); 2146 2147 static ssize_t nvme_sysfs_show_state(struct device *dev, 2148 struct device_attribute *attr, 2149 char *buf) 2150 { 2151 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2152 static const char *const state_name[] = { 2153 [NVME_CTRL_NEW] = "new", 2154 [NVME_CTRL_LIVE] = "live", 2155 [NVME_CTRL_RESETTING] = "resetting", 2156 [NVME_CTRL_RECONNECTING]= "reconnecting", 2157 [NVME_CTRL_DELETING] = "deleting", 2158 [NVME_CTRL_DEAD] = "dead", 2159 }; 2160 2161 if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) && 2162 state_name[ctrl->state]) 2163 return sprintf(buf, "%s\n", state_name[ctrl->state]); 2164 2165 return sprintf(buf, "unknown state\n"); 2166 } 2167 2168 static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL); 2169 2170 static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev, 2171 struct device_attribute *attr, 2172 char *buf) 2173 { 2174 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2175 2176 return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->subnqn); 2177 } 2178 static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL); 2179 2180 static ssize_t nvme_sysfs_show_address(struct device *dev, 2181 struct device_attribute *attr, 2182 char *buf) 2183 { 2184 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2185 2186 return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE); 2187 } 2188 static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL); 2189 2190 static struct attribute *nvme_dev_attrs[] = { 2191 &dev_attr_reset_controller.attr, 2192 &dev_attr_rescan_controller.attr, 2193 &dev_attr_model.attr, 2194 &dev_attr_serial.attr, 2195 &dev_attr_firmware_rev.attr, 2196 &dev_attr_cntlid.attr, 2197 &dev_attr_delete_controller.attr, 2198 &dev_attr_transport.attr, 2199 &dev_attr_subsysnqn.attr, 2200 &dev_attr_address.attr, 2201 &dev_attr_state.attr, 2202 NULL 2203 }; 2204 2205 static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj, 2206 struct attribute *a, int n) 2207 { 2208 struct device *dev = container_of(kobj, struct device, kobj); 2209 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2210 2211 if (a == &dev_attr_delete_controller.attr && !ctrl->ops->delete_ctrl) 2212 return 0; 2213 if (a == &dev_attr_address.attr && !ctrl->ops->get_address) 2214 return 0; 2215 2216 return a->mode; 2217 } 2218 2219 static struct attribute_group nvme_dev_attrs_group = { 2220 .attrs = nvme_dev_attrs, 2221 .is_visible = nvme_dev_attrs_are_visible, 2222 }; 2223 2224 static const struct attribute_group *nvme_dev_attr_groups[] = { 2225 &nvme_dev_attrs_group, 2226 NULL, 2227 }; 2228 2229 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b) 2230 { 2231 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list); 2232 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list); 2233 2234 return nsa->ns_id - nsb->ns_id; 2235 } 2236 2237 static struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 2238 { 2239 struct nvme_ns *ns, *ret = NULL; 2240 2241 mutex_lock(&ctrl->namespaces_mutex); 2242 list_for_each_entry(ns, &ctrl->namespaces, list) { 2243 if (ns->ns_id == nsid) { 2244 kref_get(&ns->kref); 2245 ret = ns; 2246 break; 2247 } 2248 if (ns->ns_id > nsid) 2249 break; 2250 } 2251 mutex_unlock(&ctrl->namespaces_mutex); 2252 return ret; 2253 } 2254 2255 static int nvme_setup_streams_ns(struct nvme_ctrl *ctrl, struct nvme_ns *ns) 2256 { 2257 struct streams_directive_params s; 2258 int ret; 2259 2260 if (!ctrl->nr_streams) 2261 return 0; 2262 2263 ret = nvme_get_stream_params(ctrl, &s, ns->ns_id); 2264 if (ret) 2265 return ret; 2266 2267 ns->sws = le32_to_cpu(s.sws); 2268 ns->sgs = le16_to_cpu(s.sgs); 2269 2270 if (ns->sws) { 2271 unsigned int bs = 1 << ns->lba_shift; 2272 2273 blk_queue_io_min(ns->queue, bs * ns->sws); 2274 if (ns->sgs) 2275 blk_queue_io_opt(ns->queue, bs * ns->sws * ns->sgs); 2276 } 2277 2278 return 0; 2279 } 2280 2281 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid) 2282 { 2283 struct nvme_ns *ns; 2284 struct gendisk *disk; 2285 struct nvme_id_ns *id; 2286 char disk_name[DISK_NAME_LEN]; 2287 int node = dev_to_node(ctrl->dev); 2288 2289 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 2290 if (!ns) 2291 return; 2292 2293 ns->instance = ida_simple_get(&ctrl->ns_ida, 1, 0, GFP_KERNEL); 2294 if (ns->instance < 0) 2295 goto out_free_ns; 2296 2297 ns->queue = blk_mq_init_queue(ctrl->tagset); 2298 if (IS_ERR(ns->queue)) 2299 goto out_release_instance; 2300 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue); 2301 ns->queue->queuedata = ns; 2302 ns->ctrl = ctrl; 2303 2304 kref_init(&ns->kref); 2305 ns->ns_id = nsid; 2306 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */ 2307 2308 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift); 2309 nvme_set_queue_limits(ctrl, ns->queue); 2310 nvme_setup_streams_ns(ctrl, ns); 2311 2312 sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->instance); 2313 2314 if (nvme_revalidate_ns(ns, &id)) 2315 goto out_free_queue; 2316 2317 if (nvme_nvm_ns_supported(ns, id) && 2318 nvme_nvm_register(ns, disk_name, node)) { 2319 dev_warn(ctrl->device, "%s: LightNVM init failure\n", __func__); 2320 goto out_free_id; 2321 } 2322 2323 disk = alloc_disk_node(0, node); 2324 if (!disk) 2325 goto out_free_id; 2326 2327 disk->fops = &nvme_fops; 2328 disk->private_data = ns; 2329 disk->queue = ns->queue; 2330 disk->flags = GENHD_FL_EXT_DEVT; 2331 memcpy(disk->disk_name, disk_name, DISK_NAME_LEN); 2332 ns->disk = disk; 2333 2334 __nvme_revalidate_disk(disk, id); 2335 2336 mutex_lock(&ctrl->namespaces_mutex); 2337 list_add_tail(&ns->list, &ctrl->namespaces); 2338 mutex_unlock(&ctrl->namespaces_mutex); 2339 2340 kref_get(&ctrl->kref); 2341 2342 kfree(id); 2343 2344 device_add_disk(ctrl->device, ns->disk); 2345 if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj, 2346 &nvme_ns_attr_group)) 2347 pr_warn("%s: failed to create sysfs group for identification\n", 2348 ns->disk->disk_name); 2349 if (ns->ndev && nvme_nvm_register_sysfs(ns)) 2350 pr_warn("%s: failed to register lightnvm sysfs group for identification\n", 2351 ns->disk->disk_name); 2352 return; 2353 out_free_id: 2354 kfree(id); 2355 out_free_queue: 2356 blk_cleanup_queue(ns->queue); 2357 out_release_instance: 2358 ida_simple_remove(&ctrl->ns_ida, ns->instance); 2359 out_free_ns: 2360 kfree(ns); 2361 } 2362 2363 static void nvme_ns_remove(struct nvme_ns *ns) 2364 { 2365 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 2366 return; 2367 2368 if (ns->disk && ns->disk->flags & GENHD_FL_UP) { 2369 if (blk_get_integrity(ns->disk)) 2370 blk_integrity_unregister(ns->disk); 2371 sysfs_remove_group(&disk_to_dev(ns->disk)->kobj, 2372 &nvme_ns_attr_group); 2373 if (ns->ndev) 2374 nvme_nvm_unregister_sysfs(ns); 2375 del_gendisk(ns->disk); 2376 blk_cleanup_queue(ns->queue); 2377 } 2378 2379 mutex_lock(&ns->ctrl->namespaces_mutex); 2380 list_del_init(&ns->list); 2381 mutex_unlock(&ns->ctrl->namespaces_mutex); 2382 2383 nvme_put_ns(ns); 2384 } 2385 2386 static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid) 2387 { 2388 struct nvme_ns *ns; 2389 2390 ns = nvme_find_get_ns(ctrl, nsid); 2391 if (ns) { 2392 if (ns->disk && revalidate_disk(ns->disk)) 2393 nvme_ns_remove(ns); 2394 nvme_put_ns(ns); 2395 } else 2396 nvme_alloc_ns(ctrl, nsid); 2397 } 2398 2399 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 2400 unsigned nsid) 2401 { 2402 struct nvme_ns *ns, *next; 2403 2404 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 2405 if (ns->ns_id > nsid) 2406 nvme_ns_remove(ns); 2407 } 2408 } 2409 2410 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn) 2411 { 2412 struct nvme_ns *ns; 2413 __le32 *ns_list; 2414 unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024); 2415 int ret = 0; 2416 2417 ns_list = kzalloc(0x1000, GFP_KERNEL); 2418 if (!ns_list) 2419 return -ENOMEM; 2420 2421 for (i = 0; i < num_lists; i++) { 2422 ret = nvme_identify_ns_list(ctrl, prev, ns_list); 2423 if (ret) 2424 goto free; 2425 2426 for (j = 0; j < min(nn, 1024U); j++) { 2427 nsid = le32_to_cpu(ns_list[j]); 2428 if (!nsid) 2429 goto out; 2430 2431 nvme_validate_ns(ctrl, nsid); 2432 2433 while (++prev < nsid) { 2434 ns = nvme_find_get_ns(ctrl, prev); 2435 if (ns) { 2436 nvme_ns_remove(ns); 2437 nvme_put_ns(ns); 2438 } 2439 } 2440 } 2441 nn -= j; 2442 } 2443 out: 2444 nvme_remove_invalid_namespaces(ctrl, prev); 2445 free: 2446 kfree(ns_list); 2447 return ret; 2448 } 2449 2450 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn) 2451 { 2452 unsigned i; 2453 2454 for (i = 1; i <= nn; i++) 2455 nvme_validate_ns(ctrl, i); 2456 2457 nvme_remove_invalid_namespaces(ctrl, nn); 2458 } 2459 2460 static void nvme_scan_work(struct work_struct *work) 2461 { 2462 struct nvme_ctrl *ctrl = 2463 container_of(work, struct nvme_ctrl, scan_work); 2464 struct nvme_id_ctrl *id; 2465 unsigned nn; 2466 2467 if (ctrl->state != NVME_CTRL_LIVE) 2468 return; 2469 2470 if (nvme_identify_ctrl(ctrl, &id)) 2471 return; 2472 2473 nn = le32_to_cpu(id->nn); 2474 if (ctrl->vs >= NVME_VS(1, 1, 0) && 2475 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) { 2476 if (!nvme_scan_ns_list(ctrl, nn)) 2477 goto done; 2478 } 2479 nvme_scan_ns_sequential(ctrl, nn); 2480 done: 2481 mutex_lock(&ctrl->namespaces_mutex); 2482 list_sort(NULL, &ctrl->namespaces, ns_cmp); 2483 mutex_unlock(&ctrl->namespaces_mutex); 2484 kfree(id); 2485 } 2486 2487 void nvme_queue_scan(struct nvme_ctrl *ctrl) 2488 { 2489 /* 2490 * Do not queue new scan work when a controller is reset during 2491 * removal. 2492 */ 2493 if (ctrl->state == NVME_CTRL_LIVE) 2494 queue_work(nvme_wq, &ctrl->scan_work); 2495 } 2496 EXPORT_SYMBOL_GPL(nvme_queue_scan); 2497 2498 /* 2499 * This function iterates the namespace list unlocked to allow recovery from 2500 * controller failure. It is up to the caller to ensure the namespace list is 2501 * not modified by scan work while this function is executing. 2502 */ 2503 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 2504 { 2505 struct nvme_ns *ns, *next; 2506 2507 /* 2508 * The dead states indicates the controller was not gracefully 2509 * disconnected. In that case, we won't be able to flush any data while 2510 * removing the namespaces' disks; fail all the queues now to avoid 2511 * potentially having to clean up the failed sync later. 2512 */ 2513 if (ctrl->state == NVME_CTRL_DEAD) 2514 nvme_kill_queues(ctrl); 2515 2516 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) 2517 nvme_ns_remove(ns); 2518 } 2519 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 2520 2521 static void nvme_async_event_work(struct work_struct *work) 2522 { 2523 struct nvme_ctrl *ctrl = 2524 container_of(work, struct nvme_ctrl, async_event_work); 2525 2526 spin_lock_irq(&ctrl->lock); 2527 while (ctrl->event_limit > 0) { 2528 int aer_idx = --ctrl->event_limit; 2529 2530 spin_unlock_irq(&ctrl->lock); 2531 ctrl->ops->submit_async_event(ctrl, aer_idx); 2532 spin_lock_irq(&ctrl->lock); 2533 } 2534 spin_unlock_irq(&ctrl->lock); 2535 } 2536 2537 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 2538 union nvme_result *res) 2539 { 2540 u32 result = le32_to_cpu(res->u32); 2541 bool done = true; 2542 2543 switch (le16_to_cpu(status) >> 1) { 2544 case NVME_SC_SUCCESS: 2545 done = false; 2546 /*FALLTHRU*/ 2547 case NVME_SC_ABORT_REQ: 2548 ++ctrl->event_limit; 2549 queue_work(nvme_wq, &ctrl->async_event_work); 2550 break; 2551 default: 2552 break; 2553 } 2554 2555 if (done) 2556 return; 2557 2558 switch (result & 0xff07) { 2559 case NVME_AER_NOTICE_NS_CHANGED: 2560 dev_info(ctrl->device, "rescanning\n"); 2561 nvme_queue_scan(ctrl); 2562 break; 2563 default: 2564 dev_warn(ctrl->device, "async event result %08x\n", result); 2565 } 2566 } 2567 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 2568 2569 void nvme_queue_async_events(struct nvme_ctrl *ctrl) 2570 { 2571 ctrl->event_limit = NVME_NR_AERS; 2572 queue_work(nvme_wq, &ctrl->async_event_work); 2573 } 2574 EXPORT_SYMBOL_GPL(nvme_queue_async_events); 2575 2576 static DEFINE_IDA(nvme_instance_ida); 2577 2578 static int nvme_set_instance(struct nvme_ctrl *ctrl) 2579 { 2580 int instance, error; 2581 2582 do { 2583 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL)) 2584 return -ENODEV; 2585 2586 spin_lock(&dev_list_lock); 2587 error = ida_get_new(&nvme_instance_ida, &instance); 2588 spin_unlock(&dev_list_lock); 2589 } while (error == -EAGAIN); 2590 2591 if (error) 2592 return -ENODEV; 2593 2594 ctrl->instance = instance; 2595 return 0; 2596 } 2597 2598 static void nvme_release_instance(struct nvme_ctrl *ctrl) 2599 { 2600 spin_lock(&dev_list_lock); 2601 ida_remove(&nvme_instance_ida, ctrl->instance); 2602 spin_unlock(&dev_list_lock); 2603 } 2604 2605 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 2606 { 2607 nvme_stop_keep_alive(ctrl); 2608 flush_work(&ctrl->async_event_work); 2609 flush_work(&ctrl->scan_work); 2610 } 2611 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 2612 2613 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 2614 { 2615 if (ctrl->kato) 2616 nvme_start_keep_alive(ctrl); 2617 2618 if (ctrl->queue_count > 1) { 2619 nvme_queue_scan(ctrl); 2620 nvme_queue_async_events(ctrl); 2621 nvme_start_queues(ctrl); 2622 } 2623 } 2624 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 2625 2626 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 2627 { 2628 device_destroy(nvme_class, MKDEV(nvme_char_major, ctrl->instance)); 2629 2630 spin_lock(&dev_list_lock); 2631 list_del(&ctrl->node); 2632 spin_unlock(&dev_list_lock); 2633 } 2634 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 2635 2636 static void nvme_free_ctrl(struct kref *kref) 2637 { 2638 struct nvme_ctrl *ctrl = container_of(kref, struct nvme_ctrl, kref); 2639 2640 put_device(ctrl->device); 2641 nvme_release_instance(ctrl); 2642 ida_destroy(&ctrl->ns_ida); 2643 2644 ctrl->ops->free_ctrl(ctrl); 2645 } 2646 2647 void nvme_put_ctrl(struct nvme_ctrl *ctrl) 2648 { 2649 kref_put(&ctrl->kref, nvme_free_ctrl); 2650 } 2651 EXPORT_SYMBOL_GPL(nvme_put_ctrl); 2652 2653 /* 2654 * Initialize a NVMe controller structures. This needs to be called during 2655 * earliest initialization so that we have the initialized structured around 2656 * during probing. 2657 */ 2658 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 2659 const struct nvme_ctrl_ops *ops, unsigned long quirks) 2660 { 2661 int ret; 2662 2663 ctrl->state = NVME_CTRL_NEW; 2664 spin_lock_init(&ctrl->lock); 2665 INIT_LIST_HEAD(&ctrl->namespaces); 2666 mutex_init(&ctrl->namespaces_mutex); 2667 kref_init(&ctrl->kref); 2668 ctrl->dev = dev; 2669 ctrl->ops = ops; 2670 ctrl->quirks = quirks; 2671 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 2672 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 2673 2674 ret = nvme_set_instance(ctrl); 2675 if (ret) 2676 goto out; 2677 2678 ctrl->device = device_create_with_groups(nvme_class, ctrl->dev, 2679 MKDEV(nvme_char_major, ctrl->instance), 2680 ctrl, nvme_dev_attr_groups, 2681 "nvme%d", ctrl->instance); 2682 if (IS_ERR(ctrl->device)) { 2683 ret = PTR_ERR(ctrl->device); 2684 goto out_release_instance; 2685 } 2686 get_device(ctrl->device); 2687 ida_init(&ctrl->ns_ida); 2688 2689 spin_lock(&dev_list_lock); 2690 list_add_tail(&ctrl->node, &nvme_ctrl_list); 2691 spin_unlock(&dev_list_lock); 2692 2693 /* 2694 * Initialize latency tolerance controls. The sysfs files won't 2695 * be visible to userspace unless the device actually supports APST. 2696 */ 2697 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 2698 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 2699 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 2700 2701 return 0; 2702 out_release_instance: 2703 nvme_release_instance(ctrl); 2704 out: 2705 return ret; 2706 } 2707 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 2708 2709 /** 2710 * nvme_kill_queues(): Ends all namespace queues 2711 * @ctrl: the dead controller that needs to end 2712 * 2713 * Call this function when the driver determines it is unable to get the 2714 * controller in a state capable of servicing IO. 2715 */ 2716 void nvme_kill_queues(struct nvme_ctrl *ctrl) 2717 { 2718 struct nvme_ns *ns; 2719 2720 mutex_lock(&ctrl->namespaces_mutex); 2721 2722 /* Forcibly unquiesce queues to avoid blocking dispatch */ 2723 if (ctrl->admin_q) 2724 blk_mq_unquiesce_queue(ctrl->admin_q); 2725 2726 list_for_each_entry(ns, &ctrl->namespaces, list) { 2727 /* 2728 * Revalidating a dead namespace sets capacity to 0. This will 2729 * end buffered writers dirtying pages that can't be synced. 2730 */ 2731 if (!ns->disk || test_and_set_bit(NVME_NS_DEAD, &ns->flags)) 2732 continue; 2733 revalidate_disk(ns->disk); 2734 blk_set_queue_dying(ns->queue); 2735 2736 /* Forcibly unquiesce queues to avoid blocking dispatch */ 2737 blk_mq_unquiesce_queue(ns->queue); 2738 } 2739 mutex_unlock(&ctrl->namespaces_mutex); 2740 } 2741 EXPORT_SYMBOL_GPL(nvme_kill_queues); 2742 2743 void nvme_unfreeze(struct nvme_ctrl *ctrl) 2744 { 2745 struct nvme_ns *ns; 2746 2747 mutex_lock(&ctrl->namespaces_mutex); 2748 list_for_each_entry(ns, &ctrl->namespaces, list) 2749 blk_mq_unfreeze_queue(ns->queue); 2750 mutex_unlock(&ctrl->namespaces_mutex); 2751 } 2752 EXPORT_SYMBOL_GPL(nvme_unfreeze); 2753 2754 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 2755 { 2756 struct nvme_ns *ns; 2757 2758 mutex_lock(&ctrl->namespaces_mutex); 2759 list_for_each_entry(ns, &ctrl->namespaces, list) { 2760 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 2761 if (timeout <= 0) 2762 break; 2763 } 2764 mutex_unlock(&ctrl->namespaces_mutex); 2765 } 2766 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 2767 2768 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 2769 { 2770 struct nvme_ns *ns; 2771 2772 mutex_lock(&ctrl->namespaces_mutex); 2773 list_for_each_entry(ns, &ctrl->namespaces, list) 2774 blk_mq_freeze_queue_wait(ns->queue); 2775 mutex_unlock(&ctrl->namespaces_mutex); 2776 } 2777 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 2778 2779 void nvme_start_freeze(struct nvme_ctrl *ctrl) 2780 { 2781 struct nvme_ns *ns; 2782 2783 mutex_lock(&ctrl->namespaces_mutex); 2784 list_for_each_entry(ns, &ctrl->namespaces, list) 2785 blk_freeze_queue_start(ns->queue); 2786 mutex_unlock(&ctrl->namespaces_mutex); 2787 } 2788 EXPORT_SYMBOL_GPL(nvme_start_freeze); 2789 2790 void nvme_stop_queues(struct nvme_ctrl *ctrl) 2791 { 2792 struct nvme_ns *ns; 2793 2794 mutex_lock(&ctrl->namespaces_mutex); 2795 list_for_each_entry(ns, &ctrl->namespaces, list) 2796 blk_mq_quiesce_queue(ns->queue); 2797 mutex_unlock(&ctrl->namespaces_mutex); 2798 } 2799 EXPORT_SYMBOL_GPL(nvme_stop_queues); 2800 2801 void nvme_start_queues(struct nvme_ctrl *ctrl) 2802 { 2803 struct nvme_ns *ns; 2804 2805 mutex_lock(&ctrl->namespaces_mutex); 2806 list_for_each_entry(ns, &ctrl->namespaces, list) 2807 blk_mq_unquiesce_queue(ns->queue); 2808 mutex_unlock(&ctrl->namespaces_mutex); 2809 } 2810 EXPORT_SYMBOL_GPL(nvme_start_queues); 2811 2812 int __init nvme_core_init(void) 2813 { 2814 int result; 2815 2816 nvme_wq = alloc_workqueue("nvme-wq", 2817 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 2818 if (!nvme_wq) 2819 return -ENOMEM; 2820 2821 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme", 2822 &nvme_dev_fops); 2823 if (result < 0) 2824 goto destroy_wq; 2825 else if (result > 0) 2826 nvme_char_major = result; 2827 2828 nvme_class = class_create(THIS_MODULE, "nvme"); 2829 if (IS_ERR(nvme_class)) { 2830 result = PTR_ERR(nvme_class); 2831 goto unregister_chrdev; 2832 } 2833 2834 return 0; 2835 2836 unregister_chrdev: 2837 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme"); 2838 destroy_wq: 2839 destroy_workqueue(nvme_wq); 2840 return result; 2841 } 2842 2843 void nvme_core_exit(void) 2844 { 2845 class_destroy(nvme_class); 2846 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme"); 2847 destroy_workqueue(nvme_wq); 2848 } 2849 2850 MODULE_LICENSE("GPL"); 2851 MODULE_VERSION("1.0"); 2852 module_init(nvme_core_init); 2853 module_exit(nvme_core_exit); 2854