1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVM Express device driver 4 * Copyright (c) 2011-2014, Intel Corporation. 5 */ 6 7 #include <linux/async.h> 8 #include <linux/blkdev.h> 9 #include <linux/blk-mq.h> 10 #include <linux/blk-integrity.h> 11 #include <linux/compat.h> 12 #include <linux/delay.h> 13 #include <linux/errno.h> 14 #include <linux/hdreg.h> 15 #include <linux/kernel.h> 16 #include <linux/module.h> 17 #include <linux/backing-dev.h> 18 #include <linux/slab.h> 19 #include <linux/types.h> 20 #include <linux/pr.h> 21 #include <linux/ptrace.h> 22 #include <linux/nvme_ioctl.h> 23 #include <linux/pm_qos.h> 24 #include <linux/ratelimit.h> 25 #include <linux/unaligned.h> 26 27 #include "nvme.h" 28 #include "fabrics.h" 29 #include <linux/nvme-auth.h> 30 31 #define CREATE_TRACE_POINTS 32 #include "trace.h" 33 34 #define NVME_MINORS (1U << MINORBITS) 35 36 struct nvme_ns_info { 37 struct nvme_ns_ids ids; 38 u32 nsid; 39 __le32 anagrpid; 40 u8 pi_offset; 41 bool is_shared; 42 bool is_readonly; 43 bool is_ready; 44 bool is_removed; 45 bool is_rotational; 46 bool no_vwc; 47 }; 48 49 unsigned int admin_timeout = 60; 50 module_param(admin_timeout, uint, 0644); 51 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 52 EXPORT_SYMBOL_GPL(admin_timeout); 53 54 unsigned int nvme_io_timeout = 30; 55 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 56 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 57 EXPORT_SYMBOL_GPL(nvme_io_timeout); 58 59 static unsigned char shutdown_timeout = 5; 60 module_param(shutdown_timeout, byte, 0644); 61 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 62 63 static u8 nvme_max_retries = 5; 64 module_param_named(max_retries, nvme_max_retries, byte, 0644); 65 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 66 67 static unsigned long default_ps_max_latency_us = 100000; 68 module_param(default_ps_max_latency_us, ulong, 0644); 69 MODULE_PARM_DESC(default_ps_max_latency_us, 70 "max power saving latency for new devices; use PM QOS to change per device"); 71 72 static bool force_apst; 73 module_param(force_apst, bool, 0644); 74 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 75 76 static unsigned long apst_primary_timeout_ms = 100; 77 module_param(apst_primary_timeout_ms, ulong, 0644); 78 MODULE_PARM_DESC(apst_primary_timeout_ms, 79 "primary APST timeout in ms"); 80 81 static unsigned long apst_secondary_timeout_ms = 2000; 82 module_param(apst_secondary_timeout_ms, ulong, 0644); 83 MODULE_PARM_DESC(apst_secondary_timeout_ms, 84 "secondary APST timeout in ms"); 85 86 static unsigned long apst_primary_latency_tol_us = 15000; 87 module_param(apst_primary_latency_tol_us, ulong, 0644); 88 MODULE_PARM_DESC(apst_primary_latency_tol_us, 89 "primary APST latency tolerance in us"); 90 91 static unsigned long apst_secondary_latency_tol_us = 100000; 92 module_param(apst_secondary_latency_tol_us, ulong, 0644); 93 MODULE_PARM_DESC(apst_secondary_latency_tol_us, 94 "secondary APST latency tolerance in us"); 95 96 /* 97 * Older kernels didn't enable protection information if it was at an offset. 98 * Newer kernels do, so it breaks reads on the upgrade if such formats were 99 * used in prior kernels since the metadata written did not contain a valid 100 * checksum. 101 */ 102 static bool disable_pi_offsets = false; 103 module_param(disable_pi_offsets, bool, 0444); 104 MODULE_PARM_DESC(disable_pi_offsets, 105 "disable protection information if it has an offset"); 106 107 /* 108 * nvme_wq - hosts nvme related works that are not reset or delete 109 * nvme_reset_wq - hosts nvme reset works 110 * nvme_delete_wq - hosts nvme delete works 111 * 112 * nvme_wq will host works such as scan, aen handling, fw activation, 113 * keep-alive, periodic reconnects etc. nvme_reset_wq 114 * runs reset works which also flush works hosted on nvme_wq for 115 * serialization purposes. nvme_delete_wq host controller deletion 116 * works which flush reset works for serialization. 117 */ 118 struct workqueue_struct *nvme_wq; 119 EXPORT_SYMBOL_GPL(nvme_wq); 120 121 struct workqueue_struct *nvme_reset_wq; 122 EXPORT_SYMBOL_GPL(nvme_reset_wq); 123 124 struct workqueue_struct *nvme_delete_wq; 125 EXPORT_SYMBOL_GPL(nvme_delete_wq); 126 127 static LIST_HEAD(nvme_subsystems); 128 DEFINE_MUTEX(nvme_subsystems_lock); 129 130 static DEFINE_IDA(nvme_instance_ida); 131 static dev_t nvme_ctrl_base_chr_devt; 132 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env); 133 static const struct class nvme_class = { 134 .name = "nvme", 135 .dev_uevent = nvme_class_uevent, 136 }; 137 138 static const struct class nvme_subsys_class = { 139 .name = "nvme-subsystem", 140 }; 141 142 static DEFINE_IDA(nvme_ns_chr_minor_ida); 143 static dev_t nvme_ns_chr_devt; 144 static const struct class nvme_ns_chr_class = { 145 .name = "nvme-generic", 146 }; 147 148 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 149 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 150 unsigned nsid); 151 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 152 struct nvme_command *cmd); 153 154 void nvme_queue_scan(struct nvme_ctrl *ctrl) 155 { 156 /* 157 * Only new queue scan work when admin and IO queues are both alive 158 */ 159 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset) 160 queue_work(nvme_wq, &ctrl->scan_work); 161 } 162 163 /* 164 * Use this function to proceed with scheduling reset_work for a controller 165 * that had previously been set to the resetting state. This is intended for 166 * code paths that can't be interrupted by other reset attempts. A hot removal 167 * may prevent this from succeeding. 168 */ 169 int nvme_try_sched_reset(struct nvme_ctrl *ctrl) 170 { 171 if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING) 172 return -EBUSY; 173 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 174 return -EBUSY; 175 return 0; 176 } 177 EXPORT_SYMBOL_GPL(nvme_try_sched_reset); 178 179 static void nvme_failfast_work(struct work_struct *work) 180 { 181 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 182 struct nvme_ctrl, failfast_work); 183 184 if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING) 185 return; 186 187 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 188 dev_info(ctrl->device, "failfast expired\n"); 189 nvme_kick_requeue_lists(ctrl); 190 } 191 192 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl) 193 { 194 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1) 195 return; 196 197 schedule_delayed_work(&ctrl->failfast_work, 198 ctrl->opts->fast_io_fail_tmo * HZ); 199 } 200 201 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl) 202 { 203 if (!ctrl->opts) 204 return; 205 206 cancel_delayed_work_sync(&ctrl->failfast_work); 207 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 208 } 209 210 211 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 212 { 213 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 214 return -EBUSY; 215 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 216 return -EBUSY; 217 return 0; 218 } 219 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 220 221 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 222 { 223 int ret; 224 225 ret = nvme_reset_ctrl(ctrl); 226 if (!ret) { 227 flush_work(&ctrl->reset_work); 228 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE) 229 ret = -ENETRESET; 230 } 231 232 return ret; 233 } 234 235 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl) 236 { 237 dev_info(ctrl->device, 238 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl)); 239 240 flush_work(&ctrl->reset_work); 241 nvme_stop_ctrl(ctrl); 242 nvme_remove_namespaces(ctrl); 243 ctrl->ops->delete_ctrl(ctrl); 244 nvme_uninit_ctrl(ctrl); 245 } 246 247 static void nvme_delete_ctrl_work(struct work_struct *work) 248 { 249 struct nvme_ctrl *ctrl = 250 container_of(work, struct nvme_ctrl, delete_work); 251 252 nvme_do_delete_ctrl(ctrl); 253 } 254 255 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 256 { 257 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 258 return -EBUSY; 259 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 260 return -EBUSY; 261 return 0; 262 } 263 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 264 265 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 266 { 267 /* 268 * Keep a reference until nvme_do_delete_ctrl() complete, 269 * since ->delete_ctrl can free the controller. 270 */ 271 nvme_get_ctrl(ctrl); 272 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 273 nvme_do_delete_ctrl(ctrl); 274 nvme_put_ctrl(ctrl); 275 } 276 277 static blk_status_t nvme_error_status(u16 status) 278 { 279 switch (status & NVME_SCT_SC_MASK) { 280 case NVME_SC_SUCCESS: 281 return BLK_STS_OK; 282 case NVME_SC_CAP_EXCEEDED: 283 return BLK_STS_NOSPC; 284 case NVME_SC_LBA_RANGE: 285 case NVME_SC_CMD_INTERRUPTED: 286 case NVME_SC_NS_NOT_READY: 287 return BLK_STS_TARGET; 288 case NVME_SC_BAD_ATTRIBUTES: 289 case NVME_SC_ONCS_NOT_SUPPORTED: 290 case NVME_SC_INVALID_OPCODE: 291 case NVME_SC_INVALID_FIELD: 292 case NVME_SC_INVALID_NS: 293 return BLK_STS_NOTSUPP; 294 case NVME_SC_WRITE_FAULT: 295 case NVME_SC_READ_ERROR: 296 case NVME_SC_UNWRITTEN_BLOCK: 297 case NVME_SC_ACCESS_DENIED: 298 case NVME_SC_READ_ONLY: 299 case NVME_SC_COMPARE_FAILED: 300 return BLK_STS_MEDIUM; 301 case NVME_SC_GUARD_CHECK: 302 case NVME_SC_APPTAG_CHECK: 303 case NVME_SC_REFTAG_CHECK: 304 case NVME_SC_INVALID_PI: 305 return BLK_STS_PROTECTION; 306 case NVME_SC_RESERVATION_CONFLICT: 307 return BLK_STS_RESV_CONFLICT; 308 case NVME_SC_HOST_PATH_ERROR: 309 return BLK_STS_TRANSPORT; 310 case NVME_SC_ZONE_TOO_MANY_ACTIVE: 311 return BLK_STS_ZONE_ACTIVE_RESOURCE; 312 case NVME_SC_ZONE_TOO_MANY_OPEN: 313 return BLK_STS_ZONE_OPEN_RESOURCE; 314 default: 315 return BLK_STS_IOERR; 316 } 317 } 318 319 static void nvme_retry_req(struct request *req) 320 { 321 unsigned long delay = 0; 322 u16 crd; 323 324 /* The mask and shift result must be <= 3 */ 325 crd = (nvme_req(req)->status & NVME_STATUS_CRD) >> 11; 326 if (crd) 327 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100; 328 329 nvme_req(req)->retries++; 330 blk_mq_requeue_request(req, false); 331 blk_mq_delay_kick_requeue_list(req->q, delay); 332 } 333 334 static void nvme_log_error(struct request *req) 335 { 336 struct nvme_ns *ns = req->q->queuedata; 337 struct nvme_request *nr = nvme_req(req); 338 339 if (ns) { 340 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %u blocks, %s (sct 0x%x / sc 0x%x) %s%s\n", 341 ns->disk ? ns->disk->disk_name : "?", 342 nvme_get_opcode_str(nr->cmd->common.opcode), 343 nr->cmd->common.opcode, 344 nvme_sect_to_lba(ns->head, blk_rq_pos(req)), 345 blk_rq_bytes(req) >> ns->head->lba_shift, 346 nvme_get_error_status_str(nr->status), 347 NVME_SCT(nr->status), /* Status Code Type */ 348 nr->status & NVME_SC_MASK, /* Status Code */ 349 nr->status & NVME_STATUS_MORE ? "MORE " : "", 350 nr->status & NVME_STATUS_DNR ? "DNR " : ""); 351 return; 352 } 353 354 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n", 355 dev_name(nr->ctrl->device), 356 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 357 nr->cmd->common.opcode, 358 nvme_get_error_status_str(nr->status), 359 NVME_SCT(nr->status), /* Status Code Type */ 360 nr->status & NVME_SC_MASK, /* Status Code */ 361 nr->status & NVME_STATUS_MORE ? "MORE " : "", 362 nr->status & NVME_STATUS_DNR ? "DNR " : ""); 363 } 364 365 static void nvme_log_err_passthru(struct request *req) 366 { 367 struct nvme_ns *ns = req->q->queuedata; 368 struct nvme_request *nr = nvme_req(req); 369 370 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s" 371 "cdw10=0x%x cdw11=0x%x cdw12=0x%x cdw13=0x%x cdw14=0x%x cdw15=0x%x\n", 372 ns ? ns->disk->disk_name : dev_name(nr->ctrl->device), 373 ns ? nvme_get_opcode_str(nr->cmd->common.opcode) : 374 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 375 nr->cmd->common.opcode, 376 nvme_get_error_status_str(nr->status), 377 NVME_SCT(nr->status), /* Status Code Type */ 378 nr->status & NVME_SC_MASK, /* Status Code */ 379 nr->status & NVME_STATUS_MORE ? "MORE " : "", 380 nr->status & NVME_STATUS_DNR ? "DNR " : "", 381 nr->cmd->common.cdw10, 382 nr->cmd->common.cdw11, 383 nr->cmd->common.cdw12, 384 nr->cmd->common.cdw13, 385 nr->cmd->common.cdw14, 386 nr->cmd->common.cdw14); 387 } 388 389 enum nvme_disposition { 390 COMPLETE, 391 RETRY, 392 FAILOVER, 393 AUTHENTICATE, 394 }; 395 396 static inline enum nvme_disposition nvme_decide_disposition(struct request *req) 397 { 398 if (likely(nvme_req(req)->status == 0)) 399 return COMPLETE; 400 401 if (blk_noretry_request(req) || 402 (nvme_req(req)->status & NVME_STATUS_DNR) || 403 nvme_req(req)->retries >= nvme_max_retries) 404 return COMPLETE; 405 406 if ((nvme_req(req)->status & NVME_SCT_SC_MASK) == NVME_SC_AUTH_REQUIRED) 407 return AUTHENTICATE; 408 409 if (req->cmd_flags & REQ_NVME_MPATH) { 410 if (nvme_is_path_error(nvme_req(req)->status) || 411 blk_queue_dying(req->q)) 412 return FAILOVER; 413 } else { 414 if (blk_queue_dying(req->q)) 415 return COMPLETE; 416 } 417 418 return RETRY; 419 } 420 421 static inline void nvme_end_req_zoned(struct request *req) 422 { 423 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 424 req_op(req) == REQ_OP_ZONE_APPEND) { 425 struct nvme_ns *ns = req->q->queuedata; 426 427 req->__sector = nvme_lba_to_sect(ns->head, 428 le64_to_cpu(nvme_req(req)->result.u64)); 429 } 430 } 431 432 static inline void __nvme_end_req(struct request *req) 433 { 434 nvme_end_req_zoned(req); 435 nvme_trace_bio_complete(req); 436 if (req->cmd_flags & REQ_NVME_MPATH) 437 nvme_mpath_end_request(req); 438 } 439 440 void nvme_end_req(struct request *req) 441 { 442 blk_status_t status = nvme_error_status(nvme_req(req)->status); 443 444 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) { 445 if (blk_rq_is_passthrough(req)) 446 nvme_log_err_passthru(req); 447 else 448 nvme_log_error(req); 449 } 450 __nvme_end_req(req); 451 blk_mq_end_request(req, status); 452 } 453 454 void nvme_complete_rq(struct request *req) 455 { 456 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 457 458 trace_nvme_complete_rq(req); 459 nvme_cleanup_cmd(req); 460 461 /* 462 * Completions of long-running commands should not be able to 463 * defer sending of periodic keep alives, since the controller 464 * may have completed processing such commands a long time ago 465 * (arbitrarily close to command submission time). 466 * req->deadline - req->timeout is the command submission time 467 * in jiffies. 468 */ 469 if (ctrl->kas && 470 req->deadline - req->timeout >= ctrl->ka_last_check_time) 471 ctrl->comp_seen = true; 472 473 switch (nvme_decide_disposition(req)) { 474 case COMPLETE: 475 nvme_end_req(req); 476 return; 477 case RETRY: 478 nvme_retry_req(req); 479 return; 480 case FAILOVER: 481 nvme_failover_req(req); 482 return; 483 case AUTHENTICATE: 484 #ifdef CONFIG_NVME_HOST_AUTH 485 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 486 nvme_retry_req(req); 487 #else 488 nvme_end_req(req); 489 #endif 490 return; 491 } 492 } 493 EXPORT_SYMBOL_GPL(nvme_complete_rq); 494 495 void nvme_complete_batch_req(struct request *req) 496 { 497 trace_nvme_complete_rq(req); 498 nvme_cleanup_cmd(req); 499 __nvme_end_req(req); 500 } 501 EXPORT_SYMBOL_GPL(nvme_complete_batch_req); 502 503 /* 504 * Called to unwind from ->queue_rq on a failed command submission so that the 505 * multipathing code gets called to potentially failover to another path. 506 * The caller needs to unwind all transport specific resource allocations and 507 * must return propagate the return value. 508 */ 509 blk_status_t nvme_host_path_error(struct request *req) 510 { 511 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR; 512 blk_mq_set_request_complete(req); 513 nvme_complete_rq(req); 514 return BLK_STS_OK; 515 } 516 EXPORT_SYMBOL_GPL(nvme_host_path_error); 517 518 bool nvme_cancel_request(struct request *req, void *data) 519 { 520 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 521 "Cancelling I/O %d", req->tag); 522 523 /* don't abort one completed or idle request */ 524 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT) 525 return true; 526 527 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD; 528 nvme_req(req)->flags |= NVME_REQ_CANCELLED; 529 blk_mq_complete_request(req); 530 return true; 531 } 532 EXPORT_SYMBOL_GPL(nvme_cancel_request); 533 534 void nvme_cancel_tagset(struct nvme_ctrl *ctrl) 535 { 536 if (ctrl->tagset) { 537 blk_mq_tagset_busy_iter(ctrl->tagset, 538 nvme_cancel_request, ctrl); 539 blk_mq_tagset_wait_completed_request(ctrl->tagset); 540 } 541 } 542 EXPORT_SYMBOL_GPL(nvme_cancel_tagset); 543 544 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl) 545 { 546 if (ctrl->admin_tagset) { 547 blk_mq_tagset_busy_iter(ctrl->admin_tagset, 548 nvme_cancel_request, ctrl); 549 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset); 550 } 551 } 552 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset); 553 554 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 555 enum nvme_ctrl_state new_state) 556 { 557 enum nvme_ctrl_state old_state; 558 unsigned long flags; 559 bool changed = false; 560 561 spin_lock_irqsave(&ctrl->lock, flags); 562 563 old_state = nvme_ctrl_state(ctrl); 564 switch (new_state) { 565 case NVME_CTRL_LIVE: 566 switch (old_state) { 567 case NVME_CTRL_NEW: 568 case NVME_CTRL_RESETTING: 569 case NVME_CTRL_CONNECTING: 570 changed = true; 571 fallthrough; 572 default: 573 break; 574 } 575 break; 576 case NVME_CTRL_RESETTING: 577 switch (old_state) { 578 case NVME_CTRL_NEW: 579 case NVME_CTRL_LIVE: 580 changed = true; 581 fallthrough; 582 default: 583 break; 584 } 585 break; 586 case NVME_CTRL_CONNECTING: 587 switch (old_state) { 588 case NVME_CTRL_NEW: 589 case NVME_CTRL_RESETTING: 590 changed = true; 591 fallthrough; 592 default: 593 break; 594 } 595 break; 596 case NVME_CTRL_DELETING: 597 switch (old_state) { 598 case NVME_CTRL_LIVE: 599 case NVME_CTRL_RESETTING: 600 case NVME_CTRL_CONNECTING: 601 changed = true; 602 fallthrough; 603 default: 604 break; 605 } 606 break; 607 case NVME_CTRL_DELETING_NOIO: 608 switch (old_state) { 609 case NVME_CTRL_DELETING: 610 case NVME_CTRL_DEAD: 611 changed = true; 612 fallthrough; 613 default: 614 break; 615 } 616 break; 617 case NVME_CTRL_DEAD: 618 switch (old_state) { 619 case NVME_CTRL_DELETING: 620 changed = true; 621 fallthrough; 622 default: 623 break; 624 } 625 break; 626 default: 627 break; 628 } 629 630 if (changed) { 631 WRITE_ONCE(ctrl->state, new_state); 632 wake_up_all(&ctrl->state_wq); 633 } 634 635 spin_unlock_irqrestore(&ctrl->lock, flags); 636 if (!changed) 637 return false; 638 639 if (new_state == NVME_CTRL_LIVE) { 640 if (old_state == NVME_CTRL_CONNECTING) 641 nvme_stop_failfast_work(ctrl); 642 nvme_kick_requeue_lists(ctrl); 643 } else if (new_state == NVME_CTRL_CONNECTING && 644 old_state == NVME_CTRL_RESETTING) { 645 nvme_start_failfast_work(ctrl); 646 } 647 return changed; 648 } 649 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 650 651 /* 652 * Waits for the controller state to be resetting, or returns false if it is 653 * not possible to ever transition to that state. 654 */ 655 bool nvme_wait_reset(struct nvme_ctrl *ctrl) 656 { 657 wait_event(ctrl->state_wq, 658 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) || 659 nvme_state_terminal(ctrl)); 660 return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING; 661 } 662 EXPORT_SYMBOL_GPL(nvme_wait_reset); 663 664 static void nvme_free_ns_head(struct kref *ref) 665 { 666 struct nvme_ns_head *head = 667 container_of(ref, struct nvme_ns_head, ref); 668 669 nvme_mpath_remove_disk(head); 670 ida_free(&head->subsys->ns_ida, head->instance); 671 cleanup_srcu_struct(&head->srcu); 672 nvme_put_subsystem(head->subsys); 673 kfree(head); 674 } 675 676 bool nvme_tryget_ns_head(struct nvme_ns_head *head) 677 { 678 return kref_get_unless_zero(&head->ref); 679 } 680 681 void nvme_put_ns_head(struct nvme_ns_head *head) 682 { 683 kref_put(&head->ref, nvme_free_ns_head); 684 } 685 686 static void nvme_free_ns(struct kref *kref) 687 { 688 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 689 690 put_disk(ns->disk); 691 nvme_put_ns_head(ns->head); 692 nvme_put_ctrl(ns->ctrl); 693 kfree(ns); 694 } 695 696 bool nvme_get_ns(struct nvme_ns *ns) 697 { 698 return kref_get_unless_zero(&ns->kref); 699 } 700 701 void nvme_put_ns(struct nvme_ns *ns) 702 { 703 kref_put(&ns->kref, nvme_free_ns); 704 } 705 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, "NVME_TARGET_PASSTHRU"); 706 707 static inline void nvme_clear_nvme_request(struct request *req) 708 { 709 nvme_req(req)->status = 0; 710 nvme_req(req)->retries = 0; 711 nvme_req(req)->flags = 0; 712 req->rq_flags |= RQF_DONTPREP; 713 } 714 715 /* initialize a passthrough request */ 716 void nvme_init_request(struct request *req, struct nvme_command *cmd) 717 { 718 struct nvme_request *nr = nvme_req(req); 719 bool logging_enabled; 720 721 if (req->q->queuedata) { 722 struct nvme_ns *ns = req->q->disk->private_data; 723 724 logging_enabled = ns->head->passthru_err_log_enabled; 725 req->timeout = NVME_IO_TIMEOUT; 726 } else { /* no queuedata implies admin queue */ 727 logging_enabled = nr->ctrl->passthru_err_log_enabled; 728 req->timeout = NVME_ADMIN_TIMEOUT; 729 } 730 731 if (!logging_enabled) 732 req->rq_flags |= RQF_QUIET; 733 734 /* passthru commands should let the driver set the SGL flags */ 735 cmd->common.flags &= ~NVME_CMD_SGL_ALL; 736 737 req->cmd_flags |= REQ_FAILFAST_DRIVER; 738 if (req->mq_hctx->type == HCTX_TYPE_POLL) 739 req->cmd_flags |= REQ_POLLED; 740 nvme_clear_nvme_request(req); 741 memcpy(nr->cmd, cmd, sizeof(*cmd)); 742 } 743 EXPORT_SYMBOL_GPL(nvme_init_request); 744 745 /* 746 * For something we're not in a state to send to the device the default action 747 * is to busy it and retry it after the controller state is recovered. However, 748 * if the controller is deleting or if anything is marked for failfast or 749 * nvme multipath it is immediately failed. 750 * 751 * Note: commands used to initialize the controller will be marked for failfast. 752 * Note: nvme cli/ioctl commands are marked for failfast. 753 */ 754 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 755 struct request *rq) 756 { 757 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 758 759 if (state != NVME_CTRL_DELETING_NOIO && 760 state != NVME_CTRL_DELETING && 761 state != NVME_CTRL_DEAD && 762 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) && 763 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH)) 764 return BLK_STS_RESOURCE; 765 return nvme_host_path_error(rq); 766 } 767 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command); 768 769 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 770 bool queue_live, enum nvme_ctrl_state state) 771 { 772 struct nvme_request *req = nvme_req(rq); 773 774 /* 775 * currently we have a problem sending passthru commands 776 * on the admin_q if the controller is not LIVE because we can't 777 * make sure that they are going out after the admin connect, 778 * controller enable and/or other commands in the initialization 779 * sequence. until the controller will be LIVE, fail with 780 * BLK_STS_RESOURCE so that they will be rescheduled. 781 */ 782 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD)) 783 return false; 784 785 if (ctrl->ops->flags & NVME_F_FABRICS) { 786 /* 787 * Only allow commands on a live queue, except for the connect 788 * command, which is require to set the queue live in the 789 * appropinquate states. 790 */ 791 switch (state) { 792 case NVME_CTRL_CONNECTING: 793 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) && 794 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect || 795 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send || 796 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive)) 797 return true; 798 break; 799 default: 800 break; 801 case NVME_CTRL_DEAD: 802 return false; 803 } 804 } 805 806 return queue_live; 807 } 808 EXPORT_SYMBOL_GPL(__nvme_check_ready); 809 810 static inline void nvme_setup_flush(struct nvme_ns *ns, 811 struct nvme_command *cmnd) 812 { 813 memset(cmnd, 0, sizeof(*cmnd)); 814 cmnd->common.opcode = nvme_cmd_flush; 815 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 816 } 817 818 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 819 struct nvme_command *cmnd) 820 { 821 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 822 struct nvme_dsm_range *range; 823 struct bio *bio; 824 825 /* 826 * Some devices do not consider the DSM 'Number of Ranges' field when 827 * determining how much data to DMA. Always allocate memory for maximum 828 * number of segments to prevent device reading beyond end of buffer. 829 */ 830 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES; 831 832 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN); 833 if (!range) { 834 /* 835 * If we fail allocation our range, fallback to the controller 836 * discard page. If that's also busy, it's safe to return 837 * busy, as we know we can make progress once that's freed. 838 */ 839 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 840 return BLK_STS_RESOURCE; 841 842 range = page_address(ns->ctrl->discard_page); 843 } 844 845 if (queue_max_discard_segments(req->q) == 1) { 846 u64 slba = nvme_sect_to_lba(ns->head, blk_rq_pos(req)); 847 u32 nlb = blk_rq_sectors(req) >> (ns->head->lba_shift - 9); 848 849 range[0].cattr = cpu_to_le32(0); 850 range[0].nlb = cpu_to_le32(nlb); 851 range[0].slba = cpu_to_le64(slba); 852 n = 1; 853 } else { 854 __rq_for_each_bio(bio, req) { 855 u64 slba = nvme_sect_to_lba(ns->head, 856 bio->bi_iter.bi_sector); 857 u32 nlb = bio->bi_iter.bi_size >> ns->head->lba_shift; 858 859 if (n < segments) { 860 range[n].cattr = cpu_to_le32(0); 861 range[n].nlb = cpu_to_le32(nlb); 862 range[n].slba = cpu_to_le64(slba); 863 } 864 n++; 865 } 866 } 867 868 if (WARN_ON_ONCE(n != segments)) { 869 if (virt_to_page(range) == ns->ctrl->discard_page) 870 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 871 else 872 kfree(range); 873 return BLK_STS_IOERR; 874 } 875 876 memset(cmnd, 0, sizeof(*cmnd)); 877 cmnd->dsm.opcode = nvme_cmd_dsm; 878 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 879 cmnd->dsm.nr = cpu_to_le32(segments - 1); 880 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 881 882 bvec_set_virt(&req->special_vec, range, alloc_size); 883 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 884 885 return BLK_STS_OK; 886 } 887 888 static void nvme_set_app_tag(struct request *req, struct nvme_command *cmnd) 889 { 890 cmnd->rw.lbat = cpu_to_le16(bio_integrity(req->bio)->app_tag); 891 cmnd->rw.lbatm = cpu_to_le16(0xffff); 892 } 893 894 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd, 895 struct request *req) 896 { 897 u32 upper, lower; 898 u64 ref48; 899 900 /* both rw and write zeroes share the same reftag format */ 901 switch (ns->head->guard_type) { 902 case NVME_NVM_NS_16B_GUARD: 903 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 904 break; 905 case NVME_NVM_NS_64B_GUARD: 906 ref48 = ext_pi_ref_tag(req); 907 lower = lower_32_bits(ref48); 908 upper = upper_32_bits(ref48); 909 910 cmnd->rw.reftag = cpu_to_le32(lower); 911 cmnd->rw.cdw3 = cpu_to_le32(upper); 912 break; 913 default: 914 break; 915 } 916 } 917 918 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns, 919 struct request *req, struct nvme_command *cmnd) 920 { 921 memset(cmnd, 0, sizeof(*cmnd)); 922 923 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 924 return nvme_setup_discard(ns, req, cmnd); 925 926 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes; 927 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id); 928 cmnd->write_zeroes.slba = 929 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req))); 930 cmnd->write_zeroes.length = 931 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1); 932 933 if (!(req->cmd_flags & REQ_NOUNMAP) && 934 (ns->head->features & NVME_NS_DEAC)) 935 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC); 936 937 if (nvme_ns_has_pi(ns->head)) { 938 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT); 939 940 switch (ns->head->pi_type) { 941 case NVME_NS_DPS_PI_TYPE1: 942 case NVME_NS_DPS_PI_TYPE2: 943 nvme_set_ref_tag(ns, cmnd, req); 944 break; 945 } 946 } 947 948 return BLK_STS_OK; 949 } 950 951 /* 952 * NVMe does not support a dedicated command to issue an atomic write. A write 953 * which does adhere to the device atomic limits will silently be executed 954 * non-atomically. The request issuer should ensure that the write is within 955 * the queue atomic writes limits, but just validate this in case it is not. 956 */ 957 static bool nvme_valid_atomic_write(struct request *req) 958 { 959 struct request_queue *q = req->q; 960 u32 boundary_bytes = queue_atomic_write_boundary_bytes(q); 961 962 if (blk_rq_bytes(req) > queue_atomic_write_unit_max_bytes(q)) 963 return false; 964 965 if (boundary_bytes) { 966 u64 mask = boundary_bytes - 1, imask = ~mask; 967 u64 start = blk_rq_pos(req) << SECTOR_SHIFT; 968 u64 end = start + blk_rq_bytes(req) - 1; 969 970 /* If greater then must be crossing a boundary */ 971 if (blk_rq_bytes(req) > boundary_bytes) 972 return false; 973 974 if ((start & imask) != (end & imask)) 975 return false; 976 } 977 978 return true; 979 } 980 981 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 982 struct request *req, struct nvme_command *cmnd, 983 enum nvme_opcode op) 984 { 985 u16 control = 0; 986 u32 dsmgmt = 0; 987 988 if (req->cmd_flags & REQ_FUA) 989 control |= NVME_RW_FUA; 990 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 991 control |= NVME_RW_LR; 992 993 if (req->cmd_flags & REQ_RAHEAD) 994 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 995 996 if (req->cmd_flags & REQ_ATOMIC && !nvme_valid_atomic_write(req)) 997 return BLK_STS_INVAL; 998 999 cmnd->rw.opcode = op; 1000 cmnd->rw.flags = 0; 1001 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 1002 cmnd->rw.cdw2 = 0; 1003 cmnd->rw.cdw3 = 0; 1004 cmnd->rw.metadata = 0; 1005 cmnd->rw.slba = 1006 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req))); 1007 cmnd->rw.length = 1008 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1); 1009 cmnd->rw.reftag = 0; 1010 cmnd->rw.lbat = 0; 1011 cmnd->rw.lbatm = 0; 1012 1013 if (ns->head->ms) { 1014 /* 1015 * If formated with metadata, the block layer always provides a 1016 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 1017 * we enable the PRACT bit for protection information or set the 1018 * namespace capacity to zero to prevent any I/O. 1019 */ 1020 if (!blk_integrity_rq(req)) { 1021 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns->head))) 1022 return BLK_STS_NOTSUPP; 1023 control |= NVME_RW_PRINFO_PRACT; 1024 } 1025 1026 if (bio_integrity_flagged(req->bio, BIP_CHECK_GUARD)) 1027 control |= NVME_RW_PRINFO_PRCHK_GUARD; 1028 if (bio_integrity_flagged(req->bio, BIP_CHECK_REFTAG)) { 1029 control |= NVME_RW_PRINFO_PRCHK_REF; 1030 if (op == nvme_cmd_zone_append) 1031 control |= NVME_RW_APPEND_PIREMAP; 1032 nvme_set_ref_tag(ns, cmnd, req); 1033 } 1034 if (bio_integrity_flagged(req->bio, BIP_CHECK_APPTAG)) { 1035 control |= NVME_RW_PRINFO_PRCHK_APP; 1036 nvme_set_app_tag(req, cmnd); 1037 } 1038 } 1039 1040 cmnd->rw.control = cpu_to_le16(control); 1041 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 1042 return 0; 1043 } 1044 1045 void nvme_cleanup_cmd(struct request *req) 1046 { 1047 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 1048 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 1049 1050 if (req->special_vec.bv_page == ctrl->discard_page) 1051 clear_bit_unlock(0, &ctrl->discard_page_busy); 1052 else 1053 kfree(bvec_virt(&req->special_vec)); 1054 req->rq_flags &= ~RQF_SPECIAL_PAYLOAD; 1055 } 1056 } 1057 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 1058 1059 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req) 1060 { 1061 struct nvme_command *cmd = nvme_req(req)->cmd; 1062 blk_status_t ret = BLK_STS_OK; 1063 1064 if (!(req->rq_flags & RQF_DONTPREP)) 1065 nvme_clear_nvme_request(req); 1066 1067 switch (req_op(req)) { 1068 case REQ_OP_DRV_IN: 1069 case REQ_OP_DRV_OUT: 1070 /* these are setup prior to execution in nvme_init_request() */ 1071 break; 1072 case REQ_OP_FLUSH: 1073 nvme_setup_flush(ns, cmd); 1074 break; 1075 case REQ_OP_ZONE_RESET_ALL: 1076 case REQ_OP_ZONE_RESET: 1077 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET); 1078 break; 1079 case REQ_OP_ZONE_OPEN: 1080 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN); 1081 break; 1082 case REQ_OP_ZONE_CLOSE: 1083 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE); 1084 break; 1085 case REQ_OP_ZONE_FINISH: 1086 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH); 1087 break; 1088 case REQ_OP_WRITE_ZEROES: 1089 ret = nvme_setup_write_zeroes(ns, req, cmd); 1090 break; 1091 case REQ_OP_DISCARD: 1092 ret = nvme_setup_discard(ns, req, cmd); 1093 break; 1094 case REQ_OP_READ: 1095 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read); 1096 break; 1097 case REQ_OP_WRITE: 1098 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write); 1099 break; 1100 case REQ_OP_ZONE_APPEND: 1101 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append); 1102 break; 1103 default: 1104 WARN_ON_ONCE(1); 1105 return BLK_STS_IOERR; 1106 } 1107 1108 cmd->common.command_id = nvme_cid(req); 1109 trace_nvme_setup_cmd(req, cmd); 1110 return ret; 1111 } 1112 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 1113 1114 /* 1115 * Return values: 1116 * 0: success 1117 * >0: nvme controller's cqe status response 1118 * <0: kernel error in lieu of controller response 1119 */ 1120 int nvme_execute_rq(struct request *rq, bool at_head) 1121 { 1122 blk_status_t status; 1123 1124 status = blk_execute_rq(rq, at_head); 1125 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED) 1126 return -EINTR; 1127 if (nvme_req(rq)->status) 1128 return nvme_req(rq)->status; 1129 return blk_status_to_errno(status); 1130 } 1131 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, "NVME_TARGET_PASSTHRU"); 1132 1133 /* 1134 * Returns 0 on success. If the result is negative, it's a Linux error code; 1135 * if the result is positive, it's an NVM Express status code 1136 */ 1137 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1138 union nvme_result *result, void *buffer, unsigned bufflen, 1139 int qid, nvme_submit_flags_t flags) 1140 { 1141 struct request *req; 1142 int ret; 1143 blk_mq_req_flags_t blk_flags = 0; 1144 1145 if (flags & NVME_SUBMIT_NOWAIT) 1146 blk_flags |= BLK_MQ_REQ_NOWAIT; 1147 if (flags & NVME_SUBMIT_RESERVED) 1148 blk_flags |= BLK_MQ_REQ_RESERVED; 1149 if (qid == NVME_QID_ANY) 1150 req = blk_mq_alloc_request(q, nvme_req_op(cmd), blk_flags); 1151 else 1152 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), blk_flags, 1153 qid - 1); 1154 1155 if (IS_ERR(req)) 1156 return PTR_ERR(req); 1157 nvme_init_request(req, cmd); 1158 if (flags & NVME_SUBMIT_RETRY) 1159 req->cmd_flags &= ~REQ_FAILFAST_DRIVER; 1160 1161 if (buffer && bufflen) { 1162 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); 1163 if (ret) 1164 goto out; 1165 } 1166 1167 ret = nvme_execute_rq(req, flags & NVME_SUBMIT_AT_HEAD); 1168 if (result && ret >= 0) 1169 *result = nvme_req(req)->result; 1170 out: 1171 blk_mq_free_request(req); 1172 return ret; 1173 } 1174 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 1175 1176 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1177 void *buffer, unsigned bufflen) 1178 { 1179 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 1180 NVME_QID_ANY, 0); 1181 } 1182 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 1183 1184 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1185 { 1186 u32 effects = 0; 1187 1188 if (ns) { 1189 effects = le32_to_cpu(ns->head->effects->iocs[opcode]); 1190 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC)) 1191 dev_warn_once(ctrl->device, 1192 "IO command:%02x has unusual effects:%08x\n", 1193 opcode, effects); 1194 1195 /* 1196 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues, 1197 * which would deadlock when done on an I/O command. Note that 1198 * We already warn about an unusual effect above. 1199 */ 1200 effects &= ~NVME_CMD_EFFECTS_CSE_MASK; 1201 } else { 1202 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1203 1204 /* Ignore execution restrictions if any relaxation bits are set */ 1205 if (effects & NVME_CMD_EFFECTS_CSER_MASK) 1206 effects &= ~NVME_CMD_EFFECTS_CSE_MASK; 1207 } 1208 1209 return effects; 1210 } 1211 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, "NVME_TARGET_PASSTHRU"); 1212 1213 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1214 { 1215 u32 effects = nvme_command_effects(ctrl, ns, opcode); 1216 1217 /* 1218 * For simplicity, IO to all namespaces is quiesced even if the command 1219 * effects say only one namespace is affected. 1220 */ 1221 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1222 mutex_lock(&ctrl->scan_lock); 1223 mutex_lock(&ctrl->subsys->lock); 1224 nvme_mpath_start_freeze(ctrl->subsys); 1225 nvme_mpath_wait_freeze(ctrl->subsys); 1226 nvme_start_freeze(ctrl); 1227 nvme_wait_freeze(ctrl); 1228 } 1229 return effects; 1230 } 1231 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, "NVME_TARGET_PASSTHRU"); 1232 1233 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1234 struct nvme_command *cmd, int status) 1235 { 1236 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1237 nvme_unfreeze(ctrl); 1238 nvme_mpath_unfreeze(ctrl->subsys); 1239 mutex_unlock(&ctrl->subsys->lock); 1240 mutex_unlock(&ctrl->scan_lock); 1241 } 1242 if (effects & NVME_CMD_EFFECTS_CCC) { 1243 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY, 1244 &ctrl->flags)) { 1245 dev_info(ctrl->device, 1246 "controller capabilities changed, reset may be required to take effect.\n"); 1247 } 1248 } 1249 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) { 1250 nvme_queue_scan(ctrl); 1251 flush_work(&ctrl->scan_work); 1252 } 1253 if (ns) 1254 return; 1255 1256 switch (cmd->common.opcode) { 1257 case nvme_admin_set_features: 1258 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) { 1259 case NVME_FEAT_KATO: 1260 /* 1261 * Keep alive commands interval on the host should be 1262 * updated when KATO is modified by Set Features 1263 * commands. 1264 */ 1265 if (!status) 1266 nvme_update_keep_alive(ctrl, cmd); 1267 break; 1268 default: 1269 break; 1270 } 1271 break; 1272 default: 1273 break; 1274 } 1275 } 1276 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, "NVME_TARGET_PASSTHRU"); 1277 1278 /* 1279 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1: 1280 * 1281 * The host should send Keep Alive commands at half of the Keep Alive Timeout 1282 * accounting for transport roundtrip times [..]. 1283 */ 1284 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl) 1285 { 1286 unsigned long delay = ctrl->kato * HZ / 2; 1287 1288 /* 1289 * When using Traffic Based Keep Alive, we need to run 1290 * nvme_keep_alive_work at twice the normal frequency, as one 1291 * command completion can postpone sending a keep alive command 1292 * by up to twice the delay between runs. 1293 */ 1294 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) 1295 delay /= 2; 1296 return delay; 1297 } 1298 1299 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl) 1300 { 1301 unsigned long now = jiffies; 1302 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1303 unsigned long ka_next_check_tm = ctrl->ka_last_check_time + delay; 1304 1305 if (time_after(now, ka_next_check_tm)) 1306 delay = 0; 1307 else 1308 delay = ka_next_check_tm - now; 1309 1310 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1311 } 1312 1313 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq, 1314 blk_status_t status) 1315 { 1316 struct nvme_ctrl *ctrl = rq->end_io_data; 1317 unsigned long rtt = jiffies - (rq->deadline - rq->timeout); 1318 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1319 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 1320 1321 /* 1322 * Subtract off the keepalive RTT so nvme_keep_alive_work runs 1323 * at the desired frequency. 1324 */ 1325 if (rtt <= delay) { 1326 delay -= rtt; 1327 } else { 1328 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n", 1329 jiffies_to_msecs(rtt)); 1330 delay = 0; 1331 } 1332 1333 blk_mq_free_request(rq); 1334 1335 if (status) { 1336 dev_err(ctrl->device, 1337 "failed nvme_keep_alive_end_io error=%d\n", 1338 status); 1339 return RQ_END_IO_NONE; 1340 } 1341 1342 ctrl->ka_last_check_time = jiffies; 1343 ctrl->comp_seen = false; 1344 if (state == NVME_CTRL_LIVE || state == NVME_CTRL_CONNECTING) 1345 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1346 return RQ_END_IO_NONE; 1347 } 1348 1349 static void nvme_keep_alive_work(struct work_struct *work) 1350 { 1351 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 1352 struct nvme_ctrl, ka_work); 1353 bool comp_seen = ctrl->comp_seen; 1354 struct request *rq; 1355 1356 ctrl->ka_last_check_time = jiffies; 1357 1358 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 1359 dev_dbg(ctrl->device, 1360 "reschedule traffic based keep-alive timer\n"); 1361 ctrl->comp_seen = false; 1362 nvme_queue_keep_alive_work(ctrl); 1363 return; 1364 } 1365 1366 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd), 1367 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT); 1368 if (IS_ERR(rq)) { 1369 /* allocation failure, reset the controller */ 1370 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq)); 1371 nvme_reset_ctrl(ctrl); 1372 return; 1373 } 1374 nvme_init_request(rq, &ctrl->ka_cmd); 1375 1376 rq->timeout = ctrl->kato * HZ; 1377 rq->end_io = nvme_keep_alive_end_io; 1378 rq->end_io_data = ctrl; 1379 blk_execute_rq_nowait(rq, false); 1380 } 1381 1382 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 1383 { 1384 if (unlikely(ctrl->kato == 0)) 1385 return; 1386 1387 nvme_queue_keep_alive_work(ctrl); 1388 } 1389 1390 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 1391 { 1392 if (unlikely(ctrl->kato == 0)) 1393 return; 1394 1395 cancel_delayed_work_sync(&ctrl->ka_work); 1396 } 1397 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 1398 1399 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 1400 struct nvme_command *cmd) 1401 { 1402 unsigned int new_kato = 1403 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000); 1404 1405 dev_info(ctrl->device, 1406 "keep alive interval updated from %u ms to %u ms\n", 1407 ctrl->kato * 1000 / 2, new_kato * 1000 / 2); 1408 1409 nvme_stop_keep_alive(ctrl); 1410 ctrl->kato = new_kato; 1411 nvme_start_keep_alive(ctrl); 1412 } 1413 1414 static bool nvme_id_cns_ok(struct nvme_ctrl *ctrl, u8 cns) 1415 { 1416 /* 1417 * The CNS field occupies a full byte starting with NVMe 1.2 1418 */ 1419 if (ctrl->vs >= NVME_VS(1, 2, 0)) 1420 return true; 1421 1422 /* 1423 * NVMe 1.1 expanded the CNS value to two bits, which means values 1424 * larger than that could get truncated and treated as an incorrect 1425 * value. 1426 * 1427 * Qemu implemented 1.0 behavior for controllers claiming 1.1 1428 * compliance, so they need to be quirked here. 1429 */ 1430 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1431 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) 1432 return cns <= 3; 1433 1434 /* 1435 * NVMe 1.0 used a single bit for the CNS value. 1436 */ 1437 return cns <= 1; 1438 } 1439 1440 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 1441 { 1442 struct nvme_command c = { }; 1443 int error; 1444 1445 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1446 c.identify.opcode = nvme_admin_identify; 1447 c.identify.cns = NVME_ID_CNS_CTRL; 1448 1449 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 1450 if (!*id) 1451 return -ENOMEM; 1452 1453 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 1454 sizeof(struct nvme_id_ctrl)); 1455 if (error) { 1456 kfree(*id); 1457 *id = NULL; 1458 } 1459 return error; 1460 } 1461 1462 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, 1463 struct nvme_ns_id_desc *cur, bool *csi_seen) 1464 { 1465 const char *warn_str = "ctrl returned bogus length:"; 1466 void *data = cur; 1467 1468 switch (cur->nidt) { 1469 case NVME_NIDT_EUI64: 1470 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1471 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n", 1472 warn_str, cur->nidl); 1473 return -1; 1474 } 1475 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1476 return NVME_NIDT_EUI64_LEN; 1477 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN); 1478 return NVME_NIDT_EUI64_LEN; 1479 case NVME_NIDT_NGUID: 1480 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1481 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n", 1482 warn_str, cur->nidl); 1483 return -1; 1484 } 1485 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1486 return NVME_NIDT_NGUID_LEN; 1487 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN); 1488 return NVME_NIDT_NGUID_LEN; 1489 case NVME_NIDT_UUID: 1490 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1491 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n", 1492 warn_str, cur->nidl); 1493 return -1; 1494 } 1495 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1496 return NVME_NIDT_UUID_LEN; 1497 uuid_copy(&ids->uuid, data + sizeof(*cur)); 1498 return NVME_NIDT_UUID_LEN; 1499 case NVME_NIDT_CSI: 1500 if (cur->nidl != NVME_NIDT_CSI_LEN) { 1501 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n", 1502 warn_str, cur->nidl); 1503 return -1; 1504 } 1505 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN); 1506 *csi_seen = true; 1507 return NVME_NIDT_CSI_LEN; 1508 default: 1509 /* Skip unknown types */ 1510 return cur->nidl; 1511 } 1512 } 1513 1514 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, 1515 struct nvme_ns_info *info) 1516 { 1517 struct nvme_command c = { }; 1518 bool csi_seen = false; 1519 int status, pos, len; 1520 void *data; 1521 1522 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl)) 1523 return 0; 1524 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST) 1525 return 0; 1526 1527 c.identify.opcode = nvme_admin_identify; 1528 c.identify.nsid = cpu_to_le32(info->nsid); 1529 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1530 1531 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1532 if (!data) 1533 return -ENOMEM; 1534 1535 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1536 NVME_IDENTIFY_DATA_SIZE); 1537 if (status) { 1538 dev_warn(ctrl->device, 1539 "Identify Descriptors failed (nsid=%u, status=0x%x)\n", 1540 info->nsid, status); 1541 goto free_data; 1542 } 1543 1544 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1545 struct nvme_ns_id_desc *cur = data + pos; 1546 1547 if (cur->nidl == 0) 1548 break; 1549 1550 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen); 1551 if (len < 0) 1552 break; 1553 1554 len += sizeof(*cur); 1555 } 1556 1557 if (nvme_multi_css(ctrl) && !csi_seen) { 1558 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n", 1559 info->nsid); 1560 status = -EINVAL; 1561 } 1562 1563 free_data: 1564 kfree(data); 1565 return status; 1566 } 1567 1568 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1569 struct nvme_id_ns **id) 1570 { 1571 struct nvme_command c = { }; 1572 int error; 1573 1574 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1575 c.identify.opcode = nvme_admin_identify; 1576 c.identify.nsid = cpu_to_le32(nsid); 1577 c.identify.cns = NVME_ID_CNS_NS; 1578 1579 *id = kmalloc(sizeof(**id), GFP_KERNEL); 1580 if (!*id) 1581 return -ENOMEM; 1582 1583 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id)); 1584 if (error) { 1585 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error); 1586 kfree(*id); 1587 *id = NULL; 1588 } 1589 return error; 1590 } 1591 1592 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl, 1593 struct nvme_ns_info *info) 1594 { 1595 struct nvme_ns_ids *ids = &info->ids; 1596 struct nvme_id_ns *id; 1597 int ret; 1598 1599 ret = nvme_identify_ns(ctrl, info->nsid, &id); 1600 if (ret) 1601 return ret; 1602 1603 if (id->ncap == 0) { 1604 /* namespace not allocated or attached */ 1605 info->is_removed = true; 1606 ret = -ENODEV; 1607 goto error; 1608 } 1609 1610 info->anagrpid = id->anagrpid; 1611 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1612 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1613 info->is_ready = true; 1614 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) { 1615 dev_info(ctrl->device, 1616 "Ignoring bogus Namespace Identifiers\n"); 1617 } else { 1618 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1619 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 1620 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64)); 1621 if (ctrl->vs >= NVME_VS(1, 2, 0) && 1622 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 1623 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid)); 1624 } 1625 1626 error: 1627 kfree(id); 1628 return ret; 1629 } 1630 1631 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl, 1632 struct nvme_ns_info *info) 1633 { 1634 struct nvme_id_ns_cs_indep *id; 1635 struct nvme_command c = { 1636 .identify.opcode = nvme_admin_identify, 1637 .identify.nsid = cpu_to_le32(info->nsid), 1638 .identify.cns = NVME_ID_CNS_NS_CS_INDEP, 1639 }; 1640 int ret; 1641 1642 id = kmalloc(sizeof(*id), GFP_KERNEL); 1643 if (!id) 1644 return -ENOMEM; 1645 1646 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 1647 if (!ret) { 1648 info->anagrpid = id->anagrpid; 1649 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1650 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1651 info->is_ready = id->nstat & NVME_NSTAT_NRDY; 1652 info->is_rotational = id->nsfeat & NVME_NS_ROTATIONAL; 1653 info->no_vwc = id->nsfeat & NVME_NS_VWC_NOT_PRESENT; 1654 } 1655 kfree(id); 1656 return ret; 1657 } 1658 1659 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, 1660 unsigned int dword11, void *buffer, size_t buflen, u32 *result) 1661 { 1662 union nvme_result res = { 0 }; 1663 struct nvme_command c = { }; 1664 int ret; 1665 1666 c.features.opcode = op; 1667 c.features.fid = cpu_to_le32(fid); 1668 c.features.dword11 = cpu_to_le32(dword11); 1669 1670 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1671 buffer, buflen, NVME_QID_ANY, 0); 1672 if (ret >= 0 && result) 1673 *result = le32_to_cpu(res.u32); 1674 return ret; 1675 } 1676 1677 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1678 unsigned int dword11, void *buffer, size_t buflen, 1679 u32 *result) 1680 { 1681 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer, 1682 buflen, result); 1683 } 1684 EXPORT_SYMBOL_GPL(nvme_set_features); 1685 1686 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1687 unsigned int dword11, void *buffer, size_t buflen, 1688 u32 *result) 1689 { 1690 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer, 1691 buflen, result); 1692 } 1693 EXPORT_SYMBOL_GPL(nvme_get_features); 1694 1695 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1696 { 1697 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1698 u32 result; 1699 int status, nr_io_queues; 1700 1701 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1702 &result); 1703 if (status < 0) 1704 return status; 1705 1706 /* 1707 * Degraded controllers might return an error when setting the queue 1708 * count. We still want to be able to bring them online and offer 1709 * access to the admin queue, as that might be only way to fix them up. 1710 */ 1711 if (status > 0) { 1712 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1713 *count = 0; 1714 } else { 1715 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1716 *count = min(*count, nr_io_queues); 1717 } 1718 1719 return 0; 1720 } 1721 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1722 1723 #define NVME_AEN_SUPPORTED \ 1724 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ 1725 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) 1726 1727 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1728 { 1729 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1730 int status; 1731 1732 if (!supported_aens) 1733 return; 1734 1735 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1736 NULL, 0, &result); 1737 if (status) 1738 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1739 supported_aens); 1740 1741 queue_work(nvme_wq, &ctrl->async_event_work); 1742 } 1743 1744 static int nvme_ns_open(struct nvme_ns *ns) 1745 { 1746 1747 /* should never be called due to GENHD_FL_HIDDEN */ 1748 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head))) 1749 goto fail; 1750 if (!nvme_get_ns(ns)) 1751 goto fail; 1752 if (!try_module_get(ns->ctrl->ops->module)) 1753 goto fail_put_ns; 1754 1755 return 0; 1756 1757 fail_put_ns: 1758 nvme_put_ns(ns); 1759 fail: 1760 return -ENXIO; 1761 } 1762 1763 static void nvme_ns_release(struct nvme_ns *ns) 1764 { 1765 1766 module_put(ns->ctrl->ops->module); 1767 nvme_put_ns(ns); 1768 } 1769 1770 static int nvme_open(struct gendisk *disk, blk_mode_t mode) 1771 { 1772 return nvme_ns_open(disk->private_data); 1773 } 1774 1775 static void nvme_release(struct gendisk *disk) 1776 { 1777 nvme_ns_release(disk->private_data); 1778 } 1779 1780 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1781 { 1782 /* some standard values */ 1783 geo->heads = 1 << 6; 1784 geo->sectors = 1 << 5; 1785 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1786 return 0; 1787 } 1788 1789 static bool nvme_init_integrity(struct nvme_ns_head *head, 1790 struct queue_limits *lim, struct nvme_ns_info *info) 1791 { 1792 struct blk_integrity *bi = &lim->integrity; 1793 1794 memset(bi, 0, sizeof(*bi)); 1795 1796 if (!head->ms) 1797 return true; 1798 1799 /* 1800 * PI can always be supported as we can ask the controller to simply 1801 * insert/strip it, which is not possible for other kinds of metadata. 1802 */ 1803 if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) || 1804 !(head->features & NVME_NS_METADATA_SUPPORTED)) 1805 return nvme_ns_has_pi(head); 1806 1807 switch (head->pi_type) { 1808 case NVME_NS_DPS_PI_TYPE3: 1809 switch (head->guard_type) { 1810 case NVME_NVM_NS_16B_GUARD: 1811 bi->csum_type = BLK_INTEGRITY_CSUM_CRC; 1812 bi->tag_size = sizeof(u16) + sizeof(u32); 1813 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1814 break; 1815 case NVME_NVM_NS_64B_GUARD: 1816 bi->csum_type = BLK_INTEGRITY_CSUM_CRC64; 1817 bi->tag_size = sizeof(u16) + 6; 1818 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1819 break; 1820 default: 1821 break; 1822 } 1823 break; 1824 case NVME_NS_DPS_PI_TYPE1: 1825 case NVME_NS_DPS_PI_TYPE2: 1826 switch (head->guard_type) { 1827 case NVME_NVM_NS_16B_GUARD: 1828 bi->csum_type = BLK_INTEGRITY_CSUM_CRC; 1829 bi->tag_size = sizeof(u16); 1830 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE | 1831 BLK_INTEGRITY_REF_TAG; 1832 break; 1833 case NVME_NVM_NS_64B_GUARD: 1834 bi->csum_type = BLK_INTEGRITY_CSUM_CRC64; 1835 bi->tag_size = sizeof(u16); 1836 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE | 1837 BLK_INTEGRITY_REF_TAG; 1838 break; 1839 default: 1840 break; 1841 } 1842 break; 1843 default: 1844 break; 1845 } 1846 1847 bi->tuple_size = head->ms; 1848 bi->pi_offset = info->pi_offset; 1849 return true; 1850 } 1851 1852 static void nvme_config_discard(struct nvme_ns *ns, struct queue_limits *lim) 1853 { 1854 struct nvme_ctrl *ctrl = ns->ctrl; 1855 1856 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns->head, UINT_MAX)) 1857 lim->max_hw_discard_sectors = 1858 nvme_lba_to_sect(ns->head, ctrl->dmrsl); 1859 else if (ctrl->oncs & NVME_CTRL_ONCS_DSM) 1860 lim->max_hw_discard_sectors = UINT_MAX; 1861 else 1862 lim->max_hw_discard_sectors = 0; 1863 1864 lim->discard_granularity = lim->logical_block_size; 1865 1866 if (ctrl->dmrl) 1867 lim->max_discard_segments = ctrl->dmrl; 1868 else 1869 lim->max_discard_segments = NVME_DSM_MAX_RANGES; 1870 } 1871 1872 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 1873 { 1874 return uuid_equal(&a->uuid, &b->uuid) && 1875 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 1876 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 && 1877 a->csi == b->csi; 1878 } 1879 1880 static int nvme_identify_ns_nvm(struct nvme_ctrl *ctrl, unsigned int nsid, 1881 struct nvme_id_ns_nvm **nvmp) 1882 { 1883 struct nvme_command c = { 1884 .identify.opcode = nvme_admin_identify, 1885 .identify.nsid = cpu_to_le32(nsid), 1886 .identify.cns = NVME_ID_CNS_CS_NS, 1887 .identify.csi = NVME_CSI_NVM, 1888 }; 1889 struct nvme_id_ns_nvm *nvm; 1890 int ret; 1891 1892 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); 1893 if (!nvm) 1894 return -ENOMEM; 1895 1896 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, nvm, sizeof(*nvm)); 1897 if (ret) 1898 kfree(nvm); 1899 else 1900 *nvmp = nvm; 1901 return ret; 1902 } 1903 1904 static void nvme_configure_pi_elbas(struct nvme_ns_head *head, 1905 struct nvme_id_ns *id, struct nvme_id_ns_nvm *nvm) 1906 { 1907 u32 elbaf = le32_to_cpu(nvm->elbaf[nvme_lbaf_index(id->flbas)]); 1908 u8 guard_type; 1909 1910 /* no support for storage tag formats right now */ 1911 if (nvme_elbaf_sts(elbaf)) 1912 return; 1913 1914 guard_type = nvme_elbaf_guard_type(elbaf); 1915 if ((nvm->pic & NVME_ID_NS_NVM_QPIFS) && 1916 guard_type == NVME_NVM_NS_QTYPE_GUARD) 1917 guard_type = nvme_elbaf_qualified_guard_type(elbaf); 1918 1919 head->guard_type = guard_type; 1920 switch (head->guard_type) { 1921 case NVME_NVM_NS_64B_GUARD: 1922 head->pi_size = sizeof(struct crc64_pi_tuple); 1923 break; 1924 case NVME_NVM_NS_16B_GUARD: 1925 head->pi_size = sizeof(struct t10_pi_tuple); 1926 break; 1927 default: 1928 break; 1929 } 1930 } 1931 1932 static void nvme_configure_metadata(struct nvme_ctrl *ctrl, 1933 struct nvme_ns_head *head, struct nvme_id_ns *id, 1934 struct nvme_id_ns_nvm *nvm, struct nvme_ns_info *info) 1935 { 1936 head->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS); 1937 head->pi_type = 0; 1938 head->pi_size = 0; 1939 head->ms = le16_to_cpu(id->lbaf[nvme_lbaf_index(id->flbas)].ms); 1940 if (!head->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 1941 return; 1942 1943 if (nvm && (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) { 1944 nvme_configure_pi_elbas(head, id, nvm); 1945 } else { 1946 head->pi_size = sizeof(struct t10_pi_tuple); 1947 head->guard_type = NVME_NVM_NS_16B_GUARD; 1948 } 1949 1950 if (head->pi_size && head->ms >= head->pi_size) 1951 head->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1952 if (!(id->dps & NVME_NS_DPS_PI_FIRST)) { 1953 if (disable_pi_offsets) 1954 head->pi_type = 0; 1955 else 1956 info->pi_offset = head->ms - head->pi_size; 1957 } 1958 1959 if (ctrl->ops->flags & NVME_F_FABRICS) { 1960 /* 1961 * The NVMe over Fabrics specification only supports metadata as 1962 * part of the extended data LBA. We rely on HCA/HBA support to 1963 * remap the separate metadata buffer from the block layer. 1964 */ 1965 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT))) 1966 return; 1967 1968 head->features |= NVME_NS_EXT_LBAS; 1969 1970 /* 1971 * The current fabrics transport drivers support namespace 1972 * metadata formats only if nvme_ns_has_pi() returns true. 1973 * Suppress support for all other formats so the namespace will 1974 * have a 0 capacity and not be usable through the block stack. 1975 * 1976 * Note, this check will need to be modified if any drivers 1977 * gain the ability to use other metadata formats. 1978 */ 1979 if (ctrl->max_integrity_segments && nvme_ns_has_pi(head)) 1980 head->features |= NVME_NS_METADATA_SUPPORTED; 1981 } else { 1982 /* 1983 * For PCIe controllers, we can't easily remap the separate 1984 * metadata buffer from the block layer and thus require a 1985 * separate metadata buffer for block layer metadata/PI support. 1986 * We allow extended LBAs for the passthrough interface, though. 1987 */ 1988 if (id->flbas & NVME_NS_FLBAS_META_EXT) 1989 head->features |= NVME_NS_EXT_LBAS; 1990 else 1991 head->features |= NVME_NS_METADATA_SUPPORTED; 1992 } 1993 } 1994 1995 1996 static void nvme_update_atomic_write_disk_info(struct nvme_ns *ns, 1997 struct nvme_id_ns *id, struct queue_limits *lim, 1998 u32 bs, u32 atomic_bs) 1999 { 2000 unsigned int boundary = 0; 2001 2002 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) { 2003 if (le16_to_cpu(id->nabspf)) 2004 boundary = (le16_to_cpu(id->nabspf) + 1) * bs; 2005 } 2006 lim->atomic_write_hw_max = atomic_bs; 2007 lim->atomic_write_hw_boundary = boundary; 2008 lim->atomic_write_hw_unit_min = bs; 2009 lim->atomic_write_hw_unit_max = rounddown_pow_of_two(atomic_bs); 2010 lim->features |= BLK_FEAT_ATOMIC_WRITES; 2011 } 2012 2013 static u32 nvme_max_drv_segments(struct nvme_ctrl *ctrl) 2014 { 2015 return ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> SECTOR_SHIFT) + 1; 2016 } 2017 2018 static void nvme_set_ctrl_limits(struct nvme_ctrl *ctrl, 2019 struct queue_limits *lim) 2020 { 2021 lim->max_hw_sectors = ctrl->max_hw_sectors; 2022 lim->max_segments = min_t(u32, USHRT_MAX, 2023 min_not_zero(nvme_max_drv_segments(ctrl), ctrl->max_segments)); 2024 lim->max_integrity_segments = ctrl->max_integrity_segments; 2025 lim->virt_boundary_mask = NVME_CTRL_PAGE_SIZE - 1; 2026 lim->max_segment_size = UINT_MAX; 2027 lim->dma_alignment = 3; 2028 } 2029 2030 static bool nvme_update_disk_info(struct nvme_ns *ns, struct nvme_id_ns *id, 2031 struct queue_limits *lim) 2032 { 2033 struct nvme_ns_head *head = ns->head; 2034 u32 bs = 1U << head->lba_shift; 2035 u32 atomic_bs, phys_bs, io_opt = 0; 2036 bool valid = true; 2037 2038 /* 2039 * The block layer can't support LBA sizes larger than the page size 2040 * or smaller than a sector size yet, so catch this early and don't 2041 * allow block I/O. 2042 */ 2043 if (blk_validate_block_size(bs)) { 2044 bs = (1 << 9); 2045 valid = false; 2046 } 2047 2048 atomic_bs = phys_bs = bs; 2049 if (id->nabo == 0) { 2050 /* 2051 * Bit 1 indicates whether NAWUPF is defined for this namespace 2052 * and whether it should be used instead of AWUPF. If NAWUPF == 2053 * 0 then AWUPF must be used instead. 2054 */ 2055 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) 2056 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs; 2057 else 2058 atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs; 2059 2060 nvme_update_atomic_write_disk_info(ns, id, lim, bs, atomic_bs); 2061 } 2062 2063 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) { 2064 /* NPWG = Namespace Preferred Write Granularity */ 2065 phys_bs = bs * (1 + le16_to_cpu(id->npwg)); 2066 /* NOWS = Namespace Optimal Write Size */ 2067 if (id->nows) 2068 io_opt = bs * (1 + le16_to_cpu(id->nows)); 2069 } 2070 2071 /* 2072 * Linux filesystems assume writing a single physical block is 2073 * an atomic operation. Hence limit the physical block size to the 2074 * value of the Atomic Write Unit Power Fail parameter. 2075 */ 2076 lim->logical_block_size = bs; 2077 lim->physical_block_size = min(phys_bs, atomic_bs); 2078 lim->io_min = phys_bs; 2079 lim->io_opt = io_opt; 2080 if ((ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) && 2081 (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM)) 2082 lim->max_write_zeroes_sectors = UINT_MAX; 2083 else 2084 lim->max_write_zeroes_sectors = ns->ctrl->max_zeroes_sectors; 2085 return valid; 2086 } 2087 2088 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info) 2089 { 2090 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags); 2091 } 2092 2093 static inline bool nvme_first_scan(struct gendisk *disk) 2094 { 2095 /* nvme_alloc_ns() scans the disk prior to adding it */ 2096 return !disk_live(disk); 2097 } 2098 2099 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id, 2100 struct queue_limits *lim) 2101 { 2102 struct nvme_ctrl *ctrl = ns->ctrl; 2103 u32 iob; 2104 2105 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 2106 is_power_of_2(ctrl->max_hw_sectors)) 2107 iob = ctrl->max_hw_sectors; 2108 else 2109 iob = nvme_lba_to_sect(ns->head, le16_to_cpu(id->noiob)); 2110 2111 if (!iob) 2112 return; 2113 2114 if (!is_power_of_2(iob)) { 2115 if (nvme_first_scan(ns->disk)) 2116 pr_warn("%s: ignoring unaligned IO boundary:%u\n", 2117 ns->disk->disk_name, iob); 2118 return; 2119 } 2120 2121 if (blk_queue_is_zoned(ns->disk->queue)) { 2122 if (nvme_first_scan(ns->disk)) 2123 pr_warn("%s: ignoring zoned namespace IO boundary\n", 2124 ns->disk->disk_name); 2125 return; 2126 } 2127 2128 lim->chunk_sectors = iob; 2129 } 2130 2131 static int nvme_update_ns_info_generic(struct nvme_ns *ns, 2132 struct nvme_ns_info *info) 2133 { 2134 struct queue_limits lim; 2135 unsigned int memflags; 2136 int ret; 2137 2138 lim = queue_limits_start_update(ns->disk->queue); 2139 nvme_set_ctrl_limits(ns->ctrl, &lim); 2140 2141 memflags = blk_mq_freeze_queue(ns->disk->queue); 2142 ret = queue_limits_commit_update(ns->disk->queue, &lim); 2143 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2144 blk_mq_unfreeze_queue(ns->disk->queue, memflags); 2145 2146 /* Hide the block-interface for these devices */ 2147 if (!ret) 2148 ret = -ENODEV; 2149 return ret; 2150 } 2151 2152 static int nvme_update_ns_info_block(struct nvme_ns *ns, 2153 struct nvme_ns_info *info) 2154 { 2155 struct queue_limits lim; 2156 struct nvme_id_ns_nvm *nvm = NULL; 2157 struct nvme_zone_info zi = {}; 2158 struct nvme_id_ns *id; 2159 unsigned int memflags; 2160 sector_t capacity; 2161 unsigned lbaf; 2162 int ret; 2163 2164 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id); 2165 if (ret) 2166 return ret; 2167 2168 if (id->ncap == 0) { 2169 /* namespace not allocated or attached */ 2170 info->is_removed = true; 2171 ret = -ENXIO; 2172 goto out; 2173 } 2174 lbaf = nvme_lbaf_index(id->flbas); 2175 2176 if (ns->ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) { 2177 ret = nvme_identify_ns_nvm(ns->ctrl, info->nsid, &nvm); 2178 if (ret < 0) 2179 goto out; 2180 } 2181 2182 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 2183 ns->head->ids.csi == NVME_CSI_ZNS) { 2184 ret = nvme_query_zone_info(ns, lbaf, &zi); 2185 if (ret < 0) 2186 goto out; 2187 } 2188 2189 lim = queue_limits_start_update(ns->disk->queue); 2190 2191 memflags = blk_mq_freeze_queue(ns->disk->queue); 2192 ns->head->lba_shift = id->lbaf[lbaf].ds; 2193 ns->head->nuse = le64_to_cpu(id->nuse); 2194 capacity = nvme_lba_to_sect(ns->head, le64_to_cpu(id->nsze)); 2195 nvme_set_ctrl_limits(ns->ctrl, &lim); 2196 nvme_configure_metadata(ns->ctrl, ns->head, id, nvm, info); 2197 nvme_set_chunk_sectors(ns, id, &lim); 2198 if (!nvme_update_disk_info(ns, id, &lim)) 2199 capacity = 0; 2200 nvme_config_discard(ns, &lim); 2201 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 2202 ns->head->ids.csi == NVME_CSI_ZNS) 2203 nvme_update_zone_info(ns, &lim, &zi); 2204 2205 if ((ns->ctrl->vwc & NVME_CTRL_VWC_PRESENT) && !info->no_vwc) 2206 lim.features |= BLK_FEAT_WRITE_CACHE | BLK_FEAT_FUA; 2207 else 2208 lim.features &= ~(BLK_FEAT_WRITE_CACHE | BLK_FEAT_FUA); 2209 2210 if (info->is_rotational) 2211 lim.features |= BLK_FEAT_ROTATIONAL; 2212 2213 /* 2214 * Register a metadata profile for PI, or the plain non-integrity NVMe 2215 * metadata masquerading as Type 0 if supported, otherwise reject block 2216 * I/O to namespaces with metadata except when the namespace supports 2217 * PI, as it can strip/insert in that case. 2218 */ 2219 if (!nvme_init_integrity(ns->head, &lim, info)) 2220 capacity = 0; 2221 2222 ret = queue_limits_commit_update(ns->disk->queue, &lim); 2223 if (ret) { 2224 blk_mq_unfreeze_queue(ns->disk->queue, memflags); 2225 goto out; 2226 } 2227 2228 set_capacity_and_notify(ns->disk, capacity); 2229 2230 /* 2231 * Only set the DEAC bit if the device guarantees that reads from 2232 * deallocated data return zeroes. While the DEAC bit does not 2233 * require that, it must be a no-op if reads from deallocated data 2234 * do not return zeroes. 2235 */ 2236 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3))) 2237 ns->head->features |= NVME_NS_DEAC; 2238 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2239 set_bit(NVME_NS_READY, &ns->flags); 2240 blk_mq_unfreeze_queue(ns->disk->queue, memflags); 2241 2242 if (blk_queue_is_zoned(ns->queue)) { 2243 ret = blk_revalidate_disk_zones(ns->disk); 2244 if (ret && !nvme_first_scan(ns->disk)) 2245 goto out; 2246 } 2247 2248 ret = 0; 2249 out: 2250 kfree(nvm); 2251 kfree(id); 2252 return ret; 2253 } 2254 2255 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info) 2256 { 2257 bool unsupported = false; 2258 int ret; 2259 2260 switch (info->ids.csi) { 2261 case NVME_CSI_ZNS: 2262 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 2263 dev_info(ns->ctrl->device, 2264 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n", 2265 info->nsid); 2266 ret = nvme_update_ns_info_generic(ns, info); 2267 break; 2268 } 2269 ret = nvme_update_ns_info_block(ns, info); 2270 break; 2271 case NVME_CSI_NVM: 2272 ret = nvme_update_ns_info_block(ns, info); 2273 break; 2274 default: 2275 dev_info(ns->ctrl->device, 2276 "block device for nsid %u not supported (csi %u)\n", 2277 info->nsid, info->ids.csi); 2278 ret = nvme_update_ns_info_generic(ns, info); 2279 break; 2280 } 2281 2282 /* 2283 * If probing fails due an unsupported feature, hide the block device, 2284 * but still allow other access. 2285 */ 2286 if (ret == -ENODEV) { 2287 ns->disk->flags |= GENHD_FL_HIDDEN; 2288 set_bit(NVME_NS_READY, &ns->flags); 2289 unsupported = true; 2290 ret = 0; 2291 } 2292 2293 if (!ret && nvme_ns_head_multipath(ns->head)) { 2294 struct queue_limits *ns_lim = &ns->disk->queue->limits; 2295 struct queue_limits lim; 2296 unsigned int memflags; 2297 2298 lim = queue_limits_start_update(ns->head->disk->queue); 2299 memflags = blk_mq_freeze_queue(ns->head->disk->queue); 2300 /* 2301 * queue_limits mixes values that are the hardware limitations 2302 * for bio splitting with what is the device configuration. 2303 * 2304 * For NVMe the device configuration can change after e.g. a 2305 * Format command, and we really want to pick up the new format 2306 * value here. But we must still stack the queue limits to the 2307 * least common denominator for multipathing to split the bios 2308 * properly. 2309 * 2310 * To work around this, we explicitly set the device 2311 * configuration to those that we just queried, but only stack 2312 * the splitting limits in to make sure we still obey possibly 2313 * lower limitations of other controllers. 2314 */ 2315 lim.logical_block_size = ns_lim->logical_block_size; 2316 lim.physical_block_size = ns_lim->physical_block_size; 2317 lim.io_min = ns_lim->io_min; 2318 lim.io_opt = ns_lim->io_opt; 2319 queue_limits_stack_bdev(&lim, ns->disk->part0, 0, 2320 ns->head->disk->disk_name); 2321 if (unsupported) 2322 ns->head->disk->flags |= GENHD_FL_HIDDEN; 2323 else 2324 nvme_init_integrity(ns->head, &lim, info); 2325 ret = queue_limits_commit_update(ns->head->disk->queue, &lim); 2326 2327 set_capacity_and_notify(ns->head->disk, get_capacity(ns->disk)); 2328 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2329 nvme_mpath_revalidate_paths(ns); 2330 2331 blk_mq_unfreeze_queue(ns->head->disk->queue, memflags); 2332 } 2333 2334 return ret; 2335 } 2336 2337 int nvme_ns_get_unique_id(struct nvme_ns *ns, u8 id[16], 2338 enum blk_unique_id type) 2339 { 2340 struct nvme_ns_ids *ids = &ns->head->ids; 2341 2342 if (type != BLK_UID_EUI64) 2343 return -EINVAL; 2344 2345 if (memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) { 2346 memcpy(id, &ids->nguid, sizeof(ids->nguid)); 2347 return sizeof(ids->nguid); 2348 } 2349 if (memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) { 2350 memcpy(id, &ids->eui64, sizeof(ids->eui64)); 2351 return sizeof(ids->eui64); 2352 } 2353 2354 return -EINVAL; 2355 } 2356 2357 static int nvme_get_unique_id(struct gendisk *disk, u8 id[16], 2358 enum blk_unique_id type) 2359 { 2360 return nvme_ns_get_unique_id(disk->private_data, id, type); 2361 } 2362 2363 #ifdef CONFIG_BLK_SED_OPAL 2364 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2365 bool send) 2366 { 2367 struct nvme_ctrl *ctrl = data; 2368 struct nvme_command cmd = { }; 2369 2370 if (send) 2371 cmd.common.opcode = nvme_admin_security_send; 2372 else 2373 cmd.common.opcode = nvme_admin_security_recv; 2374 cmd.common.nsid = 0; 2375 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 2376 cmd.common.cdw11 = cpu_to_le32(len); 2377 2378 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 2379 NVME_QID_ANY, NVME_SUBMIT_AT_HEAD); 2380 } 2381 2382 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2383 { 2384 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) { 2385 if (!ctrl->opal_dev) 2386 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit); 2387 else if (was_suspended) 2388 opal_unlock_from_suspend(ctrl->opal_dev); 2389 } else { 2390 free_opal_dev(ctrl->opal_dev); 2391 ctrl->opal_dev = NULL; 2392 } 2393 } 2394 #else 2395 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2396 { 2397 } 2398 #endif /* CONFIG_BLK_SED_OPAL */ 2399 2400 #ifdef CONFIG_BLK_DEV_ZONED 2401 static int nvme_report_zones(struct gendisk *disk, sector_t sector, 2402 unsigned int nr_zones, report_zones_cb cb, void *data) 2403 { 2404 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb, 2405 data); 2406 } 2407 #else 2408 #define nvme_report_zones NULL 2409 #endif /* CONFIG_BLK_DEV_ZONED */ 2410 2411 const struct block_device_operations nvme_bdev_ops = { 2412 .owner = THIS_MODULE, 2413 .ioctl = nvme_ioctl, 2414 .compat_ioctl = blkdev_compat_ptr_ioctl, 2415 .open = nvme_open, 2416 .release = nvme_release, 2417 .getgeo = nvme_getgeo, 2418 .get_unique_id = nvme_get_unique_id, 2419 .report_zones = nvme_report_zones, 2420 .pr_ops = &nvme_pr_ops, 2421 }; 2422 2423 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val, 2424 u32 timeout, const char *op) 2425 { 2426 unsigned long timeout_jiffies = jiffies + timeout * HZ; 2427 u32 csts; 2428 int ret; 2429 2430 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2431 if (csts == ~0) 2432 return -ENODEV; 2433 if ((csts & mask) == val) 2434 break; 2435 2436 usleep_range(1000, 2000); 2437 if (fatal_signal_pending(current)) 2438 return -EINTR; 2439 if (time_after(jiffies, timeout_jiffies)) { 2440 dev_err(ctrl->device, 2441 "Device not ready; aborting %s, CSTS=0x%x\n", 2442 op, csts); 2443 return -ENODEV; 2444 } 2445 } 2446 2447 return ret; 2448 } 2449 2450 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown) 2451 { 2452 int ret; 2453 2454 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2455 if (shutdown) 2456 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 2457 else 2458 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 2459 2460 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2461 if (ret) 2462 return ret; 2463 2464 if (shutdown) { 2465 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK, 2466 NVME_CSTS_SHST_CMPLT, 2467 ctrl->shutdown_timeout, "shutdown"); 2468 } 2469 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 2470 msleep(NVME_QUIRK_DELAY_AMOUNT); 2471 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0, 2472 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset"); 2473 } 2474 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 2475 2476 int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 2477 { 2478 unsigned dev_page_min; 2479 u32 timeout; 2480 int ret; 2481 2482 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2483 if (ret) { 2484 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2485 return ret; 2486 } 2487 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2488 2489 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) { 2490 dev_err(ctrl->device, 2491 "Minimum device page size %u too large for host (%u)\n", 2492 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT); 2493 return -ENODEV; 2494 } 2495 2496 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI) 2497 ctrl->ctrl_config = NVME_CC_CSS_CSI; 2498 else 2499 ctrl->ctrl_config = NVME_CC_CSS_NVM; 2500 2501 /* 2502 * Setting CRIME results in CSTS.RDY before the media is ready. This 2503 * makes it possible for media related commands to return the error 2504 * NVME_SC_ADMIN_COMMAND_MEDIA_NOT_READY. Until the driver is 2505 * restructured to handle retries, disable CC.CRIME. 2506 */ 2507 ctrl->ctrl_config &= ~NVME_CC_CRIME; 2508 2509 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; 2510 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 2511 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 2512 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2513 if (ret) 2514 return ret; 2515 2516 /* CAP value may change after initial CC write */ 2517 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2518 if (ret) 2519 return ret; 2520 2521 timeout = NVME_CAP_TIMEOUT(ctrl->cap); 2522 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) { 2523 u32 crto, ready_timeout; 2524 2525 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto); 2526 if (ret) { 2527 dev_err(ctrl->device, "Reading CRTO failed (%d)\n", 2528 ret); 2529 return ret; 2530 } 2531 2532 /* 2533 * CRTO should always be greater or equal to CAP.TO, but some 2534 * devices are known to get this wrong. Use the larger of the 2535 * two values. 2536 */ 2537 ready_timeout = NVME_CRTO_CRWMT(crto); 2538 2539 if (ready_timeout < timeout) 2540 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n", 2541 crto, ctrl->cap); 2542 else 2543 timeout = ready_timeout; 2544 } 2545 2546 ctrl->ctrl_config |= NVME_CC_ENABLE; 2547 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2548 if (ret) 2549 return ret; 2550 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY, 2551 (timeout + 1) / 2, "initialisation"); 2552 } 2553 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 2554 2555 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 2556 { 2557 __le64 ts; 2558 int ret; 2559 2560 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 2561 return 0; 2562 2563 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 2564 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 2565 NULL); 2566 if (ret) 2567 dev_warn_once(ctrl->device, 2568 "could not set timestamp (%d)\n", ret); 2569 return ret; 2570 } 2571 2572 static int nvme_configure_host_options(struct nvme_ctrl *ctrl) 2573 { 2574 struct nvme_feat_host_behavior *host; 2575 u8 acre = 0, lbafee = 0; 2576 int ret; 2577 2578 /* Don't bother enabling the feature if retry delay is not reported */ 2579 if (ctrl->crdt[0]) 2580 acre = NVME_ENABLE_ACRE; 2581 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) 2582 lbafee = NVME_ENABLE_LBAFEE; 2583 2584 if (!acre && !lbafee) 2585 return 0; 2586 2587 host = kzalloc(sizeof(*host), GFP_KERNEL); 2588 if (!host) 2589 return 0; 2590 2591 host->acre = acre; 2592 host->lbafee = lbafee; 2593 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 2594 host, sizeof(*host), NULL); 2595 kfree(host); 2596 return ret; 2597 } 2598 2599 /* 2600 * The function checks whether the given total (exlat + enlat) latency of 2601 * a power state allows the latter to be used as an APST transition target. 2602 * It does so by comparing the latency to the primary and secondary latency 2603 * tolerances defined by module params. If there's a match, the corresponding 2604 * timeout value is returned and the matching tolerance index (1 or 2) is 2605 * reported. 2606 */ 2607 static bool nvme_apst_get_transition_time(u64 total_latency, 2608 u64 *transition_time, unsigned *last_index) 2609 { 2610 if (total_latency <= apst_primary_latency_tol_us) { 2611 if (*last_index == 1) 2612 return false; 2613 *last_index = 1; 2614 *transition_time = apst_primary_timeout_ms; 2615 return true; 2616 } 2617 if (apst_secondary_timeout_ms && 2618 total_latency <= apst_secondary_latency_tol_us) { 2619 if (*last_index <= 2) 2620 return false; 2621 *last_index = 2; 2622 *transition_time = apst_secondary_timeout_ms; 2623 return true; 2624 } 2625 return false; 2626 } 2627 2628 /* 2629 * APST (Autonomous Power State Transition) lets us program a table of power 2630 * state transitions that the controller will perform automatically. 2631 * 2632 * Depending on module params, one of the two supported techniques will be used: 2633 * 2634 * - If the parameters provide explicit timeouts and tolerances, they will be 2635 * used to build a table with up to 2 non-operational states to transition to. 2636 * The default parameter values were selected based on the values used by 2637 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic 2638 * regeneration of the APST table in the event of switching between external 2639 * and battery power, the timeouts and tolerances reflect a compromise 2640 * between values used by Microsoft for AC and battery scenarios. 2641 * - If not, we'll configure the table with a simple heuristic: we are willing 2642 * to spend at most 2% of the time transitioning between power states. 2643 * Therefore, when running in any given state, we will enter the next 2644 * lower-power non-operational state after waiting 50 * (enlat + exlat) 2645 * microseconds, as long as that state's exit latency is under the requested 2646 * maximum latency. 2647 * 2648 * We will not autonomously enter any non-operational state for which the total 2649 * latency exceeds ps_max_latency_us. 2650 * 2651 * Users can set ps_max_latency_us to zero to turn off APST. 2652 */ 2653 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 2654 { 2655 struct nvme_feat_auto_pst *table; 2656 unsigned apste = 0; 2657 u64 max_lat_us = 0; 2658 __le64 target = 0; 2659 int max_ps = -1; 2660 int state; 2661 int ret; 2662 unsigned last_lt_index = UINT_MAX; 2663 2664 /* 2665 * If APST isn't supported or if we haven't been initialized yet, 2666 * then don't do anything. 2667 */ 2668 if (!ctrl->apsta) 2669 return 0; 2670 2671 if (ctrl->npss > 31) { 2672 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2673 return 0; 2674 } 2675 2676 table = kzalloc(sizeof(*table), GFP_KERNEL); 2677 if (!table) 2678 return 0; 2679 2680 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2681 /* Turn off APST. */ 2682 dev_dbg(ctrl->device, "APST disabled\n"); 2683 goto done; 2684 } 2685 2686 /* 2687 * Walk through all states from lowest- to highest-power. 2688 * According to the spec, lower-numbered states use more power. NPSS, 2689 * despite the name, is the index of the lowest-power state, not the 2690 * number of states. 2691 */ 2692 for (state = (int)ctrl->npss; state >= 0; state--) { 2693 u64 total_latency_us, exit_latency_us, transition_ms; 2694 2695 if (target) 2696 table->entries[state] = target; 2697 2698 /* 2699 * Don't allow transitions to the deepest state if it's quirked 2700 * off. 2701 */ 2702 if (state == ctrl->npss && 2703 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2704 continue; 2705 2706 /* 2707 * Is this state a useful non-operational state for higher-power 2708 * states to autonomously transition to? 2709 */ 2710 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE)) 2711 continue; 2712 2713 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2714 if (exit_latency_us > ctrl->ps_max_latency_us) 2715 continue; 2716 2717 total_latency_us = exit_latency_us + 2718 le32_to_cpu(ctrl->psd[state].entry_lat); 2719 2720 /* 2721 * This state is good. It can be used as the APST idle target 2722 * for higher power states. 2723 */ 2724 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) { 2725 if (!nvme_apst_get_transition_time(total_latency_us, 2726 &transition_ms, &last_lt_index)) 2727 continue; 2728 } else { 2729 transition_ms = total_latency_us + 19; 2730 do_div(transition_ms, 20); 2731 if (transition_ms > (1 << 24) - 1) 2732 transition_ms = (1 << 24) - 1; 2733 } 2734 2735 target = cpu_to_le64((state << 3) | (transition_ms << 8)); 2736 if (max_ps == -1) 2737 max_ps = state; 2738 if (total_latency_us > max_lat_us) 2739 max_lat_us = total_latency_us; 2740 } 2741 2742 if (max_ps == -1) 2743 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2744 else 2745 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2746 max_ps, max_lat_us, (int)sizeof(*table), table); 2747 apste = 1; 2748 2749 done: 2750 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2751 table, sizeof(*table), NULL); 2752 if (ret) 2753 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2754 kfree(table); 2755 return ret; 2756 } 2757 2758 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2759 { 2760 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2761 u64 latency; 2762 2763 switch (val) { 2764 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2765 case PM_QOS_LATENCY_ANY: 2766 latency = U64_MAX; 2767 break; 2768 2769 default: 2770 latency = val; 2771 } 2772 2773 if (ctrl->ps_max_latency_us != latency) { 2774 ctrl->ps_max_latency_us = latency; 2775 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 2776 nvme_configure_apst(ctrl); 2777 } 2778 } 2779 2780 struct nvme_core_quirk_entry { 2781 /* 2782 * NVMe model and firmware strings are padded with spaces. For 2783 * simplicity, strings in the quirk table are padded with NULLs 2784 * instead. 2785 */ 2786 u16 vid; 2787 const char *mn; 2788 const char *fr; 2789 unsigned long quirks; 2790 }; 2791 2792 static const struct nvme_core_quirk_entry core_quirks[] = { 2793 { 2794 /* 2795 * This Toshiba device seems to die using any APST states. See: 2796 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2797 */ 2798 .vid = 0x1179, 2799 .mn = "THNSF5256GPUK TOSHIBA", 2800 .quirks = NVME_QUIRK_NO_APST, 2801 }, 2802 { 2803 /* 2804 * This LiteON CL1-3D*-Q11 firmware version has a race 2805 * condition associated with actions related to suspend to idle 2806 * LiteON has resolved the problem in future firmware 2807 */ 2808 .vid = 0x14a4, 2809 .fr = "22301111", 2810 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 2811 }, 2812 { 2813 /* 2814 * This Kioxia CD6-V Series / HPE PE8030 device times out and 2815 * aborts I/O during any load, but more easily reproducible 2816 * with discards (fstrim). 2817 * 2818 * The device is left in a state where it is also not possible 2819 * to use "nvme set-feature" to disable APST, but booting with 2820 * nvme_core.default_ps_max_latency=0 works. 2821 */ 2822 .vid = 0x1e0f, 2823 .mn = "KCD6XVUL6T40", 2824 .quirks = NVME_QUIRK_NO_APST, 2825 }, 2826 { 2827 /* 2828 * The external Samsung X5 SSD fails initialization without a 2829 * delay before checking if it is ready and has a whole set of 2830 * other problems. To make this even more interesting, it 2831 * shares the PCI ID with internal Samsung 970 Evo Plus that 2832 * does not need or want these quirks. 2833 */ 2834 .vid = 0x144d, 2835 .mn = "Samsung Portable SSD X5", 2836 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY | 2837 NVME_QUIRK_NO_DEEPEST_PS | 2838 NVME_QUIRK_IGNORE_DEV_SUBNQN, 2839 } 2840 }; 2841 2842 /* match is null-terminated but idstr is space-padded. */ 2843 static bool string_matches(const char *idstr, const char *match, size_t len) 2844 { 2845 size_t matchlen; 2846 2847 if (!match) 2848 return true; 2849 2850 matchlen = strlen(match); 2851 WARN_ON_ONCE(matchlen > len); 2852 2853 if (memcmp(idstr, match, matchlen)) 2854 return false; 2855 2856 for (; matchlen < len; matchlen++) 2857 if (idstr[matchlen] != ' ') 2858 return false; 2859 2860 return true; 2861 } 2862 2863 static bool quirk_matches(const struct nvme_id_ctrl *id, 2864 const struct nvme_core_quirk_entry *q) 2865 { 2866 return q->vid == le16_to_cpu(id->vid) && 2867 string_matches(id->mn, q->mn, sizeof(id->mn)) && 2868 string_matches(id->fr, q->fr, sizeof(id->fr)); 2869 } 2870 2871 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 2872 struct nvme_id_ctrl *id) 2873 { 2874 size_t nqnlen; 2875 int off; 2876 2877 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 2878 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 2879 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 2880 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 2881 return; 2882 } 2883 2884 if (ctrl->vs >= NVME_VS(1, 2, 1)) 2885 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 2886 } 2887 2888 /* 2889 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe 2890 * Base Specification 2.0. It is slightly different from the format 2891 * specified there due to historic reasons, and we can't change it now. 2892 */ 2893 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 2894 "nqn.2014.08.org.nvmexpress:%04x%04x", 2895 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 2896 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 2897 off += sizeof(id->sn); 2898 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 2899 off += sizeof(id->mn); 2900 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 2901 } 2902 2903 static void nvme_release_subsystem(struct device *dev) 2904 { 2905 struct nvme_subsystem *subsys = 2906 container_of(dev, struct nvme_subsystem, dev); 2907 2908 if (subsys->instance >= 0) 2909 ida_free(&nvme_instance_ida, subsys->instance); 2910 kfree(subsys); 2911 } 2912 2913 static void nvme_destroy_subsystem(struct kref *ref) 2914 { 2915 struct nvme_subsystem *subsys = 2916 container_of(ref, struct nvme_subsystem, ref); 2917 2918 mutex_lock(&nvme_subsystems_lock); 2919 list_del(&subsys->entry); 2920 mutex_unlock(&nvme_subsystems_lock); 2921 2922 ida_destroy(&subsys->ns_ida); 2923 device_del(&subsys->dev); 2924 put_device(&subsys->dev); 2925 } 2926 2927 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 2928 { 2929 kref_put(&subsys->ref, nvme_destroy_subsystem); 2930 } 2931 2932 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 2933 { 2934 struct nvme_subsystem *subsys; 2935 2936 lockdep_assert_held(&nvme_subsystems_lock); 2937 2938 /* 2939 * Fail matches for discovery subsystems. This results 2940 * in each discovery controller bound to a unique subsystem. 2941 * This avoids issues with validating controller values 2942 * that can only be true when there is a single unique subsystem. 2943 * There may be multiple and completely independent entities 2944 * that provide discovery controllers. 2945 */ 2946 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME)) 2947 return NULL; 2948 2949 list_for_each_entry(subsys, &nvme_subsystems, entry) { 2950 if (strcmp(subsys->subnqn, subsysnqn)) 2951 continue; 2952 if (!kref_get_unless_zero(&subsys->ref)) 2953 continue; 2954 return subsys; 2955 } 2956 2957 return NULL; 2958 } 2959 2960 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl) 2961 { 2962 return ctrl->opts && ctrl->opts->discovery_nqn; 2963 } 2964 2965 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, 2966 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2967 { 2968 struct nvme_ctrl *tmp; 2969 2970 lockdep_assert_held(&nvme_subsystems_lock); 2971 2972 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) { 2973 if (nvme_state_terminal(tmp)) 2974 continue; 2975 2976 if (tmp->cntlid == ctrl->cntlid) { 2977 dev_err(ctrl->device, 2978 "Duplicate cntlid %u with %s, subsys %s, rejecting\n", 2979 ctrl->cntlid, dev_name(tmp->device), 2980 subsys->subnqn); 2981 return false; 2982 } 2983 2984 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) || 2985 nvme_discovery_ctrl(ctrl)) 2986 continue; 2987 2988 dev_err(ctrl->device, 2989 "Subsystem does not support multiple controllers\n"); 2990 return false; 2991 } 2992 2993 return true; 2994 } 2995 2996 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2997 { 2998 struct nvme_subsystem *subsys, *found; 2999 int ret; 3000 3001 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 3002 if (!subsys) 3003 return -ENOMEM; 3004 3005 subsys->instance = -1; 3006 mutex_init(&subsys->lock); 3007 kref_init(&subsys->ref); 3008 INIT_LIST_HEAD(&subsys->ctrls); 3009 INIT_LIST_HEAD(&subsys->nsheads); 3010 nvme_init_subnqn(subsys, ctrl, id); 3011 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 3012 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 3013 subsys->vendor_id = le16_to_cpu(id->vid); 3014 subsys->cmic = id->cmic; 3015 3016 /* Versions prior to 1.4 don't necessarily report a valid type */ 3017 if (id->cntrltype == NVME_CTRL_DISC || 3018 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME)) 3019 subsys->subtype = NVME_NQN_DISC; 3020 else 3021 subsys->subtype = NVME_NQN_NVME; 3022 3023 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) { 3024 dev_err(ctrl->device, 3025 "Subsystem %s is not a discovery controller", 3026 subsys->subnqn); 3027 kfree(subsys); 3028 return -EINVAL; 3029 } 3030 subsys->awupf = le16_to_cpu(id->awupf); 3031 nvme_mpath_default_iopolicy(subsys); 3032 3033 subsys->dev.class = &nvme_subsys_class; 3034 subsys->dev.release = nvme_release_subsystem; 3035 subsys->dev.groups = nvme_subsys_attrs_groups; 3036 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance); 3037 device_initialize(&subsys->dev); 3038 3039 mutex_lock(&nvme_subsystems_lock); 3040 found = __nvme_find_get_subsystem(subsys->subnqn); 3041 if (found) { 3042 put_device(&subsys->dev); 3043 subsys = found; 3044 3045 if (!nvme_validate_cntlid(subsys, ctrl, id)) { 3046 ret = -EINVAL; 3047 goto out_put_subsystem; 3048 } 3049 } else { 3050 ret = device_add(&subsys->dev); 3051 if (ret) { 3052 dev_err(ctrl->device, 3053 "failed to register subsystem device.\n"); 3054 put_device(&subsys->dev); 3055 goto out_unlock; 3056 } 3057 ida_init(&subsys->ns_ida); 3058 list_add_tail(&subsys->entry, &nvme_subsystems); 3059 } 3060 3061 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 3062 dev_name(ctrl->device)); 3063 if (ret) { 3064 dev_err(ctrl->device, 3065 "failed to create sysfs link from subsystem.\n"); 3066 goto out_put_subsystem; 3067 } 3068 3069 if (!found) 3070 subsys->instance = ctrl->instance; 3071 ctrl->subsys = subsys; 3072 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 3073 mutex_unlock(&nvme_subsystems_lock); 3074 return 0; 3075 3076 out_put_subsystem: 3077 nvme_put_subsystem(subsys); 3078 out_unlock: 3079 mutex_unlock(&nvme_subsystems_lock); 3080 return ret; 3081 } 3082 3083 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 3084 void *log, size_t size, u64 offset) 3085 { 3086 struct nvme_command c = { }; 3087 u32 dwlen = nvme_bytes_to_numd(size); 3088 3089 c.get_log_page.opcode = nvme_admin_get_log_page; 3090 c.get_log_page.nsid = cpu_to_le32(nsid); 3091 c.get_log_page.lid = log_page; 3092 c.get_log_page.lsp = lsp; 3093 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 3094 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 3095 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 3096 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 3097 c.get_log_page.csi = csi; 3098 3099 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 3100 } 3101 3102 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi, 3103 struct nvme_effects_log **log) 3104 { 3105 struct nvme_effects_log *old, *cel = xa_load(&ctrl->cels, csi); 3106 int ret; 3107 3108 if (cel) 3109 goto out; 3110 3111 cel = kzalloc(sizeof(*cel), GFP_KERNEL); 3112 if (!cel) 3113 return -ENOMEM; 3114 3115 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi, 3116 cel, sizeof(*cel), 0); 3117 if (ret) { 3118 kfree(cel); 3119 return ret; 3120 } 3121 3122 old = xa_store(&ctrl->cels, csi, cel, GFP_KERNEL); 3123 if (xa_is_err(old)) { 3124 kfree(cel); 3125 return xa_err(old); 3126 } 3127 out: 3128 *log = cel; 3129 return 0; 3130 } 3131 3132 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units) 3133 { 3134 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val; 3135 3136 if (check_shl_overflow(1U, units + page_shift - 9, &val)) 3137 return UINT_MAX; 3138 return val; 3139 } 3140 3141 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl) 3142 { 3143 struct nvme_command c = { }; 3144 struct nvme_id_ctrl_nvm *id; 3145 int ret; 3146 3147 /* 3148 * Even though NVMe spec explicitly states that MDTS is not applicable 3149 * to the write-zeroes, we are cautious and limit the size to the 3150 * controllers max_hw_sectors value, which is based on the MDTS field 3151 * and possibly other limiting factors. 3152 */ 3153 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) && 3154 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)) 3155 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors; 3156 else 3157 ctrl->max_zeroes_sectors = 0; 3158 3159 if (ctrl->subsys->subtype != NVME_NQN_NVME || 3160 !nvme_id_cns_ok(ctrl, NVME_ID_CNS_CS_CTRL) || 3161 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags)) 3162 return 0; 3163 3164 id = kzalloc(sizeof(*id), GFP_KERNEL); 3165 if (!id) 3166 return -ENOMEM; 3167 3168 c.identify.opcode = nvme_admin_identify; 3169 c.identify.cns = NVME_ID_CNS_CS_CTRL; 3170 c.identify.csi = NVME_CSI_NVM; 3171 3172 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 3173 if (ret) 3174 goto free_data; 3175 3176 ctrl->dmrl = id->dmrl; 3177 ctrl->dmrsl = le32_to_cpu(id->dmrsl); 3178 if (id->wzsl) 3179 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl); 3180 3181 free_data: 3182 if (ret > 0) 3183 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags); 3184 kfree(id); 3185 return ret; 3186 } 3187 3188 static int nvme_init_effects_log(struct nvme_ctrl *ctrl, 3189 u8 csi, struct nvme_effects_log **log) 3190 { 3191 struct nvme_effects_log *effects, *old; 3192 3193 effects = kzalloc(sizeof(*effects), GFP_KERNEL); 3194 if (!effects) 3195 return -ENOMEM; 3196 3197 old = xa_store(&ctrl->cels, csi, effects, GFP_KERNEL); 3198 if (xa_is_err(old)) { 3199 kfree(effects); 3200 return xa_err(old); 3201 } 3202 3203 *log = effects; 3204 return 0; 3205 } 3206 3207 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl) 3208 { 3209 struct nvme_effects_log *log = ctrl->effects; 3210 3211 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 3212 NVME_CMD_EFFECTS_NCC | 3213 NVME_CMD_EFFECTS_CSE_MASK); 3214 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 3215 NVME_CMD_EFFECTS_CSE_MASK); 3216 3217 /* 3218 * The spec says the result of a security receive command depends on 3219 * the previous security send command. As such, many vendors log this 3220 * command as one to submitted only when no other commands to the same 3221 * namespace are outstanding. The intention is to tell the host to 3222 * prevent mixing security send and receive. 3223 * 3224 * This driver can only enforce such exclusive access against IO 3225 * queues, though. We are not readily able to enforce such a rule for 3226 * two commands to the admin queue, which is the only queue that 3227 * matters for this command. 3228 * 3229 * Rather than blindly freezing the IO queues for this effect that 3230 * doesn't even apply to IO, mask it off. 3231 */ 3232 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK); 3233 3234 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3235 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3236 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3237 } 3238 3239 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 3240 { 3241 int ret = 0; 3242 3243 if (ctrl->effects) 3244 return 0; 3245 3246 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 3247 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 3248 if (ret < 0) 3249 return ret; 3250 } 3251 3252 if (!ctrl->effects) { 3253 ret = nvme_init_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 3254 if (ret < 0) 3255 return ret; 3256 } 3257 3258 nvme_init_known_nvm_effects(ctrl); 3259 return 0; 3260 } 3261 3262 static int nvme_check_ctrl_fabric_info(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 3263 { 3264 /* 3265 * In fabrics we need to verify the cntlid matches the 3266 * admin connect 3267 */ 3268 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 3269 dev_err(ctrl->device, 3270 "Mismatching cntlid: Connect %u vs Identify %u, rejecting\n", 3271 ctrl->cntlid, le16_to_cpu(id->cntlid)); 3272 return -EINVAL; 3273 } 3274 3275 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) { 3276 dev_err(ctrl->device, 3277 "keep-alive support is mandatory for fabrics\n"); 3278 return -EINVAL; 3279 } 3280 3281 if (!nvme_discovery_ctrl(ctrl) && ctrl->ioccsz < 4) { 3282 dev_err(ctrl->device, 3283 "I/O queue command capsule supported size %d < 4\n", 3284 ctrl->ioccsz); 3285 return -EINVAL; 3286 } 3287 3288 if (!nvme_discovery_ctrl(ctrl) && ctrl->iorcsz < 1) { 3289 dev_err(ctrl->device, 3290 "I/O queue response capsule supported size %d < 1\n", 3291 ctrl->iorcsz); 3292 return -EINVAL; 3293 } 3294 3295 if (!ctrl->maxcmd) { 3296 dev_warn(ctrl->device, 3297 "Firmware bug: maximum outstanding commands is 0\n"); 3298 ctrl->maxcmd = ctrl->sqsize + 1; 3299 } 3300 3301 return 0; 3302 } 3303 3304 static int nvme_init_identify(struct nvme_ctrl *ctrl) 3305 { 3306 struct queue_limits lim; 3307 struct nvme_id_ctrl *id; 3308 u32 max_hw_sectors; 3309 bool prev_apst_enabled; 3310 int ret; 3311 3312 ret = nvme_identify_ctrl(ctrl, &id); 3313 if (ret) { 3314 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 3315 return -EIO; 3316 } 3317 3318 if (!(ctrl->ops->flags & NVME_F_FABRICS)) 3319 ctrl->cntlid = le16_to_cpu(id->cntlid); 3320 3321 if (!ctrl->identified) { 3322 unsigned int i; 3323 3324 /* 3325 * Check for quirks. Quirk can depend on firmware version, 3326 * so, in principle, the set of quirks present can change 3327 * across a reset. As a possible future enhancement, we 3328 * could re-scan for quirks every time we reinitialize 3329 * the device, but we'd have to make sure that the driver 3330 * behaves intelligently if the quirks change. 3331 */ 3332 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 3333 if (quirk_matches(id, &core_quirks[i])) 3334 ctrl->quirks |= core_quirks[i].quirks; 3335 } 3336 3337 ret = nvme_init_subsystem(ctrl, id); 3338 if (ret) 3339 goto out_free; 3340 3341 ret = nvme_init_effects(ctrl, id); 3342 if (ret) 3343 goto out_free; 3344 } 3345 memcpy(ctrl->subsys->firmware_rev, id->fr, 3346 sizeof(ctrl->subsys->firmware_rev)); 3347 3348 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 3349 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 3350 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 3351 } 3352 3353 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 3354 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 3355 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 3356 3357 ctrl->oacs = le16_to_cpu(id->oacs); 3358 ctrl->oncs = le16_to_cpu(id->oncs); 3359 ctrl->mtfa = le16_to_cpu(id->mtfa); 3360 ctrl->oaes = le32_to_cpu(id->oaes); 3361 ctrl->wctemp = le16_to_cpu(id->wctemp); 3362 ctrl->cctemp = le16_to_cpu(id->cctemp); 3363 3364 atomic_set(&ctrl->abort_limit, id->acl + 1); 3365 ctrl->vwc = id->vwc; 3366 if (id->mdts) 3367 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts); 3368 else 3369 max_hw_sectors = UINT_MAX; 3370 ctrl->max_hw_sectors = 3371 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 3372 3373 lim = queue_limits_start_update(ctrl->admin_q); 3374 nvme_set_ctrl_limits(ctrl, &lim); 3375 ret = queue_limits_commit_update(ctrl->admin_q, &lim); 3376 if (ret) 3377 goto out_free; 3378 3379 ctrl->sgls = le32_to_cpu(id->sgls); 3380 ctrl->kas = le16_to_cpu(id->kas); 3381 ctrl->max_namespaces = le32_to_cpu(id->mnan); 3382 ctrl->ctratt = le32_to_cpu(id->ctratt); 3383 3384 ctrl->cntrltype = id->cntrltype; 3385 ctrl->dctype = id->dctype; 3386 3387 if (id->rtd3e) { 3388 /* us -> s */ 3389 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC; 3390 3391 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 3392 shutdown_timeout, 60); 3393 3394 if (ctrl->shutdown_timeout != shutdown_timeout) 3395 dev_info(ctrl->device, 3396 "D3 entry latency set to %u seconds\n", 3397 ctrl->shutdown_timeout); 3398 } else 3399 ctrl->shutdown_timeout = shutdown_timeout; 3400 3401 ctrl->npss = id->npss; 3402 ctrl->apsta = id->apsta; 3403 prev_apst_enabled = ctrl->apst_enabled; 3404 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 3405 if (force_apst && id->apsta) { 3406 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 3407 ctrl->apst_enabled = true; 3408 } else { 3409 ctrl->apst_enabled = false; 3410 } 3411 } else { 3412 ctrl->apst_enabled = id->apsta; 3413 } 3414 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 3415 3416 if (ctrl->ops->flags & NVME_F_FABRICS) { 3417 ctrl->icdoff = le16_to_cpu(id->icdoff); 3418 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 3419 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 3420 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 3421 3422 ret = nvme_check_ctrl_fabric_info(ctrl, id); 3423 if (ret) 3424 goto out_free; 3425 } else { 3426 ctrl->hmpre = le32_to_cpu(id->hmpre); 3427 ctrl->hmmin = le32_to_cpu(id->hmmin); 3428 ctrl->hmminds = le32_to_cpu(id->hmminds); 3429 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 3430 } 3431 3432 ret = nvme_mpath_init_identify(ctrl, id); 3433 if (ret < 0) 3434 goto out_free; 3435 3436 if (ctrl->apst_enabled && !prev_apst_enabled) 3437 dev_pm_qos_expose_latency_tolerance(ctrl->device); 3438 else if (!ctrl->apst_enabled && prev_apst_enabled) 3439 dev_pm_qos_hide_latency_tolerance(ctrl->device); 3440 3441 out_free: 3442 kfree(id); 3443 return ret; 3444 } 3445 3446 /* 3447 * Initialize the cached copies of the Identify data and various controller 3448 * register in our nvme_ctrl structure. This should be called as soon as 3449 * the admin queue is fully up and running. 3450 */ 3451 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended) 3452 { 3453 int ret; 3454 3455 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 3456 if (ret) { 3457 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 3458 return ret; 3459 } 3460 3461 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize); 3462 3463 if (ctrl->vs >= NVME_VS(1, 1, 0)) 3464 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap); 3465 3466 ret = nvme_init_identify(ctrl); 3467 if (ret) 3468 return ret; 3469 3470 ret = nvme_configure_apst(ctrl); 3471 if (ret < 0) 3472 return ret; 3473 3474 ret = nvme_configure_timestamp(ctrl); 3475 if (ret < 0) 3476 return ret; 3477 3478 ret = nvme_configure_host_options(ctrl); 3479 if (ret < 0) 3480 return ret; 3481 3482 nvme_configure_opal(ctrl, was_suspended); 3483 3484 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) { 3485 /* 3486 * Do not return errors unless we are in a controller reset, 3487 * the controller works perfectly fine without hwmon. 3488 */ 3489 ret = nvme_hwmon_init(ctrl); 3490 if (ret == -EINTR) 3491 return ret; 3492 } 3493 3494 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags); 3495 ctrl->identified = true; 3496 3497 nvme_start_keep_alive(ctrl); 3498 3499 return 0; 3500 } 3501 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish); 3502 3503 static int nvme_dev_open(struct inode *inode, struct file *file) 3504 { 3505 struct nvme_ctrl *ctrl = 3506 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3507 3508 switch (nvme_ctrl_state(ctrl)) { 3509 case NVME_CTRL_LIVE: 3510 break; 3511 default: 3512 return -EWOULDBLOCK; 3513 } 3514 3515 nvme_get_ctrl(ctrl); 3516 if (!try_module_get(ctrl->ops->module)) { 3517 nvme_put_ctrl(ctrl); 3518 return -EINVAL; 3519 } 3520 3521 file->private_data = ctrl; 3522 return 0; 3523 } 3524 3525 static int nvme_dev_release(struct inode *inode, struct file *file) 3526 { 3527 struct nvme_ctrl *ctrl = 3528 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3529 3530 module_put(ctrl->ops->module); 3531 nvme_put_ctrl(ctrl); 3532 return 0; 3533 } 3534 3535 static const struct file_operations nvme_dev_fops = { 3536 .owner = THIS_MODULE, 3537 .open = nvme_dev_open, 3538 .release = nvme_dev_release, 3539 .unlocked_ioctl = nvme_dev_ioctl, 3540 .compat_ioctl = compat_ptr_ioctl, 3541 .uring_cmd = nvme_dev_uring_cmd, 3542 }; 3543 3544 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl, 3545 unsigned nsid) 3546 { 3547 struct nvme_ns_head *h; 3548 3549 lockdep_assert_held(&ctrl->subsys->lock); 3550 3551 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) { 3552 /* 3553 * Private namespaces can share NSIDs under some conditions. 3554 * In that case we can't use the same ns_head for namespaces 3555 * with the same NSID. 3556 */ 3557 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h)) 3558 continue; 3559 if (!list_empty(&h->list) && nvme_tryget_ns_head(h)) 3560 return h; 3561 } 3562 3563 return NULL; 3564 } 3565 3566 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys, 3567 struct nvme_ns_ids *ids) 3568 { 3569 bool has_uuid = !uuid_is_null(&ids->uuid); 3570 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid)); 3571 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 3572 struct nvme_ns_head *h; 3573 3574 lockdep_assert_held(&subsys->lock); 3575 3576 list_for_each_entry(h, &subsys->nsheads, entry) { 3577 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid)) 3578 return -EINVAL; 3579 if (has_nguid && 3580 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0) 3581 return -EINVAL; 3582 if (has_eui64 && 3583 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0) 3584 return -EINVAL; 3585 } 3586 3587 return 0; 3588 } 3589 3590 static void nvme_cdev_rel(struct device *dev) 3591 { 3592 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt)); 3593 } 3594 3595 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device) 3596 { 3597 cdev_device_del(cdev, cdev_device); 3598 put_device(cdev_device); 3599 } 3600 3601 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 3602 const struct file_operations *fops, struct module *owner) 3603 { 3604 int minor, ret; 3605 3606 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL); 3607 if (minor < 0) 3608 return minor; 3609 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor); 3610 cdev_device->class = &nvme_ns_chr_class; 3611 cdev_device->release = nvme_cdev_rel; 3612 device_initialize(cdev_device); 3613 cdev_init(cdev, fops); 3614 cdev->owner = owner; 3615 ret = cdev_device_add(cdev, cdev_device); 3616 if (ret) 3617 put_device(cdev_device); 3618 3619 return ret; 3620 } 3621 3622 static int nvme_ns_chr_open(struct inode *inode, struct file *file) 3623 { 3624 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3625 } 3626 3627 static int nvme_ns_chr_release(struct inode *inode, struct file *file) 3628 { 3629 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3630 return 0; 3631 } 3632 3633 static const struct file_operations nvme_ns_chr_fops = { 3634 .owner = THIS_MODULE, 3635 .open = nvme_ns_chr_open, 3636 .release = nvme_ns_chr_release, 3637 .unlocked_ioctl = nvme_ns_chr_ioctl, 3638 .compat_ioctl = compat_ptr_ioctl, 3639 .uring_cmd = nvme_ns_chr_uring_cmd, 3640 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll, 3641 }; 3642 3643 static int nvme_add_ns_cdev(struct nvme_ns *ns) 3644 { 3645 int ret; 3646 3647 ns->cdev_device.parent = ns->ctrl->device; 3648 ret = dev_set_name(&ns->cdev_device, "ng%dn%d", 3649 ns->ctrl->instance, ns->head->instance); 3650 if (ret) 3651 return ret; 3652 3653 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops, 3654 ns->ctrl->ops->module); 3655 } 3656 3657 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 3658 struct nvme_ns_info *info) 3659 { 3660 struct nvme_ns_head *head; 3661 size_t size = sizeof(*head); 3662 int ret = -ENOMEM; 3663 3664 #ifdef CONFIG_NVME_MULTIPATH 3665 size += num_possible_nodes() * sizeof(struct nvme_ns *); 3666 #endif 3667 3668 head = kzalloc(size, GFP_KERNEL); 3669 if (!head) 3670 goto out; 3671 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL); 3672 if (ret < 0) 3673 goto out_free_head; 3674 head->instance = ret; 3675 INIT_LIST_HEAD(&head->list); 3676 ret = init_srcu_struct(&head->srcu); 3677 if (ret) 3678 goto out_ida_remove; 3679 head->subsys = ctrl->subsys; 3680 head->ns_id = info->nsid; 3681 head->ids = info->ids; 3682 head->shared = info->is_shared; 3683 head->rotational = info->is_rotational; 3684 ratelimit_state_init(&head->rs_nuse, 5 * HZ, 1); 3685 ratelimit_set_flags(&head->rs_nuse, RATELIMIT_MSG_ON_RELEASE); 3686 kref_init(&head->ref); 3687 3688 if (head->ids.csi) { 3689 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects); 3690 if (ret) 3691 goto out_cleanup_srcu; 3692 } else 3693 head->effects = ctrl->effects; 3694 3695 ret = nvme_mpath_alloc_disk(ctrl, head); 3696 if (ret) 3697 goto out_cleanup_srcu; 3698 3699 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 3700 3701 kref_get(&ctrl->subsys->ref); 3702 3703 return head; 3704 out_cleanup_srcu: 3705 cleanup_srcu_struct(&head->srcu); 3706 out_ida_remove: 3707 ida_free(&ctrl->subsys->ns_ida, head->instance); 3708 out_free_head: 3709 kfree(head); 3710 out: 3711 if (ret > 0) 3712 ret = blk_status_to_errno(nvme_error_status(ret)); 3713 return ERR_PTR(ret); 3714 } 3715 3716 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this, 3717 struct nvme_ns_ids *ids) 3718 { 3719 struct nvme_subsystem *s; 3720 int ret = 0; 3721 3722 /* 3723 * Note that this check is racy as we try to avoid holding the global 3724 * lock over the whole ns_head creation. But it is only intended as 3725 * a sanity check anyway. 3726 */ 3727 mutex_lock(&nvme_subsystems_lock); 3728 list_for_each_entry(s, &nvme_subsystems, entry) { 3729 if (s == this) 3730 continue; 3731 mutex_lock(&s->lock); 3732 ret = nvme_subsys_check_duplicate_ids(s, ids); 3733 mutex_unlock(&s->lock); 3734 if (ret) 3735 break; 3736 } 3737 mutex_unlock(&nvme_subsystems_lock); 3738 3739 return ret; 3740 } 3741 3742 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info) 3743 { 3744 struct nvme_ctrl *ctrl = ns->ctrl; 3745 struct nvme_ns_head *head = NULL; 3746 int ret; 3747 3748 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids); 3749 if (ret) { 3750 /* 3751 * We've found two different namespaces on two different 3752 * subsystems that report the same ID. This is pretty nasty 3753 * for anything that actually requires unique device 3754 * identification. In the kernel we need this for multipathing, 3755 * and in user space the /dev/disk/by-id/ links rely on it. 3756 * 3757 * If the device also claims to be multi-path capable back off 3758 * here now and refuse the probe the second device as this is a 3759 * recipe for data corruption. If not this is probably a 3760 * cheap consumer device if on the PCIe bus, so let the user 3761 * proceed and use the shiny toy, but warn that with changing 3762 * probing order (which due to our async probing could just be 3763 * device taking longer to startup) the other device could show 3764 * up at any time. 3765 */ 3766 nvme_print_device_info(ctrl); 3767 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */ 3768 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) && 3769 info->is_shared)) { 3770 dev_err(ctrl->device, 3771 "ignoring nsid %d because of duplicate IDs\n", 3772 info->nsid); 3773 return ret; 3774 } 3775 3776 dev_err(ctrl->device, 3777 "clearing duplicate IDs for nsid %d\n", info->nsid); 3778 dev_err(ctrl->device, 3779 "use of /dev/disk/by-id/ may cause data corruption\n"); 3780 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid)); 3781 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid)); 3782 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64)); 3783 ctrl->quirks |= NVME_QUIRK_BOGUS_NID; 3784 } 3785 3786 mutex_lock(&ctrl->subsys->lock); 3787 head = nvme_find_ns_head(ctrl, info->nsid); 3788 if (!head) { 3789 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids); 3790 if (ret) { 3791 dev_err(ctrl->device, 3792 "duplicate IDs in subsystem for nsid %d\n", 3793 info->nsid); 3794 goto out_unlock; 3795 } 3796 head = nvme_alloc_ns_head(ctrl, info); 3797 if (IS_ERR(head)) { 3798 ret = PTR_ERR(head); 3799 goto out_unlock; 3800 } 3801 } else { 3802 ret = -EINVAL; 3803 if (!info->is_shared || !head->shared) { 3804 dev_err(ctrl->device, 3805 "Duplicate unshared namespace %d\n", 3806 info->nsid); 3807 goto out_put_ns_head; 3808 } 3809 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) { 3810 dev_err(ctrl->device, 3811 "IDs don't match for shared namespace %d\n", 3812 info->nsid); 3813 goto out_put_ns_head; 3814 } 3815 3816 if (!multipath) { 3817 dev_warn(ctrl->device, 3818 "Found shared namespace %d, but multipathing not supported.\n", 3819 info->nsid); 3820 dev_warn_once(ctrl->device, 3821 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0.\n"); 3822 } 3823 } 3824 3825 list_add_tail_rcu(&ns->siblings, &head->list); 3826 ns->head = head; 3827 mutex_unlock(&ctrl->subsys->lock); 3828 return 0; 3829 3830 out_put_ns_head: 3831 nvme_put_ns_head(head); 3832 out_unlock: 3833 mutex_unlock(&ctrl->subsys->lock); 3834 return ret; 3835 } 3836 3837 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3838 { 3839 struct nvme_ns *ns, *ret = NULL; 3840 int srcu_idx; 3841 3842 srcu_idx = srcu_read_lock(&ctrl->srcu); 3843 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 3844 srcu_read_lock_held(&ctrl->srcu)) { 3845 if (ns->head->ns_id == nsid) { 3846 if (!nvme_get_ns(ns)) 3847 continue; 3848 ret = ns; 3849 break; 3850 } 3851 if (ns->head->ns_id > nsid) 3852 break; 3853 } 3854 srcu_read_unlock(&ctrl->srcu, srcu_idx); 3855 return ret; 3856 } 3857 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, "NVME_TARGET_PASSTHRU"); 3858 3859 /* 3860 * Add the namespace to the controller list while keeping the list ordered. 3861 */ 3862 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns) 3863 { 3864 struct nvme_ns *tmp; 3865 3866 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) { 3867 if (tmp->head->ns_id < ns->head->ns_id) { 3868 list_add_rcu(&ns->list, &tmp->list); 3869 return; 3870 } 3871 } 3872 list_add(&ns->list, &ns->ctrl->namespaces); 3873 } 3874 3875 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info) 3876 { 3877 struct queue_limits lim = { }; 3878 struct nvme_ns *ns; 3879 struct gendisk *disk; 3880 int node = ctrl->numa_node; 3881 3882 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 3883 if (!ns) 3884 return; 3885 3886 if (ctrl->opts && ctrl->opts->data_digest) 3887 lim.features |= BLK_FEAT_STABLE_WRITES; 3888 if (ctrl->ops->supports_pci_p2pdma && 3889 ctrl->ops->supports_pci_p2pdma(ctrl)) 3890 lim.features |= BLK_FEAT_PCI_P2PDMA; 3891 3892 disk = blk_mq_alloc_disk(ctrl->tagset, &lim, ns); 3893 if (IS_ERR(disk)) 3894 goto out_free_ns; 3895 disk->fops = &nvme_bdev_ops; 3896 disk->private_data = ns; 3897 3898 ns->disk = disk; 3899 ns->queue = disk->queue; 3900 ns->ctrl = ctrl; 3901 kref_init(&ns->kref); 3902 3903 if (nvme_init_ns_head(ns, info)) 3904 goto out_cleanup_disk; 3905 3906 /* 3907 * If multipathing is enabled, the device name for all disks and not 3908 * just those that represent shared namespaces needs to be based on the 3909 * subsystem instance. Using the controller instance for private 3910 * namespaces could lead to naming collisions between shared and private 3911 * namespaces if they don't use a common numbering scheme. 3912 * 3913 * If multipathing is not enabled, disk names must use the controller 3914 * instance as shared namespaces will show up as multiple block 3915 * devices. 3916 */ 3917 if (nvme_ns_head_multipath(ns->head)) { 3918 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance, 3919 ctrl->instance, ns->head->instance); 3920 disk->flags |= GENHD_FL_HIDDEN; 3921 } else if (multipath) { 3922 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance, 3923 ns->head->instance); 3924 } else { 3925 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, 3926 ns->head->instance); 3927 } 3928 3929 if (nvme_update_ns_info(ns, info)) 3930 goto out_unlink_ns; 3931 3932 mutex_lock(&ctrl->namespaces_lock); 3933 /* 3934 * Ensure that no namespaces are added to the ctrl list after the queues 3935 * are frozen, thereby avoiding a deadlock between scan and reset. 3936 */ 3937 if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) { 3938 mutex_unlock(&ctrl->namespaces_lock); 3939 goto out_unlink_ns; 3940 } 3941 nvme_ns_add_to_ctrl_list(ns); 3942 mutex_unlock(&ctrl->namespaces_lock); 3943 synchronize_srcu(&ctrl->srcu); 3944 nvme_get_ctrl(ctrl); 3945 3946 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_attr_groups)) 3947 goto out_cleanup_ns_from_list; 3948 3949 if (!nvme_ns_head_multipath(ns->head)) 3950 nvme_add_ns_cdev(ns); 3951 3952 nvme_mpath_add_disk(ns, info->anagrpid); 3953 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name); 3954 3955 /* 3956 * Set ns->disk->device->driver_data to ns so we can access 3957 * ns->head->passthru_err_log_enabled in 3958 * nvme_io_passthru_err_log_enabled_[store | show](). 3959 */ 3960 dev_set_drvdata(disk_to_dev(ns->disk), ns); 3961 3962 return; 3963 3964 out_cleanup_ns_from_list: 3965 nvme_put_ctrl(ctrl); 3966 mutex_lock(&ctrl->namespaces_lock); 3967 list_del_rcu(&ns->list); 3968 mutex_unlock(&ctrl->namespaces_lock); 3969 synchronize_srcu(&ctrl->srcu); 3970 out_unlink_ns: 3971 mutex_lock(&ctrl->subsys->lock); 3972 list_del_rcu(&ns->siblings); 3973 if (list_empty(&ns->head->list)) 3974 list_del_init(&ns->head->entry); 3975 mutex_unlock(&ctrl->subsys->lock); 3976 nvme_put_ns_head(ns->head); 3977 out_cleanup_disk: 3978 put_disk(disk); 3979 out_free_ns: 3980 kfree(ns); 3981 } 3982 3983 static void nvme_ns_remove(struct nvme_ns *ns) 3984 { 3985 bool last_path = false; 3986 3987 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 3988 return; 3989 3990 clear_bit(NVME_NS_READY, &ns->flags); 3991 set_capacity(ns->disk, 0); 3992 nvme_fault_inject_fini(&ns->fault_inject); 3993 3994 /* 3995 * Ensure that !NVME_NS_READY is seen by other threads to prevent 3996 * this ns going back into current_path. 3997 */ 3998 synchronize_srcu(&ns->head->srcu); 3999 4000 /* wait for concurrent submissions */ 4001 if (nvme_mpath_clear_current_path(ns)) 4002 synchronize_srcu(&ns->head->srcu); 4003 4004 mutex_lock(&ns->ctrl->subsys->lock); 4005 list_del_rcu(&ns->siblings); 4006 if (list_empty(&ns->head->list)) { 4007 list_del_init(&ns->head->entry); 4008 last_path = true; 4009 } 4010 mutex_unlock(&ns->ctrl->subsys->lock); 4011 4012 /* guarantee not available in head->list */ 4013 synchronize_srcu(&ns->head->srcu); 4014 4015 if (!nvme_ns_head_multipath(ns->head)) 4016 nvme_cdev_del(&ns->cdev, &ns->cdev_device); 4017 del_gendisk(ns->disk); 4018 4019 mutex_lock(&ns->ctrl->namespaces_lock); 4020 list_del_rcu(&ns->list); 4021 mutex_unlock(&ns->ctrl->namespaces_lock); 4022 synchronize_srcu(&ns->ctrl->srcu); 4023 4024 if (last_path) 4025 nvme_mpath_shutdown_disk(ns->head); 4026 nvme_put_ns(ns); 4027 } 4028 4029 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid) 4030 { 4031 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid); 4032 4033 if (ns) { 4034 nvme_ns_remove(ns); 4035 nvme_put_ns(ns); 4036 } 4037 } 4038 4039 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info) 4040 { 4041 int ret = NVME_SC_INVALID_NS | NVME_STATUS_DNR; 4042 4043 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) { 4044 dev_err(ns->ctrl->device, 4045 "identifiers changed for nsid %d\n", ns->head->ns_id); 4046 goto out; 4047 } 4048 4049 ret = nvme_update_ns_info(ns, info); 4050 out: 4051 /* 4052 * Only remove the namespace if we got a fatal error back from the 4053 * device, otherwise ignore the error and just move on. 4054 * 4055 * TODO: we should probably schedule a delayed retry here. 4056 */ 4057 if (ret > 0 && (ret & NVME_STATUS_DNR)) 4058 nvme_ns_remove(ns); 4059 } 4060 4061 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid) 4062 { 4063 struct nvme_ns_info info = { .nsid = nsid }; 4064 struct nvme_ns *ns; 4065 int ret = 1; 4066 4067 if (nvme_identify_ns_descs(ctrl, &info)) 4068 return; 4069 4070 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) { 4071 dev_warn(ctrl->device, 4072 "command set not reported for nsid: %d\n", nsid); 4073 return; 4074 } 4075 4076 /* 4077 * If available try to use the Command Set Idependent Identify Namespace 4078 * data structure to find all the generic information that is needed to 4079 * set up a namespace. If not fall back to the legacy version. 4080 */ 4081 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) || 4082 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS) || 4083 ctrl->vs >= NVME_VS(2, 0, 0)) 4084 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info); 4085 if (ret > 0) 4086 ret = nvme_ns_info_from_identify(ctrl, &info); 4087 4088 if (info.is_removed) 4089 nvme_ns_remove_by_nsid(ctrl, nsid); 4090 4091 /* 4092 * Ignore the namespace if it is not ready. We will get an AEN once it 4093 * becomes ready and restart the scan. 4094 */ 4095 if (ret || !info.is_ready) 4096 return; 4097 4098 ns = nvme_find_get_ns(ctrl, nsid); 4099 if (ns) { 4100 nvme_validate_ns(ns, &info); 4101 nvme_put_ns(ns); 4102 } else { 4103 nvme_alloc_ns(ctrl, &info); 4104 } 4105 } 4106 4107 /** 4108 * struct async_scan_info - keeps track of controller & NSIDs to scan 4109 * @ctrl: Controller on which namespaces are being scanned 4110 * @next_nsid: Index of next NSID to scan in ns_list 4111 * @ns_list: Pointer to list of NSIDs to scan 4112 * 4113 * Note: There is a single async_scan_info structure shared by all instances 4114 * of nvme_scan_ns_async() scanning a given controller, so the atomic 4115 * operations on next_nsid are critical to ensure each instance scans a unique 4116 * NSID. 4117 */ 4118 struct async_scan_info { 4119 struct nvme_ctrl *ctrl; 4120 atomic_t next_nsid; 4121 __le32 *ns_list; 4122 }; 4123 4124 static void nvme_scan_ns_async(void *data, async_cookie_t cookie) 4125 { 4126 struct async_scan_info *scan_info = data; 4127 int idx; 4128 u32 nsid; 4129 4130 idx = (u32)atomic_fetch_inc(&scan_info->next_nsid); 4131 nsid = le32_to_cpu(scan_info->ns_list[idx]); 4132 4133 nvme_scan_ns(scan_info->ctrl, nsid); 4134 } 4135 4136 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 4137 unsigned nsid) 4138 { 4139 struct nvme_ns *ns, *next; 4140 LIST_HEAD(rm_list); 4141 4142 mutex_lock(&ctrl->namespaces_lock); 4143 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 4144 if (ns->head->ns_id > nsid) { 4145 list_del_rcu(&ns->list); 4146 synchronize_srcu(&ctrl->srcu); 4147 list_add_tail_rcu(&ns->list, &rm_list); 4148 } 4149 } 4150 mutex_unlock(&ctrl->namespaces_lock); 4151 4152 list_for_each_entry_safe(ns, next, &rm_list, list) 4153 nvme_ns_remove(ns); 4154 } 4155 4156 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl) 4157 { 4158 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32); 4159 __le32 *ns_list; 4160 u32 prev = 0; 4161 int ret = 0, i; 4162 ASYNC_DOMAIN(domain); 4163 struct async_scan_info scan_info; 4164 4165 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 4166 if (!ns_list) 4167 return -ENOMEM; 4168 4169 scan_info.ctrl = ctrl; 4170 scan_info.ns_list = ns_list; 4171 for (;;) { 4172 struct nvme_command cmd = { 4173 .identify.opcode = nvme_admin_identify, 4174 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST, 4175 .identify.nsid = cpu_to_le32(prev), 4176 }; 4177 4178 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list, 4179 NVME_IDENTIFY_DATA_SIZE); 4180 if (ret) { 4181 dev_warn(ctrl->device, 4182 "Identify NS List failed (status=0x%x)\n", ret); 4183 goto free; 4184 } 4185 4186 atomic_set(&scan_info.next_nsid, 0); 4187 for (i = 0; i < nr_entries; i++) { 4188 u32 nsid = le32_to_cpu(ns_list[i]); 4189 4190 if (!nsid) /* end of the list? */ 4191 goto out; 4192 async_schedule_domain(nvme_scan_ns_async, &scan_info, 4193 &domain); 4194 while (++prev < nsid) 4195 nvme_ns_remove_by_nsid(ctrl, prev); 4196 } 4197 async_synchronize_full_domain(&domain); 4198 } 4199 out: 4200 nvme_remove_invalid_namespaces(ctrl, prev); 4201 free: 4202 async_synchronize_full_domain(&domain); 4203 kfree(ns_list); 4204 return ret; 4205 } 4206 4207 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl) 4208 { 4209 struct nvme_id_ctrl *id; 4210 u32 nn, i; 4211 4212 if (nvme_identify_ctrl(ctrl, &id)) 4213 return; 4214 nn = le32_to_cpu(id->nn); 4215 kfree(id); 4216 4217 for (i = 1; i <= nn; i++) 4218 nvme_scan_ns(ctrl, i); 4219 4220 nvme_remove_invalid_namespaces(ctrl, nn); 4221 } 4222 4223 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 4224 { 4225 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 4226 __le32 *log; 4227 int error; 4228 4229 log = kzalloc(log_size, GFP_KERNEL); 4230 if (!log) 4231 return; 4232 4233 /* 4234 * We need to read the log to clear the AEN, but we don't want to rely 4235 * on it for the changed namespace information as userspace could have 4236 * raced with us in reading the log page, which could cause us to miss 4237 * updates. 4238 */ 4239 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, 4240 NVME_CSI_NVM, log, log_size, 0); 4241 if (error) 4242 dev_warn(ctrl->device, 4243 "reading changed ns log failed: %d\n", error); 4244 4245 kfree(log); 4246 } 4247 4248 static void nvme_scan_work(struct work_struct *work) 4249 { 4250 struct nvme_ctrl *ctrl = 4251 container_of(work, struct nvme_ctrl, scan_work); 4252 int ret; 4253 4254 /* No tagset on a live ctrl means IO queues could not created */ 4255 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset) 4256 return; 4257 4258 /* 4259 * Identify controller limits can change at controller reset due to 4260 * new firmware download, even though it is not common we cannot ignore 4261 * such scenario. Controller's non-mdts limits are reported in the unit 4262 * of logical blocks that is dependent on the format of attached 4263 * namespace. Hence re-read the limits at the time of ns allocation. 4264 */ 4265 ret = nvme_init_non_mdts_limits(ctrl); 4266 if (ret < 0) { 4267 dev_warn(ctrl->device, 4268 "reading non-mdts-limits failed: %d\n", ret); 4269 return; 4270 } 4271 4272 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 4273 dev_info(ctrl->device, "rescanning namespaces.\n"); 4274 nvme_clear_changed_ns_log(ctrl); 4275 } 4276 4277 mutex_lock(&ctrl->scan_lock); 4278 if (!nvme_id_cns_ok(ctrl, NVME_ID_CNS_NS_ACTIVE_LIST)) { 4279 nvme_scan_ns_sequential(ctrl); 4280 } else { 4281 /* 4282 * Fall back to sequential scan if DNR is set to handle broken 4283 * devices which should support Identify NS List (as per the VS 4284 * they report) but don't actually support it. 4285 */ 4286 ret = nvme_scan_ns_list(ctrl); 4287 if (ret > 0 && ret & NVME_STATUS_DNR) 4288 nvme_scan_ns_sequential(ctrl); 4289 } 4290 mutex_unlock(&ctrl->scan_lock); 4291 } 4292 4293 /* 4294 * This function iterates the namespace list unlocked to allow recovery from 4295 * controller failure. It is up to the caller to ensure the namespace list is 4296 * not modified by scan work while this function is executing. 4297 */ 4298 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 4299 { 4300 struct nvme_ns *ns, *next; 4301 LIST_HEAD(ns_list); 4302 4303 /* 4304 * make sure to requeue I/O to all namespaces as these 4305 * might result from the scan itself and must complete 4306 * for the scan_work to make progress 4307 */ 4308 nvme_mpath_clear_ctrl_paths(ctrl); 4309 4310 /* 4311 * Unquiesce io queues so any pending IO won't hang, especially 4312 * those submitted from scan work 4313 */ 4314 nvme_unquiesce_io_queues(ctrl); 4315 4316 /* prevent racing with ns scanning */ 4317 flush_work(&ctrl->scan_work); 4318 4319 /* 4320 * The dead states indicates the controller was not gracefully 4321 * disconnected. In that case, we won't be able to flush any data while 4322 * removing the namespaces' disks; fail all the queues now to avoid 4323 * potentially having to clean up the failed sync later. 4324 */ 4325 if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD) 4326 nvme_mark_namespaces_dead(ctrl); 4327 4328 /* this is a no-op when called from the controller reset handler */ 4329 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO); 4330 4331 mutex_lock(&ctrl->namespaces_lock); 4332 list_splice_init_rcu(&ctrl->namespaces, &ns_list, synchronize_rcu); 4333 mutex_unlock(&ctrl->namespaces_lock); 4334 synchronize_srcu(&ctrl->srcu); 4335 4336 list_for_each_entry_safe(ns, next, &ns_list, list) 4337 nvme_ns_remove(ns); 4338 } 4339 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 4340 4341 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env) 4342 { 4343 const struct nvme_ctrl *ctrl = 4344 container_of(dev, struct nvme_ctrl, ctrl_device); 4345 struct nvmf_ctrl_options *opts = ctrl->opts; 4346 int ret; 4347 4348 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name); 4349 if (ret) 4350 return ret; 4351 4352 if (opts) { 4353 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr); 4354 if (ret) 4355 return ret; 4356 4357 ret = add_uevent_var(env, "NVME_TRSVCID=%s", 4358 opts->trsvcid ?: "none"); 4359 if (ret) 4360 return ret; 4361 4362 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s", 4363 opts->host_traddr ?: "none"); 4364 if (ret) 4365 return ret; 4366 4367 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s", 4368 opts->host_iface ?: "none"); 4369 } 4370 return ret; 4371 } 4372 4373 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata) 4374 { 4375 char *envp[2] = { envdata, NULL }; 4376 4377 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4378 } 4379 4380 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 4381 { 4382 char *envp[2] = { NULL, NULL }; 4383 u32 aen_result = ctrl->aen_result; 4384 4385 ctrl->aen_result = 0; 4386 if (!aen_result) 4387 return; 4388 4389 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 4390 if (!envp[0]) 4391 return; 4392 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4393 kfree(envp[0]); 4394 } 4395 4396 static void nvme_async_event_work(struct work_struct *work) 4397 { 4398 struct nvme_ctrl *ctrl = 4399 container_of(work, struct nvme_ctrl, async_event_work); 4400 4401 nvme_aen_uevent(ctrl); 4402 4403 /* 4404 * The transport drivers must guarantee AER submission here is safe by 4405 * flushing ctrl async_event_work after changing the controller state 4406 * from LIVE and before freeing the admin queue. 4407 */ 4408 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 4409 ctrl->ops->submit_async_event(ctrl); 4410 } 4411 4412 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 4413 { 4414 4415 u32 csts; 4416 4417 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 4418 return false; 4419 4420 if (csts == ~0) 4421 return false; 4422 4423 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 4424 } 4425 4426 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 4427 { 4428 struct nvme_fw_slot_info_log *log; 4429 u8 next_fw_slot, cur_fw_slot; 4430 4431 log = kmalloc(sizeof(*log), GFP_KERNEL); 4432 if (!log) 4433 return; 4434 4435 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM, 4436 log, sizeof(*log), 0)) { 4437 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 4438 goto out_free_log; 4439 } 4440 4441 cur_fw_slot = log->afi & 0x7; 4442 next_fw_slot = (log->afi & 0x70) >> 4; 4443 if (!cur_fw_slot || (next_fw_slot && (cur_fw_slot != next_fw_slot))) { 4444 dev_info(ctrl->device, 4445 "Firmware is activated after next Controller Level Reset\n"); 4446 goto out_free_log; 4447 } 4448 4449 memcpy(ctrl->subsys->firmware_rev, &log->frs[cur_fw_slot - 1], 4450 sizeof(ctrl->subsys->firmware_rev)); 4451 4452 out_free_log: 4453 kfree(log); 4454 } 4455 4456 static void nvme_fw_act_work(struct work_struct *work) 4457 { 4458 struct nvme_ctrl *ctrl = container_of(work, 4459 struct nvme_ctrl, fw_act_work); 4460 unsigned long fw_act_timeout; 4461 4462 nvme_auth_stop(ctrl); 4463 4464 if (ctrl->mtfa) 4465 fw_act_timeout = jiffies + 4466 msecs_to_jiffies(ctrl->mtfa * 100); 4467 else 4468 fw_act_timeout = jiffies + 4469 msecs_to_jiffies(admin_timeout * 1000); 4470 4471 nvme_quiesce_io_queues(ctrl); 4472 while (nvme_ctrl_pp_status(ctrl)) { 4473 if (time_after(jiffies, fw_act_timeout)) { 4474 dev_warn(ctrl->device, 4475 "Fw activation timeout, reset controller\n"); 4476 nvme_try_sched_reset(ctrl); 4477 return; 4478 } 4479 msleep(100); 4480 } 4481 4482 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE)) 4483 return; 4484 4485 nvme_unquiesce_io_queues(ctrl); 4486 /* read FW slot information to clear the AER */ 4487 nvme_get_fw_slot_info(ctrl); 4488 4489 queue_work(nvme_wq, &ctrl->async_event_work); 4490 } 4491 4492 static u32 nvme_aer_type(u32 result) 4493 { 4494 return result & 0x7; 4495 } 4496 4497 static u32 nvme_aer_subtype(u32 result) 4498 { 4499 return (result & 0xff00) >> 8; 4500 } 4501 4502 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 4503 { 4504 u32 aer_notice_type = nvme_aer_subtype(result); 4505 bool requeue = true; 4506 4507 switch (aer_notice_type) { 4508 case NVME_AER_NOTICE_NS_CHANGED: 4509 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 4510 nvme_queue_scan(ctrl); 4511 break; 4512 case NVME_AER_NOTICE_FW_ACT_STARTING: 4513 /* 4514 * We are (ab)using the RESETTING state to prevent subsequent 4515 * recovery actions from interfering with the controller's 4516 * firmware activation. 4517 */ 4518 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) { 4519 requeue = false; 4520 queue_work(nvme_wq, &ctrl->fw_act_work); 4521 } 4522 break; 4523 #ifdef CONFIG_NVME_MULTIPATH 4524 case NVME_AER_NOTICE_ANA: 4525 if (!ctrl->ana_log_buf) 4526 break; 4527 queue_work(nvme_wq, &ctrl->ana_work); 4528 break; 4529 #endif 4530 case NVME_AER_NOTICE_DISC_CHANGED: 4531 ctrl->aen_result = result; 4532 break; 4533 default: 4534 dev_warn(ctrl->device, "async event result %08x\n", result); 4535 } 4536 return requeue; 4537 } 4538 4539 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl) 4540 { 4541 dev_warn(ctrl->device, 4542 "resetting controller due to persistent internal error\n"); 4543 nvme_reset_ctrl(ctrl); 4544 } 4545 4546 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 4547 volatile union nvme_result *res) 4548 { 4549 u32 result = le32_to_cpu(res->u32); 4550 u32 aer_type = nvme_aer_type(result); 4551 u32 aer_subtype = nvme_aer_subtype(result); 4552 bool requeue = true; 4553 4554 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 4555 return; 4556 4557 trace_nvme_async_event(ctrl, result); 4558 switch (aer_type) { 4559 case NVME_AER_NOTICE: 4560 requeue = nvme_handle_aen_notice(ctrl, result); 4561 break; 4562 case NVME_AER_ERROR: 4563 /* 4564 * For a persistent internal error, don't run async_event_work 4565 * to submit a new AER. The controller reset will do it. 4566 */ 4567 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) { 4568 nvme_handle_aer_persistent_error(ctrl); 4569 return; 4570 } 4571 fallthrough; 4572 case NVME_AER_SMART: 4573 case NVME_AER_CSS: 4574 case NVME_AER_VS: 4575 ctrl->aen_result = result; 4576 break; 4577 default: 4578 break; 4579 } 4580 4581 if (requeue) 4582 queue_work(nvme_wq, &ctrl->async_event_work); 4583 } 4584 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 4585 4586 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4587 const struct blk_mq_ops *ops, unsigned int cmd_size) 4588 { 4589 struct queue_limits lim = {}; 4590 int ret; 4591 4592 memset(set, 0, sizeof(*set)); 4593 set->ops = ops; 4594 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 4595 if (ctrl->ops->flags & NVME_F_FABRICS) 4596 /* Reserved for fabric connect and keep alive */ 4597 set->reserved_tags = 2; 4598 set->numa_node = ctrl->numa_node; 4599 if (ctrl->ops->flags & NVME_F_BLOCKING) 4600 set->flags |= BLK_MQ_F_BLOCKING; 4601 set->cmd_size = cmd_size; 4602 set->driver_data = ctrl; 4603 set->nr_hw_queues = 1; 4604 set->timeout = NVME_ADMIN_TIMEOUT; 4605 ret = blk_mq_alloc_tag_set(set); 4606 if (ret) 4607 return ret; 4608 4609 ctrl->admin_q = blk_mq_alloc_queue(set, &lim, NULL); 4610 if (IS_ERR(ctrl->admin_q)) { 4611 ret = PTR_ERR(ctrl->admin_q); 4612 goto out_free_tagset; 4613 } 4614 4615 if (ctrl->ops->flags & NVME_F_FABRICS) { 4616 ctrl->fabrics_q = blk_mq_alloc_queue(set, NULL, NULL); 4617 if (IS_ERR(ctrl->fabrics_q)) { 4618 ret = PTR_ERR(ctrl->fabrics_q); 4619 goto out_cleanup_admin_q; 4620 } 4621 } 4622 4623 ctrl->admin_tagset = set; 4624 return 0; 4625 4626 out_cleanup_admin_q: 4627 blk_mq_destroy_queue(ctrl->admin_q); 4628 blk_put_queue(ctrl->admin_q); 4629 out_free_tagset: 4630 blk_mq_free_tag_set(set); 4631 ctrl->admin_q = NULL; 4632 ctrl->fabrics_q = NULL; 4633 return ret; 4634 } 4635 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set); 4636 4637 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl) 4638 { 4639 /* 4640 * As we're about to destroy the queue and free tagset 4641 * we can not have keep-alive work running. 4642 */ 4643 nvme_stop_keep_alive(ctrl); 4644 blk_mq_destroy_queue(ctrl->admin_q); 4645 blk_put_queue(ctrl->admin_q); 4646 if (ctrl->ops->flags & NVME_F_FABRICS) { 4647 blk_mq_destroy_queue(ctrl->fabrics_q); 4648 blk_put_queue(ctrl->fabrics_q); 4649 } 4650 blk_mq_free_tag_set(ctrl->admin_tagset); 4651 } 4652 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set); 4653 4654 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4655 const struct blk_mq_ops *ops, unsigned int nr_maps, 4656 unsigned int cmd_size) 4657 { 4658 int ret; 4659 4660 memset(set, 0, sizeof(*set)); 4661 set->ops = ops; 4662 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1); 4663 /* 4664 * Some Apple controllers requires tags to be unique across admin and 4665 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue. 4666 */ 4667 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS) 4668 set->reserved_tags = NVME_AQ_DEPTH; 4669 else if (ctrl->ops->flags & NVME_F_FABRICS) 4670 /* Reserved for fabric connect */ 4671 set->reserved_tags = 1; 4672 set->numa_node = ctrl->numa_node; 4673 if (ctrl->ops->flags & NVME_F_BLOCKING) 4674 set->flags |= BLK_MQ_F_BLOCKING; 4675 set->cmd_size = cmd_size; 4676 set->driver_data = ctrl; 4677 set->nr_hw_queues = ctrl->queue_count - 1; 4678 set->timeout = NVME_IO_TIMEOUT; 4679 set->nr_maps = nr_maps; 4680 ret = blk_mq_alloc_tag_set(set); 4681 if (ret) 4682 return ret; 4683 4684 if (ctrl->ops->flags & NVME_F_FABRICS) { 4685 struct queue_limits lim = { 4686 .features = BLK_FEAT_SKIP_TAGSET_QUIESCE, 4687 }; 4688 4689 ctrl->connect_q = blk_mq_alloc_queue(set, &lim, NULL); 4690 if (IS_ERR(ctrl->connect_q)) { 4691 ret = PTR_ERR(ctrl->connect_q); 4692 goto out_free_tag_set; 4693 } 4694 } 4695 4696 ctrl->tagset = set; 4697 return 0; 4698 4699 out_free_tag_set: 4700 blk_mq_free_tag_set(set); 4701 ctrl->connect_q = NULL; 4702 return ret; 4703 } 4704 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set); 4705 4706 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl) 4707 { 4708 if (ctrl->ops->flags & NVME_F_FABRICS) { 4709 blk_mq_destroy_queue(ctrl->connect_q); 4710 blk_put_queue(ctrl->connect_q); 4711 } 4712 blk_mq_free_tag_set(ctrl->tagset); 4713 } 4714 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set); 4715 4716 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 4717 { 4718 nvme_mpath_stop(ctrl); 4719 nvme_auth_stop(ctrl); 4720 nvme_stop_failfast_work(ctrl); 4721 flush_work(&ctrl->async_event_work); 4722 cancel_work_sync(&ctrl->fw_act_work); 4723 if (ctrl->ops->stop_ctrl) 4724 ctrl->ops->stop_ctrl(ctrl); 4725 } 4726 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 4727 4728 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 4729 { 4730 nvme_enable_aen(ctrl); 4731 4732 /* 4733 * persistent discovery controllers need to send indication to userspace 4734 * to re-read the discovery log page to learn about possible changes 4735 * that were missed. We identify persistent discovery controllers by 4736 * checking that they started once before, hence are reconnecting back. 4737 */ 4738 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) && 4739 nvme_discovery_ctrl(ctrl)) 4740 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover"); 4741 4742 if (ctrl->queue_count > 1) { 4743 nvme_queue_scan(ctrl); 4744 nvme_unquiesce_io_queues(ctrl); 4745 nvme_mpath_update(ctrl); 4746 } 4747 4748 nvme_change_uevent(ctrl, "NVME_EVENT=connected"); 4749 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags); 4750 } 4751 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 4752 4753 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 4754 { 4755 nvme_stop_keep_alive(ctrl); 4756 nvme_hwmon_exit(ctrl); 4757 nvme_fault_inject_fini(&ctrl->fault_inject); 4758 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4759 cdev_device_del(&ctrl->cdev, ctrl->device); 4760 nvme_put_ctrl(ctrl); 4761 } 4762 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 4763 4764 static void nvme_free_cels(struct nvme_ctrl *ctrl) 4765 { 4766 struct nvme_effects_log *cel; 4767 unsigned long i; 4768 4769 xa_for_each(&ctrl->cels, i, cel) { 4770 xa_erase(&ctrl->cels, i); 4771 kfree(cel); 4772 } 4773 4774 xa_destroy(&ctrl->cels); 4775 } 4776 4777 static void nvme_free_ctrl(struct device *dev) 4778 { 4779 struct nvme_ctrl *ctrl = 4780 container_of(dev, struct nvme_ctrl, ctrl_device); 4781 struct nvme_subsystem *subsys = ctrl->subsys; 4782 4783 if (!subsys || ctrl->instance != subsys->instance) 4784 ida_free(&nvme_instance_ida, ctrl->instance); 4785 nvme_free_cels(ctrl); 4786 nvme_mpath_uninit(ctrl); 4787 cleanup_srcu_struct(&ctrl->srcu); 4788 nvme_auth_stop(ctrl); 4789 nvme_auth_free(ctrl); 4790 __free_page(ctrl->discard_page); 4791 free_opal_dev(ctrl->opal_dev); 4792 4793 if (subsys) { 4794 mutex_lock(&nvme_subsystems_lock); 4795 list_del(&ctrl->subsys_entry); 4796 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 4797 mutex_unlock(&nvme_subsystems_lock); 4798 } 4799 4800 ctrl->ops->free_ctrl(ctrl); 4801 4802 if (subsys) 4803 nvme_put_subsystem(subsys); 4804 } 4805 4806 /* 4807 * Initialize a NVMe controller structures. This needs to be called during 4808 * earliest initialization so that we have the initialized structured around 4809 * during probing. 4810 * 4811 * On success, the caller must use the nvme_put_ctrl() to release this when 4812 * needed, which also invokes the ops->free_ctrl() callback. 4813 */ 4814 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 4815 const struct nvme_ctrl_ops *ops, unsigned long quirks) 4816 { 4817 int ret; 4818 4819 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW); 4820 ctrl->passthru_err_log_enabled = false; 4821 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 4822 spin_lock_init(&ctrl->lock); 4823 mutex_init(&ctrl->namespaces_lock); 4824 4825 ret = init_srcu_struct(&ctrl->srcu); 4826 if (ret) 4827 return ret; 4828 4829 mutex_init(&ctrl->scan_lock); 4830 INIT_LIST_HEAD(&ctrl->namespaces); 4831 xa_init(&ctrl->cels); 4832 ctrl->dev = dev; 4833 ctrl->ops = ops; 4834 ctrl->quirks = quirks; 4835 ctrl->numa_node = NUMA_NO_NODE; 4836 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 4837 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 4838 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 4839 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 4840 init_waitqueue_head(&ctrl->state_wq); 4841 4842 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 4843 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work); 4844 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 4845 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 4846 ctrl->ka_last_check_time = jiffies; 4847 4848 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 4849 PAGE_SIZE); 4850 ctrl->discard_page = alloc_page(GFP_KERNEL); 4851 if (!ctrl->discard_page) { 4852 ret = -ENOMEM; 4853 goto out; 4854 } 4855 4856 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL); 4857 if (ret < 0) 4858 goto out; 4859 ctrl->instance = ret; 4860 4861 ret = nvme_auth_init_ctrl(ctrl); 4862 if (ret) 4863 goto out_release_instance; 4864 4865 nvme_mpath_init_ctrl(ctrl); 4866 4867 device_initialize(&ctrl->ctrl_device); 4868 ctrl->device = &ctrl->ctrl_device; 4869 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt), 4870 ctrl->instance); 4871 ctrl->device->class = &nvme_class; 4872 ctrl->device->parent = ctrl->dev; 4873 if (ops->dev_attr_groups) 4874 ctrl->device->groups = ops->dev_attr_groups; 4875 else 4876 ctrl->device->groups = nvme_dev_attr_groups; 4877 ctrl->device->release = nvme_free_ctrl; 4878 dev_set_drvdata(ctrl->device, ctrl); 4879 4880 return ret; 4881 4882 out_release_instance: 4883 ida_free(&nvme_instance_ida, ctrl->instance); 4884 out: 4885 if (ctrl->discard_page) 4886 __free_page(ctrl->discard_page); 4887 cleanup_srcu_struct(&ctrl->srcu); 4888 return ret; 4889 } 4890 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 4891 4892 /* 4893 * On success, returns with an elevated controller reference and caller must 4894 * use nvme_uninit_ctrl() to properly free resources associated with the ctrl. 4895 */ 4896 int nvme_add_ctrl(struct nvme_ctrl *ctrl) 4897 { 4898 int ret; 4899 4900 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 4901 if (ret) 4902 return ret; 4903 4904 cdev_init(&ctrl->cdev, &nvme_dev_fops); 4905 ctrl->cdev.owner = ctrl->ops->module; 4906 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 4907 if (ret) 4908 return ret; 4909 4910 /* 4911 * Initialize latency tolerance controls. The sysfs files won't 4912 * be visible to userspace unless the device actually supports APST. 4913 */ 4914 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 4915 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 4916 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 4917 4918 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device)); 4919 nvme_get_ctrl(ctrl); 4920 4921 return 0; 4922 } 4923 EXPORT_SYMBOL_GPL(nvme_add_ctrl); 4924 4925 /* let I/O to all namespaces fail in preparation for surprise removal */ 4926 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl) 4927 { 4928 struct nvme_ns *ns; 4929 int srcu_idx; 4930 4931 srcu_idx = srcu_read_lock(&ctrl->srcu); 4932 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4933 srcu_read_lock_held(&ctrl->srcu)) 4934 blk_mark_disk_dead(ns->disk); 4935 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4936 } 4937 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead); 4938 4939 void nvme_unfreeze(struct nvme_ctrl *ctrl) 4940 { 4941 struct nvme_ns *ns; 4942 int srcu_idx; 4943 4944 srcu_idx = srcu_read_lock(&ctrl->srcu); 4945 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4946 srcu_read_lock_held(&ctrl->srcu)) 4947 blk_mq_unfreeze_queue_non_owner(ns->queue); 4948 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4949 clear_bit(NVME_CTRL_FROZEN, &ctrl->flags); 4950 } 4951 EXPORT_SYMBOL_GPL(nvme_unfreeze); 4952 4953 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 4954 { 4955 struct nvme_ns *ns; 4956 int srcu_idx; 4957 4958 srcu_idx = srcu_read_lock(&ctrl->srcu); 4959 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4960 srcu_read_lock_held(&ctrl->srcu)) { 4961 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 4962 if (timeout <= 0) 4963 break; 4964 } 4965 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4966 return timeout; 4967 } 4968 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 4969 4970 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 4971 { 4972 struct nvme_ns *ns; 4973 int srcu_idx; 4974 4975 srcu_idx = srcu_read_lock(&ctrl->srcu); 4976 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4977 srcu_read_lock_held(&ctrl->srcu)) 4978 blk_mq_freeze_queue_wait(ns->queue); 4979 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4980 } 4981 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 4982 4983 void nvme_start_freeze(struct nvme_ctrl *ctrl) 4984 { 4985 struct nvme_ns *ns; 4986 int srcu_idx; 4987 4988 set_bit(NVME_CTRL_FROZEN, &ctrl->flags); 4989 srcu_idx = srcu_read_lock(&ctrl->srcu); 4990 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4991 srcu_read_lock_held(&ctrl->srcu)) 4992 /* 4993 * Typical non_owner use case is from pci driver, in which 4994 * start_freeze is called from timeout work function, but 4995 * unfreeze is done in reset work context 4996 */ 4997 blk_freeze_queue_start_non_owner(ns->queue); 4998 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4999 } 5000 EXPORT_SYMBOL_GPL(nvme_start_freeze); 5001 5002 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl) 5003 { 5004 if (!ctrl->tagset) 5005 return; 5006 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 5007 blk_mq_quiesce_tagset(ctrl->tagset); 5008 else 5009 blk_mq_wait_quiesce_done(ctrl->tagset); 5010 } 5011 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues); 5012 5013 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl) 5014 { 5015 if (!ctrl->tagset) 5016 return; 5017 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 5018 blk_mq_unquiesce_tagset(ctrl->tagset); 5019 } 5020 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues); 5021 5022 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl) 5023 { 5024 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 5025 blk_mq_quiesce_queue(ctrl->admin_q); 5026 else 5027 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set); 5028 } 5029 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue); 5030 5031 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl) 5032 { 5033 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 5034 blk_mq_unquiesce_queue(ctrl->admin_q); 5035 } 5036 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue); 5037 5038 void nvme_sync_io_queues(struct nvme_ctrl *ctrl) 5039 { 5040 struct nvme_ns *ns; 5041 int srcu_idx; 5042 5043 srcu_idx = srcu_read_lock(&ctrl->srcu); 5044 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 5045 srcu_read_lock_held(&ctrl->srcu)) 5046 blk_sync_queue(ns->queue); 5047 srcu_read_unlock(&ctrl->srcu, srcu_idx); 5048 } 5049 EXPORT_SYMBOL_GPL(nvme_sync_io_queues); 5050 5051 void nvme_sync_queues(struct nvme_ctrl *ctrl) 5052 { 5053 nvme_sync_io_queues(ctrl); 5054 if (ctrl->admin_q) 5055 blk_sync_queue(ctrl->admin_q); 5056 } 5057 EXPORT_SYMBOL_GPL(nvme_sync_queues); 5058 5059 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file) 5060 { 5061 if (file->f_op != &nvme_dev_fops) 5062 return NULL; 5063 return file->private_data; 5064 } 5065 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, "NVME_TARGET_PASSTHRU"); 5066 5067 /* 5068 * Check we didn't inadvertently grow the command structure sizes: 5069 */ 5070 static inline void _nvme_check_size(void) 5071 { 5072 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64); 5073 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 5074 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64); 5075 BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 5076 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64); 5077 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 5078 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64); 5079 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64); 5080 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 5081 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64); 5082 BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 5083 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE); 5084 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE); 5085 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) != 5086 NVME_IDENTIFY_DATA_SIZE); 5087 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE); 5088 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE); 5089 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE); 5090 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE); 5091 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 5092 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 5093 BUILD_BUG_ON(sizeof(struct nvme_endurance_group_log) != 512); 5094 BUILD_BUG_ON(sizeof(struct nvme_rotational_media_log) != 512); 5095 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 5096 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64); 5097 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512); 5098 } 5099 5100 5101 static int __init nvme_core_init(void) 5102 { 5103 unsigned int wq_flags = WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS; 5104 int result = -ENOMEM; 5105 5106 _nvme_check_size(); 5107 5108 nvme_wq = alloc_workqueue("nvme-wq", wq_flags, 0); 5109 if (!nvme_wq) 5110 goto out; 5111 5112 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", wq_flags, 0); 5113 if (!nvme_reset_wq) 5114 goto destroy_wq; 5115 5116 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", wq_flags, 0); 5117 if (!nvme_delete_wq) 5118 goto destroy_reset_wq; 5119 5120 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0, 5121 NVME_MINORS, "nvme"); 5122 if (result < 0) 5123 goto destroy_delete_wq; 5124 5125 result = class_register(&nvme_class); 5126 if (result) 5127 goto unregister_chrdev; 5128 5129 result = class_register(&nvme_subsys_class); 5130 if (result) 5131 goto destroy_class; 5132 5133 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS, 5134 "nvme-generic"); 5135 if (result < 0) 5136 goto destroy_subsys_class; 5137 5138 result = class_register(&nvme_ns_chr_class); 5139 if (result) 5140 goto unregister_generic_ns; 5141 5142 result = nvme_init_auth(); 5143 if (result) 5144 goto destroy_ns_chr; 5145 return 0; 5146 5147 destroy_ns_chr: 5148 class_unregister(&nvme_ns_chr_class); 5149 unregister_generic_ns: 5150 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 5151 destroy_subsys_class: 5152 class_unregister(&nvme_subsys_class); 5153 destroy_class: 5154 class_unregister(&nvme_class); 5155 unregister_chrdev: 5156 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 5157 destroy_delete_wq: 5158 destroy_workqueue(nvme_delete_wq); 5159 destroy_reset_wq: 5160 destroy_workqueue(nvme_reset_wq); 5161 destroy_wq: 5162 destroy_workqueue(nvme_wq); 5163 out: 5164 return result; 5165 } 5166 5167 static void __exit nvme_core_exit(void) 5168 { 5169 nvme_exit_auth(); 5170 class_unregister(&nvme_ns_chr_class); 5171 class_unregister(&nvme_subsys_class); 5172 class_unregister(&nvme_class); 5173 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 5174 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 5175 destroy_workqueue(nvme_delete_wq); 5176 destroy_workqueue(nvme_reset_wq); 5177 destroy_workqueue(nvme_wq); 5178 ida_destroy(&nvme_ns_chr_minor_ida); 5179 ida_destroy(&nvme_instance_ida); 5180 } 5181 5182 MODULE_LICENSE("GPL"); 5183 MODULE_VERSION("1.0"); 5184 MODULE_DESCRIPTION("NVMe host core framework"); 5185 module_init(nvme_core_init); 5186 module_exit(nvme_core_exit); 5187