1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVM Express device driver 4 * Copyright (c) 2011-2014, Intel Corporation. 5 */ 6 7 #include <linux/blkdev.h> 8 #include <linux/blk-mq.h> 9 #include <linux/blk-integrity.h> 10 #include <linux/compat.h> 11 #include <linux/delay.h> 12 #include <linux/errno.h> 13 #include <linux/hdreg.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/backing-dev.h> 17 #include <linux/slab.h> 18 #include <linux/types.h> 19 #include <linux/pr.h> 20 #include <linux/ptrace.h> 21 #include <linux/nvme_ioctl.h> 22 #include <linux/pm_qos.h> 23 #include <asm/unaligned.h> 24 25 #include "nvme.h" 26 #include "fabrics.h" 27 #include <linux/nvme-auth.h> 28 #include <linux/nvme-keyring.h> 29 30 #define CREATE_TRACE_POINTS 31 #include "trace.h" 32 33 #define NVME_MINORS (1U << MINORBITS) 34 35 struct nvme_ns_info { 36 struct nvme_ns_ids ids; 37 u32 nsid; 38 __le32 anagrpid; 39 bool is_shared; 40 bool is_readonly; 41 bool is_ready; 42 bool is_removed; 43 }; 44 45 unsigned int admin_timeout = 60; 46 module_param(admin_timeout, uint, 0644); 47 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 48 EXPORT_SYMBOL_GPL(admin_timeout); 49 50 unsigned int nvme_io_timeout = 30; 51 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 52 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 53 EXPORT_SYMBOL_GPL(nvme_io_timeout); 54 55 static unsigned char shutdown_timeout = 5; 56 module_param(shutdown_timeout, byte, 0644); 57 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 58 59 static u8 nvme_max_retries = 5; 60 module_param_named(max_retries, nvme_max_retries, byte, 0644); 61 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 62 63 static unsigned long default_ps_max_latency_us = 100000; 64 module_param(default_ps_max_latency_us, ulong, 0644); 65 MODULE_PARM_DESC(default_ps_max_latency_us, 66 "max power saving latency for new devices; use PM QOS to change per device"); 67 68 static bool force_apst; 69 module_param(force_apst, bool, 0644); 70 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 71 72 static unsigned long apst_primary_timeout_ms = 100; 73 module_param(apst_primary_timeout_ms, ulong, 0644); 74 MODULE_PARM_DESC(apst_primary_timeout_ms, 75 "primary APST timeout in ms"); 76 77 static unsigned long apst_secondary_timeout_ms = 2000; 78 module_param(apst_secondary_timeout_ms, ulong, 0644); 79 MODULE_PARM_DESC(apst_secondary_timeout_ms, 80 "secondary APST timeout in ms"); 81 82 static unsigned long apst_primary_latency_tol_us = 15000; 83 module_param(apst_primary_latency_tol_us, ulong, 0644); 84 MODULE_PARM_DESC(apst_primary_latency_tol_us, 85 "primary APST latency tolerance in us"); 86 87 static unsigned long apst_secondary_latency_tol_us = 100000; 88 module_param(apst_secondary_latency_tol_us, ulong, 0644); 89 MODULE_PARM_DESC(apst_secondary_latency_tol_us, 90 "secondary APST latency tolerance in us"); 91 92 /* 93 * nvme_wq - hosts nvme related works that are not reset or delete 94 * nvme_reset_wq - hosts nvme reset works 95 * nvme_delete_wq - hosts nvme delete works 96 * 97 * nvme_wq will host works such as scan, aen handling, fw activation, 98 * keep-alive, periodic reconnects etc. nvme_reset_wq 99 * runs reset works which also flush works hosted on nvme_wq for 100 * serialization purposes. nvme_delete_wq host controller deletion 101 * works which flush reset works for serialization. 102 */ 103 struct workqueue_struct *nvme_wq; 104 EXPORT_SYMBOL_GPL(nvme_wq); 105 106 struct workqueue_struct *nvme_reset_wq; 107 EXPORT_SYMBOL_GPL(nvme_reset_wq); 108 109 struct workqueue_struct *nvme_delete_wq; 110 EXPORT_SYMBOL_GPL(nvme_delete_wq); 111 112 static LIST_HEAD(nvme_subsystems); 113 static DEFINE_MUTEX(nvme_subsystems_lock); 114 115 static DEFINE_IDA(nvme_instance_ida); 116 static dev_t nvme_ctrl_base_chr_devt; 117 static struct class *nvme_class; 118 static struct class *nvme_subsys_class; 119 120 static DEFINE_IDA(nvme_ns_chr_minor_ida); 121 static dev_t nvme_ns_chr_devt; 122 static struct class *nvme_ns_chr_class; 123 124 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 125 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 126 unsigned nsid); 127 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 128 struct nvme_command *cmd); 129 130 void nvme_queue_scan(struct nvme_ctrl *ctrl) 131 { 132 /* 133 * Only new queue scan work when admin and IO queues are both alive 134 */ 135 if (ctrl->state == NVME_CTRL_LIVE && ctrl->tagset) 136 queue_work(nvme_wq, &ctrl->scan_work); 137 } 138 139 /* 140 * Use this function to proceed with scheduling reset_work for a controller 141 * that had previously been set to the resetting state. This is intended for 142 * code paths that can't be interrupted by other reset attempts. A hot removal 143 * may prevent this from succeeding. 144 */ 145 int nvme_try_sched_reset(struct nvme_ctrl *ctrl) 146 { 147 if (ctrl->state != NVME_CTRL_RESETTING) 148 return -EBUSY; 149 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 150 return -EBUSY; 151 return 0; 152 } 153 EXPORT_SYMBOL_GPL(nvme_try_sched_reset); 154 155 static void nvme_failfast_work(struct work_struct *work) 156 { 157 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 158 struct nvme_ctrl, failfast_work); 159 160 if (ctrl->state != NVME_CTRL_CONNECTING) 161 return; 162 163 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 164 dev_info(ctrl->device, "failfast expired\n"); 165 nvme_kick_requeue_lists(ctrl); 166 } 167 168 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl) 169 { 170 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1) 171 return; 172 173 schedule_delayed_work(&ctrl->failfast_work, 174 ctrl->opts->fast_io_fail_tmo * HZ); 175 } 176 177 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl) 178 { 179 if (!ctrl->opts) 180 return; 181 182 cancel_delayed_work_sync(&ctrl->failfast_work); 183 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 184 } 185 186 187 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 188 { 189 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 190 return -EBUSY; 191 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 192 return -EBUSY; 193 return 0; 194 } 195 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 196 197 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 198 { 199 int ret; 200 201 ret = nvme_reset_ctrl(ctrl); 202 if (!ret) { 203 flush_work(&ctrl->reset_work); 204 if (ctrl->state != NVME_CTRL_LIVE) 205 ret = -ENETRESET; 206 } 207 208 return ret; 209 } 210 211 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl) 212 { 213 dev_info(ctrl->device, 214 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl)); 215 216 flush_work(&ctrl->reset_work); 217 nvme_stop_ctrl(ctrl); 218 nvme_remove_namespaces(ctrl); 219 ctrl->ops->delete_ctrl(ctrl); 220 nvme_uninit_ctrl(ctrl); 221 } 222 223 static void nvme_delete_ctrl_work(struct work_struct *work) 224 { 225 struct nvme_ctrl *ctrl = 226 container_of(work, struct nvme_ctrl, delete_work); 227 228 nvme_do_delete_ctrl(ctrl); 229 } 230 231 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 232 { 233 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 234 return -EBUSY; 235 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 236 return -EBUSY; 237 return 0; 238 } 239 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 240 241 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 242 { 243 /* 244 * Keep a reference until nvme_do_delete_ctrl() complete, 245 * since ->delete_ctrl can free the controller. 246 */ 247 nvme_get_ctrl(ctrl); 248 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 249 nvme_do_delete_ctrl(ctrl); 250 nvme_put_ctrl(ctrl); 251 } 252 253 static blk_status_t nvme_error_status(u16 status) 254 { 255 switch (status & 0x7ff) { 256 case NVME_SC_SUCCESS: 257 return BLK_STS_OK; 258 case NVME_SC_CAP_EXCEEDED: 259 return BLK_STS_NOSPC; 260 case NVME_SC_LBA_RANGE: 261 case NVME_SC_CMD_INTERRUPTED: 262 case NVME_SC_NS_NOT_READY: 263 return BLK_STS_TARGET; 264 case NVME_SC_BAD_ATTRIBUTES: 265 case NVME_SC_ONCS_NOT_SUPPORTED: 266 case NVME_SC_INVALID_OPCODE: 267 case NVME_SC_INVALID_FIELD: 268 case NVME_SC_INVALID_NS: 269 return BLK_STS_NOTSUPP; 270 case NVME_SC_WRITE_FAULT: 271 case NVME_SC_READ_ERROR: 272 case NVME_SC_UNWRITTEN_BLOCK: 273 case NVME_SC_ACCESS_DENIED: 274 case NVME_SC_READ_ONLY: 275 case NVME_SC_COMPARE_FAILED: 276 return BLK_STS_MEDIUM; 277 case NVME_SC_GUARD_CHECK: 278 case NVME_SC_APPTAG_CHECK: 279 case NVME_SC_REFTAG_CHECK: 280 case NVME_SC_INVALID_PI: 281 return BLK_STS_PROTECTION; 282 case NVME_SC_RESERVATION_CONFLICT: 283 return BLK_STS_RESV_CONFLICT; 284 case NVME_SC_HOST_PATH_ERROR: 285 return BLK_STS_TRANSPORT; 286 case NVME_SC_ZONE_TOO_MANY_ACTIVE: 287 return BLK_STS_ZONE_ACTIVE_RESOURCE; 288 case NVME_SC_ZONE_TOO_MANY_OPEN: 289 return BLK_STS_ZONE_OPEN_RESOURCE; 290 default: 291 return BLK_STS_IOERR; 292 } 293 } 294 295 static void nvme_retry_req(struct request *req) 296 { 297 unsigned long delay = 0; 298 u16 crd; 299 300 /* The mask and shift result must be <= 3 */ 301 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11; 302 if (crd) 303 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100; 304 305 nvme_req(req)->retries++; 306 blk_mq_requeue_request(req, false); 307 blk_mq_delay_kick_requeue_list(req->q, delay); 308 } 309 310 static void nvme_log_error(struct request *req) 311 { 312 struct nvme_ns *ns = req->q->queuedata; 313 struct nvme_request *nr = nvme_req(req); 314 315 if (ns) { 316 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %llu blocks, %s (sct 0x%x / sc 0x%x) %s%s\n", 317 ns->disk ? ns->disk->disk_name : "?", 318 nvme_get_opcode_str(nr->cmd->common.opcode), 319 nr->cmd->common.opcode, 320 (unsigned long long)nvme_sect_to_lba(ns, blk_rq_pos(req)), 321 (unsigned long long)blk_rq_bytes(req) >> ns->lba_shift, 322 nvme_get_error_status_str(nr->status), 323 nr->status >> 8 & 7, /* Status Code Type */ 324 nr->status & 0xff, /* Status Code */ 325 nr->status & NVME_SC_MORE ? "MORE " : "", 326 nr->status & NVME_SC_DNR ? "DNR " : ""); 327 return; 328 } 329 330 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n", 331 dev_name(nr->ctrl->device), 332 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 333 nr->cmd->common.opcode, 334 nvme_get_error_status_str(nr->status), 335 nr->status >> 8 & 7, /* Status Code Type */ 336 nr->status & 0xff, /* Status Code */ 337 nr->status & NVME_SC_MORE ? "MORE " : "", 338 nr->status & NVME_SC_DNR ? "DNR " : ""); 339 } 340 341 enum nvme_disposition { 342 COMPLETE, 343 RETRY, 344 FAILOVER, 345 AUTHENTICATE, 346 }; 347 348 static inline enum nvme_disposition nvme_decide_disposition(struct request *req) 349 { 350 if (likely(nvme_req(req)->status == 0)) 351 return COMPLETE; 352 353 if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED) 354 return AUTHENTICATE; 355 356 if (blk_noretry_request(req) || 357 (nvme_req(req)->status & NVME_SC_DNR) || 358 nvme_req(req)->retries >= nvme_max_retries) 359 return COMPLETE; 360 361 if (req->cmd_flags & REQ_NVME_MPATH) { 362 if (nvme_is_path_error(nvme_req(req)->status) || 363 blk_queue_dying(req->q)) 364 return FAILOVER; 365 } else { 366 if (blk_queue_dying(req->q)) 367 return COMPLETE; 368 } 369 370 return RETRY; 371 } 372 373 static inline void nvme_end_req_zoned(struct request *req) 374 { 375 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 376 req_op(req) == REQ_OP_ZONE_APPEND) 377 req->__sector = nvme_lba_to_sect(req->q->queuedata, 378 le64_to_cpu(nvme_req(req)->result.u64)); 379 } 380 381 static inline void nvme_end_req(struct request *req) 382 { 383 blk_status_t status = nvme_error_status(nvme_req(req)->status); 384 385 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) 386 nvme_log_error(req); 387 nvme_end_req_zoned(req); 388 nvme_trace_bio_complete(req); 389 if (req->cmd_flags & REQ_NVME_MPATH) 390 nvme_mpath_end_request(req); 391 blk_mq_end_request(req, status); 392 } 393 394 void nvme_complete_rq(struct request *req) 395 { 396 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 397 398 trace_nvme_complete_rq(req); 399 nvme_cleanup_cmd(req); 400 401 /* 402 * Completions of long-running commands should not be able to 403 * defer sending of periodic keep alives, since the controller 404 * may have completed processing such commands a long time ago 405 * (arbitrarily close to command submission time). 406 * req->deadline - req->timeout is the command submission time 407 * in jiffies. 408 */ 409 if (ctrl->kas && 410 req->deadline - req->timeout >= ctrl->ka_last_check_time) 411 ctrl->comp_seen = true; 412 413 switch (nvme_decide_disposition(req)) { 414 case COMPLETE: 415 nvme_end_req(req); 416 return; 417 case RETRY: 418 nvme_retry_req(req); 419 return; 420 case FAILOVER: 421 nvme_failover_req(req); 422 return; 423 case AUTHENTICATE: 424 #ifdef CONFIG_NVME_HOST_AUTH 425 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 426 nvme_retry_req(req); 427 #else 428 nvme_end_req(req); 429 #endif 430 return; 431 } 432 } 433 EXPORT_SYMBOL_GPL(nvme_complete_rq); 434 435 void nvme_complete_batch_req(struct request *req) 436 { 437 trace_nvme_complete_rq(req); 438 nvme_cleanup_cmd(req); 439 nvme_end_req_zoned(req); 440 } 441 EXPORT_SYMBOL_GPL(nvme_complete_batch_req); 442 443 /* 444 * Called to unwind from ->queue_rq on a failed command submission so that the 445 * multipathing code gets called to potentially failover to another path. 446 * The caller needs to unwind all transport specific resource allocations and 447 * must return propagate the return value. 448 */ 449 blk_status_t nvme_host_path_error(struct request *req) 450 { 451 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR; 452 blk_mq_set_request_complete(req); 453 nvme_complete_rq(req); 454 return BLK_STS_OK; 455 } 456 EXPORT_SYMBOL_GPL(nvme_host_path_error); 457 458 bool nvme_cancel_request(struct request *req, void *data) 459 { 460 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 461 "Cancelling I/O %d", req->tag); 462 463 /* don't abort one completed or idle request */ 464 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT) 465 return true; 466 467 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD; 468 nvme_req(req)->flags |= NVME_REQ_CANCELLED; 469 blk_mq_complete_request(req); 470 return true; 471 } 472 EXPORT_SYMBOL_GPL(nvme_cancel_request); 473 474 void nvme_cancel_tagset(struct nvme_ctrl *ctrl) 475 { 476 if (ctrl->tagset) { 477 blk_mq_tagset_busy_iter(ctrl->tagset, 478 nvme_cancel_request, ctrl); 479 blk_mq_tagset_wait_completed_request(ctrl->tagset); 480 } 481 } 482 EXPORT_SYMBOL_GPL(nvme_cancel_tagset); 483 484 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl) 485 { 486 nvme_stop_keep_alive(ctrl); 487 if (ctrl->admin_tagset) { 488 blk_mq_tagset_busy_iter(ctrl->admin_tagset, 489 nvme_cancel_request, ctrl); 490 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset); 491 } 492 } 493 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset); 494 495 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 496 enum nvme_ctrl_state new_state) 497 { 498 enum nvme_ctrl_state old_state; 499 unsigned long flags; 500 bool changed = false; 501 502 spin_lock_irqsave(&ctrl->lock, flags); 503 504 old_state = ctrl->state; 505 switch (new_state) { 506 case NVME_CTRL_LIVE: 507 switch (old_state) { 508 case NVME_CTRL_NEW: 509 case NVME_CTRL_RESETTING: 510 case NVME_CTRL_CONNECTING: 511 changed = true; 512 fallthrough; 513 default: 514 break; 515 } 516 break; 517 case NVME_CTRL_RESETTING: 518 switch (old_state) { 519 case NVME_CTRL_NEW: 520 case NVME_CTRL_LIVE: 521 changed = true; 522 fallthrough; 523 default: 524 break; 525 } 526 break; 527 case NVME_CTRL_CONNECTING: 528 switch (old_state) { 529 case NVME_CTRL_NEW: 530 case NVME_CTRL_RESETTING: 531 changed = true; 532 fallthrough; 533 default: 534 break; 535 } 536 break; 537 case NVME_CTRL_DELETING: 538 switch (old_state) { 539 case NVME_CTRL_LIVE: 540 case NVME_CTRL_RESETTING: 541 case NVME_CTRL_CONNECTING: 542 changed = true; 543 fallthrough; 544 default: 545 break; 546 } 547 break; 548 case NVME_CTRL_DELETING_NOIO: 549 switch (old_state) { 550 case NVME_CTRL_DELETING: 551 case NVME_CTRL_DEAD: 552 changed = true; 553 fallthrough; 554 default: 555 break; 556 } 557 break; 558 case NVME_CTRL_DEAD: 559 switch (old_state) { 560 case NVME_CTRL_DELETING: 561 changed = true; 562 fallthrough; 563 default: 564 break; 565 } 566 break; 567 default: 568 break; 569 } 570 571 if (changed) { 572 ctrl->state = new_state; 573 wake_up_all(&ctrl->state_wq); 574 } 575 576 spin_unlock_irqrestore(&ctrl->lock, flags); 577 if (!changed) 578 return false; 579 580 if (ctrl->state == NVME_CTRL_LIVE) { 581 if (old_state == NVME_CTRL_CONNECTING) 582 nvme_stop_failfast_work(ctrl); 583 nvme_kick_requeue_lists(ctrl); 584 } else if (ctrl->state == NVME_CTRL_CONNECTING && 585 old_state == NVME_CTRL_RESETTING) { 586 nvme_start_failfast_work(ctrl); 587 } 588 return changed; 589 } 590 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 591 592 /* 593 * Returns true for sink states that can't ever transition back to live. 594 */ 595 static bool nvme_state_terminal(struct nvme_ctrl *ctrl) 596 { 597 switch (ctrl->state) { 598 case NVME_CTRL_NEW: 599 case NVME_CTRL_LIVE: 600 case NVME_CTRL_RESETTING: 601 case NVME_CTRL_CONNECTING: 602 return false; 603 case NVME_CTRL_DELETING: 604 case NVME_CTRL_DELETING_NOIO: 605 case NVME_CTRL_DEAD: 606 return true; 607 default: 608 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 609 return true; 610 } 611 } 612 613 /* 614 * Waits for the controller state to be resetting, or returns false if it is 615 * not possible to ever transition to that state. 616 */ 617 bool nvme_wait_reset(struct nvme_ctrl *ctrl) 618 { 619 wait_event(ctrl->state_wq, 620 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) || 621 nvme_state_terminal(ctrl)); 622 return ctrl->state == NVME_CTRL_RESETTING; 623 } 624 EXPORT_SYMBOL_GPL(nvme_wait_reset); 625 626 static void nvme_free_ns_head(struct kref *ref) 627 { 628 struct nvme_ns_head *head = 629 container_of(ref, struct nvme_ns_head, ref); 630 631 nvme_mpath_remove_disk(head); 632 ida_free(&head->subsys->ns_ida, head->instance); 633 cleanup_srcu_struct(&head->srcu); 634 nvme_put_subsystem(head->subsys); 635 kfree(head); 636 } 637 638 bool nvme_tryget_ns_head(struct nvme_ns_head *head) 639 { 640 return kref_get_unless_zero(&head->ref); 641 } 642 643 void nvme_put_ns_head(struct nvme_ns_head *head) 644 { 645 kref_put(&head->ref, nvme_free_ns_head); 646 } 647 648 static void nvme_free_ns(struct kref *kref) 649 { 650 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 651 652 put_disk(ns->disk); 653 nvme_put_ns_head(ns->head); 654 nvme_put_ctrl(ns->ctrl); 655 kfree(ns); 656 } 657 658 static inline bool nvme_get_ns(struct nvme_ns *ns) 659 { 660 return kref_get_unless_zero(&ns->kref); 661 } 662 663 void nvme_put_ns(struct nvme_ns *ns) 664 { 665 kref_put(&ns->kref, nvme_free_ns); 666 } 667 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU); 668 669 static inline void nvme_clear_nvme_request(struct request *req) 670 { 671 nvme_req(req)->status = 0; 672 nvme_req(req)->retries = 0; 673 nvme_req(req)->flags = 0; 674 req->rq_flags |= RQF_DONTPREP; 675 } 676 677 /* initialize a passthrough request */ 678 void nvme_init_request(struct request *req, struct nvme_command *cmd) 679 { 680 if (req->q->queuedata) 681 req->timeout = NVME_IO_TIMEOUT; 682 else /* no queuedata implies admin queue */ 683 req->timeout = NVME_ADMIN_TIMEOUT; 684 685 /* passthru commands should let the driver set the SGL flags */ 686 cmd->common.flags &= ~NVME_CMD_SGL_ALL; 687 688 req->cmd_flags |= REQ_FAILFAST_DRIVER; 689 if (req->mq_hctx->type == HCTX_TYPE_POLL) 690 req->cmd_flags |= REQ_POLLED; 691 nvme_clear_nvme_request(req); 692 req->rq_flags |= RQF_QUIET; 693 memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd)); 694 } 695 EXPORT_SYMBOL_GPL(nvme_init_request); 696 697 /* 698 * For something we're not in a state to send to the device the default action 699 * is to busy it and retry it after the controller state is recovered. However, 700 * if the controller is deleting or if anything is marked for failfast or 701 * nvme multipath it is immediately failed. 702 * 703 * Note: commands used to initialize the controller will be marked for failfast. 704 * Note: nvme cli/ioctl commands are marked for failfast. 705 */ 706 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 707 struct request *rq) 708 { 709 if (ctrl->state != NVME_CTRL_DELETING_NOIO && 710 ctrl->state != NVME_CTRL_DELETING && 711 ctrl->state != NVME_CTRL_DEAD && 712 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) && 713 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH)) 714 return BLK_STS_RESOURCE; 715 return nvme_host_path_error(rq); 716 } 717 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command); 718 719 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 720 bool queue_live) 721 { 722 struct nvme_request *req = nvme_req(rq); 723 724 /* 725 * currently we have a problem sending passthru commands 726 * on the admin_q if the controller is not LIVE because we can't 727 * make sure that they are going out after the admin connect, 728 * controller enable and/or other commands in the initialization 729 * sequence. until the controller will be LIVE, fail with 730 * BLK_STS_RESOURCE so that they will be rescheduled. 731 */ 732 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD)) 733 return false; 734 735 if (ctrl->ops->flags & NVME_F_FABRICS) { 736 /* 737 * Only allow commands on a live queue, except for the connect 738 * command, which is require to set the queue live in the 739 * appropinquate states. 740 */ 741 switch (ctrl->state) { 742 case NVME_CTRL_CONNECTING: 743 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) && 744 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect || 745 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send || 746 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive)) 747 return true; 748 break; 749 default: 750 break; 751 case NVME_CTRL_DEAD: 752 return false; 753 } 754 } 755 756 return queue_live; 757 } 758 EXPORT_SYMBOL_GPL(__nvme_check_ready); 759 760 static inline void nvme_setup_flush(struct nvme_ns *ns, 761 struct nvme_command *cmnd) 762 { 763 memset(cmnd, 0, sizeof(*cmnd)); 764 cmnd->common.opcode = nvme_cmd_flush; 765 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 766 } 767 768 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 769 struct nvme_command *cmnd) 770 { 771 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 772 struct nvme_dsm_range *range; 773 struct bio *bio; 774 775 /* 776 * Some devices do not consider the DSM 'Number of Ranges' field when 777 * determining how much data to DMA. Always allocate memory for maximum 778 * number of segments to prevent device reading beyond end of buffer. 779 */ 780 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES; 781 782 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN); 783 if (!range) { 784 /* 785 * If we fail allocation our range, fallback to the controller 786 * discard page. If that's also busy, it's safe to return 787 * busy, as we know we can make progress once that's freed. 788 */ 789 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 790 return BLK_STS_RESOURCE; 791 792 range = page_address(ns->ctrl->discard_page); 793 } 794 795 if (queue_max_discard_segments(req->q) == 1) { 796 u64 slba = nvme_sect_to_lba(ns, blk_rq_pos(req)); 797 u32 nlb = blk_rq_sectors(req) >> (ns->lba_shift - 9); 798 799 range[0].cattr = cpu_to_le32(0); 800 range[0].nlb = cpu_to_le32(nlb); 801 range[0].slba = cpu_to_le64(slba); 802 n = 1; 803 } else { 804 __rq_for_each_bio(bio, req) { 805 u64 slba = nvme_sect_to_lba(ns, bio->bi_iter.bi_sector); 806 u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift; 807 808 if (n < segments) { 809 range[n].cattr = cpu_to_le32(0); 810 range[n].nlb = cpu_to_le32(nlb); 811 range[n].slba = cpu_to_le64(slba); 812 } 813 n++; 814 } 815 } 816 817 if (WARN_ON_ONCE(n != segments)) { 818 if (virt_to_page(range) == ns->ctrl->discard_page) 819 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 820 else 821 kfree(range); 822 return BLK_STS_IOERR; 823 } 824 825 memset(cmnd, 0, sizeof(*cmnd)); 826 cmnd->dsm.opcode = nvme_cmd_dsm; 827 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 828 cmnd->dsm.nr = cpu_to_le32(segments - 1); 829 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 830 831 bvec_set_virt(&req->special_vec, range, alloc_size); 832 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 833 834 return BLK_STS_OK; 835 } 836 837 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd, 838 struct request *req) 839 { 840 u32 upper, lower; 841 u64 ref48; 842 843 /* both rw and write zeroes share the same reftag format */ 844 switch (ns->guard_type) { 845 case NVME_NVM_NS_16B_GUARD: 846 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 847 break; 848 case NVME_NVM_NS_64B_GUARD: 849 ref48 = ext_pi_ref_tag(req); 850 lower = lower_32_bits(ref48); 851 upper = upper_32_bits(ref48); 852 853 cmnd->rw.reftag = cpu_to_le32(lower); 854 cmnd->rw.cdw3 = cpu_to_le32(upper); 855 break; 856 default: 857 break; 858 } 859 } 860 861 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns, 862 struct request *req, struct nvme_command *cmnd) 863 { 864 memset(cmnd, 0, sizeof(*cmnd)); 865 866 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 867 return nvme_setup_discard(ns, req, cmnd); 868 869 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes; 870 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id); 871 cmnd->write_zeroes.slba = 872 cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 873 cmnd->write_zeroes.length = 874 cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 875 876 if (!(req->cmd_flags & REQ_NOUNMAP) && (ns->features & NVME_NS_DEAC)) 877 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC); 878 879 if (nvme_ns_has_pi(ns)) { 880 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT); 881 882 switch (ns->pi_type) { 883 case NVME_NS_DPS_PI_TYPE1: 884 case NVME_NS_DPS_PI_TYPE2: 885 nvme_set_ref_tag(ns, cmnd, req); 886 break; 887 } 888 } 889 890 return BLK_STS_OK; 891 } 892 893 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 894 struct request *req, struct nvme_command *cmnd, 895 enum nvme_opcode op) 896 { 897 u16 control = 0; 898 u32 dsmgmt = 0; 899 900 if (req->cmd_flags & REQ_FUA) 901 control |= NVME_RW_FUA; 902 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 903 control |= NVME_RW_LR; 904 905 if (req->cmd_flags & REQ_RAHEAD) 906 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 907 908 cmnd->rw.opcode = op; 909 cmnd->rw.flags = 0; 910 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 911 cmnd->rw.cdw2 = 0; 912 cmnd->rw.cdw3 = 0; 913 cmnd->rw.metadata = 0; 914 cmnd->rw.slba = cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 915 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 916 cmnd->rw.reftag = 0; 917 cmnd->rw.apptag = 0; 918 cmnd->rw.appmask = 0; 919 920 if (ns->ms) { 921 /* 922 * If formated with metadata, the block layer always provides a 923 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 924 * we enable the PRACT bit for protection information or set the 925 * namespace capacity to zero to prevent any I/O. 926 */ 927 if (!blk_integrity_rq(req)) { 928 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns))) 929 return BLK_STS_NOTSUPP; 930 control |= NVME_RW_PRINFO_PRACT; 931 } 932 933 switch (ns->pi_type) { 934 case NVME_NS_DPS_PI_TYPE3: 935 control |= NVME_RW_PRINFO_PRCHK_GUARD; 936 break; 937 case NVME_NS_DPS_PI_TYPE1: 938 case NVME_NS_DPS_PI_TYPE2: 939 control |= NVME_RW_PRINFO_PRCHK_GUARD | 940 NVME_RW_PRINFO_PRCHK_REF; 941 if (op == nvme_cmd_zone_append) 942 control |= NVME_RW_APPEND_PIREMAP; 943 nvme_set_ref_tag(ns, cmnd, req); 944 break; 945 } 946 } 947 948 cmnd->rw.control = cpu_to_le16(control); 949 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 950 return 0; 951 } 952 953 void nvme_cleanup_cmd(struct request *req) 954 { 955 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 956 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 957 958 if (req->special_vec.bv_page == ctrl->discard_page) 959 clear_bit_unlock(0, &ctrl->discard_page_busy); 960 else 961 kfree(bvec_virt(&req->special_vec)); 962 } 963 } 964 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 965 966 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req) 967 { 968 struct nvme_command *cmd = nvme_req(req)->cmd; 969 blk_status_t ret = BLK_STS_OK; 970 971 if (!(req->rq_flags & RQF_DONTPREP)) 972 nvme_clear_nvme_request(req); 973 974 switch (req_op(req)) { 975 case REQ_OP_DRV_IN: 976 case REQ_OP_DRV_OUT: 977 /* these are setup prior to execution in nvme_init_request() */ 978 break; 979 case REQ_OP_FLUSH: 980 nvme_setup_flush(ns, cmd); 981 break; 982 case REQ_OP_ZONE_RESET_ALL: 983 case REQ_OP_ZONE_RESET: 984 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET); 985 break; 986 case REQ_OP_ZONE_OPEN: 987 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN); 988 break; 989 case REQ_OP_ZONE_CLOSE: 990 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE); 991 break; 992 case REQ_OP_ZONE_FINISH: 993 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH); 994 break; 995 case REQ_OP_WRITE_ZEROES: 996 ret = nvme_setup_write_zeroes(ns, req, cmd); 997 break; 998 case REQ_OP_DISCARD: 999 ret = nvme_setup_discard(ns, req, cmd); 1000 break; 1001 case REQ_OP_READ: 1002 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read); 1003 break; 1004 case REQ_OP_WRITE: 1005 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write); 1006 break; 1007 case REQ_OP_ZONE_APPEND: 1008 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append); 1009 break; 1010 default: 1011 WARN_ON_ONCE(1); 1012 return BLK_STS_IOERR; 1013 } 1014 1015 cmd->common.command_id = nvme_cid(req); 1016 trace_nvme_setup_cmd(req, cmd); 1017 return ret; 1018 } 1019 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 1020 1021 /* 1022 * Return values: 1023 * 0: success 1024 * >0: nvme controller's cqe status response 1025 * <0: kernel error in lieu of controller response 1026 */ 1027 int nvme_execute_rq(struct request *rq, bool at_head) 1028 { 1029 blk_status_t status; 1030 1031 status = blk_execute_rq(rq, at_head); 1032 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED) 1033 return -EINTR; 1034 if (nvme_req(rq)->status) 1035 return nvme_req(rq)->status; 1036 return blk_status_to_errno(status); 1037 } 1038 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU); 1039 1040 /* 1041 * Returns 0 on success. If the result is negative, it's a Linux error code; 1042 * if the result is positive, it's an NVM Express status code 1043 */ 1044 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1045 union nvme_result *result, void *buffer, unsigned bufflen, 1046 int qid, int at_head, blk_mq_req_flags_t flags) 1047 { 1048 struct request *req; 1049 int ret; 1050 1051 if (qid == NVME_QID_ANY) 1052 req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags); 1053 else 1054 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags, 1055 qid - 1); 1056 1057 if (IS_ERR(req)) 1058 return PTR_ERR(req); 1059 nvme_init_request(req, cmd); 1060 1061 if (buffer && bufflen) { 1062 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); 1063 if (ret) 1064 goto out; 1065 } 1066 1067 ret = nvme_execute_rq(req, at_head); 1068 if (result && ret >= 0) 1069 *result = nvme_req(req)->result; 1070 out: 1071 blk_mq_free_request(req); 1072 return ret; 1073 } 1074 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 1075 1076 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1077 void *buffer, unsigned bufflen) 1078 { 1079 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 1080 NVME_QID_ANY, 0, 0); 1081 } 1082 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 1083 1084 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1085 { 1086 u32 effects = 0; 1087 1088 if (ns) { 1089 effects = le32_to_cpu(ns->head->effects->iocs[opcode]); 1090 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC)) 1091 dev_warn_once(ctrl->device, 1092 "IO command:%02x has unusual effects:%08x\n", 1093 opcode, effects); 1094 1095 /* 1096 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues, 1097 * which would deadlock when done on an I/O command. Note that 1098 * We already warn about an unusual effect above. 1099 */ 1100 effects &= ~NVME_CMD_EFFECTS_CSE_MASK; 1101 } else { 1102 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1103 } 1104 1105 return effects; 1106 } 1107 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU); 1108 1109 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1110 { 1111 u32 effects = nvme_command_effects(ctrl, ns, opcode); 1112 1113 /* 1114 * For simplicity, IO to all namespaces is quiesced even if the command 1115 * effects say only one namespace is affected. 1116 */ 1117 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1118 mutex_lock(&ctrl->scan_lock); 1119 mutex_lock(&ctrl->subsys->lock); 1120 nvme_mpath_start_freeze(ctrl->subsys); 1121 nvme_mpath_wait_freeze(ctrl->subsys); 1122 nvme_start_freeze(ctrl); 1123 nvme_wait_freeze(ctrl); 1124 } 1125 return effects; 1126 } 1127 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU); 1128 1129 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1130 struct nvme_command *cmd, int status) 1131 { 1132 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1133 nvme_unfreeze(ctrl); 1134 nvme_mpath_unfreeze(ctrl->subsys); 1135 mutex_unlock(&ctrl->subsys->lock); 1136 mutex_unlock(&ctrl->scan_lock); 1137 } 1138 if (effects & NVME_CMD_EFFECTS_CCC) { 1139 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY, 1140 &ctrl->flags)) { 1141 dev_info(ctrl->device, 1142 "controller capabilities changed, reset may be required to take effect.\n"); 1143 } 1144 } 1145 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) { 1146 nvme_queue_scan(ctrl); 1147 flush_work(&ctrl->scan_work); 1148 } 1149 if (ns) 1150 return; 1151 1152 switch (cmd->common.opcode) { 1153 case nvme_admin_set_features: 1154 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) { 1155 case NVME_FEAT_KATO: 1156 /* 1157 * Keep alive commands interval on the host should be 1158 * updated when KATO is modified by Set Features 1159 * commands. 1160 */ 1161 if (!status) 1162 nvme_update_keep_alive(ctrl, cmd); 1163 break; 1164 default: 1165 break; 1166 } 1167 break; 1168 default: 1169 break; 1170 } 1171 } 1172 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU); 1173 1174 /* 1175 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1: 1176 * 1177 * The host should send Keep Alive commands at half of the Keep Alive Timeout 1178 * accounting for transport roundtrip times [..]. 1179 */ 1180 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl) 1181 { 1182 unsigned long delay = ctrl->kato * HZ / 2; 1183 1184 /* 1185 * When using Traffic Based Keep Alive, we need to run 1186 * nvme_keep_alive_work at twice the normal frequency, as one 1187 * command completion can postpone sending a keep alive command 1188 * by up to twice the delay between runs. 1189 */ 1190 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) 1191 delay /= 2; 1192 return delay; 1193 } 1194 1195 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl) 1196 { 1197 queue_delayed_work(nvme_wq, &ctrl->ka_work, 1198 nvme_keep_alive_work_period(ctrl)); 1199 } 1200 1201 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq, 1202 blk_status_t status) 1203 { 1204 struct nvme_ctrl *ctrl = rq->end_io_data; 1205 unsigned long flags; 1206 bool startka = false; 1207 unsigned long rtt = jiffies - (rq->deadline - rq->timeout); 1208 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1209 1210 /* 1211 * Subtract off the keepalive RTT so nvme_keep_alive_work runs 1212 * at the desired frequency. 1213 */ 1214 if (rtt <= delay) { 1215 delay -= rtt; 1216 } else { 1217 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n", 1218 jiffies_to_msecs(rtt)); 1219 delay = 0; 1220 } 1221 1222 blk_mq_free_request(rq); 1223 1224 if (status) { 1225 dev_err(ctrl->device, 1226 "failed nvme_keep_alive_end_io error=%d\n", 1227 status); 1228 return RQ_END_IO_NONE; 1229 } 1230 1231 ctrl->ka_last_check_time = jiffies; 1232 ctrl->comp_seen = false; 1233 spin_lock_irqsave(&ctrl->lock, flags); 1234 if (ctrl->state == NVME_CTRL_LIVE || 1235 ctrl->state == NVME_CTRL_CONNECTING) 1236 startka = true; 1237 spin_unlock_irqrestore(&ctrl->lock, flags); 1238 if (startka) 1239 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1240 return RQ_END_IO_NONE; 1241 } 1242 1243 static void nvme_keep_alive_work(struct work_struct *work) 1244 { 1245 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 1246 struct nvme_ctrl, ka_work); 1247 bool comp_seen = ctrl->comp_seen; 1248 struct request *rq; 1249 1250 ctrl->ka_last_check_time = jiffies; 1251 1252 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 1253 dev_dbg(ctrl->device, 1254 "reschedule traffic based keep-alive timer\n"); 1255 ctrl->comp_seen = false; 1256 nvme_queue_keep_alive_work(ctrl); 1257 return; 1258 } 1259 1260 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd), 1261 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT); 1262 if (IS_ERR(rq)) { 1263 /* allocation failure, reset the controller */ 1264 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq)); 1265 nvme_reset_ctrl(ctrl); 1266 return; 1267 } 1268 nvme_init_request(rq, &ctrl->ka_cmd); 1269 1270 rq->timeout = ctrl->kato * HZ; 1271 rq->end_io = nvme_keep_alive_end_io; 1272 rq->end_io_data = ctrl; 1273 blk_execute_rq_nowait(rq, false); 1274 } 1275 1276 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 1277 { 1278 if (unlikely(ctrl->kato == 0)) 1279 return; 1280 1281 nvme_queue_keep_alive_work(ctrl); 1282 } 1283 1284 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 1285 { 1286 if (unlikely(ctrl->kato == 0)) 1287 return; 1288 1289 cancel_delayed_work_sync(&ctrl->ka_work); 1290 } 1291 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 1292 1293 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 1294 struct nvme_command *cmd) 1295 { 1296 unsigned int new_kato = 1297 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000); 1298 1299 dev_info(ctrl->device, 1300 "keep alive interval updated from %u ms to %u ms\n", 1301 ctrl->kato * 1000 / 2, new_kato * 1000 / 2); 1302 1303 nvme_stop_keep_alive(ctrl); 1304 ctrl->kato = new_kato; 1305 nvme_start_keep_alive(ctrl); 1306 } 1307 1308 /* 1309 * In NVMe 1.0 the CNS field was just a binary controller or namespace 1310 * flag, thus sending any new CNS opcodes has a big chance of not working. 1311 * Qemu unfortunately had that bug after reporting a 1.1 version compliance 1312 * (but not for any later version). 1313 */ 1314 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl) 1315 { 1316 if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS) 1317 return ctrl->vs < NVME_VS(1, 2, 0); 1318 return ctrl->vs < NVME_VS(1, 1, 0); 1319 } 1320 1321 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 1322 { 1323 struct nvme_command c = { }; 1324 int error; 1325 1326 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1327 c.identify.opcode = nvme_admin_identify; 1328 c.identify.cns = NVME_ID_CNS_CTRL; 1329 1330 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 1331 if (!*id) 1332 return -ENOMEM; 1333 1334 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 1335 sizeof(struct nvme_id_ctrl)); 1336 if (error) 1337 kfree(*id); 1338 return error; 1339 } 1340 1341 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, 1342 struct nvme_ns_id_desc *cur, bool *csi_seen) 1343 { 1344 const char *warn_str = "ctrl returned bogus length:"; 1345 void *data = cur; 1346 1347 switch (cur->nidt) { 1348 case NVME_NIDT_EUI64: 1349 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1350 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n", 1351 warn_str, cur->nidl); 1352 return -1; 1353 } 1354 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1355 return NVME_NIDT_EUI64_LEN; 1356 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN); 1357 return NVME_NIDT_EUI64_LEN; 1358 case NVME_NIDT_NGUID: 1359 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1360 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n", 1361 warn_str, cur->nidl); 1362 return -1; 1363 } 1364 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1365 return NVME_NIDT_NGUID_LEN; 1366 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN); 1367 return NVME_NIDT_NGUID_LEN; 1368 case NVME_NIDT_UUID: 1369 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1370 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n", 1371 warn_str, cur->nidl); 1372 return -1; 1373 } 1374 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1375 return NVME_NIDT_UUID_LEN; 1376 uuid_copy(&ids->uuid, data + sizeof(*cur)); 1377 return NVME_NIDT_UUID_LEN; 1378 case NVME_NIDT_CSI: 1379 if (cur->nidl != NVME_NIDT_CSI_LEN) { 1380 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n", 1381 warn_str, cur->nidl); 1382 return -1; 1383 } 1384 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN); 1385 *csi_seen = true; 1386 return NVME_NIDT_CSI_LEN; 1387 default: 1388 /* Skip unknown types */ 1389 return cur->nidl; 1390 } 1391 } 1392 1393 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, 1394 struct nvme_ns_info *info) 1395 { 1396 struct nvme_command c = { }; 1397 bool csi_seen = false; 1398 int status, pos, len; 1399 void *data; 1400 1401 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl)) 1402 return 0; 1403 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST) 1404 return 0; 1405 1406 c.identify.opcode = nvme_admin_identify; 1407 c.identify.nsid = cpu_to_le32(info->nsid); 1408 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1409 1410 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1411 if (!data) 1412 return -ENOMEM; 1413 1414 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1415 NVME_IDENTIFY_DATA_SIZE); 1416 if (status) { 1417 dev_warn(ctrl->device, 1418 "Identify Descriptors failed (nsid=%u, status=0x%x)\n", 1419 info->nsid, status); 1420 goto free_data; 1421 } 1422 1423 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1424 struct nvme_ns_id_desc *cur = data + pos; 1425 1426 if (cur->nidl == 0) 1427 break; 1428 1429 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen); 1430 if (len < 0) 1431 break; 1432 1433 len += sizeof(*cur); 1434 } 1435 1436 if (nvme_multi_css(ctrl) && !csi_seen) { 1437 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n", 1438 info->nsid); 1439 status = -EINVAL; 1440 } 1441 1442 free_data: 1443 kfree(data); 1444 return status; 1445 } 1446 1447 static int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1448 struct nvme_id_ns **id) 1449 { 1450 struct nvme_command c = { }; 1451 int error; 1452 1453 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1454 c.identify.opcode = nvme_admin_identify; 1455 c.identify.nsid = cpu_to_le32(nsid); 1456 c.identify.cns = NVME_ID_CNS_NS; 1457 1458 *id = kmalloc(sizeof(**id), GFP_KERNEL); 1459 if (!*id) 1460 return -ENOMEM; 1461 1462 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id)); 1463 if (error) { 1464 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error); 1465 kfree(*id); 1466 } 1467 return error; 1468 } 1469 1470 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl, 1471 struct nvme_ns_info *info) 1472 { 1473 struct nvme_ns_ids *ids = &info->ids; 1474 struct nvme_id_ns *id; 1475 int ret; 1476 1477 ret = nvme_identify_ns(ctrl, info->nsid, &id); 1478 if (ret) 1479 return ret; 1480 1481 if (id->ncap == 0) { 1482 /* namespace not allocated or attached */ 1483 info->is_removed = true; 1484 return -ENODEV; 1485 } 1486 1487 info->anagrpid = id->anagrpid; 1488 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1489 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1490 info->is_ready = true; 1491 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) { 1492 dev_info(ctrl->device, 1493 "Ignoring bogus Namespace Identifiers\n"); 1494 } else { 1495 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1496 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 1497 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64)); 1498 if (ctrl->vs >= NVME_VS(1, 2, 0) && 1499 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 1500 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid)); 1501 } 1502 kfree(id); 1503 return 0; 1504 } 1505 1506 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl, 1507 struct nvme_ns_info *info) 1508 { 1509 struct nvme_id_ns_cs_indep *id; 1510 struct nvme_command c = { 1511 .identify.opcode = nvme_admin_identify, 1512 .identify.nsid = cpu_to_le32(info->nsid), 1513 .identify.cns = NVME_ID_CNS_NS_CS_INDEP, 1514 }; 1515 int ret; 1516 1517 id = kmalloc(sizeof(*id), GFP_KERNEL); 1518 if (!id) 1519 return -ENOMEM; 1520 1521 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 1522 if (!ret) { 1523 info->anagrpid = id->anagrpid; 1524 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1525 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1526 info->is_ready = id->nstat & NVME_NSTAT_NRDY; 1527 } 1528 kfree(id); 1529 return ret; 1530 } 1531 1532 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, 1533 unsigned int dword11, void *buffer, size_t buflen, u32 *result) 1534 { 1535 union nvme_result res = { 0 }; 1536 struct nvme_command c = { }; 1537 int ret; 1538 1539 c.features.opcode = op; 1540 c.features.fid = cpu_to_le32(fid); 1541 c.features.dword11 = cpu_to_le32(dword11); 1542 1543 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1544 buffer, buflen, NVME_QID_ANY, 0, 0); 1545 if (ret >= 0 && result) 1546 *result = le32_to_cpu(res.u32); 1547 return ret; 1548 } 1549 1550 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1551 unsigned int dword11, void *buffer, size_t buflen, 1552 u32 *result) 1553 { 1554 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer, 1555 buflen, result); 1556 } 1557 EXPORT_SYMBOL_GPL(nvme_set_features); 1558 1559 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1560 unsigned int dword11, void *buffer, size_t buflen, 1561 u32 *result) 1562 { 1563 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer, 1564 buflen, result); 1565 } 1566 EXPORT_SYMBOL_GPL(nvme_get_features); 1567 1568 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1569 { 1570 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1571 u32 result; 1572 int status, nr_io_queues; 1573 1574 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1575 &result); 1576 if (status < 0) 1577 return status; 1578 1579 /* 1580 * Degraded controllers might return an error when setting the queue 1581 * count. We still want to be able to bring them online and offer 1582 * access to the admin queue, as that might be only way to fix them up. 1583 */ 1584 if (status > 0) { 1585 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1586 *count = 0; 1587 } else { 1588 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1589 *count = min(*count, nr_io_queues); 1590 } 1591 1592 return 0; 1593 } 1594 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1595 1596 #define NVME_AEN_SUPPORTED \ 1597 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ 1598 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) 1599 1600 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1601 { 1602 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1603 int status; 1604 1605 if (!supported_aens) 1606 return; 1607 1608 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1609 NULL, 0, &result); 1610 if (status) 1611 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1612 supported_aens); 1613 1614 queue_work(nvme_wq, &ctrl->async_event_work); 1615 } 1616 1617 static int nvme_ns_open(struct nvme_ns *ns) 1618 { 1619 1620 /* should never be called due to GENHD_FL_HIDDEN */ 1621 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head))) 1622 goto fail; 1623 if (!nvme_get_ns(ns)) 1624 goto fail; 1625 if (!try_module_get(ns->ctrl->ops->module)) 1626 goto fail_put_ns; 1627 1628 return 0; 1629 1630 fail_put_ns: 1631 nvme_put_ns(ns); 1632 fail: 1633 return -ENXIO; 1634 } 1635 1636 static void nvme_ns_release(struct nvme_ns *ns) 1637 { 1638 1639 module_put(ns->ctrl->ops->module); 1640 nvme_put_ns(ns); 1641 } 1642 1643 static int nvme_open(struct gendisk *disk, blk_mode_t mode) 1644 { 1645 return nvme_ns_open(disk->private_data); 1646 } 1647 1648 static void nvme_release(struct gendisk *disk) 1649 { 1650 nvme_ns_release(disk->private_data); 1651 } 1652 1653 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1654 { 1655 /* some standard values */ 1656 geo->heads = 1 << 6; 1657 geo->sectors = 1 << 5; 1658 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1659 return 0; 1660 } 1661 1662 #ifdef CONFIG_BLK_DEV_INTEGRITY 1663 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns, 1664 u32 max_integrity_segments) 1665 { 1666 struct blk_integrity integrity = { }; 1667 1668 switch (ns->pi_type) { 1669 case NVME_NS_DPS_PI_TYPE3: 1670 switch (ns->guard_type) { 1671 case NVME_NVM_NS_16B_GUARD: 1672 integrity.profile = &t10_pi_type3_crc; 1673 integrity.tag_size = sizeof(u16) + sizeof(u32); 1674 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1675 break; 1676 case NVME_NVM_NS_64B_GUARD: 1677 integrity.profile = &ext_pi_type3_crc64; 1678 integrity.tag_size = sizeof(u16) + 6; 1679 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1680 break; 1681 default: 1682 integrity.profile = NULL; 1683 break; 1684 } 1685 break; 1686 case NVME_NS_DPS_PI_TYPE1: 1687 case NVME_NS_DPS_PI_TYPE2: 1688 switch (ns->guard_type) { 1689 case NVME_NVM_NS_16B_GUARD: 1690 integrity.profile = &t10_pi_type1_crc; 1691 integrity.tag_size = sizeof(u16); 1692 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1693 break; 1694 case NVME_NVM_NS_64B_GUARD: 1695 integrity.profile = &ext_pi_type1_crc64; 1696 integrity.tag_size = sizeof(u16); 1697 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1698 break; 1699 default: 1700 integrity.profile = NULL; 1701 break; 1702 } 1703 break; 1704 default: 1705 integrity.profile = NULL; 1706 break; 1707 } 1708 1709 integrity.tuple_size = ns->ms; 1710 blk_integrity_register(disk, &integrity); 1711 blk_queue_max_integrity_segments(disk->queue, max_integrity_segments); 1712 } 1713 #else 1714 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns, 1715 u32 max_integrity_segments) 1716 { 1717 } 1718 #endif /* CONFIG_BLK_DEV_INTEGRITY */ 1719 1720 static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns) 1721 { 1722 struct nvme_ctrl *ctrl = ns->ctrl; 1723 struct request_queue *queue = disk->queue; 1724 u32 size = queue_logical_block_size(queue); 1725 1726 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns, UINT_MAX)) 1727 ctrl->max_discard_sectors = nvme_lba_to_sect(ns, ctrl->dmrsl); 1728 1729 if (ctrl->max_discard_sectors == 0) { 1730 blk_queue_max_discard_sectors(queue, 0); 1731 return; 1732 } 1733 1734 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) < 1735 NVME_DSM_MAX_RANGES); 1736 1737 queue->limits.discard_granularity = size; 1738 1739 /* If discard is already enabled, don't reset queue limits */ 1740 if (queue->limits.max_discard_sectors) 1741 return; 1742 1743 blk_queue_max_discard_sectors(queue, ctrl->max_discard_sectors); 1744 blk_queue_max_discard_segments(queue, ctrl->max_discard_segments); 1745 1746 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 1747 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX); 1748 } 1749 1750 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 1751 { 1752 return uuid_equal(&a->uuid, &b->uuid) && 1753 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 1754 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 && 1755 a->csi == b->csi; 1756 } 1757 1758 static int nvme_init_ms(struct nvme_ns *ns, struct nvme_id_ns *id) 1759 { 1760 bool first = id->dps & NVME_NS_DPS_PI_FIRST; 1761 unsigned lbaf = nvme_lbaf_index(id->flbas); 1762 struct nvme_ctrl *ctrl = ns->ctrl; 1763 struct nvme_command c = { }; 1764 struct nvme_id_ns_nvm *nvm; 1765 int ret = 0; 1766 u32 elbaf; 1767 1768 ns->pi_size = 0; 1769 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms); 1770 if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) { 1771 ns->pi_size = sizeof(struct t10_pi_tuple); 1772 ns->guard_type = NVME_NVM_NS_16B_GUARD; 1773 goto set_pi; 1774 } 1775 1776 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); 1777 if (!nvm) 1778 return -ENOMEM; 1779 1780 c.identify.opcode = nvme_admin_identify; 1781 c.identify.nsid = cpu_to_le32(ns->head->ns_id); 1782 c.identify.cns = NVME_ID_CNS_CS_NS; 1783 c.identify.csi = NVME_CSI_NVM; 1784 1785 ret = nvme_submit_sync_cmd(ns->ctrl->admin_q, &c, nvm, sizeof(*nvm)); 1786 if (ret) 1787 goto free_data; 1788 1789 elbaf = le32_to_cpu(nvm->elbaf[lbaf]); 1790 1791 /* no support for storage tag formats right now */ 1792 if (nvme_elbaf_sts(elbaf)) 1793 goto free_data; 1794 1795 ns->guard_type = nvme_elbaf_guard_type(elbaf); 1796 switch (ns->guard_type) { 1797 case NVME_NVM_NS_64B_GUARD: 1798 ns->pi_size = sizeof(struct crc64_pi_tuple); 1799 break; 1800 case NVME_NVM_NS_16B_GUARD: 1801 ns->pi_size = sizeof(struct t10_pi_tuple); 1802 break; 1803 default: 1804 break; 1805 } 1806 1807 free_data: 1808 kfree(nvm); 1809 set_pi: 1810 if (ns->pi_size && (first || ns->ms == ns->pi_size)) 1811 ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1812 else 1813 ns->pi_type = 0; 1814 1815 return ret; 1816 } 1817 1818 static void nvme_configure_metadata(struct nvme_ns *ns, struct nvme_id_ns *id) 1819 { 1820 struct nvme_ctrl *ctrl = ns->ctrl; 1821 1822 if (nvme_init_ms(ns, id)) 1823 return; 1824 1825 ns->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS); 1826 if (!ns->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 1827 return; 1828 1829 if (ctrl->ops->flags & NVME_F_FABRICS) { 1830 /* 1831 * The NVMe over Fabrics specification only supports metadata as 1832 * part of the extended data LBA. We rely on HCA/HBA support to 1833 * remap the separate metadata buffer from the block layer. 1834 */ 1835 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT))) 1836 return; 1837 1838 ns->features |= NVME_NS_EXT_LBAS; 1839 1840 /* 1841 * The current fabrics transport drivers support namespace 1842 * metadata formats only if nvme_ns_has_pi() returns true. 1843 * Suppress support for all other formats so the namespace will 1844 * have a 0 capacity and not be usable through the block stack. 1845 * 1846 * Note, this check will need to be modified if any drivers 1847 * gain the ability to use other metadata formats. 1848 */ 1849 if (ctrl->max_integrity_segments && nvme_ns_has_pi(ns)) 1850 ns->features |= NVME_NS_METADATA_SUPPORTED; 1851 } else { 1852 /* 1853 * For PCIe controllers, we can't easily remap the separate 1854 * metadata buffer from the block layer and thus require a 1855 * separate metadata buffer for block layer metadata/PI support. 1856 * We allow extended LBAs for the passthrough interface, though. 1857 */ 1858 if (id->flbas & NVME_NS_FLBAS_META_EXT) 1859 ns->features |= NVME_NS_EXT_LBAS; 1860 else 1861 ns->features |= NVME_NS_METADATA_SUPPORTED; 1862 } 1863 } 1864 1865 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl, 1866 struct request_queue *q) 1867 { 1868 bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT; 1869 1870 if (ctrl->max_hw_sectors) { 1871 u32 max_segments = 1872 (ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1; 1873 1874 max_segments = min_not_zero(max_segments, ctrl->max_segments); 1875 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors); 1876 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX)); 1877 } 1878 blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1); 1879 blk_queue_dma_alignment(q, 3); 1880 blk_queue_write_cache(q, vwc, vwc); 1881 } 1882 1883 static void nvme_update_disk_info(struct gendisk *disk, 1884 struct nvme_ns *ns, struct nvme_id_ns *id) 1885 { 1886 sector_t capacity = nvme_lba_to_sect(ns, le64_to_cpu(id->nsze)); 1887 u32 bs = 1U << ns->lba_shift; 1888 u32 atomic_bs, phys_bs, io_opt = 0; 1889 1890 /* 1891 * The block layer can't support LBA sizes larger than the page size 1892 * yet, so catch this early and don't allow block I/O. 1893 */ 1894 if (ns->lba_shift > PAGE_SHIFT) { 1895 capacity = 0; 1896 bs = (1 << 9); 1897 } 1898 1899 blk_integrity_unregister(disk); 1900 1901 atomic_bs = phys_bs = bs; 1902 if (id->nabo == 0) { 1903 /* 1904 * Bit 1 indicates whether NAWUPF is defined for this namespace 1905 * and whether it should be used instead of AWUPF. If NAWUPF == 1906 * 0 then AWUPF must be used instead. 1907 */ 1908 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) 1909 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs; 1910 else 1911 atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs; 1912 } 1913 1914 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) { 1915 /* NPWG = Namespace Preferred Write Granularity */ 1916 phys_bs = bs * (1 + le16_to_cpu(id->npwg)); 1917 /* NOWS = Namespace Optimal Write Size */ 1918 io_opt = bs * (1 + le16_to_cpu(id->nows)); 1919 } 1920 1921 blk_queue_logical_block_size(disk->queue, bs); 1922 /* 1923 * Linux filesystems assume writing a single physical block is 1924 * an atomic operation. Hence limit the physical block size to the 1925 * value of the Atomic Write Unit Power Fail parameter. 1926 */ 1927 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs)); 1928 blk_queue_io_min(disk->queue, phys_bs); 1929 blk_queue_io_opt(disk->queue, io_opt); 1930 1931 /* 1932 * Register a metadata profile for PI, or the plain non-integrity NVMe 1933 * metadata masquerading as Type 0 if supported, otherwise reject block 1934 * I/O to namespaces with metadata except when the namespace supports 1935 * PI, as it can strip/insert in that case. 1936 */ 1937 if (ns->ms) { 1938 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 1939 (ns->features & NVME_NS_METADATA_SUPPORTED)) 1940 nvme_init_integrity(disk, ns, 1941 ns->ctrl->max_integrity_segments); 1942 else if (!nvme_ns_has_pi(ns)) 1943 capacity = 0; 1944 } 1945 1946 set_capacity_and_notify(disk, capacity); 1947 1948 nvme_config_discard(disk, ns); 1949 blk_queue_max_write_zeroes_sectors(disk->queue, 1950 ns->ctrl->max_zeroes_sectors); 1951 } 1952 1953 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info) 1954 { 1955 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags); 1956 } 1957 1958 static inline bool nvme_first_scan(struct gendisk *disk) 1959 { 1960 /* nvme_alloc_ns() scans the disk prior to adding it */ 1961 return !disk_live(disk); 1962 } 1963 1964 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id) 1965 { 1966 struct nvme_ctrl *ctrl = ns->ctrl; 1967 u32 iob; 1968 1969 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 1970 is_power_of_2(ctrl->max_hw_sectors)) 1971 iob = ctrl->max_hw_sectors; 1972 else 1973 iob = nvme_lba_to_sect(ns, le16_to_cpu(id->noiob)); 1974 1975 if (!iob) 1976 return; 1977 1978 if (!is_power_of_2(iob)) { 1979 if (nvme_first_scan(ns->disk)) 1980 pr_warn("%s: ignoring unaligned IO boundary:%u\n", 1981 ns->disk->disk_name, iob); 1982 return; 1983 } 1984 1985 if (blk_queue_is_zoned(ns->disk->queue)) { 1986 if (nvme_first_scan(ns->disk)) 1987 pr_warn("%s: ignoring zoned namespace IO boundary\n", 1988 ns->disk->disk_name); 1989 return; 1990 } 1991 1992 blk_queue_chunk_sectors(ns->queue, iob); 1993 } 1994 1995 static int nvme_update_ns_info_generic(struct nvme_ns *ns, 1996 struct nvme_ns_info *info) 1997 { 1998 blk_mq_freeze_queue(ns->disk->queue); 1999 nvme_set_queue_limits(ns->ctrl, ns->queue); 2000 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2001 blk_mq_unfreeze_queue(ns->disk->queue); 2002 2003 if (nvme_ns_head_multipath(ns->head)) { 2004 blk_mq_freeze_queue(ns->head->disk->queue); 2005 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2006 nvme_mpath_revalidate_paths(ns); 2007 blk_stack_limits(&ns->head->disk->queue->limits, 2008 &ns->queue->limits, 0); 2009 ns->head->disk->flags |= GENHD_FL_HIDDEN; 2010 blk_mq_unfreeze_queue(ns->head->disk->queue); 2011 } 2012 2013 /* Hide the block-interface for these devices */ 2014 ns->disk->flags |= GENHD_FL_HIDDEN; 2015 set_bit(NVME_NS_READY, &ns->flags); 2016 2017 return 0; 2018 } 2019 2020 static int nvme_update_ns_info_block(struct nvme_ns *ns, 2021 struct nvme_ns_info *info) 2022 { 2023 struct nvme_id_ns *id; 2024 unsigned lbaf; 2025 int ret; 2026 2027 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id); 2028 if (ret) 2029 return ret; 2030 2031 blk_mq_freeze_queue(ns->disk->queue); 2032 lbaf = nvme_lbaf_index(id->flbas); 2033 ns->lba_shift = id->lbaf[lbaf].ds; 2034 nvme_set_queue_limits(ns->ctrl, ns->queue); 2035 2036 nvme_configure_metadata(ns, id); 2037 nvme_set_chunk_sectors(ns, id); 2038 nvme_update_disk_info(ns->disk, ns, id); 2039 2040 if (ns->head->ids.csi == NVME_CSI_ZNS) { 2041 ret = nvme_update_zone_info(ns, lbaf); 2042 if (ret) { 2043 blk_mq_unfreeze_queue(ns->disk->queue); 2044 goto out; 2045 } 2046 } 2047 2048 /* 2049 * Only set the DEAC bit if the device guarantees that reads from 2050 * deallocated data return zeroes. While the DEAC bit does not 2051 * require that, it must be a no-op if reads from deallocated data 2052 * do not return zeroes. 2053 */ 2054 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3))) 2055 ns->features |= NVME_NS_DEAC; 2056 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2057 set_bit(NVME_NS_READY, &ns->flags); 2058 blk_mq_unfreeze_queue(ns->disk->queue); 2059 2060 if (blk_queue_is_zoned(ns->queue)) { 2061 ret = nvme_revalidate_zones(ns); 2062 if (ret && !nvme_first_scan(ns->disk)) 2063 goto out; 2064 } 2065 2066 if (nvme_ns_head_multipath(ns->head)) { 2067 blk_mq_freeze_queue(ns->head->disk->queue); 2068 nvme_update_disk_info(ns->head->disk, ns, id); 2069 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2070 nvme_mpath_revalidate_paths(ns); 2071 blk_stack_limits(&ns->head->disk->queue->limits, 2072 &ns->queue->limits, 0); 2073 disk_update_readahead(ns->head->disk); 2074 blk_mq_unfreeze_queue(ns->head->disk->queue); 2075 } 2076 2077 ret = 0; 2078 out: 2079 /* 2080 * If probing fails due an unsupported feature, hide the block device, 2081 * but still allow other access. 2082 */ 2083 if (ret == -ENODEV) { 2084 ns->disk->flags |= GENHD_FL_HIDDEN; 2085 set_bit(NVME_NS_READY, &ns->flags); 2086 ret = 0; 2087 } 2088 kfree(id); 2089 return ret; 2090 } 2091 2092 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info) 2093 { 2094 switch (info->ids.csi) { 2095 case NVME_CSI_ZNS: 2096 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 2097 dev_info(ns->ctrl->device, 2098 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n", 2099 info->nsid); 2100 return nvme_update_ns_info_generic(ns, info); 2101 } 2102 return nvme_update_ns_info_block(ns, info); 2103 case NVME_CSI_NVM: 2104 return nvme_update_ns_info_block(ns, info); 2105 default: 2106 dev_info(ns->ctrl->device, 2107 "block device for nsid %u not supported (csi %u)\n", 2108 info->nsid, info->ids.csi); 2109 return nvme_update_ns_info_generic(ns, info); 2110 } 2111 } 2112 2113 #ifdef CONFIG_BLK_SED_OPAL 2114 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2115 bool send) 2116 { 2117 struct nvme_ctrl *ctrl = data; 2118 struct nvme_command cmd = { }; 2119 2120 if (send) 2121 cmd.common.opcode = nvme_admin_security_send; 2122 else 2123 cmd.common.opcode = nvme_admin_security_recv; 2124 cmd.common.nsid = 0; 2125 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 2126 cmd.common.cdw11 = cpu_to_le32(len); 2127 2128 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 2129 NVME_QID_ANY, 1, 0); 2130 } 2131 2132 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2133 { 2134 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) { 2135 if (!ctrl->opal_dev) 2136 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit); 2137 else if (was_suspended) 2138 opal_unlock_from_suspend(ctrl->opal_dev); 2139 } else { 2140 free_opal_dev(ctrl->opal_dev); 2141 ctrl->opal_dev = NULL; 2142 } 2143 } 2144 #else 2145 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2146 { 2147 } 2148 #endif /* CONFIG_BLK_SED_OPAL */ 2149 2150 #ifdef CONFIG_BLK_DEV_ZONED 2151 static int nvme_report_zones(struct gendisk *disk, sector_t sector, 2152 unsigned int nr_zones, report_zones_cb cb, void *data) 2153 { 2154 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb, 2155 data); 2156 } 2157 #else 2158 #define nvme_report_zones NULL 2159 #endif /* CONFIG_BLK_DEV_ZONED */ 2160 2161 const struct block_device_operations nvme_bdev_ops = { 2162 .owner = THIS_MODULE, 2163 .ioctl = nvme_ioctl, 2164 .compat_ioctl = blkdev_compat_ptr_ioctl, 2165 .open = nvme_open, 2166 .release = nvme_release, 2167 .getgeo = nvme_getgeo, 2168 .report_zones = nvme_report_zones, 2169 .pr_ops = &nvme_pr_ops, 2170 }; 2171 2172 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val, 2173 u32 timeout, const char *op) 2174 { 2175 unsigned long timeout_jiffies = jiffies + timeout * HZ; 2176 u32 csts; 2177 int ret; 2178 2179 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2180 if (csts == ~0) 2181 return -ENODEV; 2182 if ((csts & mask) == val) 2183 break; 2184 2185 usleep_range(1000, 2000); 2186 if (fatal_signal_pending(current)) 2187 return -EINTR; 2188 if (time_after(jiffies, timeout_jiffies)) { 2189 dev_err(ctrl->device, 2190 "Device not ready; aborting %s, CSTS=0x%x\n", 2191 op, csts); 2192 return -ENODEV; 2193 } 2194 } 2195 2196 return ret; 2197 } 2198 2199 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown) 2200 { 2201 int ret; 2202 2203 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2204 if (shutdown) 2205 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 2206 else 2207 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 2208 2209 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2210 if (ret) 2211 return ret; 2212 2213 if (shutdown) { 2214 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK, 2215 NVME_CSTS_SHST_CMPLT, 2216 ctrl->shutdown_timeout, "shutdown"); 2217 } 2218 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 2219 msleep(NVME_QUIRK_DELAY_AMOUNT); 2220 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0, 2221 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset"); 2222 } 2223 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 2224 2225 int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 2226 { 2227 unsigned dev_page_min; 2228 u32 timeout; 2229 int ret; 2230 2231 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2232 if (ret) { 2233 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2234 return ret; 2235 } 2236 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2237 2238 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) { 2239 dev_err(ctrl->device, 2240 "Minimum device page size %u too large for host (%u)\n", 2241 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT); 2242 return -ENODEV; 2243 } 2244 2245 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI) 2246 ctrl->ctrl_config = NVME_CC_CSS_CSI; 2247 else 2248 ctrl->ctrl_config = NVME_CC_CSS_NVM; 2249 2250 if (ctrl->cap & NVME_CAP_CRMS_CRWMS && ctrl->cap & NVME_CAP_CRMS_CRIMS) 2251 ctrl->ctrl_config |= NVME_CC_CRIME; 2252 2253 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; 2254 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 2255 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 2256 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2257 if (ret) 2258 return ret; 2259 2260 /* Flush write to device (required if transport is PCI) */ 2261 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config); 2262 if (ret) 2263 return ret; 2264 2265 /* CAP value may change after initial CC write */ 2266 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2267 if (ret) 2268 return ret; 2269 2270 timeout = NVME_CAP_TIMEOUT(ctrl->cap); 2271 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) { 2272 u32 crto, ready_timeout; 2273 2274 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto); 2275 if (ret) { 2276 dev_err(ctrl->device, "Reading CRTO failed (%d)\n", 2277 ret); 2278 return ret; 2279 } 2280 2281 /* 2282 * CRTO should always be greater or equal to CAP.TO, but some 2283 * devices are known to get this wrong. Use the larger of the 2284 * two values. 2285 */ 2286 if (ctrl->ctrl_config & NVME_CC_CRIME) 2287 ready_timeout = NVME_CRTO_CRIMT(crto); 2288 else 2289 ready_timeout = NVME_CRTO_CRWMT(crto); 2290 2291 if (ready_timeout < timeout) 2292 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n", 2293 crto, ctrl->cap); 2294 else 2295 timeout = ready_timeout; 2296 } 2297 2298 ctrl->ctrl_config |= NVME_CC_ENABLE; 2299 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2300 if (ret) 2301 return ret; 2302 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY, 2303 (timeout + 1) / 2, "initialisation"); 2304 } 2305 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 2306 2307 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 2308 { 2309 __le64 ts; 2310 int ret; 2311 2312 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 2313 return 0; 2314 2315 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 2316 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 2317 NULL); 2318 if (ret) 2319 dev_warn_once(ctrl->device, 2320 "could not set timestamp (%d)\n", ret); 2321 return ret; 2322 } 2323 2324 static int nvme_configure_host_options(struct nvme_ctrl *ctrl) 2325 { 2326 struct nvme_feat_host_behavior *host; 2327 u8 acre = 0, lbafee = 0; 2328 int ret; 2329 2330 /* Don't bother enabling the feature if retry delay is not reported */ 2331 if (ctrl->crdt[0]) 2332 acre = NVME_ENABLE_ACRE; 2333 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) 2334 lbafee = NVME_ENABLE_LBAFEE; 2335 2336 if (!acre && !lbafee) 2337 return 0; 2338 2339 host = kzalloc(sizeof(*host), GFP_KERNEL); 2340 if (!host) 2341 return 0; 2342 2343 host->acre = acre; 2344 host->lbafee = lbafee; 2345 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 2346 host, sizeof(*host), NULL); 2347 kfree(host); 2348 return ret; 2349 } 2350 2351 /* 2352 * The function checks whether the given total (exlat + enlat) latency of 2353 * a power state allows the latter to be used as an APST transition target. 2354 * It does so by comparing the latency to the primary and secondary latency 2355 * tolerances defined by module params. If there's a match, the corresponding 2356 * timeout value is returned and the matching tolerance index (1 or 2) is 2357 * reported. 2358 */ 2359 static bool nvme_apst_get_transition_time(u64 total_latency, 2360 u64 *transition_time, unsigned *last_index) 2361 { 2362 if (total_latency <= apst_primary_latency_tol_us) { 2363 if (*last_index == 1) 2364 return false; 2365 *last_index = 1; 2366 *transition_time = apst_primary_timeout_ms; 2367 return true; 2368 } 2369 if (apst_secondary_timeout_ms && 2370 total_latency <= apst_secondary_latency_tol_us) { 2371 if (*last_index <= 2) 2372 return false; 2373 *last_index = 2; 2374 *transition_time = apst_secondary_timeout_ms; 2375 return true; 2376 } 2377 return false; 2378 } 2379 2380 /* 2381 * APST (Autonomous Power State Transition) lets us program a table of power 2382 * state transitions that the controller will perform automatically. 2383 * 2384 * Depending on module params, one of the two supported techniques will be used: 2385 * 2386 * - If the parameters provide explicit timeouts and tolerances, they will be 2387 * used to build a table with up to 2 non-operational states to transition to. 2388 * The default parameter values were selected based on the values used by 2389 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic 2390 * regeneration of the APST table in the event of switching between external 2391 * and battery power, the timeouts and tolerances reflect a compromise 2392 * between values used by Microsoft for AC and battery scenarios. 2393 * - If not, we'll configure the table with a simple heuristic: we are willing 2394 * to spend at most 2% of the time transitioning between power states. 2395 * Therefore, when running in any given state, we will enter the next 2396 * lower-power non-operational state after waiting 50 * (enlat + exlat) 2397 * microseconds, as long as that state's exit latency is under the requested 2398 * maximum latency. 2399 * 2400 * We will not autonomously enter any non-operational state for which the total 2401 * latency exceeds ps_max_latency_us. 2402 * 2403 * Users can set ps_max_latency_us to zero to turn off APST. 2404 */ 2405 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 2406 { 2407 struct nvme_feat_auto_pst *table; 2408 unsigned apste = 0; 2409 u64 max_lat_us = 0; 2410 __le64 target = 0; 2411 int max_ps = -1; 2412 int state; 2413 int ret; 2414 unsigned last_lt_index = UINT_MAX; 2415 2416 /* 2417 * If APST isn't supported or if we haven't been initialized yet, 2418 * then don't do anything. 2419 */ 2420 if (!ctrl->apsta) 2421 return 0; 2422 2423 if (ctrl->npss > 31) { 2424 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2425 return 0; 2426 } 2427 2428 table = kzalloc(sizeof(*table), GFP_KERNEL); 2429 if (!table) 2430 return 0; 2431 2432 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2433 /* Turn off APST. */ 2434 dev_dbg(ctrl->device, "APST disabled\n"); 2435 goto done; 2436 } 2437 2438 /* 2439 * Walk through all states from lowest- to highest-power. 2440 * According to the spec, lower-numbered states use more power. NPSS, 2441 * despite the name, is the index of the lowest-power state, not the 2442 * number of states. 2443 */ 2444 for (state = (int)ctrl->npss; state >= 0; state--) { 2445 u64 total_latency_us, exit_latency_us, transition_ms; 2446 2447 if (target) 2448 table->entries[state] = target; 2449 2450 /* 2451 * Don't allow transitions to the deepest state if it's quirked 2452 * off. 2453 */ 2454 if (state == ctrl->npss && 2455 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2456 continue; 2457 2458 /* 2459 * Is this state a useful non-operational state for higher-power 2460 * states to autonomously transition to? 2461 */ 2462 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE)) 2463 continue; 2464 2465 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2466 if (exit_latency_us > ctrl->ps_max_latency_us) 2467 continue; 2468 2469 total_latency_us = exit_latency_us + 2470 le32_to_cpu(ctrl->psd[state].entry_lat); 2471 2472 /* 2473 * This state is good. It can be used as the APST idle target 2474 * for higher power states. 2475 */ 2476 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) { 2477 if (!nvme_apst_get_transition_time(total_latency_us, 2478 &transition_ms, &last_lt_index)) 2479 continue; 2480 } else { 2481 transition_ms = total_latency_us + 19; 2482 do_div(transition_ms, 20); 2483 if (transition_ms > (1 << 24) - 1) 2484 transition_ms = (1 << 24) - 1; 2485 } 2486 2487 target = cpu_to_le64((state << 3) | (transition_ms << 8)); 2488 if (max_ps == -1) 2489 max_ps = state; 2490 if (total_latency_us > max_lat_us) 2491 max_lat_us = total_latency_us; 2492 } 2493 2494 if (max_ps == -1) 2495 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2496 else 2497 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2498 max_ps, max_lat_us, (int)sizeof(*table), table); 2499 apste = 1; 2500 2501 done: 2502 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2503 table, sizeof(*table), NULL); 2504 if (ret) 2505 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2506 kfree(table); 2507 return ret; 2508 } 2509 2510 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2511 { 2512 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2513 u64 latency; 2514 2515 switch (val) { 2516 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2517 case PM_QOS_LATENCY_ANY: 2518 latency = U64_MAX; 2519 break; 2520 2521 default: 2522 latency = val; 2523 } 2524 2525 if (ctrl->ps_max_latency_us != latency) { 2526 ctrl->ps_max_latency_us = latency; 2527 if (ctrl->state == NVME_CTRL_LIVE) 2528 nvme_configure_apst(ctrl); 2529 } 2530 } 2531 2532 struct nvme_core_quirk_entry { 2533 /* 2534 * NVMe model and firmware strings are padded with spaces. For 2535 * simplicity, strings in the quirk table are padded with NULLs 2536 * instead. 2537 */ 2538 u16 vid; 2539 const char *mn; 2540 const char *fr; 2541 unsigned long quirks; 2542 }; 2543 2544 static const struct nvme_core_quirk_entry core_quirks[] = { 2545 { 2546 /* 2547 * This Toshiba device seems to die using any APST states. See: 2548 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2549 */ 2550 .vid = 0x1179, 2551 .mn = "THNSF5256GPUK TOSHIBA", 2552 .quirks = NVME_QUIRK_NO_APST, 2553 }, 2554 { 2555 /* 2556 * This LiteON CL1-3D*-Q11 firmware version has a race 2557 * condition associated with actions related to suspend to idle 2558 * LiteON has resolved the problem in future firmware 2559 */ 2560 .vid = 0x14a4, 2561 .fr = "22301111", 2562 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 2563 }, 2564 { 2565 /* 2566 * This Kioxia CD6-V Series / HPE PE8030 device times out and 2567 * aborts I/O during any load, but more easily reproducible 2568 * with discards (fstrim). 2569 * 2570 * The device is left in a state where it is also not possible 2571 * to use "nvme set-feature" to disable APST, but booting with 2572 * nvme_core.default_ps_max_latency=0 works. 2573 */ 2574 .vid = 0x1e0f, 2575 .mn = "KCD6XVUL6T40", 2576 .quirks = NVME_QUIRK_NO_APST, 2577 }, 2578 { 2579 /* 2580 * The external Samsung X5 SSD fails initialization without a 2581 * delay before checking if it is ready and has a whole set of 2582 * other problems. To make this even more interesting, it 2583 * shares the PCI ID with internal Samsung 970 Evo Plus that 2584 * does not need or want these quirks. 2585 */ 2586 .vid = 0x144d, 2587 .mn = "Samsung Portable SSD X5", 2588 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY | 2589 NVME_QUIRK_NO_DEEPEST_PS | 2590 NVME_QUIRK_IGNORE_DEV_SUBNQN, 2591 } 2592 }; 2593 2594 /* match is null-terminated but idstr is space-padded. */ 2595 static bool string_matches(const char *idstr, const char *match, size_t len) 2596 { 2597 size_t matchlen; 2598 2599 if (!match) 2600 return true; 2601 2602 matchlen = strlen(match); 2603 WARN_ON_ONCE(matchlen > len); 2604 2605 if (memcmp(idstr, match, matchlen)) 2606 return false; 2607 2608 for (; matchlen < len; matchlen++) 2609 if (idstr[matchlen] != ' ') 2610 return false; 2611 2612 return true; 2613 } 2614 2615 static bool quirk_matches(const struct nvme_id_ctrl *id, 2616 const struct nvme_core_quirk_entry *q) 2617 { 2618 return q->vid == le16_to_cpu(id->vid) && 2619 string_matches(id->mn, q->mn, sizeof(id->mn)) && 2620 string_matches(id->fr, q->fr, sizeof(id->fr)); 2621 } 2622 2623 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 2624 struct nvme_id_ctrl *id) 2625 { 2626 size_t nqnlen; 2627 int off; 2628 2629 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 2630 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 2631 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 2632 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 2633 return; 2634 } 2635 2636 if (ctrl->vs >= NVME_VS(1, 2, 1)) 2637 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 2638 } 2639 2640 /* 2641 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe 2642 * Base Specification 2.0. It is slightly different from the format 2643 * specified there due to historic reasons, and we can't change it now. 2644 */ 2645 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 2646 "nqn.2014.08.org.nvmexpress:%04x%04x", 2647 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 2648 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 2649 off += sizeof(id->sn); 2650 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 2651 off += sizeof(id->mn); 2652 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 2653 } 2654 2655 static void nvme_release_subsystem(struct device *dev) 2656 { 2657 struct nvme_subsystem *subsys = 2658 container_of(dev, struct nvme_subsystem, dev); 2659 2660 if (subsys->instance >= 0) 2661 ida_free(&nvme_instance_ida, subsys->instance); 2662 kfree(subsys); 2663 } 2664 2665 static void nvme_destroy_subsystem(struct kref *ref) 2666 { 2667 struct nvme_subsystem *subsys = 2668 container_of(ref, struct nvme_subsystem, ref); 2669 2670 mutex_lock(&nvme_subsystems_lock); 2671 list_del(&subsys->entry); 2672 mutex_unlock(&nvme_subsystems_lock); 2673 2674 ida_destroy(&subsys->ns_ida); 2675 device_del(&subsys->dev); 2676 put_device(&subsys->dev); 2677 } 2678 2679 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 2680 { 2681 kref_put(&subsys->ref, nvme_destroy_subsystem); 2682 } 2683 2684 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 2685 { 2686 struct nvme_subsystem *subsys; 2687 2688 lockdep_assert_held(&nvme_subsystems_lock); 2689 2690 /* 2691 * Fail matches for discovery subsystems. This results 2692 * in each discovery controller bound to a unique subsystem. 2693 * This avoids issues with validating controller values 2694 * that can only be true when there is a single unique subsystem. 2695 * There may be multiple and completely independent entities 2696 * that provide discovery controllers. 2697 */ 2698 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME)) 2699 return NULL; 2700 2701 list_for_each_entry(subsys, &nvme_subsystems, entry) { 2702 if (strcmp(subsys->subnqn, subsysnqn)) 2703 continue; 2704 if (!kref_get_unless_zero(&subsys->ref)) 2705 continue; 2706 return subsys; 2707 } 2708 2709 return NULL; 2710 } 2711 2712 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl) 2713 { 2714 return ctrl->opts && ctrl->opts->discovery_nqn; 2715 } 2716 2717 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, 2718 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2719 { 2720 struct nvme_ctrl *tmp; 2721 2722 lockdep_assert_held(&nvme_subsystems_lock); 2723 2724 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) { 2725 if (nvme_state_terminal(tmp)) 2726 continue; 2727 2728 if (tmp->cntlid == ctrl->cntlid) { 2729 dev_err(ctrl->device, 2730 "Duplicate cntlid %u with %s, subsys %s, rejecting\n", 2731 ctrl->cntlid, dev_name(tmp->device), 2732 subsys->subnqn); 2733 return false; 2734 } 2735 2736 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) || 2737 nvme_discovery_ctrl(ctrl)) 2738 continue; 2739 2740 dev_err(ctrl->device, 2741 "Subsystem does not support multiple controllers\n"); 2742 return false; 2743 } 2744 2745 return true; 2746 } 2747 2748 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2749 { 2750 struct nvme_subsystem *subsys, *found; 2751 int ret; 2752 2753 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 2754 if (!subsys) 2755 return -ENOMEM; 2756 2757 subsys->instance = -1; 2758 mutex_init(&subsys->lock); 2759 kref_init(&subsys->ref); 2760 INIT_LIST_HEAD(&subsys->ctrls); 2761 INIT_LIST_HEAD(&subsys->nsheads); 2762 nvme_init_subnqn(subsys, ctrl, id); 2763 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 2764 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 2765 subsys->vendor_id = le16_to_cpu(id->vid); 2766 subsys->cmic = id->cmic; 2767 2768 /* Versions prior to 1.4 don't necessarily report a valid type */ 2769 if (id->cntrltype == NVME_CTRL_DISC || 2770 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME)) 2771 subsys->subtype = NVME_NQN_DISC; 2772 else 2773 subsys->subtype = NVME_NQN_NVME; 2774 2775 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) { 2776 dev_err(ctrl->device, 2777 "Subsystem %s is not a discovery controller", 2778 subsys->subnqn); 2779 kfree(subsys); 2780 return -EINVAL; 2781 } 2782 subsys->awupf = le16_to_cpu(id->awupf); 2783 nvme_mpath_default_iopolicy(subsys); 2784 2785 subsys->dev.class = nvme_subsys_class; 2786 subsys->dev.release = nvme_release_subsystem; 2787 subsys->dev.groups = nvme_subsys_attrs_groups; 2788 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance); 2789 device_initialize(&subsys->dev); 2790 2791 mutex_lock(&nvme_subsystems_lock); 2792 found = __nvme_find_get_subsystem(subsys->subnqn); 2793 if (found) { 2794 put_device(&subsys->dev); 2795 subsys = found; 2796 2797 if (!nvme_validate_cntlid(subsys, ctrl, id)) { 2798 ret = -EINVAL; 2799 goto out_put_subsystem; 2800 } 2801 } else { 2802 ret = device_add(&subsys->dev); 2803 if (ret) { 2804 dev_err(ctrl->device, 2805 "failed to register subsystem device.\n"); 2806 put_device(&subsys->dev); 2807 goto out_unlock; 2808 } 2809 ida_init(&subsys->ns_ida); 2810 list_add_tail(&subsys->entry, &nvme_subsystems); 2811 } 2812 2813 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 2814 dev_name(ctrl->device)); 2815 if (ret) { 2816 dev_err(ctrl->device, 2817 "failed to create sysfs link from subsystem.\n"); 2818 goto out_put_subsystem; 2819 } 2820 2821 if (!found) 2822 subsys->instance = ctrl->instance; 2823 ctrl->subsys = subsys; 2824 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 2825 mutex_unlock(&nvme_subsystems_lock); 2826 return 0; 2827 2828 out_put_subsystem: 2829 nvme_put_subsystem(subsys); 2830 out_unlock: 2831 mutex_unlock(&nvme_subsystems_lock); 2832 return ret; 2833 } 2834 2835 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 2836 void *log, size_t size, u64 offset) 2837 { 2838 struct nvme_command c = { }; 2839 u32 dwlen = nvme_bytes_to_numd(size); 2840 2841 c.get_log_page.opcode = nvme_admin_get_log_page; 2842 c.get_log_page.nsid = cpu_to_le32(nsid); 2843 c.get_log_page.lid = log_page; 2844 c.get_log_page.lsp = lsp; 2845 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 2846 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 2847 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 2848 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 2849 c.get_log_page.csi = csi; 2850 2851 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 2852 } 2853 2854 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi, 2855 struct nvme_effects_log **log) 2856 { 2857 struct nvme_effects_log *cel = xa_load(&ctrl->cels, csi); 2858 int ret; 2859 2860 if (cel) 2861 goto out; 2862 2863 cel = kzalloc(sizeof(*cel), GFP_KERNEL); 2864 if (!cel) 2865 return -ENOMEM; 2866 2867 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi, 2868 cel, sizeof(*cel), 0); 2869 if (ret) { 2870 kfree(cel); 2871 return ret; 2872 } 2873 2874 xa_store(&ctrl->cels, csi, cel, GFP_KERNEL); 2875 out: 2876 *log = cel; 2877 return 0; 2878 } 2879 2880 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units) 2881 { 2882 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val; 2883 2884 if (check_shl_overflow(1U, units + page_shift - 9, &val)) 2885 return UINT_MAX; 2886 return val; 2887 } 2888 2889 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl) 2890 { 2891 struct nvme_command c = { }; 2892 struct nvme_id_ctrl_nvm *id; 2893 int ret; 2894 2895 if (ctrl->oncs & NVME_CTRL_ONCS_DSM) { 2896 ctrl->max_discard_sectors = UINT_MAX; 2897 ctrl->max_discard_segments = NVME_DSM_MAX_RANGES; 2898 } else { 2899 ctrl->max_discard_sectors = 0; 2900 ctrl->max_discard_segments = 0; 2901 } 2902 2903 /* 2904 * Even though NVMe spec explicitly states that MDTS is not applicable 2905 * to the write-zeroes, we are cautious and limit the size to the 2906 * controllers max_hw_sectors value, which is based on the MDTS field 2907 * and possibly other limiting factors. 2908 */ 2909 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) && 2910 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)) 2911 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors; 2912 else 2913 ctrl->max_zeroes_sectors = 0; 2914 2915 if (ctrl->subsys->subtype != NVME_NQN_NVME || 2916 nvme_ctrl_limited_cns(ctrl) || 2917 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags)) 2918 return 0; 2919 2920 id = kzalloc(sizeof(*id), GFP_KERNEL); 2921 if (!id) 2922 return -ENOMEM; 2923 2924 c.identify.opcode = nvme_admin_identify; 2925 c.identify.cns = NVME_ID_CNS_CS_CTRL; 2926 c.identify.csi = NVME_CSI_NVM; 2927 2928 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 2929 if (ret) 2930 goto free_data; 2931 2932 if (id->dmrl) 2933 ctrl->max_discard_segments = id->dmrl; 2934 ctrl->dmrsl = le32_to_cpu(id->dmrsl); 2935 if (id->wzsl) 2936 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl); 2937 2938 free_data: 2939 if (ret > 0) 2940 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags); 2941 kfree(id); 2942 return ret; 2943 } 2944 2945 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl) 2946 { 2947 struct nvme_effects_log *log = ctrl->effects; 2948 2949 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 2950 NVME_CMD_EFFECTS_NCC | 2951 NVME_CMD_EFFECTS_CSE_MASK); 2952 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 2953 NVME_CMD_EFFECTS_CSE_MASK); 2954 2955 /* 2956 * The spec says the result of a security receive command depends on 2957 * the previous security send command. As such, many vendors log this 2958 * command as one to submitted only when no other commands to the same 2959 * namespace are outstanding. The intention is to tell the host to 2960 * prevent mixing security send and receive. 2961 * 2962 * This driver can only enforce such exclusive access against IO 2963 * queues, though. We are not readily able to enforce such a rule for 2964 * two commands to the admin queue, which is the only queue that 2965 * matters for this command. 2966 * 2967 * Rather than blindly freezing the IO queues for this effect that 2968 * doesn't even apply to IO, mask it off. 2969 */ 2970 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK); 2971 2972 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 2973 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 2974 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 2975 } 2976 2977 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2978 { 2979 int ret = 0; 2980 2981 if (ctrl->effects) 2982 return 0; 2983 2984 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 2985 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 2986 if (ret < 0) 2987 return ret; 2988 } 2989 2990 if (!ctrl->effects) { 2991 ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL); 2992 if (!ctrl->effects) 2993 return -ENOMEM; 2994 xa_store(&ctrl->cels, NVME_CSI_NVM, ctrl->effects, GFP_KERNEL); 2995 } 2996 2997 nvme_init_known_nvm_effects(ctrl); 2998 return 0; 2999 } 3000 3001 static int nvme_init_identify(struct nvme_ctrl *ctrl) 3002 { 3003 struct nvme_id_ctrl *id; 3004 u32 max_hw_sectors; 3005 bool prev_apst_enabled; 3006 int ret; 3007 3008 ret = nvme_identify_ctrl(ctrl, &id); 3009 if (ret) { 3010 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 3011 return -EIO; 3012 } 3013 3014 if (!(ctrl->ops->flags & NVME_F_FABRICS)) 3015 ctrl->cntlid = le16_to_cpu(id->cntlid); 3016 3017 if (!ctrl->identified) { 3018 unsigned int i; 3019 3020 /* 3021 * Check for quirks. Quirk can depend on firmware version, 3022 * so, in principle, the set of quirks present can change 3023 * across a reset. As a possible future enhancement, we 3024 * could re-scan for quirks every time we reinitialize 3025 * the device, but we'd have to make sure that the driver 3026 * behaves intelligently if the quirks change. 3027 */ 3028 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 3029 if (quirk_matches(id, &core_quirks[i])) 3030 ctrl->quirks |= core_quirks[i].quirks; 3031 } 3032 3033 ret = nvme_init_subsystem(ctrl, id); 3034 if (ret) 3035 goto out_free; 3036 3037 ret = nvme_init_effects(ctrl, id); 3038 if (ret) 3039 goto out_free; 3040 } 3041 memcpy(ctrl->subsys->firmware_rev, id->fr, 3042 sizeof(ctrl->subsys->firmware_rev)); 3043 3044 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 3045 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 3046 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 3047 } 3048 3049 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 3050 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 3051 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 3052 3053 ctrl->oacs = le16_to_cpu(id->oacs); 3054 ctrl->oncs = le16_to_cpu(id->oncs); 3055 ctrl->mtfa = le16_to_cpu(id->mtfa); 3056 ctrl->oaes = le32_to_cpu(id->oaes); 3057 ctrl->wctemp = le16_to_cpu(id->wctemp); 3058 ctrl->cctemp = le16_to_cpu(id->cctemp); 3059 3060 atomic_set(&ctrl->abort_limit, id->acl + 1); 3061 ctrl->vwc = id->vwc; 3062 if (id->mdts) 3063 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts); 3064 else 3065 max_hw_sectors = UINT_MAX; 3066 ctrl->max_hw_sectors = 3067 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 3068 3069 nvme_set_queue_limits(ctrl, ctrl->admin_q); 3070 ctrl->sgls = le32_to_cpu(id->sgls); 3071 ctrl->kas = le16_to_cpu(id->kas); 3072 ctrl->max_namespaces = le32_to_cpu(id->mnan); 3073 ctrl->ctratt = le32_to_cpu(id->ctratt); 3074 3075 ctrl->cntrltype = id->cntrltype; 3076 ctrl->dctype = id->dctype; 3077 3078 if (id->rtd3e) { 3079 /* us -> s */ 3080 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC; 3081 3082 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 3083 shutdown_timeout, 60); 3084 3085 if (ctrl->shutdown_timeout != shutdown_timeout) 3086 dev_info(ctrl->device, 3087 "Shutdown timeout set to %u seconds\n", 3088 ctrl->shutdown_timeout); 3089 } else 3090 ctrl->shutdown_timeout = shutdown_timeout; 3091 3092 ctrl->npss = id->npss; 3093 ctrl->apsta = id->apsta; 3094 prev_apst_enabled = ctrl->apst_enabled; 3095 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 3096 if (force_apst && id->apsta) { 3097 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 3098 ctrl->apst_enabled = true; 3099 } else { 3100 ctrl->apst_enabled = false; 3101 } 3102 } else { 3103 ctrl->apst_enabled = id->apsta; 3104 } 3105 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 3106 3107 if (ctrl->ops->flags & NVME_F_FABRICS) { 3108 ctrl->icdoff = le16_to_cpu(id->icdoff); 3109 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 3110 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 3111 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 3112 3113 /* 3114 * In fabrics we need to verify the cntlid matches the 3115 * admin connect 3116 */ 3117 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 3118 dev_err(ctrl->device, 3119 "Mismatching cntlid: Connect %u vs Identify " 3120 "%u, rejecting\n", 3121 ctrl->cntlid, le16_to_cpu(id->cntlid)); 3122 ret = -EINVAL; 3123 goto out_free; 3124 } 3125 3126 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) { 3127 dev_err(ctrl->device, 3128 "keep-alive support is mandatory for fabrics\n"); 3129 ret = -EINVAL; 3130 goto out_free; 3131 } 3132 } else { 3133 ctrl->hmpre = le32_to_cpu(id->hmpre); 3134 ctrl->hmmin = le32_to_cpu(id->hmmin); 3135 ctrl->hmminds = le32_to_cpu(id->hmminds); 3136 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 3137 } 3138 3139 ret = nvme_mpath_init_identify(ctrl, id); 3140 if (ret < 0) 3141 goto out_free; 3142 3143 if (ctrl->apst_enabled && !prev_apst_enabled) 3144 dev_pm_qos_expose_latency_tolerance(ctrl->device); 3145 else if (!ctrl->apst_enabled && prev_apst_enabled) 3146 dev_pm_qos_hide_latency_tolerance(ctrl->device); 3147 3148 out_free: 3149 kfree(id); 3150 return ret; 3151 } 3152 3153 /* 3154 * Initialize the cached copies of the Identify data and various controller 3155 * register in our nvme_ctrl structure. This should be called as soon as 3156 * the admin queue is fully up and running. 3157 */ 3158 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended) 3159 { 3160 int ret; 3161 3162 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 3163 if (ret) { 3164 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 3165 return ret; 3166 } 3167 3168 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize); 3169 3170 if (ctrl->vs >= NVME_VS(1, 1, 0)) 3171 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap); 3172 3173 ret = nvme_init_identify(ctrl); 3174 if (ret) 3175 return ret; 3176 3177 ret = nvme_configure_apst(ctrl); 3178 if (ret < 0) 3179 return ret; 3180 3181 ret = nvme_configure_timestamp(ctrl); 3182 if (ret < 0) 3183 return ret; 3184 3185 ret = nvme_configure_host_options(ctrl); 3186 if (ret < 0) 3187 return ret; 3188 3189 nvme_configure_opal(ctrl, was_suspended); 3190 3191 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) { 3192 /* 3193 * Do not return errors unless we are in a controller reset, 3194 * the controller works perfectly fine without hwmon. 3195 */ 3196 ret = nvme_hwmon_init(ctrl); 3197 if (ret == -EINTR) 3198 return ret; 3199 } 3200 3201 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags); 3202 ctrl->identified = true; 3203 3204 nvme_start_keep_alive(ctrl); 3205 3206 return 0; 3207 } 3208 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish); 3209 3210 static int nvme_dev_open(struct inode *inode, struct file *file) 3211 { 3212 struct nvme_ctrl *ctrl = 3213 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3214 3215 switch (ctrl->state) { 3216 case NVME_CTRL_LIVE: 3217 break; 3218 default: 3219 return -EWOULDBLOCK; 3220 } 3221 3222 nvme_get_ctrl(ctrl); 3223 if (!try_module_get(ctrl->ops->module)) { 3224 nvme_put_ctrl(ctrl); 3225 return -EINVAL; 3226 } 3227 3228 file->private_data = ctrl; 3229 return 0; 3230 } 3231 3232 static int nvme_dev_release(struct inode *inode, struct file *file) 3233 { 3234 struct nvme_ctrl *ctrl = 3235 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3236 3237 module_put(ctrl->ops->module); 3238 nvme_put_ctrl(ctrl); 3239 return 0; 3240 } 3241 3242 static const struct file_operations nvme_dev_fops = { 3243 .owner = THIS_MODULE, 3244 .open = nvme_dev_open, 3245 .release = nvme_dev_release, 3246 .unlocked_ioctl = nvme_dev_ioctl, 3247 .compat_ioctl = compat_ptr_ioctl, 3248 .uring_cmd = nvme_dev_uring_cmd, 3249 }; 3250 3251 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl, 3252 unsigned nsid) 3253 { 3254 struct nvme_ns_head *h; 3255 3256 lockdep_assert_held(&ctrl->subsys->lock); 3257 3258 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) { 3259 /* 3260 * Private namespaces can share NSIDs under some conditions. 3261 * In that case we can't use the same ns_head for namespaces 3262 * with the same NSID. 3263 */ 3264 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h)) 3265 continue; 3266 if (!list_empty(&h->list) && nvme_tryget_ns_head(h)) 3267 return h; 3268 } 3269 3270 return NULL; 3271 } 3272 3273 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys, 3274 struct nvme_ns_ids *ids) 3275 { 3276 bool has_uuid = !uuid_is_null(&ids->uuid); 3277 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid)); 3278 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 3279 struct nvme_ns_head *h; 3280 3281 lockdep_assert_held(&subsys->lock); 3282 3283 list_for_each_entry(h, &subsys->nsheads, entry) { 3284 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid)) 3285 return -EINVAL; 3286 if (has_nguid && 3287 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0) 3288 return -EINVAL; 3289 if (has_eui64 && 3290 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0) 3291 return -EINVAL; 3292 } 3293 3294 return 0; 3295 } 3296 3297 static void nvme_cdev_rel(struct device *dev) 3298 { 3299 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt)); 3300 } 3301 3302 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device) 3303 { 3304 cdev_device_del(cdev, cdev_device); 3305 put_device(cdev_device); 3306 } 3307 3308 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 3309 const struct file_operations *fops, struct module *owner) 3310 { 3311 int minor, ret; 3312 3313 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL); 3314 if (minor < 0) 3315 return minor; 3316 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor); 3317 cdev_device->class = nvme_ns_chr_class; 3318 cdev_device->release = nvme_cdev_rel; 3319 device_initialize(cdev_device); 3320 cdev_init(cdev, fops); 3321 cdev->owner = owner; 3322 ret = cdev_device_add(cdev, cdev_device); 3323 if (ret) 3324 put_device(cdev_device); 3325 3326 return ret; 3327 } 3328 3329 static int nvme_ns_chr_open(struct inode *inode, struct file *file) 3330 { 3331 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3332 } 3333 3334 static int nvme_ns_chr_release(struct inode *inode, struct file *file) 3335 { 3336 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3337 return 0; 3338 } 3339 3340 static const struct file_operations nvme_ns_chr_fops = { 3341 .owner = THIS_MODULE, 3342 .open = nvme_ns_chr_open, 3343 .release = nvme_ns_chr_release, 3344 .unlocked_ioctl = nvme_ns_chr_ioctl, 3345 .compat_ioctl = compat_ptr_ioctl, 3346 .uring_cmd = nvme_ns_chr_uring_cmd, 3347 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll, 3348 }; 3349 3350 static int nvme_add_ns_cdev(struct nvme_ns *ns) 3351 { 3352 int ret; 3353 3354 ns->cdev_device.parent = ns->ctrl->device; 3355 ret = dev_set_name(&ns->cdev_device, "ng%dn%d", 3356 ns->ctrl->instance, ns->head->instance); 3357 if (ret) 3358 return ret; 3359 3360 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops, 3361 ns->ctrl->ops->module); 3362 } 3363 3364 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 3365 struct nvme_ns_info *info) 3366 { 3367 struct nvme_ns_head *head; 3368 size_t size = sizeof(*head); 3369 int ret = -ENOMEM; 3370 3371 #ifdef CONFIG_NVME_MULTIPATH 3372 size += num_possible_nodes() * sizeof(struct nvme_ns *); 3373 #endif 3374 3375 head = kzalloc(size, GFP_KERNEL); 3376 if (!head) 3377 goto out; 3378 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL); 3379 if (ret < 0) 3380 goto out_free_head; 3381 head->instance = ret; 3382 INIT_LIST_HEAD(&head->list); 3383 ret = init_srcu_struct(&head->srcu); 3384 if (ret) 3385 goto out_ida_remove; 3386 head->subsys = ctrl->subsys; 3387 head->ns_id = info->nsid; 3388 head->ids = info->ids; 3389 head->shared = info->is_shared; 3390 kref_init(&head->ref); 3391 3392 if (head->ids.csi) { 3393 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects); 3394 if (ret) 3395 goto out_cleanup_srcu; 3396 } else 3397 head->effects = ctrl->effects; 3398 3399 ret = nvme_mpath_alloc_disk(ctrl, head); 3400 if (ret) 3401 goto out_cleanup_srcu; 3402 3403 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 3404 3405 kref_get(&ctrl->subsys->ref); 3406 3407 return head; 3408 out_cleanup_srcu: 3409 cleanup_srcu_struct(&head->srcu); 3410 out_ida_remove: 3411 ida_free(&ctrl->subsys->ns_ida, head->instance); 3412 out_free_head: 3413 kfree(head); 3414 out: 3415 if (ret > 0) 3416 ret = blk_status_to_errno(nvme_error_status(ret)); 3417 return ERR_PTR(ret); 3418 } 3419 3420 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this, 3421 struct nvme_ns_ids *ids) 3422 { 3423 struct nvme_subsystem *s; 3424 int ret = 0; 3425 3426 /* 3427 * Note that this check is racy as we try to avoid holding the global 3428 * lock over the whole ns_head creation. But it is only intended as 3429 * a sanity check anyway. 3430 */ 3431 mutex_lock(&nvme_subsystems_lock); 3432 list_for_each_entry(s, &nvme_subsystems, entry) { 3433 if (s == this) 3434 continue; 3435 mutex_lock(&s->lock); 3436 ret = nvme_subsys_check_duplicate_ids(s, ids); 3437 mutex_unlock(&s->lock); 3438 if (ret) 3439 break; 3440 } 3441 mutex_unlock(&nvme_subsystems_lock); 3442 3443 return ret; 3444 } 3445 3446 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info) 3447 { 3448 struct nvme_ctrl *ctrl = ns->ctrl; 3449 struct nvme_ns_head *head = NULL; 3450 int ret; 3451 3452 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids); 3453 if (ret) { 3454 /* 3455 * We've found two different namespaces on two different 3456 * subsystems that report the same ID. This is pretty nasty 3457 * for anything that actually requires unique device 3458 * identification. In the kernel we need this for multipathing, 3459 * and in user space the /dev/disk/by-id/ links rely on it. 3460 * 3461 * If the device also claims to be multi-path capable back off 3462 * here now and refuse the probe the second device as this is a 3463 * recipe for data corruption. If not this is probably a 3464 * cheap consumer device if on the PCIe bus, so let the user 3465 * proceed and use the shiny toy, but warn that with changing 3466 * probing order (which due to our async probing could just be 3467 * device taking longer to startup) the other device could show 3468 * up at any time. 3469 */ 3470 nvme_print_device_info(ctrl); 3471 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */ 3472 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) && 3473 info->is_shared)) { 3474 dev_err(ctrl->device, 3475 "ignoring nsid %d because of duplicate IDs\n", 3476 info->nsid); 3477 return ret; 3478 } 3479 3480 dev_err(ctrl->device, 3481 "clearing duplicate IDs for nsid %d\n", info->nsid); 3482 dev_err(ctrl->device, 3483 "use of /dev/disk/by-id/ may cause data corruption\n"); 3484 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid)); 3485 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid)); 3486 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64)); 3487 ctrl->quirks |= NVME_QUIRK_BOGUS_NID; 3488 } 3489 3490 mutex_lock(&ctrl->subsys->lock); 3491 head = nvme_find_ns_head(ctrl, info->nsid); 3492 if (!head) { 3493 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids); 3494 if (ret) { 3495 dev_err(ctrl->device, 3496 "duplicate IDs in subsystem for nsid %d\n", 3497 info->nsid); 3498 goto out_unlock; 3499 } 3500 head = nvme_alloc_ns_head(ctrl, info); 3501 if (IS_ERR(head)) { 3502 ret = PTR_ERR(head); 3503 goto out_unlock; 3504 } 3505 } else { 3506 ret = -EINVAL; 3507 if (!info->is_shared || !head->shared) { 3508 dev_err(ctrl->device, 3509 "Duplicate unshared namespace %d\n", 3510 info->nsid); 3511 goto out_put_ns_head; 3512 } 3513 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) { 3514 dev_err(ctrl->device, 3515 "IDs don't match for shared namespace %d\n", 3516 info->nsid); 3517 goto out_put_ns_head; 3518 } 3519 3520 if (!multipath) { 3521 dev_warn(ctrl->device, 3522 "Found shared namespace %d, but multipathing not supported.\n", 3523 info->nsid); 3524 dev_warn_once(ctrl->device, 3525 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0\n."); 3526 } 3527 } 3528 3529 list_add_tail_rcu(&ns->siblings, &head->list); 3530 ns->head = head; 3531 mutex_unlock(&ctrl->subsys->lock); 3532 return 0; 3533 3534 out_put_ns_head: 3535 nvme_put_ns_head(head); 3536 out_unlock: 3537 mutex_unlock(&ctrl->subsys->lock); 3538 return ret; 3539 } 3540 3541 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3542 { 3543 struct nvme_ns *ns, *ret = NULL; 3544 3545 down_read(&ctrl->namespaces_rwsem); 3546 list_for_each_entry(ns, &ctrl->namespaces, list) { 3547 if (ns->head->ns_id == nsid) { 3548 if (!nvme_get_ns(ns)) 3549 continue; 3550 ret = ns; 3551 break; 3552 } 3553 if (ns->head->ns_id > nsid) 3554 break; 3555 } 3556 up_read(&ctrl->namespaces_rwsem); 3557 return ret; 3558 } 3559 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU); 3560 3561 /* 3562 * Add the namespace to the controller list while keeping the list ordered. 3563 */ 3564 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns) 3565 { 3566 struct nvme_ns *tmp; 3567 3568 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) { 3569 if (tmp->head->ns_id < ns->head->ns_id) { 3570 list_add(&ns->list, &tmp->list); 3571 return; 3572 } 3573 } 3574 list_add(&ns->list, &ns->ctrl->namespaces); 3575 } 3576 3577 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info) 3578 { 3579 struct nvme_ns *ns; 3580 struct gendisk *disk; 3581 int node = ctrl->numa_node; 3582 3583 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 3584 if (!ns) 3585 return; 3586 3587 disk = blk_mq_alloc_disk(ctrl->tagset, ns); 3588 if (IS_ERR(disk)) 3589 goto out_free_ns; 3590 disk->fops = &nvme_bdev_ops; 3591 disk->private_data = ns; 3592 3593 ns->disk = disk; 3594 ns->queue = disk->queue; 3595 3596 if (ctrl->opts && ctrl->opts->data_digest) 3597 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue); 3598 3599 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue); 3600 if (ctrl->ops->supports_pci_p2pdma && 3601 ctrl->ops->supports_pci_p2pdma(ctrl)) 3602 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue); 3603 3604 ns->ctrl = ctrl; 3605 kref_init(&ns->kref); 3606 3607 if (nvme_init_ns_head(ns, info)) 3608 goto out_cleanup_disk; 3609 3610 /* 3611 * If multipathing is enabled, the device name for all disks and not 3612 * just those that represent shared namespaces needs to be based on the 3613 * subsystem instance. Using the controller instance for private 3614 * namespaces could lead to naming collisions between shared and private 3615 * namespaces if they don't use a common numbering scheme. 3616 * 3617 * If multipathing is not enabled, disk names must use the controller 3618 * instance as shared namespaces will show up as multiple block 3619 * devices. 3620 */ 3621 if (nvme_ns_head_multipath(ns->head)) { 3622 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance, 3623 ctrl->instance, ns->head->instance); 3624 disk->flags |= GENHD_FL_HIDDEN; 3625 } else if (multipath) { 3626 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance, 3627 ns->head->instance); 3628 } else { 3629 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, 3630 ns->head->instance); 3631 } 3632 3633 if (nvme_update_ns_info(ns, info)) 3634 goto out_unlink_ns; 3635 3636 down_write(&ctrl->namespaces_rwsem); 3637 nvme_ns_add_to_ctrl_list(ns); 3638 up_write(&ctrl->namespaces_rwsem); 3639 nvme_get_ctrl(ctrl); 3640 3641 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups)) 3642 goto out_cleanup_ns_from_list; 3643 3644 if (!nvme_ns_head_multipath(ns->head)) 3645 nvme_add_ns_cdev(ns); 3646 3647 nvme_mpath_add_disk(ns, info->anagrpid); 3648 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name); 3649 3650 return; 3651 3652 out_cleanup_ns_from_list: 3653 nvme_put_ctrl(ctrl); 3654 down_write(&ctrl->namespaces_rwsem); 3655 list_del_init(&ns->list); 3656 up_write(&ctrl->namespaces_rwsem); 3657 out_unlink_ns: 3658 mutex_lock(&ctrl->subsys->lock); 3659 list_del_rcu(&ns->siblings); 3660 if (list_empty(&ns->head->list)) 3661 list_del_init(&ns->head->entry); 3662 mutex_unlock(&ctrl->subsys->lock); 3663 nvme_put_ns_head(ns->head); 3664 out_cleanup_disk: 3665 put_disk(disk); 3666 out_free_ns: 3667 kfree(ns); 3668 } 3669 3670 static void nvme_ns_remove(struct nvme_ns *ns) 3671 { 3672 bool last_path = false; 3673 3674 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 3675 return; 3676 3677 clear_bit(NVME_NS_READY, &ns->flags); 3678 set_capacity(ns->disk, 0); 3679 nvme_fault_inject_fini(&ns->fault_inject); 3680 3681 /* 3682 * Ensure that !NVME_NS_READY is seen by other threads to prevent 3683 * this ns going back into current_path. 3684 */ 3685 synchronize_srcu(&ns->head->srcu); 3686 3687 /* wait for concurrent submissions */ 3688 if (nvme_mpath_clear_current_path(ns)) 3689 synchronize_srcu(&ns->head->srcu); 3690 3691 mutex_lock(&ns->ctrl->subsys->lock); 3692 list_del_rcu(&ns->siblings); 3693 if (list_empty(&ns->head->list)) { 3694 list_del_init(&ns->head->entry); 3695 last_path = true; 3696 } 3697 mutex_unlock(&ns->ctrl->subsys->lock); 3698 3699 /* guarantee not available in head->list */ 3700 synchronize_srcu(&ns->head->srcu); 3701 3702 if (!nvme_ns_head_multipath(ns->head)) 3703 nvme_cdev_del(&ns->cdev, &ns->cdev_device); 3704 del_gendisk(ns->disk); 3705 3706 down_write(&ns->ctrl->namespaces_rwsem); 3707 list_del_init(&ns->list); 3708 up_write(&ns->ctrl->namespaces_rwsem); 3709 3710 if (last_path) 3711 nvme_mpath_shutdown_disk(ns->head); 3712 nvme_put_ns(ns); 3713 } 3714 3715 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid) 3716 { 3717 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid); 3718 3719 if (ns) { 3720 nvme_ns_remove(ns); 3721 nvme_put_ns(ns); 3722 } 3723 } 3724 3725 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info) 3726 { 3727 int ret = NVME_SC_INVALID_NS | NVME_SC_DNR; 3728 3729 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) { 3730 dev_err(ns->ctrl->device, 3731 "identifiers changed for nsid %d\n", ns->head->ns_id); 3732 goto out; 3733 } 3734 3735 ret = nvme_update_ns_info(ns, info); 3736 out: 3737 /* 3738 * Only remove the namespace if we got a fatal error back from the 3739 * device, otherwise ignore the error and just move on. 3740 * 3741 * TODO: we should probably schedule a delayed retry here. 3742 */ 3743 if (ret > 0 && (ret & NVME_SC_DNR)) 3744 nvme_ns_remove(ns); 3745 } 3746 3747 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3748 { 3749 struct nvme_ns_info info = { .nsid = nsid }; 3750 struct nvme_ns *ns; 3751 int ret; 3752 3753 if (nvme_identify_ns_descs(ctrl, &info)) 3754 return; 3755 3756 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) { 3757 dev_warn(ctrl->device, 3758 "command set not reported for nsid: %d\n", nsid); 3759 return; 3760 } 3761 3762 /* 3763 * If available try to use the Command Set Idependent Identify Namespace 3764 * data structure to find all the generic information that is needed to 3765 * set up a namespace. If not fall back to the legacy version. 3766 */ 3767 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) || 3768 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS)) 3769 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info); 3770 else 3771 ret = nvme_ns_info_from_identify(ctrl, &info); 3772 3773 if (info.is_removed) 3774 nvme_ns_remove_by_nsid(ctrl, nsid); 3775 3776 /* 3777 * Ignore the namespace if it is not ready. We will get an AEN once it 3778 * becomes ready and restart the scan. 3779 */ 3780 if (ret || !info.is_ready) 3781 return; 3782 3783 ns = nvme_find_get_ns(ctrl, nsid); 3784 if (ns) { 3785 nvme_validate_ns(ns, &info); 3786 nvme_put_ns(ns); 3787 } else { 3788 nvme_alloc_ns(ctrl, &info); 3789 } 3790 } 3791 3792 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 3793 unsigned nsid) 3794 { 3795 struct nvme_ns *ns, *next; 3796 LIST_HEAD(rm_list); 3797 3798 down_write(&ctrl->namespaces_rwsem); 3799 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 3800 if (ns->head->ns_id > nsid) 3801 list_move_tail(&ns->list, &rm_list); 3802 } 3803 up_write(&ctrl->namespaces_rwsem); 3804 3805 list_for_each_entry_safe(ns, next, &rm_list, list) 3806 nvme_ns_remove(ns); 3807 3808 } 3809 3810 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl) 3811 { 3812 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32); 3813 __le32 *ns_list; 3814 u32 prev = 0; 3815 int ret = 0, i; 3816 3817 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 3818 if (!ns_list) 3819 return -ENOMEM; 3820 3821 for (;;) { 3822 struct nvme_command cmd = { 3823 .identify.opcode = nvme_admin_identify, 3824 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST, 3825 .identify.nsid = cpu_to_le32(prev), 3826 }; 3827 3828 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list, 3829 NVME_IDENTIFY_DATA_SIZE); 3830 if (ret) { 3831 dev_warn(ctrl->device, 3832 "Identify NS List failed (status=0x%x)\n", ret); 3833 goto free; 3834 } 3835 3836 for (i = 0; i < nr_entries; i++) { 3837 u32 nsid = le32_to_cpu(ns_list[i]); 3838 3839 if (!nsid) /* end of the list? */ 3840 goto out; 3841 nvme_scan_ns(ctrl, nsid); 3842 while (++prev < nsid) 3843 nvme_ns_remove_by_nsid(ctrl, prev); 3844 } 3845 } 3846 out: 3847 nvme_remove_invalid_namespaces(ctrl, prev); 3848 free: 3849 kfree(ns_list); 3850 return ret; 3851 } 3852 3853 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl) 3854 { 3855 struct nvme_id_ctrl *id; 3856 u32 nn, i; 3857 3858 if (nvme_identify_ctrl(ctrl, &id)) 3859 return; 3860 nn = le32_to_cpu(id->nn); 3861 kfree(id); 3862 3863 for (i = 1; i <= nn; i++) 3864 nvme_scan_ns(ctrl, i); 3865 3866 nvme_remove_invalid_namespaces(ctrl, nn); 3867 } 3868 3869 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 3870 { 3871 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 3872 __le32 *log; 3873 int error; 3874 3875 log = kzalloc(log_size, GFP_KERNEL); 3876 if (!log) 3877 return; 3878 3879 /* 3880 * We need to read the log to clear the AEN, but we don't want to rely 3881 * on it for the changed namespace information as userspace could have 3882 * raced with us in reading the log page, which could cause us to miss 3883 * updates. 3884 */ 3885 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, 3886 NVME_CSI_NVM, log, log_size, 0); 3887 if (error) 3888 dev_warn(ctrl->device, 3889 "reading changed ns log failed: %d\n", error); 3890 3891 kfree(log); 3892 } 3893 3894 static void nvme_scan_work(struct work_struct *work) 3895 { 3896 struct nvme_ctrl *ctrl = 3897 container_of(work, struct nvme_ctrl, scan_work); 3898 int ret; 3899 3900 /* No tagset on a live ctrl means IO queues could not created */ 3901 if (ctrl->state != NVME_CTRL_LIVE || !ctrl->tagset) 3902 return; 3903 3904 /* 3905 * Identify controller limits can change at controller reset due to 3906 * new firmware download, even though it is not common we cannot ignore 3907 * such scenario. Controller's non-mdts limits are reported in the unit 3908 * of logical blocks that is dependent on the format of attached 3909 * namespace. Hence re-read the limits at the time of ns allocation. 3910 */ 3911 ret = nvme_init_non_mdts_limits(ctrl); 3912 if (ret < 0) { 3913 dev_warn(ctrl->device, 3914 "reading non-mdts-limits failed: %d\n", ret); 3915 return; 3916 } 3917 3918 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 3919 dev_info(ctrl->device, "rescanning namespaces.\n"); 3920 nvme_clear_changed_ns_log(ctrl); 3921 } 3922 3923 mutex_lock(&ctrl->scan_lock); 3924 if (nvme_ctrl_limited_cns(ctrl)) { 3925 nvme_scan_ns_sequential(ctrl); 3926 } else { 3927 /* 3928 * Fall back to sequential scan if DNR is set to handle broken 3929 * devices which should support Identify NS List (as per the VS 3930 * they report) but don't actually support it. 3931 */ 3932 ret = nvme_scan_ns_list(ctrl); 3933 if (ret > 0 && ret & NVME_SC_DNR) 3934 nvme_scan_ns_sequential(ctrl); 3935 } 3936 mutex_unlock(&ctrl->scan_lock); 3937 } 3938 3939 /* 3940 * This function iterates the namespace list unlocked to allow recovery from 3941 * controller failure. It is up to the caller to ensure the namespace list is 3942 * not modified by scan work while this function is executing. 3943 */ 3944 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 3945 { 3946 struct nvme_ns *ns, *next; 3947 LIST_HEAD(ns_list); 3948 3949 /* 3950 * make sure to requeue I/O to all namespaces as these 3951 * might result from the scan itself and must complete 3952 * for the scan_work to make progress 3953 */ 3954 nvme_mpath_clear_ctrl_paths(ctrl); 3955 3956 /* 3957 * Unquiesce io queues so any pending IO won't hang, especially 3958 * those submitted from scan work 3959 */ 3960 nvme_unquiesce_io_queues(ctrl); 3961 3962 /* prevent racing with ns scanning */ 3963 flush_work(&ctrl->scan_work); 3964 3965 /* 3966 * The dead states indicates the controller was not gracefully 3967 * disconnected. In that case, we won't be able to flush any data while 3968 * removing the namespaces' disks; fail all the queues now to avoid 3969 * potentially having to clean up the failed sync later. 3970 */ 3971 if (ctrl->state == NVME_CTRL_DEAD) 3972 nvme_mark_namespaces_dead(ctrl); 3973 3974 /* this is a no-op when called from the controller reset handler */ 3975 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO); 3976 3977 down_write(&ctrl->namespaces_rwsem); 3978 list_splice_init(&ctrl->namespaces, &ns_list); 3979 up_write(&ctrl->namespaces_rwsem); 3980 3981 list_for_each_entry_safe(ns, next, &ns_list, list) 3982 nvme_ns_remove(ns); 3983 } 3984 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 3985 3986 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env) 3987 { 3988 const struct nvme_ctrl *ctrl = 3989 container_of(dev, struct nvme_ctrl, ctrl_device); 3990 struct nvmf_ctrl_options *opts = ctrl->opts; 3991 int ret; 3992 3993 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name); 3994 if (ret) 3995 return ret; 3996 3997 if (opts) { 3998 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr); 3999 if (ret) 4000 return ret; 4001 4002 ret = add_uevent_var(env, "NVME_TRSVCID=%s", 4003 opts->trsvcid ?: "none"); 4004 if (ret) 4005 return ret; 4006 4007 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s", 4008 opts->host_traddr ?: "none"); 4009 if (ret) 4010 return ret; 4011 4012 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s", 4013 opts->host_iface ?: "none"); 4014 } 4015 return ret; 4016 } 4017 4018 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata) 4019 { 4020 char *envp[2] = { envdata, NULL }; 4021 4022 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4023 } 4024 4025 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 4026 { 4027 char *envp[2] = { NULL, NULL }; 4028 u32 aen_result = ctrl->aen_result; 4029 4030 ctrl->aen_result = 0; 4031 if (!aen_result) 4032 return; 4033 4034 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 4035 if (!envp[0]) 4036 return; 4037 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4038 kfree(envp[0]); 4039 } 4040 4041 static void nvme_async_event_work(struct work_struct *work) 4042 { 4043 struct nvme_ctrl *ctrl = 4044 container_of(work, struct nvme_ctrl, async_event_work); 4045 4046 nvme_aen_uevent(ctrl); 4047 4048 /* 4049 * The transport drivers must guarantee AER submission here is safe by 4050 * flushing ctrl async_event_work after changing the controller state 4051 * from LIVE and before freeing the admin queue. 4052 */ 4053 if (ctrl->state == NVME_CTRL_LIVE) 4054 ctrl->ops->submit_async_event(ctrl); 4055 } 4056 4057 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 4058 { 4059 4060 u32 csts; 4061 4062 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 4063 return false; 4064 4065 if (csts == ~0) 4066 return false; 4067 4068 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 4069 } 4070 4071 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 4072 { 4073 struct nvme_fw_slot_info_log *log; 4074 4075 log = kmalloc(sizeof(*log), GFP_KERNEL); 4076 if (!log) 4077 return; 4078 4079 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM, 4080 log, sizeof(*log), 0)) { 4081 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 4082 goto out_free_log; 4083 } 4084 4085 if (log->afi & 0x70 || !(log->afi & 0x7)) { 4086 dev_info(ctrl->device, 4087 "Firmware is activated after next Controller Level Reset\n"); 4088 goto out_free_log; 4089 } 4090 4091 memcpy(ctrl->subsys->firmware_rev, &log->frs[(log->afi & 0x7) - 1], 4092 sizeof(ctrl->subsys->firmware_rev)); 4093 4094 out_free_log: 4095 kfree(log); 4096 } 4097 4098 static void nvme_fw_act_work(struct work_struct *work) 4099 { 4100 struct nvme_ctrl *ctrl = container_of(work, 4101 struct nvme_ctrl, fw_act_work); 4102 unsigned long fw_act_timeout; 4103 4104 if (ctrl->mtfa) 4105 fw_act_timeout = jiffies + 4106 msecs_to_jiffies(ctrl->mtfa * 100); 4107 else 4108 fw_act_timeout = jiffies + 4109 msecs_to_jiffies(admin_timeout * 1000); 4110 4111 nvme_quiesce_io_queues(ctrl); 4112 while (nvme_ctrl_pp_status(ctrl)) { 4113 if (time_after(jiffies, fw_act_timeout)) { 4114 dev_warn(ctrl->device, 4115 "Fw activation timeout, reset controller\n"); 4116 nvme_try_sched_reset(ctrl); 4117 return; 4118 } 4119 msleep(100); 4120 } 4121 4122 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE)) 4123 return; 4124 4125 nvme_unquiesce_io_queues(ctrl); 4126 /* read FW slot information to clear the AER */ 4127 nvme_get_fw_slot_info(ctrl); 4128 4129 queue_work(nvme_wq, &ctrl->async_event_work); 4130 } 4131 4132 static u32 nvme_aer_type(u32 result) 4133 { 4134 return result & 0x7; 4135 } 4136 4137 static u32 nvme_aer_subtype(u32 result) 4138 { 4139 return (result & 0xff00) >> 8; 4140 } 4141 4142 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 4143 { 4144 u32 aer_notice_type = nvme_aer_subtype(result); 4145 bool requeue = true; 4146 4147 switch (aer_notice_type) { 4148 case NVME_AER_NOTICE_NS_CHANGED: 4149 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 4150 nvme_queue_scan(ctrl); 4151 break; 4152 case NVME_AER_NOTICE_FW_ACT_STARTING: 4153 /* 4154 * We are (ab)using the RESETTING state to prevent subsequent 4155 * recovery actions from interfering with the controller's 4156 * firmware activation. 4157 */ 4158 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) { 4159 nvme_auth_stop(ctrl); 4160 requeue = false; 4161 queue_work(nvme_wq, &ctrl->fw_act_work); 4162 } 4163 break; 4164 #ifdef CONFIG_NVME_MULTIPATH 4165 case NVME_AER_NOTICE_ANA: 4166 if (!ctrl->ana_log_buf) 4167 break; 4168 queue_work(nvme_wq, &ctrl->ana_work); 4169 break; 4170 #endif 4171 case NVME_AER_NOTICE_DISC_CHANGED: 4172 ctrl->aen_result = result; 4173 break; 4174 default: 4175 dev_warn(ctrl->device, "async event result %08x\n", result); 4176 } 4177 return requeue; 4178 } 4179 4180 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl) 4181 { 4182 dev_warn(ctrl->device, "resetting controller due to AER\n"); 4183 nvme_reset_ctrl(ctrl); 4184 } 4185 4186 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 4187 volatile union nvme_result *res) 4188 { 4189 u32 result = le32_to_cpu(res->u32); 4190 u32 aer_type = nvme_aer_type(result); 4191 u32 aer_subtype = nvme_aer_subtype(result); 4192 bool requeue = true; 4193 4194 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 4195 return; 4196 4197 trace_nvme_async_event(ctrl, result); 4198 switch (aer_type) { 4199 case NVME_AER_NOTICE: 4200 requeue = nvme_handle_aen_notice(ctrl, result); 4201 break; 4202 case NVME_AER_ERROR: 4203 /* 4204 * For a persistent internal error, don't run async_event_work 4205 * to submit a new AER. The controller reset will do it. 4206 */ 4207 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) { 4208 nvme_handle_aer_persistent_error(ctrl); 4209 return; 4210 } 4211 fallthrough; 4212 case NVME_AER_SMART: 4213 case NVME_AER_CSS: 4214 case NVME_AER_VS: 4215 ctrl->aen_result = result; 4216 break; 4217 default: 4218 break; 4219 } 4220 4221 if (requeue) 4222 queue_work(nvme_wq, &ctrl->async_event_work); 4223 } 4224 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 4225 4226 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4227 const struct blk_mq_ops *ops, unsigned int cmd_size) 4228 { 4229 int ret; 4230 4231 memset(set, 0, sizeof(*set)); 4232 set->ops = ops; 4233 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 4234 if (ctrl->ops->flags & NVME_F_FABRICS) 4235 set->reserved_tags = NVMF_RESERVED_TAGS; 4236 set->numa_node = ctrl->numa_node; 4237 set->flags = BLK_MQ_F_NO_SCHED; 4238 if (ctrl->ops->flags & NVME_F_BLOCKING) 4239 set->flags |= BLK_MQ_F_BLOCKING; 4240 set->cmd_size = cmd_size; 4241 set->driver_data = ctrl; 4242 set->nr_hw_queues = 1; 4243 set->timeout = NVME_ADMIN_TIMEOUT; 4244 ret = blk_mq_alloc_tag_set(set); 4245 if (ret) 4246 return ret; 4247 4248 ctrl->admin_q = blk_mq_init_queue(set); 4249 if (IS_ERR(ctrl->admin_q)) { 4250 ret = PTR_ERR(ctrl->admin_q); 4251 goto out_free_tagset; 4252 } 4253 4254 if (ctrl->ops->flags & NVME_F_FABRICS) { 4255 ctrl->fabrics_q = blk_mq_init_queue(set); 4256 if (IS_ERR(ctrl->fabrics_q)) { 4257 ret = PTR_ERR(ctrl->fabrics_q); 4258 goto out_cleanup_admin_q; 4259 } 4260 } 4261 4262 ctrl->admin_tagset = set; 4263 return 0; 4264 4265 out_cleanup_admin_q: 4266 blk_mq_destroy_queue(ctrl->admin_q); 4267 blk_put_queue(ctrl->admin_q); 4268 out_free_tagset: 4269 blk_mq_free_tag_set(set); 4270 ctrl->admin_q = NULL; 4271 ctrl->fabrics_q = NULL; 4272 return ret; 4273 } 4274 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set); 4275 4276 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl) 4277 { 4278 blk_mq_destroy_queue(ctrl->admin_q); 4279 blk_put_queue(ctrl->admin_q); 4280 if (ctrl->ops->flags & NVME_F_FABRICS) { 4281 blk_mq_destroy_queue(ctrl->fabrics_q); 4282 blk_put_queue(ctrl->fabrics_q); 4283 } 4284 blk_mq_free_tag_set(ctrl->admin_tagset); 4285 } 4286 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set); 4287 4288 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4289 const struct blk_mq_ops *ops, unsigned int nr_maps, 4290 unsigned int cmd_size) 4291 { 4292 int ret; 4293 4294 memset(set, 0, sizeof(*set)); 4295 set->ops = ops; 4296 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1); 4297 /* 4298 * Some Apple controllers requires tags to be unique across admin and 4299 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue. 4300 */ 4301 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS) 4302 set->reserved_tags = NVME_AQ_DEPTH; 4303 else if (ctrl->ops->flags & NVME_F_FABRICS) 4304 set->reserved_tags = NVMF_RESERVED_TAGS; 4305 set->numa_node = ctrl->numa_node; 4306 set->flags = BLK_MQ_F_SHOULD_MERGE; 4307 if (ctrl->ops->flags & NVME_F_BLOCKING) 4308 set->flags |= BLK_MQ_F_BLOCKING; 4309 set->cmd_size = cmd_size, 4310 set->driver_data = ctrl; 4311 set->nr_hw_queues = ctrl->queue_count - 1; 4312 set->timeout = NVME_IO_TIMEOUT; 4313 set->nr_maps = nr_maps; 4314 ret = blk_mq_alloc_tag_set(set); 4315 if (ret) 4316 return ret; 4317 4318 if (ctrl->ops->flags & NVME_F_FABRICS) { 4319 ctrl->connect_q = blk_mq_init_queue(set); 4320 if (IS_ERR(ctrl->connect_q)) { 4321 ret = PTR_ERR(ctrl->connect_q); 4322 goto out_free_tag_set; 4323 } 4324 blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE, 4325 ctrl->connect_q); 4326 } 4327 4328 ctrl->tagset = set; 4329 return 0; 4330 4331 out_free_tag_set: 4332 blk_mq_free_tag_set(set); 4333 ctrl->connect_q = NULL; 4334 return ret; 4335 } 4336 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set); 4337 4338 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl) 4339 { 4340 if (ctrl->ops->flags & NVME_F_FABRICS) { 4341 blk_mq_destroy_queue(ctrl->connect_q); 4342 blk_put_queue(ctrl->connect_q); 4343 } 4344 blk_mq_free_tag_set(ctrl->tagset); 4345 } 4346 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set); 4347 4348 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 4349 { 4350 nvme_mpath_stop(ctrl); 4351 nvme_auth_stop(ctrl); 4352 nvme_stop_failfast_work(ctrl); 4353 flush_work(&ctrl->async_event_work); 4354 cancel_work_sync(&ctrl->fw_act_work); 4355 if (ctrl->ops->stop_ctrl) 4356 ctrl->ops->stop_ctrl(ctrl); 4357 } 4358 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 4359 4360 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 4361 { 4362 nvme_enable_aen(ctrl); 4363 4364 /* 4365 * persistent discovery controllers need to send indication to userspace 4366 * to re-read the discovery log page to learn about possible changes 4367 * that were missed. We identify persistent discovery controllers by 4368 * checking that they started once before, hence are reconnecting back. 4369 */ 4370 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) && 4371 nvme_discovery_ctrl(ctrl)) 4372 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover"); 4373 4374 if (ctrl->queue_count > 1) { 4375 nvme_queue_scan(ctrl); 4376 nvme_unquiesce_io_queues(ctrl); 4377 nvme_mpath_update(ctrl); 4378 } 4379 4380 nvme_change_uevent(ctrl, "NVME_EVENT=connected"); 4381 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags); 4382 } 4383 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 4384 4385 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 4386 { 4387 nvme_hwmon_exit(ctrl); 4388 nvme_fault_inject_fini(&ctrl->fault_inject); 4389 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4390 cdev_device_del(&ctrl->cdev, ctrl->device); 4391 nvme_put_ctrl(ctrl); 4392 } 4393 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 4394 4395 static void nvme_free_cels(struct nvme_ctrl *ctrl) 4396 { 4397 struct nvme_effects_log *cel; 4398 unsigned long i; 4399 4400 xa_for_each(&ctrl->cels, i, cel) { 4401 xa_erase(&ctrl->cels, i); 4402 kfree(cel); 4403 } 4404 4405 xa_destroy(&ctrl->cels); 4406 } 4407 4408 static void nvme_free_ctrl(struct device *dev) 4409 { 4410 struct nvme_ctrl *ctrl = 4411 container_of(dev, struct nvme_ctrl, ctrl_device); 4412 struct nvme_subsystem *subsys = ctrl->subsys; 4413 4414 if (!subsys || ctrl->instance != subsys->instance) 4415 ida_free(&nvme_instance_ida, ctrl->instance); 4416 key_put(ctrl->tls_key); 4417 nvme_free_cels(ctrl); 4418 nvme_mpath_uninit(ctrl); 4419 nvme_auth_stop(ctrl); 4420 nvme_auth_free(ctrl); 4421 __free_page(ctrl->discard_page); 4422 free_opal_dev(ctrl->opal_dev); 4423 4424 if (subsys) { 4425 mutex_lock(&nvme_subsystems_lock); 4426 list_del(&ctrl->subsys_entry); 4427 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 4428 mutex_unlock(&nvme_subsystems_lock); 4429 } 4430 4431 ctrl->ops->free_ctrl(ctrl); 4432 4433 if (subsys) 4434 nvme_put_subsystem(subsys); 4435 } 4436 4437 /* 4438 * Initialize a NVMe controller structures. This needs to be called during 4439 * earliest initialization so that we have the initialized structured around 4440 * during probing. 4441 */ 4442 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 4443 const struct nvme_ctrl_ops *ops, unsigned long quirks) 4444 { 4445 int ret; 4446 4447 ctrl->state = NVME_CTRL_NEW; 4448 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 4449 spin_lock_init(&ctrl->lock); 4450 mutex_init(&ctrl->scan_lock); 4451 INIT_LIST_HEAD(&ctrl->namespaces); 4452 xa_init(&ctrl->cels); 4453 init_rwsem(&ctrl->namespaces_rwsem); 4454 ctrl->dev = dev; 4455 ctrl->ops = ops; 4456 ctrl->quirks = quirks; 4457 ctrl->numa_node = NUMA_NO_NODE; 4458 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 4459 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 4460 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 4461 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 4462 init_waitqueue_head(&ctrl->state_wq); 4463 4464 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 4465 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work); 4466 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 4467 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 4468 4469 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 4470 PAGE_SIZE); 4471 ctrl->discard_page = alloc_page(GFP_KERNEL); 4472 if (!ctrl->discard_page) { 4473 ret = -ENOMEM; 4474 goto out; 4475 } 4476 4477 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL); 4478 if (ret < 0) 4479 goto out; 4480 ctrl->instance = ret; 4481 4482 device_initialize(&ctrl->ctrl_device); 4483 ctrl->device = &ctrl->ctrl_device; 4484 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt), 4485 ctrl->instance); 4486 ctrl->device->class = nvme_class; 4487 ctrl->device->parent = ctrl->dev; 4488 if (ops->dev_attr_groups) 4489 ctrl->device->groups = ops->dev_attr_groups; 4490 else 4491 ctrl->device->groups = nvme_dev_attr_groups; 4492 ctrl->device->release = nvme_free_ctrl; 4493 dev_set_drvdata(ctrl->device, ctrl); 4494 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 4495 if (ret) 4496 goto out_release_instance; 4497 4498 nvme_get_ctrl(ctrl); 4499 cdev_init(&ctrl->cdev, &nvme_dev_fops); 4500 ctrl->cdev.owner = ops->module; 4501 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 4502 if (ret) 4503 goto out_free_name; 4504 4505 /* 4506 * Initialize latency tolerance controls. The sysfs files won't 4507 * be visible to userspace unless the device actually supports APST. 4508 */ 4509 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 4510 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 4511 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 4512 4513 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device)); 4514 nvme_mpath_init_ctrl(ctrl); 4515 ret = nvme_auth_init_ctrl(ctrl); 4516 if (ret) 4517 goto out_free_cdev; 4518 4519 return 0; 4520 out_free_cdev: 4521 nvme_fault_inject_fini(&ctrl->fault_inject); 4522 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4523 cdev_device_del(&ctrl->cdev, ctrl->device); 4524 out_free_name: 4525 nvme_put_ctrl(ctrl); 4526 kfree_const(ctrl->device->kobj.name); 4527 out_release_instance: 4528 ida_free(&nvme_instance_ida, ctrl->instance); 4529 out: 4530 if (ctrl->discard_page) 4531 __free_page(ctrl->discard_page); 4532 return ret; 4533 } 4534 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 4535 4536 /* let I/O to all namespaces fail in preparation for surprise removal */ 4537 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl) 4538 { 4539 struct nvme_ns *ns; 4540 4541 down_read(&ctrl->namespaces_rwsem); 4542 list_for_each_entry(ns, &ctrl->namespaces, list) 4543 blk_mark_disk_dead(ns->disk); 4544 up_read(&ctrl->namespaces_rwsem); 4545 } 4546 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead); 4547 4548 void nvme_unfreeze(struct nvme_ctrl *ctrl) 4549 { 4550 struct nvme_ns *ns; 4551 4552 down_read(&ctrl->namespaces_rwsem); 4553 list_for_each_entry(ns, &ctrl->namespaces, list) 4554 blk_mq_unfreeze_queue(ns->queue); 4555 up_read(&ctrl->namespaces_rwsem); 4556 } 4557 EXPORT_SYMBOL_GPL(nvme_unfreeze); 4558 4559 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 4560 { 4561 struct nvme_ns *ns; 4562 4563 down_read(&ctrl->namespaces_rwsem); 4564 list_for_each_entry(ns, &ctrl->namespaces, list) { 4565 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 4566 if (timeout <= 0) 4567 break; 4568 } 4569 up_read(&ctrl->namespaces_rwsem); 4570 return timeout; 4571 } 4572 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 4573 4574 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 4575 { 4576 struct nvme_ns *ns; 4577 4578 down_read(&ctrl->namespaces_rwsem); 4579 list_for_each_entry(ns, &ctrl->namespaces, list) 4580 blk_mq_freeze_queue_wait(ns->queue); 4581 up_read(&ctrl->namespaces_rwsem); 4582 } 4583 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 4584 4585 void nvme_start_freeze(struct nvme_ctrl *ctrl) 4586 { 4587 struct nvme_ns *ns; 4588 4589 down_read(&ctrl->namespaces_rwsem); 4590 list_for_each_entry(ns, &ctrl->namespaces, list) 4591 blk_freeze_queue_start(ns->queue); 4592 up_read(&ctrl->namespaces_rwsem); 4593 } 4594 EXPORT_SYMBOL_GPL(nvme_start_freeze); 4595 4596 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl) 4597 { 4598 if (!ctrl->tagset) 4599 return; 4600 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4601 blk_mq_quiesce_tagset(ctrl->tagset); 4602 else 4603 blk_mq_wait_quiesce_done(ctrl->tagset); 4604 } 4605 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues); 4606 4607 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl) 4608 { 4609 if (!ctrl->tagset) 4610 return; 4611 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4612 blk_mq_unquiesce_tagset(ctrl->tagset); 4613 } 4614 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues); 4615 4616 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl) 4617 { 4618 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4619 blk_mq_quiesce_queue(ctrl->admin_q); 4620 else 4621 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set); 4622 } 4623 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue); 4624 4625 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl) 4626 { 4627 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4628 blk_mq_unquiesce_queue(ctrl->admin_q); 4629 } 4630 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue); 4631 4632 void nvme_sync_io_queues(struct nvme_ctrl *ctrl) 4633 { 4634 struct nvme_ns *ns; 4635 4636 down_read(&ctrl->namespaces_rwsem); 4637 list_for_each_entry(ns, &ctrl->namespaces, list) 4638 blk_sync_queue(ns->queue); 4639 up_read(&ctrl->namespaces_rwsem); 4640 } 4641 EXPORT_SYMBOL_GPL(nvme_sync_io_queues); 4642 4643 void nvme_sync_queues(struct nvme_ctrl *ctrl) 4644 { 4645 nvme_sync_io_queues(ctrl); 4646 if (ctrl->admin_q) 4647 blk_sync_queue(ctrl->admin_q); 4648 } 4649 EXPORT_SYMBOL_GPL(nvme_sync_queues); 4650 4651 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file) 4652 { 4653 if (file->f_op != &nvme_dev_fops) 4654 return NULL; 4655 return file->private_data; 4656 } 4657 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU); 4658 4659 /* 4660 * Check we didn't inadvertently grow the command structure sizes: 4661 */ 4662 static inline void _nvme_check_size(void) 4663 { 4664 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64); 4665 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 4666 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64); 4667 BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 4668 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64); 4669 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 4670 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64); 4671 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64); 4672 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 4673 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64); 4674 BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 4675 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE); 4676 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE); 4677 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) != 4678 NVME_IDENTIFY_DATA_SIZE); 4679 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE); 4680 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE); 4681 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE); 4682 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE); 4683 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 4684 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 4685 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 4686 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64); 4687 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512); 4688 } 4689 4690 4691 static int __init nvme_core_init(void) 4692 { 4693 int result = -ENOMEM; 4694 4695 _nvme_check_size(); 4696 4697 nvme_wq = alloc_workqueue("nvme-wq", 4698 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4699 if (!nvme_wq) 4700 goto out; 4701 4702 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", 4703 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4704 if (!nvme_reset_wq) 4705 goto destroy_wq; 4706 4707 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", 4708 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4709 if (!nvme_delete_wq) 4710 goto destroy_reset_wq; 4711 4712 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0, 4713 NVME_MINORS, "nvme"); 4714 if (result < 0) 4715 goto destroy_delete_wq; 4716 4717 nvme_class = class_create("nvme"); 4718 if (IS_ERR(nvme_class)) { 4719 result = PTR_ERR(nvme_class); 4720 goto unregister_chrdev; 4721 } 4722 nvme_class->dev_uevent = nvme_class_uevent; 4723 4724 nvme_subsys_class = class_create("nvme-subsystem"); 4725 if (IS_ERR(nvme_subsys_class)) { 4726 result = PTR_ERR(nvme_subsys_class); 4727 goto destroy_class; 4728 } 4729 4730 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS, 4731 "nvme-generic"); 4732 if (result < 0) 4733 goto destroy_subsys_class; 4734 4735 nvme_ns_chr_class = class_create("nvme-generic"); 4736 if (IS_ERR(nvme_ns_chr_class)) { 4737 result = PTR_ERR(nvme_ns_chr_class); 4738 goto unregister_generic_ns; 4739 } 4740 result = nvme_keyring_init(); 4741 if (result) 4742 goto destroy_ns_chr; 4743 result = nvme_init_auth(); 4744 if (result) 4745 goto keyring_exit; 4746 return 0; 4747 4748 keyring_exit: 4749 nvme_keyring_exit(); 4750 destroy_ns_chr: 4751 class_destroy(nvme_ns_chr_class); 4752 unregister_generic_ns: 4753 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4754 destroy_subsys_class: 4755 class_destroy(nvme_subsys_class); 4756 destroy_class: 4757 class_destroy(nvme_class); 4758 unregister_chrdev: 4759 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4760 destroy_delete_wq: 4761 destroy_workqueue(nvme_delete_wq); 4762 destroy_reset_wq: 4763 destroy_workqueue(nvme_reset_wq); 4764 destroy_wq: 4765 destroy_workqueue(nvme_wq); 4766 out: 4767 return result; 4768 } 4769 4770 static void __exit nvme_core_exit(void) 4771 { 4772 nvme_exit_auth(); 4773 nvme_keyring_exit(); 4774 class_destroy(nvme_ns_chr_class); 4775 class_destroy(nvme_subsys_class); 4776 class_destroy(nvme_class); 4777 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4778 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4779 destroy_workqueue(nvme_delete_wq); 4780 destroy_workqueue(nvme_reset_wq); 4781 destroy_workqueue(nvme_wq); 4782 ida_destroy(&nvme_ns_chr_minor_ida); 4783 ida_destroy(&nvme_instance_ida); 4784 } 4785 4786 MODULE_LICENSE("GPL"); 4787 MODULE_VERSION("1.0"); 4788 module_init(nvme_core_init); 4789 module_exit(nvme_core_exit); 4790