1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVM Express device driver 4 * Copyright (c) 2011-2014, Intel Corporation. 5 */ 6 7 #include <linux/blkdev.h> 8 #include <linux/blk-mq.h> 9 #include <linux/blk-integrity.h> 10 #include <linux/compat.h> 11 #include <linux/delay.h> 12 #include <linux/errno.h> 13 #include <linux/hdreg.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/backing-dev.h> 17 #include <linux/slab.h> 18 #include <linux/types.h> 19 #include <linux/pr.h> 20 #include <linux/ptrace.h> 21 #include <linux/nvme_ioctl.h> 22 #include <linux/pm_qos.h> 23 #include <linux/ratelimit.h> 24 #include <asm/unaligned.h> 25 26 #include "nvme.h" 27 #include "fabrics.h" 28 #include <linux/nvme-auth.h> 29 30 #define CREATE_TRACE_POINTS 31 #include "trace.h" 32 33 #define NVME_MINORS (1U << MINORBITS) 34 35 struct nvme_ns_info { 36 struct nvme_ns_ids ids; 37 u32 nsid; 38 __le32 anagrpid; 39 bool is_shared; 40 bool is_readonly; 41 bool is_ready; 42 bool is_removed; 43 }; 44 45 unsigned int admin_timeout = 60; 46 module_param(admin_timeout, uint, 0644); 47 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 48 EXPORT_SYMBOL_GPL(admin_timeout); 49 50 unsigned int nvme_io_timeout = 30; 51 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 52 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 53 EXPORT_SYMBOL_GPL(nvme_io_timeout); 54 55 static unsigned char shutdown_timeout = 5; 56 module_param(shutdown_timeout, byte, 0644); 57 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 58 59 static u8 nvme_max_retries = 5; 60 module_param_named(max_retries, nvme_max_retries, byte, 0644); 61 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 62 63 static unsigned long default_ps_max_latency_us = 100000; 64 module_param(default_ps_max_latency_us, ulong, 0644); 65 MODULE_PARM_DESC(default_ps_max_latency_us, 66 "max power saving latency for new devices; use PM QOS to change per device"); 67 68 static bool force_apst; 69 module_param(force_apst, bool, 0644); 70 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 71 72 static unsigned long apst_primary_timeout_ms = 100; 73 module_param(apst_primary_timeout_ms, ulong, 0644); 74 MODULE_PARM_DESC(apst_primary_timeout_ms, 75 "primary APST timeout in ms"); 76 77 static unsigned long apst_secondary_timeout_ms = 2000; 78 module_param(apst_secondary_timeout_ms, ulong, 0644); 79 MODULE_PARM_DESC(apst_secondary_timeout_ms, 80 "secondary APST timeout in ms"); 81 82 static unsigned long apst_primary_latency_tol_us = 15000; 83 module_param(apst_primary_latency_tol_us, ulong, 0644); 84 MODULE_PARM_DESC(apst_primary_latency_tol_us, 85 "primary APST latency tolerance in us"); 86 87 static unsigned long apst_secondary_latency_tol_us = 100000; 88 module_param(apst_secondary_latency_tol_us, ulong, 0644); 89 MODULE_PARM_DESC(apst_secondary_latency_tol_us, 90 "secondary APST latency tolerance in us"); 91 92 /* 93 * nvme_wq - hosts nvme related works that are not reset or delete 94 * nvme_reset_wq - hosts nvme reset works 95 * nvme_delete_wq - hosts nvme delete works 96 * 97 * nvme_wq will host works such as scan, aen handling, fw activation, 98 * keep-alive, periodic reconnects etc. nvme_reset_wq 99 * runs reset works which also flush works hosted on nvme_wq for 100 * serialization purposes. nvme_delete_wq host controller deletion 101 * works which flush reset works for serialization. 102 */ 103 struct workqueue_struct *nvme_wq; 104 EXPORT_SYMBOL_GPL(nvme_wq); 105 106 struct workqueue_struct *nvme_reset_wq; 107 EXPORT_SYMBOL_GPL(nvme_reset_wq); 108 109 struct workqueue_struct *nvme_delete_wq; 110 EXPORT_SYMBOL_GPL(nvme_delete_wq); 111 112 static LIST_HEAD(nvme_subsystems); 113 static DEFINE_MUTEX(nvme_subsystems_lock); 114 115 static DEFINE_IDA(nvme_instance_ida); 116 static dev_t nvme_ctrl_base_chr_devt; 117 static struct class *nvme_class; 118 static struct class *nvme_subsys_class; 119 120 static DEFINE_IDA(nvme_ns_chr_minor_ida); 121 static dev_t nvme_ns_chr_devt; 122 static struct class *nvme_ns_chr_class; 123 124 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 125 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 126 unsigned nsid); 127 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 128 struct nvme_command *cmd); 129 130 void nvme_queue_scan(struct nvme_ctrl *ctrl) 131 { 132 /* 133 * Only new queue scan work when admin and IO queues are both alive 134 */ 135 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset) 136 queue_work(nvme_wq, &ctrl->scan_work); 137 } 138 139 /* 140 * Use this function to proceed with scheduling reset_work for a controller 141 * that had previously been set to the resetting state. This is intended for 142 * code paths that can't be interrupted by other reset attempts. A hot removal 143 * may prevent this from succeeding. 144 */ 145 int nvme_try_sched_reset(struct nvme_ctrl *ctrl) 146 { 147 if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING) 148 return -EBUSY; 149 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 150 return -EBUSY; 151 return 0; 152 } 153 EXPORT_SYMBOL_GPL(nvme_try_sched_reset); 154 155 static void nvme_failfast_work(struct work_struct *work) 156 { 157 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 158 struct nvme_ctrl, failfast_work); 159 160 if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING) 161 return; 162 163 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 164 dev_info(ctrl->device, "failfast expired\n"); 165 nvme_kick_requeue_lists(ctrl); 166 } 167 168 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl) 169 { 170 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1) 171 return; 172 173 schedule_delayed_work(&ctrl->failfast_work, 174 ctrl->opts->fast_io_fail_tmo * HZ); 175 } 176 177 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl) 178 { 179 if (!ctrl->opts) 180 return; 181 182 cancel_delayed_work_sync(&ctrl->failfast_work); 183 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 184 } 185 186 187 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 188 { 189 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 190 return -EBUSY; 191 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 192 return -EBUSY; 193 return 0; 194 } 195 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 196 197 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 198 { 199 int ret; 200 201 ret = nvme_reset_ctrl(ctrl); 202 if (!ret) { 203 flush_work(&ctrl->reset_work); 204 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE) 205 ret = -ENETRESET; 206 } 207 208 return ret; 209 } 210 211 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl) 212 { 213 dev_info(ctrl->device, 214 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl)); 215 216 flush_work(&ctrl->reset_work); 217 nvme_stop_ctrl(ctrl); 218 nvme_remove_namespaces(ctrl); 219 ctrl->ops->delete_ctrl(ctrl); 220 nvme_uninit_ctrl(ctrl); 221 } 222 223 static void nvme_delete_ctrl_work(struct work_struct *work) 224 { 225 struct nvme_ctrl *ctrl = 226 container_of(work, struct nvme_ctrl, delete_work); 227 228 nvme_do_delete_ctrl(ctrl); 229 } 230 231 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 232 { 233 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 234 return -EBUSY; 235 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 236 return -EBUSY; 237 return 0; 238 } 239 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 240 241 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 242 { 243 /* 244 * Keep a reference until nvme_do_delete_ctrl() complete, 245 * since ->delete_ctrl can free the controller. 246 */ 247 nvme_get_ctrl(ctrl); 248 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 249 nvme_do_delete_ctrl(ctrl); 250 nvme_put_ctrl(ctrl); 251 } 252 253 static blk_status_t nvme_error_status(u16 status) 254 { 255 switch (status & 0x7ff) { 256 case NVME_SC_SUCCESS: 257 return BLK_STS_OK; 258 case NVME_SC_CAP_EXCEEDED: 259 return BLK_STS_NOSPC; 260 case NVME_SC_LBA_RANGE: 261 case NVME_SC_CMD_INTERRUPTED: 262 case NVME_SC_NS_NOT_READY: 263 return BLK_STS_TARGET; 264 case NVME_SC_BAD_ATTRIBUTES: 265 case NVME_SC_ONCS_NOT_SUPPORTED: 266 case NVME_SC_INVALID_OPCODE: 267 case NVME_SC_INVALID_FIELD: 268 case NVME_SC_INVALID_NS: 269 return BLK_STS_NOTSUPP; 270 case NVME_SC_WRITE_FAULT: 271 case NVME_SC_READ_ERROR: 272 case NVME_SC_UNWRITTEN_BLOCK: 273 case NVME_SC_ACCESS_DENIED: 274 case NVME_SC_READ_ONLY: 275 case NVME_SC_COMPARE_FAILED: 276 return BLK_STS_MEDIUM; 277 case NVME_SC_GUARD_CHECK: 278 case NVME_SC_APPTAG_CHECK: 279 case NVME_SC_REFTAG_CHECK: 280 case NVME_SC_INVALID_PI: 281 return BLK_STS_PROTECTION; 282 case NVME_SC_RESERVATION_CONFLICT: 283 return BLK_STS_RESV_CONFLICT; 284 case NVME_SC_HOST_PATH_ERROR: 285 return BLK_STS_TRANSPORT; 286 case NVME_SC_ZONE_TOO_MANY_ACTIVE: 287 return BLK_STS_ZONE_ACTIVE_RESOURCE; 288 case NVME_SC_ZONE_TOO_MANY_OPEN: 289 return BLK_STS_ZONE_OPEN_RESOURCE; 290 default: 291 return BLK_STS_IOERR; 292 } 293 } 294 295 static void nvme_retry_req(struct request *req) 296 { 297 unsigned long delay = 0; 298 u16 crd; 299 300 /* The mask and shift result must be <= 3 */ 301 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11; 302 if (crd) 303 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100; 304 305 nvme_req(req)->retries++; 306 blk_mq_requeue_request(req, false); 307 blk_mq_delay_kick_requeue_list(req->q, delay); 308 } 309 310 static void nvme_log_error(struct request *req) 311 { 312 struct nvme_ns *ns = req->q->queuedata; 313 struct nvme_request *nr = nvme_req(req); 314 315 if (ns) { 316 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %u blocks, %s (sct 0x%x / sc 0x%x) %s%s\n", 317 ns->disk ? ns->disk->disk_name : "?", 318 nvme_get_opcode_str(nr->cmd->common.opcode), 319 nr->cmd->common.opcode, 320 nvme_sect_to_lba(ns->head, blk_rq_pos(req)), 321 blk_rq_bytes(req) >> ns->head->lba_shift, 322 nvme_get_error_status_str(nr->status), 323 nr->status >> 8 & 7, /* Status Code Type */ 324 nr->status & 0xff, /* Status Code */ 325 nr->status & NVME_SC_MORE ? "MORE " : "", 326 nr->status & NVME_SC_DNR ? "DNR " : ""); 327 return; 328 } 329 330 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n", 331 dev_name(nr->ctrl->device), 332 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 333 nr->cmd->common.opcode, 334 nvme_get_error_status_str(nr->status), 335 nr->status >> 8 & 7, /* Status Code Type */ 336 nr->status & 0xff, /* Status Code */ 337 nr->status & NVME_SC_MORE ? "MORE " : "", 338 nr->status & NVME_SC_DNR ? "DNR " : ""); 339 } 340 341 static void nvme_log_err_passthru(struct request *req) 342 { 343 struct nvme_ns *ns = req->q->queuedata; 344 struct nvme_request *nr = nvme_req(req); 345 346 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s" 347 "cdw10=0x%x cdw11=0x%x cdw12=0x%x cdw13=0x%x cdw14=0x%x cdw15=0x%x\n", 348 ns ? ns->disk->disk_name : dev_name(nr->ctrl->device), 349 ns ? nvme_get_opcode_str(nr->cmd->common.opcode) : 350 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 351 nr->cmd->common.opcode, 352 nvme_get_error_status_str(nr->status), 353 nr->status >> 8 & 7, /* Status Code Type */ 354 nr->status & 0xff, /* Status Code */ 355 nr->status & NVME_SC_MORE ? "MORE " : "", 356 nr->status & NVME_SC_DNR ? "DNR " : "", 357 nr->cmd->common.cdw10, 358 nr->cmd->common.cdw11, 359 nr->cmd->common.cdw12, 360 nr->cmd->common.cdw13, 361 nr->cmd->common.cdw14, 362 nr->cmd->common.cdw14); 363 } 364 365 enum nvme_disposition { 366 COMPLETE, 367 RETRY, 368 FAILOVER, 369 AUTHENTICATE, 370 }; 371 372 static inline enum nvme_disposition nvme_decide_disposition(struct request *req) 373 { 374 if (likely(nvme_req(req)->status == 0)) 375 return COMPLETE; 376 377 if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED) 378 return AUTHENTICATE; 379 380 if (blk_noretry_request(req) || 381 (nvme_req(req)->status & NVME_SC_DNR) || 382 nvme_req(req)->retries >= nvme_max_retries) 383 return COMPLETE; 384 385 if (req->cmd_flags & REQ_NVME_MPATH) { 386 if (nvme_is_path_error(nvme_req(req)->status) || 387 blk_queue_dying(req->q)) 388 return FAILOVER; 389 } else { 390 if (blk_queue_dying(req->q)) 391 return COMPLETE; 392 } 393 394 return RETRY; 395 } 396 397 static inline void nvme_end_req_zoned(struct request *req) 398 { 399 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 400 req_op(req) == REQ_OP_ZONE_APPEND) { 401 struct nvme_ns *ns = req->q->queuedata; 402 403 req->__sector = nvme_lba_to_sect(ns->head, 404 le64_to_cpu(nvme_req(req)->result.u64)); 405 } 406 } 407 408 static inline void nvme_end_req(struct request *req) 409 { 410 blk_status_t status = nvme_error_status(nvme_req(req)->status); 411 412 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) { 413 if (blk_rq_is_passthrough(req)) 414 nvme_log_err_passthru(req); 415 else 416 nvme_log_error(req); 417 } 418 nvme_end_req_zoned(req); 419 nvme_trace_bio_complete(req); 420 if (req->cmd_flags & REQ_NVME_MPATH) 421 nvme_mpath_end_request(req); 422 blk_mq_end_request(req, status); 423 } 424 425 void nvme_complete_rq(struct request *req) 426 { 427 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 428 429 trace_nvme_complete_rq(req); 430 nvme_cleanup_cmd(req); 431 432 /* 433 * Completions of long-running commands should not be able to 434 * defer sending of periodic keep alives, since the controller 435 * may have completed processing such commands a long time ago 436 * (arbitrarily close to command submission time). 437 * req->deadline - req->timeout is the command submission time 438 * in jiffies. 439 */ 440 if (ctrl->kas && 441 req->deadline - req->timeout >= ctrl->ka_last_check_time) 442 ctrl->comp_seen = true; 443 444 switch (nvme_decide_disposition(req)) { 445 case COMPLETE: 446 nvme_end_req(req); 447 return; 448 case RETRY: 449 nvme_retry_req(req); 450 return; 451 case FAILOVER: 452 nvme_failover_req(req); 453 return; 454 case AUTHENTICATE: 455 #ifdef CONFIG_NVME_HOST_AUTH 456 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 457 nvme_retry_req(req); 458 #else 459 nvme_end_req(req); 460 #endif 461 return; 462 } 463 } 464 EXPORT_SYMBOL_GPL(nvme_complete_rq); 465 466 void nvme_complete_batch_req(struct request *req) 467 { 468 trace_nvme_complete_rq(req); 469 nvme_cleanup_cmd(req); 470 nvme_end_req_zoned(req); 471 } 472 EXPORT_SYMBOL_GPL(nvme_complete_batch_req); 473 474 /* 475 * Called to unwind from ->queue_rq on a failed command submission so that the 476 * multipathing code gets called to potentially failover to another path. 477 * The caller needs to unwind all transport specific resource allocations and 478 * must return propagate the return value. 479 */ 480 blk_status_t nvme_host_path_error(struct request *req) 481 { 482 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR; 483 blk_mq_set_request_complete(req); 484 nvme_complete_rq(req); 485 return BLK_STS_OK; 486 } 487 EXPORT_SYMBOL_GPL(nvme_host_path_error); 488 489 bool nvme_cancel_request(struct request *req, void *data) 490 { 491 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 492 "Cancelling I/O %d", req->tag); 493 494 /* don't abort one completed or idle request */ 495 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT) 496 return true; 497 498 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD; 499 nvme_req(req)->flags |= NVME_REQ_CANCELLED; 500 blk_mq_complete_request(req); 501 return true; 502 } 503 EXPORT_SYMBOL_GPL(nvme_cancel_request); 504 505 void nvme_cancel_tagset(struct nvme_ctrl *ctrl) 506 { 507 if (ctrl->tagset) { 508 blk_mq_tagset_busy_iter(ctrl->tagset, 509 nvme_cancel_request, ctrl); 510 blk_mq_tagset_wait_completed_request(ctrl->tagset); 511 } 512 } 513 EXPORT_SYMBOL_GPL(nvme_cancel_tagset); 514 515 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl) 516 { 517 if (ctrl->admin_tagset) { 518 blk_mq_tagset_busy_iter(ctrl->admin_tagset, 519 nvme_cancel_request, ctrl); 520 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset); 521 } 522 } 523 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset); 524 525 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 526 enum nvme_ctrl_state new_state) 527 { 528 enum nvme_ctrl_state old_state; 529 unsigned long flags; 530 bool changed = false; 531 532 spin_lock_irqsave(&ctrl->lock, flags); 533 534 old_state = nvme_ctrl_state(ctrl); 535 switch (new_state) { 536 case NVME_CTRL_LIVE: 537 switch (old_state) { 538 case NVME_CTRL_NEW: 539 case NVME_CTRL_RESETTING: 540 case NVME_CTRL_CONNECTING: 541 changed = true; 542 fallthrough; 543 default: 544 break; 545 } 546 break; 547 case NVME_CTRL_RESETTING: 548 switch (old_state) { 549 case NVME_CTRL_NEW: 550 case NVME_CTRL_LIVE: 551 changed = true; 552 fallthrough; 553 default: 554 break; 555 } 556 break; 557 case NVME_CTRL_CONNECTING: 558 switch (old_state) { 559 case NVME_CTRL_NEW: 560 case NVME_CTRL_RESETTING: 561 changed = true; 562 fallthrough; 563 default: 564 break; 565 } 566 break; 567 case NVME_CTRL_DELETING: 568 switch (old_state) { 569 case NVME_CTRL_LIVE: 570 case NVME_CTRL_RESETTING: 571 case NVME_CTRL_CONNECTING: 572 changed = true; 573 fallthrough; 574 default: 575 break; 576 } 577 break; 578 case NVME_CTRL_DELETING_NOIO: 579 switch (old_state) { 580 case NVME_CTRL_DELETING: 581 case NVME_CTRL_DEAD: 582 changed = true; 583 fallthrough; 584 default: 585 break; 586 } 587 break; 588 case NVME_CTRL_DEAD: 589 switch (old_state) { 590 case NVME_CTRL_DELETING: 591 changed = true; 592 fallthrough; 593 default: 594 break; 595 } 596 break; 597 default: 598 break; 599 } 600 601 if (changed) { 602 WRITE_ONCE(ctrl->state, new_state); 603 wake_up_all(&ctrl->state_wq); 604 } 605 606 spin_unlock_irqrestore(&ctrl->lock, flags); 607 if (!changed) 608 return false; 609 610 if (new_state == NVME_CTRL_LIVE) { 611 if (old_state == NVME_CTRL_CONNECTING) 612 nvme_stop_failfast_work(ctrl); 613 nvme_kick_requeue_lists(ctrl); 614 } else if (new_state == NVME_CTRL_CONNECTING && 615 old_state == NVME_CTRL_RESETTING) { 616 nvme_start_failfast_work(ctrl); 617 } 618 return changed; 619 } 620 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 621 622 /* 623 * Returns true for sink states that can't ever transition back to live. 624 */ 625 static bool nvme_state_terminal(struct nvme_ctrl *ctrl) 626 { 627 switch (nvme_ctrl_state(ctrl)) { 628 case NVME_CTRL_NEW: 629 case NVME_CTRL_LIVE: 630 case NVME_CTRL_RESETTING: 631 case NVME_CTRL_CONNECTING: 632 return false; 633 case NVME_CTRL_DELETING: 634 case NVME_CTRL_DELETING_NOIO: 635 case NVME_CTRL_DEAD: 636 return true; 637 default: 638 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 639 return true; 640 } 641 } 642 643 /* 644 * Waits for the controller state to be resetting, or returns false if it is 645 * not possible to ever transition to that state. 646 */ 647 bool nvme_wait_reset(struct nvme_ctrl *ctrl) 648 { 649 wait_event(ctrl->state_wq, 650 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) || 651 nvme_state_terminal(ctrl)); 652 return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING; 653 } 654 EXPORT_SYMBOL_GPL(nvme_wait_reset); 655 656 static void nvme_free_ns_head(struct kref *ref) 657 { 658 struct nvme_ns_head *head = 659 container_of(ref, struct nvme_ns_head, ref); 660 661 nvme_mpath_remove_disk(head); 662 ida_free(&head->subsys->ns_ida, head->instance); 663 cleanup_srcu_struct(&head->srcu); 664 nvme_put_subsystem(head->subsys); 665 kfree(head); 666 } 667 668 bool nvme_tryget_ns_head(struct nvme_ns_head *head) 669 { 670 return kref_get_unless_zero(&head->ref); 671 } 672 673 void nvme_put_ns_head(struct nvme_ns_head *head) 674 { 675 kref_put(&head->ref, nvme_free_ns_head); 676 } 677 678 static void nvme_free_ns(struct kref *kref) 679 { 680 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 681 682 put_disk(ns->disk); 683 nvme_put_ns_head(ns->head); 684 nvme_put_ctrl(ns->ctrl); 685 kfree(ns); 686 } 687 688 static inline bool nvme_get_ns(struct nvme_ns *ns) 689 { 690 return kref_get_unless_zero(&ns->kref); 691 } 692 693 void nvme_put_ns(struct nvme_ns *ns) 694 { 695 kref_put(&ns->kref, nvme_free_ns); 696 } 697 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU); 698 699 static inline void nvme_clear_nvme_request(struct request *req) 700 { 701 nvme_req(req)->status = 0; 702 nvme_req(req)->retries = 0; 703 nvme_req(req)->flags = 0; 704 req->rq_flags |= RQF_DONTPREP; 705 } 706 707 /* initialize a passthrough request */ 708 void nvme_init_request(struct request *req, struct nvme_command *cmd) 709 { 710 struct nvme_request *nr = nvme_req(req); 711 bool logging_enabled; 712 713 if (req->q->queuedata) { 714 struct nvme_ns *ns = req->q->disk->private_data; 715 716 logging_enabled = ns->head->passthru_err_log_enabled; 717 req->timeout = NVME_IO_TIMEOUT; 718 } else { /* no queuedata implies admin queue */ 719 logging_enabled = nr->ctrl->passthru_err_log_enabled; 720 req->timeout = NVME_ADMIN_TIMEOUT; 721 } 722 723 if (!logging_enabled) 724 req->rq_flags |= RQF_QUIET; 725 726 /* passthru commands should let the driver set the SGL flags */ 727 cmd->common.flags &= ~NVME_CMD_SGL_ALL; 728 729 req->cmd_flags |= REQ_FAILFAST_DRIVER; 730 if (req->mq_hctx->type == HCTX_TYPE_POLL) 731 req->cmd_flags |= REQ_POLLED; 732 nvme_clear_nvme_request(req); 733 memcpy(nr->cmd, cmd, sizeof(*cmd)); 734 } 735 EXPORT_SYMBOL_GPL(nvme_init_request); 736 737 /* 738 * For something we're not in a state to send to the device the default action 739 * is to busy it and retry it after the controller state is recovered. However, 740 * if the controller is deleting or if anything is marked for failfast or 741 * nvme multipath it is immediately failed. 742 * 743 * Note: commands used to initialize the controller will be marked for failfast. 744 * Note: nvme cli/ioctl commands are marked for failfast. 745 */ 746 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 747 struct request *rq) 748 { 749 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 750 751 if (state != NVME_CTRL_DELETING_NOIO && 752 state != NVME_CTRL_DELETING && 753 state != NVME_CTRL_DEAD && 754 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) && 755 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH)) 756 return BLK_STS_RESOURCE; 757 return nvme_host_path_error(rq); 758 } 759 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command); 760 761 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 762 bool queue_live, enum nvme_ctrl_state state) 763 { 764 struct nvme_request *req = nvme_req(rq); 765 766 /* 767 * currently we have a problem sending passthru commands 768 * on the admin_q if the controller is not LIVE because we can't 769 * make sure that they are going out after the admin connect, 770 * controller enable and/or other commands in the initialization 771 * sequence. until the controller will be LIVE, fail with 772 * BLK_STS_RESOURCE so that they will be rescheduled. 773 */ 774 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD)) 775 return false; 776 777 if (ctrl->ops->flags & NVME_F_FABRICS) { 778 /* 779 * Only allow commands on a live queue, except for the connect 780 * command, which is require to set the queue live in the 781 * appropinquate states. 782 */ 783 switch (state) { 784 case NVME_CTRL_CONNECTING: 785 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) && 786 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect || 787 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send || 788 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive)) 789 return true; 790 break; 791 default: 792 break; 793 case NVME_CTRL_DEAD: 794 return false; 795 } 796 } 797 798 return queue_live; 799 } 800 EXPORT_SYMBOL_GPL(__nvme_check_ready); 801 802 static inline void nvme_setup_flush(struct nvme_ns *ns, 803 struct nvme_command *cmnd) 804 { 805 memset(cmnd, 0, sizeof(*cmnd)); 806 cmnd->common.opcode = nvme_cmd_flush; 807 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 808 } 809 810 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 811 struct nvme_command *cmnd) 812 { 813 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 814 struct nvme_dsm_range *range; 815 struct bio *bio; 816 817 /* 818 * Some devices do not consider the DSM 'Number of Ranges' field when 819 * determining how much data to DMA. Always allocate memory for maximum 820 * number of segments to prevent device reading beyond end of buffer. 821 */ 822 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES; 823 824 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN); 825 if (!range) { 826 /* 827 * If we fail allocation our range, fallback to the controller 828 * discard page. If that's also busy, it's safe to return 829 * busy, as we know we can make progress once that's freed. 830 */ 831 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 832 return BLK_STS_RESOURCE; 833 834 range = page_address(ns->ctrl->discard_page); 835 } 836 837 if (queue_max_discard_segments(req->q) == 1) { 838 u64 slba = nvme_sect_to_lba(ns->head, blk_rq_pos(req)); 839 u32 nlb = blk_rq_sectors(req) >> (ns->head->lba_shift - 9); 840 841 range[0].cattr = cpu_to_le32(0); 842 range[0].nlb = cpu_to_le32(nlb); 843 range[0].slba = cpu_to_le64(slba); 844 n = 1; 845 } else { 846 __rq_for_each_bio(bio, req) { 847 u64 slba = nvme_sect_to_lba(ns->head, 848 bio->bi_iter.bi_sector); 849 u32 nlb = bio->bi_iter.bi_size >> ns->head->lba_shift; 850 851 if (n < segments) { 852 range[n].cattr = cpu_to_le32(0); 853 range[n].nlb = cpu_to_le32(nlb); 854 range[n].slba = cpu_to_le64(slba); 855 } 856 n++; 857 } 858 } 859 860 if (WARN_ON_ONCE(n != segments)) { 861 if (virt_to_page(range) == ns->ctrl->discard_page) 862 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 863 else 864 kfree(range); 865 return BLK_STS_IOERR; 866 } 867 868 memset(cmnd, 0, sizeof(*cmnd)); 869 cmnd->dsm.opcode = nvme_cmd_dsm; 870 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 871 cmnd->dsm.nr = cpu_to_le32(segments - 1); 872 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 873 874 bvec_set_virt(&req->special_vec, range, alloc_size); 875 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 876 877 return BLK_STS_OK; 878 } 879 880 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd, 881 struct request *req) 882 { 883 u32 upper, lower; 884 u64 ref48; 885 886 /* both rw and write zeroes share the same reftag format */ 887 switch (ns->head->guard_type) { 888 case NVME_NVM_NS_16B_GUARD: 889 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 890 break; 891 case NVME_NVM_NS_64B_GUARD: 892 ref48 = ext_pi_ref_tag(req); 893 lower = lower_32_bits(ref48); 894 upper = upper_32_bits(ref48); 895 896 cmnd->rw.reftag = cpu_to_le32(lower); 897 cmnd->rw.cdw3 = cpu_to_le32(upper); 898 break; 899 default: 900 break; 901 } 902 } 903 904 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns, 905 struct request *req, struct nvme_command *cmnd) 906 { 907 memset(cmnd, 0, sizeof(*cmnd)); 908 909 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 910 return nvme_setup_discard(ns, req, cmnd); 911 912 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes; 913 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id); 914 cmnd->write_zeroes.slba = 915 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req))); 916 cmnd->write_zeroes.length = 917 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1); 918 919 if (!(req->cmd_flags & REQ_NOUNMAP) && 920 (ns->head->features & NVME_NS_DEAC)) 921 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC); 922 923 if (nvme_ns_has_pi(ns->head)) { 924 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT); 925 926 switch (ns->head->pi_type) { 927 case NVME_NS_DPS_PI_TYPE1: 928 case NVME_NS_DPS_PI_TYPE2: 929 nvme_set_ref_tag(ns, cmnd, req); 930 break; 931 } 932 } 933 934 return BLK_STS_OK; 935 } 936 937 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 938 struct request *req, struct nvme_command *cmnd, 939 enum nvme_opcode op) 940 { 941 u16 control = 0; 942 u32 dsmgmt = 0; 943 944 if (req->cmd_flags & REQ_FUA) 945 control |= NVME_RW_FUA; 946 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 947 control |= NVME_RW_LR; 948 949 if (req->cmd_flags & REQ_RAHEAD) 950 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 951 952 cmnd->rw.opcode = op; 953 cmnd->rw.flags = 0; 954 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 955 cmnd->rw.cdw2 = 0; 956 cmnd->rw.cdw3 = 0; 957 cmnd->rw.metadata = 0; 958 cmnd->rw.slba = 959 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req))); 960 cmnd->rw.length = 961 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1); 962 cmnd->rw.reftag = 0; 963 cmnd->rw.apptag = 0; 964 cmnd->rw.appmask = 0; 965 966 if (ns->head->ms) { 967 /* 968 * If formated with metadata, the block layer always provides a 969 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 970 * we enable the PRACT bit for protection information or set the 971 * namespace capacity to zero to prevent any I/O. 972 */ 973 if (!blk_integrity_rq(req)) { 974 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns->head))) 975 return BLK_STS_NOTSUPP; 976 control |= NVME_RW_PRINFO_PRACT; 977 } 978 979 switch (ns->head->pi_type) { 980 case NVME_NS_DPS_PI_TYPE3: 981 control |= NVME_RW_PRINFO_PRCHK_GUARD; 982 break; 983 case NVME_NS_DPS_PI_TYPE1: 984 case NVME_NS_DPS_PI_TYPE2: 985 control |= NVME_RW_PRINFO_PRCHK_GUARD | 986 NVME_RW_PRINFO_PRCHK_REF; 987 if (op == nvme_cmd_zone_append) 988 control |= NVME_RW_APPEND_PIREMAP; 989 nvme_set_ref_tag(ns, cmnd, req); 990 break; 991 } 992 } 993 994 cmnd->rw.control = cpu_to_le16(control); 995 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 996 return 0; 997 } 998 999 void nvme_cleanup_cmd(struct request *req) 1000 { 1001 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 1002 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 1003 1004 if (req->special_vec.bv_page == ctrl->discard_page) 1005 clear_bit_unlock(0, &ctrl->discard_page_busy); 1006 else 1007 kfree(bvec_virt(&req->special_vec)); 1008 } 1009 } 1010 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 1011 1012 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req) 1013 { 1014 struct nvme_command *cmd = nvme_req(req)->cmd; 1015 blk_status_t ret = BLK_STS_OK; 1016 1017 if (!(req->rq_flags & RQF_DONTPREP)) 1018 nvme_clear_nvme_request(req); 1019 1020 switch (req_op(req)) { 1021 case REQ_OP_DRV_IN: 1022 case REQ_OP_DRV_OUT: 1023 /* these are setup prior to execution in nvme_init_request() */ 1024 break; 1025 case REQ_OP_FLUSH: 1026 nvme_setup_flush(ns, cmd); 1027 break; 1028 case REQ_OP_ZONE_RESET_ALL: 1029 case REQ_OP_ZONE_RESET: 1030 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET); 1031 break; 1032 case REQ_OP_ZONE_OPEN: 1033 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN); 1034 break; 1035 case REQ_OP_ZONE_CLOSE: 1036 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE); 1037 break; 1038 case REQ_OP_ZONE_FINISH: 1039 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH); 1040 break; 1041 case REQ_OP_WRITE_ZEROES: 1042 ret = nvme_setup_write_zeroes(ns, req, cmd); 1043 break; 1044 case REQ_OP_DISCARD: 1045 ret = nvme_setup_discard(ns, req, cmd); 1046 break; 1047 case REQ_OP_READ: 1048 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read); 1049 break; 1050 case REQ_OP_WRITE: 1051 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write); 1052 break; 1053 case REQ_OP_ZONE_APPEND: 1054 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append); 1055 break; 1056 default: 1057 WARN_ON_ONCE(1); 1058 return BLK_STS_IOERR; 1059 } 1060 1061 cmd->common.command_id = nvme_cid(req); 1062 trace_nvme_setup_cmd(req, cmd); 1063 return ret; 1064 } 1065 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 1066 1067 /* 1068 * Return values: 1069 * 0: success 1070 * >0: nvme controller's cqe status response 1071 * <0: kernel error in lieu of controller response 1072 */ 1073 int nvme_execute_rq(struct request *rq, bool at_head) 1074 { 1075 blk_status_t status; 1076 1077 status = blk_execute_rq(rq, at_head); 1078 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED) 1079 return -EINTR; 1080 if (nvme_req(rq)->status) 1081 return nvme_req(rq)->status; 1082 return blk_status_to_errno(status); 1083 } 1084 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU); 1085 1086 /* 1087 * Returns 0 on success. If the result is negative, it's a Linux error code; 1088 * if the result is positive, it's an NVM Express status code 1089 */ 1090 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1091 union nvme_result *result, void *buffer, unsigned bufflen, 1092 int qid, nvme_submit_flags_t flags) 1093 { 1094 struct request *req; 1095 int ret; 1096 blk_mq_req_flags_t blk_flags = 0; 1097 1098 if (flags & NVME_SUBMIT_NOWAIT) 1099 blk_flags |= BLK_MQ_REQ_NOWAIT; 1100 if (flags & NVME_SUBMIT_RESERVED) 1101 blk_flags |= BLK_MQ_REQ_RESERVED; 1102 if (qid == NVME_QID_ANY) 1103 req = blk_mq_alloc_request(q, nvme_req_op(cmd), blk_flags); 1104 else 1105 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), blk_flags, 1106 qid - 1); 1107 1108 if (IS_ERR(req)) 1109 return PTR_ERR(req); 1110 nvme_init_request(req, cmd); 1111 if (flags & NVME_SUBMIT_RETRY) 1112 req->cmd_flags &= ~REQ_FAILFAST_DRIVER; 1113 1114 if (buffer && bufflen) { 1115 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); 1116 if (ret) 1117 goto out; 1118 } 1119 1120 ret = nvme_execute_rq(req, flags & NVME_SUBMIT_AT_HEAD); 1121 if (result && ret >= 0) 1122 *result = nvme_req(req)->result; 1123 out: 1124 blk_mq_free_request(req); 1125 return ret; 1126 } 1127 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 1128 1129 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1130 void *buffer, unsigned bufflen) 1131 { 1132 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 1133 NVME_QID_ANY, 0); 1134 } 1135 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 1136 1137 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1138 { 1139 u32 effects = 0; 1140 1141 if (ns) { 1142 effects = le32_to_cpu(ns->head->effects->iocs[opcode]); 1143 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC)) 1144 dev_warn_once(ctrl->device, 1145 "IO command:%02x has unusual effects:%08x\n", 1146 opcode, effects); 1147 1148 /* 1149 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues, 1150 * which would deadlock when done on an I/O command. Note that 1151 * We already warn about an unusual effect above. 1152 */ 1153 effects &= ~NVME_CMD_EFFECTS_CSE_MASK; 1154 } else { 1155 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1156 } 1157 1158 return effects; 1159 } 1160 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU); 1161 1162 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1163 { 1164 u32 effects = nvme_command_effects(ctrl, ns, opcode); 1165 1166 /* 1167 * For simplicity, IO to all namespaces is quiesced even if the command 1168 * effects say only one namespace is affected. 1169 */ 1170 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1171 mutex_lock(&ctrl->scan_lock); 1172 mutex_lock(&ctrl->subsys->lock); 1173 nvme_mpath_start_freeze(ctrl->subsys); 1174 nvme_mpath_wait_freeze(ctrl->subsys); 1175 nvme_start_freeze(ctrl); 1176 nvme_wait_freeze(ctrl); 1177 } 1178 return effects; 1179 } 1180 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU); 1181 1182 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1183 struct nvme_command *cmd, int status) 1184 { 1185 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1186 nvme_unfreeze(ctrl); 1187 nvme_mpath_unfreeze(ctrl->subsys); 1188 mutex_unlock(&ctrl->subsys->lock); 1189 mutex_unlock(&ctrl->scan_lock); 1190 } 1191 if (effects & NVME_CMD_EFFECTS_CCC) { 1192 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY, 1193 &ctrl->flags)) { 1194 dev_info(ctrl->device, 1195 "controller capabilities changed, reset may be required to take effect.\n"); 1196 } 1197 } 1198 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) { 1199 nvme_queue_scan(ctrl); 1200 flush_work(&ctrl->scan_work); 1201 } 1202 if (ns) 1203 return; 1204 1205 switch (cmd->common.opcode) { 1206 case nvme_admin_set_features: 1207 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) { 1208 case NVME_FEAT_KATO: 1209 /* 1210 * Keep alive commands interval on the host should be 1211 * updated when KATO is modified by Set Features 1212 * commands. 1213 */ 1214 if (!status) 1215 nvme_update_keep_alive(ctrl, cmd); 1216 break; 1217 default: 1218 break; 1219 } 1220 break; 1221 default: 1222 break; 1223 } 1224 } 1225 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU); 1226 1227 /* 1228 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1: 1229 * 1230 * The host should send Keep Alive commands at half of the Keep Alive Timeout 1231 * accounting for transport roundtrip times [..]. 1232 */ 1233 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl) 1234 { 1235 unsigned long delay = ctrl->kato * HZ / 2; 1236 1237 /* 1238 * When using Traffic Based Keep Alive, we need to run 1239 * nvme_keep_alive_work at twice the normal frequency, as one 1240 * command completion can postpone sending a keep alive command 1241 * by up to twice the delay between runs. 1242 */ 1243 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) 1244 delay /= 2; 1245 return delay; 1246 } 1247 1248 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl) 1249 { 1250 unsigned long now = jiffies; 1251 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1252 unsigned long ka_next_check_tm = ctrl->ka_last_check_time + delay; 1253 1254 if (time_after(now, ka_next_check_tm)) 1255 delay = 0; 1256 else 1257 delay = ka_next_check_tm - now; 1258 1259 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1260 } 1261 1262 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq, 1263 blk_status_t status) 1264 { 1265 struct nvme_ctrl *ctrl = rq->end_io_data; 1266 unsigned long flags; 1267 bool startka = false; 1268 unsigned long rtt = jiffies - (rq->deadline - rq->timeout); 1269 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1270 1271 /* 1272 * Subtract off the keepalive RTT so nvme_keep_alive_work runs 1273 * at the desired frequency. 1274 */ 1275 if (rtt <= delay) { 1276 delay -= rtt; 1277 } else { 1278 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n", 1279 jiffies_to_msecs(rtt)); 1280 delay = 0; 1281 } 1282 1283 blk_mq_free_request(rq); 1284 1285 if (status) { 1286 dev_err(ctrl->device, 1287 "failed nvme_keep_alive_end_io error=%d\n", 1288 status); 1289 return RQ_END_IO_NONE; 1290 } 1291 1292 ctrl->ka_last_check_time = jiffies; 1293 ctrl->comp_seen = false; 1294 spin_lock_irqsave(&ctrl->lock, flags); 1295 if (ctrl->state == NVME_CTRL_LIVE || 1296 ctrl->state == NVME_CTRL_CONNECTING) 1297 startka = true; 1298 spin_unlock_irqrestore(&ctrl->lock, flags); 1299 if (startka) 1300 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1301 return RQ_END_IO_NONE; 1302 } 1303 1304 static void nvme_keep_alive_work(struct work_struct *work) 1305 { 1306 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 1307 struct nvme_ctrl, ka_work); 1308 bool comp_seen = ctrl->comp_seen; 1309 struct request *rq; 1310 1311 ctrl->ka_last_check_time = jiffies; 1312 1313 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 1314 dev_dbg(ctrl->device, 1315 "reschedule traffic based keep-alive timer\n"); 1316 ctrl->comp_seen = false; 1317 nvme_queue_keep_alive_work(ctrl); 1318 return; 1319 } 1320 1321 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd), 1322 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT); 1323 if (IS_ERR(rq)) { 1324 /* allocation failure, reset the controller */ 1325 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq)); 1326 nvme_reset_ctrl(ctrl); 1327 return; 1328 } 1329 nvme_init_request(rq, &ctrl->ka_cmd); 1330 1331 rq->timeout = ctrl->kato * HZ; 1332 rq->end_io = nvme_keep_alive_end_io; 1333 rq->end_io_data = ctrl; 1334 blk_execute_rq_nowait(rq, false); 1335 } 1336 1337 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 1338 { 1339 if (unlikely(ctrl->kato == 0)) 1340 return; 1341 1342 nvme_queue_keep_alive_work(ctrl); 1343 } 1344 1345 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 1346 { 1347 if (unlikely(ctrl->kato == 0)) 1348 return; 1349 1350 cancel_delayed_work_sync(&ctrl->ka_work); 1351 } 1352 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 1353 1354 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 1355 struct nvme_command *cmd) 1356 { 1357 unsigned int new_kato = 1358 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000); 1359 1360 dev_info(ctrl->device, 1361 "keep alive interval updated from %u ms to %u ms\n", 1362 ctrl->kato * 1000 / 2, new_kato * 1000 / 2); 1363 1364 nvme_stop_keep_alive(ctrl); 1365 ctrl->kato = new_kato; 1366 nvme_start_keep_alive(ctrl); 1367 } 1368 1369 /* 1370 * In NVMe 1.0 the CNS field was just a binary controller or namespace 1371 * flag, thus sending any new CNS opcodes has a big chance of not working. 1372 * Qemu unfortunately had that bug after reporting a 1.1 version compliance 1373 * (but not for any later version). 1374 */ 1375 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl) 1376 { 1377 if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS) 1378 return ctrl->vs < NVME_VS(1, 2, 0); 1379 return ctrl->vs < NVME_VS(1, 1, 0); 1380 } 1381 1382 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 1383 { 1384 struct nvme_command c = { }; 1385 int error; 1386 1387 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1388 c.identify.opcode = nvme_admin_identify; 1389 c.identify.cns = NVME_ID_CNS_CTRL; 1390 1391 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 1392 if (!*id) 1393 return -ENOMEM; 1394 1395 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 1396 sizeof(struct nvme_id_ctrl)); 1397 if (error) 1398 kfree(*id); 1399 return error; 1400 } 1401 1402 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, 1403 struct nvme_ns_id_desc *cur, bool *csi_seen) 1404 { 1405 const char *warn_str = "ctrl returned bogus length:"; 1406 void *data = cur; 1407 1408 switch (cur->nidt) { 1409 case NVME_NIDT_EUI64: 1410 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1411 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n", 1412 warn_str, cur->nidl); 1413 return -1; 1414 } 1415 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1416 return NVME_NIDT_EUI64_LEN; 1417 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN); 1418 return NVME_NIDT_EUI64_LEN; 1419 case NVME_NIDT_NGUID: 1420 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1421 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n", 1422 warn_str, cur->nidl); 1423 return -1; 1424 } 1425 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1426 return NVME_NIDT_NGUID_LEN; 1427 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN); 1428 return NVME_NIDT_NGUID_LEN; 1429 case NVME_NIDT_UUID: 1430 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1431 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n", 1432 warn_str, cur->nidl); 1433 return -1; 1434 } 1435 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1436 return NVME_NIDT_UUID_LEN; 1437 uuid_copy(&ids->uuid, data + sizeof(*cur)); 1438 return NVME_NIDT_UUID_LEN; 1439 case NVME_NIDT_CSI: 1440 if (cur->nidl != NVME_NIDT_CSI_LEN) { 1441 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n", 1442 warn_str, cur->nidl); 1443 return -1; 1444 } 1445 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN); 1446 *csi_seen = true; 1447 return NVME_NIDT_CSI_LEN; 1448 default: 1449 /* Skip unknown types */ 1450 return cur->nidl; 1451 } 1452 } 1453 1454 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, 1455 struct nvme_ns_info *info) 1456 { 1457 struct nvme_command c = { }; 1458 bool csi_seen = false; 1459 int status, pos, len; 1460 void *data; 1461 1462 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl)) 1463 return 0; 1464 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST) 1465 return 0; 1466 1467 c.identify.opcode = nvme_admin_identify; 1468 c.identify.nsid = cpu_to_le32(info->nsid); 1469 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1470 1471 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1472 if (!data) 1473 return -ENOMEM; 1474 1475 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1476 NVME_IDENTIFY_DATA_SIZE); 1477 if (status) { 1478 dev_warn(ctrl->device, 1479 "Identify Descriptors failed (nsid=%u, status=0x%x)\n", 1480 info->nsid, status); 1481 goto free_data; 1482 } 1483 1484 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1485 struct nvme_ns_id_desc *cur = data + pos; 1486 1487 if (cur->nidl == 0) 1488 break; 1489 1490 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen); 1491 if (len < 0) 1492 break; 1493 1494 len += sizeof(*cur); 1495 } 1496 1497 if (nvme_multi_css(ctrl) && !csi_seen) { 1498 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n", 1499 info->nsid); 1500 status = -EINVAL; 1501 } 1502 1503 free_data: 1504 kfree(data); 1505 return status; 1506 } 1507 1508 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1509 struct nvme_id_ns **id) 1510 { 1511 struct nvme_command c = { }; 1512 int error; 1513 1514 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1515 c.identify.opcode = nvme_admin_identify; 1516 c.identify.nsid = cpu_to_le32(nsid); 1517 c.identify.cns = NVME_ID_CNS_NS; 1518 1519 *id = kmalloc(sizeof(**id), GFP_KERNEL); 1520 if (!*id) 1521 return -ENOMEM; 1522 1523 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id)); 1524 if (error) { 1525 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error); 1526 kfree(*id); 1527 } 1528 return error; 1529 } 1530 1531 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl, 1532 struct nvme_ns_info *info) 1533 { 1534 struct nvme_ns_ids *ids = &info->ids; 1535 struct nvme_id_ns *id; 1536 int ret; 1537 1538 ret = nvme_identify_ns(ctrl, info->nsid, &id); 1539 if (ret) 1540 return ret; 1541 1542 if (id->ncap == 0) { 1543 /* namespace not allocated or attached */ 1544 info->is_removed = true; 1545 ret = -ENODEV; 1546 goto error; 1547 } 1548 1549 info->anagrpid = id->anagrpid; 1550 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1551 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1552 info->is_ready = true; 1553 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) { 1554 dev_info(ctrl->device, 1555 "Ignoring bogus Namespace Identifiers\n"); 1556 } else { 1557 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1558 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 1559 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64)); 1560 if (ctrl->vs >= NVME_VS(1, 2, 0) && 1561 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 1562 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid)); 1563 } 1564 1565 error: 1566 kfree(id); 1567 return ret; 1568 } 1569 1570 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl, 1571 struct nvme_ns_info *info) 1572 { 1573 struct nvme_id_ns_cs_indep *id; 1574 struct nvme_command c = { 1575 .identify.opcode = nvme_admin_identify, 1576 .identify.nsid = cpu_to_le32(info->nsid), 1577 .identify.cns = NVME_ID_CNS_NS_CS_INDEP, 1578 }; 1579 int ret; 1580 1581 id = kmalloc(sizeof(*id), GFP_KERNEL); 1582 if (!id) 1583 return -ENOMEM; 1584 1585 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 1586 if (!ret) { 1587 info->anagrpid = id->anagrpid; 1588 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1589 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1590 info->is_ready = id->nstat & NVME_NSTAT_NRDY; 1591 } 1592 kfree(id); 1593 return ret; 1594 } 1595 1596 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, 1597 unsigned int dword11, void *buffer, size_t buflen, u32 *result) 1598 { 1599 union nvme_result res = { 0 }; 1600 struct nvme_command c = { }; 1601 int ret; 1602 1603 c.features.opcode = op; 1604 c.features.fid = cpu_to_le32(fid); 1605 c.features.dword11 = cpu_to_le32(dword11); 1606 1607 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1608 buffer, buflen, NVME_QID_ANY, 0); 1609 if (ret >= 0 && result) 1610 *result = le32_to_cpu(res.u32); 1611 return ret; 1612 } 1613 1614 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1615 unsigned int dword11, void *buffer, size_t buflen, 1616 u32 *result) 1617 { 1618 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer, 1619 buflen, result); 1620 } 1621 EXPORT_SYMBOL_GPL(nvme_set_features); 1622 1623 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1624 unsigned int dword11, void *buffer, size_t buflen, 1625 u32 *result) 1626 { 1627 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer, 1628 buflen, result); 1629 } 1630 EXPORT_SYMBOL_GPL(nvme_get_features); 1631 1632 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1633 { 1634 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1635 u32 result; 1636 int status, nr_io_queues; 1637 1638 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1639 &result); 1640 if (status < 0) 1641 return status; 1642 1643 /* 1644 * Degraded controllers might return an error when setting the queue 1645 * count. We still want to be able to bring them online and offer 1646 * access to the admin queue, as that might be only way to fix them up. 1647 */ 1648 if (status > 0) { 1649 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1650 *count = 0; 1651 } else { 1652 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1653 *count = min(*count, nr_io_queues); 1654 } 1655 1656 return 0; 1657 } 1658 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1659 1660 #define NVME_AEN_SUPPORTED \ 1661 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ 1662 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) 1663 1664 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1665 { 1666 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1667 int status; 1668 1669 if (!supported_aens) 1670 return; 1671 1672 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1673 NULL, 0, &result); 1674 if (status) 1675 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1676 supported_aens); 1677 1678 queue_work(nvme_wq, &ctrl->async_event_work); 1679 } 1680 1681 static int nvme_ns_open(struct nvme_ns *ns) 1682 { 1683 1684 /* should never be called due to GENHD_FL_HIDDEN */ 1685 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head))) 1686 goto fail; 1687 if (!nvme_get_ns(ns)) 1688 goto fail; 1689 if (!try_module_get(ns->ctrl->ops->module)) 1690 goto fail_put_ns; 1691 1692 return 0; 1693 1694 fail_put_ns: 1695 nvme_put_ns(ns); 1696 fail: 1697 return -ENXIO; 1698 } 1699 1700 static void nvme_ns_release(struct nvme_ns *ns) 1701 { 1702 1703 module_put(ns->ctrl->ops->module); 1704 nvme_put_ns(ns); 1705 } 1706 1707 static int nvme_open(struct gendisk *disk, blk_mode_t mode) 1708 { 1709 return nvme_ns_open(disk->private_data); 1710 } 1711 1712 static void nvme_release(struct gendisk *disk) 1713 { 1714 nvme_ns_release(disk->private_data); 1715 } 1716 1717 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1718 { 1719 /* some standard values */ 1720 geo->heads = 1 << 6; 1721 geo->sectors = 1 << 5; 1722 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1723 return 0; 1724 } 1725 1726 #ifdef CONFIG_BLK_DEV_INTEGRITY 1727 static void nvme_init_integrity(struct gendisk *disk, 1728 struct nvme_ns_head *head, u32 max_integrity_segments) 1729 { 1730 struct blk_integrity integrity = { }; 1731 1732 switch (head->pi_type) { 1733 case NVME_NS_DPS_PI_TYPE3: 1734 switch (head->guard_type) { 1735 case NVME_NVM_NS_16B_GUARD: 1736 integrity.profile = &t10_pi_type3_crc; 1737 integrity.tag_size = sizeof(u16) + sizeof(u32); 1738 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1739 break; 1740 case NVME_NVM_NS_64B_GUARD: 1741 integrity.profile = &ext_pi_type3_crc64; 1742 integrity.tag_size = sizeof(u16) + 6; 1743 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1744 break; 1745 default: 1746 integrity.profile = NULL; 1747 break; 1748 } 1749 break; 1750 case NVME_NS_DPS_PI_TYPE1: 1751 case NVME_NS_DPS_PI_TYPE2: 1752 switch (head->guard_type) { 1753 case NVME_NVM_NS_16B_GUARD: 1754 integrity.profile = &t10_pi_type1_crc; 1755 integrity.tag_size = sizeof(u16); 1756 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1757 break; 1758 case NVME_NVM_NS_64B_GUARD: 1759 integrity.profile = &ext_pi_type1_crc64; 1760 integrity.tag_size = sizeof(u16); 1761 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1762 break; 1763 default: 1764 integrity.profile = NULL; 1765 break; 1766 } 1767 break; 1768 default: 1769 integrity.profile = NULL; 1770 break; 1771 } 1772 1773 integrity.tuple_size = head->ms; 1774 blk_integrity_register(disk, &integrity); 1775 blk_queue_max_integrity_segments(disk->queue, max_integrity_segments); 1776 } 1777 #else 1778 static void nvme_init_integrity(struct gendisk *disk, 1779 struct nvme_ns_head *head, u32 max_integrity_segments) 1780 { 1781 } 1782 #endif /* CONFIG_BLK_DEV_INTEGRITY */ 1783 1784 static void nvme_config_discard(struct nvme_ctrl *ctrl, struct gendisk *disk, 1785 struct nvme_ns_head *head) 1786 { 1787 struct request_queue *queue = disk->queue; 1788 u32 max_discard_sectors; 1789 1790 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(head, UINT_MAX)) { 1791 max_discard_sectors = nvme_lba_to_sect(head, ctrl->dmrsl); 1792 } else if (ctrl->oncs & NVME_CTRL_ONCS_DSM) { 1793 max_discard_sectors = UINT_MAX; 1794 } else { 1795 blk_queue_max_discard_sectors(queue, 0); 1796 return; 1797 } 1798 1799 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) < 1800 NVME_DSM_MAX_RANGES); 1801 1802 /* 1803 * If discard is already enabled, don't reset queue limits. 1804 * 1805 * This works around the fact that the block layer can't cope well with 1806 * updating the hardware limits when overridden through sysfs. This is 1807 * harmless because discard limits in NVMe are purely advisory. 1808 */ 1809 if (queue->limits.max_discard_sectors) 1810 return; 1811 1812 blk_queue_max_discard_sectors(queue, max_discard_sectors); 1813 if (ctrl->dmrl) 1814 blk_queue_max_discard_segments(queue, ctrl->dmrl); 1815 else 1816 blk_queue_max_discard_segments(queue, NVME_DSM_MAX_RANGES); 1817 queue->limits.discard_granularity = queue_logical_block_size(queue); 1818 1819 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 1820 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX); 1821 } 1822 1823 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 1824 { 1825 return uuid_equal(&a->uuid, &b->uuid) && 1826 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 1827 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 && 1828 a->csi == b->csi; 1829 } 1830 1831 static int nvme_init_ms(struct nvme_ctrl *ctrl, struct nvme_ns_head *head, 1832 struct nvme_id_ns *id) 1833 { 1834 bool first = id->dps & NVME_NS_DPS_PI_FIRST; 1835 unsigned lbaf = nvme_lbaf_index(id->flbas); 1836 struct nvme_command c = { }; 1837 struct nvme_id_ns_nvm *nvm; 1838 int ret = 0; 1839 u32 elbaf; 1840 1841 head->pi_size = 0; 1842 head->ms = le16_to_cpu(id->lbaf[lbaf].ms); 1843 if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) { 1844 head->pi_size = sizeof(struct t10_pi_tuple); 1845 head->guard_type = NVME_NVM_NS_16B_GUARD; 1846 goto set_pi; 1847 } 1848 1849 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); 1850 if (!nvm) 1851 return -ENOMEM; 1852 1853 c.identify.opcode = nvme_admin_identify; 1854 c.identify.nsid = cpu_to_le32(head->ns_id); 1855 c.identify.cns = NVME_ID_CNS_CS_NS; 1856 c.identify.csi = NVME_CSI_NVM; 1857 1858 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, nvm, sizeof(*nvm)); 1859 if (ret) 1860 goto free_data; 1861 1862 elbaf = le32_to_cpu(nvm->elbaf[lbaf]); 1863 1864 /* no support for storage tag formats right now */ 1865 if (nvme_elbaf_sts(elbaf)) 1866 goto free_data; 1867 1868 head->guard_type = nvme_elbaf_guard_type(elbaf); 1869 switch (head->guard_type) { 1870 case NVME_NVM_NS_64B_GUARD: 1871 head->pi_size = sizeof(struct crc64_pi_tuple); 1872 break; 1873 case NVME_NVM_NS_16B_GUARD: 1874 head->pi_size = sizeof(struct t10_pi_tuple); 1875 break; 1876 default: 1877 break; 1878 } 1879 1880 free_data: 1881 kfree(nvm); 1882 set_pi: 1883 if (head->pi_size && (first || head->ms == head->pi_size)) 1884 head->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1885 else 1886 head->pi_type = 0; 1887 1888 return ret; 1889 } 1890 1891 static int nvme_configure_metadata(struct nvme_ctrl *ctrl, 1892 struct nvme_ns_head *head, struct nvme_id_ns *id) 1893 { 1894 int ret; 1895 1896 ret = nvme_init_ms(ctrl, head, id); 1897 if (ret) 1898 return ret; 1899 1900 head->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS); 1901 if (!head->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 1902 return 0; 1903 1904 if (ctrl->ops->flags & NVME_F_FABRICS) { 1905 /* 1906 * The NVMe over Fabrics specification only supports metadata as 1907 * part of the extended data LBA. We rely on HCA/HBA support to 1908 * remap the separate metadata buffer from the block layer. 1909 */ 1910 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT))) 1911 return 0; 1912 1913 head->features |= NVME_NS_EXT_LBAS; 1914 1915 /* 1916 * The current fabrics transport drivers support namespace 1917 * metadata formats only if nvme_ns_has_pi() returns true. 1918 * Suppress support for all other formats so the namespace will 1919 * have a 0 capacity and not be usable through the block stack. 1920 * 1921 * Note, this check will need to be modified if any drivers 1922 * gain the ability to use other metadata formats. 1923 */ 1924 if (ctrl->max_integrity_segments && nvme_ns_has_pi(head)) 1925 head->features |= NVME_NS_METADATA_SUPPORTED; 1926 } else { 1927 /* 1928 * For PCIe controllers, we can't easily remap the separate 1929 * metadata buffer from the block layer and thus require a 1930 * separate metadata buffer for block layer metadata/PI support. 1931 * We allow extended LBAs for the passthrough interface, though. 1932 */ 1933 if (id->flbas & NVME_NS_FLBAS_META_EXT) 1934 head->features |= NVME_NS_EXT_LBAS; 1935 else 1936 head->features |= NVME_NS_METADATA_SUPPORTED; 1937 } 1938 return 0; 1939 } 1940 1941 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl, 1942 struct request_queue *q) 1943 { 1944 bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT; 1945 1946 if (ctrl->max_hw_sectors) { 1947 u32 max_segments = 1948 (ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1; 1949 1950 max_segments = min_not_zero(max_segments, ctrl->max_segments); 1951 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors); 1952 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX)); 1953 } 1954 blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1); 1955 blk_queue_dma_alignment(q, 3); 1956 blk_queue_write_cache(q, vwc, vwc); 1957 } 1958 1959 static void nvme_update_disk_info(struct nvme_ctrl *ctrl, struct gendisk *disk, 1960 struct nvme_ns_head *head, struct nvme_id_ns *id) 1961 { 1962 sector_t capacity = nvme_lba_to_sect(head, le64_to_cpu(id->nsze)); 1963 u32 bs = 1U << head->lba_shift; 1964 u32 atomic_bs, phys_bs, io_opt = 0; 1965 1966 /* 1967 * The block layer can't support LBA sizes larger than the page size 1968 * or smaller than a sector size yet, so catch this early and don't 1969 * allow block I/O. 1970 */ 1971 if (head->lba_shift > PAGE_SHIFT || head->lba_shift < SECTOR_SHIFT) { 1972 capacity = 0; 1973 bs = (1 << 9); 1974 } 1975 1976 blk_integrity_unregister(disk); 1977 1978 atomic_bs = phys_bs = bs; 1979 if (id->nabo == 0) { 1980 /* 1981 * Bit 1 indicates whether NAWUPF is defined for this namespace 1982 * and whether it should be used instead of AWUPF. If NAWUPF == 1983 * 0 then AWUPF must be used instead. 1984 */ 1985 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) 1986 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs; 1987 else 1988 atomic_bs = (1 + ctrl->subsys->awupf) * bs; 1989 } 1990 1991 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) { 1992 /* NPWG = Namespace Preferred Write Granularity */ 1993 phys_bs = bs * (1 + le16_to_cpu(id->npwg)); 1994 /* NOWS = Namespace Optimal Write Size */ 1995 io_opt = bs * (1 + le16_to_cpu(id->nows)); 1996 } 1997 1998 blk_queue_logical_block_size(disk->queue, bs); 1999 /* 2000 * Linux filesystems assume writing a single physical block is 2001 * an atomic operation. Hence limit the physical block size to the 2002 * value of the Atomic Write Unit Power Fail parameter. 2003 */ 2004 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs)); 2005 blk_queue_io_min(disk->queue, phys_bs); 2006 blk_queue_io_opt(disk->queue, io_opt); 2007 2008 /* 2009 * Register a metadata profile for PI, or the plain non-integrity NVMe 2010 * metadata masquerading as Type 0 if supported, otherwise reject block 2011 * I/O to namespaces with metadata except when the namespace supports 2012 * PI, as it can strip/insert in that case. 2013 */ 2014 if (head->ms) { 2015 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 2016 (head->features & NVME_NS_METADATA_SUPPORTED)) 2017 nvme_init_integrity(disk, head, 2018 ctrl->max_integrity_segments); 2019 else if (!nvme_ns_has_pi(head)) 2020 capacity = 0; 2021 } 2022 2023 set_capacity_and_notify(disk, capacity); 2024 2025 nvme_config_discard(ctrl, disk, head); 2026 blk_queue_max_write_zeroes_sectors(disk->queue, 2027 ctrl->max_zeroes_sectors); 2028 } 2029 2030 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info) 2031 { 2032 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags); 2033 } 2034 2035 static inline bool nvme_first_scan(struct gendisk *disk) 2036 { 2037 /* nvme_alloc_ns() scans the disk prior to adding it */ 2038 return !disk_live(disk); 2039 } 2040 2041 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id) 2042 { 2043 struct nvme_ctrl *ctrl = ns->ctrl; 2044 u32 iob; 2045 2046 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 2047 is_power_of_2(ctrl->max_hw_sectors)) 2048 iob = ctrl->max_hw_sectors; 2049 else 2050 iob = nvme_lba_to_sect(ns->head, le16_to_cpu(id->noiob)); 2051 2052 if (!iob) 2053 return; 2054 2055 if (!is_power_of_2(iob)) { 2056 if (nvme_first_scan(ns->disk)) 2057 pr_warn("%s: ignoring unaligned IO boundary:%u\n", 2058 ns->disk->disk_name, iob); 2059 return; 2060 } 2061 2062 if (blk_queue_is_zoned(ns->disk->queue)) { 2063 if (nvme_first_scan(ns->disk)) 2064 pr_warn("%s: ignoring zoned namespace IO boundary\n", 2065 ns->disk->disk_name); 2066 return; 2067 } 2068 2069 blk_queue_chunk_sectors(ns->queue, iob); 2070 } 2071 2072 static int nvme_update_ns_info_generic(struct nvme_ns *ns, 2073 struct nvme_ns_info *info) 2074 { 2075 blk_mq_freeze_queue(ns->disk->queue); 2076 nvme_set_queue_limits(ns->ctrl, ns->queue); 2077 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2078 blk_mq_unfreeze_queue(ns->disk->queue); 2079 2080 if (nvme_ns_head_multipath(ns->head)) { 2081 blk_mq_freeze_queue(ns->head->disk->queue); 2082 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2083 nvme_mpath_revalidate_paths(ns); 2084 blk_stack_limits(&ns->head->disk->queue->limits, 2085 &ns->queue->limits, 0); 2086 ns->head->disk->flags |= GENHD_FL_HIDDEN; 2087 blk_mq_unfreeze_queue(ns->head->disk->queue); 2088 } 2089 2090 /* Hide the block-interface for these devices */ 2091 ns->disk->flags |= GENHD_FL_HIDDEN; 2092 set_bit(NVME_NS_READY, &ns->flags); 2093 2094 return 0; 2095 } 2096 2097 static int nvme_update_ns_info_block(struct nvme_ns *ns, 2098 struct nvme_ns_info *info) 2099 { 2100 struct nvme_id_ns *id; 2101 unsigned lbaf; 2102 int ret; 2103 2104 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id); 2105 if (ret) 2106 return ret; 2107 2108 if (id->ncap == 0) { 2109 /* namespace not allocated or attached */ 2110 info->is_removed = true; 2111 ret = -ENODEV; 2112 goto error; 2113 } 2114 2115 blk_mq_freeze_queue(ns->disk->queue); 2116 lbaf = nvme_lbaf_index(id->flbas); 2117 ns->head->lba_shift = id->lbaf[lbaf].ds; 2118 ns->head->nuse = le64_to_cpu(id->nuse); 2119 nvme_set_queue_limits(ns->ctrl, ns->queue); 2120 2121 ret = nvme_configure_metadata(ns->ctrl, ns->head, id); 2122 if (ret < 0) { 2123 blk_mq_unfreeze_queue(ns->disk->queue); 2124 goto out; 2125 } 2126 nvme_set_chunk_sectors(ns, id); 2127 nvme_update_disk_info(ns->ctrl, ns->disk, ns->head, id); 2128 2129 if (ns->head->ids.csi == NVME_CSI_ZNS) { 2130 ret = nvme_update_zone_info(ns, lbaf); 2131 if (ret) { 2132 blk_mq_unfreeze_queue(ns->disk->queue); 2133 goto out; 2134 } 2135 } 2136 2137 /* 2138 * Only set the DEAC bit if the device guarantees that reads from 2139 * deallocated data return zeroes. While the DEAC bit does not 2140 * require that, it must be a no-op if reads from deallocated data 2141 * do not return zeroes. 2142 */ 2143 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3))) 2144 ns->head->features |= NVME_NS_DEAC; 2145 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2146 set_bit(NVME_NS_READY, &ns->flags); 2147 blk_mq_unfreeze_queue(ns->disk->queue); 2148 2149 if (blk_queue_is_zoned(ns->queue)) { 2150 ret = nvme_revalidate_zones(ns); 2151 if (ret && !nvme_first_scan(ns->disk)) 2152 goto out; 2153 } 2154 2155 if (nvme_ns_head_multipath(ns->head)) { 2156 blk_mq_freeze_queue(ns->head->disk->queue); 2157 nvme_update_disk_info(ns->ctrl, ns->head->disk, ns->head, id); 2158 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2159 nvme_mpath_revalidate_paths(ns); 2160 blk_stack_limits(&ns->head->disk->queue->limits, 2161 &ns->queue->limits, 0); 2162 disk_update_readahead(ns->head->disk); 2163 blk_mq_unfreeze_queue(ns->head->disk->queue); 2164 } 2165 2166 ret = 0; 2167 out: 2168 /* 2169 * If probing fails due an unsupported feature, hide the block device, 2170 * but still allow other access. 2171 */ 2172 if (ret == -ENODEV) { 2173 ns->disk->flags |= GENHD_FL_HIDDEN; 2174 set_bit(NVME_NS_READY, &ns->flags); 2175 ret = 0; 2176 } 2177 2178 error: 2179 kfree(id); 2180 return ret; 2181 } 2182 2183 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info) 2184 { 2185 switch (info->ids.csi) { 2186 case NVME_CSI_ZNS: 2187 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 2188 dev_info(ns->ctrl->device, 2189 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n", 2190 info->nsid); 2191 return nvme_update_ns_info_generic(ns, info); 2192 } 2193 return nvme_update_ns_info_block(ns, info); 2194 case NVME_CSI_NVM: 2195 return nvme_update_ns_info_block(ns, info); 2196 default: 2197 dev_info(ns->ctrl->device, 2198 "block device for nsid %u not supported (csi %u)\n", 2199 info->nsid, info->ids.csi); 2200 return nvme_update_ns_info_generic(ns, info); 2201 } 2202 } 2203 2204 #ifdef CONFIG_BLK_SED_OPAL 2205 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2206 bool send) 2207 { 2208 struct nvme_ctrl *ctrl = data; 2209 struct nvme_command cmd = { }; 2210 2211 if (send) 2212 cmd.common.opcode = nvme_admin_security_send; 2213 else 2214 cmd.common.opcode = nvme_admin_security_recv; 2215 cmd.common.nsid = 0; 2216 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 2217 cmd.common.cdw11 = cpu_to_le32(len); 2218 2219 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 2220 NVME_QID_ANY, NVME_SUBMIT_AT_HEAD); 2221 } 2222 2223 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2224 { 2225 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) { 2226 if (!ctrl->opal_dev) 2227 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit); 2228 else if (was_suspended) 2229 opal_unlock_from_suspend(ctrl->opal_dev); 2230 } else { 2231 free_opal_dev(ctrl->opal_dev); 2232 ctrl->opal_dev = NULL; 2233 } 2234 } 2235 #else 2236 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2237 { 2238 } 2239 #endif /* CONFIG_BLK_SED_OPAL */ 2240 2241 #ifdef CONFIG_BLK_DEV_ZONED 2242 static int nvme_report_zones(struct gendisk *disk, sector_t sector, 2243 unsigned int nr_zones, report_zones_cb cb, void *data) 2244 { 2245 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb, 2246 data); 2247 } 2248 #else 2249 #define nvme_report_zones NULL 2250 #endif /* CONFIG_BLK_DEV_ZONED */ 2251 2252 const struct block_device_operations nvme_bdev_ops = { 2253 .owner = THIS_MODULE, 2254 .ioctl = nvme_ioctl, 2255 .compat_ioctl = blkdev_compat_ptr_ioctl, 2256 .open = nvme_open, 2257 .release = nvme_release, 2258 .getgeo = nvme_getgeo, 2259 .report_zones = nvme_report_zones, 2260 .pr_ops = &nvme_pr_ops, 2261 }; 2262 2263 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val, 2264 u32 timeout, const char *op) 2265 { 2266 unsigned long timeout_jiffies = jiffies + timeout * HZ; 2267 u32 csts; 2268 int ret; 2269 2270 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2271 if (csts == ~0) 2272 return -ENODEV; 2273 if ((csts & mask) == val) 2274 break; 2275 2276 usleep_range(1000, 2000); 2277 if (fatal_signal_pending(current)) 2278 return -EINTR; 2279 if (time_after(jiffies, timeout_jiffies)) { 2280 dev_err(ctrl->device, 2281 "Device not ready; aborting %s, CSTS=0x%x\n", 2282 op, csts); 2283 return -ENODEV; 2284 } 2285 } 2286 2287 return ret; 2288 } 2289 2290 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown) 2291 { 2292 int ret; 2293 2294 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2295 if (shutdown) 2296 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 2297 else 2298 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 2299 2300 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2301 if (ret) 2302 return ret; 2303 2304 if (shutdown) { 2305 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK, 2306 NVME_CSTS_SHST_CMPLT, 2307 ctrl->shutdown_timeout, "shutdown"); 2308 } 2309 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 2310 msleep(NVME_QUIRK_DELAY_AMOUNT); 2311 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0, 2312 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset"); 2313 } 2314 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 2315 2316 int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 2317 { 2318 unsigned dev_page_min; 2319 u32 timeout; 2320 int ret; 2321 2322 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2323 if (ret) { 2324 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2325 return ret; 2326 } 2327 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2328 2329 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) { 2330 dev_err(ctrl->device, 2331 "Minimum device page size %u too large for host (%u)\n", 2332 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT); 2333 return -ENODEV; 2334 } 2335 2336 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI) 2337 ctrl->ctrl_config = NVME_CC_CSS_CSI; 2338 else 2339 ctrl->ctrl_config = NVME_CC_CSS_NVM; 2340 2341 if (ctrl->cap & NVME_CAP_CRMS_CRWMS && ctrl->cap & NVME_CAP_CRMS_CRIMS) 2342 ctrl->ctrl_config |= NVME_CC_CRIME; 2343 2344 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; 2345 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 2346 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 2347 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2348 if (ret) 2349 return ret; 2350 2351 /* Flush write to device (required if transport is PCI) */ 2352 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config); 2353 if (ret) 2354 return ret; 2355 2356 /* CAP value may change after initial CC write */ 2357 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2358 if (ret) 2359 return ret; 2360 2361 timeout = NVME_CAP_TIMEOUT(ctrl->cap); 2362 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) { 2363 u32 crto, ready_timeout; 2364 2365 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto); 2366 if (ret) { 2367 dev_err(ctrl->device, "Reading CRTO failed (%d)\n", 2368 ret); 2369 return ret; 2370 } 2371 2372 /* 2373 * CRTO should always be greater or equal to CAP.TO, but some 2374 * devices are known to get this wrong. Use the larger of the 2375 * two values. 2376 */ 2377 if (ctrl->ctrl_config & NVME_CC_CRIME) 2378 ready_timeout = NVME_CRTO_CRIMT(crto); 2379 else 2380 ready_timeout = NVME_CRTO_CRWMT(crto); 2381 2382 if (ready_timeout < timeout) 2383 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n", 2384 crto, ctrl->cap); 2385 else 2386 timeout = ready_timeout; 2387 } 2388 2389 ctrl->ctrl_config |= NVME_CC_ENABLE; 2390 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2391 if (ret) 2392 return ret; 2393 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY, 2394 (timeout + 1) / 2, "initialisation"); 2395 } 2396 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 2397 2398 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 2399 { 2400 __le64 ts; 2401 int ret; 2402 2403 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 2404 return 0; 2405 2406 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 2407 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 2408 NULL); 2409 if (ret) 2410 dev_warn_once(ctrl->device, 2411 "could not set timestamp (%d)\n", ret); 2412 return ret; 2413 } 2414 2415 static int nvme_configure_host_options(struct nvme_ctrl *ctrl) 2416 { 2417 struct nvme_feat_host_behavior *host; 2418 u8 acre = 0, lbafee = 0; 2419 int ret; 2420 2421 /* Don't bother enabling the feature if retry delay is not reported */ 2422 if (ctrl->crdt[0]) 2423 acre = NVME_ENABLE_ACRE; 2424 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) 2425 lbafee = NVME_ENABLE_LBAFEE; 2426 2427 if (!acre && !lbafee) 2428 return 0; 2429 2430 host = kzalloc(sizeof(*host), GFP_KERNEL); 2431 if (!host) 2432 return 0; 2433 2434 host->acre = acre; 2435 host->lbafee = lbafee; 2436 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 2437 host, sizeof(*host), NULL); 2438 kfree(host); 2439 return ret; 2440 } 2441 2442 /* 2443 * The function checks whether the given total (exlat + enlat) latency of 2444 * a power state allows the latter to be used as an APST transition target. 2445 * It does so by comparing the latency to the primary and secondary latency 2446 * tolerances defined by module params. If there's a match, the corresponding 2447 * timeout value is returned and the matching tolerance index (1 or 2) is 2448 * reported. 2449 */ 2450 static bool nvme_apst_get_transition_time(u64 total_latency, 2451 u64 *transition_time, unsigned *last_index) 2452 { 2453 if (total_latency <= apst_primary_latency_tol_us) { 2454 if (*last_index == 1) 2455 return false; 2456 *last_index = 1; 2457 *transition_time = apst_primary_timeout_ms; 2458 return true; 2459 } 2460 if (apst_secondary_timeout_ms && 2461 total_latency <= apst_secondary_latency_tol_us) { 2462 if (*last_index <= 2) 2463 return false; 2464 *last_index = 2; 2465 *transition_time = apst_secondary_timeout_ms; 2466 return true; 2467 } 2468 return false; 2469 } 2470 2471 /* 2472 * APST (Autonomous Power State Transition) lets us program a table of power 2473 * state transitions that the controller will perform automatically. 2474 * 2475 * Depending on module params, one of the two supported techniques will be used: 2476 * 2477 * - If the parameters provide explicit timeouts and tolerances, they will be 2478 * used to build a table with up to 2 non-operational states to transition to. 2479 * The default parameter values were selected based on the values used by 2480 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic 2481 * regeneration of the APST table in the event of switching between external 2482 * and battery power, the timeouts and tolerances reflect a compromise 2483 * between values used by Microsoft for AC and battery scenarios. 2484 * - If not, we'll configure the table with a simple heuristic: we are willing 2485 * to spend at most 2% of the time transitioning between power states. 2486 * Therefore, when running in any given state, we will enter the next 2487 * lower-power non-operational state after waiting 50 * (enlat + exlat) 2488 * microseconds, as long as that state's exit latency is under the requested 2489 * maximum latency. 2490 * 2491 * We will not autonomously enter any non-operational state for which the total 2492 * latency exceeds ps_max_latency_us. 2493 * 2494 * Users can set ps_max_latency_us to zero to turn off APST. 2495 */ 2496 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 2497 { 2498 struct nvme_feat_auto_pst *table; 2499 unsigned apste = 0; 2500 u64 max_lat_us = 0; 2501 __le64 target = 0; 2502 int max_ps = -1; 2503 int state; 2504 int ret; 2505 unsigned last_lt_index = UINT_MAX; 2506 2507 /* 2508 * If APST isn't supported or if we haven't been initialized yet, 2509 * then don't do anything. 2510 */ 2511 if (!ctrl->apsta) 2512 return 0; 2513 2514 if (ctrl->npss > 31) { 2515 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2516 return 0; 2517 } 2518 2519 table = kzalloc(sizeof(*table), GFP_KERNEL); 2520 if (!table) 2521 return 0; 2522 2523 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2524 /* Turn off APST. */ 2525 dev_dbg(ctrl->device, "APST disabled\n"); 2526 goto done; 2527 } 2528 2529 /* 2530 * Walk through all states from lowest- to highest-power. 2531 * According to the spec, lower-numbered states use more power. NPSS, 2532 * despite the name, is the index of the lowest-power state, not the 2533 * number of states. 2534 */ 2535 for (state = (int)ctrl->npss; state >= 0; state--) { 2536 u64 total_latency_us, exit_latency_us, transition_ms; 2537 2538 if (target) 2539 table->entries[state] = target; 2540 2541 /* 2542 * Don't allow transitions to the deepest state if it's quirked 2543 * off. 2544 */ 2545 if (state == ctrl->npss && 2546 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2547 continue; 2548 2549 /* 2550 * Is this state a useful non-operational state for higher-power 2551 * states to autonomously transition to? 2552 */ 2553 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE)) 2554 continue; 2555 2556 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2557 if (exit_latency_us > ctrl->ps_max_latency_us) 2558 continue; 2559 2560 total_latency_us = exit_latency_us + 2561 le32_to_cpu(ctrl->psd[state].entry_lat); 2562 2563 /* 2564 * This state is good. It can be used as the APST idle target 2565 * for higher power states. 2566 */ 2567 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) { 2568 if (!nvme_apst_get_transition_time(total_latency_us, 2569 &transition_ms, &last_lt_index)) 2570 continue; 2571 } else { 2572 transition_ms = total_latency_us + 19; 2573 do_div(transition_ms, 20); 2574 if (transition_ms > (1 << 24) - 1) 2575 transition_ms = (1 << 24) - 1; 2576 } 2577 2578 target = cpu_to_le64((state << 3) | (transition_ms << 8)); 2579 if (max_ps == -1) 2580 max_ps = state; 2581 if (total_latency_us > max_lat_us) 2582 max_lat_us = total_latency_us; 2583 } 2584 2585 if (max_ps == -1) 2586 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2587 else 2588 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2589 max_ps, max_lat_us, (int)sizeof(*table), table); 2590 apste = 1; 2591 2592 done: 2593 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2594 table, sizeof(*table), NULL); 2595 if (ret) 2596 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2597 kfree(table); 2598 return ret; 2599 } 2600 2601 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2602 { 2603 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2604 u64 latency; 2605 2606 switch (val) { 2607 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2608 case PM_QOS_LATENCY_ANY: 2609 latency = U64_MAX; 2610 break; 2611 2612 default: 2613 latency = val; 2614 } 2615 2616 if (ctrl->ps_max_latency_us != latency) { 2617 ctrl->ps_max_latency_us = latency; 2618 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 2619 nvme_configure_apst(ctrl); 2620 } 2621 } 2622 2623 struct nvme_core_quirk_entry { 2624 /* 2625 * NVMe model and firmware strings are padded with spaces. For 2626 * simplicity, strings in the quirk table are padded with NULLs 2627 * instead. 2628 */ 2629 u16 vid; 2630 const char *mn; 2631 const char *fr; 2632 unsigned long quirks; 2633 }; 2634 2635 static const struct nvme_core_quirk_entry core_quirks[] = { 2636 { 2637 /* 2638 * This Toshiba device seems to die using any APST states. See: 2639 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2640 */ 2641 .vid = 0x1179, 2642 .mn = "THNSF5256GPUK TOSHIBA", 2643 .quirks = NVME_QUIRK_NO_APST, 2644 }, 2645 { 2646 /* 2647 * This LiteON CL1-3D*-Q11 firmware version has a race 2648 * condition associated with actions related to suspend to idle 2649 * LiteON has resolved the problem in future firmware 2650 */ 2651 .vid = 0x14a4, 2652 .fr = "22301111", 2653 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 2654 }, 2655 { 2656 /* 2657 * This Kioxia CD6-V Series / HPE PE8030 device times out and 2658 * aborts I/O during any load, but more easily reproducible 2659 * with discards (fstrim). 2660 * 2661 * The device is left in a state where it is also not possible 2662 * to use "nvme set-feature" to disable APST, but booting with 2663 * nvme_core.default_ps_max_latency=0 works. 2664 */ 2665 .vid = 0x1e0f, 2666 .mn = "KCD6XVUL6T40", 2667 .quirks = NVME_QUIRK_NO_APST, 2668 }, 2669 { 2670 /* 2671 * The external Samsung X5 SSD fails initialization without a 2672 * delay before checking if it is ready and has a whole set of 2673 * other problems. To make this even more interesting, it 2674 * shares the PCI ID with internal Samsung 970 Evo Plus that 2675 * does not need or want these quirks. 2676 */ 2677 .vid = 0x144d, 2678 .mn = "Samsung Portable SSD X5", 2679 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY | 2680 NVME_QUIRK_NO_DEEPEST_PS | 2681 NVME_QUIRK_IGNORE_DEV_SUBNQN, 2682 } 2683 }; 2684 2685 /* match is null-terminated but idstr is space-padded. */ 2686 static bool string_matches(const char *idstr, const char *match, size_t len) 2687 { 2688 size_t matchlen; 2689 2690 if (!match) 2691 return true; 2692 2693 matchlen = strlen(match); 2694 WARN_ON_ONCE(matchlen > len); 2695 2696 if (memcmp(idstr, match, matchlen)) 2697 return false; 2698 2699 for (; matchlen < len; matchlen++) 2700 if (idstr[matchlen] != ' ') 2701 return false; 2702 2703 return true; 2704 } 2705 2706 static bool quirk_matches(const struct nvme_id_ctrl *id, 2707 const struct nvme_core_quirk_entry *q) 2708 { 2709 return q->vid == le16_to_cpu(id->vid) && 2710 string_matches(id->mn, q->mn, sizeof(id->mn)) && 2711 string_matches(id->fr, q->fr, sizeof(id->fr)); 2712 } 2713 2714 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 2715 struct nvme_id_ctrl *id) 2716 { 2717 size_t nqnlen; 2718 int off; 2719 2720 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 2721 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 2722 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 2723 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 2724 return; 2725 } 2726 2727 if (ctrl->vs >= NVME_VS(1, 2, 1)) 2728 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 2729 } 2730 2731 /* 2732 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe 2733 * Base Specification 2.0. It is slightly different from the format 2734 * specified there due to historic reasons, and we can't change it now. 2735 */ 2736 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 2737 "nqn.2014.08.org.nvmexpress:%04x%04x", 2738 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 2739 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 2740 off += sizeof(id->sn); 2741 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 2742 off += sizeof(id->mn); 2743 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 2744 } 2745 2746 static void nvme_release_subsystem(struct device *dev) 2747 { 2748 struct nvme_subsystem *subsys = 2749 container_of(dev, struct nvme_subsystem, dev); 2750 2751 if (subsys->instance >= 0) 2752 ida_free(&nvme_instance_ida, subsys->instance); 2753 kfree(subsys); 2754 } 2755 2756 static void nvme_destroy_subsystem(struct kref *ref) 2757 { 2758 struct nvme_subsystem *subsys = 2759 container_of(ref, struct nvme_subsystem, ref); 2760 2761 mutex_lock(&nvme_subsystems_lock); 2762 list_del(&subsys->entry); 2763 mutex_unlock(&nvme_subsystems_lock); 2764 2765 ida_destroy(&subsys->ns_ida); 2766 device_del(&subsys->dev); 2767 put_device(&subsys->dev); 2768 } 2769 2770 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 2771 { 2772 kref_put(&subsys->ref, nvme_destroy_subsystem); 2773 } 2774 2775 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 2776 { 2777 struct nvme_subsystem *subsys; 2778 2779 lockdep_assert_held(&nvme_subsystems_lock); 2780 2781 /* 2782 * Fail matches for discovery subsystems. This results 2783 * in each discovery controller bound to a unique subsystem. 2784 * This avoids issues with validating controller values 2785 * that can only be true when there is a single unique subsystem. 2786 * There may be multiple and completely independent entities 2787 * that provide discovery controllers. 2788 */ 2789 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME)) 2790 return NULL; 2791 2792 list_for_each_entry(subsys, &nvme_subsystems, entry) { 2793 if (strcmp(subsys->subnqn, subsysnqn)) 2794 continue; 2795 if (!kref_get_unless_zero(&subsys->ref)) 2796 continue; 2797 return subsys; 2798 } 2799 2800 return NULL; 2801 } 2802 2803 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl) 2804 { 2805 return ctrl->opts && ctrl->opts->discovery_nqn; 2806 } 2807 2808 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, 2809 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2810 { 2811 struct nvme_ctrl *tmp; 2812 2813 lockdep_assert_held(&nvme_subsystems_lock); 2814 2815 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) { 2816 if (nvme_state_terminal(tmp)) 2817 continue; 2818 2819 if (tmp->cntlid == ctrl->cntlid) { 2820 dev_err(ctrl->device, 2821 "Duplicate cntlid %u with %s, subsys %s, rejecting\n", 2822 ctrl->cntlid, dev_name(tmp->device), 2823 subsys->subnqn); 2824 return false; 2825 } 2826 2827 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) || 2828 nvme_discovery_ctrl(ctrl)) 2829 continue; 2830 2831 dev_err(ctrl->device, 2832 "Subsystem does not support multiple controllers\n"); 2833 return false; 2834 } 2835 2836 return true; 2837 } 2838 2839 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2840 { 2841 struct nvme_subsystem *subsys, *found; 2842 int ret; 2843 2844 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 2845 if (!subsys) 2846 return -ENOMEM; 2847 2848 subsys->instance = -1; 2849 mutex_init(&subsys->lock); 2850 kref_init(&subsys->ref); 2851 INIT_LIST_HEAD(&subsys->ctrls); 2852 INIT_LIST_HEAD(&subsys->nsheads); 2853 nvme_init_subnqn(subsys, ctrl, id); 2854 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 2855 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 2856 subsys->vendor_id = le16_to_cpu(id->vid); 2857 subsys->cmic = id->cmic; 2858 2859 /* Versions prior to 1.4 don't necessarily report a valid type */ 2860 if (id->cntrltype == NVME_CTRL_DISC || 2861 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME)) 2862 subsys->subtype = NVME_NQN_DISC; 2863 else 2864 subsys->subtype = NVME_NQN_NVME; 2865 2866 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) { 2867 dev_err(ctrl->device, 2868 "Subsystem %s is not a discovery controller", 2869 subsys->subnqn); 2870 kfree(subsys); 2871 return -EINVAL; 2872 } 2873 subsys->awupf = le16_to_cpu(id->awupf); 2874 nvme_mpath_default_iopolicy(subsys); 2875 2876 subsys->dev.class = nvme_subsys_class; 2877 subsys->dev.release = nvme_release_subsystem; 2878 subsys->dev.groups = nvme_subsys_attrs_groups; 2879 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance); 2880 device_initialize(&subsys->dev); 2881 2882 mutex_lock(&nvme_subsystems_lock); 2883 found = __nvme_find_get_subsystem(subsys->subnqn); 2884 if (found) { 2885 put_device(&subsys->dev); 2886 subsys = found; 2887 2888 if (!nvme_validate_cntlid(subsys, ctrl, id)) { 2889 ret = -EINVAL; 2890 goto out_put_subsystem; 2891 } 2892 } else { 2893 ret = device_add(&subsys->dev); 2894 if (ret) { 2895 dev_err(ctrl->device, 2896 "failed to register subsystem device.\n"); 2897 put_device(&subsys->dev); 2898 goto out_unlock; 2899 } 2900 ida_init(&subsys->ns_ida); 2901 list_add_tail(&subsys->entry, &nvme_subsystems); 2902 } 2903 2904 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 2905 dev_name(ctrl->device)); 2906 if (ret) { 2907 dev_err(ctrl->device, 2908 "failed to create sysfs link from subsystem.\n"); 2909 goto out_put_subsystem; 2910 } 2911 2912 if (!found) 2913 subsys->instance = ctrl->instance; 2914 ctrl->subsys = subsys; 2915 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 2916 mutex_unlock(&nvme_subsystems_lock); 2917 return 0; 2918 2919 out_put_subsystem: 2920 nvme_put_subsystem(subsys); 2921 out_unlock: 2922 mutex_unlock(&nvme_subsystems_lock); 2923 return ret; 2924 } 2925 2926 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 2927 void *log, size_t size, u64 offset) 2928 { 2929 struct nvme_command c = { }; 2930 u32 dwlen = nvme_bytes_to_numd(size); 2931 2932 c.get_log_page.opcode = nvme_admin_get_log_page; 2933 c.get_log_page.nsid = cpu_to_le32(nsid); 2934 c.get_log_page.lid = log_page; 2935 c.get_log_page.lsp = lsp; 2936 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 2937 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 2938 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 2939 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 2940 c.get_log_page.csi = csi; 2941 2942 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 2943 } 2944 2945 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi, 2946 struct nvme_effects_log **log) 2947 { 2948 struct nvme_effects_log *cel = xa_load(&ctrl->cels, csi); 2949 int ret; 2950 2951 if (cel) 2952 goto out; 2953 2954 cel = kzalloc(sizeof(*cel), GFP_KERNEL); 2955 if (!cel) 2956 return -ENOMEM; 2957 2958 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi, 2959 cel, sizeof(*cel), 0); 2960 if (ret) { 2961 kfree(cel); 2962 return ret; 2963 } 2964 2965 xa_store(&ctrl->cels, csi, cel, GFP_KERNEL); 2966 out: 2967 *log = cel; 2968 return 0; 2969 } 2970 2971 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units) 2972 { 2973 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val; 2974 2975 if (check_shl_overflow(1U, units + page_shift - 9, &val)) 2976 return UINT_MAX; 2977 return val; 2978 } 2979 2980 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl) 2981 { 2982 struct nvme_command c = { }; 2983 struct nvme_id_ctrl_nvm *id; 2984 int ret; 2985 2986 /* 2987 * Even though NVMe spec explicitly states that MDTS is not applicable 2988 * to the write-zeroes, we are cautious and limit the size to the 2989 * controllers max_hw_sectors value, which is based on the MDTS field 2990 * and possibly other limiting factors. 2991 */ 2992 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) && 2993 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)) 2994 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors; 2995 else 2996 ctrl->max_zeroes_sectors = 0; 2997 2998 if (ctrl->subsys->subtype != NVME_NQN_NVME || 2999 nvme_ctrl_limited_cns(ctrl) || 3000 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags)) 3001 return 0; 3002 3003 id = kzalloc(sizeof(*id), GFP_KERNEL); 3004 if (!id) 3005 return -ENOMEM; 3006 3007 c.identify.opcode = nvme_admin_identify; 3008 c.identify.cns = NVME_ID_CNS_CS_CTRL; 3009 c.identify.csi = NVME_CSI_NVM; 3010 3011 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 3012 if (ret) 3013 goto free_data; 3014 3015 ctrl->dmrl = id->dmrl; 3016 ctrl->dmrsl = le32_to_cpu(id->dmrsl); 3017 if (id->wzsl) 3018 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl); 3019 3020 free_data: 3021 if (ret > 0) 3022 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags); 3023 kfree(id); 3024 return ret; 3025 } 3026 3027 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl) 3028 { 3029 struct nvme_effects_log *log = ctrl->effects; 3030 3031 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 3032 NVME_CMD_EFFECTS_NCC | 3033 NVME_CMD_EFFECTS_CSE_MASK); 3034 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 3035 NVME_CMD_EFFECTS_CSE_MASK); 3036 3037 /* 3038 * The spec says the result of a security receive command depends on 3039 * the previous security send command. As such, many vendors log this 3040 * command as one to submitted only when no other commands to the same 3041 * namespace are outstanding. The intention is to tell the host to 3042 * prevent mixing security send and receive. 3043 * 3044 * This driver can only enforce such exclusive access against IO 3045 * queues, though. We are not readily able to enforce such a rule for 3046 * two commands to the admin queue, which is the only queue that 3047 * matters for this command. 3048 * 3049 * Rather than blindly freezing the IO queues for this effect that 3050 * doesn't even apply to IO, mask it off. 3051 */ 3052 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK); 3053 3054 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3055 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3056 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3057 } 3058 3059 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 3060 { 3061 int ret = 0; 3062 3063 if (ctrl->effects) 3064 return 0; 3065 3066 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 3067 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 3068 if (ret < 0) 3069 return ret; 3070 } 3071 3072 if (!ctrl->effects) { 3073 ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL); 3074 if (!ctrl->effects) 3075 return -ENOMEM; 3076 xa_store(&ctrl->cels, NVME_CSI_NVM, ctrl->effects, GFP_KERNEL); 3077 } 3078 3079 nvme_init_known_nvm_effects(ctrl); 3080 return 0; 3081 } 3082 3083 static int nvme_check_ctrl_fabric_info(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 3084 { 3085 /* 3086 * In fabrics we need to verify the cntlid matches the 3087 * admin connect 3088 */ 3089 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 3090 dev_err(ctrl->device, 3091 "Mismatching cntlid: Connect %u vs Identify %u, rejecting\n", 3092 ctrl->cntlid, le16_to_cpu(id->cntlid)); 3093 return -EINVAL; 3094 } 3095 3096 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) { 3097 dev_err(ctrl->device, 3098 "keep-alive support is mandatory for fabrics\n"); 3099 return -EINVAL; 3100 } 3101 3102 if (!nvme_discovery_ctrl(ctrl) && ctrl->ioccsz < 4) { 3103 dev_err(ctrl->device, 3104 "I/O queue command capsule supported size %d < 4\n", 3105 ctrl->ioccsz); 3106 return -EINVAL; 3107 } 3108 3109 if (!nvme_discovery_ctrl(ctrl) && ctrl->iorcsz < 1) { 3110 dev_err(ctrl->device, 3111 "I/O queue response capsule supported size %d < 1\n", 3112 ctrl->iorcsz); 3113 return -EINVAL; 3114 } 3115 3116 return 0; 3117 } 3118 3119 static int nvme_init_identify(struct nvme_ctrl *ctrl) 3120 { 3121 struct nvme_id_ctrl *id; 3122 u32 max_hw_sectors; 3123 bool prev_apst_enabled; 3124 int ret; 3125 3126 ret = nvme_identify_ctrl(ctrl, &id); 3127 if (ret) { 3128 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 3129 return -EIO; 3130 } 3131 3132 if (!(ctrl->ops->flags & NVME_F_FABRICS)) 3133 ctrl->cntlid = le16_to_cpu(id->cntlid); 3134 3135 if (!ctrl->identified) { 3136 unsigned int i; 3137 3138 /* 3139 * Check for quirks. Quirk can depend on firmware version, 3140 * so, in principle, the set of quirks present can change 3141 * across a reset. As a possible future enhancement, we 3142 * could re-scan for quirks every time we reinitialize 3143 * the device, but we'd have to make sure that the driver 3144 * behaves intelligently if the quirks change. 3145 */ 3146 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 3147 if (quirk_matches(id, &core_quirks[i])) 3148 ctrl->quirks |= core_quirks[i].quirks; 3149 } 3150 3151 ret = nvme_init_subsystem(ctrl, id); 3152 if (ret) 3153 goto out_free; 3154 3155 ret = nvme_init_effects(ctrl, id); 3156 if (ret) 3157 goto out_free; 3158 } 3159 memcpy(ctrl->subsys->firmware_rev, id->fr, 3160 sizeof(ctrl->subsys->firmware_rev)); 3161 3162 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 3163 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 3164 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 3165 } 3166 3167 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 3168 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 3169 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 3170 3171 ctrl->oacs = le16_to_cpu(id->oacs); 3172 ctrl->oncs = le16_to_cpu(id->oncs); 3173 ctrl->mtfa = le16_to_cpu(id->mtfa); 3174 ctrl->oaes = le32_to_cpu(id->oaes); 3175 ctrl->wctemp = le16_to_cpu(id->wctemp); 3176 ctrl->cctemp = le16_to_cpu(id->cctemp); 3177 3178 atomic_set(&ctrl->abort_limit, id->acl + 1); 3179 ctrl->vwc = id->vwc; 3180 if (id->mdts) 3181 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts); 3182 else 3183 max_hw_sectors = UINT_MAX; 3184 ctrl->max_hw_sectors = 3185 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 3186 3187 nvme_set_queue_limits(ctrl, ctrl->admin_q); 3188 ctrl->sgls = le32_to_cpu(id->sgls); 3189 ctrl->kas = le16_to_cpu(id->kas); 3190 ctrl->max_namespaces = le32_to_cpu(id->mnan); 3191 ctrl->ctratt = le32_to_cpu(id->ctratt); 3192 3193 ctrl->cntrltype = id->cntrltype; 3194 ctrl->dctype = id->dctype; 3195 3196 if (id->rtd3e) { 3197 /* us -> s */ 3198 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC; 3199 3200 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 3201 shutdown_timeout, 60); 3202 3203 if (ctrl->shutdown_timeout != shutdown_timeout) 3204 dev_info(ctrl->device, 3205 "Shutdown timeout set to %u seconds\n", 3206 ctrl->shutdown_timeout); 3207 } else 3208 ctrl->shutdown_timeout = shutdown_timeout; 3209 3210 ctrl->npss = id->npss; 3211 ctrl->apsta = id->apsta; 3212 prev_apst_enabled = ctrl->apst_enabled; 3213 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 3214 if (force_apst && id->apsta) { 3215 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 3216 ctrl->apst_enabled = true; 3217 } else { 3218 ctrl->apst_enabled = false; 3219 } 3220 } else { 3221 ctrl->apst_enabled = id->apsta; 3222 } 3223 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 3224 3225 if (ctrl->ops->flags & NVME_F_FABRICS) { 3226 ctrl->icdoff = le16_to_cpu(id->icdoff); 3227 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 3228 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 3229 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 3230 3231 ret = nvme_check_ctrl_fabric_info(ctrl, id); 3232 if (ret) 3233 goto out_free; 3234 } else { 3235 ctrl->hmpre = le32_to_cpu(id->hmpre); 3236 ctrl->hmmin = le32_to_cpu(id->hmmin); 3237 ctrl->hmminds = le32_to_cpu(id->hmminds); 3238 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 3239 } 3240 3241 ret = nvme_mpath_init_identify(ctrl, id); 3242 if (ret < 0) 3243 goto out_free; 3244 3245 if (ctrl->apst_enabled && !prev_apst_enabled) 3246 dev_pm_qos_expose_latency_tolerance(ctrl->device); 3247 else if (!ctrl->apst_enabled && prev_apst_enabled) 3248 dev_pm_qos_hide_latency_tolerance(ctrl->device); 3249 3250 out_free: 3251 kfree(id); 3252 return ret; 3253 } 3254 3255 /* 3256 * Initialize the cached copies of the Identify data and various controller 3257 * register in our nvme_ctrl structure. This should be called as soon as 3258 * the admin queue is fully up and running. 3259 */ 3260 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended) 3261 { 3262 int ret; 3263 3264 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 3265 if (ret) { 3266 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 3267 return ret; 3268 } 3269 3270 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize); 3271 3272 if (ctrl->vs >= NVME_VS(1, 1, 0)) 3273 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap); 3274 3275 ret = nvme_init_identify(ctrl); 3276 if (ret) 3277 return ret; 3278 3279 ret = nvme_configure_apst(ctrl); 3280 if (ret < 0) 3281 return ret; 3282 3283 ret = nvme_configure_timestamp(ctrl); 3284 if (ret < 0) 3285 return ret; 3286 3287 ret = nvme_configure_host_options(ctrl); 3288 if (ret < 0) 3289 return ret; 3290 3291 nvme_configure_opal(ctrl, was_suspended); 3292 3293 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) { 3294 /* 3295 * Do not return errors unless we are in a controller reset, 3296 * the controller works perfectly fine without hwmon. 3297 */ 3298 ret = nvme_hwmon_init(ctrl); 3299 if (ret == -EINTR) 3300 return ret; 3301 } 3302 3303 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags); 3304 ctrl->identified = true; 3305 3306 nvme_start_keep_alive(ctrl); 3307 3308 return 0; 3309 } 3310 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish); 3311 3312 static int nvme_dev_open(struct inode *inode, struct file *file) 3313 { 3314 struct nvme_ctrl *ctrl = 3315 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3316 3317 switch (nvme_ctrl_state(ctrl)) { 3318 case NVME_CTRL_LIVE: 3319 break; 3320 default: 3321 return -EWOULDBLOCK; 3322 } 3323 3324 nvme_get_ctrl(ctrl); 3325 if (!try_module_get(ctrl->ops->module)) { 3326 nvme_put_ctrl(ctrl); 3327 return -EINVAL; 3328 } 3329 3330 file->private_data = ctrl; 3331 return 0; 3332 } 3333 3334 static int nvme_dev_release(struct inode *inode, struct file *file) 3335 { 3336 struct nvme_ctrl *ctrl = 3337 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3338 3339 module_put(ctrl->ops->module); 3340 nvme_put_ctrl(ctrl); 3341 return 0; 3342 } 3343 3344 static const struct file_operations nvme_dev_fops = { 3345 .owner = THIS_MODULE, 3346 .open = nvme_dev_open, 3347 .release = nvme_dev_release, 3348 .unlocked_ioctl = nvme_dev_ioctl, 3349 .compat_ioctl = compat_ptr_ioctl, 3350 .uring_cmd = nvme_dev_uring_cmd, 3351 }; 3352 3353 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl, 3354 unsigned nsid) 3355 { 3356 struct nvme_ns_head *h; 3357 3358 lockdep_assert_held(&ctrl->subsys->lock); 3359 3360 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) { 3361 /* 3362 * Private namespaces can share NSIDs under some conditions. 3363 * In that case we can't use the same ns_head for namespaces 3364 * with the same NSID. 3365 */ 3366 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h)) 3367 continue; 3368 if (!list_empty(&h->list) && nvme_tryget_ns_head(h)) 3369 return h; 3370 } 3371 3372 return NULL; 3373 } 3374 3375 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys, 3376 struct nvme_ns_ids *ids) 3377 { 3378 bool has_uuid = !uuid_is_null(&ids->uuid); 3379 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid)); 3380 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 3381 struct nvme_ns_head *h; 3382 3383 lockdep_assert_held(&subsys->lock); 3384 3385 list_for_each_entry(h, &subsys->nsheads, entry) { 3386 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid)) 3387 return -EINVAL; 3388 if (has_nguid && 3389 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0) 3390 return -EINVAL; 3391 if (has_eui64 && 3392 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0) 3393 return -EINVAL; 3394 } 3395 3396 return 0; 3397 } 3398 3399 static void nvme_cdev_rel(struct device *dev) 3400 { 3401 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt)); 3402 } 3403 3404 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device) 3405 { 3406 cdev_device_del(cdev, cdev_device); 3407 put_device(cdev_device); 3408 } 3409 3410 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 3411 const struct file_operations *fops, struct module *owner) 3412 { 3413 int minor, ret; 3414 3415 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL); 3416 if (minor < 0) 3417 return minor; 3418 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor); 3419 cdev_device->class = nvme_ns_chr_class; 3420 cdev_device->release = nvme_cdev_rel; 3421 device_initialize(cdev_device); 3422 cdev_init(cdev, fops); 3423 cdev->owner = owner; 3424 ret = cdev_device_add(cdev, cdev_device); 3425 if (ret) 3426 put_device(cdev_device); 3427 3428 return ret; 3429 } 3430 3431 static int nvme_ns_chr_open(struct inode *inode, struct file *file) 3432 { 3433 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3434 } 3435 3436 static int nvme_ns_chr_release(struct inode *inode, struct file *file) 3437 { 3438 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3439 return 0; 3440 } 3441 3442 static const struct file_operations nvme_ns_chr_fops = { 3443 .owner = THIS_MODULE, 3444 .open = nvme_ns_chr_open, 3445 .release = nvme_ns_chr_release, 3446 .unlocked_ioctl = nvme_ns_chr_ioctl, 3447 .compat_ioctl = compat_ptr_ioctl, 3448 .uring_cmd = nvme_ns_chr_uring_cmd, 3449 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll, 3450 }; 3451 3452 static int nvme_add_ns_cdev(struct nvme_ns *ns) 3453 { 3454 int ret; 3455 3456 ns->cdev_device.parent = ns->ctrl->device; 3457 ret = dev_set_name(&ns->cdev_device, "ng%dn%d", 3458 ns->ctrl->instance, ns->head->instance); 3459 if (ret) 3460 return ret; 3461 3462 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops, 3463 ns->ctrl->ops->module); 3464 } 3465 3466 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 3467 struct nvme_ns_info *info) 3468 { 3469 struct nvme_ns_head *head; 3470 size_t size = sizeof(*head); 3471 int ret = -ENOMEM; 3472 3473 #ifdef CONFIG_NVME_MULTIPATH 3474 size += num_possible_nodes() * sizeof(struct nvme_ns *); 3475 #endif 3476 3477 head = kzalloc(size, GFP_KERNEL); 3478 if (!head) 3479 goto out; 3480 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL); 3481 if (ret < 0) 3482 goto out_free_head; 3483 head->instance = ret; 3484 INIT_LIST_HEAD(&head->list); 3485 ret = init_srcu_struct(&head->srcu); 3486 if (ret) 3487 goto out_ida_remove; 3488 head->subsys = ctrl->subsys; 3489 head->ns_id = info->nsid; 3490 head->ids = info->ids; 3491 head->shared = info->is_shared; 3492 ratelimit_state_init(&head->rs_nuse, 5 * HZ, 1); 3493 ratelimit_set_flags(&head->rs_nuse, RATELIMIT_MSG_ON_RELEASE); 3494 kref_init(&head->ref); 3495 3496 if (head->ids.csi) { 3497 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects); 3498 if (ret) 3499 goto out_cleanup_srcu; 3500 } else 3501 head->effects = ctrl->effects; 3502 3503 ret = nvme_mpath_alloc_disk(ctrl, head); 3504 if (ret) 3505 goto out_cleanup_srcu; 3506 3507 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 3508 3509 kref_get(&ctrl->subsys->ref); 3510 3511 return head; 3512 out_cleanup_srcu: 3513 cleanup_srcu_struct(&head->srcu); 3514 out_ida_remove: 3515 ida_free(&ctrl->subsys->ns_ida, head->instance); 3516 out_free_head: 3517 kfree(head); 3518 out: 3519 if (ret > 0) 3520 ret = blk_status_to_errno(nvme_error_status(ret)); 3521 return ERR_PTR(ret); 3522 } 3523 3524 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this, 3525 struct nvme_ns_ids *ids) 3526 { 3527 struct nvme_subsystem *s; 3528 int ret = 0; 3529 3530 /* 3531 * Note that this check is racy as we try to avoid holding the global 3532 * lock over the whole ns_head creation. But it is only intended as 3533 * a sanity check anyway. 3534 */ 3535 mutex_lock(&nvme_subsystems_lock); 3536 list_for_each_entry(s, &nvme_subsystems, entry) { 3537 if (s == this) 3538 continue; 3539 mutex_lock(&s->lock); 3540 ret = nvme_subsys_check_duplicate_ids(s, ids); 3541 mutex_unlock(&s->lock); 3542 if (ret) 3543 break; 3544 } 3545 mutex_unlock(&nvme_subsystems_lock); 3546 3547 return ret; 3548 } 3549 3550 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info) 3551 { 3552 struct nvme_ctrl *ctrl = ns->ctrl; 3553 struct nvme_ns_head *head = NULL; 3554 int ret; 3555 3556 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids); 3557 if (ret) { 3558 /* 3559 * We've found two different namespaces on two different 3560 * subsystems that report the same ID. This is pretty nasty 3561 * for anything that actually requires unique device 3562 * identification. In the kernel we need this for multipathing, 3563 * and in user space the /dev/disk/by-id/ links rely on it. 3564 * 3565 * If the device also claims to be multi-path capable back off 3566 * here now and refuse the probe the second device as this is a 3567 * recipe for data corruption. If not this is probably a 3568 * cheap consumer device if on the PCIe bus, so let the user 3569 * proceed and use the shiny toy, but warn that with changing 3570 * probing order (which due to our async probing could just be 3571 * device taking longer to startup) the other device could show 3572 * up at any time. 3573 */ 3574 nvme_print_device_info(ctrl); 3575 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */ 3576 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) && 3577 info->is_shared)) { 3578 dev_err(ctrl->device, 3579 "ignoring nsid %d because of duplicate IDs\n", 3580 info->nsid); 3581 return ret; 3582 } 3583 3584 dev_err(ctrl->device, 3585 "clearing duplicate IDs for nsid %d\n", info->nsid); 3586 dev_err(ctrl->device, 3587 "use of /dev/disk/by-id/ may cause data corruption\n"); 3588 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid)); 3589 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid)); 3590 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64)); 3591 ctrl->quirks |= NVME_QUIRK_BOGUS_NID; 3592 } 3593 3594 mutex_lock(&ctrl->subsys->lock); 3595 head = nvme_find_ns_head(ctrl, info->nsid); 3596 if (!head) { 3597 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids); 3598 if (ret) { 3599 dev_err(ctrl->device, 3600 "duplicate IDs in subsystem for nsid %d\n", 3601 info->nsid); 3602 goto out_unlock; 3603 } 3604 head = nvme_alloc_ns_head(ctrl, info); 3605 if (IS_ERR(head)) { 3606 ret = PTR_ERR(head); 3607 goto out_unlock; 3608 } 3609 } else { 3610 ret = -EINVAL; 3611 if (!info->is_shared || !head->shared) { 3612 dev_err(ctrl->device, 3613 "Duplicate unshared namespace %d\n", 3614 info->nsid); 3615 goto out_put_ns_head; 3616 } 3617 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) { 3618 dev_err(ctrl->device, 3619 "IDs don't match for shared namespace %d\n", 3620 info->nsid); 3621 goto out_put_ns_head; 3622 } 3623 3624 if (!multipath) { 3625 dev_warn(ctrl->device, 3626 "Found shared namespace %d, but multipathing not supported.\n", 3627 info->nsid); 3628 dev_warn_once(ctrl->device, 3629 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0\n."); 3630 } 3631 } 3632 3633 list_add_tail_rcu(&ns->siblings, &head->list); 3634 ns->head = head; 3635 mutex_unlock(&ctrl->subsys->lock); 3636 return 0; 3637 3638 out_put_ns_head: 3639 nvme_put_ns_head(head); 3640 out_unlock: 3641 mutex_unlock(&ctrl->subsys->lock); 3642 return ret; 3643 } 3644 3645 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3646 { 3647 struct nvme_ns *ns, *ret = NULL; 3648 3649 down_read(&ctrl->namespaces_rwsem); 3650 list_for_each_entry(ns, &ctrl->namespaces, list) { 3651 if (ns->head->ns_id == nsid) { 3652 if (!nvme_get_ns(ns)) 3653 continue; 3654 ret = ns; 3655 break; 3656 } 3657 if (ns->head->ns_id > nsid) 3658 break; 3659 } 3660 up_read(&ctrl->namespaces_rwsem); 3661 return ret; 3662 } 3663 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU); 3664 3665 /* 3666 * Add the namespace to the controller list while keeping the list ordered. 3667 */ 3668 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns) 3669 { 3670 struct nvme_ns *tmp; 3671 3672 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) { 3673 if (tmp->head->ns_id < ns->head->ns_id) { 3674 list_add(&ns->list, &tmp->list); 3675 return; 3676 } 3677 } 3678 list_add(&ns->list, &ns->ctrl->namespaces); 3679 } 3680 3681 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info) 3682 { 3683 struct nvme_ns *ns; 3684 struct gendisk *disk; 3685 int node = ctrl->numa_node; 3686 3687 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 3688 if (!ns) 3689 return; 3690 3691 disk = blk_mq_alloc_disk(ctrl->tagset, ns); 3692 if (IS_ERR(disk)) 3693 goto out_free_ns; 3694 disk->fops = &nvme_bdev_ops; 3695 disk->private_data = ns; 3696 3697 ns->disk = disk; 3698 ns->queue = disk->queue; 3699 3700 if (ctrl->opts && ctrl->opts->data_digest) 3701 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue); 3702 3703 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue); 3704 if (ctrl->ops->supports_pci_p2pdma && 3705 ctrl->ops->supports_pci_p2pdma(ctrl)) 3706 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue); 3707 3708 ns->ctrl = ctrl; 3709 kref_init(&ns->kref); 3710 3711 if (nvme_init_ns_head(ns, info)) 3712 goto out_cleanup_disk; 3713 3714 /* 3715 * If multipathing is enabled, the device name for all disks and not 3716 * just those that represent shared namespaces needs to be based on the 3717 * subsystem instance. Using the controller instance for private 3718 * namespaces could lead to naming collisions between shared and private 3719 * namespaces if they don't use a common numbering scheme. 3720 * 3721 * If multipathing is not enabled, disk names must use the controller 3722 * instance as shared namespaces will show up as multiple block 3723 * devices. 3724 */ 3725 if (nvme_ns_head_multipath(ns->head)) { 3726 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance, 3727 ctrl->instance, ns->head->instance); 3728 disk->flags |= GENHD_FL_HIDDEN; 3729 } else if (multipath) { 3730 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance, 3731 ns->head->instance); 3732 } else { 3733 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, 3734 ns->head->instance); 3735 } 3736 3737 if (nvme_update_ns_info(ns, info)) 3738 goto out_unlink_ns; 3739 3740 down_write(&ctrl->namespaces_rwsem); 3741 /* 3742 * Ensure that no namespaces are added to the ctrl list after the queues 3743 * are frozen, thereby avoiding a deadlock between scan and reset. 3744 */ 3745 if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) { 3746 up_write(&ctrl->namespaces_rwsem); 3747 goto out_unlink_ns; 3748 } 3749 nvme_ns_add_to_ctrl_list(ns); 3750 up_write(&ctrl->namespaces_rwsem); 3751 nvme_get_ctrl(ctrl); 3752 3753 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_attr_groups)) 3754 goto out_cleanup_ns_from_list; 3755 3756 if (!nvme_ns_head_multipath(ns->head)) 3757 nvme_add_ns_cdev(ns); 3758 3759 nvme_mpath_add_disk(ns, info->anagrpid); 3760 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name); 3761 3762 /* 3763 * Set ns->disk->device->driver_data to ns so we can access 3764 * ns->head->passthru_err_log_enabled in 3765 * nvme_io_passthru_err_log_enabled_[store | show](). 3766 */ 3767 dev_set_drvdata(disk_to_dev(ns->disk), ns); 3768 3769 return; 3770 3771 out_cleanup_ns_from_list: 3772 nvme_put_ctrl(ctrl); 3773 down_write(&ctrl->namespaces_rwsem); 3774 list_del_init(&ns->list); 3775 up_write(&ctrl->namespaces_rwsem); 3776 out_unlink_ns: 3777 mutex_lock(&ctrl->subsys->lock); 3778 list_del_rcu(&ns->siblings); 3779 if (list_empty(&ns->head->list)) 3780 list_del_init(&ns->head->entry); 3781 mutex_unlock(&ctrl->subsys->lock); 3782 nvme_put_ns_head(ns->head); 3783 out_cleanup_disk: 3784 put_disk(disk); 3785 out_free_ns: 3786 kfree(ns); 3787 } 3788 3789 static void nvme_ns_remove(struct nvme_ns *ns) 3790 { 3791 bool last_path = false; 3792 3793 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 3794 return; 3795 3796 clear_bit(NVME_NS_READY, &ns->flags); 3797 set_capacity(ns->disk, 0); 3798 nvme_fault_inject_fini(&ns->fault_inject); 3799 3800 /* 3801 * Ensure that !NVME_NS_READY is seen by other threads to prevent 3802 * this ns going back into current_path. 3803 */ 3804 synchronize_srcu(&ns->head->srcu); 3805 3806 /* wait for concurrent submissions */ 3807 if (nvme_mpath_clear_current_path(ns)) 3808 synchronize_srcu(&ns->head->srcu); 3809 3810 mutex_lock(&ns->ctrl->subsys->lock); 3811 list_del_rcu(&ns->siblings); 3812 if (list_empty(&ns->head->list)) { 3813 list_del_init(&ns->head->entry); 3814 last_path = true; 3815 } 3816 mutex_unlock(&ns->ctrl->subsys->lock); 3817 3818 /* guarantee not available in head->list */ 3819 synchronize_srcu(&ns->head->srcu); 3820 3821 if (!nvme_ns_head_multipath(ns->head)) 3822 nvme_cdev_del(&ns->cdev, &ns->cdev_device); 3823 del_gendisk(ns->disk); 3824 3825 down_write(&ns->ctrl->namespaces_rwsem); 3826 list_del_init(&ns->list); 3827 up_write(&ns->ctrl->namespaces_rwsem); 3828 3829 if (last_path) 3830 nvme_mpath_shutdown_disk(ns->head); 3831 nvme_put_ns(ns); 3832 } 3833 3834 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid) 3835 { 3836 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid); 3837 3838 if (ns) { 3839 nvme_ns_remove(ns); 3840 nvme_put_ns(ns); 3841 } 3842 } 3843 3844 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info) 3845 { 3846 int ret = NVME_SC_INVALID_NS | NVME_SC_DNR; 3847 3848 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) { 3849 dev_err(ns->ctrl->device, 3850 "identifiers changed for nsid %d\n", ns->head->ns_id); 3851 goto out; 3852 } 3853 3854 ret = nvme_update_ns_info(ns, info); 3855 out: 3856 /* 3857 * Only remove the namespace if we got a fatal error back from the 3858 * device, otherwise ignore the error and just move on. 3859 * 3860 * TODO: we should probably schedule a delayed retry here. 3861 */ 3862 if (ret > 0 && (ret & NVME_SC_DNR)) 3863 nvme_ns_remove(ns); 3864 } 3865 3866 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3867 { 3868 struct nvme_ns_info info = { .nsid = nsid }; 3869 struct nvme_ns *ns; 3870 int ret; 3871 3872 if (nvme_identify_ns_descs(ctrl, &info)) 3873 return; 3874 3875 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) { 3876 dev_warn(ctrl->device, 3877 "command set not reported for nsid: %d\n", nsid); 3878 return; 3879 } 3880 3881 /* 3882 * If available try to use the Command Set Idependent Identify Namespace 3883 * data structure to find all the generic information that is needed to 3884 * set up a namespace. If not fall back to the legacy version. 3885 */ 3886 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) || 3887 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS)) 3888 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info); 3889 else 3890 ret = nvme_ns_info_from_identify(ctrl, &info); 3891 3892 if (info.is_removed) 3893 nvme_ns_remove_by_nsid(ctrl, nsid); 3894 3895 /* 3896 * Ignore the namespace if it is not ready. We will get an AEN once it 3897 * becomes ready and restart the scan. 3898 */ 3899 if (ret || !info.is_ready) 3900 return; 3901 3902 ns = nvme_find_get_ns(ctrl, nsid); 3903 if (ns) { 3904 nvme_validate_ns(ns, &info); 3905 nvme_put_ns(ns); 3906 } else { 3907 nvme_alloc_ns(ctrl, &info); 3908 } 3909 } 3910 3911 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 3912 unsigned nsid) 3913 { 3914 struct nvme_ns *ns, *next; 3915 LIST_HEAD(rm_list); 3916 3917 down_write(&ctrl->namespaces_rwsem); 3918 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 3919 if (ns->head->ns_id > nsid) 3920 list_move_tail(&ns->list, &rm_list); 3921 } 3922 up_write(&ctrl->namespaces_rwsem); 3923 3924 list_for_each_entry_safe(ns, next, &rm_list, list) 3925 nvme_ns_remove(ns); 3926 3927 } 3928 3929 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl) 3930 { 3931 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32); 3932 __le32 *ns_list; 3933 u32 prev = 0; 3934 int ret = 0, i; 3935 3936 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 3937 if (!ns_list) 3938 return -ENOMEM; 3939 3940 for (;;) { 3941 struct nvme_command cmd = { 3942 .identify.opcode = nvme_admin_identify, 3943 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST, 3944 .identify.nsid = cpu_to_le32(prev), 3945 }; 3946 3947 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list, 3948 NVME_IDENTIFY_DATA_SIZE); 3949 if (ret) { 3950 dev_warn(ctrl->device, 3951 "Identify NS List failed (status=0x%x)\n", ret); 3952 goto free; 3953 } 3954 3955 for (i = 0; i < nr_entries; i++) { 3956 u32 nsid = le32_to_cpu(ns_list[i]); 3957 3958 if (!nsid) /* end of the list? */ 3959 goto out; 3960 nvme_scan_ns(ctrl, nsid); 3961 while (++prev < nsid) 3962 nvme_ns_remove_by_nsid(ctrl, prev); 3963 } 3964 } 3965 out: 3966 nvme_remove_invalid_namespaces(ctrl, prev); 3967 free: 3968 kfree(ns_list); 3969 return ret; 3970 } 3971 3972 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl) 3973 { 3974 struct nvme_id_ctrl *id; 3975 u32 nn, i; 3976 3977 if (nvme_identify_ctrl(ctrl, &id)) 3978 return; 3979 nn = le32_to_cpu(id->nn); 3980 kfree(id); 3981 3982 for (i = 1; i <= nn; i++) 3983 nvme_scan_ns(ctrl, i); 3984 3985 nvme_remove_invalid_namespaces(ctrl, nn); 3986 } 3987 3988 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 3989 { 3990 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 3991 __le32 *log; 3992 int error; 3993 3994 log = kzalloc(log_size, GFP_KERNEL); 3995 if (!log) 3996 return; 3997 3998 /* 3999 * We need to read the log to clear the AEN, but we don't want to rely 4000 * on it for the changed namespace information as userspace could have 4001 * raced with us in reading the log page, which could cause us to miss 4002 * updates. 4003 */ 4004 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, 4005 NVME_CSI_NVM, log, log_size, 0); 4006 if (error) 4007 dev_warn(ctrl->device, 4008 "reading changed ns log failed: %d\n", error); 4009 4010 kfree(log); 4011 } 4012 4013 static void nvme_scan_work(struct work_struct *work) 4014 { 4015 struct nvme_ctrl *ctrl = 4016 container_of(work, struct nvme_ctrl, scan_work); 4017 int ret; 4018 4019 /* No tagset on a live ctrl means IO queues could not created */ 4020 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset) 4021 return; 4022 4023 /* 4024 * Identify controller limits can change at controller reset due to 4025 * new firmware download, even though it is not common we cannot ignore 4026 * such scenario. Controller's non-mdts limits are reported in the unit 4027 * of logical blocks that is dependent on the format of attached 4028 * namespace. Hence re-read the limits at the time of ns allocation. 4029 */ 4030 ret = nvme_init_non_mdts_limits(ctrl); 4031 if (ret < 0) { 4032 dev_warn(ctrl->device, 4033 "reading non-mdts-limits failed: %d\n", ret); 4034 return; 4035 } 4036 4037 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 4038 dev_info(ctrl->device, "rescanning namespaces.\n"); 4039 nvme_clear_changed_ns_log(ctrl); 4040 } 4041 4042 mutex_lock(&ctrl->scan_lock); 4043 if (nvme_ctrl_limited_cns(ctrl)) { 4044 nvme_scan_ns_sequential(ctrl); 4045 } else { 4046 /* 4047 * Fall back to sequential scan if DNR is set to handle broken 4048 * devices which should support Identify NS List (as per the VS 4049 * they report) but don't actually support it. 4050 */ 4051 ret = nvme_scan_ns_list(ctrl); 4052 if (ret > 0 && ret & NVME_SC_DNR) 4053 nvme_scan_ns_sequential(ctrl); 4054 } 4055 mutex_unlock(&ctrl->scan_lock); 4056 } 4057 4058 /* 4059 * This function iterates the namespace list unlocked to allow recovery from 4060 * controller failure. It is up to the caller to ensure the namespace list is 4061 * not modified by scan work while this function is executing. 4062 */ 4063 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 4064 { 4065 struct nvme_ns *ns, *next; 4066 LIST_HEAD(ns_list); 4067 4068 /* 4069 * make sure to requeue I/O to all namespaces as these 4070 * might result from the scan itself and must complete 4071 * for the scan_work to make progress 4072 */ 4073 nvme_mpath_clear_ctrl_paths(ctrl); 4074 4075 /* 4076 * Unquiesce io queues so any pending IO won't hang, especially 4077 * those submitted from scan work 4078 */ 4079 nvme_unquiesce_io_queues(ctrl); 4080 4081 /* prevent racing with ns scanning */ 4082 flush_work(&ctrl->scan_work); 4083 4084 /* 4085 * The dead states indicates the controller was not gracefully 4086 * disconnected. In that case, we won't be able to flush any data while 4087 * removing the namespaces' disks; fail all the queues now to avoid 4088 * potentially having to clean up the failed sync later. 4089 */ 4090 if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD) 4091 nvme_mark_namespaces_dead(ctrl); 4092 4093 /* this is a no-op when called from the controller reset handler */ 4094 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO); 4095 4096 down_write(&ctrl->namespaces_rwsem); 4097 list_splice_init(&ctrl->namespaces, &ns_list); 4098 up_write(&ctrl->namespaces_rwsem); 4099 4100 list_for_each_entry_safe(ns, next, &ns_list, list) 4101 nvme_ns_remove(ns); 4102 } 4103 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 4104 4105 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env) 4106 { 4107 const struct nvme_ctrl *ctrl = 4108 container_of(dev, struct nvme_ctrl, ctrl_device); 4109 struct nvmf_ctrl_options *opts = ctrl->opts; 4110 int ret; 4111 4112 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name); 4113 if (ret) 4114 return ret; 4115 4116 if (opts) { 4117 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr); 4118 if (ret) 4119 return ret; 4120 4121 ret = add_uevent_var(env, "NVME_TRSVCID=%s", 4122 opts->trsvcid ?: "none"); 4123 if (ret) 4124 return ret; 4125 4126 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s", 4127 opts->host_traddr ?: "none"); 4128 if (ret) 4129 return ret; 4130 4131 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s", 4132 opts->host_iface ?: "none"); 4133 } 4134 return ret; 4135 } 4136 4137 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata) 4138 { 4139 char *envp[2] = { envdata, NULL }; 4140 4141 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4142 } 4143 4144 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 4145 { 4146 char *envp[2] = { NULL, NULL }; 4147 u32 aen_result = ctrl->aen_result; 4148 4149 ctrl->aen_result = 0; 4150 if (!aen_result) 4151 return; 4152 4153 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 4154 if (!envp[0]) 4155 return; 4156 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4157 kfree(envp[0]); 4158 } 4159 4160 static void nvme_async_event_work(struct work_struct *work) 4161 { 4162 struct nvme_ctrl *ctrl = 4163 container_of(work, struct nvme_ctrl, async_event_work); 4164 4165 nvme_aen_uevent(ctrl); 4166 4167 /* 4168 * The transport drivers must guarantee AER submission here is safe by 4169 * flushing ctrl async_event_work after changing the controller state 4170 * from LIVE and before freeing the admin queue. 4171 */ 4172 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 4173 ctrl->ops->submit_async_event(ctrl); 4174 } 4175 4176 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 4177 { 4178 4179 u32 csts; 4180 4181 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 4182 return false; 4183 4184 if (csts == ~0) 4185 return false; 4186 4187 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 4188 } 4189 4190 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 4191 { 4192 struct nvme_fw_slot_info_log *log; 4193 u8 next_fw_slot, cur_fw_slot; 4194 4195 log = kmalloc(sizeof(*log), GFP_KERNEL); 4196 if (!log) 4197 return; 4198 4199 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM, 4200 log, sizeof(*log), 0)) { 4201 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 4202 goto out_free_log; 4203 } 4204 4205 cur_fw_slot = log->afi & 0x7; 4206 next_fw_slot = (log->afi & 0x70) >> 4; 4207 if (!cur_fw_slot || (next_fw_slot && (cur_fw_slot != next_fw_slot))) { 4208 dev_info(ctrl->device, 4209 "Firmware is activated after next Controller Level Reset\n"); 4210 goto out_free_log; 4211 } 4212 4213 memcpy(ctrl->subsys->firmware_rev, &log->frs[cur_fw_slot - 1], 4214 sizeof(ctrl->subsys->firmware_rev)); 4215 4216 out_free_log: 4217 kfree(log); 4218 } 4219 4220 static void nvme_fw_act_work(struct work_struct *work) 4221 { 4222 struct nvme_ctrl *ctrl = container_of(work, 4223 struct nvme_ctrl, fw_act_work); 4224 unsigned long fw_act_timeout; 4225 4226 nvme_auth_stop(ctrl); 4227 4228 if (ctrl->mtfa) 4229 fw_act_timeout = jiffies + 4230 msecs_to_jiffies(ctrl->mtfa * 100); 4231 else 4232 fw_act_timeout = jiffies + 4233 msecs_to_jiffies(admin_timeout * 1000); 4234 4235 nvme_quiesce_io_queues(ctrl); 4236 while (nvme_ctrl_pp_status(ctrl)) { 4237 if (time_after(jiffies, fw_act_timeout)) { 4238 dev_warn(ctrl->device, 4239 "Fw activation timeout, reset controller\n"); 4240 nvme_try_sched_reset(ctrl); 4241 return; 4242 } 4243 msleep(100); 4244 } 4245 4246 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE)) 4247 return; 4248 4249 nvme_unquiesce_io_queues(ctrl); 4250 /* read FW slot information to clear the AER */ 4251 nvme_get_fw_slot_info(ctrl); 4252 4253 queue_work(nvme_wq, &ctrl->async_event_work); 4254 } 4255 4256 static u32 nvme_aer_type(u32 result) 4257 { 4258 return result & 0x7; 4259 } 4260 4261 static u32 nvme_aer_subtype(u32 result) 4262 { 4263 return (result & 0xff00) >> 8; 4264 } 4265 4266 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 4267 { 4268 u32 aer_notice_type = nvme_aer_subtype(result); 4269 bool requeue = true; 4270 4271 switch (aer_notice_type) { 4272 case NVME_AER_NOTICE_NS_CHANGED: 4273 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 4274 nvme_queue_scan(ctrl); 4275 break; 4276 case NVME_AER_NOTICE_FW_ACT_STARTING: 4277 /* 4278 * We are (ab)using the RESETTING state to prevent subsequent 4279 * recovery actions from interfering with the controller's 4280 * firmware activation. 4281 */ 4282 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) { 4283 requeue = false; 4284 queue_work(nvme_wq, &ctrl->fw_act_work); 4285 } 4286 break; 4287 #ifdef CONFIG_NVME_MULTIPATH 4288 case NVME_AER_NOTICE_ANA: 4289 if (!ctrl->ana_log_buf) 4290 break; 4291 queue_work(nvme_wq, &ctrl->ana_work); 4292 break; 4293 #endif 4294 case NVME_AER_NOTICE_DISC_CHANGED: 4295 ctrl->aen_result = result; 4296 break; 4297 default: 4298 dev_warn(ctrl->device, "async event result %08x\n", result); 4299 } 4300 return requeue; 4301 } 4302 4303 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl) 4304 { 4305 dev_warn(ctrl->device, "resetting controller due to AER\n"); 4306 nvme_reset_ctrl(ctrl); 4307 } 4308 4309 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 4310 volatile union nvme_result *res) 4311 { 4312 u32 result = le32_to_cpu(res->u32); 4313 u32 aer_type = nvme_aer_type(result); 4314 u32 aer_subtype = nvme_aer_subtype(result); 4315 bool requeue = true; 4316 4317 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 4318 return; 4319 4320 trace_nvme_async_event(ctrl, result); 4321 switch (aer_type) { 4322 case NVME_AER_NOTICE: 4323 requeue = nvme_handle_aen_notice(ctrl, result); 4324 break; 4325 case NVME_AER_ERROR: 4326 /* 4327 * For a persistent internal error, don't run async_event_work 4328 * to submit a new AER. The controller reset will do it. 4329 */ 4330 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) { 4331 nvme_handle_aer_persistent_error(ctrl); 4332 return; 4333 } 4334 fallthrough; 4335 case NVME_AER_SMART: 4336 case NVME_AER_CSS: 4337 case NVME_AER_VS: 4338 ctrl->aen_result = result; 4339 break; 4340 default: 4341 break; 4342 } 4343 4344 if (requeue) 4345 queue_work(nvme_wq, &ctrl->async_event_work); 4346 } 4347 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 4348 4349 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4350 const struct blk_mq_ops *ops, unsigned int cmd_size) 4351 { 4352 int ret; 4353 4354 memset(set, 0, sizeof(*set)); 4355 set->ops = ops; 4356 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 4357 if (ctrl->ops->flags & NVME_F_FABRICS) 4358 set->reserved_tags = NVMF_RESERVED_TAGS; 4359 set->numa_node = ctrl->numa_node; 4360 set->flags = BLK_MQ_F_NO_SCHED; 4361 if (ctrl->ops->flags & NVME_F_BLOCKING) 4362 set->flags |= BLK_MQ_F_BLOCKING; 4363 set->cmd_size = cmd_size; 4364 set->driver_data = ctrl; 4365 set->nr_hw_queues = 1; 4366 set->timeout = NVME_ADMIN_TIMEOUT; 4367 ret = blk_mq_alloc_tag_set(set); 4368 if (ret) 4369 return ret; 4370 4371 ctrl->admin_q = blk_mq_init_queue(set); 4372 if (IS_ERR(ctrl->admin_q)) { 4373 ret = PTR_ERR(ctrl->admin_q); 4374 goto out_free_tagset; 4375 } 4376 4377 if (ctrl->ops->flags & NVME_F_FABRICS) { 4378 ctrl->fabrics_q = blk_mq_init_queue(set); 4379 if (IS_ERR(ctrl->fabrics_q)) { 4380 ret = PTR_ERR(ctrl->fabrics_q); 4381 goto out_cleanup_admin_q; 4382 } 4383 } 4384 4385 ctrl->admin_tagset = set; 4386 return 0; 4387 4388 out_cleanup_admin_q: 4389 blk_mq_destroy_queue(ctrl->admin_q); 4390 blk_put_queue(ctrl->admin_q); 4391 out_free_tagset: 4392 blk_mq_free_tag_set(set); 4393 ctrl->admin_q = NULL; 4394 ctrl->fabrics_q = NULL; 4395 return ret; 4396 } 4397 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set); 4398 4399 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl) 4400 { 4401 blk_mq_destroy_queue(ctrl->admin_q); 4402 blk_put_queue(ctrl->admin_q); 4403 if (ctrl->ops->flags & NVME_F_FABRICS) { 4404 blk_mq_destroy_queue(ctrl->fabrics_q); 4405 blk_put_queue(ctrl->fabrics_q); 4406 } 4407 blk_mq_free_tag_set(ctrl->admin_tagset); 4408 } 4409 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set); 4410 4411 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4412 const struct blk_mq_ops *ops, unsigned int nr_maps, 4413 unsigned int cmd_size) 4414 { 4415 int ret; 4416 4417 memset(set, 0, sizeof(*set)); 4418 set->ops = ops; 4419 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1); 4420 /* 4421 * Some Apple controllers requires tags to be unique across admin and 4422 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue. 4423 */ 4424 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS) 4425 set->reserved_tags = NVME_AQ_DEPTH; 4426 else if (ctrl->ops->flags & NVME_F_FABRICS) 4427 set->reserved_tags = NVMF_RESERVED_TAGS; 4428 set->numa_node = ctrl->numa_node; 4429 set->flags = BLK_MQ_F_SHOULD_MERGE; 4430 if (ctrl->ops->flags & NVME_F_BLOCKING) 4431 set->flags |= BLK_MQ_F_BLOCKING; 4432 set->cmd_size = cmd_size, 4433 set->driver_data = ctrl; 4434 set->nr_hw_queues = ctrl->queue_count - 1; 4435 set->timeout = NVME_IO_TIMEOUT; 4436 set->nr_maps = nr_maps; 4437 ret = blk_mq_alloc_tag_set(set); 4438 if (ret) 4439 return ret; 4440 4441 if (ctrl->ops->flags & NVME_F_FABRICS) { 4442 ctrl->connect_q = blk_mq_init_queue(set); 4443 if (IS_ERR(ctrl->connect_q)) { 4444 ret = PTR_ERR(ctrl->connect_q); 4445 goto out_free_tag_set; 4446 } 4447 blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE, 4448 ctrl->connect_q); 4449 } 4450 4451 ctrl->tagset = set; 4452 return 0; 4453 4454 out_free_tag_set: 4455 blk_mq_free_tag_set(set); 4456 ctrl->connect_q = NULL; 4457 return ret; 4458 } 4459 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set); 4460 4461 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl) 4462 { 4463 if (ctrl->ops->flags & NVME_F_FABRICS) { 4464 blk_mq_destroy_queue(ctrl->connect_q); 4465 blk_put_queue(ctrl->connect_q); 4466 } 4467 blk_mq_free_tag_set(ctrl->tagset); 4468 } 4469 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set); 4470 4471 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 4472 { 4473 nvme_mpath_stop(ctrl); 4474 nvme_auth_stop(ctrl); 4475 nvme_stop_keep_alive(ctrl); 4476 nvme_stop_failfast_work(ctrl); 4477 flush_work(&ctrl->async_event_work); 4478 cancel_work_sync(&ctrl->fw_act_work); 4479 if (ctrl->ops->stop_ctrl) 4480 ctrl->ops->stop_ctrl(ctrl); 4481 } 4482 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 4483 4484 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 4485 { 4486 nvme_enable_aen(ctrl); 4487 4488 /* 4489 * persistent discovery controllers need to send indication to userspace 4490 * to re-read the discovery log page to learn about possible changes 4491 * that were missed. We identify persistent discovery controllers by 4492 * checking that they started once before, hence are reconnecting back. 4493 */ 4494 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) && 4495 nvme_discovery_ctrl(ctrl)) 4496 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover"); 4497 4498 if (ctrl->queue_count > 1) { 4499 nvme_queue_scan(ctrl); 4500 nvme_unquiesce_io_queues(ctrl); 4501 nvme_mpath_update(ctrl); 4502 } 4503 4504 nvme_change_uevent(ctrl, "NVME_EVENT=connected"); 4505 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags); 4506 } 4507 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 4508 4509 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 4510 { 4511 nvme_hwmon_exit(ctrl); 4512 nvme_fault_inject_fini(&ctrl->fault_inject); 4513 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4514 cdev_device_del(&ctrl->cdev, ctrl->device); 4515 nvme_put_ctrl(ctrl); 4516 } 4517 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 4518 4519 static void nvme_free_cels(struct nvme_ctrl *ctrl) 4520 { 4521 struct nvme_effects_log *cel; 4522 unsigned long i; 4523 4524 xa_for_each(&ctrl->cels, i, cel) { 4525 xa_erase(&ctrl->cels, i); 4526 kfree(cel); 4527 } 4528 4529 xa_destroy(&ctrl->cels); 4530 } 4531 4532 static void nvme_free_ctrl(struct device *dev) 4533 { 4534 struct nvme_ctrl *ctrl = 4535 container_of(dev, struct nvme_ctrl, ctrl_device); 4536 struct nvme_subsystem *subsys = ctrl->subsys; 4537 4538 if (!subsys || ctrl->instance != subsys->instance) 4539 ida_free(&nvme_instance_ida, ctrl->instance); 4540 key_put(ctrl->tls_key); 4541 nvme_free_cels(ctrl); 4542 nvme_mpath_uninit(ctrl); 4543 nvme_auth_stop(ctrl); 4544 nvme_auth_free(ctrl); 4545 __free_page(ctrl->discard_page); 4546 free_opal_dev(ctrl->opal_dev); 4547 4548 if (subsys) { 4549 mutex_lock(&nvme_subsystems_lock); 4550 list_del(&ctrl->subsys_entry); 4551 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 4552 mutex_unlock(&nvme_subsystems_lock); 4553 } 4554 4555 ctrl->ops->free_ctrl(ctrl); 4556 4557 if (subsys) 4558 nvme_put_subsystem(subsys); 4559 } 4560 4561 /* 4562 * Initialize a NVMe controller structures. This needs to be called during 4563 * earliest initialization so that we have the initialized structured around 4564 * during probing. 4565 */ 4566 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 4567 const struct nvme_ctrl_ops *ops, unsigned long quirks) 4568 { 4569 int ret; 4570 4571 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW); 4572 ctrl->passthru_err_log_enabled = false; 4573 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 4574 spin_lock_init(&ctrl->lock); 4575 mutex_init(&ctrl->scan_lock); 4576 INIT_LIST_HEAD(&ctrl->namespaces); 4577 xa_init(&ctrl->cels); 4578 init_rwsem(&ctrl->namespaces_rwsem); 4579 ctrl->dev = dev; 4580 ctrl->ops = ops; 4581 ctrl->quirks = quirks; 4582 ctrl->numa_node = NUMA_NO_NODE; 4583 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 4584 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 4585 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 4586 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 4587 init_waitqueue_head(&ctrl->state_wq); 4588 4589 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 4590 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work); 4591 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 4592 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 4593 ctrl->ka_last_check_time = jiffies; 4594 4595 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 4596 PAGE_SIZE); 4597 ctrl->discard_page = alloc_page(GFP_KERNEL); 4598 if (!ctrl->discard_page) { 4599 ret = -ENOMEM; 4600 goto out; 4601 } 4602 4603 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL); 4604 if (ret < 0) 4605 goto out; 4606 ctrl->instance = ret; 4607 4608 device_initialize(&ctrl->ctrl_device); 4609 ctrl->device = &ctrl->ctrl_device; 4610 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt), 4611 ctrl->instance); 4612 ctrl->device->class = nvme_class; 4613 ctrl->device->parent = ctrl->dev; 4614 if (ops->dev_attr_groups) 4615 ctrl->device->groups = ops->dev_attr_groups; 4616 else 4617 ctrl->device->groups = nvme_dev_attr_groups; 4618 ctrl->device->release = nvme_free_ctrl; 4619 dev_set_drvdata(ctrl->device, ctrl); 4620 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 4621 if (ret) 4622 goto out_release_instance; 4623 4624 nvme_get_ctrl(ctrl); 4625 cdev_init(&ctrl->cdev, &nvme_dev_fops); 4626 ctrl->cdev.owner = ops->module; 4627 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 4628 if (ret) 4629 goto out_free_name; 4630 4631 /* 4632 * Initialize latency tolerance controls. The sysfs files won't 4633 * be visible to userspace unless the device actually supports APST. 4634 */ 4635 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 4636 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 4637 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 4638 4639 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device)); 4640 nvme_mpath_init_ctrl(ctrl); 4641 ret = nvme_auth_init_ctrl(ctrl); 4642 if (ret) 4643 goto out_free_cdev; 4644 4645 return 0; 4646 out_free_cdev: 4647 nvme_fault_inject_fini(&ctrl->fault_inject); 4648 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4649 cdev_device_del(&ctrl->cdev, ctrl->device); 4650 out_free_name: 4651 nvme_put_ctrl(ctrl); 4652 kfree_const(ctrl->device->kobj.name); 4653 out_release_instance: 4654 ida_free(&nvme_instance_ida, ctrl->instance); 4655 out: 4656 if (ctrl->discard_page) 4657 __free_page(ctrl->discard_page); 4658 return ret; 4659 } 4660 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 4661 4662 /* let I/O to all namespaces fail in preparation for surprise removal */ 4663 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl) 4664 { 4665 struct nvme_ns *ns; 4666 4667 down_read(&ctrl->namespaces_rwsem); 4668 list_for_each_entry(ns, &ctrl->namespaces, list) 4669 blk_mark_disk_dead(ns->disk); 4670 up_read(&ctrl->namespaces_rwsem); 4671 } 4672 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead); 4673 4674 void nvme_unfreeze(struct nvme_ctrl *ctrl) 4675 { 4676 struct nvme_ns *ns; 4677 4678 down_read(&ctrl->namespaces_rwsem); 4679 list_for_each_entry(ns, &ctrl->namespaces, list) 4680 blk_mq_unfreeze_queue(ns->queue); 4681 up_read(&ctrl->namespaces_rwsem); 4682 clear_bit(NVME_CTRL_FROZEN, &ctrl->flags); 4683 } 4684 EXPORT_SYMBOL_GPL(nvme_unfreeze); 4685 4686 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 4687 { 4688 struct nvme_ns *ns; 4689 4690 down_read(&ctrl->namespaces_rwsem); 4691 list_for_each_entry(ns, &ctrl->namespaces, list) { 4692 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 4693 if (timeout <= 0) 4694 break; 4695 } 4696 up_read(&ctrl->namespaces_rwsem); 4697 return timeout; 4698 } 4699 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 4700 4701 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 4702 { 4703 struct nvme_ns *ns; 4704 4705 down_read(&ctrl->namespaces_rwsem); 4706 list_for_each_entry(ns, &ctrl->namespaces, list) 4707 blk_mq_freeze_queue_wait(ns->queue); 4708 up_read(&ctrl->namespaces_rwsem); 4709 } 4710 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 4711 4712 void nvme_start_freeze(struct nvme_ctrl *ctrl) 4713 { 4714 struct nvme_ns *ns; 4715 4716 set_bit(NVME_CTRL_FROZEN, &ctrl->flags); 4717 down_read(&ctrl->namespaces_rwsem); 4718 list_for_each_entry(ns, &ctrl->namespaces, list) 4719 blk_freeze_queue_start(ns->queue); 4720 up_read(&ctrl->namespaces_rwsem); 4721 } 4722 EXPORT_SYMBOL_GPL(nvme_start_freeze); 4723 4724 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl) 4725 { 4726 if (!ctrl->tagset) 4727 return; 4728 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4729 blk_mq_quiesce_tagset(ctrl->tagset); 4730 else 4731 blk_mq_wait_quiesce_done(ctrl->tagset); 4732 } 4733 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues); 4734 4735 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl) 4736 { 4737 if (!ctrl->tagset) 4738 return; 4739 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4740 blk_mq_unquiesce_tagset(ctrl->tagset); 4741 } 4742 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues); 4743 4744 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl) 4745 { 4746 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4747 blk_mq_quiesce_queue(ctrl->admin_q); 4748 else 4749 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set); 4750 } 4751 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue); 4752 4753 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl) 4754 { 4755 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4756 blk_mq_unquiesce_queue(ctrl->admin_q); 4757 } 4758 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue); 4759 4760 void nvme_sync_io_queues(struct nvme_ctrl *ctrl) 4761 { 4762 struct nvme_ns *ns; 4763 4764 down_read(&ctrl->namespaces_rwsem); 4765 list_for_each_entry(ns, &ctrl->namespaces, list) 4766 blk_sync_queue(ns->queue); 4767 up_read(&ctrl->namespaces_rwsem); 4768 } 4769 EXPORT_SYMBOL_GPL(nvme_sync_io_queues); 4770 4771 void nvme_sync_queues(struct nvme_ctrl *ctrl) 4772 { 4773 nvme_sync_io_queues(ctrl); 4774 if (ctrl->admin_q) 4775 blk_sync_queue(ctrl->admin_q); 4776 } 4777 EXPORT_SYMBOL_GPL(nvme_sync_queues); 4778 4779 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file) 4780 { 4781 if (file->f_op != &nvme_dev_fops) 4782 return NULL; 4783 return file->private_data; 4784 } 4785 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU); 4786 4787 /* 4788 * Check we didn't inadvertently grow the command structure sizes: 4789 */ 4790 static inline void _nvme_check_size(void) 4791 { 4792 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64); 4793 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 4794 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64); 4795 BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 4796 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64); 4797 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 4798 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64); 4799 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64); 4800 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 4801 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64); 4802 BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 4803 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE); 4804 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE); 4805 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) != 4806 NVME_IDENTIFY_DATA_SIZE); 4807 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE); 4808 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE); 4809 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE); 4810 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE); 4811 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 4812 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 4813 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 4814 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64); 4815 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512); 4816 } 4817 4818 4819 static int __init nvme_core_init(void) 4820 { 4821 int result = -ENOMEM; 4822 4823 _nvme_check_size(); 4824 4825 nvme_wq = alloc_workqueue("nvme-wq", 4826 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4827 if (!nvme_wq) 4828 goto out; 4829 4830 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", 4831 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4832 if (!nvme_reset_wq) 4833 goto destroy_wq; 4834 4835 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", 4836 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4837 if (!nvme_delete_wq) 4838 goto destroy_reset_wq; 4839 4840 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0, 4841 NVME_MINORS, "nvme"); 4842 if (result < 0) 4843 goto destroy_delete_wq; 4844 4845 nvme_class = class_create("nvme"); 4846 if (IS_ERR(nvme_class)) { 4847 result = PTR_ERR(nvme_class); 4848 goto unregister_chrdev; 4849 } 4850 nvme_class->dev_uevent = nvme_class_uevent; 4851 4852 nvme_subsys_class = class_create("nvme-subsystem"); 4853 if (IS_ERR(nvme_subsys_class)) { 4854 result = PTR_ERR(nvme_subsys_class); 4855 goto destroy_class; 4856 } 4857 4858 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS, 4859 "nvme-generic"); 4860 if (result < 0) 4861 goto destroy_subsys_class; 4862 4863 nvme_ns_chr_class = class_create("nvme-generic"); 4864 if (IS_ERR(nvme_ns_chr_class)) { 4865 result = PTR_ERR(nvme_ns_chr_class); 4866 goto unregister_generic_ns; 4867 } 4868 result = nvme_init_auth(); 4869 if (result) 4870 goto destroy_ns_chr; 4871 return 0; 4872 4873 destroy_ns_chr: 4874 class_destroy(nvme_ns_chr_class); 4875 unregister_generic_ns: 4876 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4877 destroy_subsys_class: 4878 class_destroy(nvme_subsys_class); 4879 destroy_class: 4880 class_destroy(nvme_class); 4881 unregister_chrdev: 4882 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4883 destroy_delete_wq: 4884 destroy_workqueue(nvme_delete_wq); 4885 destroy_reset_wq: 4886 destroy_workqueue(nvme_reset_wq); 4887 destroy_wq: 4888 destroy_workqueue(nvme_wq); 4889 out: 4890 return result; 4891 } 4892 4893 static void __exit nvme_core_exit(void) 4894 { 4895 nvme_exit_auth(); 4896 class_destroy(nvme_ns_chr_class); 4897 class_destroy(nvme_subsys_class); 4898 class_destroy(nvme_class); 4899 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4900 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4901 destroy_workqueue(nvme_delete_wq); 4902 destroy_workqueue(nvme_reset_wq); 4903 destroy_workqueue(nvme_wq); 4904 ida_destroy(&nvme_ns_chr_minor_ida); 4905 ida_destroy(&nvme_instance_ida); 4906 } 4907 4908 MODULE_LICENSE("GPL"); 4909 MODULE_VERSION("1.0"); 4910 MODULE_DESCRIPTION("NVMe host core framework"); 4911 module_init(nvme_core_init); 4912 module_exit(nvme_core_exit); 4913