1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVM Express device driver 4 * Copyright (c) 2011-2014, Intel Corporation. 5 */ 6 7 #include <linux/blkdev.h> 8 #include <linux/blk-mq.h> 9 #include <linux/blk-integrity.h> 10 #include <linux/compat.h> 11 #include <linux/delay.h> 12 #include <linux/errno.h> 13 #include <linux/hdreg.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/backing-dev.h> 17 #include <linux/slab.h> 18 #include <linux/types.h> 19 #include <linux/pr.h> 20 #include <linux/ptrace.h> 21 #include <linux/nvme_ioctl.h> 22 #include <linux/pm_qos.h> 23 #include <linux/ratelimit.h> 24 #include <asm/unaligned.h> 25 26 #include "nvme.h" 27 #include "fabrics.h" 28 #include <linux/nvme-auth.h> 29 30 #define CREATE_TRACE_POINTS 31 #include "trace.h" 32 33 #define NVME_MINORS (1U << MINORBITS) 34 35 struct nvme_ns_info { 36 struct nvme_ns_ids ids; 37 u32 nsid; 38 __le32 anagrpid; 39 bool is_shared; 40 bool is_readonly; 41 bool is_ready; 42 bool is_removed; 43 }; 44 45 unsigned int admin_timeout = 60; 46 module_param(admin_timeout, uint, 0644); 47 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 48 EXPORT_SYMBOL_GPL(admin_timeout); 49 50 unsigned int nvme_io_timeout = 30; 51 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 52 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 53 EXPORT_SYMBOL_GPL(nvme_io_timeout); 54 55 static unsigned char shutdown_timeout = 5; 56 module_param(shutdown_timeout, byte, 0644); 57 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 58 59 static u8 nvme_max_retries = 5; 60 module_param_named(max_retries, nvme_max_retries, byte, 0644); 61 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 62 63 static unsigned long default_ps_max_latency_us = 100000; 64 module_param(default_ps_max_latency_us, ulong, 0644); 65 MODULE_PARM_DESC(default_ps_max_latency_us, 66 "max power saving latency for new devices; use PM QOS to change per device"); 67 68 static bool force_apst; 69 module_param(force_apst, bool, 0644); 70 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 71 72 static unsigned long apst_primary_timeout_ms = 100; 73 module_param(apst_primary_timeout_ms, ulong, 0644); 74 MODULE_PARM_DESC(apst_primary_timeout_ms, 75 "primary APST timeout in ms"); 76 77 static unsigned long apst_secondary_timeout_ms = 2000; 78 module_param(apst_secondary_timeout_ms, ulong, 0644); 79 MODULE_PARM_DESC(apst_secondary_timeout_ms, 80 "secondary APST timeout in ms"); 81 82 static unsigned long apst_primary_latency_tol_us = 15000; 83 module_param(apst_primary_latency_tol_us, ulong, 0644); 84 MODULE_PARM_DESC(apst_primary_latency_tol_us, 85 "primary APST latency tolerance in us"); 86 87 static unsigned long apst_secondary_latency_tol_us = 100000; 88 module_param(apst_secondary_latency_tol_us, ulong, 0644); 89 MODULE_PARM_DESC(apst_secondary_latency_tol_us, 90 "secondary APST latency tolerance in us"); 91 92 /* 93 * nvme_wq - hosts nvme related works that are not reset or delete 94 * nvme_reset_wq - hosts nvme reset works 95 * nvme_delete_wq - hosts nvme delete works 96 * 97 * nvme_wq will host works such as scan, aen handling, fw activation, 98 * keep-alive, periodic reconnects etc. nvme_reset_wq 99 * runs reset works which also flush works hosted on nvme_wq for 100 * serialization purposes. nvme_delete_wq host controller deletion 101 * works which flush reset works for serialization. 102 */ 103 struct workqueue_struct *nvme_wq; 104 EXPORT_SYMBOL_GPL(nvme_wq); 105 106 struct workqueue_struct *nvme_reset_wq; 107 EXPORT_SYMBOL_GPL(nvme_reset_wq); 108 109 struct workqueue_struct *nvme_delete_wq; 110 EXPORT_SYMBOL_GPL(nvme_delete_wq); 111 112 static LIST_HEAD(nvme_subsystems); 113 static DEFINE_MUTEX(nvme_subsystems_lock); 114 115 static DEFINE_IDA(nvme_instance_ida); 116 static dev_t nvme_ctrl_base_chr_devt; 117 static struct class *nvme_class; 118 static struct class *nvme_subsys_class; 119 120 static DEFINE_IDA(nvme_ns_chr_minor_ida); 121 static dev_t nvme_ns_chr_devt; 122 static struct class *nvme_ns_chr_class; 123 124 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 125 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 126 unsigned nsid); 127 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 128 struct nvme_command *cmd); 129 130 void nvme_queue_scan(struct nvme_ctrl *ctrl) 131 { 132 /* 133 * Only new queue scan work when admin and IO queues are both alive 134 */ 135 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset) 136 queue_work(nvme_wq, &ctrl->scan_work); 137 } 138 139 /* 140 * Use this function to proceed with scheduling reset_work for a controller 141 * that had previously been set to the resetting state. This is intended for 142 * code paths that can't be interrupted by other reset attempts. A hot removal 143 * may prevent this from succeeding. 144 */ 145 int nvme_try_sched_reset(struct nvme_ctrl *ctrl) 146 { 147 if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING) 148 return -EBUSY; 149 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 150 return -EBUSY; 151 return 0; 152 } 153 EXPORT_SYMBOL_GPL(nvme_try_sched_reset); 154 155 static void nvme_failfast_work(struct work_struct *work) 156 { 157 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 158 struct nvme_ctrl, failfast_work); 159 160 if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING) 161 return; 162 163 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 164 dev_info(ctrl->device, "failfast expired\n"); 165 nvme_kick_requeue_lists(ctrl); 166 } 167 168 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl) 169 { 170 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1) 171 return; 172 173 schedule_delayed_work(&ctrl->failfast_work, 174 ctrl->opts->fast_io_fail_tmo * HZ); 175 } 176 177 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl) 178 { 179 if (!ctrl->opts) 180 return; 181 182 cancel_delayed_work_sync(&ctrl->failfast_work); 183 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 184 } 185 186 187 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 188 { 189 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 190 return -EBUSY; 191 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 192 return -EBUSY; 193 return 0; 194 } 195 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 196 197 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 198 { 199 int ret; 200 201 ret = nvme_reset_ctrl(ctrl); 202 if (!ret) { 203 flush_work(&ctrl->reset_work); 204 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE) 205 ret = -ENETRESET; 206 } 207 208 return ret; 209 } 210 211 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl) 212 { 213 dev_info(ctrl->device, 214 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl)); 215 216 flush_work(&ctrl->reset_work); 217 nvme_stop_ctrl(ctrl); 218 nvme_remove_namespaces(ctrl); 219 ctrl->ops->delete_ctrl(ctrl); 220 nvme_uninit_ctrl(ctrl); 221 } 222 223 static void nvme_delete_ctrl_work(struct work_struct *work) 224 { 225 struct nvme_ctrl *ctrl = 226 container_of(work, struct nvme_ctrl, delete_work); 227 228 nvme_do_delete_ctrl(ctrl); 229 } 230 231 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 232 { 233 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 234 return -EBUSY; 235 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 236 return -EBUSY; 237 return 0; 238 } 239 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 240 241 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 242 { 243 /* 244 * Keep a reference until nvme_do_delete_ctrl() complete, 245 * since ->delete_ctrl can free the controller. 246 */ 247 nvme_get_ctrl(ctrl); 248 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 249 nvme_do_delete_ctrl(ctrl); 250 nvme_put_ctrl(ctrl); 251 } 252 253 static blk_status_t nvme_error_status(u16 status) 254 { 255 switch (status & 0x7ff) { 256 case NVME_SC_SUCCESS: 257 return BLK_STS_OK; 258 case NVME_SC_CAP_EXCEEDED: 259 return BLK_STS_NOSPC; 260 case NVME_SC_LBA_RANGE: 261 case NVME_SC_CMD_INTERRUPTED: 262 case NVME_SC_NS_NOT_READY: 263 return BLK_STS_TARGET; 264 case NVME_SC_BAD_ATTRIBUTES: 265 case NVME_SC_ONCS_NOT_SUPPORTED: 266 case NVME_SC_INVALID_OPCODE: 267 case NVME_SC_INVALID_FIELD: 268 case NVME_SC_INVALID_NS: 269 return BLK_STS_NOTSUPP; 270 case NVME_SC_WRITE_FAULT: 271 case NVME_SC_READ_ERROR: 272 case NVME_SC_UNWRITTEN_BLOCK: 273 case NVME_SC_ACCESS_DENIED: 274 case NVME_SC_READ_ONLY: 275 case NVME_SC_COMPARE_FAILED: 276 return BLK_STS_MEDIUM; 277 case NVME_SC_GUARD_CHECK: 278 case NVME_SC_APPTAG_CHECK: 279 case NVME_SC_REFTAG_CHECK: 280 case NVME_SC_INVALID_PI: 281 return BLK_STS_PROTECTION; 282 case NVME_SC_RESERVATION_CONFLICT: 283 return BLK_STS_RESV_CONFLICT; 284 case NVME_SC_HOST_PATH_ERROR: 285 return BLK_STS_TRANSPORT; 286 case NVME_SC_ZONE_TOO_MANY_ACTIVE: 287 return BLK_STS_ZONE_ACTIVE_RESOURCE; 288 case NVME_SC_ZONE_TOO_MANY_OPEN: 289 return BLK_STS_ZONE_OPEN_RESOURCE; 290 default: 291 return BLK_STS_IOERR; 292 } 293 } 294 295 static void nvme_retry_req(struct request *req) 296 { 297 unsigned long delay = 0; 298 u16 crd; 299 300 /* The mask and shift result must be <= 3 */ 301 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11; 302 if (crd) 303 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100; 304 305 nvme_req(req)->retries++; 306 blk_mq_requeue_request(req, false); 307 blk_mq_delay_kick_requeue_list(req->q, delay); 308 } 309 310 static void nvme_log_error(struct request *req) 311 { 312 struct nvme_ns *ns = req->q->queuedata; 313 struct nvme_request *nr = nvme_req(req); 314 315 if (ns) { 316 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %u blocks, %s (sct 0x%x / sc 0x%x) %s%s\n", 317 ns->disk ? ns->disk->disk_name : "?", 318 nvme_get_opcode_str(nr->cmd->common.opcode), 319 nr->cmd->common.opcode, 320 nvme_sect_to_lba(ns->head, blk_rq_pos(req)), 321 blk_rq_bytes(req) >> ns->head->lba_shift, 322 nvme_get_error_status_str(nr->status), 323 nr->status >> 8 & 7, /* Status Code Type */ 324 nr->status & 0xff, /* Status Code */ 325 nr->status & NVME_SC_MORE ? "MORE " : "", 326 nr->status & NVME_SC_DNR ? "DNR " : ""); 327 return; 328 } 329 330 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n", 331 dev_name(nr->ctrl->device), 332 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 333 nr->cmd->common.opcode, 334 nvme_get_error_status_str(nr->status), 335 nr->status >> 8 & 7, /* Status Code Type */ 336 nr->status & 0xff, /* Status Code */ 337 nr->status & NVME_SC_MORE ? "MORE " : "", 338 nr->status & NVME_SC_DNR ? "DNR " : ""); 339 } 340 341 enum nvme_disposition { 342 COMPLETE, 343 RETRY, 344 FAILOVER, 345 AUTHENTICATE, 346 }; 347 348 static inline enum nvme_disposition nvme_decide_disposition(struct request *req) 349 { 350 if (likely(nvme_req(req)->status == 0)) 351 return COMPLETE; 352 353 if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED) 354 return AUTHENTICATE; 355 356 if (blk_noretry_request(req) || 357 (nvme_req(req)->status & NVME_SC_DNR) || 358 nvme_req(req)->retries >= nvme_max_retries) 359 return COMPLETE; 360 361 if (req->cmd_flags & REQ_NVME_MPATH) { 362 if (nvme_is_path_error(nvme_req(req)->status) || 363 blk_queue_dying(req->q)) 364 return FAILOVER; 365 } else { 366 if (blk_queue_dying(req->q)) 367 return COMPLETE; 368 } 369 370 return RETRY; 371 } 372 373 static inline void nvme_end_req_zoned(struct request *req) 374 { 375 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 376 req_op(req) == REQ_OP_ZONE_APPEND) { 377 struct nvme_ns *ns = req->q->queuedata; 378 379 req->__sector = nvme_lba_to_sect(ns->head, 380 le64_to_cpu(nvme_req(req)->result.u64)); 381 } 382 } 383 384 static inline void nvme_end_req(struct request *req) 385 { 386 blk_status_t status = nvme_error_status(nvme_req(req)->status); 387 388 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) 389 nvme_log_error(req); 390 nvme_end_req_zoned(req); 391 nvme_trace_bio_complete(req); 392 if (req->cmd_flags & REQ_NVME_MPATH) 393 nvme_mpath_end_request(req); 394 blk_mq_end_request(req, status); 395 } 396 397 void nvme_complete_rq(struct request *req) 398 { 399 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 400 401 trace_nvme_complete_rq(req); 402 nvme_cleanup_cmd(req); 403 404 /* 405 * Completions of long-running commands should not be able to 406 * defer sending of periodic keep alives, since the controller 407 * may have completed processing such commands a long time ago 408 * (arbitrarily close to command submission time). 409 * req->deadline - req->timeout is the command submission time 410 * in jiffies. 411 */ 412 if (ctrl->kas && 413 req->deadline - req->timeout >= ctrl->ka_last_check_time) 414 ctrl->comp_seen = true; 415 416 switch (nvme_decide_disposition(req)) { 417 case COMPLETE: 418 nvme_end_req(req); 419 return; 420 case RETRY: 421 nvme_retry_req(req); 422 return; 423 case FAILOVER: 424 nvme_failover_req(req); 425 return; 426 case AUTHENTICATE: 427 #ifdef CONFIG_NVME_HOST_AUTH 428 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 429 nvme_retry_req(req); 430 #else 431 nvme_end_req(req); 432 #endif 433 return; 434 } 435 } 436 EXPORT_SYMBOL_GPL(nvme_complete_rq); 437 438 void nvme_complete_batch_req(struct request *req) 439 { 440 trace_nvme_complete_rq(req); 441 nvme_cleanup_cmd(req); 442 nvme_end_req_zoned(req); 443 } 444 EXPORT_SYMBOL_GPL(nvme_complete_batch_req); 445 446 /* 447 * Called to unwind from ->queue_rq on a failed command submission so that the 448 * multipathing code gets called to potentially failover to another path. 449 * The caller needs to unwind all transport specific resource allocations and 450 * must return propagate the return value. 451 */ 452 blk_status_t nvme_host_path_error(struct request *req) 453 { 454 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR; 455 blk_mq_set_request_complete(req); 456 nvme_complete_rq(req); 457 return BLK_STS_OK; 458 } 459 EXPORT_SYMBOL_GPL(nvme_host_path_error); 460 461 bool nvme_cancel_request(struct request *req, void *data) 462 { 463 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 464 "Cancelling I/O %d", req->tag); 465 466 /* don't abort one completed or idle request */ 467 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT) 468 return true; 469 470 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD; 471 nvme_req(req)->flags |= NVME_REQ_CANCELLED; 472 blk_mq_complete_request(req); 473 return true; 474 } 475 EXPORT_SYMBOL_GPL(nvme_cancel_request); 476 477 void nvme_cancel_tagset(struct nvme_ctrl *ctrl) 478 { 479 if (ctrl->tagset) { 480 blk_mq_tagset_busy_iter(ctrl->tagset, 481 nvme_cancel_request, ctrl); 482 blk_mq_tagset_wait_completed_request(ctrl->tagset); 483 } 484 } 485 EXPORT_SYMBOL_GPL(nvme_cancel_tagset); 486 487 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl) 488 { 489 if (ctrl->admin_tagset) { 490 blk_mq_tagset_busy_iter(ctrl->admin_tagset, 491 nvme_cancel_request, ctrl); 492 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset); 493 } 494 } 495 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset); 496 497 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 498 enum nvme_ctrl_state new_state) 499 { 500 enum nvme_ctrl_state old_state; 501 unsigned long flags; 502 bool changed = false; 503 504 spin_lock_irqsave(&ctrl->lock, flags); 505 506 old_state = nvme_ctrl_state(ctrl); 507 switch (new_state) { 508 case NVME_CTRL_LIVE: 509 switch (old_state) { 510 case NVME_CTRL_NEW: 511 case NVME_CTRL_RESETTING: 512 case NVME_CTRL_CONNECTING: 513 changed = true; 514 fallthrough; 515 default: 516 break; 517 } 518 break; 519 case NVME_CTRL_RESETTING: 520 switch (old_state) { 521 case NVME_CTRL_NEW: 522 case NVME_CTRL_LIVE: 523 changed = true; 524 fallthrough; 525 default: 526 break; 527 } 528 break; 529 case NVME_CTRL_CONNECTING: 530 switch (old_state) { 531 case NVME_CTRL_NEW: 532 case NVME_CTRL_RESETTING: 533 changed = true; 534 fallthrough; 535 default: 536 break; 537 } 538 break; 539 case NVME_CTRL_DELETING: 540 switch (old_state) { 541 case NVME_CTRL_LIVE: 542 case NVME_CTRL_RESETTING: 543 case NVME_CTRL_CONNECTING: 544 changed = true; 545 fallthrough; 546 default: 547 break; 548 } 549 break; 550 case NVME_CTRL_DELETING_NOIO: 551 switch (old_state) { 552 case NVME_CTRL_DELETING: 553 case NVME_CTRL_DEAD: 554 changed = true; 555 fallthrough; 556 default: 557 break; 558 } 559 break; 560 case NVME_CTRL_DEAD: 561 switch (old_state) { 562 case NVME_CTRL_DELETING: 563 changed = true; 564 fallthrough; 565 default: 566 break; 567 } 568 break; 569 default: 570 break; 571 } 572 573 if (changed) { 574 WRITE_ONCE(ctrl->state, new_state); 575 wake_up_all(&ctrl->state_wq); 576 } 577 578 spin_unlock_irqrestore(&ctrl->lock, flags); 579 if (!changed) 580 return false; 581 582 if (new_state == NVME_CTRL_LIVE) { 583 if (old_state == NVME_CTRL_CONNECTING) 584 nvme_stop_failfast_work(ctrl); 585 nvme_kick_requeue_lists(ctrl); 586 } else if (new_state == NVME_CTRL_CONNECTING && 587 old_state == NVME_CTRL_RESETTING) { 588 nvme_start_failfast_work(ctrl); 589 } 590 return changed; 591 } 592 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 593 594 /* 595 * Returns true for sink states that can't ever transition back to live. 596 */ 597 static bool nvme_state_terminal(struct nvme_ctrl *ctrl) 598 { 599 switch (nvme_ctrl_state(ctrl)) { 600 case NVME_CTRL_NEW: 601 case NVME_CTRL_LIVE: 602 case NVME_CTRL_RESETTING: 603 case NVME_CTRL_CONNECTING: 604 return false; 605 case NVME_CTRL_DELETING: 606 case NVME_CTRL_DELETING_NOIO: 607 case NVME_CTRL_DEAD: 608 return true; 609 default: 610 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 611 return true; 612 } 613 } 614 615 /* 616 * Waits for the controller state to be resetting, or returns false if it is 617 * not possible to ever transition to that state. 618 */ 619 bool nvme_wait_reset(struct nvme_ctrl *ctrl) 620 { 621 wait_event(ctrl->state_wq, 622 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) || 623 nvme_state_terminal(ctrl)); 624 return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING; 625 } 626 EXPORT_SYMBOL_GPL(nvme_wait_reset); 627 628 static void nvme_free_ns_head(struct kref *ref) 629 { 630 struct nvme_ns_head *head = 631 container_of(ref, struct nvme_ns_head, ref); 632 633 nvme_mpath_remove_disk(head); 634 ida_free(&head->subsys->ns_ida, head->instance); 635 cleanup_srcu_struct(&head->srcu); 636 nvme_put_subsystem(head->subsys); 637 kfree(head); 638 } 639 640 bool nvme_tryget_ns_head(struct nvme_ns_head *head) 641 { 642 return kref_get_unless_zero(&head->ref); 643 } 644 645 void nvme_put_ns_head(struct nvme_ns_head *head) 646 { 647 kref_put(&head->ref, nvme_free_ns_head); 648 } 649 650 static void nvme_free_ns(struct kref *kref) 651 { 652 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 653 654 put_disk(ns->disk); 655 nvme_put_ns_head(ns->head); 656 nvme_put_ctrl(ns->ctrl); 657 kfree(ns); 658 } 659 660 static inline bool nvme_get_ns(struct nvme_ns *ns) 661 { 662 return kref_get_unless_zero(&ns->kref); 663 } 664 665 void nvme_put_ns(struct nvme_ns *ns) 666 { 667 kref_put(&ns->kref, nvme_free_ns); 668 } 669 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU); 670 671 static inline void nvme_clear_nvme_request(struct request *req) 672 { 673 nvme_req(req)->status = 0; 674 nvme_req(req)->retries = 0; 675 nvme_req(req)->flags = 0; 676 req->rq_flags |= RQF_DONTPREP; 677 } 678 679 /* initialize a passthrough request */ 680 void nvme_init_request(struct request *req, struct nvme_command *cmd) 681 { 682 if (req->q->queuedata) 683 req->timeout = NVME_IO_TIMEOUT; 684 else /* no queuedata implies admin queue */ 685 req->timeout = NVME_ADMIN_TIMEOUT; 686 687 /* passthru commands should let the driver set the SGL flags */ 688 cmd->common.flags &= ~NVME_CMD_SGL_ALL; 689 690 req->cmd_flags |= REQ_FAILFAST_DRIVER; 691 if (req->mq_hctx->type == HCTX_TYPE_POLL) 692 req->cmd_flags |= REQ_POLLED; 693 nvme_clear_nvme_request(req); 694 req->rq_flags |= RQF_QUIET; 695 memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd)); 696 } 697 EXPORT_SYMBOL_GPL(nvme_init_request); 698 699 /* 700 * For something we're not in a state to send to the device the default action 701 * is to busy it and retry it after the controller state is recovered. However, 702 * if the controller is deleting or if anything is marked for failfast or 703 * nvme multipath it is immediately failed. 704 * 705 * Note: commands used to initialize the controller will be marked for failfast. 706 * Note: nvme cli/ioctl commands are marked for failfast. 707 */ 708 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 709 struct request *rq) 710 { 711 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 712 713 if (state != NVME_CTRL_DELETING_NOIO && 714 state != NVME_CTRL_DELETING && 715 state != NVME_CTRL_DEAD && 716 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) && 717 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH)) 718 return BLK_STS_RESOURCE; 719 return nvme_host_path_error(rq); 720 } 721 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command); 722 723 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 724 bool queue_live) 725 { 726 struct nvme_request *req = nvme_req(rq); 727 728 /* 729 * currently we have a problem sending passthru commands 730 * on the admin_q if the controller is not LIVE because we can't 731 * make sure that they are going out after the admin connect, 732 * controller enable and/or other commands in the initialization 733 * sequence. until the controller will be LIVE, fail with 734 * BLK_STS_RESOURCE so that they will be rescheduled. 735 */ 736 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD)) 737 return false; 738 739 if (ctrl->ops->flags & NVME_F_FABRICS) { 740 /* 741 * Only allow commands on a live queue, except for the connect 742 * command, which is require to set the queue live in the 743 * appropinquate states. 744 */ 745 switch (nvme_ctrl_state(ctrl)) { 746 case NVME_CTRL_CONNECTING: 747 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) && 748 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect || 749 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send || 750 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive)) 751 return true; 752 break; 753 default: 754 break; 755 case NVME_CTRL_DEAD: 756 return false; 757 } 758 } 759 760 return queue_live; 761 } 762 EXPORT_SYMBOL_GPL(__nvme_check_ready); 763 764 static inline void nvme_setup_flush(struct nvme_ns *ns, 765 struct nvme_command *cmnd) 766 { 767 memset(cmnd, 0, sizeof(*cmnd)); 768 cmnd->common.opcode = nvme_cmd_flush; 769 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 770 } 771 772 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 773 struct nvme_command *cmnd) 774 { 775 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 776 struct nvme_dsm_range *range; 777 struct bio *bio; 778 779 /* 780 * Some devices do not consider the DSM 'Number of Ranges' field when 781 * determining how much data to DMA. Always allocate memory for maximum 782 * number of segments to prevent device reading beyond end of buffer. 783 */ 784 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES; 785 786 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN); 787 if (!range) { 788 /* 789 * If we fail allocation our range, fallback to the controller 790 * discard page. If that's also busy, it's safe to return 791 * busy, as we know we can make progress once that's freed. 792 */ 793 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 794 return BLK_STS_RESOURCE; 795 796 range = page_address(ns->ctrl->discard_page); 797 } 798 799 if (queue_max_discard_segments(req->q) == 1) { 800 u64 slba = nvme_sect_to_lba(ns->head, blk_rq_pos(req)); 801 u32 nlb = blk_rq_sectors(req) >> (ns->head->lba_shift - 9); 802 803 range[0].cattr = cpu_to_le32(0); 804 range[0].nlb = cpu_to_le32(nlb); 805 range[0].slba = cpu_to_le64(slba); 806 n = 1; 807 } else { 808 __rq_for_each_bio(bio, req) { 809 u64 slba = nvme_sect_to_lba(ns->head, 810 bio->bi_iter.bi_sector); 811 u32 nlb = bio->bi_iter.bi_size >> ns->head->lba_shift; 812 813 if (n < segments) { 814 range[n].cattr = cpu_to_le32(0); 815 range[n].nlb = cpu_to_le32(nlb); 816 range[n].slba = cpu_to_le64(slba); 817 } 818 n++; 819 } 820 } 821 822 if (WARN_ON_ONCE(n != segments)) { 823 if (virt_to_page(range) == ns->ctrl->discard_page) 824 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 825 else 826 kfree(range); 827 return BLK_STS_IOERR; 828 } 829 830 memset(cmnd, 0, sizeof(*cmnd)); 831 cmnd->dsm.opcode = nvme_cmd_dsm; 832 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 833 cmnd->dsm.nr = cpu_to_le32(segments - 1); 834 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 835 836 bvec_set_virt(&req->special_vec, range, alloc_size); 837 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 838 839 return BLK_STS_OK; 840 } 841 842 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd, 843 struct request *req) 844 { 845 u32 upper, lower; 846 u64 ref48; 847 848 /* both rw and write zeroes share the same reftag format */ 849 switch (ns->head->guard_type) { 850 case NVME_NVM_NS_16B_GUARD: 851 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 852 break; 853 case NVME_NVM_NS_64B_GUARD: 854 ref48 = ext_pi_ref_tag(req); 855 lower = lower_32_bits(ref48); 856 upper = upper_32_bits(ref48); 857 858 cmnd->rw.reftag = cpu_to_le32(lower); 859 cmnd->rw.cdw3 = cpu_to_le32(upper); 860 break; 861 default: 862 break; 863 } 864 } 865 866 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns, 867 struct request *req, struct nvme_command *cmnd) 868 { 869 memset(cmnd, 0, sizeof(*cmnd)); 870 871 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 872 return nvme_setup_discard(ns, req, cmnd); 873 874 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes; 875 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id); 876 cmnd->write_zeroes.slba = 877 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req))); 878 cmnd->write_zeroes.length = 879 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1); 880 881 if (!(req->cmd_flags & REQ_NOUNMAP) && 882 (ns->head->features & NVME_NS_DEAC)) 883 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC); 884 885 if (nvme_ns_has_pi(ns->head)) { 886 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT); 887 888 switch (ns->head->pi_type) { 889 case NVME_NS_DPS_PI_TYPE1: 890 case NVME_NS_DPS_PI_TYPE2: 891 nvme_set_ref_tag(ns, cmnd, req); 892 break; 893 } 894 } 895 896 return BLK_STS_OK; 897 } 898 899 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 900 struct request *req, struct nvme_command *cmnd, 901 enum nvme_opcode op) 902 { 903 u16 control = 0; 904 u32 dsmgmt = 0; 905 906 if (req->cmd_flags & REQ_FUA) 907 control |= NVME_RW_FUA; 908 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 909 control |= NVME_RW_LR; 910 911 if (req->cmd_flags & REQ_RAHEAD) 912 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 913 914 cmnd->rw.opcode = op; 915 cmnd->rw.flags = 0; 916 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 917 cmnd->rw.cdw2 = 0; 918 cmnd->rw.cdw3 = 0; 919 cmnd->rw.metadata = 0; 920 cmnd->rw.slba = 921 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req))); 922 cmnd->rw.length = 923 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1); 924 cmnd->rw.reftag = 0; 925 cmnd->rw.apptag = 0; 926 cmnd->rw.appmask = 0; 927 928 if (ns->head->ms) { 929 /* 930 * If formated with metadata, the block layer always provides a 931 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 932 * we enable the PRACT bit for protection information or set the 933 * namespace capacity to zero to prevent any I/O. 934 */ 935 if (!blk_integrity_rq(req)) { 936 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns->head))) 937 return BLK_STS_NOTSUPP; 938 control |= NVME_RW_PRINFO_PRACT; 939 } 940 941 switch (ns->head->pi_type) { 942 case NVME_NS_DPS_PI_TYPE3: 943 control |= NVME_RW_PRINFO_PRCHK_GUARD; 944 break; 945 case NVME_NS_DPS_PI_TYPE1: 946 case NVME_NS_DPS_PI_TYPE2: 947 control |= NVME_RW_PRINFO_PRCHK_GUARD | 948 NVME_RW_PRINFO_PRCHK_REF; 949 if (op == nvme_cmd_zone_append) 950 control |= NVME_RW_APPEND_PIREMAP; 951 nvme_set_ref_tag(ns, cmnd, req); 952 break; 953 } 954 } 955 956 cmnd->rw.control = cpu_to_le16(control); 957 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 958 return 0; 959 } 960 961 void nvme_cleanup_cmd(struct request *req) 962 { 963 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 964 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 965 966 if (req->special_vec.bv_page == ctrl->discard_page) 967 clear_bit_unlock(0, &ctrl->discard_page_busy); 968 else 969 kfree(bvec_virt(&req->special_vec)); 970 } 971 } 972 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 973 974 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req) 975 { 976 struct nvme_command *cmd = nvme_req(req)->cmd; 977 blk_status_t ret = BLK_STS_OK; 978 979 if (!(req->rq_flags & RQF_DONTPREP)) 980 nvme_clear_nvme_request(req); 981 982 switch (req_op(req)) { 983 case REQ_OP_DRV_IN: 984 case REQ_OP_DRV_OUT: 985 /* these are setup prior to execution in nvme_init_request() */ 986 break; 987 case REQ_OP_FLUSH: 988 nvme_setup_flush(ns, cmd); 989 break; 990 case REQ_OP_ZONE_RESET_ALL: 991 case REQ_OP_ZONE_RESET: 992 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET); 993 break; 994 case REQ_OP_ZONE_OPEN: 995 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN); 996 break; 997 case REQ_OP_ZONE_CLOSE: 998 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE); 999 break; 1000 case REQ_OP_ZONE_FINISH: 1001 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH); 1002 break; 1003 case REQ_OP_WRITE_ZEROES: 1004 ret = nvme_setup_write_zeroes(ns, req, cmd); 1005 break; 1006 case REQ_OP_DISCARD: 1007 ret = nvme_setup_discard(ns, req, cmd); 1008 break; 1009 case REQ_OP_READ: 1010 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read); 1011 break; 1012 case REQ_OP_WRITE: 1013 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write); 1014 break; 1015 case REQ_OP_ZONE_APPEND: 1016 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append); 1017 break; 1018 default: 1019 WARN_ON_ONCE(1); 1020 return BLK_STS_IOERR; 1021 } 1022 1023 cmd->common.command_id = nvme_cid(req); 1024 trace_nvme_setup_cmd(req, cmd); 1025 return ret; 1026 } 1027 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 1028 1029 /* 1030 * Return values: 1031 * 0: success 1032 * >0: nvme controller's cqe status response 1033 * <0: kernel error in lieu of controller response 1034 */ 1035 int nvme_execute_rq(struct request *rq, bool at_head) 1036 { 1037 blk_status_t status; 1038 1039 status = blk_execute_rq(rq, at_head); 1040 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED) 1041 return -EINTR; 1042 if (nvme_req(rq)->status) 1043 return nvme_req(rq)->status; 1044 return blk_status_to_errno(status); 1045 } 1046 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU); 1047 1048 /* 1049 * Returns 0 on success. If the result is negative, it's a Linux error code; 1050 * if the result is positive, it's an NVM Express status code 1051 */ 1052 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1053 union nvme_result *result, void *buffer, unsigned bufflen, 1054 int qid, int at_head, blk_mq_req_flags_t flags) 1055 { 1056 struct request *req; 1057 int ret; 1058 1059 if (qid == NVME_QID_ANY) 1060 req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags); 1061 else 1062 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags, 1063 qid - 1); 1064 1065 if (IS_ERR(req)) 1066 return PTR_ERR(req); 1067 nvme_init_request(req, cmd); 1068 1069 if (buffer && bufflen) { 1070 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); 1071 if (ret) 1072 goto out; 1073 } 1074 1075 ret = nvme_execute_rq(req, at_head); 1076 if (result && ret >= 0) 1077 *result = nvme_req(req)->result; 1078 out: 1079 blk_mq_free_request(req); 1080 return ret; 1081 } 1082 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 1083 1084 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1085 void *buffer, unsigned bufflen) 1086 { 1087 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 1088 NVME_QID_ANY, 0, 0); 1089 } 1090 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 1091 1092 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1093 { 1094 u32 effects = 0; 1095 1096 if (ns) { 1097 effects = le32_to_cpu(ns->head->effects->iocs[opcode]); 1098 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC)) 1099 dev_warn_once(ctrl->device, 1100 "IO command:%02x has unusual effects:%08x\n", 1101 opcode, effects); 1102 1103 /* 1104 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues, 1105 * which would deadlock when done on an I/O command. Note that 1106 * We already warn about an unusual effect above. 1107 */ 1108 effects &= ~NVME_CMD_EFFECTS_CSE_MASK; 1109 } else { 1110 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1111 } 1112 1113 return effects; 1114 } 1115 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU); 1116 1117 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1118 { 1119 u32 effects = nvme_command_effects(ctrl, ns, opcode); 1120 1121 /* 1122 * For simplicity, IO to all namespaces is quiesced even if the command 1123 * effects say only one namespace is affected. 1124 */ 1125 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1126 mutex_lock(&ctrl->scan_lock); 1127 mutex_lock(&ctrl->subsys->lock); 1128 nvme_mpath_start_freeze(ctrl->subsys); 1129 nvme_mpath_wait_freeze(ctrl->subsys); 1130 nvme_start_freeze(ctrl); 1131 nvme_wait_freeze(ctrl); 1132 } 1133 return effects; 1134 } 1135 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU); 1136 1137 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1138 struct nvme_command *cmd, int status) 1139 { 1140 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1141 nvme_unfreeze(ctrl); 1142 nvme_mpath_unfreeze(ctrl->subsys); 1143 mutex_unlock(&ctrl->subsys->lock); 1144 mutex_unlock(&ctrl->scan_lock); 1145 } 1146 if (effects & NVME_CMD_EFFECTS_CCC) { 1147 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY, 1148 &ctrl->flags)) { 1149 dev_info(ctrl->device, 1150 "controller capabilities changed, reset may be required to take effect.\n"); 1151 } 1152 } 1153 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) { 1154 nvme_queue_scan(ctrl); 1155 flush_work(&ctrl->scan_work); 1156 } 1157 if (ns) 1158 return; 1159 1160 switch (cmd->common.opcode) { 1161 case nvme_admin_set_features: 1162 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) { 1163 case NVME_FEAT_KATO: 1164 /* 1165 * Keep alive commands interval on the host should be 1166 * updated when KATO is modified by Set Features 1167 * commands. 1168 */ 1169 if (!status) 1170 nvme_update_keep_alive(ctrl, cmd); 1171 break; 1172 default: 1173 break; 1174 } 1175 break; 1176 default: 1177 break; 1178 } 1179 } 1180 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU); 1181 1182 /* 1183 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1: 1184 * 1185 * The host should send Keep Alive commands at half of the Keep Alive Timeout 1186 * accounting for transport roundtrip times [..]. 1187 */ 1188 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl) 1189 { 1190 unsigned long delay = ctrl->kato * HZ / 2; 1191 1192 /* 1193 * When using Traffic Based Keep Alive, we need to run 1194 * nvme_keep_alive_work at twice the normal frequency, as one 1195 * command completion can postpone sending a keep alive command 1196 * by up to twice the delay between runs. 1197 */ 1198 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) 1199 delay /= 2; 1200 return delay; 1201 } 1202 1203 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl) 1204 { 1205 unsigned long now = jiffies; 1206 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1207 unsigned long ka_next_check_tm = ctrl->ka_last_check_time + delay; 1208 1209 if (time_after(now, ka_next_check_tm)) 1210 delay = 0; 1211 else 1212 delay = ka_next_check_tm - now; 1213 1214 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1215 } 1216 1217 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq, 1218 blk_status_t status) 1219 { 1220 struct nvme_ctrl *ctrl = rq->end_io_data; 1221 unsigned long flags; 1222 bool startka = false; 1223 unsigned long rtt = jiffies - (rq->deadline - rq->timeout); 1224 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1225 1226 /* 1227 * Subtract off the keepalive RTT so nvme_keep_alive_work runs 1228 * at the desired frequency. 1229 */ 1230 if (rtt <= delay) { 1231 delay -= rtt; 1232 } else { 1233 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n", 1234 jiffies_to_msecs(rtt)); 1235 delay = 0; 1236 } 1237 1238 blk_mq_free_request(rq); 1239 1240 if (status) { 1241 dev_err(ctrl->device, 1242 "failed nvme_keep_alive_end_io error=%d\n", 1243 status); 1244 return RQ_END_IO_NONE; 1245 } 1246 1247 ctrl->ka_last_check_time = jiffies; 1248 ctrl->comp_seen = false; 1249 spin_lock_irqsave(&ctrl->lock, flags); 1250 if (ctrl->state == NVME_CTRL_LIVE || 1251 ctrl->state == NVME_CTRL_CONNECTING) 1252 startka = true; 1253 spin_unlock_irqrestore(&ctrl->lock, flags); 1254 if (startka) 1255 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1256 return RQ_END_IO_NONE; 1257 } 1258 1259 static void nvme_keep_alive_work(struct work_struct *work) 1260 { 1261 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 1262 struct nvme_ctrl, ka_work); 1263 bool comp_seen = ctrl->comp_seen; 1264 struct request *rq; 1265 1266 ctrl->ka_last_check_time = jiffies; 1267 1268 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 1269 dev_dbg(ctrl->device, 1270 "reschedule traffic based keep-alive timer\n"); 1271 ctrl->comp_seen = false; 1272 nvme_queue_keep_alive_work(ctrl); 1273 return; 1274 } 1275 1276 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd), 1277 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT); 1278 if (IS_ERR(rq)) { 1279 /* allocation failure, reset the controller */ 1280 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq)); 1281 nvme_reset_ctrl(ctrl); 1282 return; 1283 } 1284 nvme_init_request(rq, &ctrl->ka_cmd); 1285 1286 rq->timeout = ctrl->kato * HZ; 1287 rq->end_io = nvme_keep_alive_end_io; 1288 rq->end_io_data = ctrl; 1289 blk_execute_rq_nowait(rq, false); 1290 } 1291 1292 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 1293 { 1294 if (unlikely(ctrl->kato == 0)) 1295 return; 1296 1297 nvme_queue_keep_alive_work(ctrl); 1298 } 1299 1300 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 1301 { 1302 if (unlikely(ctrl->kato == 0)) 1303 return; 1304 1305 cancel_delayed_work_sync(&ctrl->ka_work); 1306 } 1307 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 1308 1309 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 1310 struct nvme_command *cmd) 1311 { 1312 unsigned int new_kato = 1313 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000); 1314 1315 dev_info(ctrl->device, 1316 "keep alive interval updated from %u ms to %u ms\n", 1317 ctrl->kato * 1000 / 2, new_kato * 1000 / 2); 1318 1319 nvme_stop_keep_alive(ctrl); 1320 ctrl->kato = new_kato; 1321 nvme_start_keep_alive(ctrl); 1322 } 1323 1324 /* 1325 * In NVMe 1.0 the CNS field was just a binary controller or namespace 1326 * flag, thus sending any new CNS opcodes has a big chance of not working. 1327 * Qemu unfortunately had that bug after reporting a 1.1 version compliance 1328 * (but not for any later version). 1329 */ 1330 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl) 1331 { 1332 if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS) 1333 return ctrl->vs < NVME_VS(1, 2, 0); 1334 return ctrl->vs < NVME_VS(1, 1, 0); 1335 } 1336 1337 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 1338 { 1339 struct nvme_command c = { }; 1340 int error; 1341 1342 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1343 c.identify.opcode = nvme_admin_identify; 1344 c.identify.cns = NVME_ID_CNS_CTRL; 1345 1346 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 1347 if (!*id) 1348 return -ENOMEM; 1349 1350 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 1351 sizeof(struct nvme_id_ctrl)); 1352 if (error) 1353 kfree(*id); 1354 return error; 1355 } 1356 1357 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, 1358 struct nvme_ns_id_desc *cur, bool *csi_seen) 1359 { 1360 const char *warn_str = "ctrl returned bogus length:"; 1361 void *data = cur; 1362 1363 switch (cur->nidt) { 1364 case NVME_NIDT_EUI64: 1365 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1366 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n", 1367 warn_str, cur->nidl); 1368 return -1; 1369 } 1370 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1371 return NVME_NIDT_EUI64_LEN; 1372 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN); 1373 return NVME_NIDT_EUI64_LEN; 1374 case NVME_NIDT_NGUID: 1375 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1376 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n", 1377 warn_str, cur->nidl); 1378 return -1; 1379 } 1380 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1381 return NVME_NIDT_NGUID_LEN; 1382 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN); 1383 return NVME_NIDT_NGUID_LEN; 1384 case NVME_NIDT_UUID: 1385 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1386 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n", 1387 warn_str, cur->nidl); 1388 return -1; 1389 } 1390 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1391 return NVME_NIDT_UUID_LEN; 1392 uuid_copy(&ids->uuid, data + sizeof(*cur)); 1393 return NVME_NIDT_UUID_LEN; 1394 case NVME_NIDT_CSI: 1395 if (cur->nidl != NVME_NIDT_CSI_LEN) { 1396 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n", 1397 warn_str, cur->nidl); 1398 return -1; 1399 } 1400 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN); 1401 *csi_seen = true; 1402 return NVME_NIDT_CSI_LEN; 1403 default: 1404 /* Skip unknown types */ 1405 return cur->nidl; 1406 } 1407 } 1408 1409 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, 1410 struct nvme_ns_info *info) 1411 { 1412 struct nvme_command c = { }; 1413 bool csi_seen = false; 1414 int status, pos, len; 1415 void *data; 1416 1417 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl)) 1418 return 0; 1419 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST) 1420 return 0; 1421 1422 c.identify.opcode = nvme_admin_identify; 1423 c.identify.nsid = cpu_to_le32(info->nsid); 1424 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1425 1426 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1427 if (!data) 1428 return -ENOMEM; 1429 1430 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1431 NVME_IDENTIFY_DATA_SIZE); 1432 if (status) { 1433 dev_warn(ctrl->device, 1434 "Identify Descriptors failed (nsid=%u, status=0x%x)\n", 1435 info->nsid, status); 1436 goto free_data; 1437 } 1438 1439 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1440 struct nvme_ns_id_desc *cur = data + pos; 1441 1442 if (cur->nidl == 0) 1443 break; 1444 1445 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen); 1446 if (len < 0) 1447 break; 1448 1449 len += sizeof(*cur); 1450 } 1451 1452 if (nvme_multi_css(ctrl) && !csi_seen) { 1453 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n", 1454 info->nsid); 1455 status = -EINVAL; 1456 } 1457 1458 free_data: 1459 kfree(data); 1460 return status; 1461 } 1462 1463 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1464 struct nvme_id_ns **id) 1465 { 1466 struct nvme_command c = { }; 1467 int error; 1468 1469 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1470 c.identify.opcode = nvme_admin_identify; 1471 c.identify.nsid = cpu_to_le32(nsid); 1472 c.identify.cns = NVME_ID_CNS_NS; 1473 1474 *id = kmalloc(sizeof(**id), GFP_KERNEL); 1475 if (!*id) 1476 return -ENOMEM; 1477 1478 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id)); 1479 if (error) { 1480 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error); 1481 kfree(*id); 1482 } 1483 return error; 1484 } 1485 1486 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl, 1487 struct nvme_ns_info *info) 1488 { 1489 struct nvme_ns_ids *ids = &info->ids; 1490 struct nvme_id_ns *id; 1491 int ret; 1492 1493 ret = nvme_identify_ns(ctrl, info->nsid, &id); 1494 if (ret) 1495 return ret; 1496 1497 if (id->ncap == 0) { 1498 /* namespace not allocated or attached */ 1499 info->is_removed = true; 1500 ret = -ENODEV; 1501 goto error; 1502 } 1503 1504 info->anagrpid = id->anagrpid; 1505 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1506 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1507 info->is_ready = true; 1508 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) { 1509 dev_info(ctrl->device, 1510 "Ignoring bogus Namespace Identifiers\n"); 1511 } else { 1512 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1513 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 1514 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64)); 1515 if (ctrl->vs >= NVME_VS(1, 2, 0) && 1516 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 1517 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid)); 1518 } 1519 1520 error: 1521 kfree(id); 1522 return ret; 1523 } 1524 1525 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl, 1526 struct nvme_ns_info *info) 1527 { 1528 struct nvme_id_ns_cs_indep *id; 1529 struct nvme_command c = { 1530 .identify.opcode = nvme_admin_identify, 1531 .identify.nsid = cpu_to_le32(info->nsid), 1532 .identify.cns = NVME_ID_CNS_NS_CS_INDEP, 1533 }; 1534 int ret; 1535 1536 id = kmalloc(sizeof(*id), GFP_KERNEL); 1537 if (!id) 1538 return -ENOMEM; 1539 1540 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 1541 if (!ret) { 1542 info->anagrpid = id->anagrpid; 1543 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1544 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1545 info->is_ready = id->nstat & NVME_NSTAT_NRDY; 1546 } 1547 kfree(id); 1548 return ret; 1549 } 1550 1551 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, 1552 unsigned int dword11, void *buffer, size_t buflen, u32 *result) 1553 { 1554 union nvme_result res = { 0 }; 1555 struct nvme_command c = { }; 1556 int ret; 1557 1558 c.features.opcode = op; 1559 c.features.fid = cpu_to_le32(fid); 1560 c.features.dword11 = cpu_to_le32(dword11); 1561 1562 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1563 buffer, buflen, NVME_QID_ANY, 0, 0); 1564 if (ret >= 0 && result) 1565 *result = le32_to_cpu(res.u32); 1566 return ret; 1567 } 1568 1569 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1570 unsigned int dword11, void *buffer, size_t buflen, 1571 u32 *result) 1572 { 1573 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer, 1574 buflen, result); 1575 } 1576 EXPORT_SYMBOL_GPL(nvme_set_features); 1577 1578 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1579 unsigned int dword11, void *buffer, size_t buflen, 1580 u32 *result) 1581 { 1582 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer, 1583 buflen, result); 1584 } 1585 EXPORT_SYMBOL_GPL(nvme_get_features); 1586 1587 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1588 { 1589 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1590 u32 result; 1591 int status, nr_io_queues; 1592 1593 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1594 &result); 1595 if (status < 0) 1596 return status; 1597 1598 /* 1599 * Degraded controllers might return an error when setting the queue 1600 * count. We still want to be able to bring them online and offer 1601 * access to the admin queue, as that might be only way to fix them up. 1602 */ 1603 if (status > 0) { 1604 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1605 *count = 0; 1606 } else { 1607 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1608 *count = min(*count, nr_io_queues); 1609 } 1610 1611 return 0; 1612 } 1613 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1614 1615 #define NVME_AEN_SUPPORTED \ 1616 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ 1617 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) 1618 1619 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1620 { 1621 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1622 int status; 1623 1624 if (!supported_aens) 1625 return; 1626 1627 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1628 NULL, 0, &result); 1629 if (status) 1630 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1631 supported_aens); 1632 1633 queue_work(nvme_wq, &ctrl->async_event_work); 1634 } 1635 1636 static int nvme_ns_open(struct nvme_ns *ns) 1637 { 1638 1639 /* should never be called due to GENHD_FL_HIDDEN */ 1640 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head))) 1641 goto fail; 1642 if (!nvme_get_ns(ns)) 1643 goto fail; 1644 if (!try_module_get(ns->ctrl->ops->module)) 1645 goto fail_put_ns; 1646 1647 return 0; 1648 1649 fail_put_ns: 1650 nvme_put_ns(ns); 1651 fail: 1652 return -ENXIO; 1653 } 1654 1655 static void nvme_ns_release(struct nvme_ns *ns) 1656 { 1657 1658 module_put(ns->ctrl->ops->module); 1659 nvme_put_ns(ns); 1660 } 1661 1662 static int nvme_open(struct gendisk *disk, blk_mode_t mode) 1663 { 1664 return nvme_ns_open(disk->private_data); 1665 } 1666 1667 static void nvme_release(struct gendisk *disk) 1668 { 1669 nvme_ns_release(disk->private_data); 1670 } 1671 1672 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1673 { 1674 /* some standard values */ 1675 geo->heads = 1 << 6; 1676 geo->sectors = 1 << 5; 1677 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1678 return 0; 1679 } 1680 1681 #ifdef CONFIG_BLK_DEV_INTEGRITY 1682 static void nvme_init_integrity(struct gendisk *disk, 1683 struct nvme_ns_head *head, u32 max_integrity_segments) 1684 { 1685 struct blk_integrity integrity = { }; 1686 1687 switch (head->pi_type) { 1688 case NVME_NS_DPS_PI_TYPE3: 1689 switch (head->guard_type) { 1690 case NVME_NVM_NS_16B_GUARD: 1691 integrity.profile = &t10_pi_type3_crc; 1692 integrity.tag_size = sizeof(u16) + sizeof(u32); 1693 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1694 break; 1695 case NVME_NVM_NS_64B_GUARD: 1696 integrity.profile = &ext_pi_type3_crc64; 1697 integrity.tag_size = sizeof(u16) + 6; 1698 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1699 break; 1700 default: 1701 integrity.profile = NULL; 1702 break; 1703 } 1704 break; 1705 case NVME_NS_DPS_PI_TYPE1: 1706 case NVME_NS_DPS_PI_TYPE2: 1707 switch (head->guard_type) { 1708 case NVME_NVM_NS_16B_GUARD: 1709 integrity.profile = &t10_pi_type1_crc; 1710 integrity.tag_size = sizeof(u16); 1711 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1712 break; 1713 case NVME_NVM_NS_64B_GUARD: 1714 integrity.profile = &ext_pi_type1_crc64; 1715 integrity.tag_size = sizeof(u16); 1716 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1717 break; 1718 default: 1719 integrity.profile = NULL; 1720 break; 1721 } 1722 break; 1723 default: 1724 integrity.profile = NULL; 1725 break; 1726 } 1727 1728 integrity.tuple_size = head->ms; 1729 blk_integrity_register(disk, &integrity); 1730 blk_queue_max_integrity_segments(disk->queue, max_integrity_segments); 1731 } 1732 #else 1733 static void nvme_init_integrity(struct gendisk *disk, 1734 struct nvme_ns_head *head, u32 max_integrity_segments) 1735 { 1736 } 1737 #endif /* CONFIG_BLK_DEV_INTEGRITY */ 1738 1739 static void nvme_config_discard(struct nvme_ctrl *ctrl, struct gendisk *disk, 1740 struct nvme_ns_head *head) 1741 { 1742 struct request_queue *queue = disk->queue; 1743 u32 size = queue_logical_block_size(queue); 1744 1745 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(head, UINT_MAX)) 1746 ctrl->max_discard_sectors = 1747 nvme_lba_to_sect(head, ctrl->dmrsl); 1748 1749 if (ctrl->max_discard_sectors == 0) { 1750 blk_queue_max_discard_sectors(queue, 0); 1751 return; 1752 } 1753 1754 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) < 1755 NVME_DSM_MAX_RANGES); 1756 1757 queue->limits.discard_granularity = size; 1758 1759 /* If discard is already enabled, don't reset queue limits */ 1760 if (queue->limits.max_discard_sectors) 1761 return; 1762 1763 blk_queue_max_discard_sectors(queue, ctrl->max_discard_sectors); 1764 blk_queue_max_discard_segments(queue, ctrl->max_discard_segments); 1765 1766 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 1767 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX); 1768 } 1769 1770 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 1771 { 1772 return uuid_equal(&a->uuid, &b->uuid) && 1773 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 1774 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 && 1775 a->csi == b->csi; 1776 } 1777 1778 static int nvme_init_ms(struct nvme_ctrl *ctrl, struct nvme_ns_head *head, 1779 struct nvme_id_ns *id) 1780 { 1781 bool first = id->dps & NVME_NS_DPS_PI_FIRST; 1782 unsigned lbaf = nvme_lbaf_index(id->flbas); 1783 struct nvme_command c = { }; 1784 struct nvme_id_ns_nvm *nvm; 1785 int ret = 0; 1786 u32 elbaf; 1787 1788 head->pi_size = 0; 1789 head->ms = le16_to_cpu(id->lbaf[lbaf].ms); 1790 if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) { 1791 head->pi_size = sizeof(struct t10_pi_tuple); 1792 head->guard_type = NVME_NVM_NS_16B_GUARD; 1793 goto set_pi; 1794 } 1795 1796 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); 1797 if (!nvm) 1798 return -ENOMEM; 1799 1800 c.identify.opcode = nvme_admin_identify; 1801 c.identify.nsid = cpu_to_le32(head->ns_id); 1802 c.identify.cns = NVME_ID_CNS_CS_NS; 1803 c.identify.csi = NVME_CSI_NVM; 1804 1805 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, nvm, sizeof(*nvm)); 1806 if (ret) 1807 goto free_data; 1808 1809 elbaf = le32_to_cpu(nvm->elbaf[lbaf]); 1810 1811 /* no support for storage tag formats right now */ 1812 if (nvme_elbaf_sts(elbaf)) 1813 goto free_data; 1814 1815 head->guard_type = nvme_elbaf_guard_type(elbaf); 1816 switch (head->guard_type) { 1817 case NVME_NVM_NS_64B_GUARD: 1818 head->pi_size = sizeof(struct crc64_pi_tuple); 1819 break; 1820 case NVME_NVM_NS_16B_GUARD: 1821 head->pi_size = sizeof(struct t10_pi_tuple); 1822 break; 1823 default: 1824 break; 1825 } 1826 1827 free_data: 1828 kfree(nvm); 1829 set_pi: 1830 if (head->pi_size && (first || head->ms == head->pi_size)) 1831 head->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1832 else 1833 head->pi_type = 0; 1834 1835 return ret; 1836 } 1837 1838 static int nvme_configure_metadata(struct nvme_ctrl *ctrl, 1839 struct nvme_ns_head *head, struct nvme_id_ns *id) 1840 { 1841 int ret; 1842 1843 ret = nvme_init_ms(ctrl, head, id); 1844 if (ret) 1845 return ret; 1846 1847 head->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS); 1848 if (!head->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 1849 return 0; 1850 1851 if (ctrl->ops->flags & NVME_F_FABRICS) { 1852 /* 1853 * The NVMe over Fabrics specification only supports metadata as 1854 * part of the extended data LBA. We rely on HCA/HBA support to 1855 * remap the separate metadata buffer from the block layer. 1856 */ 1857 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT))) 1858 return 0; 1859 1860 head->features |= NVME_NS_EXT_LBAS; 1861 1862 /* 1863 * The current fabrics transport drivers support namespace 1864 * metadata formats only if nvme_ns_has_pi() returns true. 1865 * Suppress support for all other formats so the namespace will 1866 * have a 0 capacity and not be usable through the block stack. 1867 * 1868 * Note, this check will need to be modified if any drivers 1869 * gain the ability to use other metadata formats. 1870 */ 1871 if (ctrl->max_integrity_segments && nvme_ns_has_pi(head)) 1872 head->features |= NVME_NS_METADATA_SUPPORTED; 1873 } else { 1874 /* 1875 * For PCIe controllers, we can't easily remap the separate 1876 * metadata buffer from the block layer and thus require a 1877 * separate metadata buffer for block layer metadata/PI support. 1878 * We allow extended LBAs for the passthrough interface, though. 1879 */ 1880 if (id->flbas & NVME_NS_FLBAS_META_EXT) 1881 head->features |= NVME_NS_EXT_LBAS; 1882 else 1883 head->features |= NVME_NS_METADATA_SUPPORTED; 1884 } 1885 return 0; 1886 } 1887 1888 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl, 1889 struct request_queue *q) 1890 { 1891 bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT; 1892 1893 if (ctrl->max_hw_sectors) { 1894 u32 max_segments = 1895 (ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1; 1896 1897 max_segments = min_not_zero(max_segments, ctrl->max_segments); 1898 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors); 1899 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX)); 1900 } 1901 blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1); 1902 blk_queue_dma_alignment(q, 3); 1903 blk_queue_write_cache(q, vwc, vwc); 1904 } 1905 1906 static void nvme_update_disk_info(struct nvme_ctrl *ctrl, struct gendisk *disk, 1907 struct nvme_ns_head *head, struct nvme_id_ns *id) 1908 { 1909 sector_t capacity = nvme_lba_to_sect(head, le64_to_cpu(id->nsze)); 1910 u32 bs = 1U << head->lba_shift; 1911 u32 atomic_bs, phys_bs, io_opt = 0; 1912 1913 /* 1914 * The block layer can't support LBA sizes larger than the page size 1915 * or smaller than a sector size yet, so catch this early and don't 1916 * allow block I/O. 1917 */ 1918 if (head->lba_shift > PAGE_SHIFT || head->lba_shift < SECTOR_SHIFT) { 1919 capacity = 0; 1920 bs = (1 << 9); 1921 } 1922 1923 blk_integrity_unregister(disk); 1924 1925 atomic_bs = phys_bs = bs; 1926 if (id->nabo == 0) { 1927 /* 1928 * Bit 1 indicates whether NAWUPF is defined for this namespace 1929 * and whether it should be used instead of AWUPF. If NAWUPF == 1930 * 0 then AWUPF must be used instead. 1931 */ 1932 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) 1933 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs; 1934 else 1935 atomic_bs = (1 + ctrl->subsys->awupf) * bs; 1936 } 1937 1938 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) { 1939 /* NPWG = Namespace Preferred Write Granularity */ 1940 phys_bs = bs * (1 + le16_to_cpu(id->npwg)); 1941 /* NOWS = Namespace Optimal Write Size */ 1942 io_opt = bs * (1 + le16_to_cpu(id->nows)); 1943 } 1944 1945 blk_queue_logical_block_size(disk->queue, bs); 1946 /* 1947 * Linux filesystems assume writing a single physical block is 1948 * an atomic operation. Hence limit the physical block size to the 1949 * value of the Atomic Write Unit Power Fail parameter. 1950 */ 1951 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs)); 1952 blk_queue_io_min(disk->queue, phys_bs); 1953 blk_queue_io_opt(disk->queue, io_opt); 1954 1955 /* 1956 * Register a metadata profile for PI, or the plain non-integrity NVMe 1957 * metadata masquerading as Type 0 if supported, otherwise reject block 1958 * I/O to namespaces with metadata except when the namespace supports 1959 * PI, as it can strip/insert in that case. 1960 */ 1961 if (head->ms) { 1962 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 1963 (head->features & NVME_NS_METADATA_SUPPORTED)) 1964 nvme_init_integrity(disk, head, 1965 ctrl->max_integrity_segments); 1966 else if (!nvme_ns_has_pi(head)) 1967 capacity = 0; 1968 } 1969 1970 set_capacity_and_notify(disk, capacity); 1971 1972 nvme_config_discard(ctrl, disk, head); 1973 blk_queue_max_write_zeroes_sectors(disk->queue, 1974 ctrl->max_zeroes_sectors); 1975 } 1976 1977 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info) 1978 { 1979 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags); 1980 } 1981 1982 static inline bool nvme_first_scan(struct gendisk *disk) 1983 { 1984 /* nvme_alloc_ns() scans the disk prior to adding it */ 1985 return !disk_live(disk); 1986 } 1987 1988 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id) 1989 { 1990 struct nvme_ctrl *ctrl = ns->ctrl; 1991 u32 iob; 1992 1993 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 1994 is_power_of_2(ctrl->max_hw_sectors)) 1995 iob = ctrl->max_hw_sectors; 1996 else 1997 iob = nvme_lba_to_sect(ns->head, le16_to_cpu(id->noiob)); 1998 1999 if (!iob) 2000 return; 2001 2002 if (!is_power_of_2(iob)) { 2003 if (nvme_first_scan(ns->disk)) 2004 pr_warn("%s: ignoring unaligned IO boundary:%u\n", 2005 ns->disk->disk_name, iob); 2006 return; 2007 } 2008 2009 if (blk_queue_is_zoned(ns->disk->queue)) { 2010 if (nvme_first_scan(ns->disk)) 2011 pr_warn("%s: ignoring zoned namespace IO boundary\n", 2012 ns->disk->disk_name); 2013 return; 2014 } 2015 2016 blk_queue_chunk_sectors(ns->queue, iob); 2017 } 2018 2019 static int nvme_update_ns_info_generic(struct nvme_ns *ns, 2020 struct nvme_ns_info *info) 2021 { 2022 blk_mq_freeze_queue(ns->disk->queue); 2023 nvme_set_queue_limits(ns->ctrl, ns->queue); 2024 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2025 blk_mq_unfreeze_queue(ns->disk->queue); 2026 2027 if (nvme_ns_head_multipath(ns->head)) { 2028 blk_mq_freeze_queue(ns->head->disk->queue); 2029 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2030 nvme_mpath_revalidate_paths(ns); 2031 blk_stack_limits(&ns->head->disk->queue->limits, 2032 &ns->queue->limits, 0); 2033 ns->head->disk->flags |= GENHD_FL_HIDDEN; 2034 blk_mq_unfreeze_queue(ns->head->disk->queue); 2035 } 2036 2037 /* Hide the block-interface for these devices */ 2038 ns->disk->flags |= GENHD_FL_HIDDEN; 2039 set_bit(NVME_NS_READY, &ns->flags); 2040 2041 return 0; 2042 } 2043 2044 static int nvme_update_ns_info_block(struct nvme_ns *ns, 2045 struct nvme_ns_info *info) 2046 { 2047 struct nvme_id_ns *id; 2048 unsigned lbaf; 2049 int ret; 2050 2051 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id); 2052 if (ret) 2053 return ret; 2054 2055 if (id->ncap == 0) { 2056 /* namespace not allocated or attached */ 2057 info->is_removed = true; 2058 ret = -ENODEV; 2059 goto error; 2060 } 2061 2062 blk_mq_freeze_queue(ns->disk->queue); 2063 lbaf = nvme_lbaf_index(id->flbas); 2064 ns->head->lba_shift = id->lbaf[lbaf].ds; 2065 ns->head->nuse = le64_to_cpu(id->nuse); 2066 nvme_set_queue_limits(ns->ctrl, ns->queue); 2067 2068 ret = nvme_configure_metadata(ns->ctrl, ns->head, id); 2069 if (ret < 0) { 2070 blk_mq_unfreeze_queue(ns->disk->queue); 2071 goto out; 2072 } 2073 nvme_set_chunk_sectors(ns, id); 2074 nvme_update_disk_info(ns->ctrl, ns->disk, ns->head, id); 2075 2076 if (ns->head->ids.csi == NVME_CSI_ZNS) { 2077 ret = nvme_update_zone_info(ns, lbaf); 2078 if (ret) { 2079 blk_mq_unfreeze_queue(ns->disk->queue); 2080 goto out; 2081 } 2082 } 2083 2084 /* 2085 * Only set the DEAC bit if the device guarantees that reads from 2086 * deallocated data return zeroes. While the DEAC bit does not 2087 * require that, it must be a no-op if reads from deallocated data 2088 * do not return zeroes. 2089 */ 2090 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3))) 2091 ns->head->features |= NVME_NS_DEAC; 2092 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2093 set_bit(NVME_NS_READY, &ns->flags); 2094 blk_mq_unfreeze_queue(ns->disk->queue); 2095 2096 if (blk_queue_is_zoned(ns->queue)) { 2097 ret = nvme_revalidate_zones(ns); 2098 if (ret && !nvme_first_scan(ns->disk)) 2099 goto out; 2100 } 2101 2102 if (nvme_ns_head_multipath(ns->head)) { 2103 blk_mq_freeze_queue(ns->head->disk->queue); 2104 nvme_update_disk_info(ns->ctrl, ns->head->disk, ns->head, id); 2105 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2106 nvme_mpath_revalidate_paths(ns); 2107 blk_stack_limits(&ns->head->disk->queue->limits, 2108 &ns->queue->limits, 0); 2109 disk_update_readahead(ns->head->disk); 2110 blk_mq_unfreeze_queue(ns->head->disk->queue); 2111 } 2112 2113 ret = 0; 2114 out: 2115 /* 2116 * If probing fails due an unsupported feature, hide the block device, 2117 * but still allow other access. 2118 */ 2119 if (ret == -ENODEV) { 2120 ns->disk->flags |= GENHD_FL_HIDDEN; 2121 set_bit(NVME_NS_READY, &ns->flags); 2122 ret = 0; 2123 } 2124 2125 error: 2126 kfree(id); 2127 return ret; 2128 } 2129 2130 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info) 2131 { 2132 switch (info->ids.csi) { 2133 case NVME_CSI_ZNS: 2134 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 2135 dev_info(ns->ctrl->device, 2136 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n", 2137 info->nsid); 2138 return nvme_update_ns_info_generic(ns, info); 2139 } 2140 return nvme_update_ns_info_block(ns, info); 2141 case NVME_CSI_NVM: 2142 return nvme_update_ns_info_block(ns, info); 2143 default: 2144 dev_info(ns->ctrl->device, 2145 "block device for nsid %u not supported (csi %u)\n", 2146 info->nsid, info->ids.csi); 2147 return nvme_update_ns_info_generic(ns, info); 2148 } 2149 } 2150 2151 #ifdef CONFIG_BLK_SED_OPAL 2152 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2153 bool send) 2154 { 2155 struct nvme_ctrl *ctrl = data; 2156 struct nvme_command cmd = { }; 2157 2158 if (send) 2159 cmd.common.opcode = nvme_admin_security_send; 2160 else 2161 cmd.common.opcode = nvme_admin_security_recv; 2162 cmd.common.nsid = 0; 2163 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 2164 cmd.common.cdw11 = cpu_to_le32(len); 2165 2166 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 2167 NVME_QID_ANY, 1, 0); 2168 } 2169 2170 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2171 { 2172 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) { 2173 if (!ctrl->opal_dev) 2174 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit); 2175 else if (was_suspended) 2176 opal_unlock_from_suspend(ctrl->opal_dev); 2177 } else { 2178 free_opal_dev(ctrl->opal_dev); 2179 ctrl->opal_dev = NULL; 2180 } 2181 } 2182 #else 2183 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2184 { 2185 } 2186 #endif /* CONFIG_BLK_SED_OPAL */ 2187 2188 #ifdef CONFIG_BLK_DEV_ZONED 2189 static int nvme_report_zones(struct gendisk *disk, sector_t sector, 2190 unsigned int nr_zones, report_zones_cb cb, void *data) 2191 { 2192 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb, 2193 data); 2194 } 2195 #else 2196 #define nvme_report_zones NULL 2197 #endif /* CONFIG_BLK_DEV_ZONED */ 2198 2199 const struct block_device_operations nvme_bdev_ops = { 2200 .owner = THIS_MODULE, 2201 .ioctl = nvme_ioctl, 2202 .compat_ioctl = blkdev_compat_ptr_ioctl, 2203 .open = nvme_open, 2204 .release = nvme_release, 2205 .getgeo = nvme_getgeo, 2206 .report_zones = nvme_report_zones, 2207 .pr_ops = &nvme_pr_ops, 2208 }; 2209 2210 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val, 2211 u32 timeout, const char *op) 2212 { 2213 unsigned long timeout_jiffies = jiffies + timeout * HZ; 2214 u32 csts; 2215 int ret; 2216 2217 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2218 if (csts == ~0) 2219 return -ENODEV; 2220 if ((csts & mask) == val) 2221 break; 2222 2223 usleep_range(1000, 2000); 2224 if (fatal_signal_pending(current)) 2225 return -EINTR; 2226 if (time_after(jiffies, timeout_jiffies)) { 2227 dev_err(ctrl->device, 2228 "Device not ready; aborting %s, CSTS=0x%x\n", 2229 op, csts); 2230 return -ENODEV; 2231 } 2232 } 2233 2234 return ret; 2235 } 2236 2237 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown) 2238 { 2239 int ret; 2240 2241 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2242 if (shutdown) 2243 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 2244 else 2245 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 2246 2247 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2248 if (ret) 2249 return ret; 2250 2251 if (shutdown) { 2252 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK, 2253 NVME_CSTS_SHST_CMPLT, 2254 ctrl->shutdown_timeout, "shutdown"); 2255 } 2256 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 2257 msleep(NVME_QUIRK_DELAY_AMOUNT); 2258 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0, 2259 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset"); 2260 } 2261 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 2262 2263 int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 2264 { 2265 unsigned dev_page_min; 2266 u32 timeout; 2267 int ret; 2268 2269 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2270 if (ret) { 2271 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2272 return ret; 2273 } 2274 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2275 2276 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) { 2277 dev_err(ctrl->device, 2278 "Minimum device page size %u too large for host (%u)\n", 2279 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT); 2280 return -ENODEV; 2281 } 2282 2283 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI) 2284 ctrl->ctrl_config = NVME_CC_CSS_CSI; 2285 else 2286 ctrl->ctrl_config = NVME_CC_CSS_NVM; 2287 2288 if (ctrl->cap & NVME_CAP_CRMS_CRWMS && ctrl->cap & NVME_CAP_CRMS_CRIMS) 2289 ctrl->ctrl_config |= NVME_CC_CRIME; 2290 2291 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; 2292 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 2293 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 2294 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2295 if (ret) 2296 return ret; 2297 2298 /* Flush write to device (required if transport is PCI) */ 2299 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config); 2300 if (ret) 2301 return ret; 2302 2303 /* CAP value may change after initial CC write */ 2304 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2305 if (ret) 2306 return ret; 2307 2308 timeout = NVME_CAP_TIMEOUT(ctrl->cap); 2309 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) { 2310 u32 crto, ready_timeout; 2311 2312 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto); 2313 if (ret) { 2314 dev_err(ctrl->device, "Reading CRTO failed (%d)\n", 2315 ret); 2316 return ret; 2317 } 2318 2319 /* 2320 * CRTO should always be greater or equal to CAP.TO, but some 2321 * devices are known to get this wrong. Use the larger of the 2322 * two values. 2323 */ 2324 if (ctrl->ctrl_config & NVME_CC_CRIME) 2325 ready_timeout = NVME_CRTO_CRIMT(crto); 2326 else 2327 ready_timeout = NVME_CRTO_CRWMT(crto); 2328 2329 if (ready_timeout < timeout) 2330 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n", 2331 crto, ctrl->cap); 2332 else 2333 timeout = ready_timeout; 2334 } 2335 2336 ctrl->ctrl_config |= NVME_CC_ENABLE; 2337 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2338 if (ret) 2339 return ret; 2340 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY, 2341 (timeout + 1) / 2, "initialisation"); 2342 } 2343 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 2344 2345 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 2346 { 2347 __le64 ts; 2348 int ret; 2349 2350 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 2351 return 0; 2352 2353 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 2354 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 2355 NULL); 2356 if (ret) 2357 dev_warn_once(ctrl->device, 2358 "could not set timestamp (%d)\n", ret); 2359 return ret; 2360 } 2361 2362 static int nvme_configure_host_options(struct nvme_ctrl *ctrl) 2363 { 2364 struct nvme_feat_host_behavior *host; 2365 u8 acre = 0, lbafee = 0; 2366 int ret; 2367 2368 /* Don't bother enabling the feature if retry delay is not reported */ 2369 if (ctrl->crdt[0]) 2370 acre = NVME_ENABLE_ACRE; 2371 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) 2372 lbafee = NVME_ENABLE_LBAFEE; 2373 2374 if (!acre && !lbafee) 2375 return 0; 2376 2377 host = kzalloc(sizeof(*host), GFP_KERNEL); 2378 if (!host) 2379 return 0; 2380 2381 host->acre = acre; 2382 host->lbafee = lbafee; 2383 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 2384 host, sizeof(*host), NULL); 2385 kfree(host); 2386 return ret; 2387 } 2388 2389 /* 2390 * The function checks whether the given total (exlat + enlat) latency of 2391 * a power state allows the latter to be used as an APST transition target. 2392 * It does so by comparing the latency to the primary and secondary latency 2393 * tolerances defined by module params. If there's a match, the corresponding 2394 * timeout value is returned and the matching tolerance index (1 or 2) is 2395 * reported. 2396 */ 2397 static bool nvme_apst_get_transition_time(u64 total_latency, 2398 u64 *transition_time, unsigned *last_index) 2399 { 2400 if (total_latency <= apst_primary_latency_tol_us) { 2401 if (*last_index == 1) 2402 return false; 2403 *last_index = 1; 2404 *transition_time = apst_primary_timeout_ms; 2405 return true; 2406 } 2407 if (apst_secondary_timeout_ms && 2408 total_latency <= apst_secondary_latency_tol_us) { 2409 if (*last_index <= 2) 2410 return false; 2411 *last_index = 2; 2412 *transition_time = apst_secondary_timeout_ms; 2413 return true; 2414 } 2415 return false; 2416 } 2417 2418 /* 2419 * APST (Autonomous Power State Transition) lets us program a table of power 2420 * state transitions that the controller will perform automatically. 2421 * 2422 * Depending on module params, one of the two supported techniques will be used: 2423 * 2424 * - If the parameters provide explicit timeouts and tolerances, they will be 2425 * used to build a table with up to 2 non-operational states to transition to. 2426 * The default parameter values were selected based on the values used by 2427 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic 2428 * regeneration of the APST table in the event of switching between external 2429 * and battery power, the timeouts and tolerances reflect a compromise 2430 * between values used by Microsoft for AC and battery scenarios. 2431 * - If not, we'll configure the table with a simple heuristic: we are willing 2432 * to spend at most 2% of the time transitioning between power states. 2433 * Therefore, when running in any given state, we will enter the next 2434 * lower-power non-operational state after waiting 50 * (enlat + exlat) 2435 * microseconds, as long as that state's exit latency is under the requested 2436 * maximum latency. 2437 * 2438 * We will not autonomously enter any non-operational state for which the total 2439 * latency exceeds ps_max_latency_us. 2440 * 2441 * Users can set ps_max_latency_us to zero to turn off APST. 2442 */ 2443 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 2444 { 2445 struct nvme_feat_auto_pst *table; 2446 unsigned apste = 0; 2447 u64 max_lat_us = 0; 2448 __le64 target = 0; 2449 int max_ps = -1; 2450 int state; 2451 int ret; 2452 unsigned last_lt_index = UINT_MAX; 2453 2454 /* 2455 * If APST isn't supported or if we haven't been initialized yet, 2456 * then don't do anything. 2457 */ 2458 if (!ctrl->apsta) 2459 return 0; 2460 2461 if (ctrl->npss > 31) { 2462 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2463 return 0; 2464 } 2465 2466 table = kzalloc(sizeof(*table), GFP_KERNEL); 2467 if (!table) 2468 return 0; 2469 2470 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2471 /* Turn off APST. */ 2472 dev_dbg(ctrl->device, "APST disabled\n"); 2473 goto done; 2474 } 2475 2476 /* 2477 * Walk through all states from lowest- to highest-power. 2478 * According to the spec, lower-numbered states use more power. NPSS, 2479 * despite the name, is the index of the lowest-power state, not the 2480 * number of states. 2481 */ 2482 for (state = (int)ctrl->npss; state >= 0; state--) { 2483 u64 total_latency_us, exit_latency_us, transition_ms; 2484 2485 if (target) 2486 table->entries[state] = target; 2487 2488 /* 2489 * Don't allow transitions to the deepest state if it's quirked 2490 * off. 2491 */ 2492 if (state == ctrl->npss && 2493 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2494 continue; 2495 2496 /* 2497 * Is this state a useful non-operational state for higher-power 2498 * states to autonomously transition to? 2499 */ 2500 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE)) 2501 continue; 2502 2503 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2504 if (exit_latency_us > ctrl->ps_max_latency_us) 2505 continue; 2506 2507 total_latency_us = exit_latency_us + 2508 le32_to_cpu(ctrl->psd[state].entry_lat); 2509 2510 /* 2511 * This state is good. It can be used as the APST idle target 2512 * for higher power states. 2513 */ 2514 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) { 2515 if (!nvme_apst_get_transition_time(total_latency_us, 2516 &transition_ms, &last_lt_index)) 2517 continue; 2518 } else { 2519 transition_ms = total_latency_us + 19; 2520 do_div(transition_ms, 20); 2521 if (transition_ms > (1 << 24) - 1) 2522 transition_ms = (1 << 24) - 1; 2523 } 2524 2525 target = cpu_to_le64((state << 3) | (transition_ms << 8)); 2526 if (max_ps == -1) 2527 max_ps = state; 2528 if (total_latency_us > max_lat_us) 2529 max_lat_us = total_latency_us; 2530 } 2531 2532 if (max_ps == -1) 2533 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2534 else 2535 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2536 max_ps, max_lat_us, (int)sizeof(*table), table); 2537 apste = 1; 2538 2539 done: 2540 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2541 table, sizeof(*table), NULL); 2542 if (ret) 2543 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2544 kfree(table); 2545 return ret; 2546 } 2547 2548 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2549 { 2550 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2551 u64 latency; 2552 2553 switch (val) { 2554 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2555 case PM_QOS_LATENCY_ANY: 2556 latency = U64_MAX; 2557 break; 2558 2559 default: 2560 latency = val; 2561 } 2562 2563 if (ctrl->ps_max_latency_us != latency) { 2564 ctrl->ps_max_latency_us = latency; 2565 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 2566 nvme_configure_apst(ctrl); 2567 } 2568 } 2569 2570 struct nvme_core_quirk_entry { 2571 /* 2572 * NVMe model and firmware strings are padded with spaces. For 2573 * simplicity, strings in the quirk table are padded with NULLs 2574 * instead. 2575 */ 2576 u16 vid; 2577 const char *mn; 2578 const char *fr; 2579 unsigned long quirks; 2580 }; 2581 2582 static const struct nvme_core_quirk_entry core_quirks[] = { 2583 { 2584 /* 2585 * This Toshiba device seems to die using any APST states. See: 2586 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2587 */ 2588 .vid = 0x1179, 2589 .mn = "THNSF5256GPUK TOSHIBA", 2590 .quirks = NVME_QUIRK_NO_APST, 2591 }, 2592 { 2593 /* 2594 * This LiteON CL1-3D*-Q11 firmware version has a race 2595 * condition associated with actions related to suspend to idle 2596 * LiteON has resolved the problem in future firmware 2597 */ 2598 .vid = 0x14a4, 2599 .fr = "22301111", 2600 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 2601 }, 2602 { 2603 /* 2604 * This Kioxia CD6-V Series / HPE PE8030 device times out and 2605 * aborts I/O during any load, but more easily reproducible 2606 * with discards (fstrim). 2607 * 2608 * The device is left in a state where it is also not possible 2609 * to use "nvme set-feature" to disable APST, but booting with 2610 * nvme_core.default_ps_max_latency=0 works. 2611 */ 2612 .vid = 0x1e0f, 2613 .mn = "KCD6XVUL6T40", 2614 .quirks = NVME_QUIRK_NO_APST, 2615 }, 2616 { 2617 /* 2618 * The external Samsung X5 SSD fails initialization without a 2619 * delay before checking if it is ready and has a whole set of 2620 * other problems. To make this even more interesting, it 2621 * shares the PCI ID with internal Samsung 970 Evo Plus that 2622 * does not need or want these quirks. 2623 */ 2624 .vid = 0x144d, 2625 .mn = "Samsung Portable SSD X5", 2626 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY | 2627 NVME_QUIRK_NO_DEEPEST_PS | 2628 NVME_QUIRK_IGNORE_DEV_SUBNQN, 2629 } 2630 }; 2631 2632 /* match is null-terminated but idstr is space-padded. */ 2633 static bool string_matches(const char *idstr, const char *match, size_t len) 2634 { 2635 size_t matchlen; 2636 2637 if (!match) 2638 return true; 2639 2640 matchlen = strlen(match); 2641 WARN_ON_ONCE(matchlen > len); 2642 2643 if (memcmp(idstr, match, matchlen)) 2644 return false; 2645 2646 for (; matchlen < len; matchlen++) 2647 if (idstr[matchlen] != ' ') 2648 return false; 2649 2650 return true; 2651 } 2652 2653 static bool quirk_matches(const struct nvme_id_ctrl *id, 2654 const struct nvme_core_quirk_entry *q) 2655 { 2656 return q->vid == le16_to_cpu(id->vid) && 2657 string_matches(id->mn, q->mn, sizeof(id->mn)) && 2658 string_matches(id->fr, q->fr, sizeof(id->fr)); 2659 } 2660 2661 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 2662 struct nvme_id_ctrl *id) 2663 { 2664 size_t nqnlen; 2665 int off; 2666 2667 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 2668 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 2669 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 2670 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 2671 return; 2672 } 2673 2674 if (ctrl->vs >= NVME_VS(1, 2, 1)) 2675 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 2676 } 2677 2678 /* 2679 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe 2680 * Base Specification 2.0. It is slightly different from the format 2681 * specified there due to historic reasons, and we can't change it now. 2682 */ 2683 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 2684 "nqn.2014.08.org.nvmexpress:%04x%04x", 2685 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 2686 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 2687 off += sizeof(id->sn); 2688 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 2689 off += sizeof(id->mn); 2690 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 2691 } 2692 2693 static void nvme_release_subsystem(struct device *dev) 2694 { 2695 struct nvme_subsystem *subsys = 2696 container_of(dev, struct nvme_subsystem, dev); 2697 2698 if (subsys->instance >= 0) 2699 ida_free(&nvme_instance_ida, subsys->instance); 2700 kfree(subsys); 2701 } 2702 2703 static void nvme_destroy_subsystem(struct kref *ref) 2704 { 2705 struct nvme_subsystem *subsys = 2706 container_of(ref, struct nvme_subsystem, ref); 2707 2708 mutex_lock(&nvme_subsystems_lock); 2709 list_del(&subsys->entry); 2710 mutex_unlock(&nvme_subsystems_lock); 2711 2712 ida_destroy(&subsys->ns_ida); 2713 device_del(&subsys->dev); 2714 put_device(&subsys->dev); 2715 } 2716 2717 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 2718 { 2719 kref_put(&subsys->ref, nvme_destroy_subsystem); 2720 } 2721 2722 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 2723 { 2724 struct nvme_subsystem *subsys; 2725 2726 lockdep_assert_held(&nvme_subsystems_lock); 2727 2728 /* 2729 * Fail matches for discovery subsystems. This results 2730 * in each discovery controller bound to a unique subsystem. 2731 * This avoids issues with validating controller values 2732 * that can only be true when there is a single unique subsystem. 2733 * There may be multiple and completely independent entities 2734 * that provide discovery controllers. 2735 */ 2736 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME)) 2737 return NULL; 2738 2739 list_for_each_entry(subsys, &nvme_subsystems, entry) { 2740 if (strcmp(subsys->subnqn, subsysnqn)) 2741 continue; 2742 if (!kref_get_unless_zero(&subsys->ref)) 2743 continue; 2744 return subsys; 2745 } 2746 2747 return NULL; 2748 } 2749 2750 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl) 2751 { 2752 return ctrl->opts && ctrl->opts->discovery_nqn; 2753 } 2754 2755 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, 2756 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2757 { 2758 struct nvme_ctrl *tmp; 2759 2760 lockdep_assert_held(&nvme_subsystems_lock); 2761 2762 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) { 2763 if (nvme_state_terminal(tmp)) 2764 continue; 2765 2766 if (tmp->cntlid == ctrl->cntlid) { 2767 dev_err(ctrl->device, 2768 "Duplicate cntlid %u with %s, subsys %s, rejecting\n", 2769 ctrl->cntlid, dev_name(tmp->device), 2770 subsys->subnqn); 2771 return false; 2772 } 2773 2774 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) || 2775 nvme_discovery_ctrl(ctrl)) 2776 continue; 2777 2778 dev_err(ctrl->device, 2779 "Subsystem does not support multiple controllers\n"); 2780 return false; 2781 } 2782 2783 return true; 2784 } 2785 2786 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2787 { 2788 struct nvme_subsystem *subsys, *found; 2789 int ret; 2790 2791 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 2792 if (!subsys) 2793 return -ENOMEM; 2794 2795 subsys->instance = -1; 2796 mutex_init(&subsys->lock); 2797 kref_init(&subsys->ref); 2798 INIT_LIST_HEAD(&subsys->ctrls); 2799 INIT_LIST_HEAD(&subsys->nsheads); 2800 nvme_init_subnqn(subsys, ctrl, id); 2801 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 2802 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 2803 subsys->vendor_id = le16_to_cpu(id->vid); 2804 subsys->cmic = id->cmic; 2805 2806 /* Versions prior to 1.4 don't necessarily report a valid type */ 2807 if (id->cntrltype == NVME_CTRL_DISC || 2808 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME)) 2809 subsys->subtype = NVME_NQN_DISC; 2810 else 2811 subsys->subtype = NVME_NQN_NVME; 2812 2813 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) { 2814 dev_err(ctrl->device, 2815 "Subsystem %s is not a discovery controller", 2816 subsys->subnqn); 2817 kfree(subsys); 2818 return -EINVAL; 2819 } 2820 subsys->awupf = le16_to_cpu(id->awupf); 2821 nvme_mpath_default_iopolicy(subsys); 2822 2823 subsys->dev.class = nvme_subsys_class; 2824 subsys->dev.release = nvme_release_subsystem; 2825 subsys->dev.groups = nvme_subsys_attrs_groups; 2826 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance); 2827 device_initialize(&subsys->dev); 2828 2829 mutex_lock(&nvme_subsystems_lock); 2830 found = __nvme_find_get_subsystem(subsys->subnqn); 2831 if (found) { 2832 put_device(&subsys->dev); 2833 subsys = found; 2834 2835 if (!nvme_validate_cntlid(subsys, ctrl, id)) { 2836 ret = -EINVAL; 2837 goto out_put_subsystem; 2838 } 2839 } else { 2840 ret = device_add(&subsys->dev); 2841 if (ret) { 2842 dev_err(ctrl->device, 2843 "failed to register subsystem device.\n"); 2844 put_device(&subsys->dev); 2845 goto out_unlock; 2846 } 2847 ida_init(&subsys->ns_ida); 2848 list_add_tail(&subsys->entry, &nvme_subsystems); 2849 } 2850 2851 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 2852 dev_name(ctrl->device)); 2853 if (ret) { 2854 dev_err(ctrl->device, 2855 "failed to create sysfs link from subsystem.\n"); 2856 goto out_put_subsystem; 2857 } 2858 2859 if (!found) 2860 subsys->instance = ctrl->instance; 2861 ctrl->subsys = subsys; 2862 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 2863 mutex_unlock(&nvme_subsystems_lock); 2864 return 0; 2865 2866 out_put_subsystem: 2867 nvme_put_subsystem(subsys); 2868 out_unlock: 2869 mutex_unlock(&nvme_subsystems_lock); 2870 return ret; 2871 } 2872 2873 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 2874 void *log, size_t size, u64 offset) 2875 { 2876 struct nvme_command c = { }; 2877 u32 dwlen = nvme_bytes_to_numd(size); 2878 2879 c.get_log_page.opcode = nvme_admin_get_log_page; 2880 c.get_log_page.nsid = cpu_to_le32(nsid); 2881 c.get_log_page.lid = log_page; 2882 c.get_log_page.lsp = lsp; 2883 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 2884 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 2885 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 2886 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 2887 c.get_log_page.csi = csi; 2888 2889 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 2890 } 2891 2892 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi, 2893 struct nvme_effects_log **log) 2894 { 2895 struct nvme_effects_log *cel = xa_load(&ctrl->cels, csi); 2896 int ret; 2897 2898 if (cel) 2899 goto out; 2900 2901 cel = kzalloc(sizeof(*cel), GFP_KERNEL); 2902 if (!cel) 2903 return -ENOMEM; 2904 2905 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi, 2906 cel, sizeof(*cel), 0); 2907 if (ret) { 2908 kfree(cel); 2909 return ret; 2910 } 2911 2912 xa_store(&ctrl->cels, csi, cel, GFP_KERNEL); 2913 out: 2914 *log = cel; 2915 return 0; 2916 } 2917 2918 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units) 2919 { 2920 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val; 2921 2922 if (check_shl_overflow(1U, units + page_shift - 9, &val)) 2923 return UINT_MAX; 2924 return val; 2925 } 2926 2927 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl) 2928 { 2929 struct nvme_command c = { }; 2930 struct nvme_id_ctrl_nvm *id; 2931 int ret; 2932 2933 if (ctrl->oncs & NVME_CTRL_ONCS_DSM) { 2934 ctrl->max_discard_sectors = UINT_MAX; 2935 ctrl->max_discard_segments = NVME_DSM_MAX_RANGES; 2936 } else { 2937 ctrl->max_discard_sectors = 0; 2938 ctrl->max_discard_segments = 0; 2939 } 2940 2941 /* 2942 * Even though NVMe spec explicitly states that MDTS is not applicable 2943 * to the write-zeroes, we are cautious and limit the size to the 2944 * controllers max_hw_sectors value, which is based on the MDTS field 2945 * and possibly other limiting factors. 2946 */ 2947 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) && 2948 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)) 2949 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors; 2950 else 2951 ctrl->max_zeroes_sectors = 0; 2952 2953 if (ctrl->subsys->subtype != NVME_NQN_NVME || 2954 nvme_ctrl_limited_cns(ctrl) || 2955 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags)) 2956 return 0; 2957 2958 id = kzalloc(sizeof(*id), GFP_KERNEL); 2959 if (!id) 2960 return -ENOMEM; 2961 2962 c.identify.opcode = nvme_admin_identify; 2963 c.identify.cns = NVME_ID_CNS_CS_CTRL; 2964 c.identify.csi = NVME_CSI_NVM; 2965 2966 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 2967 if (ret) 2968 goto free_data; 2969 2970 if (id->dmrl) 2971 ctrl->max_discard_segments = id->dmrl; 2972 ctrl->dmrsl = le32_to_cpu(id->dmrsl); 2973 if (id->wzsl) 2974 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl); 2975 2976 free_data: 2977 if (ret > 0) 2978 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags); 2979 kfree(id); 2980 return ret; 2981 } 2982 2983 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl) 2984 { 2985 struct nvme_effects_log *log = ctrl->effects; 2986 2987 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 2988 NVME_CMD_EFFECTS_NCC | 2989 NVME_CMD_EFFECTS_CSE_MASK); 2990 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 2991 NVME_CMD_EFFECTS_CSE_MASK); 2992 2993 /* 2994 * The spec says the result of a security receive command depends on 2995 * the previous security send command. As such, many vendors log this 2996 * command as one to submitted only when no other commands to the same 2997 * namespace are outstanding. The intention is to tell the host to 2998 * prevent mixing security send and receive. 2999 * 3000 * This driver can only enforce such exclusive access against IO 3001 * queues, though. We are not readily able to enforce such a rule for 3002 * two commands to the admin queue, which is the only queue that 3003 * matters for this command. 3004 * 3005 * Rather than blindly freezing the IO queues for this effect that 3006 * doesn't even apply to IO, mask it off. 3007 */ 3008 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK); 3009 3010 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3011 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3012 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3013 } 3014 3015 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 3016 { 3017 int ret = 0; 3018 3019 if (ctrl->effects) 3020 return 0; 3021 3022 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 3023 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 3024 if (ret < 0) 3025 return ret; 3026 } 3027 3028 if (!ctrl->effects) { 3029 ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL); 3030 if (!ctrl->effects) 3031 return -ENOMEM; 3032 xa_store(&ctrl->cels, NVME_CSI_NVM, ctrl->effects, GFP_KERNEL); 3033 } 3034 3035 nvme_init_known_nvm_effects(ctrl); 3036 return 0; 3037 } 3038 3039 static int nvme_check_ctrl_fabric_info(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 3040 { 3041 /* 3042 * In fabrics we need to verify the cntlid matches the 3043 * admin connect 3044 */ 3045 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 3046 dev_err(ctrl->device, 3047 "Mismatching cntlid: Connect %u vs Identify %u, rejecting\n", 3048 ctrl->cntlid, le16_to_cpu(id->cntlid)); 3049 return -EINVAL; 3050 } 3051 3052 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) { 3053 dev_err(ctrl->device, 3054 "keep-alive support is mandatory for fabrics\n"); 3055 return -EINVAL; 3056 } 3057 3058 if (!nvme_discovery_ctrl(ctrl) && ctrl->ioccsz < 4) { 3059 dev_err(ctrl->device, 3060 "I/O queue command capsule supported size %d < 4\n", 3061 ctrl->ioccsz); 3062 return -EINVAL; 3063 } 3064 3065 if (!nvme_discovery_ctrl(ctrl) && ctrl->iorcsz < 1) { 3066 dev_err(ctrl->device, 3067 "I/O queue response capsule supported size %d < 1\n", 3068 ctrl->iorcsz); 3069 return -EINVAL; 3070 } 3071 3072 return 0; 3073 } 3074 3075 static int nvme_init_identify(struct nvme_ctrl *ctrl) 3076 { 3077 struct nvme_id_ctrl *id; 3078 u32 max_hw_sectors; 3079 bool prev_apst_enabled; 3080 int ret; 3081 3082 ret = nvme_identify_ctrl(ctrl, &id); 3083 if (ret) { 3084 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 3085 return -EIO; 3086 } 3087 3088 if (!(ctrl->ops->flags & NVME_F_FABRICS)) 3089 ctrl->cntlid = le16_to_cpu(id->cntlid); 3090 3091 if (!ctrl->identified) { 3092 unsigned int i; 3093 3094 /* 3095 * Check for quirks. Quirk can depend on firmware version, 3096 * so, in principle, the set of quirks present can change 3097 * across a reset. As a possible future enhancement, we 3098 * could re-scan for quirks every time we reinitialize 3099 * the device, but we'd have to make sure that the driver 3100 * behaves intelligently if the quirks change. 3101 */ 3102 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 3103 if (quirk_matches(id, &core_quirks[i])) 3104 ctrl->quirks |= core_quirks[i].quirks; 3105 } 3106 3107 ret = nvme_init_subsystem(ctrl, id); 3108 if (ret) 3109 goto out_free; 3110 3111 ret = nvme_init_effects(ctrl, id); 3112 if (ret) 3113 goto out_free; 3114 } 3115 memcpy(ctrl->subsys->firmware_rev, id->fr, 3116 sizeof(ctrl->subsys->firmware_rev)); 3117 3118 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 3119 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 3120 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 3121 } 3122 3123 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 3124 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 3125 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 3126 3127 ctrl->oacs = le16_to_cpu(id->oacs); 3128 ctrl->oncs = le16_to_cpu(id->oncs); 3129 ctrl->mtfa = le16_to_cpu(id->mtfa); 3130 ctrl->oaes = le32_to_cpu(id->oaes); 3131 ctrl->wctemp = le16_to_cpu(id->wctemp); 3132 ctrl->cctemp = le16_to_cpu(id->cctemp); 3133 3134 atomic_set(&ctrl->abort_limit, id->acl + 1); 3135 ctrl->vwc = id->vwc; 3136 if (id->mdts) 3137 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts); 3138 else 3139 max_hw_sectors = UINT_MAX; 3140 ctrl->max_hw_sectors = 3141 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 3142 3143 nvme_set_queue_limits(ctrl, ctrl->admin_q); 3144 ctrl->sgls = le32_to_cpu(id->sgls); 3145 ctrl->kas = le16_to_cpu(id->kas); 3146 ctrl->max_namespaces = le32_to_cpu(id->mnan); 3147 ctrl->ctratt = le32_to_cpu(id->ctratt); 3148 3149 ctrl->cntrltype = id->cntrltype; 3150 ctrl->dctype = id->dctype; 3151 3152 if (id->rtd3e) { 3153 /* us -> s */ 3154 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC; 3155 3156 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 3157 shutdown_timeout, 60); 3158 3159 if (ctrl->shutdown_timeout != shutdown_timeout) 3160 dev_info(ctrl->device, 3161 "Shutdown timeout set to %u seconds\n", 3162 ctrl->shutdown_timeout); 3163 } else 3164 ctrl->shutdown_timeout = shutdown_timeout; 3165 3166 ctrl->npss = id->npss; 3167 ctrl->apsta = id->apsta; 3168 prev_apst_enabled = ctrl->apst_enabled; 3169 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 3170 if (force_apst && id->apsta) { 3171 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 3172 ctrl->apst_enabled = true; 3173 } else { 3174 ctrl->apst_enabled = false; 3175 } 3176 } else { 3177 ctrl->apst_enabled = id->apsta; 3178 } 3179 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 3180 3181 if (ctrl->ops->flags & NVME_F_FABRICS) { 3182 ctrl->icdoff = le16_to_cpu(id->icdoff); 3183 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 3184 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 3185 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 3186 3187 ret = nvme_check_ctrl_fabric_info(ctrl, id); 3188 if (ret) 3189 goto out_free; 3190 } else { 3191 ctrl->hmpre = le32_to_cpu(id->hmpre); 3192 ctrl->hmmin = le32_to_cpu(id->hmmin); 3193 ctrl->hmminds = le32_to_cpu(id->hmminds); 3194 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 3195 } 3196 3197 ret = nvme_mpath_init_identify(ctrl, id); 3198 if (ret < 0) 3199 goto out_free; 3200 3201 if (ctrl->apst_enabled && !prev_apst_enabled) 3202 dev_pm_qos_expose_latency_tolerance(ctrl->device); 3203 else if (!ctrl->apst_enabled && prev_apst_enabled) 3204 dev_pm_qos_hide_latency_tolerance(ctrl->device); 3205 3206 out_free: 3207 kfree(id); 3208 return ret; 3209 } 3210 3211 /* 3212 * Initialize the cached copies of the Identify data and various controller 3213 * register in our nvme_ctrl structure. This should be called as soon as 3214 * the admin queue is fully up and running. 3215 */ 3216 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended) 3217 { 3218 int ret; 3219 3220 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 3221 if (ret) { 3222 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 3223 return ret; 3224 } 3225 3226 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize); 3227 3228 if (ctrl->vs >= NVME_VS(1, 1, 0)) 3229 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap); 3230 3231 ret = nvme_init_identify(ctrl); 3232 if (ret) 3233 return ret; 3234 3235 ret = nvme_configure_apst(ctrl); 3236 if (ret < 0) 3237 return ret; 3238 3239 ret = nvme_configure_timestamp(ctrl); 3240 if (ret < 0) 3241 return ret; 3242 3243 ret = nvme_configure_host_options(ctrl); 3244 if (ret < 0) 3245 return ret; 3246 3247 nvme_configure_opal(ctrl, was_suspended); 3248 3249 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) { 3250 /* 3251 * Do not return errors unless we are in a controller reset, 3252 * the controller works perfectly fine without hwmon. 3253 */ 3254 ret = nvme_hwmon_init(ctrl); 3255 if (ret == -EINTR) 3256 return ret; 3257 } 3258 3259 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags); 3260 ctrl->identified = true; 3261 3262 nvme_start_keep_alive(ctrl); 3263 3264 return 0; 3265 } 3266 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish); 3267 3268 static int nvme_dev_open(struct inode *inode, struct file *file) 3269 { 3270 struct nvme_ctrl *ctrl = 3271 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3272 3273 switch (nvme_ctrl_state(ctrl)) { 3274 case NVME_CTRL_LIVE: 3275 break; 3276 default: 3277 return -EWOULDBLOCK; 3278 } 3279 3280 nvme_get_ctrl(ctrl); 3281 if (!try_module_get(ctrl->ops->module)) { 3282 nvme_put_ctrl(ctrl); 3283 return -EINVAL; 3284 } 3285 3286 file->private_data = ctrl; 3287 return 0; 3288 } 3289 3290 static int nvme_dev_release(struct inode *inode, struct file *file) 3291 { 3292 struct nvme_ctrl *ctrl = 3293 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3294 3295 module_put(ctrl->ops->module); 3296 nvme_put_ctrl(ctrl); 3297 return 0; 3298 } 3299 3300 static const struct file_operations nvme_dev_fops = { 3301 .owner = THIS_MODULE, 3302 .open = nvme_dev_open, 3303 .release = nvme_dev_release, 3304 .unlocked_ioctl = nvme_dev_ioctl, 3305 .compat_ioctl = compat_ptr_ioctl, 3306 .uring_cmd = nvme_dev_uring_cmd, 3307 }; 3308 3309 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl, 3310 unsigned nsid) 3311 { 3312 struct nvme_ns_head *h; 3313 3314 lockdep_assert_held(&ctrl->subsys->lock); 3315 3316 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) { 3317 /* 3318 * Private namespaces can share NSIDs under some conditions. 3319 * In that case we can't use the same ns_head for namespaces 3320 * with the same NSID. 3321 */ 3322 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h)) 3323 continue; 3324 if (!list_empty(&h->list) && nvme_tryget_ns_head(h)) 3325 return h; 3326 } 3327 3328 return NULL; 3329 } 3330 3331 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys, 3332 struct nvme_ns_ids *ids) 3333 { 3334 bool has_uuid = !uuid_is_null(&ids->uuid); 3335 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid)); 3336 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 3337 struct nvme_ns_head *h; 3338 3339 lockdep_assert_held(&subsys->lock); 3340 3341 list_for_each_entry(h, &subsys->nsheads, entry) { 3342 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid)) 3343 return -EINVAL; 3344 if (has_nguid && 3345 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0) 3346 return -EINVAL; 3347 if (has_eui64 && 3348 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0) 3349 return -EINVAL; 3350 } 3351 3352 return 0; 3353 } 3354 3355 static void nvme_cdev_rel(struct device *dev) 3356 { 3357 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt)); 3358 } 3359 3360 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device) 3361 { 3362 cdev_device_del(cdev, cdev_device); 3363 put_device(cdev_device); 3364 } 3365 3366 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 3367 const struct file_operations *fops, struct module *owner) 3368 { 3369 int minor, ret; 3370 3371 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL); 3372 if (minor < 0) 3373 return minor; 3374 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor); 3375 cdev_device->class = nvme_ns_chr_class; 3376 cdev_device->release = nvme_cdev_rel; 3377 device_initialize(cdev_device); 3378 cdev_init(cdev, fops); 3379 cdev->owner = owner; 3380 ret = cdev_device_add(cdev, cdev_device); 3381 if (ret) 3382 put_device(cdev_device); 3383 3384 return ret; 3385 } 3386 3387 static int nvme_ns_chr_open(struct inode *inode, struct file *file) 3388 { 3389 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3390 } 3391 3392 static int nvme_ns_chr_release(struct inode *inode, struct file *file) 3393 { 3394 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3395 return 0; 3396 } 3397 3398 static const struct file_operations nvme_ns_chr_fops = { 3399 .owner = THIS_MODULE, 3400 .open = nvme_ns_chr_open, 3401 .release = nvme_ns_chr_release, 3402 .unlocked_ioctl = nvme_ns_chr_ioctl, 3403 .compat_ioctl = compat_ptr_ioctl, 3404 .uring_cmd = nvme_ns_chr_uring_cmd, 3405 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll, 3406 }; 3407 3408 static int nvme_add_ns_cdev(struct nvme_ns *ns) 3409 { 3410 int ret; 3411 3412 ns->cdev_device.parent = ns->ctrl->device; 3413 ret = dev_set_name(&ns->cdev_device, "ng%dn%d", 3414 ns->ctrl->instance, ns->head->instance); 3415 if (ret) 3416 return ret; 3417 3418 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops, 3419 ns->ctrl->ops->module); 3420 } 3421 3422 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 3423 struct nvme_ns_info *info) 3424 { 3425 struct nvme_ns_head *head; 3426 size_t size = sizeof(*head); 3427 int ret = -ENOMEM; 3428 3429 #ifdef CONFIG_NVME_MULTIPATH 3430 size += num_possible_nodes() * sizeof(struct nvme_ns *); 3431 #endif 3432 3433 head = kzalloc(size, GFP_KERNEL); 3434 if (!head) 3435 goto out; 3436 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL); 3437 if (ret < 0) 3438 goto out_free_head; 3439 head->instance = ret; 3440 INIT_LIST_HEAD(&head->list); 3441 ret = init_srcu_struct(&head->srcu); 3442 if (ret) 3443 goto out_ida_remove; 3444 head->subsys = ctrl->subsys; 3445 head->ns_id = info->nsid; 3446 head->ids = info->ids; 3447 head->shared = info->is_shared; 3448 ratelimit_state_init(&head->rs_nuse, 5 * HZ, 1); 3449 ratelimit_set_flags(&head->rs_nuse, RATELIMIT_MSG_ON_RELEASE); 3450 kref_init(&head->ref); 3451 3452 if (head->ids.csi) { 3453 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects); 3454 if (ret) 3455 goto out_cleanup_srcu; 3456 } else 3457 head->effects = ctrl->effects; 3458 3459 ret = nvme_mpath_alloc_disk(ctrl, head); 3460 if (ret) 3461 goto out_cleanup_srcu; 3462 3463 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 3464 3465 kref_get(&ctrl->subsys->ref); 3466 3467 return head; 3468 out_cleanup_srcu: 3469 cleanup_srcu_struct(&head->srcu); 3470 out_ida_remove: 3471 ida_free(&ctrl->subsys->ns_ida, head->instance); 3472 out_free_head: 3473 kfree(head); 3474 out: 3475 if (ret > 0) 3476 ret = blk_status_to_errno(nvme_error_status(ret)); 3477 return ERR_PTR(ret); 3478 } 3479 3480 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this, 3481 struct nvme_ns_ids *ids) 3482 { 3483 struct nvme_subsystem *s; 3484 int ret = 0; 3485 3486 /* 3487 * Note that this check is racy as we try to avoid holding the global 3488 * lock over the whole ns_head creation. But it is only intended as 3489 * a sanity check anyway. 3490 */ 3491 mutex_lock(&nvme_subsystems_lock); 3492 list_for_each_entry(s, &nvme_subsystems, entry) { 3493 if (s == this) 3494 continue; 3495 mutex_lock(&s->lock); 3496 ret = nvme_subsys_check_duplicate_ids(s, ids); 3497 mutex_unlock(&s->lock); 3498 if (ret) 3499 break; 3500 } 3501 mutex_unlock(&nvme_subsystems_lock); 3502 3503 return ret; 3504 } 3505 3506 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info) 3507 { 3508 struct nvme_ctrl *ctrl = ns->ctrl; 3509 struct nvme_ns_head *head = NULL; 3510 int ret; 3511 3512 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids); 3513 if (ret) { 3514 /* 3515 * We've found two different namespaces on two different 3516 * subsystems that report the same ID. This is pretty nasty 3517 * for anything that actually requires unique device 3518 * identification. In the kernel we need this for multipathing, 3519 * and in user space the /dev/disk/by-id/ links rely on it. 3520 * 3521 * If the device also claims to be multi-path capable back off 3522 * here now and refuse the probe the second device as this is a 3523 * recipe for data corruption. If not this is probably a 3524 * cheap consumer device if on the PCIe bus, so let the user 3525 * proceed and use the shiny toy, but warn that with changing 3526 * probing order (which due to our async probing could just be 3527 * device taking longer to startup) the other device could show 3528 * up at any time. 3529 */ 3530 nvme_print_device_info(ctrl); 3531 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */ 3532 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) && 3533 info->is_shared)) { 3534 dev_err(ctrl->device, 3535 "ignoring nsid %d because of duplicate IDs\n", 3536 info->nsid); 3537 return ret; 3538 } 3539 3540 dev_err(ctrl->device, 3541 "clearing duplicate IDs for nsid %d\n", info->nsid); 3542 dev_err(ctrl->device, 3543 "use of /dev/disk/by-id/ may cause data corruption\n"); 3544 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid)); 3545 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid)); 3546 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64)); 3547 ctrl->quirks |= NVME_QUIRK_BOGUS_NID; 3548 } 3549 3550 mutex_lock(&ctrl->subsys->lock); 3551 head = nvme_find_ns_head(ctrl, info->nsid); 3552 if (!head) { 3553 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids); 3554 if (ret) { 3555 dev_err(ctrl->device, 3556 "duplicate IDs in subsystem for nsid %d\n", 3557 info->nsid); 3558 goto out_unlock; 3559 } 3560 head = nvme_alloc_ns_head(ctrl, info); 3561 if (IS_ERR(head)) { 3562 ret = PTR_ERR(head); 3563 goto out_unlock; 3564 } 3565 } else { 3566 ret = -EINVAL; 3567 if (!info->is_shared || !head->shared) { 3568 dev_err(ctrl->device, 3569 "Duplicate unshared namespace %d\n", 3570 info->nsid); 3571 goto out_put_ns_head; 3572 } 3573 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) { 3574 dev_err(ctrl->device, 3575 "IDs don't match for shared namespace %d\n", 3576 info->nsid); 3577 goto out_put_ns_head; 3578 } 3579 3580 if (!multipath) { 3581 dev_warn(ctrl->device, 3582 "Found shared namespace %d, but multipathing not supported.\n", 3583 info->nsid); 3584 dev_warn_once(ctrl->device, 3585 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0\n."); 3586 } 3587 } 3588 3589 list_add_tail_rcu(&ns->siblings, &head->list); 3590 ns->head = head; 3591 mutex_unlock(&ctrl->subsys->lock); 3592 return 0; 3593 3594 out_put_ns_head: 3595 nvme_put_ns_head(head); 3596 out_unlock: 3597 mutex_unlock(&ctrl->subsys->lock); 3598 return ret; 3599 } 3600 3601 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3602 { 3603 struct nvme_ns *ns, *ret = NULL; 3604 3605 down_read(&ctrl->namespaces_rwsem); 3606 list_for_each_entry(ns, &ctrl->namespaces, list) { 3607 if (ns->head->ns_id == nsid) { 3608 if (!nvme_get_ns(ns)) 3609 continue; 3610 ret = ns; 3611 break; 3612 } 3613 if (ns->head->ns_id > nsid) 3614 break; 3615 } 3616 up_read(&ctrl->namespaces_rwsem); 3617 return ret; 3618 } 3619 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU); 3620 3621 /* 3622 * Add the namespace to the controller list while keeping the list ordered. 3623 */ 3624 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns) 3625 { 3626 struct nvme_ns *tmp; 3627 3628 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) { 3629 if (tmp->head->ns_id < ns->head->ns_id) { 3630 list_add(&ns->list, &tmp->list); 3631 return; 3632 } 3633 } 3634 list_add(&ns->list, &ns->ctrl->namespaces); 3635 } 3636 3637 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info) 3638 { 3639 struct nvme_ns *ns; 3640 struct gendisk *disk; 3641 int node = ctrl->numa_node; 3642 3643 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 3644 if (!ns) 3645 return; 3646 3647 disk = blk_mq_alloc_disk(ctrl->tagset, ns); 3648 if (IS_ERR(disk)) 3649 goto out_free_ns; 3650 disk->fops = &nvme_bdev_ops; 3651 disk->private_data = ns; 3652 3653 ns->disk = disk; 3654 ns->queue = disk->queue; 3655 3656 if (ctrl->opts && ctrl->opts->data_digest) 3657 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue); 3658 3659 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue); 3660 if (ctrl->ops->supports_pci_p2pdma && 3661 ctrl->ops->supports_pci_p2pdma(ctrl)) 3662 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue); 3663 3664 ns->ctrl = ctrl; 3665 kref_init(&ns->kref); 3666 3667 if (nvme_init_ns_head(ns, info)) 3668 goto out_cleanup_disk; 3669 3670 /* 3671 * If multipathing is enabled, the device name for all disks and not 3672 * just those that represent shared namespaces needs to be based on the 3673 * subsystem instance. Using the controller instance for private 3674 * namespaces could lead to naming collisions between shared and private 3675 * namespaces if they don't use a common numbering scheme. 3676 * 3677 * If multipathing is not enabled, disk names must use the controller 3678 * instance as shared namespaces will show up as multiple block 3679 * devices. 3680 */ 3681 if (nvme_ns_head_multipath(ns->head)) { 3682 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance, 3683 ctrl->instance, ns->head->instance); 3684 disk->flags |= GENHD_FL_HIDDEN; 3685 } else if (multipath) { 3686 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance, 3687 ns->head->instance); 3688 } else { 3689 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, 3690 ns->head->instance); 3691 } 3692 3693 if (nvme_update_ns_info(ns, info)) 3694 goto out_unlink_ns; 3695 3696 down_write(&ctrl->namespaces_rwsem); 3697 /* 3698 * Ensure that no namespaces are added to the ctrl list after the queues 3699 * are frozen, thereby avoiding a deadlock between scan and reset. 3700 */ 3701 if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) { 3702 up_write(&ctrl->namespaces_rwsem); 3703 goto out_unlink_ns; 3704 } 3705 nvme_ns_add_to_ctrl_list(ns); 3706 up_write(&ctrl->namespaces_rwsem); 3707 nvme_get_ctrl(ctrl); 3708 3709 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_attr_groups)) 3710 goto out_cleanup_ns_from_list; 3711 3712 if (!nvme_ns_head_multipath(ns->head)) 3713 nvme_add_ns_cdev(ns); 3714 3715 nvme_mpath_add_disk(ns, info->anagrpid); 3716 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name); 3717 3718 return; 3719 3720 out_cleanup_ns_from_list: 3721 nvme_put_ctrl(ctrl); 3722 down_write(&ctrl->namespaces_rwsem); 3723 list_del_init(&ns->list); 3724 up_write(&ctrl->namespaces_rwsem); 3725 out_unlink_ns: 3726 mutex_lock(&ctrl->subsys->lock); 3727 list_del_rcu(&ns->siblings); 3728 if (list_empty(&ns->head->list)) 3729 list_del_init(&ns->head->entry); 3730 mutex_unlock(&ctrl->subsys->lock); 3731 nvme_put_ns_head(ns->head); 3732 out_cleanup_disk: 3733 put_disk(disk); 3734 out_free_ns: 3735 kfree(ns); 3736 } 3737 3738 static void nvme_ns_remove(struct nvme_ns *ns) 3739 { 3740 bool last_path = false; 3741 3742 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 3743 return; 3744 3745 clear_bit(NVME_NS_READY, &ns->flags); 3746 set_capacity(ns->disk, 0); 3747 nvme_fault_inject_fini(&ns->fault_inject); 3748 3749 /* 3750 * Ensure that !NVME_NS_READY is seen by other threads to prevent 3751 * this ns going back into current_path. 3752 */ 3753 synchronize_srcu(&ns->head->srcu); 3754 3755 /* wait for concurrent submissions */ 3756 if (nvme_mpath_clear_current_path(ns)) 3757 synchronize_srcu(&ns->head->srcu); 3758 3759 mutex_lock(&ns->ctrl->subsys->lock); 3760 list_del_rcu(&ns->siblings); 3761 if (list_empty(&ns->head->list)) { 3762 list_del_init(&ns->head->entry); 3763 last_path = true; 3764 } 3765 mutex_unlock(&ns->ctrl->subsys->lock); 3766 3767 /* guarantee not available in head->list */ 3768 synchronize_srcu(&ns->head->srcu); 3769 3770 if (!nvme_ns_head_multipath(ns->head)) 3771 nvme_cdev_del(&ns->cdev, &ns->cdev_device); 3772 del_gendisk(ns->disk); 3773 3774 down_write(&ns->ctrl->namespaces_rwsem); 3775 list_del_init(&ns->list); 3776 up_write(&ns->ctrl->namespaces_rwsem); 3777 3778 if (last_path) 3779 nvme_mpath_shutdown_disk(ns->head); 3780 nvme_put_ns(ns); 3781 } 3782 3783 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid) 3784 { 3785 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid); 3786 3787 if (ns) { 3788 nvme_ns_remove(ns); 3789 nvme_put_ns(ns); 3790 } 3791 } 3792 3793 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info) 3794 { 3795 int ret = NVME_SC_INVALID_NS | NVME_SC_DNR; 3796 3797 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) { 3798 dev_err(ns->ctrl->device, 3799 "identifiers changed for nsid %d\n", ns->head->ns_id); 3800 goto out; 3801 } 3802 3803 ret = nvme_update_ns_info(ns, info); 3804 out: 3805 /* 3806 * Only remove the namespace if we got a fatal error back from the 3807 * device, otherwise ignore the error and just move on. 3808 * 3809 * TODO: we should probably schedule a delayed retry here. 3810 */ 3811 if (ret > 0 && (ret & NVME_SC_DNR)) 3812 nvme_ns_remove(ns); 3813 } 3814 3815 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3816 { 3817 struct nvme_ns_info info = { .nsid = nsid }; 3818 struct nvme_ns *ns; 3819 int ret; 3820 3821 if (nvme_identify_ns_descs(ctrl, &info)) 3822 return; 3823 3824 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) { 3825 dev_warn(ctrl->device, 3826 "command set not reported for nsid: %d\n", nsid); 3827 return; 3828 } 3829 3830 /* 3831 * If available try to use the Command Set Idependent Identify Namespace 3832 * data structure to find all the generic information that is needed to 3833 * set up a namespace. If not fall back to the legacy version. 3834 */ 3835 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) || 3836 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS)) 3837 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info); 3838 else 3839 ret = nvme_ns_info_from_identify(ctrl, &info); 3840 3841 if (info.is_removed) 3842 nvme_ns_remove_by_nsid(ctrl, nsid); 3843 3844 /* 3845 * Ignore the namespace if it is not ready. We will get an AEN once it 3846 * becomes ready and restart the scan. 3847 */ 3848 if (ret || !info.is_ready) 3849 return; 3850 3851 ns = nvme_find_get_ns(ctrl, nsid); 3852 if (ns) { 3853 nvme_validate_ns(ns, &info); 3854 nvme_put_ns(ns); 3855 } else { 3856 nvme_alloc_ns(ctrl, &info); 3857 } 3858 } 3859 3860 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 3861 unsigned nsid) 3862 { 3863 struct nvme_ns *ns, *next; 3864 LIST_HEAD(rm_list); 3865 3866 down_write(&ctrl->namespaces_rwsem); 3867 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 3868 if (ns->head->ns_id > nsid) 3869 list_move_tail(&ns->list, &rm_list); 3870 } 3871 up_write(&ctrl->namespaces_rwsem); 3872 3873 list_for_each_entry_safe(ns, next, &rm_list, list) 3874 nvme_ns_remove(ns); 3875 3876 } 3877 3878 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl) 3879 { 3880 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32); 3881 __le32 *ns_list; 3882 u32 prev = 0; 3883 int ret = 0, i; 3884 3885 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 3886 if (!ns_list) 3887 return -ENOMEM; 3888 3889 for (;;) { 3890 struct nvme_command cmd = { 3891 .identify.opcode = nvme_admin_identify, 3892 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST, 3893 .identify.nsid = cpu_to_le32(prev), 3894 }; 3895 3896 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list, 3897 NVME_IDENTIFY_DATA_SIZE); 3898 if (ret) { 3899 dev_warn(ctrl->device, 3900 "Identify NS List failed (status=0x%x)\n", ret); 3901 goto free; 3902 } 3903 3904 for (i = 0; i < nr_entries; i++) { 3905 u32 nsid = le32_to_cpu(ns_list[i]); 3906 3907 if (!nsid) /* end of the list? */ 3908 goto out; 3909 nvme_scan_ns(ctrl, nsid); 3910 while (++prev < nsid) 3911 nvme_ns_remove_by_nsid(ctrl, prev); 3912 } 3913 } 3914 out: 3915 nvme_remove_invalid_namespaces(ctrl, prev); 3916 free: 3917 kfree(ns_list); 3918 return ret; 3919 } 3920 3921 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl) 3922 { 3923 struct nvme_id_ctrl *id; 3924 u32 nn, i; 3925 3926 if (nvme_identify_ctrl(ctrl, &id)) 3927 return; 3928 nn = le32_to_cpu(id->nn); 3929 kfree(id); 3930 3931 for (i = 1; i <= nn; i++) 3932 nvme_scan_ns(ctrl, i); 3933 3934 nvme_remove_invalid_namespaces(ctrl, nn); 3935 } 3936 3937 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 3938 { 3939 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 3940 __le32 *log; 3941 int error; 3942 3943 log = kzalloc(log_size, GFP_KERNEL); 3944 if (!log) 3945 return; 3946 3947 /* 3948 * We need to read the log to clear the AEN, but we don't want to rely 3949 * on it for the changed namespace information as userspace could have 3950 * raced with us in reading the log page, which could cause us to miss 3951 * updates. 3952 */ 3953 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, 3954 NVME_CSI_NVM, log, log_size, 0); 3955 if (error) 3956 dev_warn(ctrl->device, 3957 "reading changed ns log failed: %d\n", error); 3958 3959 kfree(log); 3960 } 3961 3962 static void nvme_scan_work(struct work_struct *work) 3963 { 3964 struct nvme_ctrl *ctrl = 3965 container_of(work, struct nvme_ctrl, scan_work); 3966 int ret; 3967 3968 /* No tagset on a live ctrl means IO queues could not created */ 3969 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset) 3970 return; 3971 3972 /* 3973 * Identify controller limits can change at controller reset due to 3974 * new firmware download, even though it is not common we cannot ignore 3975 * such scenario. Controller's non-mdts limits are reported in the unit 3976 * of logical blocks that is dependent on the format of attached 3977 * namespace. Hence re-read the limits at the time of ns allocation. 3978 */ 3979 ret = nvme_init_non_mdts_limits(ctrl); 3980 if (ret < 0) { 3981 dev_warn(ctrl->device, 3982 "reading non-mdts-limits failed: %d\n", ret); 3983 return; 3984 } 3985 3986 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 3987 dev_info(ctrl->device, "rescanning namespaces.\n"); 3988 nvme_clear_changed_ns_log(ctrl); 3989 } 3990 3991 mutex_lock(&ctrl->scan_lock); 3992 if (nvme_ctrl_limited_cns(ctrl)) { 3993 nvme_scan_ns_sequential(ctrl); 3994 } else { 3995 /* 3996 * Fall back to sequential scan if DNR is set to handle broken 3997 * devices which should support Identify NS List (as per the VS 3998 * they report) but don't actually support it. 3999 */ 4000 ret = nvme_scan_ns_list(ctrl); 4001 if (ret > 0 && ret & NVME_SC_DNR) 4002 nvme_scan_ns_sequential(ctrl); 4003 } 4004 mutex_unlock(&ctrl->scan_lock); 4005 } 4006 4007 /* 4008 * This function iterates the namespace list unlocked to allow recovery from 4009 * controller failure. It is up to the caller to ensure the namespace list is 4010 * not modified by scan work while this function is executing. 4011 */ 4012 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 4013 { 4014 struct nvme_ns *ns, *next; 4015 LIST_HEAD(ns_list); 4016 4017 /* 4018 * make sure to requeue I/O to all namespaces as these 4019 * might result from the scan itself and must complete 4020 * for the scan_work to make progress 4021 */ 4022 nvme_mpath_clear_ctrl_paths(ctrl); 4023 4024 /* 4025 * Unquiesce io queues so any pending IO won't hang, especially 4026 * those submitted from scan work 4027 */ 4028 nvme_unquiesce_io_queues(ctrl); 4029 4030 /* prevent racing with ns scanning */ 4031 flush_work(&ctrl->scan_work); 4032 4033 /* 4034 * The dead states indicates the controller was not gracefully 4035 * disconnected. In that case, we won't be able to flush any data while 4036 * removing the namespaces' disks; fail all the queues now to avoid 4037 * potentially having to clean up the failed sync later. 4038 */ 4039 if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD) 4040 nvme_mark_namespaces_dead(ctrl); 4041 4042 /* this is a no-op when called from the controller reset handler */ 4043 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO); 4044 4045 down_write(&ctrl->namespaces_rwsem); 4046 list_splice_init(&ctrl->namespaces, &ns_list); 4047 up_write(&ctrl->namespaces_rwsem); 4048 4049 list_for_each_entry_safe(ns, next, &ns_list, list) 4050 nvme_ns_remove(ns); 4051 } 4052 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 4053 4054 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env) 4055 { 4056 const struct nvme_ctrl *ctrl = 4057 container_of(dev, struct nvme_ctrl, ctrl_device); 4058 struct nvmf_ctrl_options *opts = ctrl->opts; 4059 int ret; 4060 4061 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name); 4062 if (ret) 4063 return ret; 4064 4065 if (opts) { 4066 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr); 4067 if (ret) 4068 return ret; 4069 4070 ret = add_uevent_var(env, "NVME_TRSVCID=%s", 4071 opts->trsvcid ?: "none"); 4072 if (ret) 4073 return ret; 4074 4075 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s", 4076 opts->host_traddr ?: "none"); 4077 if (ret) 4078 return ret; 4079 4080 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s", 4081 opts->host_iface ?: "none"); 4082 } 4083 return ret; 4084 } 4085 4086 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata) 4087 { 4088 char *envp[2] = { envdata, NULL }; 4089 4090 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4091 } 4092 4093 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 4094 { 4095 char *envp[2] = { NULL, NULL }; 4096 u32 aen_result = ctrl->aen_result; 4097 4098 ctrl->aen_result = 0; 4099 if (!aen_result) 4100 return; 4101 4102 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 4103 if (!envp[0]) 4104 return; 4105 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4106 kfree(envp[0]); 4107 } 4108 4109 static void nvme_async_event_work(struct work_struct *work) 4110 { 4111 struct nvme_ctrl *ctrl = 4112 container_of(work, struct nvme_ctrl, async_event_work); 4113 4114 nvme_aen_uevent(ctrl); 4115 4116 /* 4117 * The transport drivers must guarantee AER submission here is safe by 4118 * flushing ctrl async_event_work after changing the controller state 4119 * from LIVE and before freeing the admin queue. 4120 */ 4121 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 4122 ctrl->ops->submit_async_event(ctrl); 4123 } 4124 4125 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 4126 { 4127 4128 u32 csts; 4129 4130 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 4131 return false; 4132 4133 if (csts == ~0) 4134 return false; 4135 4136 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 4137 } 4138 4139 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 4140 { 4141 struct nvme_fw_slot_info_log *log; 4142 4143 log = kmalloc(sizeof(*log), GFP_KERNEL); 4144 if (!log) 4145 return; 4146 4147 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM, 4148 log, sizeof(*log), 0)) { 4149 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 4150 goto out_free_log; 4151 } 4152 4153 if (log->afi & 0x70 || !(log->afi & 0x7)) { 4154 dev_info(ctrl->device, 4155 "Firmware is activated after next Controller Level Reset\n"); 4156 goto out_free_log; 4157 } 4158 4159 memcpy(ctrl->subsys->firmware_rev, &log->frs[(log->afi & 0x7) - 1], 4160 sizeof(ctrl->subsys->firmware_rev)); 4161 4162 out_free_log: 4163 kfree(log); 4164 } 4165 4166 static void nvme_fw_act_work(struct work_struct *work) 4167 { 4168 struct nvme_ctrl *ctrl = container_of(work, 4169 struct nvme_ctrl, fw_act_work); 4170 unsigned long fw_act_timeout; 4171 4172 nvme_auth_stop(ctrl); 4173 4174 if (ctrl->mtfa) 4175 fw_act_timeout = jiffies + 4176 msecs_to_jiffies(ctrl->mtfa * 100); 4177 else 4178 fw_act_timeout = jiffies + 4179 msecs_to_jiffies(admin_timeout * 1000); 4180 4181 nvme_quiesce_io_queues(ctrl); 4182 while (nvme_ctrl_pp_status(ctrl)) { 4183 if (time_after(jiffies, fw_act_timeout)) { 4184 dev_warn(ctrl->device, 4185 "Fw activation timeout, reset controller\n"); 4186 nvme_try_sched_reset(ctrl); 4187 return; 4188 } 4189 msleep(100); 4190 } 4191 4192 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE)) 4193 return; 4194 4195 nvme_unquiesce_io_queues(ctrl); 4196 /* read FW slot information to clear the AER */ 4197 nvme_get_fw_slot_info(ctrl); 4198 4199 queue_work(nvme_wq, &ctrl->async_event_work); 4200 } 4201 4202 static u32 nvme_aer_type(u32 result) 4203 { 4204 return result & 0x7; 4205 } 4206 4207 static u32 nvme_aer_subtype(u32 result) 4208 { 4209 return (result & 0xff00) >> 8; 4210 } 4211 4212 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 4213 { 4214 u32 aer_notice_type = nvme_aer_subtype(result); 4215 bool requeue = true; 4216 4217 switch (aer_notice_type) { 4218 case NVME_AER_NOTICE_NS_CHANGED: 4219 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 4220 nvme_queue_scan(ctrl); 4221 break; 4222 case NVME_AER_NOTICE_FW_ACT_STARTING: 4223 /* 4224 * We are (ab)using the RESETTING state to prevent subsequent 4225 * recovery actions from interfering with the controller's 4226 * firmware activation. 4227 */ 4228 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) { 4229 requeue = false; 4230 queue_work(nvme_wq, &ctrl->fw_act_work); 4231 } 4232 break; 4233 #ifdef CONFIG_NVME_MULTIPATH 4234 case NVME_AER_NOTICE_ANA: 4235 if (!ctrl->ana_log_buf) 4236 break; 4237 queue_work(nvme_wq, &ctrl->ana_work); 4238 break; 4239 #endif 4240 case NVME_AER_NOTICE_DISC_CHANGED: 4241 ctrl->aen_result = result; 4242 break; 4243 default: 4244 dev_warn(ctrl->device, "async event result %08x\n", result); 4245 } 4246 return requeue; 4247 } 4248 4249 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl) 4250 { 4251 dev_warn(ctrl->device, "resetting controller due to AER\n"); 4252 nvme_reset_ctrl(ctrl); 4253 } 4254 4255 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 4256 volatile union nvme_result *res) 4257 { 4258 u32 result = le32_to_cpu(res->u32); 4259 u32 aer_type = nvme_aer_type(result); 4260 u32 aer_subtype = nvme_aer_subtype(result); 4261 bool requeue = true; 4262 4263 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 4264 return; 4265 4266 trace_nvme_async_event(ctrl, result); 4267 switch (aer_type) { 4268 case NVME_AER_NOTICE: 4269 requeue = nvme_handle_aen_notice(ctrl, result); 4270 break; 4271 case NVME_AER_ERROR: 4272 /* 4273 * For a persistent internal error, don't run async_event_work 4274 * to submit a new AER. The controller reset will do it. 4275 */ 4276 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) { 4277 nvme_handle_aer_persistent_error(ctrl); 4278 return; 4279 } 4280 fallthrough; 4281 case NVME_AER_SMART: 4282 case NVME_AER_CSS: 4283 case NVME_AER_VS: 4284 ctrl->aen_result = result; 4285 break; 4286 default: 4287 break; 4288 } 4289 4290 if (requeue) 4291 queue_work(nvme_wq, &ctrl->async_event_work); 4292 } 4293 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 4294 4295 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4296 const struct blk_mq_ops *ops, unsigned int cmd_size) 4297 { 4298 int ret; 4299 4300 memset(set, 0, sizeof(*set)); 4301 set->ops = ops; 4302 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 4303 if (ctrl->ops->flags & NVME_F_FABRICS) 4304 set->reserved_tags = NVMF_RESERVED_TAGS; 4305 set->numa_node = ctrl->numa_node; 4306 set->flags = BLK_MQ_F_NO_SCHED; 4307 if (ctrl->ops->flags & NVME_F_BLOCKING) 4308 set->flags |= BLK_MQ_F_BLOCKING; 4309 set->cmd_size = cmd_size; 4310 set->driver_data = ctrl; 4311 set->nr_hw_queues = 1; 4312 set->timeout = NVME_ADMIN_TIMEOUT; 4313 ret = blk_mq_alloc_tag_set(set); 4314 if (ret) 4315 return ret; 4316 4317 ctrl->admin_q = blk_mq_init_queue(set); 4318 if (IS_ERR(ctrl->admin_q)) { 4319 ret = PTR_ERR(ctrl->admin_q); 4320 goto out_free_tagset; 4321 } 4322 4323 if (ctrl->ops->flags & NVME_F_FABRICS) { 4324 ctrl->fabrics_q = blk_mq_init_queue(set); 4325 if (IS_ERR(ctrl->fabrics_q)) { 4326 ret = PTR_ERR(ctrl->fabrics_q); 4327 goto out_cleanup_admin_q; 4328 } 4329 } 4330 4331 ctrl->admin_tagset = set; 4332 return 0; 4333 4334 out_cleanup_admin_q: 4335 blk_mq_destroy_queue(ctrl->admin_q); 4336 blk_put_queue(ctrl->admin_q); 4337 out_free_tagset: 4338 blk_mq_free_tag_set(set); 4339 ctrl->admin_q = NULL; 4340 ctrl->fabrics_q = NULL; 4341 return ret; 4342 } 4343 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set); 4344 4345 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl) 4346 { 4347 blk_mq_destroy_queue(ctrl->admin_q); 4348 blk_put_queue(ctrl->admin_q); 4349 if (ctrl->ops->flags & NVME_F_FABRICS) { 4350 blk_mq_destroy_queue(ctrl->fabrics_q); 4351 blk_put_queue(ctrl->fabrics_q); 4352 } 4353 blk_mq_free_tag_set(ctrl->admin_tagset); 4354 } 4355 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set); 4356 4357 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4358 const struct blk_mq_ops *ops, unsigned int nr_maps, 4359 unsigned int cmd_size) 4360 { 4361 int ret; 4362 4363 memset(set, 0, sizeof(*set)); 4364 set->ops = ops; 4365 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1); 4366 /* 4367 * Some Apple controllers requires tags to be unique across admin and 4368 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue. 4369 */ 4370 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS) 4371 set->reserved_tags = NVME_AQ_DEPTH; 4372 else if (ctrl->ops->flags & NVME_F_FABRICS) 4373 set->reserved_tags = NVMF_RESERVED_TAGS; 4374 set->numa_node = ctrl->numa_node; 4375 set->flags = BLK_MQ_F_SHOULD_MERGE; 4376 if (ctrl->ops->flags & NVME_F_BLOCKING) 4377 set->flags |= BLK_MQ_F_BLOCKING; 4378 set->cmd_size = cmd_size, 4379 set->driver_data = ctrl; 4380 set->nr_hw_queues = ctrl->queue_count - 1; 4381 set->timeout = NVME_IO_TIMEOUT; 4382 set->nr_maps = nr_maps; 4383 ret = blk_mq_alloc_tag_set(set); 4384 if (ret) 4385 return ret; 4386 4387 if (ctrl->ops->flags & NVME_F_FABRICS) { 4388 ctrl->connect_q = blk_mq_init_queue(set); 4389 if (IS_ERR(ctrl->connect_q)) { 4390 ret = PTR_ERR(ctrl->connect_q); 4391 goto out_free_tag_set; 4392 } 4393 blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE, 4394 ctrl->connect_q); 4395 } 4396 4397 ctrl->tagset = set; 4398 return 0; 4399 4400 out_free_tag_set: 4401 blk_mq_free_tag_set(set); 4402 ctrl->connect_q = NULL; 4403 return ret; 4404 } 4405 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set); 4406 4407 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl) 4408 { 4409 if (ctrl->ops->flags & NVME_F_FABRICS) { 4410 blk_mq_destroy_queue(ctrl->connect_q); 4411 blk_put_queue(ctrl->connect_q); 4412 } 4413 blk_mq_free_tag_set(ctrl->tagset); 4414 } 4415 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set); 4416 4417 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 4418 { 4419 nvme_mpath_stop(ctrl); 4420 nvme_auth_stop(ctrl); 4421 nvme_stop_keep_alive(ctrl); 4422 nvme_stop_failfast_work(ctrl); 4423 flush_work(&ctrl->async_event_work); 4424 cancel_work_sync(&ctrl->fw_act_work); 4425 if (ctrl->ops->stop_ctrl) 4426 ctrl->ops->stop_ctrl(ctrl); 4427 } 4428 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 4429 4430 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 4431 { 4432 nvme_enable_aen(ctrl); 4433 4434 /* 4435 * persistent discovery controllers need to send indication to userspace 4436 * to re-read the discovery log page to learn about possible changes 4437 * that were missed. We identify persistent discovery controllers by 4438 * checking that they started once before, hence are reconnecting back. 4439 */ 4440 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) && 4441 nvme_discovery_ctrl(ctrl)) 4442 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover"); 4443 4444 if (ctrl->queue_count > 1) { 4445 nvme_queue_scan(ctrl); 4446 nvme_unquiesce_io_queues(ctrl); 4447 nvme_mpath_update(ctrl); 4448 } 4449 4450 nvme_change_uevent(ctrl, "NVME_EVENT=connected"); 4451 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags); 4452 } 4453 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 4454 4455 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 4456 { 4457 nvme_hwmon_exit(ctrl); 4458 nvme_fault_inject_fini(&ctrl->fault_inject); 4459 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4460 cdev_device_del(&ctrl->cdev, ctrl->device); 4461 nvme_put_ctrl(ctrl); 4462 } 4463 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 4464 4465 static void nvme_free_cels(struct nvme_ctrl *ctrl) 4466 { 4467 struct nvme_effects_log *cel; 4468 unsigned long i; 4469 4470 xa_for_each(&ctrl->cels, i, cel) { 4471 xa_erase(&ctrl->cels, i); 4472 kfree(cel); 4473 } 4474 4475 xa_destroy(&ctrl->cels); 4476 } 4477 4478 static void nvme_free_ctrl(struct device *dev) 4479 { 4480 struct nvme_ctrl *ctrl = 4481 container_of(dev, struct nvme_ctrl, ctrl_device); 4482 struct nvme_subsystem *subsys = ctrl->subsys; 4483 4484 if (!subsys || ctrl->instance != subsys->instance) 4485 ida_free(&nvme_instance_ida, ctrl->instance); 4486 key_put(ctrl->tls_key); 4487 nvme_free_cels(ctrl); 4488 nvme_mpath_uninit(ctrl); 4489 nvme_auth_stop(ctrl); 4490 nvme_auth_free(ctrl); 4491 __free_page(ctrl->discard_page); 4492 free_opal_dev(ctrl->opal_dev); 4493 4494 if (subsys) { 4495 mutex_lock(&nvme_subsystems_lock); 4496 list_del(&ctrl->subsys_entry); 4497 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 4498 mutex_unlock(&nvme_subsystems_lock); 4499 } 4500 4501 ctrl->ops->free_ctrl(ctrl); 4502 4503 if (subsys) 4504 nvme_put_subsystem(subsys); 4505 } 4506 4507 /* 4508 * Initialize a NVMe controller structures. This needs to be called during 4509 * earliest initialization so that we have the initialized structured around 4510 * during probing. 4511 */ 4512 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 4513 const struct nvme_ctrl_ops *ops, unsigned long quirks) 4514 { 4515 int ret; 4516 4517 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW); 4518 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 4519 spin_lock_init(&ctrl->lock); 4520 mutex_init(&ctrl->scan_lock); 4521 INIT_LIST_HEAD(&ctrl->namespaces); 4522 xa_init(&ctrl->cels); 4523 init_rwsem(&ctrl->namespaces_rwsem); 4524 ctrl->dev = dev; 4525 ctrl->ops = ops; 4526 ctrl->quirks = quirks; 4527 ctrl->numa_node = NUMA_NO_NODE; 4528 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 4529 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 4530 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 4531 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 4532 init_waitqueue_head(&ctrl->state_wq); 4533 4534 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 4535 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work); 4536 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 4537 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 4538 ctrl->ka_last_check_time = jiffies; 4539 4540 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 4541 PAGE_SIZE); 4542 ctrl->discard_page = alloc_page(GFP_KERNEL); 4543 if (!ctrl->discard_page) { 4544 ret = -ENOMEM; 4545 goto out; 4546 } 4547 4548 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL); 4549 if (ret < 0) 4550 goto out; 4551 ctrl->instance = ret; 4552 4553 device_initialize(&ctrl->ctrl_device); 4554 ctrl->device = &ctrl->ctrl_device; 4555 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt), 4556 ctrl->instance); 4557 ctrl->device->class = nvme_class; 4558 ctrl->device->parent = ctrl->dev; 4559 if (ops->dev_attr_groups) 4560 ctrl->device->groups = ops->dev_attr_groups; 4561 else 4562 ctrl->device->groups = nvme_dev_attr_groups; 4563 ctrl->device->release = nvme_free_ctrl; 4564 dev_set_drvdata(ctrl->device, ctrl); 4565 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 4566 if (ret) 4567 goto out_release_instance; 4568 4569 nvme_get_ctrl(ctrl); 4570 cdev_init(&ctrl->cdev, &nvme_dev_fops); 4571 ctrl->cdev.owner = ops->module; 4572 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 4573 if (ret) 4574 goto out_free_name; 4575 4576 /* 4577 * Initialize latency tolerance controls. The sysfs files won't 4578 * be visible to userspace unless the device actually supports APST. 4579 */ 4580 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 4581 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 4582 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 4583 4584 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device)); 4585 nvme_mpath_init_ctrl(ctrl); 4586 ret = nvme_auth_init_ctrl(ctrl); 4587 if (ret) 4588 goto out_free_cdev; 4589 4590 return 0; 4591 out_free_cdev: 4592 nvme_fault_inject_fini(&ctrl->fault_inject); 4593 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4594 cdev_device_del(&ctrl->cdev, ctrl->device); 4595 out_free_name: 4596 nvme_put_ctrl(ctrl); 4597 kfree_const(ctrl->device->kobj.name); 4598 out_release_instance: 4599 ida_free(&nvme_instance_ida, ctrl->instance); 4600 out: 4601 if (ctrl->discard_page) 4602 __free_page(ctrl->discard_page); 4603 return ret; 4604 } 4605 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 4606 4607 /* let I/O to all namespaces fail in preparation for surprise removal */ 4608 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl) 4609 { 4610 struct nvme_ns *ns; 4611 4612 down_read(&ctrl->namespaces_rwsem); 4613 list_for_each_entry(ns, &ctrl->namespaces, list) 4614 blk_mark_disk_dead(ns->disk); 4615 up_read(&ctrl->namespaces_rwsem); 4616 } 4617 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead); 4618 4619 void nvme_unfreeze(struct nvme_ctrl *ctrl) 4620 { 4621 struct nvme_ns *ns; 4622 4623 down_read(&ctrl->namespaces_rwsem); 4624 list_for_each_entry(ns, &ctrl->namespaces, list) 4625 blk_mq_unfreeze_queue(ns->queue); 4626 up_read(&ctrl->namespaces_rwsem); 4627 clear_bit(NVME_CTRL_FROZEN, &ctrl->flags); 4628 } 4629 EXPORT_SYMBOL_GPL(nvme_unfreeze); 4630 4631 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 4632 { 4633 struct nvme_ns *ns; 4634 4635 down_read(&ctrl->namespaces_rwsem); 4636 list_for_each_entry(ns, &ctrl->namespaces, list) { 4637 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 4638 if (timeout <= 0) 4639 break; 4640 } 4641 up_read(&ctrl->namespaces_rwsem); 4642 return timeout; 4643 } 4644 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 4645 4646 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 4647 { 4648 struct nvme_ns *ns; 4649 4650 down_read(&ctrl->namespaces_rwsem); 4651 list_for_each_entry(ns, &ctrl->namespaces, list) 4652 blk_mq_freeze_queue_wait(ns->queue); 4653 up_read(&ctrl->namespaces_rwsem); 4654 } 4655 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 4656 4657 void nvme_start_freeze(struct nvme_ctrl *ctrl) 4658 { 4659 struct nvme_ns *ns; 4660 4661 set_bit(NVME_CTRL_FROZEN, &ctrl->flags); 4662 down_read(&ctrl->namespaces_rwsem); 4663 list_for_each_entry(ns, &ctrl->namespaces, list) 4664 blk_freeze_queue_start(ns->queue); 4665 up_read(&ctrl->namespaces_rwsem); 4666 } 4667 EXPORT_SYMBOL_GPL(nvme_start_freeze); 4668 4669 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl) 4670 { 4671 if (!ctrl->tagset) 4672 return; 4673 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4674 blk_mq_quiesce_tagset(ctrl->tagset); 4675 else 4676 blk_mq_wait_quiesce_done(ctrl->tagset); 4677 } 4678 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues); 4679 4680 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl) 4681 { 4682 if (!ctrl->tagset) 4683 return; 4684 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4685 blk_mq_unquiesce_tagset(ctrl->tagset); 4686 } 4687 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues); 4688 4689 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl) 4690 { 4691 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4692 blk_mq_quiesce_queue(ctrl->admin_q); 4693 else 4694 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set); 4695 } 4696 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue); 4697 4698 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl) 4699 { 4700 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4701 blk_mq_unquiesce_queue(ctrl->admin_q); 4702 } 4703 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue); 4704 4705 void nvme_sync_io_queues(struct nvme_ctrl *ctrl) 4706 { 4707 struct nvme_ns *ns; 4708 4709 down_read(&ctrl->namespaces_rwsem); 4710 list_for_each_entry(ns, &ctrl->namespaces, list) 4711 blk_sync_queue(ns->queue); 4712 up_read(&ctrl->namespaces_rwsem); 4713 } 4714 EXPORT_SYMBOL_GPL(nvme_sync_io_queues); 4715 4716 void nvme_sync_queues(struct nvme_ctrl *ctrl) 4717 { 4718 nvme_sync_io_queues(ctrl); 4719 if (ctrl->admin_q) 4720 blk_sync_queue(ctrl->admin_q); 4721 } 4722 EXPORT_SYMBOL_GPL(nvme_sync_queues); 4723 4724 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file) 4725 { 4726 if (file->f_op != &nvme_dev_fops) 4727 return NULL; 4728 return file->private_data; 4729 } 4730 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU); 4731 4732 /* 4733 * Check we didn't inadvertently grow the command structure sizes: 4734 */ 4735 static inline void _nvme_check_size(void) 4736 { 4737 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64); 4738 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 4739 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64); 4740 BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 4741 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64); 4742 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 4743 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64); 4744 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64); 4745 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 4746 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64); 4747 BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 4748 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE); 4749 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE); 4750 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) != 4751 NVME_IDENTIFY_DATA_SIZE); 4752 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE); 4753 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE); 4754 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE); 4755 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE); 4756 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 4757 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 4758 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 4759 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64); 4760 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512); 4761 } 4762 4763 4764 static int __init nvme_core_init(void) 4765 { 4766 int result = -ENOMEM; 4767 4768 _nvme_check_size(); 4769 4770 nvme_wq = alloc_workqueue("nvme-wq", 4771 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4772 if (!nvme_wq) 4773 goto out; 4774 4775 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", 4776 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4777 if (!nvme_reset_wq) 4778 goto destroy_wq; 4779 4780 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", 4781 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4782 if (!nvme_delete_wq) 4783 goto destroy_reset_wq; 4784 4785 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0, 4786 NVME_MINORS, "nvme"); 4787 if (result < 0) 4788 goto destroy_delete_wq; 4789 4790 nvme_class = class_create("nvme"); 4791 if (IS_ERR(nvme_class)) { 4792 result = PTR_ERR(nvme_class); 4793 goto unregister_chrdev; 4794 } 4795 nvme_class->dev_uevent = nvme_class_uevent; 4796 4797 nvme_subsys_class = class_create("nvme-subsystem"); 4798 if (IS_ERR(nvme_subsys_class)) { 4799 result = PTR_ERR(nvme_subsys_class); 4800 goto destroy_class; 4801 } 4802 4803 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS, 4804 "nvme-generic"); 4805 if (result < 0) 4806 goto destroy_subsys_class; 4807 4808 nvme_ns_chr_class = class_create("nvme-generic"); 4809 if (IS_ERR(nvme_ns_chr_class)) { 4810 result = PTR_ERR(nvme_ns_chr_class); 4811 goto unregister_generic_ns; 4812 } 4813 result = nvme_init_auth(); 4814 if (result) 4815 goto destroy_ns_chr; 4816 return 0; 4817 4818 destroy_ns_chr: 4819 class_destroy(nvme_ns_chr_class); 4820 unregister_generic_ns: 4821 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4822 destroy_subsys_class: 4823 class_destroy(nvme_subsys_class); 4824 destroy_class: 4825 class_destroy(nvme_class); 4826 unregister_chrdev: 4827 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4828 destroy_delete_wq: 4829 destroy_workqueue(nvme_delete_wq); 4830 destroy_reset_wq: 4831 destroy_workqueue(nvme_reset_wq); 4832 destroy_wq: 4833 destroy_workqueue(nvme_wq); 4834 out: 4835 return result; 4836 } 4837 4838 static void __exit nvme_core_exit(void) 4839 { 4840 nvme_exit_auth(); 4841 class_destroy(nvme_ns_chr_class); 4842 class_destroy(nvme_subsys_class); 4843 class_destroy(nvme_class); 4844 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4845 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4846 destroy_workqueue(nvme_delete_wq); 4847 destroy_workqueue(nvme_reset_wq); 4848 destroy_workqueue(nvme_wq); 4849 ida_destroy(&nvme_ns_chr_minor_ida); 4850 ida_destroy(&nvme_instance_ida); 4851 } 4852 4853 MODULE_LICENSE("GPL"); 4854 MODULE_VERSION("1.0"); 4855 module_init(nvme_core_init); 4856 module_exit(nvme_core_exit); 4857