1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVM Express device driver 4 * Copyright (c) 2011-2014, Intel Corporation. 5 */ 6 7 #include <linux/blkdev.h> 8 #include <linux/blk-mq.h> 9 #include <linux/blk-integrity.h> 10 #include <linux/compat.h> 11 #include <linux/delay.h> 12 #include <linux/errno.h> 13 #include <linux/hdreg.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/backing-dev.h> 17 #include <linux/slab.h> 18 #include <linux/types.h> 19 #include <linux/pr.h> 20 #include <linux/ptrace.h> 21 #include <linux/nvme_ioctl.h> 22 #include <linux/pm_qos.h> 23 #include <asm/unaligned.h> 24 25 #include "nvme.h" 26 #include "fabrics.h" 27 #include <linux/nvme-auth.h> 28 29 #define CREATE_TRACE_POINTS 30 #include "trace.h" 31 32 #define NVME_MINORS (1U << MINORBITS) 33 34 struct nvme_ns_info { 35 struct nvme_ns_ids ids; 36 u32 nsid; 37 __le32 anagrpid; 38 bool is_shared; 39 bool is_readonly; 40 bool is_ready; 41 bool is_removed; 42 }; 43 44 unsigned int admin_timeout = 60; 45 module_param(admin_timeout, uint, 0644); 46 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 47 EXPORT_SYMBOL_GPL(admin_timeout); 48 49 unsigned int nvme_io_timeout = 30; 50 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 51 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 52 EXPORT_SYMBOL_GPL(nvme_io_timeout); 53 54 static unsigned char shutdown_timeout = 5; 55 module_param(shutdown_timeout, byte, 0644); 56 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 57 58 static u8 nvme_max_retries = 5; 59 module_param_named(max_retries, nvme_max_retries, byte, 0644); 60 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 61 62 static unsigned long default_ps_max_latency_us = 100000; 63 module_param(default_ps_max_latency_us, ulong, 0644); 64 MODULE_PARM_DESC(default_ps_max_latency_us, 65 "max power saving latency for new devices; use PM QOS to change per device"); 66 67 static bool force_apst; 68 module_param(force_apst, bool, 0644); 69 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 70 71 static unsigned long apst_primary_timeout_ms = 100; 72 module_param(apst_primary_timeout_ms, ulong, 0644); 73 MODULE_PARM_DESC(apst_primary_timeout_ms, 74 "primary APST timeout in ms"); 75 76 static unsigned long apst_secondary_timeout_ms = 2000; 77 module_param(apst_secondary_timeout_ms, ulong, 0644); 78 MODULE_PARM_DESC(apst_secondary_timeout_ms, 79 "secondary APST timeout in ms"); 80 81 static unsigned long apst_primary_latency_tol_us = 15000; 82 module_param(apst_primary_latency_tol_us, ulong, 0644); 83 MODULE_PARM_DESC(apst_primary_latency_tol_us, 84 "primary APST latency tolerance in us"); 85 86 static unsigned long apst_secondary_latency_tol_us = 100000; 87 module_param(apst_secondary_latency_tol_us, ulong, 0644); 88 MODULE_PARM_DESC(apst_secondary_latency_tol_us, 89 "secondary APST latency tolerance in us"); 90 91 /* 92 * nvme_wq - hosts nvme related works that are not reset or delete 93 * nvme_reset_wq - hosts nvme reset works 94 * nvme_delete_wq - hosts nvme delete works 95 * 96 * nvme_wq will host works such as scan, aen handling, fw activation, 97 * keep-alive, periodic reconnects etc. nvme_reset_wq 98 * runs reset works which also flush works hosted on nvme_wq for 99 * serialization purposes. nvme_delete_wq host controller deletion 100 * works which flush reset works for serialization. 101 */ 102 struct workqueue_struct *nvme_wq; 103 EXPORT_SYMBOL_GPL(nvme_wq); 104 105 struct workqueue_struct *nvme_reset_wq; 106 EXPORT_SYMBOL_GPL(nvme_reset_wq); 107 108 struct workqueue_struct *nvme_delete_wq; 109 EXPORT_SYMBOL_GPL(nvme_delete_wq); 110 111 static LIST_HEAD(nvme_subsystems); 112 static DEFINE_MUTEX(nvme_subsystems_lock); 113 114 static DEFINE_IDA(nvme_instance_ida); 115 static dev_t nvme_ctrl_base_chr_devt; 116 static struct class *nvme_class; 117 static struct class *nvme_subsys_class; 118 119 static DEFINE_IDA(nvme_ns_chr_minor_ida); 120 static dev_t nvme_ns_chr_devt; 121 static struct class *nvme_ns_chr_class; 122 123 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 124 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 125 unsigned nsid); 126 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 127 struct nvme_command *cmd); 128 129 void nvme_queue_scan(struct nvme_ctrl *ctrl) 130 { 131 /* 132 * Only new queue scan work when admin and IO queues are both alive 133 */ 134 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset) 135 queue_work(nvme_wq, &ctrl->scan_work); 136 } 137 138 /* 139 * Use this function to proceed with scheduling reset_work for a controller 140 * that had previously been set to the resetting state. This is intended for 141 * code paths that can't be interrupted by other reset attempts. A hot removal 142 * may prevent this from succeeding. 143 */ 144 int nvme_try_sched_reset(struct nvme_ctrl *ctrl) 145 { 146 if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING) 147 return -EBUSY; 148 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 149 return -EBUSY; 150 return 0; 151 } 152 EXPORT_SYMBOL_GPL(nvme_try_sched_reset); 153 154 static void nvme_failfast_work(struct work_struct *work) 155 { 156 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 157 struct nvme_ctrl, failfast_work); 158 159 if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING) 160 return; 161 162 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 163 dev_info(ctrl->device, "failfast expired\n"); 164 nvme_kick_requeue_lists(ctrl); 165 } 166 167 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl) 168 { 169 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1) 170 return; 171 172 schedule_delayed_work(&ctrl->failfast_work, 173 ctrl->opts->fast_io_fail_tmo * HZ); 174 } 175 176 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl) 177 { 178 if (!ctrl->opts) 179 return; 180 181 cancel_delayed_work_sync(&ctrl->failfast_work); 182 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 183 } 184 185 186 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 187 { 188 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 189 return -EBUSY; 190 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 191 return -EBUSY; 192 return 0; 193 } 194 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 195 196 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 197 { 198 int ret; 199 200 ret = nvme_reset_ctrl(ctrl); 201 if (!ret) { 202 flush_work(&ctrl->reset_work); 203 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE) 204 ret = -ENETRESET; 205 } 206 207 return ret; 208 } 209 210 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl) 211 { 212 dev_info(ctrl->device, 213 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl)); 214 215 flush_work(&ctrl->reset_work); 216 nvme_stop_ctrl(ctrl); 217 nvme_remove_namespaces(ctrl); 218 ctrl->ops->delete_ctrl(ctrl); 219 nvme_uninit_ctrl(ctrl); 220 } 221 222 static void nvme_delete_ctrl_work(struct work_struct *work) 223 { 224 struct nvme_ctrl *ctrl = 225 container_of(work, struct nvme_ctrl, delete_work); 226 227 nvme_do_delete_ctrl(ctrl); 228 } 229 230 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 231 { 232 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 233 return -EBUSY; 234 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 235 return -EBUSY; 236 return 0; 237 } 238 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 239 240 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 241 { 242 /* 243 * Keep a reference until nvme_do_delete_ctrl() complete, 244 * since ->delete_ctrl can free the controller. 245 */ 246 nvme_get_ctrl(ctrl); 247 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 248 nvme_do_delete_ctrl(ctrl); 249 nvme_put_ctrl(ctrl); 250 } 251 252 static blk_status_t nvme_error_status(u16 status) 253 { 254 switch (status & 0x7ff) { 255 case NVME_SC_SUCCESS: 256 return BLK_STS_OK; 257 case NVME_SC_CAP_EXCEEDED: 258 return BLK_STS_NOSPC; 259 case NVME_SC_LBA_RANGE: 260 case NVME_SC_CMD_INTERRUPTED: 261 case NVME_SC_NS_NOT_READY: 262 return BLK_STS_TARGET; 263 case NVME_SC_BAD_ATTRIBUTES: 264 case NVME_SC_ONCS_NOT_SUPPORTED: 265 case NVME_SC_INVALID_OPCODE: 266 case NVME_SC_INVALID_FIELD: 267 case NVME_SC_INVALID_NS: 268 return BLK_STS_NOTSUPP; 269 case NVME_SC_WRITE_FAULT: 270 case NVME_SC_READ_ERROR: 271 case NVME_SC_UNWRITTEN_BLOCK: 272 case NVME_SC_ACCESS_DENIED: 273 case NVME_SC_READ_ONLY: 274 case NVME_SC_COMPARE_FAILED: 275 return BLK_STS_MEDIUM; 276 case NVME_SC_GUARD_CHECK: 277 case NVME_SC_APPTAG_CHECK: 278 case NVME_SC_REFTAG_CHECK: 279 case NVME_SC_INVALID_PI: 280 return BLK_STS_PROTECTION; 281 case NVME_SC_RESERVATION_CONFLICT: 282 return BLK_STS_RESV_CONFLICT; 283 case NVME_SC_HOST_PATH_ERROR: 284 return BLK_STS_TRANSPORT; 285 case NVME_SC_ZONE_TOO_MANY_ACTIVE: 286 return BLK_STS_ZONE_ACTIVE_RESOURCE; 287 case NVME_SC_ZONE_TOO_MANY_OPEN: 288 return BLK_STS_ZONE_OPEN_RESOURCE; 289 default: 290 return BLK_STS_IOERR; 291 } 292 } 293 294 static void nvme_retry_req(struct request *req) 295 { 296 unsigned long delay = 0; 297 u16 crd; 298 299 /* The mask and shift result must be <= 3 */ 300 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11; 301 if (crd) 302 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100; 303 304 nvme_req(req)->retries++; 305 blk_mq_requeue_request(req, false); 306 blk_mq_delay_kick_requeue_list(req->q, delay); 307 } 308 309 static void nvme_log_error(struct request *req) 310 { 311 struct nvme_ns *ns = req->q->queuedata; 312 struct nvme_request *nr = nvme_req(req); 313 314 if (ns) { 315 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %llu blocks, %s (sct 0x%x / sc 0x%x) %s%s\n", 316 ns->disk ? ns->disk->disk_name : "?", 317 nvme_get_opcode_str(nr->cmd->common.opcode), 318 nr->cmd->common.opcode, 319 (unsigned long long)nvme_sect_to_lba(ns, blk_rq_pos(req)), 320 (unsigned long long)blk_rq_bytes(req) >> ns->lba_shift, 321 nvme_get_error_status_str(nr->status), 322 nr->status >> 8 & 7, /* Status Code Type */ 323 nr->status & 0xff, /* Status Code */ 324 nr->status & NVME_SC_MORE ? "MORE " : "", 325 nr->status & NVME_SC_DNR ? "DNR " : ""); 326 return; 327 } 328 329 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n", 330 dev_name(nr->ctrl->device), 331 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 332 nr->cmd->common.opcode, 333 nvme_get_error_status_str(nr->status), 334 nr->status >> 8 & 7, /* Status Code Type */ 335 nr->status & 0xff, /* Status Code */ 336 nr->status & NVME_SC_MORE ? "MORE " : "", 337 nr->status & NVME_SC_DNR ? "DNR " : ""); 338 } 339 340 enum nvme_disposition { 341 COMPLETE, 342 RETRY, 343 FAILOVER, 344 AUTHENTICATE, 345 }; 346 347 static inline enum nvme_disposition nvme_decide_disposition(struct request *req) 348 { 349 if (likely(nvme_req(req)->status == 0)) 350 return COMPLETE; 351 352 if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED) 353 return AUTHENTICATE; 354 355 if (blk_noretry_request(req) || 356 (nvme_req(req)->status & NVME_SC_DNR) || 357 nvme_req(req)->retries >= nvme_max_retries) 358 return COMPLETE; 359 360 if (req->cmd_flags & REQ_NVME_MPATH) { 361 if (nvme_is_path_error(nvme_req(req)->status) || 362 blk_queue_dying(req->q)) 363 return FAILOVER; 364 } else { 365 if (blk_queue_dying(req->q)) 366 return COMPLETE; 367 } 368 369 return RETRY; 370 } 371 372 static inline void nvme_end_req_zoned(struct request *req) 373 { 374 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 375 req_op(req) == REQ_OP_ZONE_APPEND) 376 req->__sector = nvme_lba_to_sect(req->q->queuedata, 377 le64_to_cpu(nvme_req(req)->result.u64)); 378 } 379 380 static inline void nvme_end_req(struct request *req) 381 { 382 blk_status_t status = nvme_error_status(nvme_req(req)->status); 383 384 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) 385 nvme_log_error(req); 386 nvme_end_req_zoned(req); 387 nvme_trace_bio_complete(req); 388 if (req->cmd_flags & REQ_NVME_MPATH) 389 nvme_mpath_end_request(req); 390 blk_mq_end_request(req, status); 391 } 392 393 void nvme_complete_rq(struct request *req) 394 { 395 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 396 397 trace_nvme_complete_rq(req); 398 nvme_cleanup_cmd(req); 399 400 /* 401 * Completions of long-running commands should not be able to 402 * defer sending of periodic keep alives, since the controller 403 * may have completed processing such commands a long time ago 404 * (arbitrarily close to command submission time). 405 * req->deadline - req->timeout is the command submission time 406 * in jiffies. 407 */ 408 if (ctrl->kas && 409 req->deadline - req->timeout >= ctrl->ka_last_check_time) 410 ctrl->comp_seen = true; 411 412 switch (nvme_decide_disposition(req)) { 413 case COMPLETE: 414 nvme_end_req(req); 415 return; 416 case RETRY: 417 nvme_retry_req(req); 418 return; 419 case FAILOVER: 420 nvme_failover_req(req); 421 return; 422 case AUTHENTICATE: 423 #ifdef CONFIG_NVME_HOST_AUTH 424 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 425 nvme_retry_req(req); 426 #else 427 nvme_end_req(req); 428 #endif 429 return; 430 } 431 } 432 EXPORT_SYMBOL_GPL(nvme_complete_rq); 433 434 void nvme_complete_batch_req(struct request *req) 435 { 436 trace_nvme_complete_rq(req); 437 nvme_cleanup_cmd(req); 438 nvme_end_req_zoned(req); 439 } 440 EXPORT_SYMBOL_GPL(nvme_complete_batch_req); 441 442 /* 443 * Called to unwind from ->queue_rq on a failed command submission so that the 444 * multipathing code gets called to potentially failover to another path. 445 * The caller needs to unwind all transport specific resource allocations and 446 * must return propagate the return value. 447 */ 448 blk_status_t nvme_host_path_error(struct request *req) 449 { 450 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR; 451 blk_mq_set_request_complete(req); 452 nvme_complete_rq(req); 453 return BLK_STS_OK; 454 } 455 EXPORT_SYMBOL_GPL(nvme_host_path_error); 456 457 bool nvme_cancel_request(struct request *req, void *data) 458 { 459 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 460 "Cancelling I/O %d", req->tag); 461 462 /* don't abort one completed or idle request */ 463 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT) 464 return true; 465 466 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD; 467 nvme_req(req)->flags |= NVME_REQ_CANCELLED; 468 blk_mq_complete_request(req); 469 return true; 470 } 471 EXPORT_SYMBOL_GPL(nvme_cancel_request); 472 473 void nvme_cancel_tagset(struct nvme_ctrl *ctrl) 474 { 475 if (ctrl->tagset) { 476 blk_mq_tagset_busy_iter(ctrl->tagset, 477 nvme_cancel_request, ctrl); 478 blk_mq_tagset_wait_completed_request(ctrl->tagset); 479 } 480 } 481 EXPORT_SYMBOL_GPL(nvme_cancel_tagset); 482 483 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl) 484 { 485 if (ctrl->admin_tagset) { 486 blk_mq_tagset_busy_iter(ctrl->admin_tagset, 487 nvme_cancel_request, ctrl); 488 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset); 489 } 490 } 491 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset); 492 493 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 494 enum nvme_ctrl_state new_state) 495 { 496 enum nvme_ctrl_state old_state; 497 unsigned long flags; 498 bool changed = false; 499 500 spin_lock_irqsave(&ctrl->lock, flags); 501 502 old_state = nvme_ctrl_state(ctrl); 503 switch (new_state) { 504 case NVME_CTRL_LIVE: 505 switch (old_state) { 506 case NVME_CTRL_NEW: 507 case NVME_CTRL_RESETTING: 508 case NVME_CTRL_CONNECTING: 509 changed = true; 510 fallthrough; 511 default: 512 break; 513 } 514 break; 515 case NVME_CTRL_RESETTING: 516 switch (old_state) { 517 case NVME_CTRL_NEW: 518 case NVME_CTRL_LIVE: 519 changed = true; 520 fallthrough; 521 default: 522 break; 523 } 524 break; 525 case NVME_CTRL_CONNECTING: 526 switch (old_state) { 527 case NVME_CTRL_NEW: 528 case NVME_CTRL_RESETTING: 529 changed = true; 530 fallthrough; 531 default: 532 break; 533 } 534 break; 535 case NVME_CTRL_DELETING: 536 switch (old_state) { 537 case NVME_CTRL_LIVE: 538 case NVME_CTRL_RESETTING: 539 case NVME_CTRL_CONNECTING: 540 changed = true; 541 fallthrough; 542 default: 543 break; 544 } 545 break; 546 case NVME_CTRL_DELETING_NOIO: 547 switch (old_state) { 548 case NVME_CTRL_DELETING: 549 case NVME_CTRL_DEAD: 550 changed = true; 551 fallthrough; 552 default: 553 break; 554 } 555 break; 556 case NVME_CTRL_DEAD: 557 switch (old_state) { 558 case NVME_CTRL_DELETING: 559 changed = true; 560 fallthrough; 561 default: 562 break; 563 } 564 break; 565 default: 566 break; 567 } 568 569 if (changed) { 570 WRITE_ONCE(ctrl->state, new_state); 571 wake_up_all(&ctrl->state_wq); 572 } 573 574 spin_unlock_irqrestore(&ctrl->lock, flags); 575 if (!changed) 576 return false; 577 578 if (new_state == NVME_CTRL_LIVE) { 579 if (old_state == NVME_CTRL_CONNECTING) 580 nvme_stop_failfast_work(ctrl); 581 nvme_kick_requeue_lists(ctrl); 582 } else if (new_state == NVME_CTRL_CONNECTING && 583 old_state == NVME_CTRL_RESETTING) { 584 nvme_start_failfast_work(ctrl); 585 } 586 return changed; 587 } 588 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 589 590 /* 591 * Returns true for sink states that can't ever transition back to live. 592 */ 593 static bool nvme_state_terminal(struct nvme_ctrl *ctrl) 594 { 595 switch (nvme_ctrl_state(ctrl)) { 596 case NVME_CTRL_NEW: 597 case NVME_CTRL_LIVE: 598 case NVME_CTRL_RESETTING: 599 case NVME_CTRL_CONNECTING: 600 return false; 601 case NVME_CTRL_DELETING: 602 case NVME_CTRL_DELETING_NOIO: 603 case NVME_CTRL_DEAD: 604 return true; 605 default: 606 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 607 return true; 608 } 609 } 610 611 /* 612 * Waits for the controller state to be resetting, or returns false if it is 613 * not possible to ever transition to that state. 614 */ 615 bool nvme_wait_reset(struct nvme_ctrl *ctrl) 616 { 617 wait_event(ctrl->state_wq, 618 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) || 619 nvme_state_terminal(ctrl)); 620 return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING; 621 } 622 EXPORT_SYMBOL_GPL(nvme_wait_reset); 623 624 static void nvme_free_ns_head(struct kref *ref) 625 { 626 struct nvme_ns_head *head = 627 container_of(ref, struct nvme_ns_head, ref); 628 629 nvme_mpath_remove_disk(head); 630 ida_free(&head->subsys->ns_ida, head->instance); 631 cleanup_srcu_struct(&head->srcu); 632 nvme_put_subsystem(head->subsys); 633 kfree(head); 634 } 635 636 bool nvme_tryget_ns_head(struct nvme_ns_head *head) 637 { 638 return kref_get_unless_zero(&head->ref); 639 } 640 641 void nvme_put_ns_head(struct nvme_ns_head *head) 642 { 643 kref_put(&head->ref, nvme_free_ns_head); 644 } 645 646 static void nvme_free_ns(struct kref *kref) 647 { 648 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 649 650 put_disk(ns->disk); 651 nvme_put_ns_head(ns->head); 652 nvme_put_ctrl(ns->ctrl); 653 kfree(ns); 654 } 655 656 static inline bool nvme_get_ns(struct nvme_ns *ns) 657 { 658 return kref_get_unless_zero(&ns->kref); 659 } 660 661 void nvme_put_ns(struct nvme_ns *ns) 662 { 663 kref_put(&ns->kref, nvme_free_ns); 664 } 665 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU); 666 667 static inline void nvme_clear_nvme_request(struct request *req) 668 { 669 nvme_req(req)->status = 0; 670 nvme_req(req)->retries = 0; 671 nvme_req(req)->flags = 0; 672 req->rq_flags |= RQF_DONTPREP; 673 } 674 675 /* initialize a passthrough request */ 676 void nvme_init_request(struct request *req, struct nvme_command *cmd) 677 { 678 if (req->q->queuedata) 679 req->timeout = NVME_IO_TIMEOUT; 680 else /* no queuedata implies admin queue */ 681 req->timeout = NVME_ADMIN_TIMEOUT; 682 683 /* passthru commands should let the driver set the SGL flags */ 684 cmd->common.flags &= ~NVME_CMD_SGL_ALL; 685 686 req->cmd_flags |= REQ_FAILFAST_DRIVER; 687 if (req->mq_hctx->type == HCTX_TYPE_POLL) 688 req->cmd_flags |= REQ_POLLED; 689 nvme_clear_nvme_request(req); 690 req->rq_flags |= RQF_QUIET; 691 memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd)); 692 } 693 EXPORT_SYMBOL_GPL(nvme_init_request); 694 695 /* 696 * For something we're not in a state to send to the device the default action 697 * is to busy it and retry it after the controller state is recovered. However, 698 * if the controller is deleting or if anything is marked for failfast or 699 * nvme multipath it is immediately failed. 700 * 701 * Note: commands used to initialize the controller will be marked for failfast. 702 * Note: nvme cli/ioctl commands are marked for failfast. 703 */ 704 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 705 struct request *rq) 706 { 707 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 708 709 if (state != NVME_CTRL_DELETING_NOIO && 710 state != NVME_CTRL_DELETING && 711 state != NVME_CTRL_DEAD && 712 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) && 713 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH)) 714 return BLK_STS_RESOURCE; 715 return nvme_host_path_error(rq); 716 } 717 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command); 718 719 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 720 bool queue_live) 721 { 722 struct nvme_request *req = nvme_req(rq); 723 724 /* 725 * currently we have a problem sending passthru commands 726 * on the admin_q if the controller is not LIVE because we can't 727 * make sure that they are going out after the admin connect, 728 * controller enable and/or other commands in the initialization 729 * sequence. until the controller will be LIVE, fail with 730 * BLK_STS_RESOURCE so that they will be rescheduled. 731 */ 732 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD)) 733 return false; 734 735 if (ctrl->ops->flags & NVME_F_FABRICS) { 736 /* 737 * Only allow commands on a live queue, except for the connect 738 * command, which is require to set the queue live in the 739 * appropinquate states. 740 */ 741 switch (nvme_ctrl_state(ctrl)) { 742 case NVME_CTRL_CONNECTING: 743 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) && 744 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect || 745 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send || 746 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive)) 747 return true; 748 break; 749 default: 750 break; 751 case NVME_CTRL_DEAD: 752 return false; 753 } 754 } 755 756 return queue_live; 757 } 758 EXPORT_SYMBOL_GPL(__nvme_check_ready); 759 760 static inline void nvme_setup_flush(struct nvme_ns *ns, 761 struct nvme_command *cmnd) 762 { 763 memset(cmnd, 0, sizeof(*cmnd)); 764 cmnd->common.opcode = nvme_cmd_flush; 765 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 766 } 767 768 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 769 struct nvme_command *cmnd) 770 { 771 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 772 struct nvme_dsm_range *range; 773 struct bio *bio; 774 775 /* 776 * Some devices do not consider the DSM 'Number of Ranges' field when 777 * determining how much data to DMA. Always allocate memory for maximum 778 * number of segments to prevent device reading beyond end of buffer. 779 */ 780 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES; 781 782 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN); 783 if (!range) { 784 /* 785 * If we fail allocation our range, fallback to the controller 786 * discard page. If that's also busy, it's safe to return 787 * busy, as we know we can make progress once that's freed. 788 */ 789 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 790 return BLK_STS_RESOURCE; 791 792 range = page_address(ns->ctrl->discard_page); 793 } 794 795 if (queue_max_discard_segments(req->q) == 1) { 796 u64 slba = nvme_sect_to_lba(ns, blk_rq_pos(req)); 797 u32 nlb = blk_rq_sectors(req) >> (ns->lba_shift - 9); 798 799 range[0].cattr = cpu_to_le32(0); 800 range[0].nlb = cpu_to_le32(nlb); 801 range[0].slba = cpu_to_le64(slba); 802 n = 1; 803 } else { 804 __rq_for_each_bio(bio, req) { 805 u64 slba = nvme_sect_to_lba(ns, bio->bi_iter.bi_sector); 806 u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift; 807 808 if (n < segments) { 809 range[n].cattr = cpu_to_le32(0); 810 range[n].nlb = cpu_to_le32(nlb); 811 range[n].slba = cpu_to_le64(slba); 812 } 813 n++; 814 } 815 } 816 817 if (WARN_ON_ONCE(n != segments)) { 818 if (virt_to_page(range) == ns->ctrl->discard_page) 819 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 820 else 821 kfree(range); 822 return BLK_STS_IOERR; 823 } 824 825 memset(cmnd, 0, sizeof(*cmnd)); 826 cmnd->dsm.opcode = nvme_cmd_dsm; 827 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 828 cmnd->dsm.nr = cpu_to_le32(segments - 1); 829 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 830 831 bvec_set_virt(&req->special_vec, range, alloc_size); 832 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 833 834 return BLK_STS_OK; 835 } 836 837 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd, 838 struct request *req) 839 { 840 u32 upper, lower; 841 u64 ref48; 842 843 /* both rw and write zeroes share the same reftag format */ 844 switch (ns->guard_type) { 845 case NVME_NVM_NS_16B_GUARD: 846 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 847 break; 848 case NVME_NVM_NS_64B_GUARD: 849 ref48 = ext_pi_ref_tag(req); 850 lower = lower_32_bits(ref48); 851 upper = upper_32_bits(ref48); 852 853 cmnd->rw.reftag = cpu_to_le32(lower); 854 cmnd->rw.cdw3 = cpu_to_le32(upper); 855 break; 856 default: 857 break; 858 } 859 } 860 861 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns, 862 struct request *req, struct nvme_command *cmnd) 863 { 864 memset(cmnd, 0, sizeof(*cmnd)); 865 866 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 867 return nvme_setup_discard(ns, req, cmnd); 868 869 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes; 870 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id); 871 cmnd->write_zeroes.slba = 872 cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 873 cmnd->write_zeroes.length = 874 cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 875 876 if (!(req->cmd_flags & REQ_NOUNMAP) && (ns->features & NVME_NS_DEAC)) 877 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC); 878 879 if (nvme_ns_has_pi(ns)) { 880 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT); 881 882 switch (ns->pi_type) { 883 case NVME_NS_DPS_PI_TYPE1: 884 case NVME_NS_DPS_PI_TYPE2: 885 nvme_set_ref_tag(ns, cmnd, req); 886 break; 887 } 888 } 889 890 return BLK_STS_OK; 891 } 892 893 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 894 struct request *req, struct nvme_command *cmnd, 895 enum nvme_opcode op) 896 { 897 u16 control = 0; 898 u32 dsmgmt = 0; 899 900 if (req->cmd_flags & REQ_FUA) 901 control |= NVME_RW_FUA; 902 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 903 control |= NVME_RW_LR; 904 905 if (req->cmd_flags & REQ_RAHEAD) 906 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 907 908 cmnd->rw.opcode = op; 909 cmnd->rw.flags = 0; 910 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 911 cmnd->rw.cdw2 = 0; 912 cmnd->rw.cdw3 = 0; 913 cmnd->rw.metadata = 0; 914 cmnd->rw.slba = cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 915 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 916 cmnd->rw.reftag = 0; 917 cmnd->rw.apptag = 0; 918 cmnd->rw.appmask = 0; 919 920 if (ns->ms) { 921 /* 922 * If formated with metadata, the block layer always provides a 923 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 924 * we enable the PRACT bit for protection information or set the 925 * namespace capacity to zero to prevent any I/O. 926 */ 927 if (!blk_integrity_rq(req)) { 928 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns))) 929 return BLK_STS_NOTSUPP; 930 control |= NVME_RW_PRINFO_PRACT; 931 } 932 933 switch (ns->pi_type) { 934 case NVME_NS_DPS_PI_TYPE3: 935 control |= NVME_RW_PRINFO_PRCHK_GUARD; 936 break; 937 case NVME_NS_DPS_PI_TYPE1: 938 case NVME_NS_DPS_PI_TYPE2: 939 control |= NVME_RW_PRINFO_PRCHK_GUARD | 940 NVME_RW_PRINFO_PRCHK_REF; 941 if (op == nvme_cmd_zone_append) 942 control |= NVME_RW_APPEND_PIREMAP; 943 nvme_set_ref_tag(ns, cmnd, req); 944 break; 945 } 946 } 947 948 cmnd->rw.control = cpu_to_le16(control); 949 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 950 return 0; 951 } 952 953 void nvme_cleanup_cmd(struct request *req) 954 { 955 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 956 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 957 958 if (req->special_vec.bv_page == ctrl->discard_page) 959 clear_bit_unlock(0, &ctrl->discard_page_busy); 960 else 961 kfree(bvec_virt(&req->special_vec)); 962 } 963 } 964 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 965 966 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req) 967 { 968 struct nvme_command *cmd = nvme_req(req)->cmd; 969 blk_status_t ret = BLK_STS_OK; 970 971 if (!(req->rq_flags & RQF_DONTPREP)) 972 nvme_clear_nvme_request(req); 973 974 switch (req_op(req)) { 975 case REQ_OP_DRV_IN: 976 case REQ_OP_DRV_OUT: 977 /* these are setup prior to execution in nvme_init_request() */ 978 break; 979 case REQ_OP_FLUSH: 980 nvme_setup_flush(ns, cmd); 981 break; 982 case REQ_OP_ZONE_RESET_ALL: 983 case REQ_OP_ZONE_RESET: 984 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET); 985 break; 986 case REQ_OP_ZONE_OPEN: 987 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN); 988 break; 989 case REQ_OP_ZONE_CLOSE: 990 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE); 991 break; 992 case REQ_OP_ZONE_FINISH: 993 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH); 994 break; 995 case REQ_OP_WRITE_ZEROES: 996 ret = nvme_setup_write_zeroes(ns, req, cmd); 997 break; 998 case REQ_OP_DISCARD: 999 ret = nvme_setup_discard(ns, req, cmd); 1000 break; 1001 case REQ_OP_READ: 1002 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read); 1003 break; 1004 case REQ_OP_WRITE: 1005 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write); 1006 break; 1007 case REQ_OP_ZONE_APPEND: 1008 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append); 1009 break; 1010 default: 1011 WARN_ON_ONCE(1); 1012 return BLK_STS_IOERR; 1013 } 1014 1015 cmd->common.command_id = nvme_cid(req); 1016 trace_nvme_setup_cmd(req, cmd); 1017 return ret; 1018 } 1019 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 1020 1021 /* 1022 * Return values: 1023 * 0: success 1024 * >0: nvme controller's cqe status response 1025 * <0: kernel error in lieu of controller response 1026 */ 1027 int nvme_execute_rq(struct request *rq, bool at_head) 1028 { 1029 blk_status_t status; 1030 1031 status = blk_execute_rq(rq, at_head); 1032 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED) 1033 return -EINTR; 1034 if (nvme_req(rq)->status) 1035 return nvme_req(rq)->status; 1036 return blk_status_to_errno(status); 1037 } 1038 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU); 1039 1040 /* 1041 * Returns 0 on success. If the result is negative, it's a Linux error code; 1042 * if the result is positive, it's an NVM Express status code 1043 */ 1044 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1045 union nvme_result *result, void *buffer, unsigned bufflen, 1046 int qid, int at_head, blk_mq_req_flags_t flags) 1047 { 1048 struct request *req; 1049 int ret; 1050 1051 if (qid == NVME_QID_ANY) 1052 req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags); 1053 else 1054 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags, 1055 qid - 1); 1056 1057 if (IS_ERR(req)) 1058 return PTR_ERR(req); 1059 nvme_init_request(req, cmd); 1060 1061 if (buffer && bufflen) { 1062 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); 1063 if (ret) 1064 goto out; 1065 } 1066 1067 ret = nvme_execute_rq(req, at_head); 1068 if (result && ret >= 0) 1069 *result = nvme_req(req)->result; 1070 out: 1071 blk_mq_free_request(req); 1072 return ret; 1073 } 1074 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 1075 1076 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1077 void *buffer, unsigned bufflen) 1078 { 1079 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 1080 NVME_QID_ANY, 0, 0); 1081 } 1082 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 1083 1084 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1085 { 1086 u32 effects = 0; 1087 1088 if (ns) { 1089 effects = le32_to_cpu(ns->head->effects->iocs[opcode]); 1090 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC)) 1091 dev_warn_once(ctrl->device, 1092 "IO command:%02x has unusual effects:%08x\n", 1093 opcode, effects); 1094 1095 /* 1096 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues, 1097 * which would deadlock when done on an I/O command. Note that 1098 * We already warn about an unusual effect above. 1099 */ 1100 effects &= ~NVME_CMD_EFFECTS_CSE_MASK; 1101 } else { 1102 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1103 } 1104 1105 return effects; 1106 } 1107 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU); 1108 1109 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1110 { 1111 u32 effects = nvme_command_effects(ctrl, ns, opcode); 1112 1113 /* 1114 * For simplicity, IO to all namespaces is quiesced even if the command 1115 * effects say only one namespace is affected. 1116 */ 1117 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1118 mutex_lock(&ctrl->scan_lock); 1119 mutex_lock(&ctrl->subsys->lock); 1120 nvme_mpath_start_freeze(ctrl->subsys); 1121 nvme_mpath_wait_freeze(ctrl->subsys); 1122 nvme_start_freeze(ctrl); 1123 nvme_wait_freeze(ctrl); 1124 } 1125 return effects; 1126 } 1127 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU); 1128 1129 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1130 struct nvme_command *cmd, int status) 1131 { 1132 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1133 nvme_unfreeze(ctrl); 1134 nvme_mpath_unfreeze(ctrl->subsys); 1135 mutex_unlock(&ctrl->subsys->lock); 1136 mutex_unlock(&ctrl->scan_lock); 1137 } 1138 if (effects & NVME_CMD_EFFECTS_CCC) { 1139 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY, 1140 &ctrl->flags)) { 1141 dev_info(ctrl->device, 1142 "controller capabilities changed, reset may be required to take effect.\n"); 1143 } 1144 } 1145 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) { 1146 nvme_queue_scan(ctrl); 1147 flush_work(&ctrl->scan_work); 1148 } 1149 if (ns) 1150 return; 1151 1152 switch (cmd->common.opcode) { 1153 case nvme_admin_set_features: 1154 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) { 1155 case NVME_FEAT_KATO: 1156 /* 1157 * Keep alive commands interval on the host should be 1158 * updated when KATO is modified by Set Features 1159 * commands. 1160 */ 1161 if (!status) 1162 nvme_update_keep_alive(ctrl, cmd); 1163 break; 1164 default: 1165 break; 1166 } 1167 break; 1168 default: 1169 break; 1170 } 1171 } 1172 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU); 1173 1174 /* 1175 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1: 1176 * 1177 * The host should send Keep Alive commands at half of the Keep Alive Timeout 1178 * accounting for transport roundtrip times [..]. 1179 */ 1180 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl) 1181 { 1182 unsigned long delay = ctrl->kato * HZ / 2; 1183 1184 /* 1185 * When using Traffic Based Keep Alive, we need to run 1186 * nvme_keep_alive_work at twice the normal frequency, as one 1187 * command completion can postpone sending a keep alive command 1188 * by up to twice the delay between runs. 1189 */ 1190 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) 1191 delay /= 2; 1192 return delay; 1193 } 1194 1195 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl) 1196 { 1197 unsigned long now = jiffies; 1198 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1199 unsigned long ka_next_check_tm = ctrl->ka_last_check_time + delay; 1200 1201 if (time_after(now, ka_next_check_tm)) 1202 delay = 0; 1203 else 1204 delay = ka_next_check_tm - now; 1205 1206 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1207 } 1208 1209 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq, 1210 blk_status_t status) 1211 { 1212 struct nvme_ctrl *ctrl = rq->end_io_data; 1213 unsigned long flags; 1214 bool startka = false; 1215 unsigned long rtt = jiffies - (rq->deadline - rq->timeout); 1216 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1217 1218 /* 1219 * Subtract off the keepalive RTT so nvme_keep_alive_work runs 1220 * at the desired frequency. 1221 */ 1222 if (rtt <= delay) { 1223 delay -= rtt; 1224 } else { 1225 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n", 1226 jiffies_to_msecs(rtt)); 1227 delay = 0; 1228 } 1229 1230 blk_mq_free_request(rq); 1231 1232 if (status) { 1233 dev_err(ctrl->device, 1234 "failed nvme_keep_alive_end_io error=%d\n", 1235 status); 1236 return RQ_END_IO_NONE; 1237 } 1238 1239 ctrl->ka_last_check_time = jiffies; 1240 ctrl->comp_seen = false; 1241 spin_lock_irqsave(&ctrl->lock, flags); 1242 if (ctrl->state == NVME_CTRL_LIVE || 1243 ctrl->state == NVME_CTRL_CONNECTING) 1244 startka = true; 1245 spin_unlock_irqrestore(&ctrl->lock, flags); 1246 if (startka) 1247 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1248 return RQ_END_IO_NONE; 1249 } 1250 1251 static void nvme_keep_alive_work(struct work_struct *work) 1252 { 1253 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 1254 struct nvme_ctrl, ka_work); 1255 bool comp_seen = ctrl->comp_seen; 1256 struct request *rq; 1257 1258 ctrl->ka_last_check_time = jiffies; 1259 1260 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 1261 dev_dbg(ctrl->device, 1262 "reschedule traffic based keep-alive timer\n"); 1263 ctrl->comp_seen = false; 1264 nvme_queue_keep_alive_work(ctrl); 1265 return; 1266 } 1267 1268 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd), 1269 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT); 1270 if (IS_ERR(rq)) { 1271 /* allocation failure, reset the controller */ 1272 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq)); 1273 nvme_reset_ctrl(ctrl); 1274 return; 1275 } 1276 nvme_init_request(rq, &ctrl->ka_cmd); 1277 1278 rq->timeout = ctrl->kato * HZ; 1279 rq->end_io = nvme_keep_alive_end_io; 1280 rq->end_io_data = ctrl; 1281 blk_execute_rq_nowait(rq, false); 1282 } 1283 1284 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 1285 { 1286 if (unlikely(ctrl->kato == 0)) 1287 return; 1288 1289 nvme_queue_keep_alive_work(ctrl); 1290 } 1291 1292 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 1293 { 1294 if (unlikely(ctrl->kato == 0)) 1295 return; 1296 1297 cancel_delayed_work_sync(&ctrl->ka_work); 1298 } 1299 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 1300 1301 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 1302 struct nvme_command *cmd) 1303 { 1304 unsigned int new_kato = 1305 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000); 1306 1307 dev_info(ctrl->device, 1308 "keep alive interval updated from %u ms to %u ms\n", 1309 ctrl->kato * 1000 / 2, new_kato * 1000 / 2); 1310 1311 nvme_stop_keep_alive(ctrl); 1312 ctrl->kato = new_kato; 1313 nvme_start_keep_alive(ctrl); 1314 } 1315 1316 /* 1317 * In NVMe 1.0 the CNS field was just a binary controller or namespace 1318 * flag, thus sending any new CNS opcodes has a big chance of not working. 1319 * Qemu unfortunately had that bug after reporting a 1.1 version compliance 1320 * (but not for any later version). 1321 */ 1322 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl) 1323 { 1324 if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS) 1325 return ctrl->vs < NVME_VS(1, 2, 0); 1326 return ctrl->vs < NVME_VS(1, 1, 0); 1327 } 1328 1329 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 1330 { 1331 struct nvme_command c = { }; 1332 int error; 1333 1334 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1335 c.identify.opcode = nvme_admin_identify; 1336 c.identify.cns = NVME_ID_CNS_CTRL; 1337 1338 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 1339 if (!*id) 1340 return -ENOMEM; 1341 1342 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 1343 sizeof(struct nvme_id_ctrl)); 1344 if (error) 1345 kfree(*id); 1346 return error; 1347 } 1348 1349 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, 1350 struct nvme_ns_id_desc *cur, bool *csi_seen) 1351 { 1352 const char *warn_str = "ctrl returned bogus length:"; 1353 void *data = cur; 1354 1355 switch (cur->nidt) { 1356 case NVME_NIDT_EUI64: 1357 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1358 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n", 1359 warn_str, cur->nidl); 1360 return -1; 1361 } 1362 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1363 return NVME_NIDT_EUI64_LEN; 1364 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN); 1365 return NVME_NIDT_EUI64_LEN; 1366 case NVME_NIDT_NGUID: 1367 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1368 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n", 1369 warn_str, cur->nidl); 1370 return -1; 1371 } 1372 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1373 return NVME_NIDT_NGUID_LEN; 1374 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN); 1375 return NVME_NIDT_NGUID_LEN; 1376 case NVME_NIDT_UUID: 1377 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1378 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n", 1379 warn_str, cur->nidl); 1380 return -1; 1381 } 1382 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1383 return NVME_NIDT_UUID_LEN; 1384 uuid_copy(&ids->uuid, data + sizeof(*cur)); 1385 return NVME_NIDT_UUID_LEN; 1386 case NVME_NIDT_CSI: 1387 if (cur->nidl != NVME_NIDT_CSI_LEN) { 1388 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n", 1389 warn_str, cur->nidl); 1390 return -1; 1391 } 1392 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN); 1393 *csi_seen = true; 1394 return NVME_NIDT_CSI_LEN; 1395 default: 1396 /* Skip unknown types */ 1397 return cur->nidl; 1398 } 1399 } 1400 1401 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, 1402 struct nvme_ns_info *info) 1403 { 1404 struct nvme_command c = { }; 1405 bool csi_seen = false; 1406 int status, pos, len; 1407 void *data; 1408 1409 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl)) 1410 return 0; 1411 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST) 1412 return 0; 1413 1414 c.identify.opcode = nvme_admin_identify; 1415 c.identify.nsid = cpu_to_le32(info->nsid); 1416 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1417 1418 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1419 if (!data) 1420 return -ENOMEM; 1421 1422 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1423 NVME_IDENTIFY_DATA_SIZE); 1424 if (status) { 1425 dev_warn(ctrl->device, 1426 "Identify Descriptors failed (nsid=%u, status=0x%x)\n", 1427 info->nsid, status); 1428 goto free_data; 1429 } 1430 1431 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1432 struct nvme_ns_id_desc *cur = data + pos; 1433 1434 if (cur->nidl == 0) 1435 break; 1436 1437 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen); 1438 if (len < 0) 1439 break; 1440 1441 len += sizeof(*cur); 1442 } 1443 1444 if (nvme_multi_css(ctrl) && !csi_seen) { 1445 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n", 1446 info->nsid); 1447 status = -EINVAL; 1448 } 1449 1450 free_data: 1451 kfree(data); 1452 return status; 1453 } 1454 1455 static int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1456 struct nvme_id_ns **id) 1457 { 1458 struct nvme_command c = { }; 1459 int error; 1460 1461 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1462 c.identify.opcode = nvme_admin_identify; 1463 c.identify.nsid = cpu_to_le32(nsid); 1464 c.identify.cns = NVME_ID_CNS_NS; 1465 1466 *id = kmalloc(sizeof(**id), GFP_KERNEL); 1467 if (!*id) 1468 return -ENOMEM; 1469 1470 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id)); 1471 if (error) { 1472 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error); 1473 kfree(*id); 1474 } 1475 return error; 1476 } 1477 1478 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl, 1479 struct nvme_ns_info *info) 1480 { 1481 struct nvme_ns_ids *ids = &info->ids; 1482 struct nvme_id_ns *id; 1483 int ret; 1484 1485 ret = nvme_identify_ns(ctrl, info->nsid, &id); 1486 if (ret) 1487 return ret; 1488 1489 if (id->ncap == 0) { 1490 /* namespace not allocated or attached */ 1491 info->is_removed = true; 1492 ret = -ENODEV; 1493 goto error; 1494 } 1495 1496 info->anagrpid = id->anagrpid; 1497 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1498 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1499 info->is_ready = true; 1500 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) { 1501 dev_info(ctrl->device, 1502 "Ignoring bogus Namespace Identifiers\n"); 1503 } else { 1504 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1505 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 1506 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64)); 1507 if (ctrl->vs >= NVME_VS(1, 2, 0) && 1508 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 1509 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid)); 1510 } 1511 1512 error: 1513 kfree(id); 1514 return ret; 1515 } 1516 1517 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl, 1518 struct nvme_ns_info *info) 1519 { 1520 struct nvme_id_ns_cs_indep *id; 1521 struct nvme_command c = { 1522 .identify.opcode = nvme_admin_identify, 1523 .identify.nsid = cpu_to_le32(info->nsid), 1524 .identify.cns = NVME_ID_CNS_NS_CS_INDEP, 1525 }; 1526 int ret; 1527 1528 id = kmalloc(sizeof(*id), GFP_KERNEL); 1529 if (!id) 1530 return -ENOMEM; 1531 1532 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 1533 if (!ret) { 1534 info->anagrpid = id->anagrpid; 1535 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1536 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1537 info->is_ready = id->nstat & NVME_NSTAT_NRDY; 1538 } 1539 kfree(id); 1540 return ret; 1541 } 1542 1543 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, 1544 unsigned int dword11, void *buffer, size_t buflen, u32 *result) 1545 { 1546 union nvme_result res = { 0 }; 1547 struct nvme_command c = { }; 1548 int ret; 1549 1550 c.features.opcode = op; 1551 c.features.fid = cpu_to_le32(fid); 1552 c.features.dword11 = cpu_to_le32(dword11); 1553 1554 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1555 buffer, buflen, NVME_QID_ANY, 0, 0); 1556 if (ret >= 0 && result) 1557 *result = le32_to_cpu(res.u32); 1558 return ret; 1559 } 1560 1561 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1562 unsigned int dword11, void *buffer, size_t buflen, 1563 u32 *result) 1564 { 1565 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer, 1566 buflen, result); 1567 } 1568 EXPORT_SYMBOL_GPL(nvme_set_features); 1569 1570 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1571 unsigned int dword11, void *buffer, size_t buflen, 1572 u32 *result) 1573 { 1574 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer, 1575 buflen, result); 1576 } 1577 EXPORT_SYMBOL_GPL(nvme_get_features); 1578 1579 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1580 { 1581 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1582 u32 result; 1583 int status, nr_io_queues; 1584 1585 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1586 &result); 1587 if (status < 0) 1588 return status; 1589 1590 /* 1591 * Degraded controllers might return an error when setting the queue 1592 * count. We still want to be able to bring them online and offer 1593 * access to the admin queue, as that might be only way to fix them up. 1594 */ 1595 if (status > 0) { 1596 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1597 *count = 0; 1598 } else { 1599 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1600 *count = min(*count, nr_io_queues); 1601 } 1602 1603 return 0; 1604 } 1605 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1606 1607 #define NVME_AEN_SUPPORTED \ 1608 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ 1609 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) 1610 1611 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1612 { 1613 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1614 int status; 1615 1616 if (!supported_aens) 1617 return; 1618 1619 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1620 NULL, 0, &result); 1621 if (status) 1622 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1623 supported_aens); 1624 1625 queue_work(nvme_wq, &ctrl->async_event_work); 1626 } 1627 1628 static int nvme_ns_open(struct nvme_ns *ns) 1629 { 1630 1631 /* should never be called due to GENHD_FL_HIDDEN */ 1632 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head))) 1633 goto fail; 1634 if (!nvme_get_ns(ns)) 1635 goto fail; 1636 if (!try_module_get(ns->ctrl->ops->module)) 1637 goto fail_put_ns; 1638 1639 return 0; 1640 1641 fail_put_ns: 1642 nvme_put_ns(ns); 1643 fail: 1644 return -ENXIO; 1645 } 1646 1647 static void nvme_ns_release(struct nvme_ns *ns) 1648 { 1649 1650 module_put(ns->ctrl->ops->module); 1651 nvme_put_ns(ns); 1652 } 1653 1654 static int nvme_open(struct gendisk *disk, blk_mode_t mode) 1655 { 1656 return nvme_ns_open(disk->private_data); 1657 } 1658 1659 static void nvme_release(struct gendisk *disk) 1660 { 1661 nvme_ns_release(disk->private_data); 1662 } 1663 1664 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1665 { 1666 /* some standard values */ 1667 geo->heads = 1 << 6; 1668 geo->sectors = 1 << 5; 1669 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1670 return 0; 1671 } 1672 1673 #ifdef CONFIG_BLK_DEV_INTEGRITY 1674 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns, 1675 u32 max_integrity_segments) 1676 { 1677 struct blk_integrity integrity = { }; 1678 1679 switch (ns->pi_type) { 1680 case NVME_NS_DPS_PI_TYPE3: 1681 switch (ns->guard_type) { 1682 case NVME_NVM_NS_16B_GUARD: 1683 integrity.profile = &t10_pi_type3_crc; 1684 integrity.tag_size = sizeof(u16) + sizeof(u32); 1685 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1686 break; 1687 case NVME_NVM_NS_64B_GUARD: 1688 integrity.profile = &ext_pi_type3_crc64; 1689 integrity.tag_size = sizeof(u16) + 6; 1690 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1691 break; 1692 default: 1693 integrity.profile = NULL; 1694 break; 1695 } 1696 break; 1697 case NVME_NS_DPS_PI_TYPE1: 1698 case NVME_NS_DPS_PI_TYPE2: 1699 switch (ns->guard_type) { 1700 case NVME_NVM_NS_16B_GUARD: 1701 integrity.profile = &t10_pi_type1_crc; 1702 integrity.tag_size = sizeof(u16); 1703 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1704 break; 1705 case NVME_NVM_NS_64B_GUARD: 1706 integrity.profile = &ext_pi_type1_crc64; 1707 integrity.tag_size = sizeof(u16); 1708 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1709 break; 1710 default: 1711 integrity.profile = NULL; 1712 break; 1713 } 1714 break; 1715 default: 1716 integrity.profile = NULL; 1717 break; 1718 } 1719 1720 integrity.tuple_size = ns->ms; 1721 blk_integrity_register(disk, &integrity); 1722 blk_queue_max_integrity_segments(disk->queue, max_integrity_segments); 1723 } 1724 #else 1725 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns, 1726 u32 max_integrity_segments) 1727 { 1728 } 1729 #endif /* CONFIG_BLK_DEV_INTEGRITY */ 1730 1731 static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns) 1732 { 1733 struct nvme_ctrl *ctrl = ns->ctrl; 1734 struct request_queue *queue = disk->queue; 1735 u32 size = queue_logical_block_size(queue); 1736 1737 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns, UINT_MAX)) 1738 ctrl->max_discard_sectors = nvme_lba_to_sect(ns, ctrl->dmrsl); 1739 1740 if (ctrl->max_discard_sectors == 0) { 1741 blk_queue_max_discard_sectors(queue, 0); 1742 return; 1743 } 1744 1745 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) < 1746 NVME_DSM_MAX_RANGES); 1747 1748 queue->limits.discard_granularity = size; 1749 1750 /* If discard is already enabled, don't reset queue limits */ 1751 if (queue->limits.max_discard_sectors) 1752 return; 1753 1754 blk_queue_max_discard_sectors(queue, ctrl->max_discard_sectors); 1755 blk_queue_max_discard_segments(queue, ctrl->max_discard_segments); 1756 1757 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 1758 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX); 1759 } 1760 1761 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 1762 { 1763 return uuid_equal(&a->uuid, &b->uuid) && 1764 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 1765 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 && 1766 a->csi == b->csi; 1767 } 1768 1769 static int nvme_init_ms(struct nvme_ns *ns, struct nvme_id_ns *id) 1770 { 1771 bool first = id->dps & NVME_NS_DPS_PI_FIRST; 1772 unsigned lbaf = nvme_lbaf_index(id->flbas); 1773 struct nvme_ctrl *ctrl = ns->ctrl; 1774 struct nvme_command c = { }; 1775 struct nvme_id_ns_nvm *nvm; 1776 int ret = 0; 1777 u32 elbaf; 1778 1779 ns->pi_size = 0; 1780 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms); 1781 if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) { 1782 ns->pi_size = sizeof(struct t10_pi_tuple); 1783 ns->guard_type = NVME_NVM_NS_16B_GUARD; 1784 goto set_pi; 1785 } 1786 1787 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); 1788 if (!nvm) 1789 return -ENOMEM; 1790 1791 c.identify.opcode = nvme_admin_identify; 1792 c.identify.nsid = cpu_to_le32(ns->head->ns_id); 1793 c.identify.cns = NVME_ID_CNS_CS_NS; 1794 c.identify.csi = NVME_CSI_NVM; 1795 1796 ret = nvme_submit_sync_cmd(ns->ctrl->admin_q, &c, nvm, sizeof(*nvm)); 1797 if (ret) 1798 goto free_data; 1799 1800 elbaf = le32_to_cpu(nvm->elbaf[lbaf]); 1801 1802 /* no support for storage tag formats right now */ 1803 if (nvme_elbaf_sts(elbaf)) 1804 goto free_data; 1805 1806 ns->guard_type = nvme_elbaf_guard_type(elbaf); 1807 switch (ns->guard_type) { 1808 case NVME_NVM_NS_64B_GUARD: 1809 ns->pi_size = sizeof(struct crc64_pi_tuple); 1810 break; 1811 case NVME_NVM_NS_16B_GUARD: 1812 ns->pi_size = sizeof(struct t10_pi_tuple); 1813 break; 1814 default: 1815 break; 1816 } 1817 1818 free_data: 1819 kfree(nvm); 1820 set_pi: 1821 if (ns->pi_size && (first || ns->ms == ns->pi_size)) 1822 ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1823 else 1824 ns->pi_type = 0; 1825 1826 return ret; 1827 } 1828 1829 static int nvme_configure_metadata(struct nvme_ns *ns, struct nvme_id_ns *id) 1830 { 1831 struct nvme_ctrl *ctrl = ns->ctrl; 1832 int ret; 1833 1834 ret = nvme_init_ms(ns, id); 1835 if (ret) 1836 return ret; 1837 1838 ns->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS); 1839 if (!ns->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 1840 return 0; 1841 1842 if (ctrl->ops->flags & NVME_F_FABRICS) { 1843 /* 1844 * The NVMe over Fabrics specification only supports metadata as 1845 * part of the extended data LBA. We rely on HCA/HBA support to 1846 * remap the separate metadata buffer from the block layer. 1847 */ 1848 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT))) 1849 return 0; 1850 1851 ns->features |= NVME_NS_EXT_LBAS; 1852 1853 /* 1854 * The current fabrics transport drivers support namespace 1855 * metadata formats only if nvme_ns_has_pi() returns true. 1856 * Suppress support for all other formats so the namespace will 1857 * have a 0 capacity and not be usable through the block stack. 1858 * 1859 * Note, this check will need to be modified if any drivers 1860 * gain the ability to use other metadata formats. 1861 */ 1862 if (ctrl->max_integrity_segments && nvme_ns_has_pi(ns)) 1863 ns->features |= NVME_NS_METADATA_SUPPORTED; 1864 } else { 1865 /* 1866 * For PCIe controllers, we can't easily remap the separate 1867 * metadata buffer from the block layer and thus require a 1868 * separate metadata buffer for block layer metadata/PI support. 1869 * We allow extended LBAs for the passthrough interface, though. 1870 */ 1871 if (id->flbas & NVME_NS_FLBAS_META_EXT) 1872 ns->features |= NVME_NS_EXT_LBAS; 1873 else 1874 ns->features |= NVME_NS_METADATA_SUPPORTED; 1875 } 1876 return 0; 1877 } 1878 1879 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl, 1880 struct request_queue *q) 1881 { 1882 bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT; 1883 1884 if (ctrl->max_hw_sectors) { 1885 u32 max_segments = 1886 (ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1; 1887 1888 max_segments = min_not_zero(max_segments, ctrl->max_segments); 1889 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors); 1890 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX)); 1891 } 1892 blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1); 1893 blk_queue_dma_alignment(q, 3); 1894 blk_queue_write_cache(q, vwc, vwc); 1895 } 1896 1897 static void nvme_update_disk_info(struct gendisk *disk, 1898 struct nvme_ns *ns, struct nvme_id_ns *id) 1899 { 1900 sector_t capacity = nvme_lba_to_sect(ns, le64_to_cpu(id->nsze)); 1901 u32 bs = 1U << ns->lba_shift; 1902 u32 atomic_bs, phys_bs, io_opt = 0; 1903 1904 /* 1905 * The block layer can't support LBA sizes larger than the page size 1906 * or smaller than a sector size yet, so catch this early and don't 1907 * allow block I/O. 1908 */ 1909 if (ns->lba_shift > PAGE_SHIFT || ns->lba_shift < SECTOR_SHIFT) { 1910 capacity = 0; 1911 bs = (1 << 9); 1912 } 1913 1914 blk_integrity_unregister(disk); 1915 1916 atomic_bs = phys_bs = bs; 1917 if (id->nabo == 0) { 1918 /* 1919 * Bit 1 indicates whether NAWUPF is defined for this namespace 1920 * and whether it should be used instead of AWUPF. If NAWUPF == 1921 * 0 then AWUPF must be used instead. 1922 */ 1923 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) 1924 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs; 1925 else 1926 atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs; 1927 } 1928 1929 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) { 1930 /* NPWG = Namespace Preferred Write Granularity */ 1931 phys_bs = bs * (1 + le16_to_cpu(id->npwg)); 1932 /* NOWS = Namespace Optimal Write Size */ 1933 io_opt = bs * (1 + le16_to_cpu(id->nows)); 1934 } 1935 1936 blk_queue_logical_block_size(disk->queue, bs); 1937 /* 1938 * Linux filesystems assume writing a single physical block is 1939 * an atomic operation. Hence limit the physical block size to the 1940 * value of the Atomic Write Unit Power Fail parameter. 1941 */ 1942 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs)); 1943 blk_queue_io_min(disk->queue, phys_bs); 1944 blk_queue_io_opt(disk->queue, io_opt); 1945 1946 /* 1947 * Register a metadata profile for PI, or the plain non-integrity NVMe 1948 * metadata masquerading as Type 0 if supported, otherwise reject block 1949 * I/O to namespaces with metadata except when the namespace supports 1950 * PI, as it can strip/insert in that case. 1951 */ 1952 if (ns->ms) { 1953 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 1954 (ns->features & NVME_NS_METADATA_SUPPORTED)) 1955 nvme_init_integrity(disk, ns, 1956 ns->ctrl->max_integrity_segments); 1957 else if (!nvme_ns_has_pi(ns)) 1958 capacity = 0; 1959 } 1960 1961 set_capacity_and_notify(disk, capacity); 1962 1963 nvme_config_discard(disk, ns); 1964 blk_queue_max_write_zeroes_sectors(disk->queue, 1965 ns->ctrl->max_zeroes_sectors); 1966 } 1967 1968 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info) 1969 { 1970 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags); 1971 } 1972 1973 static inline bool nvme_first_scan(struct gendisk *disk) 1974 { 1975 /* nvme_alloc_ns() scans the disk prior to adding it */ 1976 return !disk_live(disk); 1977 } 1978 1979 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id) 1980 { 1981 struct nvme_ctrl *ctrl = ns->ctrl; 1982 u32 iob; 1983 1984 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 1985 is_power_of_2(ctrl->max_hw_sectors)) 1986 iob = ctrl->max_hw_sectors; 1987 else 1988 iob = nvme_lba_to_sect(ns, le16_to_cpu(id->noiob)); 1989 1990 if (!iob) 1991 return; 1992 1993 if (!is_power_of_2(iob)) { 1994 if (nvme_first_scan(ns->disk)) 1995 pr_warn("%s: ignoring unaligned IO boundary:%u\n", 1996 ns->disk->disk_name, iob); 1997 return; 1998 } 1999 2000 if (blk_queue_is_zoned(ns->disk->queue)) { 2001 if (nvme_first_scan(ns->disk)) 2002 pr_warn("%s: ignoring zoned namespace IO boundary\n", 2003 ns->disk->disk_name); 2004 return; 2005 } 2006 2007 blk_queue_chunk_sectors(ns->queue, iob); 2008 } 2009 2010 static int nvme_update_ns_info_generic(struct nvme_ns *ns, 2011 struct nvme_ns_info *info) 2012 { 2013 blk_mq_freeze_queue(ns->disk->queue); 2014 nvme_set_queue_limits(ns->ctrl, ns->queue); 2015 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2016 blk_mq_unfreeze_queue(ns->disk->queue); 2017 2018 if (nvme_ns_head_multipath(ns->head)) { 2019 blk_mq_freeze_queue(ns->head->disk->queue); 2020 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2021 nvme_mpath_revalidate_paths(ns); 2022 blk_stack_limits(&ns->head->disk->queue->limits, 2023 &ns->queue->limits, 0); 2024 ns->head->disk->flags |= GENHD_FL_HIDDEN; 2025 blk_mq_unfreeze_queue(ns->head->disk->queue); 2026 } 2027 2028 /* Hide the block-interface for these devices */ 2029 ns->disk->flags |= GENHD_FL_HIDDEN; 2030 set_bit(NVME_NS_READY, &ns->flags); 2031 2032 return 0; 2033 } 2034 2035 static int nvme_update_ns_info_block(struct nvme_ns *ns, 2036 struct nvme_ns_info *info) 2037 { 2038 struct nvme_id_ns *id; 2039 unsigned lbaf; 2040 int ret; 2041 2042 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id); 2043 if (ret) 2044 return ret; 2045 2046 if (id->ncap == 0) { 2047 /* namespace not allocated or attached */ 2048 info->is_removed = true; 2049 ret = -ENODEV; 2050 goto error; 2051 } 2052 2053 blk_mq_freeze_queue(ns->disk->queue); 2054 lbaf = nvme_lbaf_index(id->flbas); 2055 ns->lba_shift = id->lbaf[lbaf].ds; 2056 nvme_set_queue_limits(ns->ctrl, ns->queue); 2057 2058 ret = nvme_configure_metadata(ns, id); 2059 if (ret < 0) { 2060 blk_mq_unfreeze_queue(ns->disk->queue); 2061 goto out; 2062 } 2063 nvme_set_chunk_sectors(ns, id); 2064 nvme_update_disk_info(ns->disk, ns, id); 2065 2066 if (ns->head->ids.csi == NVME_CSI_ZNS) { 2067 ret = nvme_update_zone_info(ns, lbaf); 2068 if (ret) { 2069 blk_mq_unfreeze_queue(ns->disk->queue); 2070 goto out; 2071 } 2072 } 2073 2074 /* 2075 * Only set the DEAC bit if the device guarantees that reads from 2076 * deallocated data return zeroes. While the DEAC bit does not 2077 * require that, it must be a no-op if reads from deallocated data 2078 * do not return zeroes. 2079 */ 2080 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3))) 2081 ns->features |= NVME_NS_DEAC; 2082 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2083 set_bit(NVME_NS_READY, &ns->flags); 2084 blk_mq_unfreeze_queue(ns->disk->queue); 2085 2086 if (blk_queue_is_zoned(ns->queue)) { 2087 ret = nvme_revalidate_zones(ns); 2088 if (ret && !nvme_first_scan(ns->disk)) 2089 goto out; 2090 } 2091 2092 if (nvme_ns_head_multipath(ns->head)) { 2093 blk_mq_freeze_queue(ns->head->disk->queue); 2094 nvme_update_disk_info(ns->head->disk, ns, id); 2095 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2096 nvme_mpath_revalidate_paths(ns); 2097 blk_stack_limits(&ns->head->disk->queue->limits, 2098 &ns->queue->limits, 0); 2099 disk_update_readahead(ns->head->disk); 2100 blk_mq_unfreeze_queue(ns->head->disk->queue); 2101 } 2102 2103 ret = 0; 2104 out: 2105 /* 2106 * If probing fails due an unsupported feature, hide the block device, 2107 * but still allow other access. 2108 */ 2109 if (ret == -ENODEV) { 2110 ns->disk->flags |= GENHD_FL_HIDDEN; 2111 set_bit(NVME_NS_READY, &ns->flags); 2112 ret = 0; 2113 } 2114 2115 error: 2116 kfree(id); 2117 return ret; 2118 } 2119 2120 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info) 2121 { 2122 switch (info->ids.csi) { 2123 case NVME_CSI_ZNS: 2124 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 2125 dev_info(ns->ctrl->device, 2126 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n", 2127 info->nsid); 2128 return nvme_update_ns_info_generic(ns, info); 2129 } 2130 return nvme_update_ns_info_block(ns, info); 2131 case NVME_CSI_NVM: 2132 return nvme_update_ns_info_block(ns, info); 2133 default: 2134 dev_info(ns->ctrl->device, 2135 "block device for nsid %u not supported (csi %u)\n", 2136 info->nsid, info->ids.csi); 2137 return nvme_update_ns_info_generic(ns, info); 2138 } 2139 } 2140 2141 #ifdef CONFIG_BLK_SED_OPAL 2142 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2143 bool send) 2144 { 2145 struct nvme_ctrl *ctrl = data; 2146 struct nvme_command cmd = { }; 2147 2148 if (send) 2149 cmd.common.opcode = nvme_admin_security_send; 2150 else 2151 cmd.common.opcode = nvme_admin_security_recv; 2152 cmd.common.nsid = 0; 2153 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 2154 cmd.common.cdw11 = cpu_to_le32(len); 2155 2156 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 2157 NVME_QID_ANY, 1, 0); 2158 } 2159 2160 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2161 { 2162 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) { 2163 if (!ctrl->opal_dev) 2164 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit); 2165 else if (was_suspended) 2166 opal_unlock_from_suspend(ctrl->opal_dev); 2167 } else { 2168 free_opal_dev(ctrl->opal_dev); 2169 ctrl->opal_dev = NULL; 2170 } 2171 } 2172 #else 2173 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2174 { 2175 } 2176 #endif /* CONFIG_BLK_SED_OPAL */ 2177 2178 #ifdef CONFIG_BLK_DEV_ZONED 2179 static int nvme_report_zones(struct gendisk *disk, sector_t sector, 2180 unsigned int nr_zones, report_zones_cb cb, void *data) 2181 { 2182 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb, 2183 data); 2184 } 2185 #else 2186 #define nvme_report_zones NULL 2187 #endif /* CONFIG_BLK_DEV_ZONED */ 2188 2189 const struct block_device_operations nvme_bdev_ops = { 2190 .owner = THIS_MODULE, 2191 .ioctl = nvme_ioctl, 2192 .compat_ioctl = blkdev_compat_ptr_ioctl, 2193 .open = nvme_open, 2194 .release = nvme_release, 2195 .getgeo = nvme_getgeo, 2196 .report_zones = nvme_report_zones, 2197 .pr_ops = &nvme_pr_ops, 2198 }; 2199 2200 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val, 2201 u32 timeout, const char *op) 2202 { 2203 unsigned long timeout_jiffies = jiffies + timeout * HZ; 2204 u32 csts; 2205 int ret; 2206 2207 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2208 if (csts == ~0) 2209 return -ENODEV; 2210 if ((csts & mask) == val) 2211 break; 2212 2213 usleep_range(1000, 2000); 2214 if (fatal_signal_pending(current)) 2215 return -EINTR; 2216 if (time_after(jiffies, timeout_jiffies)) { 2217 dev_err(ctrl->device, 2218 "Device not ready; aborting %s, CSTS=0x%x\n", 2219 op, csts); 2220 return -ENODEV; 2221 } 2222 } 2223 2224 return ret; 2225 } 2226 2227 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown) 2228 { 2229 int ret; 2230 2231 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2232 if (shutdown) 2233 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 2234 else 2235 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 2236 2237 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2238 if (ret) 2239 return ret; 2240 2241 if (shutdown) { 2242 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK, 2243 NVME_CSTS_SHST_CMPLT, 2244 ctrl->shutdown_timeout, "shutdown"); 2245 } 2246 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 2247 msleep(NVME_QUIRK_DELAY_AMOUNT); 2248 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0, 2249 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset"); 2250 } 2251 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 2252 2253 int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 2254 { 2255 unsigned dev_page_min; 2256 u32 timeout; 2257 int ret; 2258 2259 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2260 if (ret) { 2261 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2262 return ret; 2263 } 2264 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2265 2266 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) { 2267 dev_err(ctrl->device, 2268 "Minimum device page size %u too large for host (%u)\n", 2269 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT); 2270 return -ENODEV; 2271 } 2272 2273 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI) 2274 ctrl->ctrl_config = NVME_CC_CSS_CSI; 2275 else 2276 ctrl->ctrl_config = NVME_CC_CSS_NVM; 2277 2278 if (ctrl->cap & NVME_CAP_CRMS_CRWMS && ctrl->cap & NVME_CAP_CRMS_CRIMS) 2279 ctrl->ctrl_config |= NVME_CC_CRIME; 2280 2281 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; 2282 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 2283 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 2284 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2285 if (ret) 2286 return ret; 2287 2288 /* Flush write to device (required if transport is PCI) */ 2289 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config); 2290 if (ret) 2291 return ret; 2292 2293 /* CAP value may change after initial CC write */ 2294 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2295 if (ret) 2296 return ret; 2297 2298 timeout = NVME_CAP_TIMEOUT(ctrl->cap); 2299 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) { 2300 u32 crto, ready_timeout; 2301 2302 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto); 2303 if (ret) { 2304 dev_err(ctrl->device, "Reading CRTO failed (%d)\n", 2305 ret); 2306 return ret; 2307 } 2308 2309 /* 2310 * CRTO should always be greater or equal to CAP.TO, but some 2311 * devices are known to get this wrong. Use the larger of the 2312 * two values. 2313 */ 2314 if (ctrl->ctrl_config & NVME_CC_CRIME) 2315 ready_timeout = NVME_CRTO_CRIMT(crto); 2316 else 2317 ready_timeout = NVME_CRTO_CRWMT(crto); 2318 2319 if (ready_timeout < timeout) 2320 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n", 2321 crto, ctrl->cap); 2322 else 2323 timeout = ready_timeout; 2324 } 2325 2326 ctrl->ctrl_config |= NVME_CC_ENABLE; 2327 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2328 if (ret) 2329 return ret; 2330 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY, 2331 (timeout + 1) / 2, "initialisation"); 2332 } 2333 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 2334 2335 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 2336 { 2337 __le64 ts; 2338 int ret; 2339 2340 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 2341 return 0; 2342 2343 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 2344 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 2345 NULL); 2346 if (ret) 2347 dev_warn_once(ctrl->device, 2348 "could not set timestamp (%d)\n", ret); 2349 return ret; 2350 } 2351 2352 static int nvme_configure_host_options(struct nvme_ctrl *ctrl) 2353 { 2354 struct nvme_feat_host_behavior *host; 2355 u8 acre = 0, lbafee = 0; 2356 int ret; 2357 2358 /* Don't bother enabling the feature if retry delay is not reported */ 2359 if (ctrl->crdt[0]) 2360 acre = NVME_ENABLE_ACRE; 2361 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) 2362 lbafee = NVME_ENABLE_LBAFEE; 2363 2364 if (!acre && !lbafee) 2365 return 0; 2366 2367 host = kzalloc(sizeof(*host), GFP_KERNEL); 2368 if (!host) 2369 return 0; 2370 2371 host->acre = acre; 2372 host->lbafee = lbafee; 2373 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 2374 host, sizeof(*host), NULL); 2375 kfree(host); 2376 return ret; 2377 } 2378 2379 /* 2380 * The function checks whether the given total (exlat + enlat) latency of 2381 * a power state allows the latter to be used as an APST transition target. 2382 * It does so by comparing the latency to the primary and secondary latency 2383 * tolerances defined by module params. If there's a match, the corresponding 2384 * timeout value is returned and the matching tolerance index (1 or 2) is 2385 * reported. 2386 */ 2387 static bool nvme_apst_get_transition_time(u64 total_latency, 2388 u64 *transition_time, unsigned *last_index) 2389 { 2390 if (total_latency <= apst_primary_latency_tol_us) { 2391 if (*last_index == 1) 2392 return false; 2393 *last_index = 1; 2394 *transition_time = apst_primary_timeout_ms; 2395 return true; 2396 } 2397 if (apst_secondary_timeout_ms && 2398 total_latency <= apst_secondary_latency_tol_us) { 2399 if (*last_index <= 2) 2400 return false; 2401 *last_index = 2; 2402 *transition_time = apst_secondary_timeout_ms; 2403 return true; 2404 } 2405 return false; 2406 } 2407 2408 /* 2409 * APST (Autonomous Power State Transition) lets us program a table of power 2410 * state transitions that the controller will perform automatically. 2411 * 2412 * Depending on module params, one of the two supported techniques will be used: 2413 * 2414 * - If the parameters provide explicit timeouts and tolerances, they will be 2415 * used to build a table with up to 2 non-operational states to transition to. 2416 * The default parameter values were selected based on the values used by 2417 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic 2418 * regeneration of the APST table in the event of switching between external 2419 * and battery power, the timeouts and tolerances reflect a compromise 2420 * between values used by Microsoft for AC and battery scenarios. 2421 * - If not, we'll configure the table with a simple heuristic: we are willing 2422 * to spend at most 2% of the time transitioning between power states. 2423 * Therefore, when running in any given state, we will enter the next 2424 * lower-power non-operational state after waiting 50 * (enlat + exlat) 2425 * microseconds, as long as that state's exit latency is under the requested 2426 * maximum latency. 2427 * 2428 * We will not autonomously enter any non-operational state for which the total 2429 * latency exceeds ps_max_latency_us. 2430 * 2431 * Users can set ps_max_latency_us to zero to turn off APST. 2432 */ 2433 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 2434 { 2435 struct nvme_feat_auto_pst *table; 2436 unsigned apste = 0; 2437 u64 max_lat_us = 0; 2438 __le64 target = 0; 2439 int max_ps = -1; 2440 int state; 2441 int ret; 2442 unsigned last_lt_index = UINT_MAX; 2443 2444 /* 2445 * If APST isn't supported or if we haven't been initialized yet, 2446 * then don't do anything. 2447 */ 2448 if (!ctrl->apsta) 2449 return 0; 2450 2451 if (ctrl->npss > 31) { 2452 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2453 return 0; 2454 } 2455 2456 table = kzalloc(sizeof(*table), GFP_KERNEL); 2457 if (!table) 2458 return 0; 2459 2460 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2461 /* Turn off APST. */ 2462 dev_dbg(ctrl->device, "APST disabled\n"); 2463 goto done; 2464 } 2465 2466 /* 2467 * Walk through all states from lowest- to highest-power. 2468 * According to the spec, lower-numbered states use more power. NPSS, 2469 * despite the name, is the index of the lowest-power state, not the 2470 * number of states. 2471 */ 2472 for (state = (int)ctrl->npss; state >= 0; state--) { 2473 u64 total_latency_us, exit_latency_us, transition_ms; 2474 2475 if (target) 2476 table->entries[state] = target; 2477 2478 /* 2479 * Don't allow transitions to the deepest state if it's quirked 2480 * off. 2481 */ 2482 if (state == ctrl->npss && 2483 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2484 continue; 2485 2486 /* 2487 * Is this state a useful non-operational state for higher-power 2488 * states to autonomously transition to? 2489 */ 2490 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE)) 2491 continue; 2492 2493 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2494 if (exit_latency_us > ctrl->ps_max_latency_us) 2495 continue; 2496 2497 total_latency_us = exit_latency_us + 2498 le32_to_cpu(ctrl->psd[state].entry_lat); 2499 2500 /* 2501 * This state is good. It can be used as the APST idle target 2502 * for higher power states. 2503 */ 2504 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) { 2505 if (!nvme_apst_get_transition_time(total_latency_us, 2506 &transition_ms, &last_lt_index)) 2507 continue; 2508 } else { 2509 transition_ms = total_latency_us + 19; 2510 do_div(transition_ms, 20); 2511 if (transition_ms > (1 << 24) - 1) 2512 transition_ms = (1 << 24) - 1; 2513 } 2514 2515 target = cpu_to_le64((state << 3) | (transition_ms << 8)); 2516 if (max_ps == -1) 2517 max_ps = state; 2518 if (total_latency_us > max_lat_us) 2519 max_lat_us = total_latency_us; 2520 } 2521 2522 if (max_ps == -1) 2523 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2524 else 2525 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2526 max_ps, max_lat_us, (int)sizeof(*table), table); 2527 apste = 1; 2528 2529 done: 2530 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2531 table, sizeof(*table), NULL); 2532 if (ret) 2533 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2534 kfree(table); 2535 return ret; 2536 } 2537 2538 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2539 { 2540 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2541 u64 latency; 2542 2543 switch (val) { 2544 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2545 case PM_QOS_LATENCY_ANY: 2546 latency = U64_MAX; 2547 break; 2548 2549 default: 2550 latency = val; 2551 } 2552 2553 if (ctrl->ps_max_latency_us != latency) { 2554 ctrl->ps_max_latency_us = latency; 2555 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 2556 nvme_configure_apst(ctrl); 2557 } 2558 } 2559 2560 struct nvme_core_quirk_entry { 2561 /* 2562 * NVMe model and firmware strings are padded with spaces. For 2563 * simplicity, strings in the quirk table are padded with NULLs 2564 * instead. 2565 */ 2566 u16 vid; 2567 const char *mn; 2568 const char *fr; 2569 unsigned long quirks; 2570 }; 2571 2572 static const struct nvme_core_quirk_entry core_quirks[] = { 2573 { 2574 /* 2575 * This Toshiba device seems to die using any APST states. See: 2576 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2577 */ 2578 .vid = 0x1179, 2579 .mn = "THNSF5256GPUK TOSHIBA", 2580 .quirks = NVME_QUIRK_NO_APST, 2581 }, 2582 { 2583 /* 2584 * This LiteON CL1-3D*-Q11 firmware version has a race 2585 * condition associated with actions related to suspend to idle 2586 * LiteON has resolved the problem in future firmware 2587 */ 2588 .vid = 0x14a4, 2589 .fr = "22301111", 2590 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 2591 }, 2592 { 2593 /* 2594 * This Kioxia CD6-V Series / HPE PE8030 device times out and 2595 * aborts I/O during any load, but more easily reproducible 2596 * with discards (fstrim). 2597 * 2598 * The device is left in a state where it is also not possible 2599 * to use "nvme set-feature" to disable APST, but booting with 2600 * nvme_core.default_ps_max_latency=0 works. 2601 */ 2602 .vid = 0x1e0f, 2603 .mn = "KCD6XVUL6T40", 2604 .quirks = NVME_QUIRK_NO_APST, 2605 }, 2606 { 2607 /* 2608 * The external Samsung X5 SSD fails initialization without a 2609 * delay before checking if it is ready and has a whole set of 2610 * other problems. To make this even more interesting, it 2611 * shares the PCI ID with internal Samsung 970 Evo Plus that 2612 * does not need or want these quirks. 2613 */ 2614 .vid = 0x144d, 2615 .mn = "Samsung Portable SSD X5", 2616 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY | 2617 NVME_QUIRK_NO_DEEPEST_PS | 2618 NVME_QUIRK_IGNORE_DEV_SUBNQN, 2619 } 2620 }; 2621 2622 /* match is null-terminated but idstr is space-padded. */ 2623 static bool string_matches(const char *idstr, const char *match, size_t len) 2624 { 2625 size_t matchlen; 2626 2627 if (!match) 2628 return true; 2629 2630 matchlen = strlen(match); 2631 WARN_ON_ONCE(matchlen > len); 2632 2633 if (memcmp(idstr, match, matchlen)) 2634 return false; 2635 2636 for (; matchlen < len; matchlen++) 2637 if (idstr[matchlen] != ' ') 2638 return false; 2639 2640 return true; 2641 } 2642 2643 static bool quirk_matches(const struct nvme_id_ctrl *id, 2644 const struct nvme_core_quirk_entry *q) 2645 { 2646 return q->vid == le16_to_cpu(id->vid) && 2647 string_matches(id->mn, q->mn, sizeof(id->mn)) && 2648 string_matches(id->fr, q->fr, sizeof(id->fr)); 2649 } 2650 2651 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 2652 struct nvme_id_ctrl *id) 2653 { 2654 size_t nqnlen; 2655 int off; 2656 2657 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 2658 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 2659 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 2660 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 2661 return; 2662 } 2663 2664 if (ctrl->vs >= NVME_VS(1, 2, 1)) 2665 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 2666 } 2667 2668 /* 2669 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe 2670 * Base Specification 2.0. It is slightly different from the format 2671 * specified there due to historic reasons, and we can't change it now. 2672 */ 2673 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 2674 "nqn.2014.08.org.nvmexpress:%04x%04x", 2675 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 2676 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 2677 off += sizeof(id->sn); 2678 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 2679 off += sizeof(id->mn); 2680 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 2681 } 2682 2683 static void nvme_release_subsystem(struct device *dev) 2684 { 2685 struct nvme_subsystem *subsys = 2686 container_of(dev, struct nvme_subsystem, dev); 2687 2688 if (subsys->instance >= 0) 2689 ida_free(&nvme_instance_ida, subsys->instance); 2690 kfree(subsys); 2691 } 2692 2693 static void nvme_destroy_subsystem(struct kref *ref) 2694 { 2695 struct nvme_subsystem *subsys = 2696 container_of(ref, struct nvme_subsystem, ref); 2697 2698 mutex_lock(&nvme_subsystems_lock); 2699 list_del(&subsys->entry); 2700 mutex_unlock(&nvme_subsystems_lock); 2701 2702 ida_destroy(&subsys->ns_ida); 2703 device_del(&subsys->dev); 2704 put_device(&subsys->dev); 2705 } 2706 2707 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 2708 { 2709 kref_put(&subsys->ref, nvme_destroy_subsystem); 2710 } 2711 2712 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 2713 { 2714 struct nvme_subsystem *subsys; 2715 2716 lockdep_assert_held(&nvme_subsystems_lock); 2717 2718 /* 2719 * Fail matches for discovery subsystems. This results 2720 * in each discovery controller bound to a unique subsystem. 2721 * This avoids issues with validating controller values 2722 * that can only be true when there is a single unique subsystem. 2723 * There may be multiple and completely independent entities 2724 * that provide discovery controllers. 2725 */ 2726 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME)) 2727 return NULL; 2728 2729 list_for_each_entry(subsys, &nvme_subsystems, entry) { 2730 if (strcmp(subsys->subnqn, subsysnqn)) 2731 continue; 2732 if (!kref_get_unless_zero(&subsys->ref)) 2733 continue; 2734 return subsys; 2735 } 2736 2737 return NULL; 2738 } 2739 2740 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl) 2741 { 2742 return ctrl->opts && ctrl->opts->discovery_nqn; 2743 } 2744 2745 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, 2746 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2747 { 2748 struct nvme_ctrl *tmp; 2749 2750 lockdep_assert_held(&nvme_subsystems_lock); 2751 2752 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) { 2753 if (nvme_state_terminal(tmp)) 2754 continue; 2755 2756 if (tmp->cntlid == ctrl->cntlid) { 2757 dev_err(ctrl->device, 2758 "Duplicate cntlid %u with %s, subsys %s, rejecting\n", 2759 ctrl->cntlid, dev_name(tmp->device), 2760 subsys->subnqn); 2761 return false; 2762 } 2763 2764 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) || 2765 nvme_discovery_ctrl(ctrl)) 2766 continue; 2767 2768 dev_err(ctrl->device, 2769 "Subsystem does not support multiple controllers\n"); 2770 return false; 2771 } 2772 2773 return true; 2774 } 2775 2776 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2777 { 2778 struct nvme_subsystem *subsys, *found; 2779 int ret; 2780 2781 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 2782 if (!subsys) 2783 return -ENOMEM; 2784 2785 subsys->instance = -1; 2786 mutex_init(&subsys->lock); 2787 kref_init(&subsys->ref); 2788 INIT_LIST_HEAD(&subsys->ctrls); 2789 INIT_LIST_HEAD(&subsys->nsheads); 2790 nvme_init_subnqn(subsys, ctrl, id); 2791 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 2792 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 2793 subsys->vendor_id = le16_to_cpu(id->vid); 2794 subsys->cmic = id->cmic; 2795 2796 /* Versions prior to 1.4 don't necessarily report a valid type */ 2797 if (id->cntrltype == NVME_CTRL_DISC || 2798 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME)) 2799 subsys->subtype = NVME_NQN_DISC; 2800 else 2801 subsys->subtype = NVME_NQN_NVME; 2802 2803 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) { 2804 dev_err(ctrl->device, 2805 "Subsystem %s is not a discovery controller", 2806 subsys->subnqn); 2807 kfree(subsys); 2808 return -EINVAL; 2809 } 2810 subsys->awupf = le16_to_cpu(id->awupf); 2811 nvme_mpath_default_iopolicy(subsys); 2812 2813 subsys->dev.class = nvme_subsys_class; 2814 subsys->dev.release = nvme_release_subsystem; 2815 subsys->dev.groups = nvme_subsys_attrs_groups; 2816 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance); 2817 device_initialize(&subsys->dev); 2818 2819 mutex_lock(&nvme_subsystems_lock); 2820 found = __nvme_find_get_subsystem(subsys->subnqn); 2821 if (found) { 2822 put_device(&subsys->dev); 2823 subsys = found; 2824 2825 if (!nvme_validate_cntlid(subsys, ctrl, id)) { 2826 ret = -EINVAL; 2827 goto out_put_subsystem; 2828 } 2829 } else { 2830 ret = device_add(&subsys->dev); 2831 if (ret) { 2832 dev_err(ctrl->device, 2833 "failed to register subsystem device.\n"); 2834 put_device(&subsys->dev); 2835 goto out_unlock; 2836 } 2837 ida_init(&subsys->ns_ida); 2838 list_add_tail(&subsys->entry, &nvme_subsystems); 2839 } 2840 2841 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 2842 dev_name(ctrl->device)); 2843 if (ret) { 2844 dev_err(ctrl->device, 2845 "failed to create sysfs link from subsystem.\n"); 2846 goto out_put_subsystem; 2847 } 2848 2849 if (!found) 2850 subsys->instance = ctrl->instance; 2851 ctrl->subsys = subsys; 2852 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 2853 mutex_unlock(&nvme_subsystems_lock); 2854 return 0; 2855 2856 out_put_subsystem: 2857 nvme_put_subsystem(subsys); 2858 out_unlock: 2859 mutex_unlock(&nvme_subsystems_lock); 2860 return ret; 2861 } 2862 2863 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 2864 void *log, size_t size, u64 offset) 2865 { 2866 struct nvme_command c = { }; 2867 u32 dwlen = nvme_bytes_to_numd(size); 2868 2869 c.get_log_page.opcode = nvme_admin_get_log_page; 2870 c.get_log_page.nsid = cpu_to_le32(nsid); 2871 c.get_log_page.lid = log_page; 2872 c.get_log_page.lsp = lsp; 2873 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 2874 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 2875 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 2876 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 2877 c.get_log_page.csi = csi; 2878 2879 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 2880 } 2881 2882 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi, 2883 struct nvme_effects_log **log) 2884 { 2885 struct nvme_effects_log *cel = xa_load(&ctrl->cels, csi); 2886 int ret; 2887 2888 if (cel) 2889 goto out; 2890 2891 cel = kzalloc(sizeof(*cel), GFP_KERNEL); 2892 if (!cel) 2893 return -ENOMEM; 2894 2895 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi, 2896 cel, sizeof(*cel), 0); 2897 if (ret) { 2898 kfree(cel); 2899 return ret; 2900 } 2901 2902 xa_store(&ctrl->cels, csi, cel, GFP_KERNEL); 2903 out: 2904 *log = cel; 2905 return 0; 2906 } 2907 2908 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units) 2909 { 2910 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val; 2911 2912 if (check_shl_overflow(1U, units + page_shift - 9, &val)) 2913 return UINT_MAX; 2914 return val; 2915 } 2916 2917 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl) 2918 { 2919 struct nvme_command c = { }; 2920 struct nvme_id_ctrl_nvm *id; 2921 int ret; 2922 2923 if (ctrl->oncs & NVME_CTRL_ONCS_DSM) { 2924 ctrl->max_discard_sectors = UINT_MAX; 2925 ctrl->max_discard_segments = NVME_DSM_MAX_RANGES; 2926 } else { 2927 ctrl->max_discard_sectors = 0; 2928 ctrl->max_discard_segments = 0; 2929 } 2930 2931 /* 2932 * Even though NVMe spec explicitly states that MDTS is not applicable 2933 * to the write-zeroes, we are cautious and limit the size to the 2934 * controllers max_hw_sectors value, which is based on the MDTS field 2935 * and possibly other limiting factors. 2936 */ 2937 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) && 2938 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)) 2939 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors; 2940 else 2941 ctrl->max_zeroes_sectors = 0; 2942 2943 if (ctrl->subsys->subtype != NVME_NQN_NVME || 2944 nvme_ctrl_limited_cns(ctrl) || 2945 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags)) 2946 return 0; 2947 2948 id = kzalloc(sizeof(*id), GFP_KERNEL); 2949 if (!id) 2950 return -ENOMEM; 2951 2952 c.identify.opcode = nvme_admin_identify; 2953 c.identify.cns = NVME_ID_CNS_CS_CTRL; 2954 c.identify.csi = NVME_CSI_NVM; 2955 2956 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 2957 if (ret) 2958 goto free_data; 2959 2960 if (id->dmrl) 2961 ctrl->max_discard_segments = id->dmrl; 2962 ctrl->dmrsl = le32_to_cpu(id->dmrsl); 2963 if (id->wzsl) 2964 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl); 2965 2966 free_data: 2967 if (ret > 0) 2968 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags); 2969 kfree(id); 2970 return ret; 2971 } 2972 2973 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl) 2974 { 2975 struct nvme_effects_log *log = ctrl->effects; 2976 2977 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 2978 NVME_CMD_EFFECTS_NCC | 2979 NVME_CMD_EFFECTS_CSE_MASK); 2980 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 2981 NVME_CMD_EFFECTS_CSE_MASK); 2982 2983 /* 2984 * The spec says the result of a security receive command depends on 2985 * the previous security send command. As such, many vendors log this 2986 * command as one to submitted only when no other commands to the same 2987 * namespace are outstanding. The intention is to tell the host to 2988 * prevent mixing security send and receive. 2989 * 2990 * This driver can only enforce such exclusive access against IO 2991 * queues, though. We are not readily able to enforce such a rule for 2992 * two commands to the admin queue, which is the only queue that 2993 * matters for this command. 2994 * 2995 * Rather than blindly freezing the IO queues for this effect that 2996 * doesn't even apply to IO, mask it off. 2997 */ 2998 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK); 2999 3000 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3001 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3002 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3003 } 3004 3005 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 3006 { 3007 int ret = 0; 3008 3009 if (ctrl->effects) 3010 return 0; 3011 3012 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 3013 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 3014 if (ret < 0) 3015 return ret; 3016 } 3017 3018 if (!ctrl->effects) { 3019 ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL); 3020 if (!ctrl->effects) 3021 return -ENOMEM; 3022 xa_store(&ctrl->cels, NVME_CSI_NVM, ctrl->effects, GFP_KERNEL); 3023 } 3024 3025 nvme_init_known_nvm_effects(ctrl); 3026 return 0; 3027 } 3028 3029 static int nvme_init_identify(struct nvme_ctrl *ctrl) 3030 { 3031 struct nvme_id_ctrl *id; 3032 u32 max_hw_sectors; 3033 bool prev_apst_enabled; 3034 int ret; 3035 3036 ret = nvme_identify_ctrl(ctrl, &id); 3037 if (ret) { 3038 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 3039 return -EIO; 3040 } 3041 3042 if (!(ctrl->ops->flags & NVME_F_FABRICS)) 3043 ctrl->cntlid = le16_to_cpu(id->cntlid); 3044 3045 if (!ctrl->identified) { 3046 unsigned int i; 3047 3048 /* 3049 * Check for quirks. Quirk can depend on firmware version, 3050 * so, in principle, the set of quirks present can change 3051 * across a reset. As a possible future enhancement, we 3052 * could re-scan for quirks every time we reinitialize 3053 * the device, but we'd have to make sure that the driver 3054 * behaves intelligently if the quirks change. 3055 */ 3056 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 3057 if (quirk_matches(id, &core_quirks[i])) 3058 ctrl->quirks |= core_quirks[i].quirks; 3059 } 3060 3061 ret = nvme_init_subsystem(ctrl, id); 3062 if (ret) 3063 goto out_free; 3064 3065 ret = nvme_init_effects(ctrl, id); 3066 if (ret) 3067 goto out_free; 3068 } 3069 memcpy(ctrl->subsys->firmware_rev, id->fr, 3070 sizeof(ctrl->subsys->firmware_rev)); 3071 3072 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 3073 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 3074 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 3075 } 3076 3077 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 3078 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 3079 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 3080 3081 ctrl->oacs = le16_to_cpu(id->oacs); 3082 ctrl->oncs = le16_to_cpu(id->oncs); 3083 ctrl->mtfa = le16_to_cpu(id->mtfa); 3084 ctrl->oaes = le32_to_cpu(id->oaes); 3085 ctrl->wctemp = le16_to_cpu(id->wctemp); 3086 ctrl->cctemp = le16_to_cpu(id->cctemp); 3087 3088 atomic_set(&ctrl->abort_limit, id->acl + 1); 3089 ctrl->vwc = id->vwc; 3090 if (id->mdts) 3091 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts); 3092 else 3093 max_hw_sectors = UINT_MAX; 3094 ctrl->max_hw_sectors = 3095 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 3096 3097 nvme_set_queue_limits(ctrl, ctrl->admin_q); 3098 ctrl->sgls = le32_to_cpu(id->sgls); 3099 ctrl->kas = le16_to_cpu(id->kas); 3100 ctrl->max_namespaces = le32_to_cpu(id->mnan); 3101 ctrl->ctratt = le32_to_cpu(id->ctratt); 3102 3103 ctrl->cntrltype = id->cntrltype; 3104 ctrl->dctype = id->dctype; 3105 3106 if (id->rtd3e) { 3107 /* us -> s */ 3108 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC; 3109 3110 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 3111 shutdown_timeout, 60); 3112 3113 if (ctrl->shutdown_timeout != shutdown_timeout) 3114 dev_info(ctrl->device, 3115 "Shutdown timeout set to %u seconds\n", 3116 ctrl->shutdown_timeout); 3117 } else 3118 ctrl->shutdown_timeout = shutdown_timeout; 3119 3120 ctrl->npss = id->npss; 3121 ctrl->apsta = id->apsta; 3122 prev_apst_enabled = ctrl->apst_enabled; 3123 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 3124 if (force_apst && id->apsta) { 3125 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 3126 ctrl->apst_enabled = true; 3127 } else { 3128 ctrl->apst_enabled = false; 3129 } 3130 } else { 3131 ctrl->apst_enabled = id->apsta; 3132 } 3133 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 3134 3135 if (ctrl->ops->flags & NVME_F_FABRICS) { 3136 ctrl->icdoff = le16_to_cpu(id->icdoff); 3137 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 3138 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 3139 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 3140 3141 /* 3142 * In fabrics we need to verify the cntlid matches the 3143 * admin connect 3144 */ 3145 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 3146 dev_err(ctrl->device, 3147 "Mismatching cntlid: Connect %u vs Identify " 3148 "%u, rejecting\n", 3149 ctrl->cntlid, le16_to_cpu(id->cntlid)); 3150 ret = -EINVAL; 3151 goto out_free; 3152 } 3153 3154 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) { 3155 dev_err(ctrl->device, 3156 "keep-alive support is mandatory for fabrics\n"); 3157 ret = -EINVAL; 3158 goto out_free; 3159 } 3160 } else { 3161 ctrl->hmpre = le32_to_cpu(id->hmpre); 3162 ctrl->hmmin = le32_to_cpu(id->hmmin); 3163 ctrl->hmminds = le32_to_cpu(id->hmminds); 3164 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 3165 } 3166 3167 ret = nvme_mpath_init_identify(ctrl, id); 3168 if (ret < 0) 3169 goto out_free; 3170 3171 if (ctrl->apst_enabled && !prev_apst_enabled) 3172 dev_pm_qos_expose_latency_tolerance(ctrl->device); 3173 else if (!ctrl->apst_enabled && prev_apst_enabled) 3174 dev_pm_qos_hide_latency_tolerance(ctrl->device); 3175 3176 out_free: 3177 kfree(id); 3178 return ret; 3179 } 3180 3181 /* 3182 * Initialize the cached copies of the Identify data and various controller 3183 * register in our nvme_ctrl structure. This should be called as soon as 3184 * the admin queue is fully up and running. 3185 */ 3186 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended) 3187 { 3188 int ret; 3189 3190 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 3191 if (ret) { 3192 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 3193 return ret; 3194 } 3195 3196 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize); 3197 3198 if (ctrl->vs >= NVME_VS(1, 1, 0)) 3199 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap); 3200 3201 ret = nvme_init_identify(ctrl); 3202 if (ret) 3203 return ret; 3204 3205 ret = nvme_configure_apst(ctrl); 3206 if (ret < 0) 3207 return ret; 3208 3209 ret = nvme_configure_timestamp(ctrl); 3210 if (ret < 0) 3211 return ret; 3212 3213 ret = nvme_configure_host_options(ctrl); 3214 if (ret < 0) 3215 return ret; 3216 3217 nvme_configure_opal(ctrl, was_suspended); 3218 3219 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) { 3220 /* 3221 * Do not return errors unless we are in a controller reset, 3222 * the controller works perfectly fine without hwmon. 3223 */ 3224 ret = nvme_hwmon_init(ctrl); 3225 if (ret == -EINTR) 3226 return ret; 3227 } 3228 3229 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags); 3230 ctrl->identified = true; 3231 3232 nvme_start_keep_alive(ctrl); 3233 3234 return 0; 3235 } 3236 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish); 3237 3238 static int nvme_dev_open(struct inode *inode, struct file *file) 3239 { 3240 struct nvme_ctrl *ctrl = 3241 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3242 3243 switch (nvme_ctrl_state(ctrl)) { 3244 case NVME_CTRL_LIVE: 3245 break; 3246 default: 3247 return -EWOULDBLOCK; 3248 } 3249 3250 nvme_get_ctrl(ctrl); 3251 if (!try_module_get(ctrl->ops->module)) { 3252 nvme_put_ctrl(ctrl); 3253 return -EINVAL; 3254 } 3255 3256 file->private_data = ctrl; 3257 return 0; 3258 } 3259 3260 static int nvme_dev_release(struct inode *inode, struct file *file) 3261 { 3262 struct nvme_ctrl *ctrl = 3263 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3264 3265 module_put(ctrl->ops->module); 3266 nvme_put_ctrl(ctrl); 3267 return 0; 3268 } 3269 3270 static const struct file_operations nvme_dev_fops = { 3271 .owner = THIS_MODULE, 3272 .open = nvme_dev_open, 3273 .release = nvme_dev_release, 3274 .unlocked_ioctl = nvme_dev_ioctl, 3275 .compat_ioctl = compat_ptr_ioctl, 3276 .uring_cmd = nvme_dev_uring_cmd, 3277 }; 3278 3279 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl, 3280 unsigned nsid) 3281 { 3282 struct nvme_ns_head *h; 3283 3284 lockdep_assert_held(&ctrl->subsys->lock); 3285 3286 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) { 3287 /* 3288 * Private namespaces can share NSIDs under some conditions. 3289 * In that case we can't use the same ns_head for namespaces 3290 * with the same NSID. 3291 */ 3292 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h)) 3293 continue; 3294 if (!list_empty(&h->list) && nvme_tryget_ns_head(h)) 3295 return h; 3296 } 3297 3298 return NULL; 3299 } 3300 3301 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys, 3302 struct nvme_ns_ids *ids) 3303 { 3304 bool has_uuid = !uuid_is_null(&ids->uuid); 3305 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid)); 3306 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 3307 struct nvme_ns_head *h; 3308 3309 lockdep_assert_held(&subsys->lock); 3310 3311 list_for_each_entry(h, &subsys->nsheads, entry) { 3312 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid)) 3313 return -EINVAL; 3314 if (has_nguid && 3315 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0) 3316 return -EINVAL; 3317 if (has_eui64 && 3318 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0) 3319 return -EINVAL; 3320 } 3321 3322 return 0; 3323 } 3324 3325 static void nvme_cdev_rel(struct device *dev) 3326 { 3327 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt)); 3328 } 3329 3330 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device) 3331 { 3332 cdev_device_del(cdev, cdev_device); 3333 put_device(cdev_device); 3334 } 3335 3336 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 3337 const struct file_operations *fops, struct module *owner) 3338 { 3339 int minor, ret; 3340 3341 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL); 3342 if (minor < 0) 3343 return minor; 3344 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor); 3345 cdev_device->class = nvme_ns_chr_class; 3346 cdev_device->release = nvme_cdev_rel; 3347 device_initialize(cdev_device); 3348 cdev_init(cdev, fops); 3349 cdev->owner = owner; 3350 ret = cdev_device_add(cdev, cdev_device); 3351 if (ret) 3352 put_device(cdev_device); 3353 3354 return ret; 3355 } 3356 3357 static int nvme_ns_chr_open(struct inode *inode, struct file *file) 3358 { 3359 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3360 } 3361 3362 static int nvme_ns_chr_release(struct inode *inode, struct file *file) 3363 { 3364 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3365 return 0; 3366 } 3367 3368 static const struct file_operations nvme_ns_chr_fops = { 3369 .owner = THIS_MODULE, 3370 .open = nvme_ns_chr_open, 3371 .release = nvme_ns_chr_release, 3372 .unlocked_ioctl = nvme_ns_chr_ioctl, 3373 .compat_ioctl = compat_ptr_ioctl, 3374 .uring_cmd = nvme_ns_chr_uring_cmd, 3375 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll, 3376 }; 3377 3378 static int nvme_add_ns_cdev(struct nvme_ns *ns) 3379 { 3380 int ret; 3381 3382 ns->cdev_device.parent = ns->ctrl->device; 3383 ret = dev_set_name(&ns->cdev_device, "ng%dn%d", 3384 ns->ctrl->instance, ns->head->instance); 3385 if (ret) 3386 return ret; 3387 3388 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops, 3389 ns->ctrl->ops->module); 3390 } 3391 3392 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 3393 struct nvme_ns_info *info) 3394 { 3395 struct nvme_ns_head *head; 3396 size_t size = sizeof(*head); 3397 int ret = -ENOMEM; 3398 3399 #ifdef CONFIG_NVME_MULTIPATH 3400 size += num_possible_nodes() * sizeof(struct nvme_ns *); 3401 #endif 3402 3403 head = kzalloc(size, GFP_KERNEL); 3404 if (!head) 3405 goto out; 3406 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL); 3407 if (ret < 0) 3408 goto out_free_head; 3409 head->instance = ret; 3410 INIT_LIST_HEAD(&head->list); 3411 ret = init_srcu_struct(&head->srcu); 3412 if (ret) 3413 goto out_ida_remove; 3414 head->subsys = ctrl->subsys; 3415 head->ns_id = info->nsid; 3416 head->ids = info->ids; 3417 head->shared = info->is_shared; 3418 kref_init(&head->ref); 3419 3420 if (head->ids.csi) { 3421 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects); 3422 if (ret) 3423 goto out_cleanup_srcu; 3424 } else 3425 head->effects = ctrl->effects; 3426 3427 ret = nvme_mpath_alloc_disk(ctrl, head); 3428 if (ret) 3429 goto out_cleanup_srcu; 3430 3431 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 3432 3433 kref_get(&ctrl->subsys->ref); 3434 3435 return head; 3436 out_cleanup_srcu: 3437 cleanup_srcu_struct(&head->srcu); 3438 out_ida_remove: 3439 ida_free(&ctrl->subsys->ns_ida, head->instance); 3440 out_free_head: 3441 kfree(head); 3442 out: 3443 if (ret > 0) 3444 ret = blk_status_to_errno(nvme_error_status(ret)); 3445 return ERR_PTR(ret); 3446 } 3447 3448 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this, 3449 struct nvme_ns_ids *ids) 3450 { 3451 struct nvme_subsystem *s; 3452 int ret = 0; 3453 3454 /* 3455 * Note that this check is racy as we try to avoid holding the global 3456 * lock over the whole ns_head creation. But it is only intended as 3457 * a sanity check anyway. 3458 */ 3459 mutex_lock(&nvme_subsystems_lock); 3460 list_for_each_entry(s, &nvme_subsystems, entry) { 3461 if (s == this) 3462 continue; 3463 mutex_lock(&s->lock); 3464 ret = nvme_subsys_check_duplicate_ids(s, ids); 3465 mutex_unlock(&s->lock); 3466 if (ret) 3467 break; 3468 } 3469 mutex_unlock(&nvme_subsystems_lock); 3470 3471 return ret; 3472 } 3473 3474 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info) 3475 { 3476 struct nvme_ctrl *ctrl = ns->ctrl; 3477 struct nvme_ns_head *head = NULL; 3478 int ret; 3479 3480 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids); 3481 if (ret) { 3482 /* 3483 * We've found two different namespaces on two different 3484 * subsystems that report the same ID. This is pretty nasty 3485 * for anything that actually requires unique device 3486 * identification. In the kernel we need this for multipathing, 3487 * and in user space the /dev/disk/by-id/ links rely on it. 3488 * 3489 * If the device also claims to be multi-path capable back off 3490 * here now and refuse the probe the second device as this is a 3491 * recipe for data corruption. If not this is probably a 3492 * cheap consumer device if on the PCIe bus, so let the user 3493 * proceed and use the shiny toy, but warn that with changing 3494 * probing order (which due to our async probing could just be 3495 * device taking longer to startup) the other device could show 3496 * up at any time. 3497 */ 3498 nvme_print_device_info(ctrl); 3499 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */ 3500 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) && 3501 info->is_shared)) { 3502 dev_err(ctrl->device, 3503 "ignoring nsid %d because of duplicate IDs\n", 3504 info->nsid); 3505 return ret; 3506 } 3507 3508 dev_err(ctrl->device, 3509 "clearing duplicate IDs for nsid %d\n", info->nsid); 3510 dev_err(ctrl->device, 3511 "use of /dev/disk/by-id/ may cause data corruption\n"); 3512 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid)); 3513 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid)); 3514 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64)); 3515 ctrl->quirks |= NVME_QUIRK_BOGUS_NID; 3516 } 3517 3518 mutex_lock(&ctrl->subsys->lock); 3519 head = nvme_find_ns_head(ctrl, info->nsid); 3520 if (!head) { 3521 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids); 3522 if (ret) { 3523 dev_err(ctrl->device, 3524 "duplicate IDs in subsystem for nsid %d\n", 3525 info->nsid); 3526 goto out_unlock; 3527 } 3528 head = nvme_alloc_ns_head(ctrl, info); 3529 if (IS_ERR(head)) { 3530 ret = PTR_ERR(head); 3531 goto out_unlock; 3532 } 3533 } else { 3534 ret = -EINVAL; 3535 if (!info->is_shared || !head->shared) { 3536 dev_err(ctrl->device, 3537 "Duplicate unshared namespace %d\n", 3538 info->nsid); 3539 goto out_put_ns_head; 3540 } 3541 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) { 3542 dev_err(ctrl->device, 3543 "IDs don't match for shared namespace %d\n", 3544 info->nsid); 3545 goto out_put_ns_head; 3546 } 3547 3548 if (!multipath) { 3549 dev_warn(ctrl->device, 3550 "Found shared namespace %d, but multipathing not supported.\n", 3551 info->nsid); 3552 dev_warn_once(ctrl->device, 3553 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0\n."); 3554 } 3555 } 3556 3557 list_add_tail_rcu(&ns->siblings, &head->list); 3558 ns->head = head; 3559 mutex_unlock(&ctrl->subsys->lock); 3560 return 0; 3561 3562 out_put_ns_head: 3563 nvme_put_ns_head(head); 3564 out_unlock: 3565 mutex_unlock(&ctrl->subsys->lock); 3566 return ret; 3567 } 3568 3569 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3570 { 3571 struct nvme_ns *ns, *ret = NULL; 3572 3573 down_read(&ctrl->namespaces_rwsem); 3574 list_for_each_entry(ns, &ctrl->namespaces, list) { 3575 if (ns->head->ns_id == nsid) { 3576 if (!nvme_get_ns(ns)) 3577 continue; 3578 ret = ns; 3579 break; 3580 } 3581 if (ns->head->ns_id > nsid) 3582 break; 3583 } 3584 up_read(&ctrl->namespaces_rwsem); 3585 return ret; 3586 } 3587 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU); 3588 3589 /* 3590 * Add the namespace to the controller list while keeping the list ordered. 3591 */ 3592 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns) 3593 { 3594 struct nvme_ns *tmp; 3595 3596 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) { 3597 if (tmp->head->ns_id < ns->head->ns_id) { 3598 list_add(&ns->list, &tmp->list); 3599 return; 3600 } 3601 } 3602 list_add(&ns->list, &ns->ctrl->namespaces); 3603 } 3604 3605 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info) 3606 { 3607 struct nvme_ns *ns; 3608 struct gendisk *disk; 3609 int node = ctrl->numa_node; 3610 3611 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 3612 if (!ns) 3613 return; 3614 3615 disk = blk_mq_alloc_disk(ctrl->tagset, ns); 3616 if (IS_ERR(disk)) 3617 goto out_free_ns; 3618 disk->fops = &nvme_bdev_ops; 3619 disk->private_data = ns; 3620 3621 ns->disk = disk; 3622 ns->queue = disk->queue; 3623 3624 if (ctrl->opts && ctrl->opts->data_digest) 3625 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue); 3626 3627 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue); 3628 if (ctrl->ops->supports_pci_p2pdma && 3629 ctrl->ops->supports_pci_p2pdma(ctrl)) 3630 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue); 3631 3632 ns->ctrl = ctrl; 3633 kref_init(&ns->kref); 3634 3635 if (nvme_init_ns_head(ns, info)) 3636 goto out_cleanup_disk; 3637 3638 /* 3639 * If multipathing is enabled, the device name for all disks and not 3640 * just those that represent shared namespaces needs to be based on the 3641 * subsystem instance. Using the controller instance for private 3642 * namespaces could lead to naming collisions between shared and private 3643 * namespaces if they don't use a common numbering scheme. 3644 * 3645 * If multipathing is not enabled, disk names must use the controller 3646 * instance as shared namespaces will show up as multiple block 3647 * devices. 3648 */ 3649 if (nvme_ns_head_multipath(ns->head)) { 3650 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance, 3651 ctrl->instance, ns->head->instance); 3652 disk->flags |= GENHD_FL_HIDDEN; 3653 } else if (multipath) { 3654 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance, 3655 ns->head->instance); 3656 } else { 3657 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, 3658 ns->head->instance); 3659 } 3660 3661 if (nvme_update_ns_info(ns, info)) 3662 goto out_unlink_ns; 3663 3664 down_write(&ctrl->namespaces_rwsem); 3665 /* 3666 * Ensure that no namespaces are added to the ctrl list after the queues 3667 * are frozen, thereby avoiding a deadlock between scan and reset. 3668 */ 3669 if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) { 3670 up_write(&ctrl->namespaces_rwsem); 3671 goto out_unlink_ns; 3672 } 3673 nvme_ns_add_to_ctrl_list(ns); 3674 up_write(&ctrl->namespaces_rwsem); 3675 nvme_get_ctrl(ctrl); 3676 3677 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups)) 3678 goto out_cleanup_ns_from_list; 3679 3680 if (!nvme_ns_head_multipath(ns->head)) 3681 nvme_add_ns_cdev(ns); 3682 3683 nvme_mpath_add_disk(ns, info->anagrpid); 3684 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name); 3685 3686 return; 3687 3688 out_cleanup_ns_from_list: 3689 nvme_put_ctrl(ctrl); 3690 down_write(&ctrl->namespaces_rwsem); 3691 list_del_init(&ns->list); 3692 up_write(&ctrl->namespaces_rwsem); 3693 out_unlink_ns: 3694 mutex_lock(&ctrl->subsys->lock); 3695 list_del_rcu(&ns->siblings); 3696 if (list_empty(&ns->head->list)) 3697 list_del_init(&ns->head->entry); 3698 mutex_unlock(&ctrl->subsys->lock); 3699 nvme_put_ns_head(ns->head); 3700 out_cleanup_disk: 3701 put_disk(disk); 3702 out_free_ns: 3703 kfree(ns); 3704 } 3705 3706 static void nvme_ns_remove(struct nvme_ns *ns) 3707 { 3708 bool last_path = false; 3709 3710 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 3711 return; 3712 3713 clear_bit(NVME_NS_READY, &ns->flags); 3714 set_capacity(ns->disk, 0); 3715 nvme_fault_inject_fini(&ns->fault_inject); 3716 3717 /* 3718 * Ensure that !NVME_NS_READY is seen by other threads to prevent 3719 * this ns going back into current_path. 3720 */ 3721 synchronize_srcu(&ns->head->srcu); 3722 3723 /* wait for concurrent submissions */ 3724 if (nvme_mpath_clear_current_path(ns)) 3725 synchronize_srcu(&ns->head->srcu); 3726 3727 mutex_lock(&ns->ctrl->subsys->lock); 3728 list_del_rcu(&ns->siblings); 3729 if (list_empty(&ns->head->list)) { 3730 list_del_init(&ns->head->entry); 3731 last_path = true; 3732 } 3733 mutex_unlock(&ns->ctrl->subsys->lock); 3734 3735 /* guarantee not available in head->list */ 3736 synchronize_srcu(&ns->head->srcu); 3737 3738 if (!nvme_ns_head_multipath(ns->head)) 3739 nvme_cdev_del(&ns->cdev, &ns->cdev_device); 3740 del_gendisk(ns->disk); 3741 3742 down_write(&ns->ctrl->namespaces_rwsem); 3743 list_del_init(&ns->list); 3744 up_write(&ns->ctrl->namespaces_rwsem); 3745 3746 if (last_path) 3747 nvme_mpath_shutdown_disk(ns->head); 3748 nvme_put_ns(ns); 3749 } 3750 3751 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid) 3752 { 3753 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid); 3754 3755 if (ns) { 3756 nvme_ns_remove(ns); 3757 nvme_put_ns(ns); 3758 } 3759 } 3760 3761 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info) 3762 { 3763 int ret = NVME_SC_INVALID_NS | NVME_SC_DNR; 3764 3765 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) { 3766 dev_err(ns->ctrl->device, 3767 "identifiers changed for nsid %d\n", ns->head->ns_id); 3768 goto out; 3769 } 3770 3771 ret = nvme_update_ns_info(ns, info); 3772 out: 3773 /* 3774 * Only remove the namespace if we got a fatal error back from the 3775 * device, otherwise ignore the error and just move on. 3776 * 3777 * TODO: we should probably schedule a delayed retry here. 3778 */ 3779 if (ret > 0 && (ret & NVME_SC_DNR)) 3780 nvme_ns_remove(ns); 3781 } 3782 3783 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3784 { 3785 struct nvme_ns_info info = { .nsid = nsid }; 3786 struct nvme_ns *ns; 3787 int ret; 3788 3789 if (nvme_identify_ns_descs(ctrl, &info)) 3790 return; 3791 3792 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) { 3793 dev_warn(ctrl->device, 3794 "command set not reported for nsid: %d\n", nsid); 3795 return; 3796 } 3797 3798 /* 3799 * If available try to use the Command Set Idependent Identify Namespace 3800 * data structure to find all the generic information that is needed to 3801 * set up a namespace. If not fall back to the legacy version. 3802 */ 3803 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) || 3804 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS)) 3805 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info); 3806 else 3807 ret = nvme_ns_info_from_identify(ctrl, &info); 3808 3809 if (info.is_removed) 3810 nvme_ns_remove_by_nsid(ctrl, nsid); 3811 3812 /* 3813 * Ignore the namespace if it is not ready. We will get an AEN once it 3814 * becomes ready and restart the scan. 3815 */ 3816 if (ret || !info.is_ready) 3817 return; 3818 3819 ns = nvme_find_get_ns(ctrl, nsid); 3820 if (ns) { 3821 nvme_validate_ns(ns, &info); 3822 nvme_put_ns(ns); 3823 } else { 3824 nvme_alloc_ns(ctrl, &info); 3825 } 3826 } 3827 3828 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 3829 unsigned nsid) 3830 { 3831 struct nvme_ns *ns, *next; 3832 LIST_HEAD(rm_list); 3833 3834 down_write(&ctrl->namespaces_rwsem); 3835 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 3836 if (ns->head->ns_id > nsid) 3837 list_move_tail(&ns->list, &rm_list); 3838 } 3839 up_write(&ctrl->namespaces_rwsem); 3840 3841 list_for_each_entry_safe(ns, next, &rm_list, list) 3842 nvme_ns_remove(ns); 3843 3844 } 3845 3846 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl) 3847 { 3848 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32); 3849 __le32 *ns_list; 3850 u32 prev = 0; 3851 int ret = 0, i; 3852 3853 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 3854 if (!ns_list) 3855 return -ENOMEM; 3856 3857 for (;;) { 3858 struct nvme_command cmd = { 3859 .identify.opcode = nvme_admin_identify, 3860 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST, 3861 .identify.nsid = cpu_to_le32(prev), 3862 }; 3863 3864 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list, 3865 NVME_IDENTIFY_DATA_SIZE); 3866 if (ret) { 3867 dev_warn(ctrl->device, 3868 "Identify NS List failed (status=0x%x)\n", ret); 3869 goto free; 3870 } 3871 3872 for (i = 0; i < nr_entries; i++) { 3873 u32 nsid = le32_to_cpu(ns_list[i]); 3874 3875 if (!nsid) /* end of the list? */ 3876 goto out; 3877 nvme_scan_ns(ctrl, nsid); 3878 while (++prev < nsid) 3879 nvme_ns_remove_by_nsid(ctrl, prev); 3880 } 3881 } 3882 out: 3883 nvme_remove_invalid_namespaces(ctrl, prev); 3884 free: 3885 kfree(ns_list); 3886 return ret; 3887 } 3888 3889 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl) 3890 { 3891 struct nvme_id_ctrl *id; 3892 u32 nn, i; 3893 3894 if (nvme_identify_ctrl(ctrl, &id)) 3895 return; 3896 nn = le32_to_cpu(id->nn); 3897 kfree(id); 3898 3899 for (i = 1; i <= nn; i++) 3900 nvme_scan_ns(ctrl, i); 3901 3902 nvme_remove_invalid_namespaces(ctrl, nn); 3903 } 3904 3905 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 3906 { 3907 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 3908 __le32 *log; 3909 int error; 3910 3911 log = kzalloc(log_size, GFP_KERNEL); 3912 if (!log) 3913 return; 3914 3915 /* 3916 * We need to read the log to clear the AEN, but we don't want to rely 3917 * on it for the changed namespace information as userspace could have 3918 * raced with us in reading the log page, which could cause us to miss 3919 * updates. 3920 */ 3921 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, 3922 NVME_CSI_NVM, log, log_size, 0); 3923 if (error) 3924 dev_warn(ctrl->device, 3925 "reading changed ns log failed: %d\n", error); 3926 3927 kfree(log); 3928 } 3929 3930 static void nvme_scan_work(struct work_struct *work) 3931 { 3932 struct nvme_ctrl *ctrl = 3933 container_of(work, struct nvme_ctrl, scan_work); 3934 int ret; 3935 3936 /* No tagset on a live ctrl means IO queues could not created */ 3937 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset) 3938 return; 3939 3940 /* 3941 * Identify controller limits can change at controller reset due to 3942 * new firmware download, even though it is not common we cannot ignore 3943 * such scenario. Controller's non-mdts limits are reported in the unit 3944 * of logical blocks that is dependent on the format of attached 3945 * namespace. Hence re-read the limits at the time of ns allocation. 3946 */ 3947 ret = nvme_init_non_mdts_limits(ctrl); 3948 if (ret < 0) { 3949 dev_warn(ctrl->device, 3950 "reading non-mdts-limits failed: %d\n", ret); 3951 return; 3952 } 3953 3954 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 3955 dev_info(ctrl->device, "rescanning namespaces.\n"); 3956 nvme_clear_changed_ns_log(ctrl); 3957 } 3958 3959 mutex_lock(&ctrl->scan_lock); 3960 if (nvme_ctrl_limited_cns(ctrl)) { 3961 nvme_scan_ns_sequential(ctrl); 3962 } else { 3963 /* 3964 * Fall back to sequential scan if DNR is set to handle broken 3965 * devices which should support Identify NS List (as per the VS 3966 * they report) but don't actually support it. 3967 */ 3968 ret = nvme_scan_ns_list(ctrl); 3969 if (ret > 0 && ret & NVME_SC_DNR) 3970 nvme_scan_ns_sequential(ctrl); 3971 } 3972 mutex_unlock(&ctrl->scan_lock); 3973 } 3974 3975 /* 3976 * This function iterates the namespace list unlocked to allow recovery from 3977 * controller failure. It is up to the caller to ensure the namespace list is 3978 * not modified by scan work while this function is executing. 3979 */ 3980 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 3981 { 3982 struct nvme_ns *ns, *next; 3983 LIST_HEAD(ns_list); 3984 3985 /* 3986 * make sure to requeue I/O to all namespaces as these 3987 * might result from the scan itself and must complete 3988 * for the scan_work to make progress 3989 */ 3990 nvme_mpath_clear_ctrl_paths(ctrl); 3991 3992 /* 3993 * Unquiesce io queues so any pending IO won't hang, especially 3994 * those submitted from scan work 3995 */ 3996 nvme_unquiesce_io_queues(ctrl); 3997 3998 /* prevent racing with ns scanning */ 3999 flush_work(&ctrl->scan_work); 4000 4001 /* 4002 * The dead states indicates the controller was not gracefully 4003 * disconnected. In that case, we won't be able to flush any data while 4004 * removing the namespaces' disks; fail all the queues now to avoid 4005 * potentially having to clean up the failed sync later. 4006 */ 4007 if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD) 4008 nvme_mark_namespaces_dead(ctrl); 4009 4010 /* this is a no-op when called from the controller reset handler */ 4011 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO); 4012 4013 down_write(&ctrl->namespaces_rwsem); 4014 list_splice_init(&ctrl->namespaces, &ns_list); 4015 up_write(&ctrl->namespaces_rwsem); 4016 4017 list_for_each_entry_safe(ns, next, &ns_list, list) 4018 nvme_ns_remove(ns); 4019 } 4020 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 4021 4022 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env) 4023 { 4024 const struct nvme_ctrl *ctrl = 4025 container_of(dev, struct nvme_ctrl, ctrl_device); 4026 struct nvmf_ctrl_options *opts = ctrl->opts; 4027 int ret; 4028 4029 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name); 4030 if (ret) 4031 return ret; 4032 4033 if (opts) { 4034 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr); 4035 if (ret) 4036 return ret; 4037 4038 ret = add_uevent_var(env, "NVME_TRSVCID=%s", 4039 opts->trsvcid ?: "none"); 4040 if (ret) 4041 return ret; 4042 4043 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s", 4044 opts->host_traddr ?: "none"); 4045 if (ret) 4046 return ret; 4047 4048 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s", 4049 opts->host_iface ?: "none"); 4050 } 4051 return ret; 4052 } 4053 4054 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata) 4055 { 4056 char *envp[2] = { envdata, NULL }; 4057 4058 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4059 } 4060 4061 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 4062 { 4063 char *envp[2] = { NULL, NULL }; 4064 u32 aen_result = ctrl->aen_result; 4065 4066 ctrl->aen_result = 0; 4067 if (!aen_result) 4068 return; 4069 4070 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 4071 if (!envp[0]) 4072 return; 4073 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4074 kfree(envp[0]); 4075 } 4076 4077 static void nvme_async_event_work(struct work_struct *work) 4078 { 4079 struct nvme_ctrl *ctrl = 4080 container_of(work, struct nvme_ctrl, async_event_work); 4081 4082 nvme_aen_uevent(ctrl); 4083 4084 /* 4085 * The transport drivers must guarantee AER submission here is safe by 4086 * flushing ctrl async_event_work after changing the controller state 4087 * from LIVE and before freeing the admin queue. 4088 */ 4089 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 4090 ctrl->ops->submit_async_event(ctrl); 4091 } 4092 4093 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 4094 { 4095 4096 u32 csts; 4097 4098 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 4099 return false; 4100 4101 if (csts == ~0) 4102 return false; 4103 4104 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 4105 } 4106 4107 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 4108 { 4109 struct nvme_fw_slot_info_log *log; 4110 4111 log = kmalloc(sizeof(*log), GFP_KERNEL); 4112 if (!log) 4113 return; 4114 4115 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM, 4116 log, sizeof(*log), 0)) { 4117 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 4118 goto out_free_log; 4119 } 4120 4121 if (log->afi & 0x70 || !(log->afi & 0x7)) { 4122 dev_info(ctrl->device, 4123 "Firmware is activated after next Controller Level Reset\n"); 4124 goto out_free_log; 4125 } 4126 4127 memcpy(ctrl->subsys->firmware_rev, &log->frs[(log->afi & 0x7) - 1], 4128 sizeof(ctrl->subsys->firmware_rev)); 4129 4130 out_free_log: 4131 kfree(log); 4132 } 4133 4134 static void nvme_fw_act_work(struct work_struct *work) 4135 { 4136 struct nvme_ctrl *ctrl = container_of(work, 4137 struct nvme_ctrl, fw_act_work); 4138 unsigned long fw_act_timeout; 4139 4140 if (ctrl->mtfa) 4141 fw_act_timeout = jiffies + 4142 msecs_to_jiffies(ctrl->mtfa * 100); 4143 else 4144 fw_act_timeout = jiffies + 4145 msecs_to_jiffies(admin_timeout * 1000); 4146 4147 nvme_quiesce_io_queues(ctrl); 4148 while (nvme_ctrl_pp_status(ctrl)) { 4149 if (time_after(jiffies, fw_act_timeout)) { 4150 dev_warn(ctrl->device, 4151 "Fw activation timeout, reset controller\n"); 4152 nvme_try_sched_reset(ctrl); 4153 return; 4154 } 4155 msleep(100); 4156 } 4157 4158 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE)) 4159 return; 4160 4161 nvme_unquiesce_io_queues(ctrl); 4162 /* read FW slot information to clear the AER */ 4163 nvme_get_fw_slot_info(ctrl); 4164 4165 queue_work(nvme_wq, &ctrl->async_event_work); 4166 } 4167 4168 static u32 nvme_aer_type(u32 result) 4169 { 4170 return result & 0x7; 4171 } 4172 4173 static u32 nvme_aer_subtype(u32 result) 4174 { 4175 return (result & 0xff00) >> 8; 4176 } 4177 4178 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 4179 { 4180 u32 aer_notice_type = nvme_aer_subtype(result); 4181 bool requeue = true; 4182 4183 switch (aer_notice_type) { 4184 case NVME_AER_NOTICE_NS_CHANGED: 4185 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 4186 nvme_queue_scan(ctrl); 4187 break; 4188 case NVME_AER_NOTICE_FW_ACT_STARTING: 4189 /* 4190 * We are (ab)using the RESETTING state to prevent subsequent 4191 * recovery actions from interfering with the controller's 4192 * firmware activation. 4193 */ 4194 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) { 4195 nvme_auth_stop(ctrl); 4196 requeue = false; 4197 queue_work(nvme_wq, &ctrl->fw_act_work); 4198 } 4199 break; 4200 #ifdef CONFIG_NVME_MULTIPATH 4201 case NVME_AER_NOTICE_ANA: 4202 if (!ctrl->ana_log_buf) 4203 break; 4204 queue_work(nvme_wq, &ctrl->ana_work); 4205 break; 4206 #endif 4207 case NVME_AER_NOTICE_DISC_CHANGED: 4208 ctrl->aen_result = result; 4209 break; 4210 default: 4211 dev_warn(ctrl->device, "async event result %08x\n", result); 4212 } 4213 return requeue; 4214 } 4215 4216 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl) 4217 { 4218 dev_warn(ctrl->device, "resetting controller due to AER\n"); 4219 nvme_reset_ctrl(ctrl); 4220 } 4221 4222 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 4223 volatile union nvme_result *res) 4224 { 4225 u32 result = le32_to_cpu(res->u32); 4226 u32 aer_type = nvme_aer_type(result); 4227 u32 aer_subtype = nvme_aer_subtype(result); 4228 bool requeue = true; 4229 4230 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 4231 return; 4232 4233 trace_nvme_async_event(ctrl, result); 4234 switch (aer_type) { 4235 case NVME_AER_NOTICE: 4236 requeue = nvme_handle_aen_notice(ctrl, result); 4237 break; 4238 case NVME_AER_ERROR: 4239 /* 4240 * For a persistent internal error, don't run async_event_work 4241 * to submit a new AER. The controller reset will do it. 4242 */ 4243 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) { 4244 nvme_handle_aer_persistent_error(ctrl); 4245 return; 4246 } 4247 fallthrough; 4248 case NVME_AER_SMART: 4249 case NVME_AER_CSS: 4250 case NVME_AER_VS: 4251 ctrl->aen_result = result; 4252 break; 4253 default: 4254 break; 4255 } 4256 4257 if (requeue) 4258 queue_work(nvme_wq, &ctrl->async_event_work); 4259 } 4260 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 4261 4262 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4263 const struct blk_mq_ops *ops, unsigned int cmd_size) 4264 { 4265 int ret; 4266 4267 memset(set, 0, sizeof(*set)); 4268 set->ops = ops; 4269 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 4270 if (ctrl->ops->flags & NVME_F_FABRICS) 4271 set->reserved_tags = NVMF_RESERVED_TAGS; 4272 set->numa_node = ctrl->numa_node; 4273 set->flags = BLK_MQ_F_NO_SCHED; 4274 if (ctrl->ops->flags & NVME_F_BLOCKING) 4275 set->flags |= BLK_MQ_F_BLOCKING; 4276 set->cmd_size = cmd_size; 4277 set->driver_data = ctrl; 4278 set->nr_hw_queues = 1; 4279 set->timeout = NVME_ADMIN_TIMEOUT; 4280 ret = blk_mq_alloc_tag_set(set); 4281 if (ret) 4282 return ret; 4283 4284 ctrl->admin_q = blk_mq_init_queue(set); 4285 if (IS_ERR(ctrl->admin_q)) { 4286 ret = PTR_ERR(ctrl->admin_q); 4287 goto out_free_tagset; 4288 } 4289 4290 if (ctrl->ops->flags & NVME_F_FABRICS) { 4291 ctrl->fabrics_q = blk_mq_init_queue(set); 4292 if (IS_ERR(ctrl->fabrics_q)) { 4293 ret = PTR_ERR(ctrl->fabrics_q); 4294 goto out_cleanup_admin_q; 4295 } 4296 } 4297 4298 ctrl->admin_tagset = set; 4299 return 0; 4300 4301 out_cleanup_admin_q: 4302 blk_mq_destroy_queue(ctrl->admin_q); 4303 blk_put_queue(ctrl->admin_q); 4304 out_free_tagset: 4305 blk_mq_free_tag_set(set); 4306 ctrl->admin_q = NULL; 4307 ctrl->fabrics_q = NULL; 4308 return ret; 4309 } 4310 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set); 4311 4312 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl) 4313 { 4314 blk_mq_destroy_queue(ctrl->admin_q); 4315 blk_put_queue(ctrl->admin_q); 4316 if (ctrl->ops->flags & NVME_F_FABRICS) { 4317 blk_mq_destroy_queue(ctrl->fabrics_q); 4318 blk_put_queue(ctrl->fabrics_q); 4319 } 4320 blk_mq_free_tag_set(ctrl->admin_tagset); 4321 } 4322 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set); 4323 4324 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4325 const struct blk_mq_ops *ops, unsigned int nr_maps, 4326 unsigned int cmd_size) 4327 { 4328 int ret; 4329 4330 memset(set, 0, sizeof(*set)); 4331 set->ops = ops; 4332 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1); 4333 /* 4334 * Some Apple controllers requires tags to be unique across admin and 4335 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue. 4336 */ 4337 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS) 4338 set->reserved_tags = NVME_AQ_DEPTH; 4339 else if (ctrl->ops->flags & NVME_F_FABRICS) 4340 set->reserved_tags = NVMF_RESERVED_TAGS; 4341 set->numa_node = ctrl->numa_node; 4342 set->flags = BLK_MQ_F_SHOULD_MERGE; 4343 if (ctrl->ops->flags & NVME_F_BLOCKING) 4344 set->flags |= BLK_MQ_F_BLOCKING; 4345 set->cmd_size = cmd_size, 4346 set->driver_data = ctrl; 4347 set->nr_hw_queues = ctrl->queue_count - 1; 4348 set->timeout = NVME_IO_TIMEOUT; 4349 set->nr_maps = nr_maps; 4350 ret = blk_mq_alloc_tag_set(set); 4351 if (ret) 4352 return ret; 4353 4354 if (ctrl->ops->flags & NVME_F_FABRICS) { 4355 ctrl->connect_q = blk_mq_init_queue(set); 4356 if (IS_ERR(ctrl->connect_q)) { 4357 ret = PTR_ERR(ctrl->connect_q); 4358 goto out_free_tag_set; 4359 } 4360 blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE, 4361 ctrl->connect_q); 4362 } 4363 4364 ctrl->tagset = set; 4365 return 0; 4366 4367 out_free_tag_set: 4368 blk_mq_free_tag_set(set); 4369 ctrl->connect_q = NULL; 4370 return ret; 4371 } 4372 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set); 4373 4374 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl) 4375 { 4376 if (ctrl->ops->flags & NVME_F_FABRICS) { 4377 blk_mq_destroy_queue(ctrl->connect_q); 4378 blk_put_queue(ctrl->connect_q); 4379 } 4380 blk_mq_free_tag_set(ctrl->tagset); 4381 } 4382 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set); 4383 4384 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 4385 { 4386 nvme_mpath_stop(ctrl); 4387 nvme_auth_stop(ctrl); 4388 nvme_stop_keep_alive(ctrl); 4389 nvme_stop_failfast_work(ctrl); 4390 flush_work(&ctrl->async_event_work); 4391 cancel_work_sync(&ctrl->fw_act_work); 4392 if (ctrl->ops->stop_ctrl) 4393 ctrl->ops->stop_ctrl(ctrl); 4394 } 4395 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 4396 4397 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 4398 { 4399 nvme_enable_aen(ctrl); 4400 4401 /* 4402 * persistent discovery controllers need to send indication to userspace 4403 * to re-read the discovery log page to learn about possible changes 4404 * that were missed. We identify persistent discovery controllers by 4405 * checking that they started once before, hence are reconnecting back. 4406 */ 4407 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) && 4408 nvme_discovery_ctrl(ctrl)) 4409 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover"); 4410 4411 if (ctrl->queue_count > 1) { 4412 nvme_queue_scan(ctrl); 4413 nvme_unquiesce_io_queues(ctrl); 4414 nvme_mpath_update(ctrl); 4415 } 4416 4417 nvme_change_uevent(ctrl, "NVME_EVENT=connected"); 4418 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags); 4419 } 4420 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 4421 4422 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 4423 { 4424 nvme_hwmon_exit(ctrl); 4425 nvme_fault_inject_fini(&ctrl->fault_inject); 4426 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4427 cdev_device_del(&ctrl->cdev, ctrl->device); 4428 nvme_put_ctrl(ctrl); 4429 } 4430 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 4431 4432 static void nvme_free_cels(struct nvme_ctrl *ctrl) 4433 { 4434 struct nvme_effects_log *cel; 4435 unsigned long i; 4436 4437 xa_for_each(&ctrl->cels, i, cel) { 4438 xa_erase(&ctrl->cels, i); 4439 kfree(cel); 4440 } 4441 4442 xa_destroy(&ctrl->cels); 4443 } 4444 4445 static void nvme_free_ctrl(struct device *dev) 4446 { 4447 struct nvme_ctrl *ctrl = 4448 container_of(dev, struct nvme_ctrl, ctrl_device); 4449 struct nvme_subsystem *subsys = ctrl->subsys; 4450 4451 if (!subsys || ctrl->instance != subsys->instance) 4452 ida_free(&nvme_instance_ida, ctrl->instance); 4453 key_put(ctrl->tls_key); 4454 nvme_free_cels(ctrl); 4455 nvme_mpath_uninit(ctrl); 4456 nvme_auth_stop(ctrl); 4457 nvme_auth_free(ctrl); 4458 __free_page(ctrl->discard_page); 4459 free_opal_dev(ctrl->opal_dev); 4460 4461 if (subsys) { 4462 mutex_lock(&nvme_subsystems_lock); 4463 list_del(&ctrl->subsys_entry); 4464 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 4465 mutex_unlock(&nvme_subsystems_lock); 4466 } 4467 4468 ctrl->ops->free_ctrl(ctrl); 4469 4470 if (subsys) 4471 nvme_put_subsystem(subsys); 4472 } 4473 4474 /* 4475 * Initialize a NVMe controller structures. This needs to be called during 4476 * earliest initialization so that we have the initialized structured around 4477 * during probing. 4478 */ 4479 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 4480 const struct nvme_ctrl_ops *ops, unsigned long quirks) 4481 { 4482 int ret; 4483 4484 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW); 4485 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 4486 spin_lock_init(&ctrl->lock); 4487 mutex_init(&ctrl->scan_lock); 4488 INIT_LIST_HEAD(&ctrl->namespaces); 4489 xa_init(&ctrl->cels); 4490 init_rwsem(&ctrl->namespaces_rwsem); 4491 ctrl->dev = dev; 4492 ctrl->ops = ops; 4493 ctrl->quirks = quirks; 4494 ctrl->numa_node = NUMA_NO_NODE; 4495 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 4496 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 4497 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 4498 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 4499 init_waitqueue_head(&ctrl->state_wq); 4500 4501 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 4502 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work); 4503 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 4504 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 4505 ctrl->ka_last_check_time = jiffies; 4506 4507 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 4508 PAGE_SIZE); 4509 ctrl->discard_page = alloc_page(GFP_KERNEL); 4510 if (!ctrl->discard_page) { 4511 ret = -ENOMEM; 4512 goto out; 4513 } 4514 4515 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL); 4516 if (ret < 0) 4517 goto out; 4518 ctrl->instance = ret; 4519 4520 device_initialize(&ctrl->ctrl_device); 4521 ctrl->device = &ctrl->ctrl_device; 4522 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt), 4523 ctrl->instance); 4524 ctrl->device->class = nvme_class; 4525 ctrl->device->parent = ctrl->dev; 4526 if (ops->dev_attr_groups) 4527 ctrl->device->groups = ops->dev_attr_groups; 4528 else 4529 ctrl->device->groups = nvme_dev_attr_groups; 4530 ctrl->device->release = nvme_free_ctrl; 4531 dev_set_drvdata(ctrl->device, ctrl); 4532 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 4533 if (ret) 4534 goto out_release_instance; 4535 4536 nvme_get_ctrl(ctrl); 4537 cdev_init(&ctrl->cdev, &nvme_dev_fops); 4538 ctrl->cdev.owner = ops->module; 4539 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 4540 if (ret) 4541 goto out_free_name; 4542 4543 /* 4544 * Initialize latency tolerance controls. The sysfs files won't 4545 * be visible to userspace unless the device actually supports APST. 4546 */ 4547 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 4548 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 4549 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 4550 4551 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device)); 4552 nvme_mpath_init_ctrl(ctrl); 4553 ret = nvme_auth_init_ctrl(ctrl); 4554 if (ret) 4555 goto out_free_cdev; 4556 4557 return 0; 4558 out_free_cdev: 4559 nvme_fault_inject_fini(&ctrl->fault_inject); 4560 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4561 cdev_device_del(&ctrl->cdev, ctrl->device); 4562 out_free_name: 4563 nvme_put_ctrl(ctrl); 4564 kfree_const(ctrl->device->kobj.name); 4565 out_release_instance: 4566 ida_free(&nvme_instance_ida, ctrl->instance); 4567 out: 4568 if (ctrl->discard_page) 4569 __free_page(ctrl->discard_page); 4570 return ret; 4571 } 4572 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 4573 4574 /* let I/O to all namespaces fail in preparation for surprise removal */ 4575 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl) 4576 { 4577 struct nvme_ns *ns; 4578 4579 down_read(&ctrl->namespaces_rwsem); 4580 list_for_each_entry(ns, &ctrl->namespaces, list) 4581 blk_mark_disk_dead(ns->disk); 4582 up_read(&ctrl->namespaces_rwsem); 4583 } 4584 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead); 4585 4586 void nvme_unfreeze(struct nvme_ctrl *ctrl) 4587 { 4588 struct nvme_ns *ns; 4589 4590 down_read(&ctrl->namespaces_rwsem); 4591 list_for_each_entry(ns, &ctrl->namespaces, list) 4592 blk_mq_unfreeze_queue(ns->queue); 4593 up_read(&ctrl->namespaces_rwsem); 4594 clear_bit(NVME_CTRL_FROZEN, &ctrl->flags); 4595 } 4596 EXPORT_SYMBOL_GPL(nvme_unfreeze); 4597 4598 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 4599 { 4600 struct nvme_ns *ns; 4601 4602 down_read(&ctrl->namespaces_rwsem); 4603 list_for_each_entry(ns, &ctrl->namespaces, list) { 4604 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 4605 if (timeout <= 0) 4606 break; 4607 } 4608 up_read(&ctrl->namespaces_rwsem); 4609 return timeout; 4610 } 4611 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 4612 4613 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 4614 { 4615 struct nvme_ns *ns; 4616 4617 down_read(&ctrl->namespaces_rwsem); 4618 list_for_each_entry(ns, &ctrl->namespaces, list) 4619 blk_mq_freeze_queue_wait(ns->queue); 4620 up_read(&ctrl->namespaces_rwsem); 4621 } 4622 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 4623 4624 void nvme_start_freeze(struct nvme_ctrl *ctrl) 4625 { 4626 struct nvme_ns *ns; 4627 4628 set_bit(NVME_CTRL_FROZEN, &ctrl->flags); 4629 down_read(&ctrl->namespaces_rwsem); 4630 list_for_each_entry(ns, &ctrl->namespaces, list) 4631 blk_freeze_queue_start(ns->queue); 4632 up_read(&ctrl->namespaces_rwsem); 4633 } 4634 EXPORT_SYMBOL_GPL(nvme_start_freeze); 4635 4636 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl) 4637 { 4638 if (!ctrl->tagset) 4639 return; 4640 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4641 blk_mq_quiesce_tagset(ctrl->tagset); 4642 else 4643 blk_mq_wait_quiesce_done(ctrl->tagset); 4644 } 4645 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues); 4646 4647 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl) 4648 { 4649 if (!ctrl->tagset) 4650 return; 4651 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4652 blk_mq_unquiesce_tagset(ctrl->tagset); 4653 } 4654 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues); 4655 4656 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl) 4657 { 4658 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4659 blk_mq_quiesce_queue(ctrl->admin_q); 4660 else 4661 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set); 4662 } 4663 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue); 4664 4665 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl) 4666 { 4667 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4668 blk_mq_unquiesce_queue(ctrl->admin_q); 4669 } 4670 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue); 4671 4672 void nvme_sync_io_queues(struct nvme_ctrl *ctrl) 4673 { 4674 struct nvme_ns *ns; 4675 4676 down_read(&ctrl->namespaces_rwsem); 4677 list_for_each_entry(ns, &ctrl->namespaces, list) 4678 blk_sync_queue(ns->queue); 4679 up_read(&ctrl->namespaces_rwsem); 4680 } 4681 EXPORT_SYMBOL_GPL(nvme_sync_io_queues); 4682 4683 void nvme_sync_queues(struct nvme_ctrl *ctrl) 4684 { 4685 nvme_sync_io_queues(ctrl); 4686 if (ctrl->admin_q) 4687 blk_sync_queue(ctrl->admin_q); 4688 } 4689 EXPORT_SYMBOL_GPL(nvme_sync_queues); 4690 4691 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file) 4692 { 4693 if (file->f_op != &nvme_dev_fops) 4694 return NULL; 4695 return file->private_data; 4696 } 4697 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU); 4698 4699 /* 4700 * Check we didn't inadvertently grow the command structure sizes: 4701 */ 4702 static inline void _nvme_check_size(void) 4703 { 4704 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64); 4705 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 4706 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64); 4707 BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 4708 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64); 4709 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 4710 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64); 4711 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64); 4712 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 4713 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64); 4714 BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 4715 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE); 4716 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE); 4717 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) != 4718 NVME_IDENTIFY_DATA_SIZE); 4719 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE); 4720 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE); 4721 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE); 4722 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE); 4723 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 4724 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 4725 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 4726 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64); 4727 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512); 4728 } 4729 4730 4731 static int __init nvme_core_init(void) 4732 { 4733 int result = -ENOMEM; 4734 4735 _nvme_check_size(); 4736 4737 nvme_wq = alloc_workqueue("nvme-wq", 4738 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4739 if (!nvme_wq) 4740 goto out; 4741 4742 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", 4743 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4744 if (!nvme_reset_wq) 4745 goto destroy_wq; 4746 4747 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", 4748 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4749 if (!nvme_delete_wq) 4750 goto destroy_reset_wq; 4751 4752 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0, 4753 NVME_MINORS, "nvme"); 4754 if (result < 0) 4755 goto destroy_delete_wq; 4756 4757 nvme_class = class_create("nvme"); 4758 if (IS_ERR(nvme_class)) { 4759 result = PTR_ERR(nvme_class); 4760 goto unregister_chrdev; 4761 } 4762 nvme_class->dev_uevent = nvme_class_uevent; 4763 4764 nvme_subsys_class = class_create("nvme-subsystem"); 4765 if (IS_ERR(nvme_subsys_class)) { 4766 result = PTR_ERR(nvme_subsys_class); 4767 goto destroy_class; 4768 } 4769 4770 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS, 4771 "nvme-generic"); 4772 if (result < 0) 4773 goto destroy_subsys_class; 4774 4775 nvme_ns_chr_class = class_create("nvme-generic"); 4776 if (IS_ERR(nvme_ns_chr_class)) { 4777 result = PTR_ERR(nvme_ns_chr_class); 4778 goto unregister_generic_ns; 4779 } 4780 result = nvme_init_auth(); 4781 if (result) 4782 goto destroy_ns_chr; 4783 return 0; 4784 4785 destroy_ns_chr: 4786 class_destroy(nvme_ns_chr_class); 4787 unregister_generic_ns: 4788 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4789 destroy_subsys_class: 4790 class_destroy(nvme_subsys_class); 4791 destroy_class: 4792 class_destroy(nvme_class); 4793 unregister_chrdev: 4794 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4795 destroy_delete_wq: 4796 destroy_workqueue(nvme_delete_wq); 4797 destroy_reset_wq: 4798 destroy_workqueue(nvme_reset_wq); 4799 destroy_wq: 4800 destroy_workqueue(nvme_wq); 4801 out: 4802 return result; 4803 } 4804 4805 static void __exit nvme_core_exit(void) 4806 { 4807 nvme_exit_auth(); 4808 class_destroy(nvme_ns_chr_class); 4809 class_destroy(nvme_subsys_class); 4810 class_destroy(nvme_class); 4811 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4812 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4813 destroy_workqueue(nvme_delete_wq); 4814 destroy_workqueue(nvme_reset_wq); 4815 destroy_workqueue(nvme_wq); 4816 ida_destroy(&nvme_ns_chr_minor_ida); 4817 ida_destroy(&nvme_instance_ida); 4818 } 4819 4820 MODULE_LICENSE("GPL"); 4821 MODULE_VERSION("1.0"); 4822 module_init(nvme_core_init); 4823 module_exit(nvme_core_exit); 4824