1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVM Express device driver 4 * Copyright (c) 2011-2014, Intel Corporation. 5 */ 6 7 #include <linux/blkdev.h> 8 #include <linux/blk-mq.h> 9 #include <linux/blk-integrity.h> 10 #include <linux/compat.h> 11 #include <linux/delay.h> 12 #include <linux/errno.h> 13 #include <linux/hdreg.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/backing-dev.h> 17 #include <linux/slab.h> 18 #include <linux/types.h> 19 #include <linux/pr.h> 20 #include <linux/ptrace.h> 21 #include <linux/nvme_ioctl.h> 22 #include <linux/pm_qos.h> 23 #include <linux/ratelimit.h> 24 #include <asm/unaligned.h> 25 26 #include "nvme.h" 27 #include "fabrics.h" 28 #include <linux/nvme-auth.h> 29 30 #define CREATE_TRACE_POINTS 31 #include "trace.h" 32 33 #define NVME_MINORS (1U << MINORBITS) 34 35 struct nvme_ns_info { 36 struct nvme_ns_ids ids; 37 u32 nsid; 38 __le32 anagrpid; 39 bool is_shared; 40 bool is_readonly; 41 bool is_ready; 42 bool is_removed; 43 }; 44 45 unsigned int admin_timeout = 60; 46 module_param(admin_timeout, uint, 0644); 47 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 48 EXPORT_SYMBOL_GPL(admin_timeout); 49 50 unsigned int nvme_io_timeout = 30; 51 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 52 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 53 EXPORT_SYMBOL_GPL(nvme_io_timeout); 54 55 static unsigned char shutdown_timeout = 5; 56 module_param(shutdown_timeout, byte, 0644); 57 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 58 59 static u8 nvme_max_retries = 5; 60 module_param_named(max_retries, nvme_max_retries, byte, 0644); 61 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 62 63 static unsigned long default_ps_max_latency_us = 100000; 64 module_param(default_ps_max_latency_us, ulong, 0644); 65 MODULE_PARM_DESC(default_ps_max_latency_us, 66 "max power saving latency for new devices; use PM QOS to change per device"); 67 68 static bool force_apst; 69 module_param(force_apst, bool, 0644); 70 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 71 72 static unsigned long apst_primary_timeout_ms = 100; 73 module_param(apst_primary_timeout_ms, ulong, 0644); 74 MODULE_PARM_DESC(apst_primary_timeout_ms, 75 "primary APST timeout in ms"); 76 77 static unsigned long apst_secondary_timeout_ms = 2000; 78 module_param(apst_secondary_timeout_ms, ulong, 0644); 79 MODULE_PARM_DESC(apst_secondary_timeout_ms, 80 "secondary APST timeout in ms"); 81 82 static unsigned long apst_primary_latency_tol_us = 15000; 83 module_param(apst_primary_latency_tol_us, ulong, 0644); 84 MODULE_PARM_DESC(apst_primary_latency_tol_us, 85 "primary APST latency tolerance in us"); 86 87 static unsigned long apst_secondary_latency_tol_us = 100000; 88 module_param(apst_secondary_latency_tol_us, ulong, 0644); 89 MODULE_PARM_DESC(apst_secondary_latency_tol_us, 90 "secondary APST latency tolerance in us"); 91 92 /* 93 * nvme_wq - hosts nvme related works that are not reset or delete 94 * nvme_reset_wq - hosts nvme reset works 95 * nvme_delete_wq - hosts nvme delete works 96 * 97 * nvme_wq will host works such as scan, aen handling, fw activation, 98 * keep-alive, periodic reconnects etc. nvme_reset_wq 99 * runs reset works which also flush works hosted on nvme_wq for 100 * serialization purposes. nvme_delete_wq host controller deletion 101 * works which flush reset works for serialization. 102 */ 103 struct workqueue_struct *nvme_wq; 104 EXPORT_SYMBOL_GPL(nvme_wq); 105 106 struct workqueue_struct *nvme_reset_wq; 107 EXPORT_SYMBOL_GPL(nvme_reset_wq); 108 109 struct workqueue_struct *nvme_delete_wq; 110 EXPORT_SYMBOL_GPL(nvme_delete_wq); 111 112 static LIST_HEAD(nvme_subsystems); 113 static DEFINE_MUTEX(nvme_subsystems_lock); 114 115 static DEFINE_IDA(nvme_instance_ida); 116 static dev_t nvme_ctrl_base_chr_devt; 117 static struct class *nvme_class; 118 static struct class *nvme_subsys_class; 119 120 static DEFINE_IDA(nvme_ns_chr_minor_ida); 121 static dev_t nvme_ns_chr_devt; 122 static struct class *nvme_ns_chr_class; 123 124 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 125 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 126 unsigned nsid); 127 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 128 struct nvme_command *cmd); 129 130 void nvme_queue_scan(struct nvme_ctrl *ctrl) 131 { 132 /* 133 * Only new queue scan work when admin and IO queues are both alive 134 */ 135 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset) 136 queue_work(nvme_wq, &ctrl->scan_work); 137 } 138 139 /* 140 * Use this function to proceed with scheduling reset_work for a controller 141 * that had previously been set to the resetting state. This is intended for 142 * code paths that can't be interrupted by other reset attempts. A hot removal 143 * may prevent this from succeeding. 144 */ 145 int nvme_try_sched_reset(struct nvme_ctrl *ctrl) 146 { 147 if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING) 148 return -EBUSY; 149 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 150 return -EBUSY; 151 return 0; 152 } 153 EXPORT_SYMBOL_GPL(nvme_try_sched_reset); 154 155 static void nvme_failfast_work(struct work_struct *work) 156 { 157 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 158 struct nvme_ctrl, failfast_work); 159 160 if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING) 161 return; 162 163 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 164 dev_info(ctrl->device, "failfast expired\n"); 165 nvme_kick_requeue_lists(ctrl); 166 } 167 168 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl) 169 { 170 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1) 171 return; 172 173 schedule_delayed_work(&ctrl->failfast_work, 174 ctrl->opts->fast_io_fail_tmo * HZ); 175 } 176 177 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl) 178 { 179 if (!ctrl->opts) 180 return; 181 182 cancel_delayed_work_sync(&ctrl->failfast_work); 183 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 184 } 185 186 187 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 188 { 189 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 190 return -EBUSY; 191 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 192 return -EBUSY; 193 return 0; 194 } 195 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 196 197 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 198 { 199 int ret; 200 201 ret = nvme_reset_ctrl(ctrl); 202 if (!ret) { 203 flush_work(&ctrl->reset_work); 204 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE) 205 ret = -ENETRESET; 206 } 207 208 return ret; 209 } 210 211 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl) 212 { 213 dev_info(ctrl->device, 214 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl)); 215 216 flush_work(&ctrl->reset_work); 217 nvme_stop_ctrl(ctrl); 218 nvme_remove_namespaces(ctrl); 219 ctrl->ops->delete_ctrl(ctrl); 220 nvme_uninit_ctrl(ctrl); 221 } 222 223 static void nvme_delete_ctrl_work(struct work_struct *work) 224 { 225 struct nvme_ctrl *ctrl = 226 container_of(work, struct nvme_ctrl, delete_work); 227 228 nvme_do_delete_ctrl(ctrl); 229 } 230 231 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 232 { 233 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 234 return -EBUSY; 235 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 236 return -EBUSY; 237 return 0; 238 } 239 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 240 241 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 242 { 243 /* 244 * Keep a reference until nvme_do_delete_ctrl() complete, 245 * since ->delete_ctrl can free the controller. 246 */ 247 nvme_get_ctrl(ctrl); 248 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 249 nvme_do_delete_ctrl(ctrl); 250 nvme_put_ctrl(ctrl); 251 } 252 253 static blk_status_t nvme_error_status(u16 status) 254 { 255 switch (status & 0x7ff) { 256 case NVME_SC_SUCCESS: 257 return BLK_STS_OK; 258 case NVME_SC_CAP_EXCEEDED: 259 return BLK_STS_NOSPC; 260 case NVME_SC_LBA_RANGE: 261 case NVME_SC_CMD_INTERRUPTED: 262 case NVME_SC_NS_NOT_READY: 263 return BLK_STS_TARGET; 264 case NVME_SC_BAD_ATTRIBUTES: 265 case NVME_SC_ONCS_NOT_SUPPORTED: 266 case NVME_SC_INVALID_OPCODE: 267 case NVME_SC_INVALID_FIELD: 268 case NVME_SC_INVALID_NS: 269 return BLK_STS_NOTSUPP; 270 case NVME_SC_WRITE_FAULT: 271 case NVME_SC_READ_ERROR: 272 case NVME_SC_UNWRITTEN_BLOCK: 273 case NVME_SC_ACCESS_DENIED: 274 case NVME_SC_READ_ONLY: 275 case NVME_SC_COMPARE_FAILED: 276 return BLK_STS_MEDIUM; 277 case NVME_SC_GUARD_CHECK: 278 case NVME_SC_APPTAG_CHECK: 279 case NVME_SC_REFTAG_CHECK: 280 case NVME_SC_INVALID_PI: 281 return BLK_STS_PROTECTION; 282 case NVME_SC_RESERVATION_CONFLICT: 283 return BLK_STS_RESV_CONFLICT; 284 case NVME_SC_HOST_PATH_ERROR: 285 return BLK_STS_TRANSPORT; 286 case NVME_SC_ZONE_TOO_MANY_ACTIVE: 287 return BLK_STS_ZONE_ACTIVE_RESOURCE; 288 case NVME_SC_ZONE_TOO_MANY_OPEN: 289 return BLK_STS_ZONE_OPEN_RESOURCE; 290 default: 291 return BLK_STS_IOERR; 292 } 293 } 294 295 static void nvme_retry_req(struct request *req) 296 { 297 unsigned long delay = 0; 298 u16 crd; 299 300 /* The mask and shift result must be <= 3 */ 301 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11; 302 if (crd) 303 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100; 304 305 nvme_req(req)->retries++; 306 blk_mq_requeue_request(req, false); 307 blk_mq_delay_kick_requeue_list(req->q, delay); 308 } 309 310 static void nvme_log_error(struct request *req) 311 { 312 struct nvme_ns *ns = req->q->queuedata; 313 struct nvme_request *nr = nvme_req(req); 314 315 if (ns) { 316 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %u blocks, %s (sct 0x%x / sc 0x%x) %s%s\n", 317 ns->disk ? ns->disk->disk_name : "?", 318 nvme_get_opcode_str(nr->cmd->common.opcode), 319 nr->cmd->common.opcode, 320 nvme_sect_to_lba(ns->head, blk_rq_pos(req)), 321 blk_rq_bytes(req) >> ns->head->lba_shift, 322 nvme_get_error_status_str(nr->status), 323 nr->status >> 8 & 7, /* Status Code Type */ 324 nr->status & 0xff, /* Status Code */ 325 nr->status & NVME_SC_MORE ? "MORE " : "", 326 nr->status & NVME_SC_DNR ? "DNR " : ""); 327 return; 328 } 329 330 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n", 331 dev_name(nr->ctrl->device), 332 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 333 nr->cmd->common.opcode, 334 nvme_get_error_status_str(nr->status), 335 nr->status >> 8 & 7, /* Status Code Type */ 336 nr->status & 0xff, /* Status Code */ 337 nr->status & NVME_SC_MORE ? "MORE " : "", 338 nr->status & NVME_SC_DNR ? "DNR " : ""); 339 } 340 341 enum nvme_disposition { 342 COMPLETE, 343 RETRY, 344 FAILOVER, 345 AUTHENTICATE, 346 }; 347 348 static inline enum nvme_disposition nvme_decide_disposition(struct request *req) 349 { 350 if (likely(nvme_req(req)->status == 0)) 351 return COMPLETE; 352 353 if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED) 354 return AUTHENTICATE; 355 356 if (blk_noretry_request(req) || 357 (nvme_req(req)->status & NVME_SC_DNR) || 358 nvme_req(req)->retries >= nvme_max_retries) 359 return COMPLETE; 360 361 if (req->cmd_flags & REQ_NVME_MPATH) { 362 if (nvme_is_path_error(nvme_req(req)->status) || 363 blk_queue_dying(req->q)) 364 return FAILOVER; 365 } else { 366 if (blk_queue_dying(req->q)) 367 return COMPLETE; 368 } 369 370 return RETRY; 371 } 372 373 static inline void nvme_end_req_zoned(struct request *req) 374 { 375 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 376 req_op(req) == REQ_OP_ZONE_APPEND) { 377 struct nvme_ns *ns = req->q->queuedata; 378 379 req->__sector = nvme_lba_to_sect(ns->head, 380 le64_to_cpu(nvme_req(req)->result.u64)); 381 } 382 } 383 384 static inline void nvme_end_req(struct request *req) 385 { 386 blk_status_t status = nvme_error_status(nvme_req(req)->status); 387 388 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) 389 nvme_log_error(req); 390 nvme_end_req_zoned(req); 391 nvme_trace_bio_complete(req); 392 if (req->cmd_flags & REQ_NVME_MPATH) 393 nvme_mpath_end_request(req); 394 blk_mq_end_request(req, status); 395 } 396 397 void nvme_complete_rq(struct request *req) 398 { 399 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 400 401 trace_nvme_complete_rq(req); 402 nvme_cleanup_cmd(req); 403 404 /* 405 * Completions of long-running commands should not be able to 406 * defer sending of periodic keep alives, since the controller 407 * may have completed processing such commands a long time ago 408 * (arbitrarily close to command submission time). 409 * req->deadline - req->timeout is the command submission time 410 * in jiffies. 411 */ 412 if (ctrl->kas && 413 req->deadline - req->timeout >= ctrl->ka_last_check_time) 414 ctrl->comp_seen = true; 415 416 switch (nvme_decide_disposition(req)) { 417 case COMPLETE: 418 nvme_end_req(req); 419 return; 420 case RETRY: 421 nvme_retry_req(req); 422 return; 423 case FAILOVER: 424 nvme_failover_req(req); 425 return; 426 case AUTHENTICATE: 427 #ifdef CONFIG_NVME_HOST_AUTH 428 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 429 nvme_retry_req(req); 430 #else 431 nvme_end_req(req); 432 #endif 433 return; 434 } 435 } 436 EXPORT_SYMBOL_GPL(nvme_complete_rq); 437 438 void nvme_complete_batch_req(struct request *req) 439 { 440 trace_nvme_complete_rq(req); 441 nvme_cleanup_cmd(req); 442 nvme_end_req_zoned(req); 443 } 444 EXPORT_SYMBOL_GPL(nvme_complete_batch_req); 445 446 /* 447 * Called to unwind from ->queue_rq on a failed command submission so that the 448 * multipathing code gets called to potentially failover to another path. 449 * The caller needs to unwind all transport specific resource allocations and 450 * must return propagate the return value. 451 */ 452 blk_status_t nvme_host_path_error(struct request *req) 453 { 454 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR; 455 blk_mq_set_request_complete(req); 456 nvme_complete_rq(req); 457 return BLK_STS_OK; 458 } 459 EXPORT_SYMBOL_GPL(nvme_host_path_error); 460 461 bool nvme_cancel_request(struct request *req, void *data) 462 { 463 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 464 "Cancelling I/O %d", req->tag); 465 466 /* don't abort one completed or idle request */ 467 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT) 468 return true; 469 470 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD; 471 nvme_req(req)->flags |= NVME_REQ_CANCELLED; 472 blk_mq_complete_request(req); 473 return true; 474 } 475 EXPORT_SYMBOL_GPL(nvme_cancel_request); 476 477 void nvme_cancel_tagset(struct nvme_ctrl *ctrl) 478 { 479 if (ctrl->tagset) { 480 blk_mq_tagset_busy_iter(ctrl->tagset, 481 nvme_cancel_request, ctrl); 482 blk_mq_tagset_wait_completed_request(ctrl->tagset); 483 } 484 } 485 EXPORT_SYMBOL_GPL(nvme_cancel_tagset); 486 487 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl) 488 { 489 if (ctrl->admin_tagset) { 490 blk_mq_tagset_busy_iter(ctrl->admin_tagset, 491 nvme_cancel_request, ctrl); 492 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset); 493 } 494 } 495 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset); 496 497 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 498 enum nvme_ctrl_state new_state) 499 { 500 enum nvme_ctrl_state old_state; 501 unsigned long flags; 502 bool changed = false; 503 504 spin_lock_irqsave(&ctrl->lock, flags); 505 506 old_state = nvme_ctrl_state(ctrl); 507 switch (new_state) { 508 case NVME_CTRL_LIVE: 509 switch (old_state) { 510 case NVME_CTRL_NEW: 511 case NVME_CTRL_RESETTING: 512 case NVME_CTRL_CONNECTING: 513 changed = true; 514 fallthrough; 515 default: 516 break; 517 } 518 break; 519 case NVME_CTRL_RESETTING: 520 switch (old_state) { 521 case NVME_CTRL_NEW: 522 case NVME_CTRL_LIVE: 523 changed = true; 524 fallthrough; 525 default: 526 break; 527 } 528 break; 529 case NVME_CTRL_CONNECTING: 530 switch (old_state) { 531 case NVME_CTRL_NEW: 532 case NVME_CTRL_RESETTING: 533 changed = true; 534 fallthrough; 535 default: 536 break; 537 } 538 break; 539 case NVME_CTRL_DELETING: 540 switch (old_state) { 541 case NVME_CTRL_LIVE: 542 case NVME_CTRL_RESETTING: 543 case NVME_CTRL_CONNECTING: 544 changed = true; 545 fallthrough; 546 default: 547 break; 548 } 549 break; 550 case NVME_CTRL_DELETING_NOIO: 551 switch (old_state) { 552 case NVME_CTRL_DELETING: 553 case NVME_CTRL_DEAD: 554 changed = true; 555 fallthrough; 556 default: 557 break; 558 } 559 break; 560 case NVME_CTRL_DEAD: 561 switch (old_state) { 562 case NVME_CTRL_DELETING: 563 changed = true; 564 fallthrough; 565 default: 566 break; 567 } 568 break; 569 default: 570 break; 571 } 572 573 if (changed) { 574 WRITE_ONCE(ctrl->state, new_state); 575 wake_up_all(&ctrl->state_wq); 576 } 577 578 spin_unlock_irqrestore(&ctrl->lock, flags); 579 if (!changed) 580 return false; 581 582 if (new_state == NVME_CTRL_LIVE) { 583 if (old_state == NVME_CTRL_CONNECTING) 584 nvme_stop_failfast_work(ctrl); 585 nvme_kick_requeue_lists(ctrl); 586 } else if (new_state == NVME_CTRL_CONNECTING && 587 old_state == NVME_CTRL_RESETTING) { 588 nvme_start_failfast_work(ctrl); 589 } 590 return changed; 591 } 592 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 593 594 /* 595 * Returns true for sink states that can't ever transition back to live. 596 */ 597 static bool nvme_state_terminal(struct nvme_ctrl *ctrl) 598 { 599 switch (nvme_ctrl_state(ctrl)) { 600 case NVME_CTRL_NEW: 601 case NVME_CTRL_LIVE: 602 case NVME_CTRL_RESETTING: 603 case NVME_CTRL_CONNECTING: 604 return false; 605 case NVME_CTRL_DELETING: 606 case NVME_CTRL_DELETING_NOIO: 607 case NVME_CTRL_DEAD: 608 return true; 609 default: 610 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 611 return true; 612 } 613 } 614 615 /* 616 * Waits for the controller state to be resetting, or returns false if it is 617 * not possible to ever transition to that state. 618 */ 619 bool nvme_wait_reset(struct nvme_ctrl *ctrl) 620 { 621 wait_event(ctrl->state_wq, 622 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) || 623 nvme_state_terminal(ctrl)); 624 return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING; 625 } 626 EXPORT_SYMBOL_GPL(nvme_wait_reset); 627 628 static void nvme_free_ns_head(struct kref *ref) 629 { 630 struct nvme_ns_head *head = 631 container_of(ref, struct nvme_ns_head, ref); 632 633 nvme_mpath_remove_disk(head); 634 ida_free(&head->subsys->ns_ida, head->instance); 635 cleanup_srcu_struct(&head->srcu); 636 nvme_put_subsystem(head->subsys); 637 kfree(head); 638 } 639 640 bool nvme_tryget_ns_head(struct nvme_ns_head *head) 641 { 642 return kref_get_unless_zero(&head->ref); 643 } 644 645 void nvme_put_ns_head(struct nvme_ns_head *head) 646 { 647 kref_put(&head->ref, nvme_free_ns_head); 648 } 649 650 static void nvme_free_ns(struct kref *kref) 651 { 652 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 653 654 put_disk(ns->disk); 655 nvme_put_ns_head(ns->head); 656 nvme_put_ctrl(ns->ctrl); 657 kfree(ns); 658 } 659 660 static inline bool nvme_get_ns(struct nvme_ns *ns) 661 { 662 return kref_get_unless_zero(&ns->kref); 663 } 664 665 void nvme_put_ns(struct nvme_ns *ns) 666 { 667 kref_put(&ns->kref, nvme_free_ns); 668 } 669 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU); 670 671 static inline void nvme_clear_nvme_request(struct request *req) 672 { 673 nvme_req(req)->status = 0; 674 nvme_req(req)->retries = 0; 675 nvme_req(req)->flags = 0; 676 req->rq_flags |= RQF_DONTPREP; 677 } 678 679 /* initialize a passthrough request */ 680 void nvme_init_request(struct request *req, struct nvme_command *cmd) 681 { 682 if (req->q->queuedata) 683 req->timeout = NVME_IO_TIMEOUT; 684 else /* no queuedata implies admin queue */ 685 req->timeout = NVME_ADMIN_TIMEOUT; 686 687 /* passthru commands should let the driver set the SGL flags */ 688 cmd->common.flags &= ~NVME_CMD_SGL_ALL; 689 690 req->cmd_flags |= REQ_FAILFAST_DRIVER; 691 if (req->mq_hctx->type == HCTX_TYPE_POLL) 692 req->cmd_flags |= REQ_POLLED; 693 nvme_clear_nvme_request(req); 694 req->rq_flags |= RQF_QUIET; 695 memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd)); 696 } 697 EXPORT_SYMBOL_GPL(nvme_init_request); 698 699 /* 700 * For something we're not in a state to send to the device the default action 701 * is to busy it and retry it after the controller state is recovered. However, 702 * if the controller is deleting or if anything is marked for failfast or 703 * nvme multipath it is immediately failed. 704 * 705 * Note: commands used to initialize the controller will be marked for failfast. 706 * Note: nvme cli/ioctl commands are marked for failfast. 707 */ 708 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 709 struct request *rq) 710 { 711 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 712 713 if (state != NVME_CTRL_DELETING_NOIO && 714 state != NVME_CTRL_DELETING && 715 state != NVME_CTRL_DEAD && 716 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) && 717 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH)) 718 return BLK_STS_RESOURCE; 719 return nvme_host_path_error(rq); 720 } 721 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command); 722 723 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 724 bool queue_live) 725 { 726 struct nvme_request *req = nvme_req(rq); 727 728 /* 729 * currently we have a problem sending passthru commands 730 * on the admin_q if the controller is not LIVE because we can't 731 * make sure that they are going out after the admin connect, 732 * controller enable and/or other commands in the initialization 733 * sequence. until the controller will be LIVE, fail with 734 * BLK_STS_RESOURCE so that they will be rescheduled. 735 */ 736 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD)) 737 return false; 738 739 if (ctrl->ops->flags & NVME_F_FABRICS) { 740 /* 741 * Only allow commands on a live queue, except for the connect 742 * command, which is require to set the queue live in the 743 * appropinquate states. 744 */ 745 switch (nvme_ctrl_state(ctrl)) { 746 case NVME_CTRL_CONNECTING: 747 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) && 748 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect || 749 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send || 750 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive)) 751 return true; 752 break; 753 default: 754 break; 755 case NVME_CTRL_DEAD: 756 return false; 757 } 758 } 759 760 return queue_live; 761 } 762 EXPORT_SYMBOL_GPL(__nvme_check_ready); 763 764 static inline void nvme_setup_flush(struct nvme_ns *ns, 765 struct nvme_command *cmnd) 766 { 767 memset(cmnd, 0, sizeof(*cmnd)); 768 cmnd->common.opcode = nvme_cmd_flush; 769 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 770 } 771 772 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 773 struct nvme_command *cmnd) 774 { 775 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 776 struct nvme_dsm_range *range; 777 struct bio *bio; 778 779 /* 780 * Some devices do not consider the DSM 'Number of Ranges' field when 781 * determining how much data to DMA. Always allocate memory for maximum 782 * number of segments to prevent device reading beyond end of buffer. 783 */ 784 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES; 785 786 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN); 787 if (!range) { 788 /* 789 * If we fail allocation our range, fallback to the controller 790 * discard page. If that's also busy, it's safe to return 791 * busy, as we know we can make progress once that's freed. 792 */ 793 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 794 return BLK_STS_RESOURCE; 795 796 range = page_address(ns->ctrl->discard_page); 797 } 798 799 if (queue_max_discard_segments(req->q) == 1) { 800 u64 slba = nvme_sect_to_lba(ns->head, blk_rq_pos(req)); 801 u32 nlb = blk_rq_sectors(req) >> (ns->head->lba_shift - 9); 802 803 range[0].cattr = cpu_to_le32(0); 804 range[0].nlb = cpu_to_le32(nlb); 805 range[0].slba = cpu_to_le64(slba); 806 n = 1; 807 } else { 808 __rq_for_each_bio(bio, req) { 809 u64 slba = nvme_sect_to_lba(ns->head, 810 bio->bi_iter.bi_sector); 811 u32 nlb = bio->bi_iter.bi_size >> ns->head->lba_shift; 812 813 if (n < segments) { 814 range[n].cattr = cpu_to_le32(0); 815 range[n].nlb = cpu_to_le32(nlb); 816 range[n].slba = cpu_to_le64(slba); 817 } 818 n++; 819 } 820 } 821 822 if (WARN_ON_ONCE(n != segments)) { 823 if (virt_to_page(range) == ns->ctrl->discard_page) 824 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 825 else 826 kfree(range); 827 return BLK_STS_IOERR; 828 } 829 830 memset(cmnd, 0, sizeof(*cmnd)); 831 cmnd->dsm.opcode = nvme_cmd_dsm; 832 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 833 cmnd->dsm.nr = cpu_to_le32(segments - 1); 834 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 835 836 bvec_set_virt(&req->special_vec, range, alloc_size); 837 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 838 839 return BLK_STS_OK; 840 } 841 842 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd, 843 struct request *req) 844 { 845 u32 upper, lower; 846 u64 ref48; 847 848 /* both rw and write zeroes share the same reftag format */ 849 switch (ns->head->guard_type) { 850 case NVME_NVM_NS_16B_GUARD: 851 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 852 break; 853 case NVME_NVM_NS_64B_GUARD: 854 ref48 = ext_pi_ref_tag(req); 855 lower = lower_32_bits(ref48); 856 upper = upper_32_bits(ref48); 857 858 cmnd->rw.reftag = cpu_to_le32(lower); 859 cmnd->rw.cdw3 = cpu_to_le32(upper); 860 break; 861 default: 862 break; 863 } 864 } 865 866 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns, 867 struct request *req, struct nvme_command *cmnd) 868 { 869 memset(cmnd, 0, sizeof(*cmnd)); 870 871 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 872 return nvme_setup_discard(ns, req, cmnd); 873 874 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes; 875 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id); 876 cmnd->write_zeroes.slba = 877 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req))); 878 cmnd->write_zeroes.length = 879 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1); 880 881 if (!(req->cmd_flags & REQ_NOUNMAP) && 882 (ns->head->features & NVME_NS_DEAC)) 883 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC); 884 885 if (nvme_ns_has_pi(ns->head)) { 886 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT); 887 888 switch (ns->head->pi_type) { 889 case NVME_NS_DPS_PI_TYPE1: 890 case NVME_NS_DPS_PI_TYPE2: 891 nvme_set_ref_tag(ns, cmnd, req); 892 break; 893 } 894 } 895 896 return BLK_STS_OK; 897 } 898 899 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 900 struct request *req, struct nvme_command *cmnd, 901 enum nvme_opcode op) 902 { 903 u16 control = 0; 904 u32 dsmgmt = 0; 905 906 if (req->cmd_flags & REQ_FUA) 907 control |= NVME_RW_FUA; 908 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 909 control |= NVME_RW_LR; 910 911 if (req->cmd_flags & REQ_RAHEAD) 912 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 913 914 cmnd->rw.opcode = op; 915 cmnd->rw.flags = 0; 916 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 917 cmnd->rw.cdw2 = 0; 918 cmnd->rw.cdw3 = 0; 919 cmnd->rw.metadata = 0; 920 cmnd->rw.slba = 921 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req))); 922 cmnd->rw.length = 923 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1); 924 cmnd->rw.reftag = 0; 925 cmnd->rw.apptag = 0; 926 cmnd->rw.appmask = 0; 927 928 if (ns->head->ms) { 929 /* 930 * If formated with metadata, the block layer always provides a 931 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 932 * we enable the PRACT bit for protection information or set the 933 * namespace capacity to zero to prevent any I/O. 934 */ 935 if (!blk_integrity_rq(req)) { 936 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns->head))) 937 return BLK_STS_NOTSUPP; 938 control |= NVME_RW_PRINFO_PRACT; 939 } 940 941 switch (ns->head->pi_type) { 942 case NVME_NS_DPS_PI_TYPE3: 943 control |= NVME_RW_PRINFO_PRCHK_GUARD; 944 break; 945 case NVME_NS_DPS_PI_TYPE1: 946 case NVME_NS_DPS_PI_TYPE2: 947 control |= NVME_RW_PRINFO_PRCHK_GUARD | 948 NVME_RW_PRINFO_PRCHK_REF; 949 if (op == nvme_cmd_zone_append) 950 control |= NVME_RW_APPEND_PIREMAP; 951 nvme_set_ref_tag(ns, cmnd, req); 952 break; 953 } 954 } 955 956 cmnd->rw.control = cpu_to_le16(control); 957 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 958 return 0; 959 } 960 961 void nvme_cleanup_cmd(struct request *req) 962 { 963 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 964 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 965 966 if (req->special_vec.bv_page == ctrl->discard_page) 967 clear_bit_unlock(0, &ctrl->discard_page_busy); 968 else 969 kfree(bvec_virt(&req->special_vec)); 970 } 971 } 972 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 973 974 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req) 975 { 976 struct nvme_command *cmd = nvme_req(req)->cmd; 977 blk_status_t ret = BLK_STS_OK; 978 979 if (!(req->rq_flags & RQF_DONTPREP)) 980 nvme_clear_nvme_request(req); 981 982 switch (req_op(req)) { 983 case REQ_OP_DRV_IN: 984 case REQ_OP_DRV_OUT: 985 /* these are setup prior to execution in nvme_init_request() */ 986 break; 987 case REQ_OP_FLUSH: 988 nvme_setup_flush(ns, cmd); 989 break; 990 case REQ_OP_ZONE_RESET_ALL: 991 case REQ_OP_ZONE_RESET: 992 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET); 993 break; 994 case REQ_OP_ZONE_OPEN: 995 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN); 996 break; 997 case REQ_OP_ZONE_CLOSE: 998 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE); 999 break; 1000 case REQ_OP_ZONE_FINISH: 1001 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH); 1002 break; 1003 case REQ_OP_WRITE_ZEROES: 1004 ret = nvme_setup_write_zeroes(ns, req, cmd); 1005 break; 1006 case REQ_OP_DISCARD: 1007 ret = nvme_setup_discard(ns, req, cmd); 1008 break; 1009 case REQ_OP_READ: 1010 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read); 1011 break; 1012 case REQ_OP_WRITE: 1013 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write); 1014 break; 1015 case REQ_OP_ZONE_APPEND: 1016 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append); 1017 break; 1018 default: 1019 WARN_ON_ONCE(1); 1020 return BLK_STS_IOERR; 1021 } 1022 1023 cmd->common.command_id = nvme_cid(req); 1024 trace_nvme_setup_cmd(req, cmd); 1025 return ret; 1026 } 1027 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 1028 1029 /* 1030 * Return values: 1031 * 0: success 1032 * >0: nvme controller's cqe status response 1033 * <0: kernel error in lieu of controller response 1034 */ 1035 int nvme_execute_rq(struct request *rq, bool at_head) 1036 { 1037 blk_status_t status; 1038 1039 status = blk_execute_rq(rq, at_head); 1040 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED) 1041 return -EINTR; 1042 if (nvme_req(rq)->status) 1043 return nvme_req(rq)->status; 1044 return blk_status_to_errno(status); 1045 } 1046 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU); 1047 1048 /* 1049 * Returns 0 on success. If the result is negative, it's a Linux error code; 1050 * if the result is positive, it's an NVM Express status code 1051 */ 1052 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1053 union nvme_result *result, void *buffer, unsigned bufflen, 1054 int qid, int at_head, blk_mq_req_flags_t flags) 1055 { 1056 struct request *req; 1057 int ret; 1058 1059 if (qid == NVME_QID_ANY) 1060 req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags); 1061 else 1062 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags, 1063 qid - 1); 1064 1065 if (IS_ERR(req)) 1066 return PTR_ERR(req); 1067 nvme_init_request(req, cmd); 1068 1069 if (buffer && bufflen) { 1070 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); 1071 if (ret) 1072 goto out; 1073 } 1074 1075 ret = nvme_execute_rq(req, at_head); 1076 if (result && ret >= 0) 1077 *result = nvme_req(req)->result; 1078 out: 1079 blk_mq_free_request(req); 1080 return ret; 1081 } 1082 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 1083 1084 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1085 void *buffer, unsigned bufflen) 1086 { 1087 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 1088 NVME_QID_ANY, 0, 0); 1089 } 1090 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 1091 1092 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1093 { 1094 u32 effects = 0; 1095 1096 if (ns) { 1097 effects = le32_to_cpu(ns->head->effects->iocs[opcode]); 1098 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC)) 1099 dev_warn_once(ctrl->device, 1100 "IO command:%02x has unusual effects:%08x\n", 1101 opcode, effects); 1102 1103 /* 1104 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues, 1105 * which would deadlock when done on an I/O command. Note that 1106 * We already warn about an unusual effect above. 1107 */ 1108 effects &= ~NVME_CMD_EFFECTS_CSE_MASK; 1109 } else { 1110 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1111 } 1112 1113 return effects; 1114 } 1115 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU); 1116 1117 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1118 { 1119 u32 effects = nvme_command_effects(ctrl, ns, opcode); 1120 1121 /* 1122 * For simplicity, IO to all namespaces is quiesced even if the command 1123 * effects say only one namespace is affected. 1124 */ 1125 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1126 mutex_lock(&ctrl->scan_lock); 1127 mutex_lock(&ctrl->subsys->lock); 1128 nvme_mpath_start_freeze(ctrl->subsys); 1129 nvme_mpath_wait_freeze(ctrl->subsys); 1130 nvme_start_freeze(ctrl); 1131 nvme_wait_freeze(ctrl); 1132 } 1133 return effects; 1134 } 1135 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU); 1136 1137 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1138 struct nvme_command *cmd, int status) 1139 { 1140 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1141 nvme_unfreeze(ctrl); 1142 nvme_mpath_unfreeze(ctrl->subsys); 1143 mutex_unlock(&ctrl->subsys->lock); 1144 mutex_unlock(&ctrl->scan_lock); 1145 } 1146 if (effects & NVME_CMD_EFFECTS_CCC) { 1147 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY, 1148 &ctrl->flags)) { 1149 dev_info(ctrl->device, 1150 "controller capabilities changed, reset may be required to take effect.\n"); 1151 } 1152 } 1153 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) { 1154 nvme_queue_scan(ctrl); 1155 flush_work(&ctrl->scan_work); 1156 } 1157 if (ns) 1158 return; 1159 1160 switch (cmd->common.opcode) { 1161 case nvme_admin_set_features: 1162 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) { 1163 case NVME_FEAT_KATO: 1164 /* 1165 * Keep alive commands interval on the host should be 1166 * updated when KATO is modified by Set Features 1167 * commands. 1168 */ 1169 if (!status) 1170 nvme_update_keep_alive(ctrl, cmd); 1171 break; 1172 default: 1173 break; 1174 } 1175 break; 1176 default: 1177 break; 1178 } 1179 } 1180 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU); 1181 1182 /* 1183 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1: 1184 * 1185 * The host should send Keep Alive commands at half of the Keep Alive Timeout 1186 * accounting for transport roundtrip times [..]. 1187 */ 1188 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl) 1189 { 1190 unsigned long delay = ctrl->kato * HZ / 2; 1191 1192 /* 1193 * When using Traffic Based Keep Alive, we need to run 1194 * nvme_keep_alive_work at twice the normal frequency, as one 1195 * command completion can postpone sending a keep alive command 1196 * by up to twice the delay between runs. 1197 */ 1198 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) 1199 delay /= 2; 1200 return delay; 1201 } 1202 1203 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl) 1204 { 1205 unsigned long now = jiffies; 1206 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1207 unsigned long ka_next_check_tm = ctrl->ka_last_check_time + delay; 1208 1209 if (time_after(now, ka_next_check_tm)) 1210 delay = 0; 1211 else 1212 delay = ka_next_check_tm - now; 1213 1214 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1215 } 1216 1217 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq, 1218 blk_status_t status) 1219 { 1220 struct nvme_ctrl *ctrl = rq->end_io_data; 1221 unsigned long flags; 1222 bool startka = false; 1223 unsigned long rtt = jiffies - (rq->deadline - rq->timeout); 1224 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1225 1226 /* 1227 * Subtract off the keepalive RTT so nvme_keep_alive_work runs 1228 * at the desired frequency. 1229 */ 1230 if (rtt <= delay) { 1231 delay -= rtt; 1232 } else { 1233 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n", 1234 jiffies_to_msecs(rtt)); 1235 delay = 0; 1236 } 1237 1238 blk_mq_free_request(rq); 1239 1240 if (status) { 1241 dev_err(ctrl->device, 1242 "failed nvme_keep_alive_end_io error=%d\n", 1243 status); 1244 return RQ_END_IO_NONE; 1245 } 1246 1247 ctrl->ka_last_check_time = jiffies; 1248 ctrl->comp_seen = false; 1249 spin_lock_irqsave(&ctrl->lock, flags); 1250 if (ctrl->state == NVME_CTRL_LIVE || 1251 ctrl->state == NVME_CTRL_CONNECTING) 1252 startka = true; 1253 spin_unlock_irqrestore(&ctrl->lock, flags); 1254 if (startka) 1255 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1256 return RQ_END_IO_NONE; 1257 } 1258 1259 static void nvme_keep_alive_work(struct work_struct *work) 1260 { 1261 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 1262 struct nvme_ctrl, ka_work); 1263 bool comp_seen = ctrl->comp_seen; 1264 struct request *rq; 1265 1266 ctrl->ka_last_check_time = jiffies; 1267 1268 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 1269 dev_dbg(ctrl->device, 1270 "reschedule traffic based keep-alive timer\n"); 1271 ctrl->comp_seen = false; 1272 nvme_queue_keep_alive_work(ctrl); 1273 return; 1274 } 1275 1276 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd), 1277 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT); 1278 if (IS_ERR(rq)) { 1279 /* allocation failure, reset the controller */ 1280 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq)); 1281 nvme_reset_ctrl(ctrl); 1282 return; 1283 } 1284 nvme_init_request(rq, &ctrl->ka_cmd); 1285 1286 rq->timeout = ctrl->kato * HZ; 1287 rq->end_io = nvme_keep_alive_end_io; 1288 rq->end_io_data = ctrl; 1289 blk_execute_rq_nowait(rq, false); 1290 } 1291 1292 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 1293 { 1294 if (unlikely(ctrl->kato == 0)) 1295 return; 1296 1297 nvme_queue_keep_alive_work(ctrl); 1298 } 1299 1300 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 1301 { 1302 if (unlikely(ctrl->kato == 0)) 1303 return; 1304 1305 cancel_delayed_work_sync(&ctrl->ka_work); 1306 } 1307 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 1308 1309 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 1310 struct nvme_command *cmd) 1311 { 1312 unsigned int new_kato = 1313 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000); 1314 1315 dev_info(ctrl->device, 1316 "keep alive interval updated from %u ms to %u ms\n", 1317 ctrl->kato * 1000 / 2, new_kato * 1000 / 2); 1318 1319 nvme_stop_keep_alive(ctrl); 1320 ctrl->kato = new_kato; 1321 nvme_start_keep_alive(ctrl); 1322 } 1323 1324 /* 1325 * In NVMe 1.0 the CNS field was just a binary controller or namespace 1326 * flag, thus sending any new CNS opcodes has a big chance of not working. 1327 * Qemu unfortunately had that bug after reporting a 1.1 version compliance 1328 * (but not for any later version). 1329 */ 1330 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl) 1331 { 1332 if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS) 1333 return ctrl->vs < NVME_VS(1, 2, 0); 1334 return ctrl->vs < NVME_VS(1, 1, 0); 1335 } 1336 1337 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 1338 { 1339 struct nvme_command c = { }; 1340 int error; 1341 1342 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1343 c.identify.opcode = nvme_admin_identify; 1344 c.identify.cns = NVME_ID_CNS_CTRL; 1345 1346 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 1347 if (!*id) 1348 return -ENOMEM; 1349 1350 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 1351 sizeof(struct nvme_id_ctrl)); 1352 if (error) 1353 kfree(*id); 1354 return error; 1355 } 1356 1357 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, 1358 struct nvme_ns_id_desc *cur, bool *csi_seen) 1359 { 1360 const char *warn_str = "ctrl returned bogus length:"; 1361 void *data = cur; 1362 1363 switch (cur->nidt) { 1364 case NVME_NIDT_EUI64: 1365 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1366 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n", 1367 warn_str, cur->nidl); 1368 return -1; 1369 } 1370 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1371 return NVME_NIDT_EUI64_LEN; 1372 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN); 1373 return NVME_NIDT_EUI64_LEN; 1374 case NVME_NIDT_NGUID: 1375 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1376 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n", 1377 warn_str, cur->nidl); 1378 return -1; 1379 } 1380 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1381 return NVME_NIDT_NGUID_LEN; 1382 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN); 1383 return NVME_NIDT_NGUID_LEN; 1384 case NVME_NIDT_UUID: 1385 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1386 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n", 1387 warn_str, cur->nidl); 1388 return -1; 1389 } 1390 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1391 return NVME_NIDT_UUID_LEN; 1392 uuid_copy(&ids->uuid, data + sizeof(*cur)); 1393 return NVME_NIDT_UUID_LEN; 1394 case NVME_NIDT_CSI: 1395 if (cur->nidl != NVME_NIDT_CSI_LEN) { 1396 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n", 1397 warn_str, cur->nidl); 1398 return -1; 1399 } 1400 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN); 1401 *csi_seen = true; 1402 return NVME_NIDT_CSI_LEN; 1403 default: 1404 /* Skip unknown types */ 1405 return cur->nidl; 1406 } 1407 } 1408 1409 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, 1410 struct nvme_ns_info *info) 1411 { 1412 struct nvme_command c = { }; 1413 bool csi_seen = false; 1414 int status, pos, len; 1415 void *data; 1416 1417 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl)) 1418 return 0; 1419 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST) 1420 return 0; 1421 1422 c.identify.opcode = nvme_admin_identify; 1423 c.identify.nsid = cpu_to_le32(info->nsid); 1424 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1425 1426 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1427 if (!data) 1428 return -ENOMEM; 1429 1430 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1431 NVME_IDENTIFY_DATA_SIZE); 1432 if (status) { 1433 dev_warn(ctrl->device, 1434 "Identify Descriptors failed (nsid=%u, status=0x%x)\n", 1435 info->nsid, status); 1436 goto free_data; 1437 } 1438 1439 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1440 struct nvme_ns_id_desc *cur = data + pos; 1441 1442 if (cur->nidl == 0) 1443 break; 1444 1445 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen); 1446 if (len < 0) 1447 break; 1448 1449 len += sizeof(*cur); 1450 } 1451 1452 if (nvme_multi_css(ctrl) && !csi_seen) { 1453 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n", 1454 info->nsid); 1455 status = -EINVAL; 1456 } 1457 1458 free_data: 1459 kfree(data); 1460 return status; 1461 } 1462 1463 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1464 struct nvme_id_ns **id) 1465 { 1466 struct nvme_command c = { }; 1467 int error; 1468 1469 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1470 c.identify.opcode = nvme_admin_identify; 1471 c.identify.nsid = cpu_to_le32(nsid); 1472 c.identify.cns = NVME_ID_CNS_NS; 1473 1474 *id = kmalloc(sizeof(**id), GFP_KERNEL); 1475 if (!*id) 1476 return -ENOMEM; 1477 1478 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id)); 1479 if (error) { 1480 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error); 1481 kfree(*id); 1482 } 1483 return error; 1484 } 1485 1486 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl, 1487 struct nvme_ns_info *info) 1488 { 1489 struct nvme_ns_ids *ids = &info->ids; 1490 struct nvme_id_ns *id; 1491 int ret; 1492 1493 ret = nvme_identify_ns(ctrl, info->nsid, &id); 1494 if (ret) 1495 return ret; 1496 1497 if (id->ncap == 0) { 1498 /* namespace not allocated or attached */ 1499 info->is_removed = true; 1500 ret = -ENODEV; 1501 goto error; 1502 } 1503 1504 info->anagrpid = id->anagrpid; 1505 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1506 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1507 info->is_ready = true; 1508 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) { 1509 dev_info(ctrl->device, 1510 "Ignoring bogus Namespace Identifiers\n"); 1511 } else { 1512 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1513 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 1514 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64)); 1515 if (ctrl->vs >= NVME_VS(1, 2, 0) && 1516 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 1517 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid)); 1518 } 1519 1520 error: 1521 kfree(id); 1522 return ret; 1523 } 1524 1525 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl, 1526 struct nvme_ns_info *info) 1527 { 1528 struct nvme_id_ns_cs_indep *id; 1529 struct nvme_command c = { 1530 .identify.opcode = nvme_admin_identify, 1531 .identify.nsid = cpu_to_le32(info->nsid), 1532 .identify.cns = NVME_ID_CNS_NS_CS_INDEP, 1533 }; 1534 int ret; 1535 1536 id = kmalloc(sizeof(*id), GFP_KERNEL); 1537 if (!id) 1538 return -ENOMEM; 1539 1540 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 1541 if (!ret) { 1542 info->anagrpid = id->anagrpid; 1543 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1544 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1545 info->is_ready = id->nstat & NVME_NSTAT_NRDY; 1546 } 1547 kfree(id); 1548 return ret; 1549 } 1550 1551 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, 1552 unsigned int dword11, void *buffer, size_t buflen, u32 *result) 1553 { 1554 union nvme_result res = { 0 }; 1555 struct nvme_command c = { }; 1556 int ret; 1557 1558 c.features.opcode = op; 1559 c.features.fid = cpu_to_le32(fid); 1560 c.features.dword11 = cpu_to_le32(dword11); 1561 1562 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1563 buffer, buflen, NVME_QID_ANY, 0, 0); 1564 if (ret >= 0 && result) 1565 *result = le32_to_cpu(res.u32); 1566 return ret; 1567 } 1568 1569 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1570 unsigned int dword11, void *buffer, size_t buflen, 1571 u32 *result) 1572 { 1573 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer, 1574 buflen, result); 1575 } 1576 EXPORT_SYMBOL_GPL(nvme_set_features); 1577 1578 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1579 unsigned int dword11, void *buffer, size_t buflen, 1580 u32 *result) 1581 { 1582 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer, 1583 buflen, result); 1584 } 1585 EXPORT_SYMBOL_GPL(nvme_get_features); 1586 1587 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1588 { 1589 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1590 u32 result; 1591 int status, nr_io_queues; 1592 1593 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1594 &result); 1595 if (status < 0) 1596 return status; 1597 1598 /* 1599 * Degraded controllers might return an error when setting the queue 1600 * count. We still want to be able to bring them online and offer 1601 * access to the admin queue, as that might be only way to fix them up. 1602 */ 1603 if (status > 0) { 1604 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1605 *count = 0; 1606 } else { 1607 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1608 *count = min(*count, nr_io_queues); 1609 } 1610 1611 return 0; 1612 } 1613 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1614 1615 #define NVME_AEN_SUPPORTED \ 1616 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ 1617 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) 1618 1619 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1620 { 1621 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1622 int status; 1623 1624 if (!supported_aens) 1625 return; 1626 1627 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1628 NULL, 0, &result); 1629 if (status) 1630 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1631 supported_aens); 1632 1633 queue_work(nvme_wq, &ctrl->async_event_work); 1634 } 1635 1636 static int nvme_ns_open(struct nvme_ns *ns) 1637 { 1638 1639 /* should never be called due to GENHD_FL_HIDDEN */ 1640 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head))) 1641 goto fail; 1642 if (!nvme_get_ns(ns)) 1643 goto fail; 1644 if (!try_module_get(ns->ctrl->ops->module)) 1645 goto fail_put_ns; 1646 1647 return 0; 1648 1649 fail_put_ns: 1650 nvme_put_ns(ns); 1651 fail: 1652 return -ENXIO; 1653 } 1654 1655 static void nvme_ns_release(struct nvme_ns *ns) 1656 { 1657 1658 module_put(ns->ctrl->ops->module); 1659 nvme_put_ns(ns); 1660 } 1661 1662 static int nvme_open(struct gendisk *disk, blk_mode_t mode) 1663 { 1664 return nvme_ns_open(disk->private_data); 1665 } 1666 1667 static void nvme_release(struct gendisk *disk) 1668 { 1669 nvme_ns_release(disk->private_data); 1670 } 1671 1672 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1673 { 1674 /* some standard values */ 1675 geo->heads = 1 << 6; 1676 geo->sectors = 1 << 5; 1677 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1678 return 0; 1679 } 1680 1681 #ifdef CONFIG_BLK_DEV_INTEGRITY 1682 static void nvme_init_integrity(struct gendisk *disk, 1683 struct nvme_ns_head *head, u32 max_integrity_segments) 1684 { 1685 struct blk_integrity integrity = { }; 1686 1687 switch (head->pi_type) { 1688 case NVME_NS_DPS_PI_TYPE3: 1689 switch (head->guard_type) { 1690 case NVME_NVM_NS_16B_GUARD: 1691 integrity.profile = &t10_pi_type3_crc; 1692 integrity.tag_size = sizeof(u16) + sizeof(u32); 1693 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1694 break; 1695 case NVME_NVM_NS_64B_GUARD: 1696 integrity.profile = &ext_pi_type3_crc64; 1697 integrity.tag_size = sizeof(u16) + 6; 1698 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1699 break; 1700 default: 1701 integrity.profile = NULL; 1702 break; 1703 } 1704 break; 1705 case NVME_NS_DPS_PI_TYPE1: 1706 case NVME_NS_DPS_PI_TYPE2: 1707 switch (head->guard_type) { 1708 case NVME_NVM_NS_16B_GUARD: 1709 integrity.profile = &t10_pi_type1_crc; 1710 integrity.tag_size = sizeof(u16); 1711 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1712 break; 1713 case NVME_NVM_NS_64B_GUARD: 1714 integrity.profile = &ext_pi_type1_crc64; 1715 integrity.tag_size = sizeof(u16); 1716 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1717 break; 1718 default: 1719 integrity.profile = NULL; 1720 break; 1721 } 1722 break; 1723 default: 1724 integrity.profile = NULL; 1725 break; 1726 } 1727 1728 integrity.tuple_size = head->ms; 1729 blk_integrity_register(disk, &integrity); 1730 blk_queue_max_integrity_segments(disk->queue, max_integrity_segments); 1731 } 1732 #else 1733 static void nvme_init_integrity(struct gendisk *disk, 1734 struct nvme_ns_head *head, u32 max_integrity_segments) 1735 { 1736 } 1737 #endif /* CONFIG_BLK_DEV_INTEGRITY */ 1738 1739 static void nvme_config_discard(struct nvme_ctrl *ctrl, struct gendisk *disk, 1740 struct nvme_ns_head *head) 1741 { 1742 struct request_queue *queue = disk->queue; 1743 u32 max_discard_sectors; 1744 1745 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(head, UINT_MAX)) { 1746 max_discard_sectors = nvme_lba_to_sect(head, ctrl->dmrsl); 1747 } else if (ctrl->oncs & NVME_CTRL_ONCS_DSM) { 1748 max_discard_sectors = UINT_MAX; 1749 } else { 1750 blk_queue_max_discard_sectors(queue, 0); 1751 return; 1752 } 1753 1754 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) < 1755 NVME_DSM_MAX_RANGES); 1756 1757 /* 1758 * If discard is already enabled, don't reset queue limits. 1759 * 1760 * This works around the fact that the block layer can't cope well with 1761 * updating the hardware limits when overridden through sysfs. This is 1762 * harmless because discard limits in NVMe are purely advisory. 1763 */ 1764 if (queue->limits.max_discard_sectors) 1765 return; 1766 1767 blk_queue_max_discard_sectors(queue, max_discard_sectors); 1768 if (ctrl->dmrl) 1769 blk_queue_max_discard_segments(queue, ctrl->dmrl); 1770 else 1771 blk_queue_max_discard_segments(queue, NVME_DSM_MAX_RANGES); 1772 queue->limits.discard_granularity = queue_logical_block_size(queue); 1773 1774 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 1775 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX); 1776 } 1777 1778 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 1779 { 1780 return uuid_equal(&a->uuid, &b->uuid) && 1781 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 1782 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 && 1783 a->csi == b->csi; 1784 } 1785 1786 static int nvme_init_ms(struct nvme_ctrl *ctrl, struct nvme_ns_head *head, 1787 struct nvme_id_ns *id) 1788 { 1789 bool first = id->dps & NVME_NS_DPS_PI_FIRST; 1790 unsigned lbaf = nvme_lbaf_index(id->flbas); 1791 struct nvme_command c = { }; 1792 struct nvme_id_ns_nvm *nvm; 1793 int ret = 0; 1794 u32 elbaf; 1795 1796 head->pi_size = 0; 1797 head->ms = le16_to_cpu(id->lbaf[lbaf].ms); 1798 if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) { 1799 head->pi_size = sizeof(struct t10_pi_tuple); 1800 head->guard_type = NVME_NVM_NS_16B_GUARD; 1801 goto set_pi; 1802 } 1803 1804 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); 1805 if (!nvm) 1806 return -ENOMEM; 1807 1808 c.identify.opcode = nvme_admin_identify; 1809 c.identify.nsid = cpu_to_le32(head->ns_id); 1810 c.identify.cns = NVME_ID_CNS_CS_NS; 1811 c.identify.csi = NVME_CSI_NVM; 1812 1813 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, nvm, sizeof(*nvm)); 1814 if (ret) 1815 goto free_data; 1816 1817 elbaf = le32_to_cpu(nvm->elbaf[lbaf]); 1818 1819 /* no support for storage tag formats right now */ 1820 if (nvme_elbaf_sts(elbaf)) 1821 goto free_data; 1822 1823 head->guard_type = nvme_elbaf_guard_type(elbaf); 1824 switch (head->guard_type) { 1825 case NVME_NVM_NS_64B_GUARD: 1826 head->pi_size = sizeof(struct crc64_pi_tuple); 1827 break; 1828 case NVME_NVM_NS_16B_GUARD: 1829 head->pi_size = sizeof(struct t10_pi_tuple); 1830 break; 1831 default: 1832 break; 1833 } 1834 1835 free_data: 1836 kfree(nvm); 1837 set_pi: 1838 if (head->pi_size && (first || head->ms == head->pi_size)) 1839 head->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1840 else 1841 head->pi_type = 0; 1842 1843 return ret; 1844 } 1845 1846 static int nvme_configure_metadata(struct nvme_ctrl *ctrl, 1847 struct nvme_ns_head *head, struct nvme_id_ns *id) 1848 { 1849 int ret; 1850 1851 ret = nvme_init_ms(ctrl, head, id); 1852 if (ret) 1853 return ret; 1854 1855 head->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS); 1856 if (!head->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 1857 return 0; 1858 1859 if (ctrl->ops->flags & NVME_F_FABRICS) { 1860 /* 1861 * The NVMe over Fabrics specification only supports metadata as 1862 * part of the extended data LBA. We rely on HCA/HBA support to 1863 * remap the separate metadata buffer from the block layer. 1864 */ 1865 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT))) 1866 return 0; 1867 1868 head->features |= NVME_NS_EXT_LBAS; 1869 1870 /* 1871 * The current fabrics transport drivers support namespace 1872 * metadata formats only if nvme_ns_has_pi() returns true. 1873 * Suppress support for all other formats so the namespace will 1874 * have a 0 capacity and not be usable through the block stack. 1875 * 1876 * Note, this check will need to be modified if any drivers 1877 * gain the ability to use other metadata formats. 1878 */ 1879 if (ctrl->max_integrity_segments && nvme_ns_has_pi(head)) 1880 head->features |= NVME_NS_METADATA_SUPPORTED; 1881 } else { 1882 /* 1883 * For PCIe controllers, we can't easily remap the separate 1884 * metadata buffer from the block layer and thus require a 1885 * separate metadata buffer for block layer metadata/PI support. 1886 * We allow extended LBAs for the passthrough interface, though. 1887 */ 1888 if (id->flbas & NVME_NS_FLBAS_META_EXT) 1889 head->features |= NVME_NS_EXT_LBAS; 1890 else 1891 head->features |= NVME_NS_METADATA_SUPPORTED; 1892 } 1893 return 0; 1894 } 1895 1896 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl, 1897 struct request_queue *q) 1898 { 1899 bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT; 1900 1901 if (ctrl->max_hw_sectors) { 1902 u32 max_segments = 1903 (ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1; 1904 1905 max_segments = min_not_zero(max_segments, ctrl->max_segments); 1906 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors); 1907 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX)); 1908 } 1909 blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1); 1910 blk_queue_dma_alignment(q, 3); 1911 blk_queue_write_cache(q, vwc, vwc); 1912 } 1913 1914 static void nvme_update_disk_info(struct nvme_ctrl *ctrl, struct gendisk *disk, 1915 struct nvme_ns_head *head, struct nvme_id_ns *id) 1916 { 1917 sector_t capacity = nvme_lba_to_sect(head, le64_to_cpu(id->nsze)); 1918 u32 bs = 1U << head->lba_shift; 1919 u32 atomic_bs, phys_bs, io_opt = 0; 1920 1921 /* 1922 * The block layer can't support LBA sizes larger than the page size 1923 * or smaller than a sector size yet, so catch this early and don't 1924 * allow block I/O. 1925 */ 1926 if (head->lba_shift > PAGE_SHIFT || head->lba_shift < SECTOR_SHIFT) { 1927 capacity = 0; 1928 bs = (1 << 9); 1929 } 1930 1931 blk_integrity_unregister(disk); 1932 1933 atomic_bs = phys_bs = bs; 1934 if (id->nabo == 0) { 1935 /* 1936 * Bit 1 indicates whether NAWUPF is defined for this namespace 1937 * and whether it should be used instead of AWUPF. If NAWUPF == 1938 * 0 then AWUPF must be used instead. 1939 */ 1940 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) 1941 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs; 1942 else 1943 atomic_bs = (1 + ctrl->subsys->awupf) * bs; 1944 } 1945 1946 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) { 1947 /* NPWG = Namespace Preferred Write Granularity */ 1948 phys_bs = bs * (1 + le16_to_cpu(id->npwg)); 1949 /* NOWS = Namespace Optimal Write Size */ 1950 io_opt = bs * (1 + le16_to_cpu(id->nows)); 1951 } 1952 1953 blk_queue_logical_block_size(disk->queue, bs); 1954 /* 1955 * Linux filesystems assume writing a single physical block is 1956 * an atomic operation. Hence limit the physical block size to the 1957 * value of the Atomic Write Unit Power Fail parameter. 1958 */ 1959 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs)); 1960 blk_queue_io_min(disk->queue, phys_bs); 1961 blk_queue_io_opt(disk->queue, io_opt); 1962 1963 /* 1964 * Register a metadata profile for PI, or the plain non-integrity NVMe 1965 * metadata masquerading as Type 0 if supported, otherwise reject block 1966 * I/O to namespaces with metadata except when the namespace supports 1967 * PI, as it can strip/insert in that case. 1968 */ 1969 if (head->ms) { 1970 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 1971 (head->features & NVME_NS_METADATA_SUPPORTED)) 1972 nvme_init_integrity(disk, head, 1973 ctrl->max_integrity_segments); 1974 else if (!nvme_ns_has_pi(head)) 1975 capacity = 0; 1976 } 1977 1978 set_capacity_and_notify(disk, capacity); 1979 1980 nvme_config_discard(ctrl, disk, head); 1981 blk_queue_max_write_zeroes_sectors(disk->queue, 1982 ctrl->max_zeroes_sectors); 1983 } 1984 1985 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info) 1986 { 1987 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags); 1988 } 1989 1990 static inline bool nvme_first_scan(struct gendisk *disk) 1991 { 1992 /* nvme_alloc_ns() scans the disk prior to adding it */ 1993 return !disk_live(disk); 1994 } 1995 1996 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id) 1997 { 1998 struct nvme_ctrl *ctrl = ns->ctrl; 1999 u32 iob; 2000 2001 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 2002 is_power_of_2(ctrl->max_hw_sectors)) 2003 iob = ctrl->max_hw_sectors; 2004 else 2005 iob = nvme_lba_to_sect(ns->head, le16_to_cpu(id->noiob)); 2006 2007 if (!iob) 2008 return; 2009 2010 if (!is_power_of_2(iob)) { 2011 if (nvme_first_scan(ns->disk)) 2012 pr_warn("%s: ignoring unaligned IO boundary:%u\n", 2013 ns->disk->disk_name, iob); 2014 return; 2015 } 2016 2017 if (blk_queue_is_zoned(ns->disk->queue)) { 2018 if (nvme_first_scan(ns->disk)) 2019 pr_warn("%s: ignoring zoned namespace IO boundary\n", 2020 ns->disk->disk_name); 2021 return; 2022 } 2023 2024 blk_queue_chunk_sectors(ns->queue, iob); 2025 } 2026 2027 static int nvme_update_ns_info_generic(struct nvme_ns *ns, 2028 struct nvme_ns_info *info) 2029 { 2030 blk_mq_freeze_queue(ns->disk->queue); 2031 nvme_set_queue_limits(ns->ctrl, ns->queue); 2032 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2033 blk_mq_unfreeze_queue(ns->disk->queue); 2034 2035 if (nvme_ns_head_multipath(ns->head)) { 2036 blk_mq_freeze_queue(ns->head->disk->queue); 2037 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2038 nvme_mpath_revalidate_paths(ns); 2039 blk_stack_limits(&ns->head->disk->queue->limits, 2040 &ns->queue->limits, 0); 2041 ns->head->disk->flags |= GENHD_FL_HIDDEN; 2042 blk_mq_unfreeze_queue(ns->head->disk->queue); 2043 } 2044 2045 /* Hide the block-interface for these devices */ 2046 ns->disk->flags |= GENHD_FL_HIDDEN; 2047 set_bit(NVME_NS_READY, &ns->flags); 2048 2049 return 0; 2050 } 2051 2052 static int nvme_update_ns_info_block(struct nvme_ns *ns, 2053 struct nvme_ns_info *info) 2054 { 2055 struct nvme_id_ns *id; 2056 unsigned lbaf; 2057 int ret; 2058 2059 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id); 2060 if (ret) 2061 return ret; 2062 2063 if (id->ncap == 0) { 2064 /* namespace not allocated or attached */ 2065 info->is_removed = true; 2066 ret = -ENODEV; 2067 goto error; 2068 } 2069 2070 blk_mq_freeze_queue(ns->disk->queue); 2071 lbaf = nvme_lbaf_index(id->flbas); 2072 ns->head->lba_shift = id->lbaf[lbaf].ds; 2073 ns->head->nuse = le64_to_cpu(id->nuse); 2074 nvme_set_queue_limits(ns->ctrl, ns->queue); 2075 2076 ret = nvme_configure_metadata(ns->ctrl, ns->head, id); 2077 if (ret < 0) { 2078 blk_mq_unfreeze_queue(ns->disk->queue); 2079 goto out; 2080 } 2081 nvme_set_chunk_sectors(ns, id); 2082 nvme_update_disk_info(ns->ctrl, ns->disk, ns->head, id); 2083 2084 if (ns->head->ids.csi == NVME_CSI_ZNS) { 2085 ret = nvme_update_zone_info(ns, lbaf); 2086 if (ret) { 2087 blk_mq_unfreeze_queue(ns->disk->queue); 2088 goto out; 2089 } 2090 } 2091 2092 /* 2093 * Only set the DEAC bit if the device guarantees that reads from 2094 * deallocated data return zeroes. While the DEAC bit does not 2095 * require that, it must be a no-op if reads from deallocated data 2096 * do not return zeroes. 2097 */ 2098 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3))) 2099 ns->head->features |= NVME_NS_DEAC; 2100 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2101 set_bit(NVME_NS_READY, &ns->flags); 2102 blk_mq_unfreeze_queue(ns->disk->queue); 2103 2104 if (blk_queue_is_zoned(ns->queue)) { 2105 ret = nvme_revalidate_zones(ns); 2106 if (ret && !nvme_first_scan(ns->disk)) 2107 goto out; 2108 } 2109 2110 if (nvme_ns_head_multipath(ns->head)) { 2111 blk_mq_freeze_queue(ns->head->disk->queue); 2112 nvme_update_disk_info(ns->ctrl, ns->head->disk, ns->head, id); 2113 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2114 nvme_mpath_revalidate_paths(ns); 2115 blk_stack_limits(&ns->head->disk->queue->limits, 2116 &ns->queue->limits, 0); 2117 disk_update_readahead(ns->head->disk); 2118 blk_mq_unfreeze_queue(ns->head->disk->queue); 2119 } 2120 2121 ret = 0; 2122 out: 2123 /* 2124 * If probing fails due an unsupported feature, hide the block device, 2125 * but still allow other access. 2126 */ 2127 if (ret == -ENODEV) { 2128 ns->disk->flags |= GENHD_FL_HIDDEN; 2129 set_bit(NVME_NS_READY, &ns->flags); 2130 ret = 0; 2131 } 2132 2133 error: 2134 kfree(id); 2135 return ret; 2136 } 2137 2138 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info) 2139 { 2140 switch (info->ids.csi) { 2141 case NVME_CSI_ZNS: 2142 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 2143 dev_info(ns->ctrl->device, 2144 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n", 2145 info->nsid); 2146 return nvme_update_ns_info_generic(ns, info); 2147 } 2148 return nvme_update_ns_info_block(ns, info); 2149 case NVME_CSI_NVM: 2150 return nvme_update_ns_info_block(ns, info); 2151 default: 2152 dev_info(ns->ctrl->device, 2153 "block device for nsid %u not supported (csi %u)\n", 2154 info->nsid, info->ids.csi); 2155 return nvme_update_ns_info_generic(ns, info); 2156 } 2157 } 2158 2159 #ifdef CONFIG_BLK_SED_OPAL 2160 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2161 bool send) 2162 { 2163 struct nvme_ctrl *ctrl = data; 2164 struct nvme_command cmd = { }; 2165 2166 if (send) 2167 cmd.common.opcode = nvme_admin_security_send; 2168 else 2169 cmd.common.opcode = nvme_admin_security_recv; 2170 cmd.common.nsid = 0; 2171 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 2172 cmd.common.cdw11 = cpu_to_le32(len); 2173 2174 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 2175 NVME_QID_ANY, 1, 0); 2176 } 2177 2178 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2179 { 2180 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) { 2181 if (!ctrl->opal_dev) 2182 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit); 2183 else if (was_suspended) 2184 opal_unlock_from_suspend(ctrl->opal_dev); 2185 } else { 2186 free_opal_dev(ctrl->opal_dev); 2187 ctrl->opal_dev = NULL; 2188 } 2189 } 2190 #else 2191 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2192 { 2193 } 2194 #endif /* CONFIG_BLK_SED_OPAL */ 2195 2196 #ifdef CONFIG_BLK_DEV_ZONED 2197 static int nvme_report_zones(struct gendisk *disk, sector_t sector, 2198 unsigned int nr_zones, report_zones_cb cb, void *data) 2199 { 2200 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb, 2201 data); 2202 } 2203 #else 2204 #define nvme_report_zones NULL 2205 #endif /* CONFIG_BLK_DEV_ZONED */ 2206 2207 const struct block_device_operations nvme_bdev_ops = { 2208 .owner = THIS_MODULE, 2209 .ioctl = nvme_ioctl, 2210 .compat_ioctl = blkdev_compat_ptr_ioctl, 2211 .open = nvme_open, 2212 .release = nvme_release, 2213 .getgeo = nvme_getgeo, 2214 .report_zones = nvme_report_zones, 2215 .pr_ops = &nvme_pr_ops, 2216 }; 2217 2218 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val, 2219 u32 timeout, const char *op) 2220 { 2221 unsigned long timeout_jiffies = jiffies + timeout * HZ; 2222 u32 csts; 2223 int ret; 2224 2225 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2226 if (csts == ~0) 2227 return -ENODEV; 2228 if ((csts & mask) == val) 2229 break; 2230 2231 usleep_range(1000, 2000); 2232 if (fatal_signal_pending(current)) 2233 return -EINTR; 2234 if (time_after(jiffies, timeout_jiffies)) { 2235 dev_err(ctrl->device, 2236 "Device not ready; aborting %s, CSTS=0x%x\n", 2237 op, csts); 2238 return -ENODEV; 2239 } 2240 } 2241 2242 return ret; 2243 } 2244 2245 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown) 2246 { 2247 int ret; 2248 2249 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2250 if (shutdown) 2251 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 2252 else 2253 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 2254 2255 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2256 if (ret) 2257 return ret; 2258 2259 if (shutdown) { 2260 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK, 2261 NVME_CSTS_SHST_CMPLT, 2262 ctrl->shutdown_timeout, "shutdown"); 2263 } 2264 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 2265 msleep(NVME_QUIRK_DELAY_AMOUNT); 2266 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0, 2267 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset"); 2268 } 2269 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 2270 2271 int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 2272 { 2273 unsigned dev_page_min; 2274 u32 timeout; 2275 int ret; 2276 2277 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2278 if (ret) { 2279 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2280 return ret; 2281 } 2282 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2283 2284 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) { 2285 dev_err(ctrl->device, 2286 "Minimum device page size %u too large for host (%u)\n", 2287 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT); 2288 return -ENODEV; 2289 } 2290 2291 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI) 2292 ctrl->ctrl_config = NVME_CC_CSS_CSI; 2293 else 2294 ctrl->ctrl_config = NVME_CC_CSS_NVM; 2295 2296 if (ctrl->cap & NVME_CAP_CRMS_CRWMS && ctrl->cap & NVME_CAP_CRMS_CRIMS) 2297 ctrl->ctrl_config |= NVME_CC_CRIME; 2298 2299 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; 2300 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 2301 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 2302 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2303 if (ret) 2304 return ret; 2305 2306 /* Flush write to device (required if transport is PCI) */ 2307 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config); 2308 if (ret) 2309 return ret; 2310 2311 /* CAP value may change after initial CC write */ 2312 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2313 if (ret) 2314 return ret; 2315 2316 timeout = NVME_CAP_TIMEOUT(ctrl->cap); 2317 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) { 2318 u32 crto, ready_timeout; 2319 2320 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto); 2321 if (ret) { 2322 dev_err(ctrl->device, "Reading CRTO failed (%d)\n", 2323 ret); 2324 return ret; 2325 } 2326 2327 /* 2328 * CRTO should always be greater or equal to CAP.TO, but some 2329 * devices are known to get this wrong. Use the larger of the 2330 * two values. 2331 */ 2332 if (ctrl->ctrl_config & NVME_CC_CRIME) 2333 ready_timeout = NVME_CRTO_CRIMT(crto); 2334 else 2335 ready_timeout = NVME_CRTO_CRWMT(crto); 2336 2337 if (ready_timeout < timeout) 2338 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n", 2339 crto, ctrl->cap); 2340 else 2341 timeout = ready_timeout; 2342 } 2343 2344 ctrl->ctrl_config |= NVME_CC_ENABLE; 2345 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2346 if (ret) 2347 return ret; 2348 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY, 2349 (timeout + 1) / 2, "initialisation"); 2350 } 2351 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 2352 2353 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 2354 { 2355 __le64 ts; 2356 int ret; 2357 2358 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 2359 return 0; 2360 2361 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 2362 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 2363 NULL); 2364 if (ret) 2365 dev_warn_once(ctrl->device, 2366 "could not set timestamp (%d)\n", ret); 2367 return ret; 2368 } 2369 2370 static int nvme_configure_host_options(struct nvme_ctrl *ctrl) 2371 { 2372 struct nvme_feat_host_behavior *host; 2373 u8 acre = 0, lbafee = 0; 2374 int ret; 2375 2376 /* Don't bother enabling the feature if retry delay is not reported */ 2377 if (ctrl->crdt[0]) 2378 acre = NVME_ENABLE_ACRE; 2379 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) 2380 lbafee = NVME_ENABLE_LBAFEE; 2381 2382 if (!acre && !lbafee) 2383 return 0; 2384 2385 host = kzalloc(sizeof(*host), GFP_KERNEL); 2386 if (!host) 2387 return 0; 2388 2389 host->acre = acre; 2390 host->lbafee = lbafee; 2391 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 2392 host, sizeof(*host), NULL); 2393 kfree(host); 2394 return ret; 2395 } 2396 2397 /* 2398 * The function checks whether the given total (exlat + enlat) latency of 2399 * a power state allows the latter to be used as an APST transition target. 2400 * It does so by comparing the latency to the primary and secondary latency 2401 * tolerances defined by module params. If there's a match, the corresponding 2402 * timeout value is returned and the matching tolerance index (1 or 2) is 2403 * reported. 2404 */ 2405 static bool nvme_apst_get_transition_time(u64 total_latency, 2406 u64 *transition_time, unsigned *last_index) 2407 { 2408 if (total_latency <= apst_primary_latency_tol_us) { 2409 if (*last_index == 1) 2410 return false; 2411 *last_index = 1; 2412 *transition_time = apst_primary_timeout_ms; 2413 return true; 2414 } 2415 if (apst_secondary_timeout_ms && 2416 total_latency <= apst_secondary_latency_tol_us) { 2417 if (*last_index <= 2) 2418 return false; 2419 *last_index = 2; 2420 *transition_time = apst_secondary_timeout_ms; 2421 return true; 2422 } 2423 return false; 2424 } 2425 2426 /* 2427 * APST (Autonomous Power State Transition) lets us program a table of power 2428 * state transitions that the controller will perform automatically. 2429 * 2430 * Depending on module params, one of the two supported techniques will be used: 2431 * 2432 * - If the parameters provide explicit timeouts and tolerances, they will be 2433 * used to build a table with up to 2 non-operational states to transition to. 2434 * The default parameter values were selected based on the values used by 2435 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic 2436 * regeneration of the APST table in the event of switching between external 2437 * and battery power, the timeouts and tolerances reflect a compromise 2438 * between values used by Microsoft for AC and battery scenarios. 2439 * - If not, we'll configure the table with a simple heuristic: we are willing 2440 * to spend at most 2% of the time transitioning between power states. 2441 * Therefore, when running in any given state, we will enter the next 2442 * lower-power non-operational state after waiting 50 * (enlat + exlat) 2443 * microseconds, as long as that state's exit latency is under the requested 2444 * maximum latency. 2445 * 2446 * We will not autonomously enter any non-operational state for which the total 2447 * latency exceeds ps_max_latency_us. 2448 * 2449 * Users can set ps_max_latency_us to zero to turn off APST. 2450 */ 2451 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 2452 { 2453 struct nvme_feat_auto_pst *table; 2454 unsigned apste = 0; 2455 u64 max_lat_us = 0; 2456 __le64 target = 0; 2457 int max_ps = -1; 2458 int state; 2459 int ret; 2460 unsigned last_lt_index = UINT_MAX; 2461 2462 /* 2463 * If APST isn't supported or if we haven't been initialized yet, 2464 * then don't do anything. 2465 */ 2466 if (!ctrl->apsta) 2467 return 0; 2468 2469 if (ctrl->npss > 31) { 2470 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2471 return 0; 2472 } 2473 2474 table = kzalloc(sizeof(*table), GFP_KERNEL); 2475 if (!table) 2476 return 0; 2477 2478 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2479 /* Turn off APST. */ 2480 dev_dbg(ctrl->device, "APST disabled\n"); 2481 goto done; 2482 } 2483 2484 /* 2485 * Walk through all states from lowest- to highest-power. 2486 * According to the spec, lower-numbered states use more power. NPSS, 2487 * despite the name, is the index of the lowest-power state, not the 2488 * number of states. 2489 */ 2490 for (state = (int)ctrl->npss; state >= 0; state--) { 2491 u64 total_latency_us, exit_latency_us, transition_ms; 2492 2493 if (target) 2494 table->entries[state] = target; 2495 2496 /* 2497 * Don't allow transitions to the deepest state if it's quirked 2498 * off. 2499 */ 2500 if (state == ctrl->npss && 2501 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2502 continue; 2503 2504 /* 2505 * Is this state a useful non-operational state for higher-power 2506 * states to autonomously transition to? 2507 */ 2508 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE)) 2509 continue; 2510 2511 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2512 if (exit_latency_us > ctrl->ps_max_latency_us) 2513 continue; 2514 2515 total_latency_us = exit_latency_us + 2516 le32_to_cpu(ctrl->psd[state].entry_lat); 2517 2518 /* 2519 * This state is good. It can be used as the APST idle target 2520 * for higher power states. 2521 */ 2522 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) { 2523 if (!nvme_apst_get_transition_time(total_latency_us, 2524 &transition_ms, &last_lt_index)) 2525 continue; 2526 } else { 2527 transition_ms = total_latency_us + 19; 2528 do_div(transition_ms, 20); 2529 if (transition_ms > (1 << 24) - 1) 2530 transition_ms = (1 << 24) - 1; 2531 } 2532 2533 target = cpu_to_le64((state << 3) | (transition_ms << 8)); 2534 if (max_ps == -1) 2535 max_ps = state; 2536 if (total_latency_us > max_lat_us) 2537 max_lat_us = total_latency_us; 2538 } 2539 2540 if (max_ps == -1) 2541 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2542 else 2543 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2544 max_ps, max_lat_us, (int)sizeof(*table), table); 2545 apste = 1; 2546 2547 done: 2548 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2549 table, sizeof(*table), NULL); 2550 if (ret) 2551 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2552 kfree(table); 2553 return ret; 2554 } 2555 2556 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2557 { 2558 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2559 u64 latency; 2560 2561 switch (val) { 2562 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2563 case PM_QOS_LATENCY_ANY: 2564 latency = U64_MAX; 2565 break; 2566 2567 default: 2568 latency = val; 2569 } 2570 2571 if (ctrl->ps_max_latency_us != latency) { 2572 ctrl->ps_max_latency_us = latency; 2573 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 2574 nvme_configure_apst(ctrl); 2575 } 2576 } 2577 2578 struct nvme_core_quirk_entry { 2579 /* 2580 * NVMe model and firmware strings are padded with spaces. For 2581 * simplicity, strings in the quirk table are padded with NULLs 2582 * instead. 2583 */ 2584 u16 vid; 2585 const char *mn; 2586 const char *fr; 2587 unsigned long quirks; 2588 }; 2589 2590 static const struct nvme_core_quirk_entry core_quirks[] = { 2591 { 2592 /* 2593 * This Toshiba device seems to die using any APST states. See: 2594 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2595 */ 2596 .vid = 0x1179, 2597 .mn = "THNSF5256GPUK TOSHIBA", 2598 .quirks = NVME_QUIRK_NO_APST, 2599 }, 2600 { 2601 /* 2602 * This LiteON CL1-3D*-Q11 firmware version has a race 2603 * condition associated with actions related to suspend to idle 2604 * LiteON has resolved the problem in future firmware 2605 */ 2606 .vid = 0x14a4, 2607 .fr = "22301111", 2608 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 2609 }, 2610 { 2611 /* 2612 * This Kioxia CD6-V Series / HPE PE8030 device times out and 2613 * aborts I/O during any load, but more easily reproducible 2614 * with discards (fstrim). 2615 * 2616 * The device is left in a state where it is also not possible 2617 * to use "nvme set-feature" to disable APST, but booting with 2618 * nvme_core.default_ps_max_latency=0 works. 2619 */ 2620 .vid = 0x1e0f, 2621 .mn = "KCD6XVUL6T40", 2622 .quirks = NVME_QUIRK_NO_APST, 2623 }, 2624 { 2625 /* 2626 * The external Samsung X5 SSD fails initialization without a 2627 * delay before checking if it is ready and has a whole set of 2628 * other problems. To make this even more interesting, it 2629 * shares the PCI ID with internal Samsung 970 Evo Plus that 2630 * does not need or want these quirks. 2631 */ 2632 .vid = 0x144d, 2633 .mn = "Samsung Portable SSD X5", 2634 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY | 2635 NVME_QUIRK_NO_DEEPEST_PS | 2636 NVME_QUIRK_IGNORE_DEV_SUBNQN, 2637 } 2638 }; 2639 2640 /* match is null-terminated but idstr is space-padded. */ 2641 static bool string_matches(const char *idstr, const char *match, size_t len) 2642 { 2643 size_t matchlen; 2644 2645 if (!match) 2646 return true; 2647 2648 matchlen = strlen(match); 2649 WARN_ON_ONCE(matchlen > len); 2650 2651 if (memcmp(idstr, match, matchlen)) 2652 return false; 2653 2654 for (; matchlen < len; matchlen++) 2655 if (idstr[matchlen] != ' ') 2656 return false; 2657 2658 return true; 2659 } 2660 2661 static bool quirk_matches(const struct nvme_id_ctrl *id, 2662 const struct nvme_core_quirk_entry *q) 2663 { 2664 return q->vid == le16_to_cpu(id->vid) && 2665 string_matches(id->mn, q->mn, sizeof(id->mn)) && 2666 string_matches(id->fr, q->fr, sizeof(id->fr)); 2667 } 2668 2669 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 2670 struct nvme_id_ctrl *id) 2671 { 2672 size_t nqnlen; 2673 int off; 2674 2675 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 2676 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 2677 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 2678 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 2679 return; 2680 } 2681 2682 if (ctrl->vs >= NVME_VS(1, 2, 1)) 2683 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 2684 } 2685 2686 /* 2687 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe 2688 * Base Specification 2.0. It is slightly different from the format 2689 * specified there due to historic reasons, and we can't change it now. 2690 */ 2691 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 2692 "nqn.2014.08.org.nvmexpress:%04x%04x", 2693 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 2694 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 2695 off += sizeof(id->sn); 2696 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 2697 off += sizeof(id->mn); 2698 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 2699 } 2700 2701 static void nvme_release_subsystem(struct device *dev) 2702 { 2703 struct nvme_subsystem *subsys = 2704 container_of(dev, struct nvme_subsystem, dev); 2705 2706 if (subsys->instance >= 0) 2707 ida_free(&nvme_instance_ida, subsys->instance); 2708 kfree(subsys); 2709 } 2710 2711 static void nvme_destroy_subsystem(struct kref *ref) 2712 { 2713 struct nvme_subsystem *subsys = 2714 container_of(ref, struct nvme_subsystem, ref); 2715 2716 mutex_lock(&nvme_subsystems_lock); 2717 list_del(&subsys->entry); 2718 mutex_unlock(&nvme_subsystems_lock); 2719 2720 ida_destroy(&subsys->ns_ida); 2721 device_del(&subsys->dev); 2722 put_device(&subsys->dev); 2723 } 2724 2725 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 2726 { 2727 kref_put(&subsys->ref, nvme_destroy_subsystem); 2728 } 2729 2730 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 2731 { 2732 struct nvme_subsystem *subsys; 2733 2734 lockdep_assert_held(&nvme_subsystems_lock); 2735 2736 /* 2737 * Fail matches for discovery subsystems. This results 2738 * in each discovery controller bound to a unique subsystem. 2739 * This avoids issues with validating controller values 2740 * that can only be true when there is a single unique subsystem. 2741 * There may be multiple and completely independent entities 2742 * that provide discovery controllers. 2743 */ 2744 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME)) 2745 return NULL; 2746 2747 list_for_each_entry(subsys, &nvme_subsystems, entry) { 2748 if (strcmp(subsys->subnqn, subsysnqn)) 2749 continue; 2750 if (!kref_get_unless_zero(&subsys->ref)) 2751 continue; 2752 return subsys; 2753 } 2754 2755 return NULL; 2756 } 2757 2758 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl) 2759 { 2760 return ctrl->opts && ctrl->opts->discovery_nqn; 2761 } 2762 2763 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, 2764 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2765 { 2766 struct nvme_ctrl *tmp; 2767 2768 lockdep_assert_held(&nvme_subsystems_lock); 2769 2770 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) { 2771 if (nvme_state_terminal(tmp)) 2772 continue; 2773 2774 if (tmp->cntlid == ctrl->cntlid) { 2775 dev_err(ctrl->device, 2776 "Duplicate cntlid %u with %s, subsys %s, rejecting\n", 2777 ctrl->cntlid, dev_name(tmp->device), 2778 subsys->subnqn); 2779 return false; 2780 } 2781 2782 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) || 2783 nvme_discovery_ctrl(ctrl)) 2784 continue; 2785 2786 dev_err(ctrl->device, 2787 "Subsystem does not support multiple controllers\n"); 2788 return false; 2789 } 2790 2791 return true; 2792 } 2793 2794 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2795 { 2796 struct nvme_subsystem *subsys, *found; 2797 int ret; 2798 2799 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 2800 if (!subsys) 2801 return -ENOMEM; 2802 2803 subsys->instance = -1; 2804 mutex_init(&subsys->lock); 2805 kref_init(&subsys->ref); 2806 INIT_LIST_HEAD(&subsys->ctrls); 2807 INIT_LIST_HEAD(&subsys->nsheads); 2808 nvme_init_subnqn(subsys, ctrl, id); 2809 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 2810 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 2811 subsys->vendor_id = le16_to_cpu(id->vid); 2812 subsys->cmic = id->cmic; 2813 2814 /* Versions prior to 1.4 don't necessarily report a valid type */ 2815 if (id->cntrltype == NVME_CTRL_DISC || 2816 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME)) 2817 subsys->subtype = NVME_NQN_DISC; 2818 else 2819 subsys->subtype = NVME_NQN_NVME; 2820 2821 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) { 2822 dev_err(ctrl->device, 2823 "Subsystem %s is not a discovery controller", 2824 subsys->subnqn); 2825 kfree(subsys); 2826 return -EINVAL; 2827 } 2828 subsys->awupf = le16_to_cpu(id->awupf); 2829 nvme_mpath_default_iopolicy(subsys); 2830 2831 subsys->dev.class = nvme_subsys_class; 2832 subsys->dev.release = nvme_release_subsystem; 2833 subsys->dev.groups = nvme_subsys_attrs_groups; 2834 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance); 2835 device_initialize(&subsys->dev); 2836 2837 mutex_lock(&nvme_subsystems_lock); 2838 found = __nvme_find_get_subsystem(subsys->subnqn); 2839 if (found) { 2840 put_device(&subsys->dev); 2841 subsys = found; 2842 2843 if (!nvme_validate_cntlid(subsys, ctrl, id)) { 2844 ret = -EINVAL; 2845 goto out_put_subsystem; 2846 } 2847 } else { 2848 ret = device_add(&subsys->dev); 2849 if (ret) { 2850 dev_err(ctrl->device, 2851 "failed to register subsystem device.\n"); 2852 put_device(&subsys->dev); 2853 goto out_unlock; 2854 } 2855 ida_init(&subsys->ns_ida); 2856 list_add_tail(&subsys->entry, &nvme_subsystems); 2857 } 2858 2859 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 2860 dev_name(ctrl->device)); 2861 if (ret) { 2862 dev_err(ctrl->device, 2863 "failed to create sysfs link from subsystem.\n"); 2864 goto out_put_subsystem; 2865 } 2866 2867 if (!found) 2868 subsys->instance = ctrl->instance; 2869 ctrl->subsys = subsys; 2870 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 2871 mutex_unlock(&nvme_subsystems_lock); 2872 return 0; 2873 2874 out_put_subsystem: 2875 nvme_put_subsystem(subsys); 2876 out_unlock: 2877 mutex_unlock(&nvme_subsystems_lock); 2878 return ret; 2879 } 2880 2881 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 2882 void *log, size_t size, u64 offset) 2883 { 2884 struct nvme_command c = { }; 2885 u32 dwlen = nvme_bytes_to_numd(size); 2886 2887 c.get_log_page.opcode = nvme_admin_get_log_page; 2888 c.get_log_page.nsid = cpu_to_le32(nsid); 2889 c.get_log_page.lid = log_page; 2890 c.get_log_page.lsp = lsp; 2891 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 2892 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 2893 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 2894 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 2895 c.get_log_page.csi = csi; 2896 2897 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 2898 } 2899 2900 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi, 2901 struct nvme_effects_log **log) 2902 { 2903 struct nvme_effects_log *cel = xa_load(&ctrl->cels, csi); 2904 int ret; 2905 2906 if (cel) 2907 goto out; 2908 2909 cel = kzalloc(sizeof(*cel), GFP_KERNEL); 2910 if (!cel) 2911 return -ENOMEM; 2912 2913 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi, 2914 cel, sizeof(*cel), 0); 2915 if (ret) { 2916 kfree(cel); 2917 return ret; 2918 } 2919 2920 xa_store(&ctrl->cels, csi, cel, GFP_KERNEL); 2921 out: 2922 *log = cel; 2923 return 0; 2924 } 2925 2926 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units) 2927 { 2928 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val; 2929 2930 if (check_shl_overflow(1U, units + page_shift - 9, &val)) 2931 return UINT_MAX; 2932 return val; 2933 } 2934 2935 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl) 2936 { 2937 struct nvme_command c = { }; 2938 struct nvme_id_ctrl_nvm *id; 2939 int ret; 2940 2941 /* 2942 * Even though NVMe spec explicitly states that MDTS is not applicable 2943 * to the write-zeroes, we are cautious and limit the size to the 2944 * controllers max_hw_sectors value, which is based on the MDTS field 2945 * and possibly other limiting factors. 2946 */ 2947 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) && 2948 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)) 2949 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors; 2950 else 2951 ctrl->max_zeroes_sectors = 0; 2952 2953 if (ctrl->subsys->subtype != NVME_NQN_NVME || 2954 nvme_ctrl_limited_cns(ctrl) || 2955 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags)) 2956 return 0; 2957 2958 id = kzalloc(sizeof(*id), GFP_KERNEL); 2959 if (!id) 2960 return -ENOMEM; 2961 2962 c.identify.opcode = nvme_admin_identify; 2963 c.identify.cns = NVME_ID_CNS_CS_CTRL; 2964 c.identify.csi = NVME_CSI_NVM; 2965 2966 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 2967 if (ret) 2968 goto free_data; 2969 2970 ctrl->dmrl = id->dmrl; 2971 ctrl->dmrsl = le32_to_cpu(id->dmrsl); 2972 if (id->wzsl) 2973 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl); 2974 2975 free_data: 2976 if (ret > 0) 2977 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags); 2978 kfree(id); 2979 return ret; 2980 } 2981 2982 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl) 2983 { 2984 struct nvme_effects_log *log = ctrl->effects; 2985 2986 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 2987 NVME_CMD_EFFECTS_NCC | 2988 NVME_CMD_EFFECTS_CSE_MASK); 2989 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 2990 NVME_CMD_EFFECTS_CSE_MASK); 2991 2992 /* 2993 * The spec says the result of a security receive command depends on 2994 * the previous security send command. As such, many vendors log this 2995 * command as one to submitted only when no other commands to the same 2996 * namespace are outstanding. The intention is to tell the host to 2997 * prevent mixing security send and receive. 2998 * 2999 * This driver can only enforce such exclusive access against IO 3000 * queues, though. We are not readily able to enforce such a rule for 3001 * two commands to the admin queue, which is the only queue that 3002 * matters for this command. 3003 * 3004 * Rather than blindly freezing the IO queues for this effect that 3005 * doesn't even apply to IO, mask it off. 3006 */ 3007 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK); 3008 3009 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3010 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3011 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 3012 } 3013 3014 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 3015 { 3016 int ret = 0; 3017 3018 if (ctrl->effects) 3019 return 0; 3020 3021 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 3022 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 3023 if (ret < 0) 3024 return ret; 3025 } 3026 3027 if (!ctrl->effects) { 3028 ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL); 3029 if (!ctrl->effects) 3030 return -ENOMEM; 3031 xa_store(&ctrl->cels, NVME_CSI_NVM, ctrl->effects, GFP_KERNEL); 3032 } 3033 3034 nvme_init_known_nvm_effects(ctrl); 3035 return 0; 3036 } 3037 3038 static int nvme_check_ctrl_fabric_info(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 3039 { 3040 /* 3041 * In fabrics we need to verify the cntlid matches the 3042 * admin connect 3043 */ 3044 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 3045 dev_err(ctrl->device, 3046 "Mismatching cntlid: Connect %u vs Identify %u, rejecting\n", 3047 ctrl->cntlid, le16_to_cpu(id->cntlid)); 3048 return -EINVAL; 3049 } 3050 3051 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) { 3052 dev_err(ctrl->device, 3053 "keep-alive support is mandatory for fabrics\n"); 3054 return -EINVAL; 3055 } 3056 3057 if (!nvme_discovery_ctrl(ctrl) && ctrl->ioccsz < 4) { 3058 dev_err(ctrl->device, 3059 "I/O queue command capsule supported size %d < 4\n", 3060 ctrl->ioccsz); 3061 return -EINVAL; 3062 } 3063 3064 if (!nvme_discovery_ctrl(ctrl) && ctrl->iorcsz < 1) { 3065 dev_err(ctrl->device, 3066 "I/O queue response capsule supported size %d < 1\n", 3067 ctrl->iorcsz); 3068 return -EINVAL; 3069 } 3070 3071 return 0; 3072 } 3073 3074 static int nvme_init_identify(struct nvme_ctrl *ctrl) 3075 { 3076 struct nvme_id_ctrl *id; 3077 u32 max_hw_sectors; 3078 bool prev_apst_enabled; 3079 int ret; 3080 3081 ret = nvme_identify_ctrl(ctrl, &id); 3082 if (ret) { 3083 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 3084 return -EIO; 3085 } 3086 3087 if (!(ctrl->ops->flags & NVME_F_FABRICS)) 3088 ctrl->cntlid = le16_to_cpu(id->cntlid); 3089 3090 if (!ctrl->identified) { 3091 unsigned int i; 3092 3093 /* 3094 * Check for quirks. Quirk can depend on firmware version, 3095 * so, in principle, the set of quirks present can change 3096 * across a reset. As a possible future enhancement, we 3097 * could re-scan for quirks every time we reinitialize 3098 * the device, but we'd have to make sure that the driver 3099 * behaves intelligently if the quirks change. 3100 */ 3101 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 3102 if (quirk_matches(id, &core_quirks[i])) 3103 ctrl->quirks |= core_quirks[i].quirks; 3104 } 3105 3106 ret = nvme_init_subsystem(ctrl, id); 3107 if (ret) 3108 goto out_free; 3109 3110 ret = nvme_init_effects(ctrl, id); 3111 if (ret) 3112 goto out_free; 3113 } 3114 memcpy(ctrl->subsys->firmware_rev, id->fr, 3115 sizeof(ctrl->subsys->firmware_rev)); 3116 3117 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 3118 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 3119 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 3120 } 3121 3122 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 3123 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 3124 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 3125 3126 ctrl->oacs = le16_to_cpu(id->oacs); 3127 ctrl->oncs = le16_to_cpu(id->oncs); 3128 ctrl->mtfa = le16_to_cpu(id->mtfa); 3129 ctrl->oaes = le32_to_cpu(id->oaes); 3130 ctrl->wctemp = le16_to_cpu(id->wctemp); 3131 ctrl->cctemp = le16_to_cpu(id->cctemp); 3132 3133 atomic_set(&ctrl->abort_limit, id->acl + 1); 3134 ctrl->vwc = id->vwc; 3135 if (id->mdts) 3136 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts); 3137 else 3138 max_hw_sectors = UINT_MAX; 3139 ctrl->max_hw_sectors = 3140 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 3141 3142 nvme_set_queue_limits(ctrl, ctrl->admin_q); 3143 ctrl->sgls = le32_to_cpu(id->sgls); 3144 ctrl->kas = le16_to_cpu(id->kas); 3145 ctrl->max_namespaces = le32_to_cpu(id->mnan); 3146 ctrl->ctratt = le32_to_cpu(id->ctratt); 3147 3148 ctrl->cntrltype = id->cntrltype; 3149 ctrl->dctype = id->dctype; 3150 3151 if (id->rtd3e) { 3152 /* us -> s */ 3153 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC; 3154 3155 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 3156 shutdown_timeout, 60); 3157 3158 if (ctrl->shutdown_timeout != shutdown_timeout) 3159 dev_info(ctrl->device, 3160 "Shutdown timeout set to %u seconds\n", 3161 ctrl->shutdown_timeout); 3162 } else 3163 ctrl->shutdown_timeout = shutdown_timeout; 3164 3165 ctrl->npss = id->npss; 3166 ctrl->apsta = id->apsta; 3167 prev_apst_enabled = ctrl->apst_enabled; 3168 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 3169 if (force_apst && id->apsta) { 3170 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 3171 ctrl->apst_enabled = true; 3172 } else { 3173 ctrl->apst_enabled = false; 3174 } 3175 } else { 3176 ctrl->apst_enabled = id->apsta; 3177 } 3178 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 3179 3180 if (ctrl->ops->flags & NVME_F_FABRICS) { 3181 ctrl->icdoff = le16_to_cpu(id->icdoff); 3182 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 3183 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 3184 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 3185 3186 ret = nvme_check_ctrl_fabric_info(ctrl, id); 3187 if (ret) 3188 goto out_free; 3189 } else { 3190 ctrl->hmpre = le32_to_cpu(id->hmpre); 3191 ctrl->hmmin = le32_to_cpu(id->hmmin); 3192 ctrl->hmminds = le32_to_cpu(id->hmminds); 3193 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 3194 } 3195 3196 ret = nvme_mpath_init_identify(ctrl, id); 3197 if (ret < 0) 3198 goto out_free; 3199 3200 if (ctrl->apst_enabled && !prev_apst_enabled) 3201 dev_pm_qos_expose_latency_tolerance(ctrl->device); 3202 else if (!ctrl->apst_enabled && prev_apst_enabled) 3203 dev_pm_qos_hide_latency_tolerance(ctrl->device); 3204 3205 out_free: 3206 kfree(id); 3207 return ret; 3208 } 3209 3210 /* 3211 * Initialize the cached copies of the Identify data and various controller 3212 * register in our nvme_ctrl structure. This should be called as soon as 3213 * the admin queue is fully up and running. 3214 */ 3215 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended) 3216 { 3217 int ret; 3218 3219 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 3220 if (ret) { 3221 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 3222 return ret; 3223 } 3224 3225 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize); 3226 3227 if (ctrl->vs >= NVME_VS(1, 1, 0)) 3228 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap); 3229 3230 ret = nvme_init_identify(ctrl); 3231 if (ret) 3232 return ret; 3233 3234 ret = nvme_configure_apst(ctrl); 3235 if (ret < 0) 3236 return ret; 3237 3238 ret = nvme_configure_timestamp(ctrl); 3239 if (ret < 0) 3240 return ret; 3241 3242 ret = nvme_configure_host_options(ctrl); 3243 if (ret < 0) 3244 return ret; 3245 3246 nvme_configure_opal(ctrl, was_suspended); 3247 3248 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) { 3249 /* 3250 * Do not return errors unless we are in a controller reset, 3251 * the controller works perfectly fine without hwmon. 3252 */ 3253 ret = nvme_hwmon_init(ctrl); 3254 if (ret == -EINTR) 3255 return ret; 3256 } 3257 3258 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags); 3259 ctrl->identified = true; 3260 3261 nvme_start_keep_alive(ctrl); 3262 3263 return 0; 3264 } 3265 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish); 3266 3267 static int nvme_dev_open(struct inode *inode, struct file *file) 3268 { 3269 struct nvme_ctrl *ctrl = 3270 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3271 3272 switch (nvme_ctrl_state(ctrl)) { 3273 case NVME_CTRL_LIVE: 3274 break; 3275 default: 3276 return -EWOULDBLOCK; 3277 } 3278 3279 nvme_get_ctrl(ctrl); 3280 if (!try_module_get(ctrl->ops->module)) { 3281 nvme_put_ctrl(ctrl); 3282 return -EINVAL; 3283 } 3284 3285 file->private_data = ctrl; 3286 return 0; 3287 } 3288 3289 static int nvme_dev_release(struct inode *inode, struct file *file) 3290 { 3291 struct nvme_ctrl *ctrl = 3292 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3293 3294 module_put(ctrl->ops->module); 3295 nvme_put_ctrl(ctrl); 3296 return 0; 3297 } 3298 3299 static const struct file_operations nvme_dev_fops = { 3300 .owner = THIS_MODULE, 3301 .open = nvme_dev_open, 3302 .release = nvme_dev_release, 3303 .unlocked_ioctl = nvme_dev_ioctl, 3304 .compat_ioctl = compat_ptr_ioctl, 3305 .uring_cmd = nvme_dev_uring_cmd, 3306 }; 3307 3308 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl, 3309 unsigned nsid) 3310 { 3311 struct nvme_ns_head *h; 3312 3313 lockdep_assert_held(&ctrl->subsys->lock); 3314 3315 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) { 3316 /* 3317 * Private namespaces can share NSIDs under some conditions. 3318 * In that case we can't use the same ns_head for namespaces 3319 * with the same NSID. 3320 */ 3321 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h)) 3322 continue; 3323 if (!list_empty(&h->list) && nvme_tryget_ns_head(h)) 3324 return h; 3325 } 3326 3327 return NULL; 3328 } 3329 3330 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys, 3331 struct nvme_ns_ids *ids) 3332 { 3333 bool has_uuid = !uuid_is_null(&ids->uuid); 3334 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid)); 3335 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 3336 struct nvme_ns_head *h; 3337 3338 lockdep_assert_held(&subsys->lock); 3339 3340 list_for_each_entry(h, &subsys->nsheads, entry) { 3341 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid)) 3342 return -EINVAL; 3343 if (has_nguid && 3344 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0) 3345 return -EINVAL; 3346 if (has_eui64 && 3347 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0) 3348 return -EINVAL; 3349 } 3350 3351 return 0; 3352 } 3353 3354 static void nvme_cdev_rel(struct device *dev) 3355 { 3356 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt)); 3357 } 3358 3359 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device) 3360 { 3361 cdev_device_del(cdev, cdev_device); 3362 put_device(cdev_device); 3363 } 3364 3365 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 3366 const struct file_operations *fops, struct module *owner) 3367 { 3368 int minor, ret; 3369 3370 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL); 3371 if (minor < 0) 3372 return minor; 3373 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor); 3374 cdev_device->class = nvme_ns_chr_class; 3375 cdev_device->release = nvme_cdev_rel; 3376 device_initialize(cdev_device); 3377 cdev_init(cdev, fops); 3378 cdev->owner = owner; 3379 ret = cdev_device_add(cdev, cdev_device); 3380 if (ret) 3381 put_device(cdev_device); 3382 3383 return ret; 3384 } 3385 3386 static int nvme_ns_chr_open(struct inode *inode, struct file *file) 3387 { 3388 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3389 } 3390 3391 static int nvme_ns_chr_release(struct inode *inode, struct file *file) 3392 { 3393 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3394 return 0; 3395 } 3396 3397 static const struct file_operations nvme_ns_chr_fops = { 3398 .owner = THIS_MODULE, 3399 .open = nvme_ns_chr_open, 3400 .release = nvme_ns_chr_release, 3401 .unlocked_ioctl = nvme_ns_chr_ioctl, 3402 .compat_ioctl = compat_ptr_ioctl, 3403 .uring_cmd = nvme_ns_chr_uring_cmd, 3404 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll, 3405 }; 3406 3407 static int nvme_add_ns_cdev(struct nvme_ns *ns) 3408 { 3409 int ret; 3410 3411 ns->cdev_device.parent = ns->ctrl->device; 3412 ret = dev_set_name(&ns->cdev_device, "ng%dn%d", 3413 ns->ctrl->instance, ns->head->instance); 3414 if (ret) 3415 return ret; 3416 3417 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops, 3418 ns->ctrl->ops->module); 3419 } 3420 3421 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 3422 struct nvme_ns_info *info) 3423 { 3424 struct nvme_ns_head *head; 3425 size_t size = sizeof(*head); 3426 int ret = -ENOMEM; 3427 3428 #ifdef CONFIG_NVME_MULTIPATH 3429 size += num_possible_nodes() * sizeof(struct nvme_ns *); 3430 #endif 3431 3432 head = kzalloc(size, GFP_KERNEL); 3433 if (!head) 3434 goto out; 3435 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL); 3436 if (ret < 0) 3437 goto out_free_head; 3438 head->instance = ret; 3439 INIT_LIST_HEAD(&head->list); 3440 ret = init_srcu_struct(&head->srcu); 3441 if (ret) 3442 goto out_ida_remove; 3443 head->subsys = ctrl->subsys; 3444 head->ns_id = info->nsid; 3445 head->ids = info->ids; 3446 head->shared = info->is_shared; 3447 ratelimit_state_init(&head->rs_nuse, 5 * HZ, 1); 3448 ratelimit_set_flags(&head->rs_nuse, RATELIMIT_MSG_ON_RELEASE); 3449 kref_init(&head->ref); 3450 3451 if (head->ids.csi) { 3452 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects); 3453 if (ret) 3454 goto out_cleanup_srcu; 3455 } else 3456 head->effects = ctrl->effects; 3457 3458 ret = nvme_mpath_alloc_disk(ctrl, head); 3459 if (ret) 3460 goto out_cleanup_srcu; 3461 3462 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 3463 3464 kref_get(&ctrl->subsys->ref); 3465 3466 return head; 3467 out_cleanup_srcu: 3468 cleanup_srcu_struct(&head->srcu); 3469 out_ida_remove: 3470 ida_free(&ctrl->subsys->ns_ida, head->instance); 3471 out_free_head: 3472 kfree(head); 3473 out: 3474 if (ret > 0) 3475 ret = blk_status_to_errno(nvme_error_status(ret)); 3476 return ERR_PTR(ret); 3477 } 3478 3479 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this, 3480 struct nvme_ns_ids *ids) 3481 { 3482 struct nvme_subsystem *s; 3483 int ret = 0; 3484 3485 /* 3486 * Note that this check is racy as we try to avoid holding the global 3487 * lock over the whole ns_head creation. But it is only intended as 3488 * a sanity check anyway. 3489 */ 3490 mutex_lock(&nvme_subsystems_lock); 3491 list_for_each_entry(s, &nvme_subsystems, entry) { 3492 if (s == this) 3493 continue; 3494 mutex_lock(&s->lock); 3495 ret = nvme_subsys_check_duplicate_ids(s, ids); 3496 mutex_unlock(&s->lock); 3497 if (ret) 3498 break; 3499 } 3500 mutex_unlock(&nvme_subsystems_lock); 3501 3502 return ret; 3503 } 3504 3505 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info) 3506 { 3507 struct nvme_ctrl *ctrl = ns->ctrl; 3508 struct nvme_ns_head *head = NULL; 3509 int ret; 3510 3511 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids); 3512 if (ret) { 3513 /* 3514 * We've found two different namespaces on two different 3515 * subsystems that report the same ID. This is pretty nasty 3516 * for anything that actually requires unique device 3517 * identification. In the kernel we need this for multipathing, 3518 * and in user space the /dev/disk/by-id/ links rely on it. 3519 * 3520 * If the device also claims to be multi-path capable back off 3521 * here now and refuse the probe the second device as this is a 3522 * recipe for data corruption. If not this is probably a 3523 * cheap consumer device if on the PCIe bus, so let the user 3524 * proceed and use the shiny toy, but warn that with changing 3525 * probing order (which due to our async probing could just be 3526 * device taking longer to startup) the other device could show 3527 * up at any time. 3528 */ 3529 nvme_print_device_info(ctrl); 3530 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */ 3531 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) && 3532 info->is_shared)) { 3533 dev_err(ctrl->device, 3534 "ignoring nsid %d because of duplicate IDs\n", 3535 info->nsid); 3536 return ret; 3537 } 3538 3539 dev_err(ctrl->device, 3540 "clearing duplicate IDs for nsid %d\n", info->nsid); 3541 dev_err(ctrl->device, 3542 "use of /dev/disk/by-id/ may cause data corruption\n"); 3543 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid)); 3544 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid)); 3545 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64)); 3546 ctrl->quirks |= NVME_QUIRK_BOGUS_NID; 3547 } 3548 3549 mutex_lock(&ctrl->subsys->lock); 3550 head = nvme_find_ns_head(ctrl, info->nsid); 3551 if (!head) { 3552 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids); 3553 if (ret) { 3554 dev_err(ctrl->device, 3555 "duplicate IDs in subsystem for nsid %d\n", 3556 info->nsid); 3557 goto out_unlock; 3558 } 3559 head = nvme_alloc_ns_head(ctrl, info); 3560 if (IS_ERR(head)) { 3561 ret = PTR_ERR(head); 3562 goto out_unlock; 3563 } 3564 } else { 3565 ret = -EINVAL; 3566 if (!info->is_shared || !head->shared) { 3567 dev_err(ctrl->device, 3568 "Duplicate unshared namespace %d\n", 3569 info->nsid); 3570 goto out_put_ns_head; 3571 } 3572 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) { 3573 dev_err(ctrl->device, 3574 "IDs don't match for shared namespace %d\n", 3575 info->nsid); 3576 goto out_put_ns_head; 3577 } 3578 3579 if (!multipath) { 3580 dev_warn(ctrl->device, 3581 "Found shared namespace %d, but multipathing not supported.\n", 3582 info->nsid); 3583 dev_warn_once(ctrl->device, 3584 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0\n."); 3585 } 3586 } 3587 3588 list_add_tail_rcu(&ns->siblings, &head->list); 3589 ns->head = head; 3590 mutex_unlock(&ctrl->subsys->lock); 3591 return 0; 3592 3593 out_put_ns_head: 3594 nvme_put_ns_head(head); 3595 out_unlock: 3596 mutex_unlock(&ctrl->subsys->lock); 3597 return ret; 3598 } 3599 3600 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3601 { 3602 struct nvme_ns *ns, *ret = NULL; 3603 3604 down_read(&ctrl->namespaces_rwsem); 3605 list_for_each_entry(ns, &ctrl->namespaces, list) { 3606 if (ns->head->ns_id == nsid) { 3607 if (!nvme_get_ns(ns)) 3608 continue; 3609 ret = ns; 3610 break; 3611 } 3612 if (ns->head->ns_id > nsid) 3613 break; 3614 } 3615 up_read(&ctrl->namespaces_rwsem); 3616 return ret; 3617 } 3618 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU); 3619 3620 /* 3621 * Add the namespace to the controller list while keeping the list ordered. 3622 */ 3623 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns) 3624 { 3625 struct nvme_ns *tmp; 3626 3627 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) { 3628 if (tmp->head->ns_id < ns->head->ns_id) { 3629 list_add(&ns->list, &tmp->list); 3630 return; 3631 } 3632 } 3633 list_add(&ns->list, &ns->ctrl->namespaces); 3634 } 3635 3636 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info) 3637 { 3638 struct nvme_ns *ns; 3639 struct gendisk *disk; 3640 int node = ctrl->numa_node; 3641 3642 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 3643 if (!ns) 3644 return; 3645 3646 disk = blk_mq_alloc_disk(ctrl->tagset, ns); 3647 if (IS_ERR(disk)) 3648 goto out_free_ns; 3649 disk->fops = &nvme_bdev_ops; 3650 disk->private_data = ns; 3651 3652 ns->disk = disk; 3653 ns->queue = disk->queue; 3654 3655 if (ctrl->opts && ctrl->opts->data_digest) 3656 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue); 3657 3658 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue); 3659 if (ctrl->ops->supports_pci_p2pdma && 3660 ctrl->ops->supports_pci_p2pdma(ctrl)) 3661 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue); 3662 3663 ns->ctrl = ctrl; 3664 kref_init(&ns->kref); 3665 3666 if (nvme_init_ns_head(ns, info)) 3667 goto out_cleanup_disk; 3668 3669 /* 3670 * If multipathing is enabled, the device name for all disks and not 3671 * just those that represent shared namespaces needs to be based on the 3672 * subsystem instance. Using the controller instance for private 3673 * namespaces could lead to naming collisions between shared and private 3674 * namespaces if they don't use a common numbering scheme. 3675 * 3676 * If multipathing is not enabled, disk names must use the controller 3677 * instance as shared namespaces will show up as multiple block 3678 * devices. 3679 */ 3680 if (nvme_ns_head_multipath(ns->head)) { 3681 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance, 3682 ctrl->instance, ns->head->instance); 3683 disk->flags |= GENHD_FL_HIDDEN; 3684 } else if (multipath) { 3685 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance, 3686 ns->head->instance); 3687 } else { 3688 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, 3689 ns->head->instance); 3690 } 3691 3692 if (nvme_update_ns_info(ns, info)) 3693 goto out_unlink_ns; 3694 3695 down_write(&ctrl->namespaces_rwsem); 3696 /* 3697 * Ensure that no namespaces are added to the ctrl list after the queues 3698 * are frozen, thereby avoiding a deadlock between scan and reset. 3699 */ 3700 if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) { 3701 up_write(&ctrl->namespaces_rwsem); 3702 goto out_unlink_ns; 3703 } 3704 nvme_ns_add_to_ctrl_list(ns); 3705 up_write(&ctrl->namespaces_rwsem); 3706 nvme_get_ctrl(ctrl); 3707 3708 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_attr_groups)) 3709 goto out_cleanup_ns_from_list; 3710 3711 if (!nvme_ns_head_multipath(ns->head)) 3712 nvme_add_ns_cdev(ns); 3713 3714 nvme_mpath_add_disk(ns, info->anagrpid); 3715 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name); 3716 3717 return; 3718 3719 out_cleanup_ns_from_list: 3720 nvme_put_ctrl(ctrl); 3721 down_write(&ctrl->namespaces_rwsem); 3722 list_del_init(&ns->list); 3723 up_write(&ctrl->namespaces_rwsem); 3724 out_unlink_ns: 3725 mutex_lock(&ctrl->subsys->lock); 3726 list_del_rcu(&ns->siblings); 3727 if (list_empty(&ns->head->list)) 3728 list_del_init(&ns->head->entry); 3729 mutex_unlock(&ctrl->subsys->lock); 3730 nvme_put_ns_head(ns->head); 3731 out_cleanup_disk: 3732 put_disk(disk); 3733 out_free_ns: 3734 kfree(ns); 3735 } 3736 3737 static void nvme_ns_remove(struct nvme_ns *ns) 3738 { 3739 bool last_path = false; 3740 3741 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 3742 return; 3743 3744 clear_bit(NVME_NS_READY, &ns->flags); 3745 set_capacity(ns->disk, 0); 3746 nvme_fault_inject_fini(&ns->fault_inject); 3747 3748 /* 3749 * Ensure that !NVME_NS_READY is seen by other threads to prevent 3750 * this ns going back into current_path. 3751 */ 3752 synchronize_srcu(&ns->head->srcu); 3753 3754 /* wait for concurrent submissions */ 3755 if (nvme_mpath_clear_current_path(ns)) 3756 synchronize_srcu(&ns->head->srcu); 3757 3758 mutex_lock(&ns->ctrl->subsys->lock); 3759 list_del_rcu(&ns->siblings); 3760 if (list_empty(&ns->head->list)) { 3761 list_del_init(&ns->head->entry); 3762 last_path = true; 3763 } 3764 mutex_unlock(&ns->ctrl->subsys->lock); 3765 3766 /* guarantee not available in head->list */ 3767 synchronize_srcu(&ns->head->srcu); 3768 3769 if (!nvme_ns_head_multipath(ns->head)) 3770 nvme_cdev_del(&ns->cdev, &ns->cdev_device); 3771 del_gendisk(ns->disk); 3772 3773 down_write(&ns->ctrl->namespaces_rwsem); 3774 list_del_init(&ns->list); 3775 up_write(&ns->ctrl->namespaces_rwsem); 3776 3777 if (last_path) 3778 nvme_mpath_shutdown_disk(ns->head); 3779 nvme_put_ns(ns); 3780 } 3781 3782 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid) 3783 { 3784 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid); 3785 3786 if (ns) { 3787 nvme_ns_remove(ns); 3788 nvme_put_ns(ns); 3789 } 3790 } 3791 3792 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info) 3793 { 3794 int ret = NVME_SC_INVALID_NS | NVME_SC_DNR; 3795 3796 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) { 3797 dev_err(ns->ctrl->device, 3798 "identifiers changed for nsid %d\n", ns->head->ns_id); 3799 goto out; 3800 } 3801 3802 ret = nvme_update_ns_info(ns, info); 3803 out: 3804 /* 3805 * Only remove the namespace if we got a fatal error back from the 3806 * device, otherwise ignore the error and just move on. 3807 * 3808 * TODO: we should probably schedule a delayed retry here. 3809 */ 3810 if (ret > 0 && (ret & NVME_SC_DNR)) 3811 nvme_ns_remove(ns); 3812 } 3813 3814 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3815 { 3816 struct nvme_ns_info info = { .nsid = nsid }; 3817 struct nvme_ns *ns; 3818 int ret; 3819 3820 if (nvme_identify_ns_descs(ctrl, &info)) 3821 return; 3822 3823 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) { 3824 dev_warn(ctrl->device, 3825 "command set not reported for nsid: %d\n", nsid); 3826 return; 3827 } 3828 3829 /* 3830 * If available try to use the Command Set Idependent Identify Namespace 3831 * data structure to find all the generic information that is needed to 3832 * set up a namespace. If not fall back to the legacy version. 3833 */ 3834 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) || 3835 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS)) 3836 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info); 3837 else 3838 ret = nvme_ns_info_from_identify(ctrl, &info); 3839 3840 if (info.is_removed) 3841 nvme_ns_remove_by_nsid(ctrl, nsid); 3842 3843 /* 3844 * Ignore the namespace if it is not ready. We will get an AEN once it 3845 * becomes ready and restart the scan. 3846 */ 3847 if (ret || !info.is_ready) 3848 return; 3849 3850 ns = nvme_find_get_ns(ctrl, nsid); 3851 if (ns) { 3852 nvme_validate_ns(ns, &info); 3853 nvme_put_ns(ns); 3854 } else { 3855 nvme_alloc_ns(ctrl, &info); 3856 } 3857 } 3858 3859 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 3860 unsigned nsid) 3861 { 3862 struct nvme_ns *ns, *next; 3863 LIST_HEAD(rm_list); 3864 3865 down_write(&ctrl->namespaces_rwsem); 3866 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 3867 if (ns->head->ns_id > nsid) 3868 list_move_tail(&ns->list, &rm_list); 3869 } 3870 up_write(&ctrl->namespaces_rwsem); 3871 3872 list_for_each_entry_safe(ns, next, &rm_list, list) 3873 nvme_ns_remove(ns); 3874 3875 } 3876 3877 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl) 3878 { 3879 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32); 3880 __le32 *ns_list; 3881 u32 prev = 0; 3882 int ret = 0, i; 3883 3884 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 3885 if (!ns_list) 3886 return -ENOMEM; 3887 3888 for (;;) { 3889 struct nvme_command cmd = { 3890 .identify.opcode = nvme_admin_identify, 3891 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST, 3892 .identify.nsid = cpu_to_le32(prev), 3893 }; 3894 3895 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list, 3896 NVME_IDENTIFY_DATA_SIZE); 3897 if (ret) { 3898 dev_warn(ctrl->device, 3899 "Identify NS List failed (status=0x%x)\n", ret); 3900 goto free; 3901 } 3902 3903 for (i = 0; i < nr_entries; i++) { 3904 u32 nsid = le32_to_cpu(ns_list[i]); 3905 3906 if (!nsid) /* end of the list? */ 3907 goto out; 3908 nvme_scan_ns(ctrl, nsid); 3909 while (++prev < nsid) 3910 nvme_ns_remove_by_nsid(ctrl, prev); 3911 } 3912 } 3913 out: 3914 nvme_remove_invalid_namespaces(ctrl, prev); 3915 free: 3916 kfree(ns_list); 3917 return ret; 3918 } 3919 3920 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl) 3921 { 3922 struct nvme_id_ctrl *id; 3923 u32 nn, i; 3924 3925 if (nvme_identify_ctrl(ctrl, &id)) 3926 return; 3927 nn = le32_to_cpu(id->nn); 3928 kfree(id); 3929 3930 for (i = 1; i <= nn; i++) 3931 nvme_scan_ns(ctrl, i); 3932 3933 nvme_remove_invalid_namespaces(ctrl, nn); 3934 } 3935 3936 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 3937 { 3938 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 3939 __le32 *log; 3940 int error; 3941 3942 log = kzalloc(log_size, GFP_KERNEL); 3943 if (!log) 3944 return; 3945 3946 /* 3947 * We need to read the log to clear the AEN, but we don't want to rely 3948 * on it for the changed namespace information as userspace could have 3949 * raced with us in reading the log page, which could cause us to miss 3950 * updates. 3951 */ 3952 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, 3953 NVME_CSI_NVM, log, log_size, 0); 3954 if (error) 3955 dev_warn(ctrl->device, 3956 "reading changed ns log failed: %d\n", error); 3957 3958 kfree(log); 3959 } 3960 3961 static void nvme_scan_work(struct work_struct *work) 3962 { 3963 struct nvme_ctrl *ctrl = 3964 container_of(work, struct nvme_ctrl, scan_work); 3965 int ret; 3966 3967 /* No tagset on a live ctrl means IO queues could not created */ 3968 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset) 3969 return; 3970 3971 /* 3972 * Identify controller limits can change at controller reset due to 3973 * new firmware download, even though it is not common we cannot ignore 3974 * such scenario. Controller's non-mdts limits are reported in the unit 3975 * of logical blocks that is dependent on the format of attached 3976 * namespace. Hence re-read the limits at the time of ns allocation. 3977 */ 3978 ret = nvme_init_non_mdts_limits(ctrl); 3979 if (ret < 0) { 3980 dev_warn(ctrl->device, 3981 "reading non-mdts-limits failed: %d\n", ret); 3982 return; 3983 } 3984 3985 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 3986 dev_info(ctrl->device, "rescanning namespaces.\n"); 3987 nvme_clear_changed_ns_log(ctrl); 3988 } 3989 3990 mutex_lock(&ctrl->scan_lock); 3991 if (nvme_ctrl_limited_cns(ctrl)) { 3992 nvme_scan_ns_sequential(ctrl); 3993 } else { 3994 /* 3995 * Fall back to sequential scan if DNR is set to handle broken 3996 * devices which should support Identify NS List (as per the VS 3997 * they report) but don't actually support it. 3998 */ 3999 ret = nvme_scan_ns_list(ctrl); 4000 if (ret > 0 && ret & NVME_SC_DNR) 4001 nvme_scan_ns_sequential(ctrl); 4002 } 4003 mutex_unlock(&ctrl->scan_lock); 4004 } 4005 4006 /* 4007 * This function iterates the namespace list unlocked to allow recovery from 4008 * controller failure. It is up to the caller to ensure the namespace list is 4009 * not modified by scan work while this function is executing. 4010 */ 4011 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 4012 { 4013 struct nvme_ns *ns, *next; 4014 LIST_HEAD(ns_list); 4015 4016 /* 4017 * make sure to requeue I/O to all namespaces as these 4018 * might result from the scan itself and must complete 4019 * for the scan_work to make progress 4020 */ 4021 nvme_mpath_clear_ctrl_paths(ctrl); 4022 4023 /* 4024 * Unquiesce io queues so any pending IO won't hang, especially 4025 * those submitted from scan work 4026 */ 4027 nvme_unquiesce_io_queues(ctrl); 4028 4029 /* prevent racing with ns scanning */ 4030 flush_work(&ctrl->scan_work); 4031 4032 /* 4033 * The dead states indicates the controller was not gracefully 4034 * disconnected. In that case, we won't be able to flush any data while 4035 * removing the namespaces' disks; fail all the queues now to avoid 4036 * potentially having to clean up the failed sync later. 4037 */ 4038 if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD) 4039 nvme_mark_namespaces_dead(ctrl); 4040 4041 /* this is a no-op when called from the controller reset handler */ 4042 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO); 4043 4044 down_write(&ctrl->namespaces_rwsem); 4045 list_splice_init(&ctrl->namespaces, &ns_list); 4046 up_write(&ctrl->namespaces_rwsem); 4047 4048 list_for_each_entry_safe(ns, next, &ns_list, list) 4049 nvme_ns_remove(ns); 4050 } 4051 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 4052 4053 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env) 4054 { 4055 const struct nvme_ctrl *ctrl = 4056 container_of(dev, struct nvme_ctrl, ctrl_device); 4057 struct nvmf_ctrl_options *opts = ctrl->opts; 4058 int ret; 4059 4060 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name); 4061 if (ret) 4062 return ret; 4063 4064 if (opts) { 4065 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr); 4066 if (ret) 4067 return ret; 4068 4069 ret = add_uevent_var(env, "NVME_TRSVCID=%s", 4070 opts->trsvcid ?: "none"); 4071 if (ret) 4072 return ret; 4073 4074 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s", 4075 opts->host_traddr ?: "none"); 4076 if (ret) 4077 return ret; 4078 4079 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s", 4080 opts->host_iface ?: "none"); 4081 } 4082 return ret; 4083 } 4084 4085 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata) 4086 { 4087 char *envp[2] = { envdata, NULL }; 4088 4089 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4090 } 4091 4092 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 4093 { 4094 char *envp[2] = { NULL, NULL }; 4095 u32 aen_result = ctrl->aen_result; 4096 4097 ctrl->aen_result = 0; 4098 if (!aen_result) 4099 return; 4100 4101 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 4102 if (!envp[0]) 4103 return; 4104 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4105 kfree(envp[0]); 4106 } 4107 4108 static void nvme_async_event_work(struct work_struct *work) 4109 { 4110 struct nvme_ctrl *ctrl = 4111 container_of(work, struct nvme_ctrl, async_event_work); 4112 4113 nvme_aen_uevent(ctrl); 4114 4115 /* 4116 * The transport drivers must guarantee AER submission here is safe by 4117 * flushing ctrl async_event_work after changing the controller state 4118 * from LIVE and before freeing the admin queue. 4119 */ 4120 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 4121 ctrl->ops->submit_async_event(ctrl); 4122 } 4123 4124 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 4125 { 4126 4127 u32 csts; 4128 4129 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 4130 return false; 4131 4132 if (csts == ~0) 4133 return false; 4134 4135 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 4136 } 4137 4138 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 4139 { 4140 struct nvme_fw_slot_info_log *log; 4141 4142 log = kmalloc(sizeof(*log), GFP_KERNEL); 4143 if (!log) 4144 return; 4145 4146 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM, 4147 log, sizeof(*log), 0)) { 4148 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 4149 goto out_free_log; 4150 } 4151 4152 if (log->afi & 0x70 || !(log->afi & 0x7)) { 4153 dev_info(ctrl->device, 4154 "Firmware is activated after next Controller Level Reset\n"); 4155 goto out_free_log; 4156 } 4157 4158 memcpy(ctrl->subsys->firmware_rev, &log->frs[(log->afi & 0x7) - 1], 4159 sizeof(ctrl->subsys->firmware_rev)); 4160 4161 out_free_log: 4162 kfree(log); 4163 } 4164 4165 static void nvme_fw_act_work(struct work_struct *work) 4166 { 4167 struct nvme_ctrl *ctrl = container_of(work, 4168 struct nvme_ctrl, fw_act_work); 4169 unsigned long fw_act_timeout; 4170 4171 nvme_auth_stop(ctrl); 4172 4173 if (ctrl->mtfa) 4174 fw_act_timeout = jiffies + 4175 msecs_to_jiffies(ctrl->mtfa * 100); 4176 else 4177 fw_act_timeout = jiffies + 4178 msecs_to_jiffies(admin_timeout * 1000); 4179 4180 nvme_quiesce_io_queues(ctrl); 4181 while (nvme_ctrl_pp_status(ctrl)) { 4182 if (time_after(jiffies, fw_act_timeout)) { 4183 dev_warn(ctrl->device, 4184 "Fw activation timeout, reset controller\n"); 4185 nvme_try_sched_reset(ctrl); 4186 return; 4187 } 4188 msleep(100); 4189 } 4190 4191 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE)) 4192 return; 4193 4194 nvme_unquiesce_io_queues(ctrl); 4195 /* read FW slot information to clear the AER */ 4196 nvme_get_fw_slot_info(ctrl); 4197 4198 queue_work(nvme_wq, &ctrl->async_event_work); 4199 } 4200 4201 static u32 nvme_aer_type(u32 result) 4202 { 4203 return result & 0x7; 4204 } 4205 4206 static u32 nvme_aer_subtype(u32 result) 4207 { 4208 return (result & 0xff00) >> 8; 4209 } 4210 4211 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 4212 { 4213 u32 aer_notice_type = nvme_aer_subtype(result); 4214 bool requeue = true; 4215 4216 switch (aer_notice_type) { 4217 case NVME_AER_NOTICE_NS_CHANGED: 4218 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 4219 nvme_queue_scan(ctrl); 4220 break; 4221 case NVME_AER_NOTICE_FW_ACT_STARTING: 4222 /* 4223 * We are (ab)using the RESETTING state to prevent subsequent 4224 * recovery actions from interfering with the controller's 4225 * firmware activation. 4226 */ 4227 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) { 4228 requeue = false; 4229 queue_work(nvme_wq, &ctrl->fw_act_work); 4230 } 4231 break; 4232 #ifdef CONFIG_NVME_MULTIPATH 4233 case NVME_AER_NOTICE_ANA: 4234 if (!ctrl->ana_log_buf) 4235 break; 4236 queue_work(nvme_wq, &ctrl->ana_work); 4237 break; 4238 #endif 4239 case NVME_AER_NOTICE_DISC_CHANGED: 4240 ctrl->aen_result = result; 4241 break; 4242 default: 4243 dev_warn(ctrl->device, "async event result %08x\n", result); 4244 } 4245 return requeue; 4246 } 4247 4248 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl) 4249 { 4250 dev_warn(ctrl->device, "resetting controller due to AER\n"); 4251 nvme_reset_ctrl(ctrl); 4252 } 4253 4254 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 4255 volatile union nvme_result *res) 4256 { 4257 u32 result = le32_to_cpu(res->u32); 4258 u32 aer_type = nvme_aer_type(result); 4259 u32 aer_subtype = nvme_aer_subtype(result); 4260 bool requeue = true; 4261 4262 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 4263 return; 4264 4265 trace_nvme_async_event(ctrl, result); 4266 switch (aer_type) { 4267 case NVME_AER_NOTICE: 4268 requeue = nvme_handle_aen_notice(ctrl, result); 4269 break; 4270 case NVME_AER_ERROR: 4271 /* 4272 * For a persistent internal error, don't run async_event_work 4273 * to submit a new AER. The controller reset will do it. 4274 */ 4275 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) { 4276 nvme_handle_aer_persistent_error(ctrl); 4277 return; 4278 } 4279 fallthrough; 4280 case NVME_AER_SMART: 4281 case NVME_AER_CSS: 4282 case NVME_AER_VS: 4283 ctrl->aen_result = result; 4284 break; 4285 default: 4286 break; 4287 } 4288 4289 if (requeue) 4290 queue_work(nvme_wq, &ctrl->async_event_work); 4291 } 4292 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 4293 4294 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4295 const struct blk_mq_ops *ops, unsigned int cmd_size) 4296 { 4297 int ret; 4298 4299 memset(set, 0, sizeof(*set)); 4300 set->ops = ops; 4301 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 4302 if (ctrl->ops->flags & NVME_F_FABRICS) 4303 set->reserved_tags = NVMF_RESERVED_TAGS; 4304 set->numa_node = ctrl->numa_node; 4305 set->flags = BLK_MQ_F_NO_SCHED; 4306 if (ctrl->ops->flags & NVME_F_BLOCKING) 4307 set->flags |= BLK_MQ_F_BLOCKING; 4308 set->cmd_size = cmd_size; 4309 set->driver_data = ctrl; 4310 set->nr_hw_queues = 1; 4311 set->timeout = NVME_ADMIN_TIMEOUT; 4312 ret = blk_mq_alloc_tag_set(set); 4313 if (ret) 4314 return ret; 4315 4316 ctrl->admin_q = blk_mq_init_queue(set); 4317 if (IS_ERR(ctrl->admin_q)) { 4318 ret = PTR_ERR(ctrl->admin_q); 4319 goto out_free_tagset; 4320 } 4321 4322 if (ctrl->ops->flags & NVME_F_FABRICS) { 4323 ctrl->fabrics_q = blk_mq_init_queue(set); 4324 if (IS_ERR(ctrl->fabrics_q)) { 4325 ret = PTR_ERR(ctrl->fabrics_q); 4326 goto out_cleanup_admin_q; 4327 } 4328 } 4329 4330 ctrl->admin_tagset = set; 4331 return 0; 4332 4333 out_cleanup_admin_q: 4334 blk_mq_destroy_queue(ctrl->admin_q); 4335 blk_put_queue(ctrl->admin_q); 4336 out_free_tagset: 4337 blk_mq_free_tag_set(set); 4338 ctrl->admin_q = NULL; 4339 ctrl->fabrics_q = NULL; 4340 return ret; 4341 } 4342 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set); 4343 4344 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl) 4345 { 4346 blk_mq_destroy_queue(ctrl->admin_q); 4347 blk_put_queue(ctrl->admin_q); 4348 if (ctrl->ops->flags & NVME_F_FABRICS) { 4349 blk_mq_destroy_queue(ctrl->fabrics_q); 4350 blk_put_queue(ctrl->fabrics_q); 4351 } 4352 blk_mq_free_tag_set(ctrl->admin_tagset); 4353 } 4354 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set); 4355 4356 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4357 const struct blk_mq_ops *ops, unsigned int nr_maps, 4358 unsigned int cmd_size) 4359 { 4360 int ret; 4361 4362 memset(set, 0, sizeof(*set)); 4363 set->ops = ops; 4364 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1); 4365 /* 4366 * Some Apple controllers requires tags to be unique across admin and 4367 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue. 4368 */ 4369 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS) 4370 set->reserved_tags = NVME_AQ_DEPTH; 4371 else if (ctrl->ops->flags & NVME_F_FABRICS) 4372 set->reserved_tags = NVMF_RESERVED_TAGS; 4373 set->numa_node = ctrl->numa_node; 4374 set->flags = BLK_MQ_F_SHOULD_MERGE; 4375 if (ctrl->ops->flags & NVME_F_BLOCKING) 4376 set->flags |= BLK_MQ_F_BLOCKING; 4377 set->cmd_size = cmd_size, 4378 set->driver_data = ctrl; 4379 set->nr_hw_queues = ctrl->queue_count - 1; 4380 set->timeout = NVME_IO_TIMEOUT; 4381 set->nr_maps = nr_maps; 4382 ret = blk_mq_alloc_tag_set(set); 4383 if (ret) 4384 return ret; 4385 4386 if (ctrl->ops->flags & NVME_F_FABRICS) { 4387 ctrl->connect_q = blk_mq_init_queue(set); 4388 if (IS_ERR(ctrl->connect_q)) { 4389 ret = PTR_ERR(ctrl->connect_q); 4390 goto out_free_tag_set; 4391 } 4392 blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE, 4393 ctrl->connect_q); 4394 } 4395 4396 ctrl->tagset = set; 4397 return 0; 4398 4399 out_free_tag_set: 4400 blk_mq_free_tag_set(set); 4401 ctrl->connect_q = NULL; 4402 return ret; 4403 } 4404 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set); 4405 4406 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl) 4407 { 4408 if (ctrl->ops->flags & NVME_F_FABRICS) { 4409 blk_mq_destroy_queue(ctrl->connect_q); 4410 blk_put_queue(ctrl->connect_q); 4411 } 4412 blk_mq_free_tag_set(ctrl->tagset); 4413 } 4414 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set); 4415 4416 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 4417 { 4418 nvme_mpath_stop(ctrl); 4419 nvme_auth_stop(ctrl); 4420 nvme_stop_keep_alive(ctrl); 4421 nvme_stop_failfast_work(ctrl); 4422 flush_work(&ctrl->async_event_work); 4423 cancel_work_sync(&ctrl->fw_act_work); 4424 if (ctrl->ops->stop_ctrl) 4425 ctrl->ops->stop_ctrl(ctrl); 4426 } 4427 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 4428 4429 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 4430 { 4431 nvme_enable_aen(ctrl); 4432 4433 /* 4434 * persistent discovery controllers need to send indication to userspace 4435 * to re-read the discovery log page to learn about possible changes 4436 * that were missed. We identify persistent discovery controllers by 4437 * checking that they started once before, hence are reconnecting back. 4438 */ 4439 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) && 4440 nvme_discovery_ctrl(ctrl)) 4441 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover"); 4442 4443 if (ctrl->queue_count > 1) { 4444 nvme_queue_scan(ctrl); 4445 nvme_unquiesce_io_queues(ctrl); 4446 nvme_mpath_update(ctrl); 4447 } 4448 4449 nvme_change_uevent(ctrl, "NVME_EVENT=connected"); 4450 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags); 4451 } 4452 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 4453 4454 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 4455 { 4456 nvme_hwmon_exit(ctrl); 4457 nvme_fault_inject_fini(&ctrl->fault_inject); 4458 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4459 cdev_device_del(&ctrl->cdev, ctrl->device); 4460 nvme_put_ctrl(ctrl); 4461 } 4462 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 4463 4464 static void nvme_free_cels(struct nvme_ctrl *ctrl) 4465 { 4466 struct nvme_effects_log *cel; 4467 unsigned long i; 4468 4469 xa_for_each(&ctrl->cels, i, cel) { 4470 xa_erase(&ctrl->cels, i); 4471 kfree(cel); 4472 } 4473 4474 xa_destroy(&ctrl->cels); 4475 } 4476 4477 static void nvme_free_ctrl(struct device *dev) 4478 { 4479 struct nvme_ctrl *ctrl = 4480 container_of(dev, struct nvme_ctrl, ctrl_device); 4481 struct nvme_subsystem *subsys = ctrl->subsys; 4482 4483 if (!subsys || ctrl->instance != subsys->instance) 4484 ida_free(&nvme_instance_ida, ctrl->instance); 4485 key_put(ctrl->tls_key); 4486 nvme_free_cels(ctrl); 4487 nvme_mpath_uninit(ctrl); 4488 nvme_auth_stop(ctrl); 4489 nvme_auth_free(ctrl); 4490 __free_page(ctrl->discard_page); 4491 free_opal_dev(ctrl->opal_dev); 4492 4493 if (subsys) { 4494 mutex_lock(&nvme_subsystems_lock); 4495 list_del(&ctrl->subsys_entry); 4496 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 4497 mutex_unlock(&nvme_subsystems_lock); 4498 } 4499 4500 ctrl->ops->free_ctrl(ctrl); 4501 4502 if (subsys) 4503 nvme_put_subsystem(subsys); 4504 } 4505 4506 /* 4507 * Initialize a NVMe controller structures. This needs to be called during 4508 * earliest initialization so that we have the initialized structured around 4509 * during probing. 4510 */ 4511 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 4512 const struct nvme_ctrl_ops *ops, unsigned long quirks) 4513 { 4514 int ret; 4515 4516 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW); 4517 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 4518 spin_lock_init(&ctrl->lock); 4519 mutex_init(&ctrl->scan_lock); 4520 INIT_LIST_HEAD(&ctrl->namespaces); 4521 xa_init(&ctrl->cels); 4522 init_rwsem(&ctrl->namespaces_rwsem); 4523 ctrl->dev = dev; 4524 ctrl->ops = ops; 4525 ctrl->quirks = quirks; 4526 ctrl->numa_node = NUMA_NO_NODE; 4527 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 4528 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 4529 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 4530 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 4531 init_waitqueue_head(&ctrl->state_wq); 4532 4533 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 4534 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work); 4535 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 4536 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 4537 ctrl->ka_last_check_time = jiffies; 4538 4539 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 4540 PAGE_SIZE); 4541 ctrl->discard_page = alloc_page(GFP_KERNEL); 4542 if (!ctrl->discard_page) { 4543 ret = -ENOMEM; 4544 goto out; 4545 } 4546 4547 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL); 4548 if (ret < 0) 4549 goto out; 4550 ctrl->instance = ret; 4551 4552 device_initialize(&ctrl->ctrl_device); 4553 ctrl->device = &ctrl->ctrl_device; 4554 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt), 4555 ctrl->instance); 4556 ctrl->device->class = nvme_class; 4557 ctrl->device->parent = ctrl->dev; 4558 if (ops->dev_attr_groups) 4559 ctrl->device->groups = ops->dev_attr_groups; 4560 else 4561 ctrl->device->groups = nvme_dev_attr_groups; 4562 ctrl->device->release = nvme_free_ctrl; 4563 dev_set_drvdata(ctrl->device, ctrl); 4564 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 4565 if (ret) 4566 goto out_release_instance; 4567 4568 nvme_get_ctrl(ctrl); 4569 cdev_init(&ctrl->cdev, &nvme_dev_fops); 4570 ctrl->cdev.owner = ops->module; 4571 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 4572 if (ret) 4573 goto out_free_name; 4574 4575 /* 4576 * Initialize latency tolerance controls. The sysfs files won't 4577 * be visible to userspace unless the device actually supports APST. 4578 */ 4579 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 4580 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 4581 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 4582 4583 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device)); 4584 nvme_mpath_init_ctrl(ctrl); 4585 ret = nvme_auth_init_ctrl(ctrl); 4586 if (ret) 4587 goto out_free_cdev; 4588 4589 return 0; 4590 out_free_cdev: 4591 nvme_fault_inject_fini(&ctrl->fault_inject); 4592 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4593 cdev_device_del(&ctrl->cdev, ctrl->device); 4594 out_free_name: 4595 nvme_put_ctrl(ctrl); 4596 kfree_const(ctrl->device->kobj.name); 4597 out_release_instance: 4598 ida_free(&nvme_instance_ida, ctrl->instance); 4599 out: 4600 if (ctrl->discard_page) 4601 __free_page(ctrl->discard_page); 4602 return ret; 4603 } 4604 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 4605 4606 /* let I/O to all namespaces fail in preparation for surprise removal */ 4607 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl) 4608 { 4609 struct nvme_ns *ns; 4610 4611 down_read(&ctrl->namespaces_rwsem); 4612 list_for_each_entry(ns, &ctrl->namespaces, list) 4613 blk_mark_disk_dead(ns->disk); 4614 up_read(&ctrl->namespaces_rwsem); 4615 } 4616 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead); 4617 4618 void nvme_unfreeze(struct nvme_ctrl *ctrl) 4619 { 4620 struct nvme_ns *ns; 4621 4622 down_read(&ctrl->namespaces_rwsem); 4623 list_for_each_entry(ns, &ctrl->namespaces, list) 4624 blk_mq_unfreeze_queue(ns->queue); 4625 up_read(&ctrl->namespaces_rwsem); 4626 clear_bit(NVME_CTRL_FROZEN, &ctrl->flags); 4627 } 4628 EXPORT_SYMBOL_GPL(nvme_unfreeze); 4629 4630 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 4631 { 4632 struct nvme_ns *ns; 4633 4634 down_read(&ctrl->namespaces_rwsem); 4635 list_for_each_entry(ns, &ctrl->namespaces, list) { 4636 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 4637 if (timeout <= 0) 4638 break; 4639 } 4640 up_read(&ctrl->namespaces_rwsem); 4641 return timeout; 4642 } 4643 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 4644 4645 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 4646 { 4647 struct nvme_ns *ns; 4648 4649 down_read(&ctrl->namespaces_rwsem); 4650 list_for_each_entry(ns, &ctrl->namespaces, list) 4651 blk_mq_freeze_queue_wait(ns->queue); 4652 up_read(&ctrl->namespaces_rwsem); 4653 } 4654 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 4655 4656 void nvme_start_freeze(struct nvme_ctrl *ctrl) 4657 { 4658 struct nvme_ns *ns; 4659 4660 set_bit(NVME_CTRL_FROZEN, &ctrl->flags); 4661 down_read(&ctrl->namespaces_rwsem); 4662 list_for_each_entry(ns, &ctrl->namespaces, list) 4663 blk_freeze_queue_start(ns->queue); 4664 up_read(&ctrl->namespaces_rwsem); 4665 } 4666 EXPORT_SYMBOL_GPL(nvme_start_freeze); 4667 4668 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl) 4669 { 4670 if (!ctrl->tagset) 4671 return; 4672 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4673 blk_mq_quiesce_tagset(ctrl->tagset); 4674 else 4675 blk_mq_wait_quiesce_done(ctrl->tagset); 4676 } 4677 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues); 4678 4679 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl) 4680 { 4681 if (!ctrl->tagset) 4682 return; 4683 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4684 blk_mq_unquiesce_tagset(ctrl->tagset); 4685 } 4686 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues); 4687 4688 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl) 4689 { 4690 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4691 blk_mq_quiesce_queue(ctrl->admin_q); 4692 else 4693 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set); 4694 } 4695 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue); 4696 4697 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl) 4698 { 4699 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4700 blk_mq_unquiesce_queue(ctrl->admin_q); 4701 } 4702 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue); 4703 4704 void nvme_sync_io_queues(struct nvme_ctrl *ctrl) 4705 { 4706 struct nvme_ns *ns; 4707 4708 down_read(&ctrl->namespaces_rwsem); 4709 list_for_each_entry(ns, &ctrl->namespaces, list) 4710 blk_sync_queue(ns->queue); 4711 up_read(&ctrl->namespaces_rwsem); 4712 } 4713 EXPORT_SYMBOL_GPL(nvme_sync_io_queues); 4714 4715 void nvme_sync_queues(struct nvme_ctrl *ctrl) 4716 { 4717 nvme_sync_io_queues(ctrl); 4718 if (ctrl->admin_q) 4719 blk_sync_queue(ctrl->admin_q); 4720 } 4721 EXPORT_SYMBOL_GPL(nvme_sync_queues); 4722 4723 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file) 4724 { 4725 if (file->f_op != &nvme_dev_fops) 4726 return NULL; 4727 return file->private_data; 4728 } 4729 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU); 4730 4731 /* 4732 * Check we didn't inadvertently grow the command structure sizes: 4733 */ 4734 static inline void _nvme_check_size(void) 4735 { 4736 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64); 4737 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 4738 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64); 4739 BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 4740 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64); 4741 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 4742 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64); 4743 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64); 4744 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 4745 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64); 4746 BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 4747 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE); 4748 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE); 4749 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) != 4750 NVME_IDENTIFY_DATA_SIZE); 4751 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE); 4752 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE); 4753 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE); 4754 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE); 4755 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 4756 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 4757 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 4758 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64); 4759 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512); 4760 } 4761 4762 4763 static int __init nvme_core_init(void) 4764 { 4765 int result = -ENOMEM; 4766 4767 _nvme_check_size(); 4768 4769 nvme_wq = alloc_workqueue("nvme-wq", 4770 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4771 if (!nvme_wq) 4772 goto out; 4773 4774 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", 4775 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4776 if (!nvme_reset_wq) 4777 goto destroy_wq; 4778 4779 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", 4780 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4781 if (!nvme_delete_wq) 4782 goto destroy_reset_wq; 4783 4784 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0, 4785 NVME_MINORS, "nvme"); 4786 if (result < 0) 4787 goto destroy_delete_wq; 4788 4789 nvme_class = class_create("nvme"); 4790 if (IS_ERR(nvme_class)) { 4791 result = PTR_ERR(nvme_class); 4792 goto unregister_chrdev; 4793 } 4794 nvme_class->dev_uevent = nvme_class_uevent; 4795 4796 nvme_subsys_class = class_create("nvme-subsystem"); 4797 if (IS_ERR(nvme_subsys_class)) { 4798 result = PTR_ERR(nvme_subsys_class); 4799 goto destroy_class; 4800 } 4801 4802 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS, 4803 "nvme-generic"); 4804 if (result < 0) 4805 goto destroy_subsys_class; 4806 4807 nvme_ns_chr_class = class_create("nvme-generic"); 4808 if (IS_ERR(nvme_ns_chr_class)) { 4809 result = PTR_ERR(nvme_ns_chr_class); 4810 goto unregister_generic_ns; 4811 } 4812 result = nvme_init_auth(); 4813 if (result) 4814 goto destroy_ns_chr; 4815 return 0; 4816 4817 destroy_ns_chr: 4818 class_destroy(nvme_ns_chr_class); 4819 unregister_generic_ns: 4820 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4821 destroy_subsys_class: 4822 class_destroy(nvme_subsys_class); 4823 destroy_class: 4824 class_destroy(nvme_class); 4825 unregister_chrdev: 4826 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4827 destroy_delete_wq: 4828 destroy_workqueue(nvme_delete_wq); 4829 destroy_reset_wq: 4830 destroy_workqueue(nvme_reset_wq); 4831 destroy_wq: 4832 destroy_workqueue(nvme_wq); 4833 out: 4834 return result; 4835 } 4836 4837 static void __exit nvme_core_exit(void) 4838 { 4839 nvme_exit_auth(); 4840 class_destroy(nvme_ns_chr_class); 4841 class_destroy(nvme_subsys_class); 4842 class_destroy(nvme_class); 4843 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4844 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4845 destroy_workqueue(nvme_delete_wq); 4846 destroy_workqueue(nvme_reset_wq); 4847 destroy_workqueue(nvme_wq); 4848 ida_destroy(&nvme_ns_chr_minor_ida); 4849 ida_destroy(&nvme_instance_ida); 4850 } 4851 4852 MODULE_LICENSE("GPL"); 4853 MODULE_VERSION("1.0"); 4854 module_init(nvme_core_init); 4855 module_exit(nvme_core_exit); 4856