xref: /linux/drivers/nvme/host/core.c (revision 0945b43b4ef8833d73daf5d057d07b64a23b4220)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * NVM Express device driver
4  * Copyright (c) 2011-2014, Intel Corporation.
5  */
6 
7 #include <linux/blkdev.h>
8 #include <linux/blk-mq.h>
9 #include <linux/blk-integrity.h>
10 #include <linux/compat.h>
11 #include <linux/delay.h>
12 #include <linux/errno.h>
13 #include <linux/hdreg.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/backing-dev.h>
17 #include <linux/slab.h>
18 #include <linux/types.h>
19 #include <linux/pr.h>
20 #include <linux/ptrace.h>
21 #include <linux/nvme_ioctl.h>
22 #include <linux/pm_qos.h>
23 #include <linux/ratelimit.h>
24 #include <asm/unaligned.h>
25 
26 #include "nvme.h"
27 #include "fabrics.h"
28 #include <linux/nvme-auth.h>
29 
30 #define CREATE_TRACE_POINTS
31 #include "trace.h"
32 
33 #define NVME_MINORS		(1U << MINORBITS)
34 
35 struct nvme_ns_info {
36 	struct nvme_ns_ids ids;
37 	u32 nsid;
38 	__le32 anagrpid;
39 	bool is_shared;
40 	bool is_readonly;
41 	bool is_ready;
42 	bool is_removed;
43 };
44 
45 unsigned int admin_timeout = 60;
46 module_param(admin_timeout, uint, 0644);
47 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
48 EXPORT_SYMBOL_GPL(admin_timeout);
49 
50 unsigned int nvme_io_timeout = 30;
51 module_param_named(io_timeout, nvme_io_timeout, uint, 0644);
52 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
53 EXPORT_SYMBOL_GPL(nvme_io_timeout);
54 
55 static unsigned char shutdown_timeout = 5;
56 module_param(shutdown_timeout, byte, 0644);
57 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
58 
59 static u8 nvme_max_retries = 5;
60 module_param_named(max_retries, nvme_max_retries, byte, 0644);
61 MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
62 
63 static unsigned long default_ps_max_latency_us = 100000;
64 module_param(default_ps_max_latency_us, ulong, 0644);
65 MODULE_PARM_DESC(default_ps_max_latency_us,
66 		 "max power saving latency for new devices; use PM QOS to change per device");
67 
68 static bool force_apst;
69 module_param(force_apst, bool, 0644);
70 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
71 
72 static unsigned long apst_primary_timeout_ms = 100;
73 module_param(apst_primary_timeout_ms, ulong, 0644);
74 MODULE_PARM_DESC(apst_primary_timeout_ms,
75 	"primary APST timeout in ms");
76 
77 static unsigned long apst_secondary_timeout_ms = 2000;
78 module_param(apst_secondary_timeout_ms, ulong, 0644);
79 MODULE_PARM_DESC(apst_secondary_timeout_ms,
80 	"secondary APST timeout in ms");
81 
82 static unsigned long apst_primary_latency_tol_us = 15000;
83 module_param(apst_primary_latency_tol_us, ulong, 0644);
84 MODULE_PARM_DESC(apst_primary_latency_tol_us,
85 	"primary APST latency tolerance in us");
86 
87 static unsigned long apst_secondary_latency_tol_us = 100000;
88 module_param(apst_secondary_latency_tol_us, ulong, 0644);
89 MODULE_PARM_DESC(apst_secondary_latency_tol_us,
90 	"secondary APST latency tolerance in us");
91 
92 /*
93  * nvme_wq - hosts nvme related works that are not reset or delete
94  * nvme_reset_wq - hosts nvme reset works
95  * nvme_delete_wq - hosts nvme delete works
96  *
97  * nvme_wq will host works such as scan, aen handling, fw activation,
98  * keep-alive, periodic reconnects etc. nvme_reset_wq
99  * runs reset works which also flush works hosted on nvme_wq for
100  * serialization purposes. nvme_delete_wq host controller deletion
101  * works which flush reset works for serialization.
102  */
103 struct workqueue_struct *nvme_wq;
104 EXPORT_SYMBOL_GPL(nvme_wq);
105 
106 struct workqueue_struct *nvme_reset_wq;
107 EXPORT_SYMBOL_GPL(nvme_reset_wq);
108 
109 struct workqueue_struct *nvme_delete_wq;
110 EXPORT_SYMBOL_GPL(nvme_delete_wq);
111 
112 static LIST_HEAD(nvme_subsystems);
113 static DEFINE_MUTEX(nvme_subsystems_lock);
114 
115 static DEFINE_IDA(nvme_instance_ida);
116 static dev_t nvme_ctrl_base_chr_devt;
117 static struct class *nvme_class;
118 static struct class *nvme_subsys_class;
119 
120 static DEFINE_IDA(nvme_ns_chr_minor_ida);
121 static dev_t nvme_ns_chr_devt;
122 static struct class *nvme_ns_chr_class;
123 
124 static void nvme_put_subsystem(struct nvme_subsystem *subsys);
125 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
126 					   unsigned nsid);
127 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
128 				   struct nvme_command *cmd);
129 
130 void nvme_queue_scan(struct nvme_ctrl *ctrl)
131 {
132 	/*
133 	 * Only new queue scan work when admin and IO queues are both alive
134 	 */
135 	if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset)
136 		queue_work(nvme_wq, &ctrl->scan_work);
137 }
138 
139 /*
140  * Use this function to proceed with scheduling reset_work for a controller
141  * that had previously been set to the resetting state. This is intended for
142  * code paths that can't be interrupted by other reset attempts. A hot removal
143  * may prevent this from succeeding.
144  */
145 int nvme_try_sched_reset(struct nvme_ctrl *ctrl)
146 {
147 	if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING)
148 		return -EBUSY;
149 	if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
150 		return -EBUSY;
151 	return 0;
152 }
153 EXPORT_SYMBOL_GPL(nvme_try_sched_reset);
154 
155 static void nvme_failfast_work(struct work_struct *work)
156 {
157 	struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
158 			struct nvme_ctrl, failfast_work);
159 
160 	if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING)
161 		return;
162 
163 	set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
164 	dev_info(ctrl->device, "failfast expired\n");
165 	nvme_kick_requeue_lists(ctrl);
166 }
167 
168 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl)
169 {
170 	if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1)
171 		return;
172 
173 	schedule_delayed_work(&ctrl->failfast_work,
174 			      ctrl->opts->fast_io_fail_tmo * HZ);
175 }
176 
177 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl)
178 {
179 	if (!ctrl->opts)
180 		return;
181 
182 	cancel_delayed_work_sync(&ctrl->failfast_work);
183 	clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
184 }
185 
186 
187 int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
188 {
189 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
190 		return -EBUSY;
191 	if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
192 		return -EBUSY;
193 	return 0;
194 }
195 EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
196 
197 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
198 {
199 	int ret;
200 
201 	ret = nvme_reset_ctrl(ctrl);
202 	if (!ret) {
203 		flush_work(&ctrl->reset_work);
204 		if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE)
205 			ret = -ENETRESET;
206 	}
207 
208 	return ret;
209 }
210 
211 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl)
212 {
213 	dev_info(ctrl->device,
214 		 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl));
215 
216 	flush_work(&ctrl->reset_work);
217 	nvme_stop_ctrl(ctrl);
218 	nvme_remove_namespaces(ctrl);
219 	ctrl->ops->delete_ctrl(ctrl);
220 	nvme_uninit_ctrl(ctrl);
221 }
222 
223 static void nvme_delete_ctrl_work(struct work_struct *work)
224 {
225 	struct nvme_ctrl *ctrl =
226 		container_of(work, struct nvme_ctrl, delete_work);
227 
228 	nvme_do_delete_ctrl(ctrl);
229 }
230 
231 int nvme_delete_ctrl(struct nvme_ctrl *ctrl)
232 {
233 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
234 		return -EBUSY;
235 	if (!queue_work(nvme_delete_wq, &ctrl->delete_work))
236 		return -EBUSY;
237 	return 0;
238 }
239 EXPORT_SYMBOL_GPL(nvme_delete_ctrl);
240 
241 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl)
242 {
243 	/*
244 	 * Keep a reference until nvme_do_delete_ctrl() complete,
245 	 * since ->delete_ctrl can free the controller.
246 	 */
247 	nvme_get_ctrl(ctrl);
248 	if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
249 		nvme_do_delete_ctrl(ctrl);
250 	nvme_put_ctrl(ctrl);
251 }
252 
253 static blk_status_t nvme_error_status(u16 status)
254 {
255 	switch (status & 0x7ff) {
256 	case NVME_SC_SUCCESS:
257 		return BLK_STS_OK;
258 	case NVME_SC_CAP_EXCEEDED:
259 		return BLK_STS_NOSPC;
260 	case NVME_SC_LBA_RANGE:
261 	case NVME_SC_CMD_INTERRUPTED:
262 	case NVME_SC_NS_NOT_READY:
263 		return BLK_STS_TARGET;
264 	case NVME_SC_BAD_ATTRIBUTES:
265 	case NVME_SC_ONCS_NOT_SUPPORTED:
266 	case NVME_SC_INVALID_OPCODE:
267 	case NVME_SC_INVALID_FIELD:
268 	case NVME_SC_INVALID_NS:
269 		return BLK_STS_NOTSUPP;
270 	case NVME_SC_WRITE_FAULT:
271 	case NVME_SC_READ_ERROR:
272 	case NVME_SC_UNWRITTEN_BLOCK:
273 	case NVME_SC_ACCESS_DENIED:
274 	case NVME_SC_READ_ONLY:
275 	case NVME_SC_COMPARE_FAILED:
276 		return BLK_STS_MEDIUM;
277 	case NVME_SC_GUARD_CHECK:
278 	case NVME_SC_APPTAG_CHECK:
279 	case NVME_SC_REFTAG_CHECK:
280 	case NVME_SC_INVALID_PI:
281 		return BLK_STS_PROTECTION;
282 	case NVME_SC_RESERVATION_CONFLICT:
283 		return BLK_STS_RESV_CONFLICT;
284 	case NVME_SC_HOST_PATH_ERROR:
285 		return BLK_STS_TRANSPORT;
286 	case NVME_SC_ZONE_TOO_MANY_ACTIVE:
287 		return BLK_STS_ZONE_ACTIVE_RESOURCE;
288 	case NVME_SC_ZONE_TOO_MANY_OPEN:
289 		return BLK_STS_ZONE_OPEN_RESOURCE;
290 	default:
291 		return BLK_STS_IOERR;
292 	}
293 }
294 
295 static void nvme_retry_req(struct request *req)
296 {
297 	unsigned long delay = 0;
298 	u16 crd;
299 
300 	/* The mask and shift result must be <= 3 */
301 	crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11;
302 	if (crd)
303 		delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100;
304 
305 	nvme_req(req)->retries++;
306 	blk_mq_requeue_request(req, false);
307 	blk_mq_delay_kick_requeue_list(req->q, delay);
308 }
309 
310 static void nvme_log_error(struct request *req)
311 {
312 	struct nvme_ns *ns = req->q->queuedata;
313 	struct nvme_request *nr = nvme_req(req);
314 
315 	if (ns) {
316 		pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %u blocks, %s (sct 0x%x / sc 0x%x) %s%s\n",
317 		       ns->disk ? ns->disk->disk_name : "?",
318 		       nvme_get_opcode_str(nr->cmd->common.opcode),
319 		       nr->cmd->common.opcode,
320 		       nvme_sect_to_lba(ns->head, blk_rq_pos(req)),
321 		       blk_rq_bytes(req) >> ns->head->lba_shift,
322 		       nvme_get_error_status_str(nr->status),
323 		       nr->status >> 8 & 7,	/* Status Code Type */
324 		       nr->status & 0xff,	/* Status Code */
325 		       nr->status & NVME_SC_MORE ? "MORE " : "",
326 		       nr->status & NVME_SC_DNR  ? "DNR "  : "");
327 		return;
328 	}
329 
330 	pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n",
331 			   dev_name(nr->ctrl->device),
332 			   nvme_get_admin_opcode_str(nr->cmd->common.opcode),
333 			   nr->cmd->common.opcode,
334 			   nvme_get_error_status_str(nr->status),
335 			   nr->status >> 8 & 7,	/* Status Code Type */
336 			   nr->status & 0xff,	/* Status Code */
337 			   nr->status & NVME_SC_MORE ? "MORE " : "",
338 			   nr->status & NVME_SC_DNR  ? "DNR "  : "");
339 }
340 
341 enum nvme_disposition {
342 	COMPLETE,
343 	RETRY,
344 	FAILOVER,
345 	AUTHENTICATE,
346 };
347 
348 static inline enum nvme_disposition nvme_decide_disposition(struct request *req)
349 {
350 	if (likely(nvme_req(req)->status == 0))
351 		return COMPLETE;
352 
353 	if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED)
354 		return AUTHENTICATE;
355 
356 	if (blk_noretry_request(req) ||
357 	    (nvme_req(req)->status & NVME_SC_DNR) ||
358 	    nvme_req(req)->retries >= nvme_max_retries)
359 		return COMPLETE;
360 
361 	if (req->cmd_flags & REQ_NVME_MPATH) {
362 		if (nvme_is_path_error(nvme_req(req)->status) ||
363 		    blk_queue_dying(req->q))
364 			return FAILOVER;
365 	} else {
366 		if (blk_queue_dying(req->q))
367 			return COMPLETE;
368 	}
369 
370 	return RETRY;
371 }
372 
373 static inline void nvme_end_req_zoned(struct request *req)
374 {
375 	if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
376 	    req_op(req) == REQ_OP_ZONE_APPEND) {
377 		struct nvme_ns *ns = req->q->queuedata;
378 
379 		req->__sector = nvme_lba_to_sect(ns->head,
380 			le64_to_cpu(nvme_req(req)->result.u64));
381 	}
382 }
383 
384 static inline void nvme_end_req(struct request *req)
385 {
386 	blk_status_t status = nvme_error_status(nvme_req(req)->status);
387 
388 	if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET)))
389 		nvme_log_error(req);
390 	nvme_end_req_zoned(req);
391 	nvme_trace_bio_complete(req);
392 	if (req->cmd_flags & REQ_NVME_MPATH)
393 		nvme_mpath_end_request(req);
394 	blk_mq_end_request(req, status);
395 }
396 
397 void nvme_complete_rq(struct request *req)
398 {
399 	struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
400 
401 	trace_nvme_complete_rq(req);
402 	nvme_cleanup_cmd(req);
403 
404 	/*
405 	 * Completions of long-running commands should not be able to
406 	 * defer sending of periodic keep alives, since the controller
407 	 * may have completed processing such commands a long time ago
408 	 * (arbitrarily close to command submission time).
409 	 * req->deadline - req->timeout is the command submission time
410 	 * in jiffies.
411 	 */
412 	if (ctrl->kas &&
413 	    req->deadline - req->timeout >= ctrl->ka_last_check_time)
414 		ctrl->comp_seen = true;
415 
416 	switch (nvme_decide_disposition(req)) {
417 	case COMPLETE:
418 		nvme_end_req(req);
419 		return;
420 	case RETRY:
421 		nvme_retry_req(req);
422 		return;
423 	case FAILOVER:
424 		nvme_failover_req(req);
425 		return;
426 	case AUTHENTICATE:
427 #ifdef CONFIG_NVME_HOST_AUTH
428 		queue_work(nvme_wq, &ctrl->dhchap_auth_work);
429 		nvme_retry_req(req);
430 #else
431 		nvme_end_req(req);
432 #endif
433 		return;
434 	}
435 }
436 EXPORT_SYMBOL_GPL(nvme_complete_rq);
437 
438 void nvme_complete_batch_req(struct request *req)
439 {
440 	trace_nvme_complete_rq(req);
441 	nvme_cleanup_cmd(req);
442 	nvme_end_req_zoned(req);
443 }
444 EXPORT_SYMBOL_GPL(nvme_complete_batch_req);
445 
446 /*
447  * Called to unwind from ->queue_rq on a failed command submission so that the
448  * multipathing code gets called to potentially failover to another path.
449  * The caller needs to unwind all transport specific resource allocations and
450  * must return propagate the return value.
451  */
452 blk_status_t nvme_host_path_error(struct request *req)
453 {
454 	nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR;
455 	blk_mq_set_request_complete(req);
456 	nvme_complete_rq(req);
457 	return BLK_STS_OK;
458 }
459 EXPORT_SYMBOL_GPL(nvme_host_path_error);
460 
461 bool nvme_cancel_request(struct request *req, void *data)
462 {
463 	dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
464 				"Cancelling I/O %d", req->tag);
465 
466 	/* don't abort one completed or idle request */
467 	if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT)
468 		return true;
469 
470 	nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD;
471 	nvme_req(req)->flags |= NVME_REQ_CANCELLED;
472 	blk_mq_complete_request(req);
473 	return true;
474 }
475 EXPORT_SYMBOL_GPL(nvme_cancel_request);
476 
477 void nvme_cancel_tagset(struct nvme_ctrl *ctrl)
478 {
479 	if (ctrl->tagset) {
480 		blk_mq_tagset_busy_iter(ctrl->tagset,
481 				nvme_cancel_request, ctrl);
482 		blk_mq_tagset_wait_completed_request(ctrl->tagset);
483 	}
484 }
485 EXPORT_SYMBOL_GPL(nvme_cancel_tagset);
486 
487 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl)
488 {
489 	if (ctrl->admin_tagset) {
490 		blk_mq_tagset_busy_iter(ctrl->admin_tagset,
491 				nvme_cancel_request, ctrl);
492 		blk_mq_tagset_wait_completed_request(ctrl->admin_tagset);
493 	}
494 }
495 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset);
496 
497 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
498 		enum nvme_ctrl_state new_state)
499 {
500 	enum nvme_ctrl_state old_state;
501 	unsigned long flags;
502 	bool changed = false;
503 
504 	spin_lock_irqsave(&ctrl->lock, flags);
505 
506 	old_state = nvme_ctrl_state(ctrl);
507 	switch (new_state) {
508 	case NVME_CTRL_LIVE:
509 		switch (old_state) {
510 		case NVME_CTRL_NEW:
511 		case NVME_CTRL_RESETTING:
512 		case NVME_CTRL_CONNECTING:
513 			changed = true;
514 			fallthrough;
515 		default:
516 			break;
517 		}
518 		break;
519 	case NVME_CTRL_RESETTING:
520 		switch (old_state) {
521 		case NVME_CTRL_NEW:
522 		case NVME_CTRL_LIVE:
523 			changed = true;
524 			fallthrough;
525 		default:
526 			break;
527 		}
528 		break;
529 	case NVME_CTRL_CONNECTING:
530 		switch (old_state) {
531 		case NVME_CTRL_NEW:
532 		case NVME_CTRL_RESETTING:
533 			changed = true;
534 			fallthrough;
535 		default:
536 			break;
537 		}
538 		break;
539 	case NVME_CTRL_DELETING:
540 		switch (old_state) {
541 		case NVME_CTRL_LIVE:
542 		case NVME_CTRL_RESETTING:
543 		case NVME_CTRL_CONNECTING:
544 			changed = true;
545 			fallthrough;
546 		default:
547 			break;
548 		}
549 		break;
550 	case NVME_CTRL_DELETING_NOIO:
551 		switch (old_state) {
552 		case NVME_CTRL_DELETING:
553 		case NVME_CTRL_DEAD:
554 			changed = true;
555 			fallthrough;
556 		default:
557 			break;
558 		}
559 		break;
560 	case NVME_CTRL_DEAD:
561 		switch (old_state) {
562 		case NVME_CTRL_DELETING:
563 			changed = true;
564 			fallthrough;
565 		default:
566 			break;
567 		}
568 		break;
569 	default:
570 		break;
571 	}
572 
573 	if (changed) {
574 		WRITE_ONCE(ctrl->state, new_state);
575 		wake_up_all(&ctrl->state_wq);
576 	}
577 
578 	spin_unlock_irqrestore(&ctrl->lock, flags);
579 	if (!changed)
580 		return false;
581 
582 	if (new_state == NVME_CTRL_LIVE) {
583 		if (old_state == NVME_CTRL_CONNECTING)
584 			nvme_stop_failfast_work(ctrl);
585 		nvme_kick_requeue_lists(ctrl);
586 	} else if (new_state == NVME_CTRL_CONNECTING &&
587 		old_state == NVME_CTRL_RESETTING) {
588 		nvme_start_failfast_work(ctrl);
589 	}
590 	return changed;
591 }
592 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
593 
594 /*
595  * Returns true for sink states that can't ever transition back to live.
596  */
597 static bool nvme_state_terminal(struct nvme_ctrl *ctrl)
598 {
599 	switch (nvme_ctrl_state(ctrl)) {
600 	case NVME_CTRL_NEW:
601 	case NVME_CTRL_LIVE:
602 	case NVME_CTRL_RESETTING:
603 	case NVME_CTRL_CONNECTING:
604 		return false;
605 	case NVME_CTRL_DELETING:
606 	case NVME_CTRL_DELETING_NOIO:
607 	case NVME_CTRL_DEAD:
608 		return true;
609 	default:
610 		WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state);
611 		return true;
612 	}
613 }
614 
615 /*
616  * Waits for the controller state to be resetting, or returns false if it is
617  * not possible to ever transition to that state.
618  */
619 bool nvme_wait_reset(struct nvme_ctrl *ctrl)
620 {
621 	wait_event(ctrl->state_wq,
622 		   nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) ||
623 		   nvme_state_terminal(ctrl));
624 	return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING;
625 }
626 EXPORT_SYMBOL_GPL(nvme_wait_reset);
627 
628 static void nvme_free_ns_head(struct kref *ref)
629 {
630 	struct nvme_ns_head *head =
631 		container_of(ref, struct nvme_ns_head, ref);
632 
633 	nvme_mpath_remove_disk(head);
634 	ida_free(&head->subsys->ns_ida, head->instance);
635 	cleanup_srcu_struct(&head->srcu);
636 	nvme_put_subsystem(head->subsys);
637 	kfree(head);
638 }
639 
640 bool nvme_tryget_ns_head(struct nvme_ns_head *head)
641 {
642 	return kref_get_unless_zero(&head->ref);
643 }
644 
645 void nvme_put_ns_head(struct nvme_ns_head *head)
646 {
647 	kref_put(&head->ref, nvme_free_ns_head);
648 }
649 
650 static void nvme_free_ns(struct kref *kref)
651 {
652 	struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
653 
654 	put_disk(ns->disk);
655 	nvme_put_ns_head(ns->head);
656 	nvme_put_ctrl(ns->ctrl);
657 	kfree(ns);
658 }
659 
660 static inline bool nvme_get_ns(struct nvme_ns *ns)
661 {
662 	return kref_get_unless_zero(&ns->kref);
663 }
664 
665 void nvme_put_ns(struct nvme_ns *ns)
666 {
667 	kref_put(&ns->kref, nvme_free_ns);
668 }
669 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU);
670 
671 static inline void nvme_clear_nvme_request(struct request *req)
672 {
673 	nvme_req(req)->status = 0;
674 	nvme_req(req)->retries = 0;
675 	nvme_req(req)->flags = 0;
676 	req->rq_flags |= RQF_DONTPREP;
677 }
678 
679 /* initialize a passthrough request */
680 void nvme_init_request(struct request *req, struct nvme_command *cmd)
681 {
682 	if (req->q->queuedata)
683 		req->timeout = NVME_IO_TIMEOUT;
684 	else /* no queuedata implies admin queue */
685 		req->timeout = NVME_ADMIN_TIMEOUT;
686 
687 	/* passthru commands should let the driver set the SGL flags */
688 	cmd->common.flags &= ~NVME_CMD_SGL_ALL;
689 
690 	req->cmd_flags |= REQ_FAILFAST_DRIVER;
691 	if (req->mq_hctx->type == HCTX_TYPE_POLL)
692 		req->cmd_flags |= REQ_POLLED;
693 	nvme_clear_nvme_request(req);
694 	req->rq_flags |= RQF_QUIET;
695 	memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd));
696 }
697 EXPORT_SYMBOL_GPL(nvme_init_request);
698 
699 /*
700  * For something we're not in a state to send to the device the default action
701  * is to busy it and retry it after the controller state is recovered.  However,
702  * if the controller is deleting or if anything is marked for failfast or
703  * nvme multipath it is immediately failed.
704  *
705  * Note: commands used to initialize the controller will be marked for failfast.
706  * Note: nvme cli/ioctl commands are marked for failfast.
707  */
708 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
709 		struct request *rq)
710 {
711 	enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
712 
713 	if (state != NVME_CTRL_DELETING_NOIO &&
714 	    state != NVME_CTRL_DELETING &&
715 	    state != NVME_CTRL_DEAD &&
716 	    !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) &&
717 	    !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH))
718 		return BLK_STS_RESOURCE;
719 	return nvme_host_path_error(rq);
720 }
721 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command);
722 
723 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
724 		bool queue_live, enum nvme_ctrl_state state)
725 {
726 	struct nvme_request *req = nvme_req(rq);
727 
728 	/*
729 	 * currently we have a problem sending passthru commands
730 	 * on the admin_q if the controller is not LIVE because we can't
731 	 * make sure that they are going out after the admin connect,
732 	 * controller enable and/or other commands in the initialization
733 	 * sequence. until the controller will be LIVE, fail with
734 	 * BLK_STS_RESOURCE so that they will be rescheduled.
735 	 */
736 	if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD))
737 		return false;
738 
739 	if (ctrl->ops->flags & NVME_F_FABRICS) {
740 		/*
741 		 * Only allow commands on a live queue, except for the connect
742 		 * command, which is require to set the queue live in the
743 		 * appropinquate states.
744 		 */
745 		switch (state) {
746 		case NVME_CTRL_CONNECTING:
747 			if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) &&
748 			    (req->cmd->fabrics.fctype == nvme_fabrics_type_connect ||
749 			     req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send ||
750 			     req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive))
751 				return true;
752 			break;
753 		default:
754 			break;
755 		case NVME_CTRL_DEAD:
756 			return false;
757 		}
758 	}
759 
760 	return queue_live;
761 }
762 EXPORT_SYMBOL_GPL(__nvme_check_ready);
763 
764 static inline void nvme_setup_flush(struct nvme_ns *ns,
765 		struct nvme_command *cmnd)
766 {
767 	memset(cmnd, 0, sizeof(*cmnd));
768 	cmnd->common.opcode = nvme_cmd_flush;
769 	cmnd->common.nsid = cpu_to_le32(ns->head->ns_id);
770 }
771 
772 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
773 		struct nvme_command *cmnd)
774 {
775 	unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
776 	struct nvme_dsm_range *range;
777 	struct bio *bio;
778 
779 	/*
780 	 * Some devices do not consider the DSM 'Number of Ranges' field when
781 	 * determining how much data to DMA. Always allocate memory for maximum
782 	 * number of segments to prevent device reading beyond end of buffer.
783 	 */
784 	static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES;
785 
786 	range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN);
787 	if (!range) {
788 		/*
789 		 * If we fail allocation our range, fallback to the controller
790 		 * discard page. If that's also busy, it's safe to return
791 		 * busy, as we know we can make progress once that's freed.
792 		 */
793 		if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy))
794 			return BLK_STS_RESOURCE;
795 
796 		range = page_address(ns->ctrl->discard_page);
797 	}
798 
799 	if (queue_max_discard_segments(req->q) == 1) {
800 		u64 slba = nvme_sect_to_lba(ns->head, blk_rq_pos(req));
801 		u32 nlb = blk_rq_sectors(req) >> (ns->head->lba_shift - 9);
802 
803 		range[0].cattr = cpu_to_le32(0);
804 		range[0].nlb = cpu_to_le32(nlb);
805 		range[0].slba = cpu_to_le64(slba);
806 		n = 1;
807 	} else {
808 		__rq_for_each_bio(bio, req) {
809 			u64 slba = nvme_sect_to_lba(ns->head,
810 						    bio->bi_iter.bi_sector);
811 			u32 nlb = bio->bi_iter.bi_size >> ns->head->lba_shift;
812 
813 			if (n < segments) {
814 				range[n].cattr = cpu_to_le32(0);
815 				range[n].nlb = cpu_to_le32(nlb);
816 				range[n].slba = cpu_to_le64(slba);
817 			}
818 			n++;
819 		}
820 	}
821 
822 	if (WARN_ON_ONCE(n != segments)) {
823 		if (virt_to_page(range) == ns->ctrl->discard_page)
824 			clear_bit_unlock(0, &ns->ctrl->discard_page_busy);
825 		else
826 			kfree(range);
827 		return BLK_STS_IOERR;
828 	}
829 
830 	memset(cmnd, 0, sizeof(*cmnd));
831 	cmnd->dsm.opcode = nvme_cmd_dsm;
832 	cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id);
833 	cmnd->dsm.nr = cpu_to_le32(segments - 1);
834 	cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
835 
836 	bvec_set_virt(&req->special_vec, range, alloc_size);
837 	req->rq_flags |= RQF_SPECIAL_PAYLOAD;
838 
839 	return BLK_STS_OK;
840 }
841 
842 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd,
843 			      struct request *req)
844 {
845 	u32 upper, lower;
846 	u64 ref48;
847 
848 	/* both rw and write zeroes share the same reftag format */
849 	switch (ns->head->guard_type) {
850 	case NVME_NVM_NS_16B_GUARD:
851 		cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req));
852 		break;
853 	case NVME_NVM_NS_64B_GUARD:
854 		ref48 = ext_pi_ref_tag(req);
855 		lower = lower_32_bits(ref48);
856 		upper = upper_32_bits(ref48);
857 
858 		cmnd->rw.reftag = cpu_to_le32(lower);
859 		cmnd->rw.cdw3 = cpu_to_le32(upper);
860 		break;
861 	default:
862 		break;
863 	}
864 }
865 
866 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns,
867 		struct request *req, struct nvme_command *cmnd)
868 {
869 	memset(cmnd, 0, sizeof(*cmnd));
870 
871 	if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
872 		return nvme_setup_discard(ns, req, cmnd);
873 
874 	cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes;
875 	cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id);
876 	cmnd->write_zeroes.slba =
877 		cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
878 	cmnd->write_zeroes.length =
879 		cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
880 
881 	if (!(req->cmd_flags & REQ_NOUNMAP) &&
882 	    (ns->head->features & NVME_NS_DEAC))
883 		cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC);
884 
885 	if (nvme_ns_has_pi(ns->head)) {
886 		cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT);
887 
888 		switch (ns->head->pi_type) {
889 		case NVME_NS_DPS_PI_TYPE1:
890 		case NVME_NS_DPS_PI_TYPE2:
891 			nvme_set_ref_tag(ns, cmnd, req);
892 			break;
893 		}
894 	}
895 
896 	return BLK_STS_OK;
897 }
898 
899 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
900 		struct request *req, struct nvme_command *cmnd,
901 		enum nvme_opcode op)
902 {
903 	u16 control = 0;
904 	u32 dsmgmt = 0;
905 
906 	if (req->cmd_flags & REQ_FUA)
907 		control |= NVME_RW_FUA;
908 	if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
909 		control |= NVME_RW_LR;
910 
911 	if (req->cmd_flags & REQ_RAHEAD)
912 		dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
913 
914 	cmnd->rw.opcode = op;
915 	cmnd->rw.flags = 0;
916 	cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id);
917 	cmnd->rw.cdw2 = 0;
918 	cmnd->rw.cdw3 = 0;
919 	cmnd->rw.metadata = 0;
920 	cmnd->rw.slba =
921 		cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
922 	cmnd->rw.length =
923 		cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
924 	cmnd->rw.reftag = 0;
925 	cmnd->rw.apptag = 0;
926 	cmnd->rw.appmask = 0;
927 
928 	if (ns->head->ms) {
929 		/*
930 		 * If formated with metadata, the block layer always provides a
931 		 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled.  Else
932 		 * we enable the PRACT bit for protection information or set the
933 		 * namespace capacity to zero to prevent any I/O.
934 		 */
935 		if (!blk_integrity_rq(req)) {
936 			if (WARN_ON_ONCE(!nvme_ns_has_pi(ns->head)))
937 				return BLK_STS_NOTSUPP;
938 			control |= NVME_RW_PRINFO_PRACT;
939 		}
940 
941 		switch (ns->head->pi_type) {
942 		case NVME_NS_DPS_PI_TYPE3:
943 			control |= NVME_RW_PRINFO_PRCHK_GUARD;
944 			break;
945 		case NVME_NS_DPS_PI_TYPE1:
946 		case NVME_NS_DPS_PI_TYPE2:
947 			control |= NVME_RW_PRINFO_PRCHK_GUARD |
948 					NVME_RW_PRINFO_PRCHK_REF;
949 			if (op == nvme_cmd_zone_append)
950 				control |= NVME_RW_APPEND_PIREMAP;
951 			nvme_set_ref_tag(ns, cmnd, req);
952 			break;
953 		}
954 	}
955 
956 	cmnd->rw.control = cpu_to_le16(control);
957 	cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
958 	return 0;
959 }
960 
961 void nvme_cleanup_cmd(struct request *req)
962 {
963 	if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
964 		struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
965 
966 		if (req->special_vec.bv_page == ctrl->discard_page)
967 			clear_bit_unlock(0, &ctrl->discard_page_busy);
968 		else
969 			kfree(bvec_virt(&req->special_vec));
970 	}
971 }
972 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd);
973 
974 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req)
975 {
976 	struct nvme_command *cmd = nvme_req(req)->cmd;
977 	blk_status_t ret = BLK_STS_OK;
978 
979 	if (!(req->rq_flags & RQF_DONTPREP))
980 		nvme_clear_nvme_request(req);
981 
982 	switch (req_op(req)) {
983 	case REQ_OP_DRV_IN:
984 	case REQ_OP_DRV_OUT:
985 		/* these are setup prior to execution in nvme_init_request() */
986 		break;
987 	case REQ_OP_FLUSH:
988 		nvme_setup_flush(ns, cmd);
989 		break;
990 	case REQ_OP_ZONE_RESET_ALL:
991 	case REQ_OP_ZONE_RESET:
992 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET);
993 		break;
994 	case REQ_OP_ZONE_OPEN:
995 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN);
996 		break;
997 	case REQ_OP_ZONE_CLOSE:
998 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE);
999 		break;
1000 	case REQ_OP_ZONE_FINISH:
1001 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH);
1002 		break;
1003 	case REQ_OP_WRITE_ZEROES:
1004 		ret = nvme_setup_write_zeroes(ns, req, cmd);
1005 		break;
1006 	case REQ_OP_DISCARD:
1007 		ret = nvme_setup_discard(ns, req, cmd);
1008 		break;
1009 	case REQ_OP_READ:
1010 		ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read);
1011 		break;
1012 	case REQ_OP_WRITE:
1013 		ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write);
1014 		break;
1015 	case REQ_OP_ZONE_APPEND:
1016 		ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append);
1017 		break;
1018 	default:
1019 		WARN_ON_ONCE(1);
1020 		return BLK_STS_IOERR;
1021 	}
1022 
1023 	cmd->common.command_id = nvme_cid(req);
1024 	trace_nvme_setup_cmd(req, cmd);
1025 	return ret;
1026 }
1027 EXPORT_SYMBOL_GPL(nvme_setup_cmd);
1028 
1029 /*
1030  * Return values:
1031  * 0:  success
1032  * >0: nvme controller's cqe status response
1033  * <0: kernel error in lieu of controller response
1034  */
1035 int nvme_execute_rq(struct request *rq, bool at_head)
1036 {
1037 	blk_status_t status;
1038 
1039 	status = blk_execute_rq(rq, at_head);
1040 	if (nvme_req(rq)->flags & NVME_REQ_CANCELLED)
1041 		return -EINTR;
1042 	if (nvme_req(rq)->status)
1043 		return nvme_req(rq)->status;
1044 	return blk_status_to_errno(status);
1045 }
1046 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU);
1047 
1048 /*
1049  * Returns 0 on success.  If the result is negative, it's a Linux error code;
1050  * if the result is positive, it's an NVM Express status code
1051  */
1052 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1053 		union nvme_result *result, void *buffer, unsigned bufflen,
1054 		int qid, nvme_submit_flags_t flags)
1055 {
1056 	struct request *req;
1057 	int ret;
1058 	blk_mq_req_flags_t blk_flags = 0;
1059 
1060 	if (flags & NVME_SUBMIT_NOWAIT)
1061 		blk_flags |= BLK_MQ_REQ_NOWAIT;
1062 	if (flags & NVME_SUBMIT_RESERVED)
1063 		blk_flags |= BLK_MQ_REQ_RESERVED;
1064 	if (qid == NVME_QID_ANY)
1065 		req = blk_mq_alloc_request(q, nvme_req_op(cmd), blk_flags);
1066 	else
1067 		req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), blk_flags,
1068 						qid - 1);
1069 
1070 	if (IS_ERR(req))
1071 		return PTR_ERR(req);
1072 	nvme_init_request(req, cmd);
1073 	if (flags & NVME_SUBMIT_RETRY)
1074 		req->cmd_flags &= ~REQ_FAILFAST_DRIVER;
1075 
1076 	if (buffer && bufflen) {
1077 		ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
1078 		if (ret)
1079 			goto out;
1080 	}
1081 
1082 	ret = nvme_execute_rq(req, flags & NVME_SUBMIT_AT_HEAD);
1083 	if (result && ret >= 0)
1084 		*result = nvme_req(req)->result;
1085  out:
1086 	blk_mq_free_request(req);
1087 	return ret;
1088 }
1089 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
1090 
1091 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1092 		void *buffer, unsigned bufflen)
1093 {
1094 	return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen,
1095 			NVME_QID_ANY, 0);
1096 }
1097 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
1098 
1099 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1100 {
1101 	u32 effects = 0;
1102 
1103 	if (ns) {
1104 		effects = le32_to_cpu(ns->head->effects->iocs[opcode]);
1105 		if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC))
1106 			dev_warn_once(ctrl->device,
1107 				"IO command:%02x has unusual effects:%08x\n",
1108 				opcode, effects);
1109 
1110 		/*
1111 		 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues,
1112 		 * which would deadlock when done on an I/O command.  Note that
1113 		 * We already warn about an unusual effect above.
1114 		 */
1115 		effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1116 	} else {
1117 		effects = le32_to_cpu(ctrl->effects->acs[opcode]);
1118 	}
1119 
1120 	return effects;
1121 }
1122 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU);
1123 
1124 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1125 {
1126 	u32 effects = nvme_command_effects(ctrl, ns, opcode);
1127 
1128 	/*
1129 	 * For simplicity, IO to all namespaces is quiesced even if the command
1130 	 * effects say only one namespace is affected.
1131 	 */
1132 	if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1133 		mutex_lock(&ctrl->scan_lock);
1134 		mutex_lock(&ctrl->subsys->lock);
1135 		nvme_mpath_start_freeze(ctrl->subsys);
1136 		nvme_mpath_wait_freeze(ctrl->subsys);
1137 		nvme_start_freeze(ctrl);
1138 		nvme_wait_freeze(ctrl);
1139 	}
1140 	return effects;
1141 }
1142 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU);
1143 
1144 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1145 		       struct nvme_command *cmd, int status)
1146 {
1147 	if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1148 		nvme_unfreeze(ctrl);
1149 		nvme_mpath_unfreeze(ctrl->subsys);
1150 		mutex_unlock(&ctrl->subsys->lock);
1151 		mutex_unlock(&ctrl->scan_lock);
1152 	}
1153 	if (effects & NVME_CMD_EFFECTS_CCC) {
1154 		if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY,
1155 				      &ctrl->flags)) {
1156 			dev_info(ctrl->device,
1157 "controller capabilities changed, reset may be required to take effect.\n");
1158 		}
1159 	}
1160 	if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) {
1161 		nvme_queue_scan(ctrl);
1162 		flush_work(&ctrl->scan_work);
1163 	}
1164 	if (ns)
1165 		return;
1166 
1167 	switch (cmd->common.opcode) {
1168 	case nvme_admin_set_features:
1169 		switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) {
1170 		case NVME_FEAT_KATO:
1171 			/*
1172 			 * Keep alive commands interval on the host should be
1173 			 * updated when KATO is modified by Set Features
1174 			 * commands.
1175 			 */
1176 			if (!status)
1177 				nvme_update_keep_alive(ctrl, cmd);
1178 			break;
1179 		default:
1180 			break;
1181 		}
1182 		break;
1183 	default:
1184 		break;
1185 	}
1186 }
1187 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU);
1188 
1189 /*
1190  * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1:
1191  *
1192  *   The host should send Keep Alive commands at half of the Keep Alive Timeout
1193  *   accounting for transport roundtrip times [..].
1194  */
1195 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl)
1196 {
1197 	unsigned long delay = ctrl->kato * HZ / 2;
1198 
1199 	/*
1200 	 * When using Traffic Based Keep Alive, we need to run
1201 	 * nvme_keep_alive_work at twice the normal frequency, as one
1202 	 * command completion can postpone sending a keep alive command
1203 	 * by up to twice the delay between runs.
1204 	 */
1205 	if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS)
1206 		delay /= 2;
1207 	return delay;
1208 }
1209 
1210 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl)
1211 {
1212 	unsigned long now = jiffies;
1213 	unsigned long delay = nvme_keep_alive_work_period(ctrl);
1214 	unsigned long ka_next_check_tm = ctrl->ka_last_check_time + delay;
1215 
1216 	if (time_after(now, ka_next_check_tm))
1217 		delay = 0;
1218 	else
1219 		delay = ka_next_check_tm - now;
1220 
1221 	queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1222 }
1223 
1224 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq,
1225 						 blk_status_t status)
1226 {
1227 	struct nvme_ctrl *ctrl = rq->end_io_data;
1228 	unsigned long flags;
1229 	bool startka = false;
1230 	unsigned long rtt = jiffies - (rq->deadline - rq->timeout);
1231 	unsigned long delay = nvme_keep_alive_work_period(ctrl);
1232 
1233 	/*
1234 	 * Subtract off the keepalive RTT so nvme_keep_alive_work runs
1235 	 * at the desired frequency.
1236 	 */
1237 	if (rtt <= delay) {
1238 		delay -= rtt;
1239 	} else {
1240 		dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n",
1241 			 jiffies_to_msecs(rtt));
1242 		delay = 0;
1243 	}
1244 
1245 	blk_mq_free_request(rq);
1246 
1247 	if (status) {
1248 		dev_err(ctrl->device,
1249 			"failed nvme_keep_alive_end_io error=%d\n",
1250 				status);
1251 		return RQ_END_IO_NONE;
1252 	}
1253 
1254 	ctrl->ka_last_check_time = jiffies;
1255 	ctrl->comp_seen = false;
1256 	spin_lock_irqsave(&ctrl->lock, flags);
1257 	if (ctrl->state == NVME_CTRL_LIVE ||
1258 	    ctrl->state == NVME_CTRL_CONNECTING)
1259 		startka = true;
1260 	spin_unlock_irqrestore(&ctrl->lock, flags);
1261 	if (startka)
1262 		queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1263 	return RQ_END_IO_NONE;
1264 }
1265 
1266 static void nvme_keep_alive_work(struct work_struct *work)
1267 {
1268 	struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
1269 			struct nvme_ctrl, ka_work);
1270 	bool comp_seen = ctrl->comp_seen;
1271 	struct request *rq;
1272 
1273 	ctrl->ka_last_check_time = jiffies;
1274 
1275 	if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) {
1276 		dev_dbg(ctrl->device,
1277 			"reschedule traffic based keep-alive timer\n");
1278 		ctrl->comp_seen = false;
1279 		nvme_queue_keep_alive_work(ctrl);
1280 		return;
1281 	}
1282 
1283 	rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd),
1284 				  BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
1285 	if (IS_ERR(rq)) {
1286 		/* allocation failure, reset the controller */
1287 		dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq));
1288 		nvme_reset_ctrl(ctrl);
1289 		return;
1290 	}
1291 	nvme_init_request(rq, &ctrl->ka_cmd);
1292 
1293 	rq->timeout = ctrl->kato * HZ;
1294 	rq->end_io = nvme_keep_alive_end_io;
1295 	rq->end_io_data = ctrl;
1296 	blk_execute_rq_nowait(rq, false);
1297 }
1298 
1299 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
1300 {
1301 	if (unlikely(ctrl->kato == 0))
1302 		return;
1303 
1304 	nvme_queue_keep_alive_work(ctrl);
1305 }
1306 
1307 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
1308 {
1309 	if (unlikely(ctrl->kato == 0))
1310 		return;
1311 
1312 	cancel_delayed_work_sync(&ctrl->ka_work);
1313 }
1314 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
1315 
1316 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
1317 				   struct nvme_command *cmd)
1318 {
1319 	unsigned int new_kato =
1320 		DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000);
1321 
1322 	dev_info(ctrl->device,
1323 		 "keep alive interval updated from %u ms to %u ms\n",
1324 		 ctrl->kato * 1000 / 2, new_kato * 1000 / 2);
1325 
1326 	nvme_stop_keep_alive(ctrl);
1327 	ctrl->kato = new_kato;
1328 	nvme_start_keep_alive(ctrl);
1329 }
1330 
1331 /*
1332  * In NVMe 1.0 the CNS field was just a binary controller or namespace
1333  * flag, thus sending any new CNS opcodes has a big chance of not working.
1334  * Qemu unfortunately had that bug after reporting a 1.1 version compliance
1335  * (but not for any later version).
1336  */
1337 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl)
1338 {
1339 	if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)
1340 		return ctrl->vs < NVME_VS(1, 2, 0);
1341 	return ctrl->vs < NVME_VS(1, 1, 0);
1342 }
1343 
1344 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
1345 {
1346 	struct nvme_command c = { };
1347 	int error;
1348 
1349 	/* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1350 	c.identify.opcode = nvme_admin_identify;
1351 	c.identify.cns = NVME_ID_CNS_CTRL;
1352 
1353 	*id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1354 	if (!*id)
1355 		return -ENOMEM;
1356 
1357 	error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1358 			sizeof(struct nvme_id_ctrl));
1359 	if (error)
1360 		kfree(*id);
1361 	return error;
1362 }
1363 
1364 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids,
1365 		struct nvme_ns_id_desc *cur, bool *csi_seen)
1366 {
1367 	const char *warn_str = "ctrl returned bogus length:";
1368 	void *data = cur;
1369 
1370 	switch (cur->nidt) {
1371 	case NVME_NIDT_EUI64:
1372 		if (cur->nidl != NVME_NIDT_EUI64_LEN) {
1373 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n",
1374 				 warn_str, cur->nidl);
1375 			return -1;
1376 		}
1377 		if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1378 			return NVME_NIDT_EUI64_LEN;
1379 		memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN);
1380 		return NVME_NIDT_EUI64_LEN;
1381 	case NVME_NIDT_NGUID:
1382 		if (cur->nidl != NVME_NIDT_NGUID_LEN) {
1383 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n",
1384 				 warn_str, cur->nidl);
1385 			return -1;
1386 		}
1387 		if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1388 			return NVME_NIDT_NGUID_LEN;
1389 		memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN);
1390 		return NVME_NIDT_NGUID_LEN;
1391 	case NVME_NIDT_UUID:
1392 		if (cur->nidl != NVME_NIDT_UUID_LEN) {
1393 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n",
1394 				 warn_str, cur->nidl);
1395 			return -1;
1396 		}
1397 		if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1398 			return NVME_NIDT_UUID_LEN;
1399 		uuid_copy(&ids->uuid, data + sizeof(*cur));
1400 		return NVME_NIDT_UUID_LEN;
1401 	case NVME_NIDT_CSI:
1402 		if (cur->nidl != NVME_NIDT_CSI_LEN) {
1403 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n",
1404 				 warn_str, cur->nidl);
1405 			return -1;
1406 		}
1407 		memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN);
1408 		*csi_seen = true;
1409 		return NVME_NIDT_CSI_LEN;
1410 	default:
1411 		/* Skip unknown types */
1412 		return cur->nidl;
1413 	}
1414 }
1415 
1416 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl,
1417 		struct nvme_ns_info *info)
1418 {
1419 	struct nvme_command c = { };
1420 	bool csi_seen = false;
1421 	int status, pos, len;
1422 	void *data;
1423 
1424 	if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl))
1425 		return 0;
1426 	if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST)
1427 		return 0;
1428 
1429 	c.identify.opcode = nvme_admin_identify;
1430 	c.identify.nsid = cpu_to_le32(info->nsid);
1431 	c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
1432 
1433 	data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
1434 	if (!data)
1435 		return -ENOMEM;
1436 
1437 	status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
1438 				      NVME_IDENTIFY_DATA_SIZE);
1439 	if (status) {
1440 		dev_warn(ctrl->device,
1441 			"Identify Descriptors failed (nsid=%u, status=0x%x)\n",
1442 			info->nsid, status);
1443 		goto free_data;
1444 	}
1445 
1446 	for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
1447 		struct nvme_ns_id_desc *cur = data + pos;
1448 
1449 		if (cur->nidl == 0)
1450 			break;
1451 
1452 		len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen);
1453 		if (len < 0)
1454 			break;
1455 
1456 		len += sizeof(*cur);
1457 	}
1458 
1459 	if (nvme_multi_css(ctrl) && !csi_seen) {
1460 		dev_warn(ctrl->device, "Command set not reported for nsid:%d\n",
1461 			 info->nsid);
1462 		status = -EINVAL;
1463 	}
1464 
1465 free_data:
1466 	kfree(data);
1467 	return status;
1468 }
1469 
1470 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid,
1471 			struct nvme_id_ns **id)
1472 {
1473 	struct nvme_command c = { };
1474 	int error;
1475 
1476 	/* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1477 	c.identify.opcode = nvme_admin_identify;
1478 	c.identify.nsid = cpu_to_le32(nsid);
1479 	c.identify.cns = NVME_ID_CNS_NS;
1480 
1481 	*id = kmalloc(sizeof(**id), GFP_KERNEL);
1482 	if (!*id)
1483 		return -ENOMEM;
1484 
1485 	error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id));
1486 	if (error) {
1487 		dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error);
1488 		kfree(*id);
1489 	}
1490 	return error;
1491 }
1492 
1493 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl,
1494 		struct nvme_ns_info *info)
1495 {
1496 	struct nvme_ns_ids *ids = &info->ids;
1497 	struct nvme_id_ns *id;
1498 	int ret;
1499 
1500 	ret = nvme_identify_ns(ctrl, info->nsid, &id);
1501 	if (ret)
1502 		return ret;
1503 
1504 	if (id->ncap == 0) {
1505 		/* namespace not allocated or attached */
1506 		info->is_removed = true;
1507 		ret = -ENODEV;
1508 		goto error;
1509 	}
1510 
1511 	info->anagrpid = id->anagrpid;
1512 	info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1513 	info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1514 	info->is_ready = true;
1515 	if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) {
1516 		dev_info(ctrl->device,
1517 			 "Ignoring bogus Namespace Identifiers\n");
1518 	} else {
1519 		if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1520 		    !memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
1521 			memcpy(ids->eui64, id->eui64, sizeof(ids->eui64));
1522 		if (ctrl->vs >= NVME_VS(1, 2, 0) &&
1523 		    !memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
1524 			memcpy(ids->nguid, id->nguid, sizeof(ids->nguid));
1525 	}
1526 
1527 error:
1528 	kfree(id);
1529 	return ret;
1530 }
1531 
1532 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl,
1533 		struct nvme_ns_info *info)
1534 {
1535 	struct nvme_id_ns_cs_indep *id;
1536 	struct nvme_command c = {
1537 		.identify.opcode	= nvme_admin_identify,
1538 		.identify.nsid		= cpu_to_le32(info->nsid),
1539 		.identify.cns		= NVME_ID_CNS_NS_CS_INDEP,
1540 	};
1541 	int ret;
1542 
1543 	id = kmalloc(sizeof(*id), GFP_KERNEL);
1544 	if (!id)
1545 		return -ENOMEM;
1546 
1547 	ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
1548 	if (!ret) {
1549 		info->anagrpid = id->anagrpid;
1550 		info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1551 		info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1552 		info->is_ready = id->nstat & NVME_NSTAT_NRDY;
1553 	}
1554 	kfree(id);
1555 	return ret;
1556 }
1557 
1558 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid,
1559 		unsigned int dword11, void *buffer, size_t buflen, u32 *result)
1560 {
1561 	union nvme_result res = { 0 };
1562 	struct nvme_command c = { };
1563 	int ret;
1564 
1565 	c.features.opcode = op;
1566 	c.features.fid = cpu_to_le32(fid);
1567 	c.features.dword11 = cpu_to_le32(dword11);
1568 
1569 	ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
1570 			buffer, buflen, NVME_QID_ANY, 0);
1571 	if (ret >= 0 && result)
1572 		*result = le32_to_cpu(res.u32);
1573 	return ret;
1574 }
1575 
1576 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
1577 		      unsigned int dword11, void *buffer, size_t buflen,
1578 		      u32 *result)
1579 {
1580 	return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer,
1581 			     buflen, result);
1582 }
1583 EXPORT_SYMBOL_GPL(nvme_set_features);
1584 
1585 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
1586 		      unsigned int dword11, void *buffer, size_t buflen,
1587 		      u32 *result)
1588 {
1589 	return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer,
1590 			     buflen, result);
1591 }
1592 EXPORT_SYMBOL_GPL(nvme_get_features);
1593 
1594 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
1595 {
1596 	u32 q_count = (*count - 1) | ((*count - 1) << 16);
1597 	u32 result;
1598 	int status, nr_io_queues;
1599 
1600 	status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
1601 			&result);
1602 	if (status < 0)
1603 		return status;
1604 
1605 	/*
1606 	 * Degraded controllers might return an error when setting the queue
1607 	 * count.  We still want to be able to bring them online and offer
1608 	 * access to the admin queue, as that might be only way to fix them up.
1609 	 */
1610 	if (status > 0) {
1611 		dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
1612 		*count = 0;
1613 	} else {
1614 		nr_io_queues = min(result & 0xffff, result >> 16) + 1;
1615 		*count = min(*count, nr_io_queues);
1616 	}
1617 
1618 	return 0;
1619 }
1620 EXPORT_SYMBOL_GPL(nvme_set_queue_count);
1621 
1622 #define NVME_AEN_SUPPORTED \
1623 	(NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \
1624 	 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE)
1625 
1626 static void nvme_enable_aen(struct nvme_ctrl *ctrl)
1627 {
1628 	u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED;
1629 	int status;
1630 
1631 	if (!supported_aens)
1632 		return;
1633 
1634 	status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens,
1635 			NULL, 0, &result);
1636 	if (status)
1637 		dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n",
1638 			 supported_aens);
1639 
1640 	queue_work(nvme_wq, &ctrl->async_event_work);
1641 }
1642 
1643 static int nvme_ns_open(struct nvme_ns *ns)
1644 {
1645 
1646 	/* should never be called due to GENHD_FL_HIDDEN */
1647 	if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head)))
1648 		goto fail;
1649 	if (!nvme_get_ns(ns))
1650 		goto fail;
1651 	if (!try_module_get(ns->ctrl->ops->module))
1652 		goto fail_put_ns;
1653 
1654 	return 0;
1655 
1656 fail_put_ns:
1657 	nvme_put_ns(ns);
1658 fail:
1659 	return -ENXIO;
1660 }
1661 
1662 static void nvme_ns_release(struct nvme_ns *ns)
1663 {
1664 
1665 	module_put(ns->ctrl->ops->module);
1666 	nvme_put_ns(ns);
1667 }
1668 
1669 static int nvme_open(struct gendisk *disk, blk_mode_t mode)
1670 {
1671 	return nvme_ns_open(disk->private_data);
1672 }
1673 
1674 static void nvme_release(struct gendisk *disk)
1675 {
1676 	nvme_ns_release(disk->private_data);
1677 }
1678 
1679 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1680 {
1681 	/* some standard values */
1682 	geo->heads = 1 << 6;
1683 	geo->sectors = 1 << 5;
1684 	geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
1685 	return 0;
1686 }
1687 
1688 #ifdef CONFIG_BLK_DEV_INTEGRITY
1689 static void nvme_init_integrity(struct gendisk *disk,
1690 		struct nvme_ns_head *head, u32 max_integrity_segments)
1691 {
1692 	struct blk_integrity integrity = { };
1693 
1694 	switch (head->pi_type) {
1695 	case NVME_NS_DPS_PI_TYPE3:
1696 		switch (head->guard_type) {
1697 		case NVME_NVM_NS_16B_GUARD:
1698 			integrity.profile = &t10_pi_type3_crc;
1699 			integrity.tag_size = sizeof(u16) + sizeof(u32);
1700 			integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1701 			break;
1702 		case NVME_NVM_NS_64B_GUARD:
1703 			integrity.profile = &ext_pi_type3_crc64;
1704 			integrity.tag_size = sizeof(u16) + 6;
1705 			integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1706 			break;
1707 		default:
1708 			integrity.profile = NULL;
1709 			break;
1710 		}
1711 		break;
1712 	case NVME_NS_DPS_PI_TYPE1:
1713 	case NVME_NS_DPS_PI_TYPE2:
1714 		switch (head->guard_type) {
1715 		case NVME_NVM_NS_16B_GUARD:
1716 			integrity.profile = &t10_pi_type1_crc;
1717 			integrity.tag_size = sizeof(u16);
1718 			integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1719 			break;
1720 		case NVME_NVM_NS_64B_GUARD:
1721 			integrity.profile = &ext_pi_type1_crc64;
1722 			integrity.tag_size = sizeof(u16);
1723 			integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1724 			break;
1725 		default:
1726 			integrity.profile = NULL;
1727 			break;
1728 		}
1729 		break;
1730 	default:
1731 		integrity.profile = NULL;
1732 		break;
1733 	}
1734 
1735 	integrity.tuple_size = head->ms;
1736 	blk_integrity_register(disk, &integrity);
1737 	blk_queue_max_integrity_segments(disk->queue, max_integrity_segments);
1738 }
1739 #else
1740 static void nvme_init_integrity(struct gendisk *disk,
1741 		struct nvme_ns_head *head, u32 max_integrity_segments)
1742 {
1743 }
1744 #endif /* CONFIG_BLK_DEV_INTEGRITY */
1745 
1746 static void nvme_config_discard(struct nvme_ctrl *ctrl, struct gendisk *disk,
1747 		struct nvme_ns_head *head)
1748 {
1749 	struct request_queue *queue = disk->queue;
1750 	u32 max_discard_sectors;
1751 
1752 	if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(head, UINT_MAX)) {
1753 		max_discard_sectors = nvme_lba_to_sect(head, ctrl->dmrsl);
1754 	} else if (ctrl->oncs & NVME_CTRL_ONCS_DSM) {
1755 		max_discard_sectors = UINT_MAX;
1756 	} else {
1757 		blk_queue_max_discard_sectors(queue, 0);
1758 		return;
1759 	}
1760 
1761 	BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
1762 			NVME_DSM_MAX_RANGES);
1763 
1764 	/*
1765 	 * If discard is already enabled, don't reset queue limits.
1766 	 *
1767 	 * This works around the fact that the block layer can't cope well with
1768 	 * updating the hardware limits when overridden through sysfs.  This is
1769 	 * harmless because discard limits in NVMe are purely advisory.
1770 	 */
1771 	if (queue->limits.max_discard_sectors)
1772 		return;
1773 
1774 	blk_queue_max_discard_sectors(queue, max_discard_sectors);
1775 	if (ctrl->dmrl)
1776 		blk_queue_max_discard_segments(queue, ctrl->dmrl);
1777 	else
1778 		blk_queue_max_discard_segments(queue, NVME_DSM_MAX_RANGES);
1779 	queue->limits.discard_granularity = queue_logical_block_size(queue);
1780 
1781 	if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
1782 		blk_queue_max_write_zeroes_sectors(queue, UINT_MAX);
1783 }
1784 
1785 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b)
1786 {
1787 	return uuid_equal(&a->uuid, &b->uuid) &&
1788 		memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 &&
1789 		memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 &&
1790 		a->csi == b->csi;
1791 }
1792 
1793 static int nvme_init_ms(struct nvme_ctrl *ctrl, struct nvme_ns_head *head,
1794 		struct nvme_id_ns *id)
1795 {
1796 	bool first = id->dps & NVME_NS_DPS_PI_FIRST;
1797 	unsigned lbaf = nvme_lbaf_index(id->flbas);
1798 	struct nvme_command c = { };
1799 	struct nvme_id_ns_nvm *nvm;
1800 	int ret = 0;
1801 	u32 elbaf;
1802 
1803 	head->pi_size = 0;
1804 	head->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1805 	if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) {
1806 		head->pi_size = sizeof(struct t10_pi_tuple);
1807 		head->guard_type = NVME_NVM_NS_16B_GUARD;
1808 		goto set_pi;
1809 	}
1810 
1811 	nvm = kzalloc(sizeof(*nvm), GFP_KERNEL);
1812 	if (!nvm)
1813 		return -ENOMEM;
1814 
1815 	c.identify.opcode = nvme_admin_identify;
1816 	c.identify.nsid = cpu_to_le32(head->ns_id);
1817 	c.identify.cns = NVME_ID_CNS_CS_NS;
1818 	c.identify.csi = NVME_CSI_NVM;
1819 
1820 	ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, nvm, sizeof(*nvm));
1821 	if (ret)
1822 		goto free_data;
1823 
1824 	elbaf = le32_to_cpu(nvm->elbaf[lbaf]);
1825 
1826 	/* no support for storage tag formats right now */
1827 	if (nvme_elbaf_sts(elbaf))
1828 		goto free_data;
1829 
1830 	head->guard_type = nvme_elbaf_guard_type(elbaf);
1831 	switch (head->guard_type) {
1832 	case NVME_NVM_NS_64B_GUARD:
1833 		head->pi_size = sizeof(struct crc64_pi_tuple);
1834 		break;
1835 	case NVME_NVM_NS_16B_GUARD:
1836 		head->pi_size = sizeof(struct t10_pi_tuple);
1837 		break;
1838 	default:
1839 		break;
1840 	}
1841 
1842 free_data:
1843 	kfree(nvm);
1844 set_pi:
1845 	if (head->pi_size && (first || head->ms == head->pi_size))
1846 		head->pi_type = id->dps & NVME_NS_DPS_PI_MASK;
1847 	else
1848 		head->pi_type = 0;
1849 
1850 	return ret;
1851 }
1852 
1853 static int nvme_configure_metadata(struct nvme_ctrl *ctrl,
1854 		struct nvme_ns_head *head, struct nvme_id_ns *id)
1855 {
1856 	int ret;
1857 
1858 	ret = nvme_init_ms(ctrl, head, id);
1859 	if (ret)
1860 		return ret;
1861 
1862 	head->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS);
1863 	if (!head->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED))
1864 		return 0;
1865 
1866 	if (ctrl->ops->flags & NVME_F_FABRICS) {
1867 		/*
1868 		 * The NVMe over Fabrics specification only supports metadata as
1869 		 * part of the extended data LBA.  We rely on HCA/HBA support to
1870 		 * remap the separate metadata buffer from the block layer.
1871 		 */
1872 		if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT)))
1873 			return 0;
1874 
1875 		head->features |= NVME_NS_EXT_LBAS;
1876 
1877 		/*
1878 		 * The current fabrics transport drivers support namespace
1879 		 * metadata formats only if nvme_ns_has_pi() returns true.
1880 		 * Suppress support for all other formats so the namespace will
1881 		 * have a 0 capacity and not be usable through the block stack.
1882 		 *
1883 		 * Note, this check will need to be modified if any drivers
1884 		 * gain the ability to use other metadata formats.
1885 		 */
1886 		if (ctrl->max_integrity_segments && nvme_ns_has_pi(head))
1887 			head->features |= NVME_NS_METADATA_SUPPORTED;
1888 	} else {
1889 		/*
1890 		 * For PCIe controllers, we can't easily remap the separate
1891 		 * metadata buffer from the block layer and thus require a
1892 		 * separate metadata buffer for block layer metadata/PI support.
1893 		 * We allow extended LBAs for the passthrough interface, though.
1894 		 */
1895 		if (id->flbas & NVME_NS_FLBAS_META_EXT)
1896 			head->features |= NVME_NS_EXT_LBAS;
1897 		else
1898 			head->features |= NVME_NS_METADATA_SUPPORTED;
1899 	}
1900 	return 0;
1901 }
1902 
1903 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
1904 		struct request_queue *q)
1905 {
1906 	bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT;
1907 
1908 	if (ctrl->max_hw_sectors) {
1909 		u32 max_segments =
1910 			(ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1;
1911 
1912 		max_segments = min_not_zero(max_segments, ctrl->max_segments);
1913 		blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
1914 		blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
1915 	}
1916 	blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1);
1917 	blk_queue_dma_alignment(q, 3);
1918 	blk_queue_write_cache(q, vwc, vwc);
1919 }
1920 
1921 static void nvme_update_disk_info(struct nvme_ctrl *ctrl, struct gendisk *disk,
1922 		struct nvme_ns_head *head, struct nvme_id_ns *id)
1923 {
1924 	sector_t capacity = nvme_lba_to_sect(head, le64_to_cpu(id->nsze));
1925 	u32 bs = 1U << head->lba_shift;
1926 	u32 atomic_bs, phys_bs, io_opt = 0;
1927 
1928 	/*
1929 	 * The block layer can't support LBA sizes larger than the page size
1930 	 * or smaller than a sector size yet, so catch this early and don't
1931 	 * allow block I/O.
1932 	 */
1933 	if (head->lba_shift > PAGE_SHIFT || head->lba_shift < SECTOR_SHIFT) {
1934 		capacity = 0;
1935 		bs = (1 << 9);
1936 	}
1937 
1938 	blk_integrity_unregister(disk);
1939 
1940 	atomic_bs = phys_bs = bs;
1941 	if (id->nabo == 0) {
1942 		/*
1943 		 * Bit 1 indicates whether NAWUPF is defined for this namespace
1944 		 * and whether it should be used instead of AWUPF. If NAWUPF ==
1945 		 * 0 then AWUPF must be used instead.
1946 		 */
1947 		if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf)
1948 			atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs;
1949 		else
1950 			atomic_bs = (1 + ctrl->subsys->awupf) * bs;
1951 	}
1952 
1953 	if (id->nsfeat & NVME_NS_FEAT_IO_OPT) {
1954 		/* NPWG = Namespace Preferred Write Granularity */
1955 		phys_bs = bs * (1 + le16_to_cpu(id->npwg));
1956 		/* NOWS = Namespace Optimal Write Size */
1957 		io_opt = bs * (1 + le16_to_cpu(id->nows));
1958 	}
1959 
1960 	blk_queue_logical_block_size(disk->queue, bs);
1961 	/*
1962 	 * Linux filesystems assume writing a single physical block is
1963 	 * an atomic operation. Hence limit the physical block size to the
1964 	 * value of the Atomic Write Unit Power Fail parameter.
1965 	 */
1966 	blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs));
1967 	blk_queue_io_min(disk->queue, phys_bs);
1968 	blk_queue_io_opt(disk->queue, io_opt);
1969 
1970 	/*
1971 	 * Register a metadata profile for PI, or the plain non-integrity NVMe
1972 	 * metadata masquerading as Type 0 if supported, otherwise reject block
1973 	 * I/O to namespaces with metadata except when the namespace supports
1974 	 * PI, as it can strip/insert in that case.
1975 	 */
1976 	if (head->ms) {
1977 		if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) &&
1978 		    (head->features & NVME_NS_METADATA_SUPPORTED))
1979 			nvme_init_integrity(disk, head,
1980 					    ctrl->max_integrity_segments);
1981 		else if (!nvme_ns_has_pi(head))
1982 			capacity = 0;
1983 	}
1984 
1985 	set_capacity_and_notify(disk, capacity);
1986 
1987 	nvme_config_discard(ctrl, disk, head);
1988 	blk_queue_max_write_zeroes_sectors(disk->queue,
1989 					   ctrl->max_zeroes_sectors);
1990 }
1991 
1992 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info)
1993 {
1994 	return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags);
1995 }
1996 
1997 static inline bool nvme_first_scan(struct gendisk *disk)
1998 {
1999 	/* nvme_alloc_ns() scans the disk prior to adding it */
2000 	return !disk_live(disk);
2001 }
2002 
2003 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id)
2004 {
2005 	struct nvme_ctrl *ctrl = ns->ctrl;
2006 	u32 iob;
2007 
2008 	if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) &&
2009 	    is_power_of_2(ctrl->max_hw_sectors))
2010 		iob = ctrl->max_hw_sectors;
2011 	else
2012 		iob = nvme_lba_to_sect(ns->head, le16_to_cpu(id->noiob));
2013 
2014 	if (!iob)
2015 		return;
2016 
2017 	if (!is_power_of_2(iob)) {
2018 		if (nvme_first_scan(ns->disk))
2019 			pr_warn("%s: ignoring unaligned IO boundary:%u\n",
2020 				ns->disk->disk_name, iob);
2021 		return;
2022 	}
2023 
2024 	if (blk_queue_is_zoned(ns->disk->queue)) {
2025 		if (nvme_first_scan(ns->disk))
2026 			pr_warn("%s: ignoring zoned namespace IO boundary\n",
2027 				ns->disk->disk_name);
2028 		return;
2029 	}
2030 
2031 	blk_queue_chunk_sectors(ns->queue, iob);
2032 }
2033 
2034 static int nvme_update_ns_info_generic(struct nvme_ns *ns,
2035 		struct nvme_ns_info *info)
2036 {
2037 	blk_mq_freeze_queue(ns->disk->queue);
2038 	nvme_set_queue_limits(ns->ctrl, ns->queue);
2039 	set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2040 	blk_mq_unfreeze_queue(ns->disk->queue);
2041 
2042 	if (nvme_ns_head_multipath(ns->head)) {
2043 		blk_mq_freeze_queue(ns->head->disk->queue);
2044 		set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
2045 		nvme_mpath_revalidate_paths(ns);
2046 		blk_stack_limits(&ns->head->disk->queue->limits,
2047 				 &ns->queue->limits, 0);
2048 		ns->head->disk->flags |= GENHD_FL_HIDDEN;
2049 		blk_mq_unfreeze_queue(ns->head->disk->queue);
2050 	}
2051 
2052 	/* Hide the block-interface for these devices */
2053 	ns->disk->flags |= GENHD_FL_HIDDEN;
2054 	set_bit(NVME_NS_READY, &ns->flags);
2055 
2056 	return 0;
2057 }
2058 
2059 static int nvme_update_ns_info_block(struct nvme_ns *ns,
2060 		struct nvme_ns_info *info)
2061 {
2062 	struct nvme_id_ns *id;
2063 	unsigned lbaf;
2064 	int ret;
2065 
2066 	ret = nvme_identify_ns(ns->ctrl, info->nsid, &id);
2067 	if (ret)
2068 		return ret;
2069 
2070 	if (id->ncap == 0) {
2071 		/* namespace not allocated or attached */
2072 		info->is_removed = true;
2073 		ret = -ENODEV;
2074 		goto error;
2075 	}
2076 
2077 	blk_mq_freeze_queue(ns->disk->queue);
2078 	lbaf = nvme_lbaf_index(id->flbas);
2079 	ns->head->lba_shift = id->lbaf[lbaf].ds;
2080 	ns->head->nuse = le64_to_cpu(id->nuse);
2081 	nvme_set_queue_limits(ns->ctrl, ns->queue);
2082 
2083 	ret = nvme_configure_metadata(ns->ctrl, ns->head, id);
2084 	if (ret < 0) {
2085 		blk_mq_unfreeze_queue(ns->disk->queue);
2086 		goto out;
2087 	}
2088 	nvme_set_chunk_sectors(ns, id);
2089 	nvme_update_disk_info(ns->ctrl, ns->disk, ns->head, id);
2090 
2091 	if (ns->head->ids.csi == NVME_CSI_ZNS) {
2092 		ret = nvme_update_zone_info(ns, lbaf);
2093 		if (ret) {
2094 			blk_mq_unfreeze_queue(ns->disk->queue);
2095 			goto out;
2096 		}
2097 	}
2098 
2099 	/*
2100 	 * Only set the DEAC bit if the device guarantees that reads from
2101 	 * deallocated data return zeroes.  While the DEAC bit does not
2102 	 * require that, it must be a no-op if reads from deallocated data
2103 	 * do not return zeroes.
2104 	 */
2105 	if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3)))
2106 		ns->head->features |= NVME_NS_DEAC;
2107 	set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2108 	set_bit(NVME_NS_READY, &ns->flags);
2109 	blk_mq_unfreeze_queue(ns->disk->queue);
2110 
2111 	if (blk_queue_is_zoned(ns->queue)) {
2112 		ret = nvme_revalidate_zones(ns);
2113 		if (ret && !nvme_first_scan(ns->disk))
2114 			goto out;
2115 	}
2116 
2117 	if (nvme_ns_head_multipath(ns->head)) {
2118 		blk_mq_freeze_queue(ns->head->disk->queue);
2119 		nvme_update_disk_info(ns->ctrl, ns->head->disk, ns->head, id);
2120 		set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
2121 		nvme_mpath_revalidate_paths(ns);
2122 		blk_stack_limits(&ns->head->disk->queue->limits,
2123 				 &ns->queue->limits, 0);
2124 		disk_update_readahead(ns->head->disk);
2125 		blk_mq_unfreeze_queue(ns->head->disk->queue);
2126 	}
2127 
2128 	ret = 0;
2129 out:
2130 	/*
2131 	 * If probing fails due an unsupported feature, hide the block device,
2132 	 * but still allow other access.
2133 	 */
2134 	if (ret == -ENODEV) {
2135 		ns->disk->flags |= GENHD_FL_HIDDEN;
2136 		set_bit(NVME_NS_READY, &ns->flags);
2137 		ret = 0;
2138 	}
2139 
2140 error:
2141 	kfree(id);
2142 	return ret;
2143 }
2144 
2145 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info)
2146 {
2147 	switch (info->ids.csi) {
2148 	case NVME_CSI_ZNS:
2149 		if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) {
2150 			dev_info(ns->ctrl->device,
2151 	"block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n",
2152 				info->nsid);
2153 			return nvme_update_ns_info_generic(ns, info);
2154 		}
2155 		return nvme_update_ns_info_block(ns, info);
2156 	case NVME_CSI_NVM:
2157 		return nvme_update_ns_info_block(ns, info);
2158 	default:
2159 		dev_info(ns->ctrl->device,
2160 			"block device for nsid %u not supported (csi %u)\n",
2161 			info->nsid, info->ids.csi);
2162 		return nvme_update_ns_info_generic(ns, info);
2163 	}
2164 }
2165 
2166 #ifdef CONFIG_BLK_SED_OPAL
2167 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
2168 		bool send)
2169 {
2170 	struct nvme_ctrl *ctrl = data;
2171 	struct nvme_command cmd = { };
2172 
2173 	if (send)
2174 		cmd.common.opcode = nvme_admin_security_send;
2175 	else
2176 		cmd.common.opcode = nvme_admin_security_recv;
2177 	cmd.common.nsid = 0;
2178 	cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
2179 	cmd.common.cdw11 = cpu_to_le32(len);
2180 
2181 	return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
2182 			NVME_QID_ANY, NVME_SUBMIT_AT_HEAD);
2183 }
2184 
2185 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2186 {
2187 	if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) {
2188 		if (!ctrl->opal_dev)
2189 			ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit);
2190 		else if (was_suspended)
2191 			opal_unlock_from_suspend(ctrl->opal_dev);
2192 	} else {
2193 		free_opal_dev(ctrl->opal_dev);
2194 		ctrl->opal_dev = NULL;
2195 	}
2196 }
2197 #else
2198 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2199 {
2200 }
2201 #endif /* CONFIG_BLK_SED_OPAL */
2202 
2203 #ifdef CONFIG_BLK_DEV_ZONED
2204 static int nvme_report_zones(struct gendisk *disk, sector_t sector,
2205 		unsigned int nr_zones, report_zones_cb cb, void *data)
2206 {
2207 	return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb,
2208 			data);
2209 }
2210 #else
2211 #define nvme_report_zones	NULL
2212 #endif /* CONFIG_BLK_DEV_ZONED */
2213 
2214 const struct block_device_operations nvme_bdev_ops = {
2215 	.owner		= THIS_MODULE,
2216 	.ioctl		= nvme_ioctl,
2217 	.compat_ioctl	= blkdev_compat_ptr_ioctl,
2218 	.open		= nvme_open,
2219 	.release	= nvme_release,
2220 	.getgeo		= nvme_getgeo,
2221 	.report_zones	= nvme_report_zones,
2222 	.pr_ops		= &nvme_pr_ops,
2223 };
2224 
2225 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val,
2226 		u32 timeout, const char *op)
2227 {
2228 	unsigned long timeout_jiffies = jiffies + timeout * HZ;
2229 	u32 csts;
2230 	int ret;
2231 
2232 	while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
2233 		if (csts == ~0)
2234 			return -ENODEV;
2235 		if ((csts & mask) == val)
2236 			break;
2237 
2238 		usleep_range(1000, 2000);
2239 		if (fatal_signal_pending(current))
2240 			return -EINTR;
2241 		if (time_after(jiffies, timeout_jiffies)) {
2242 			dev_err(ctrl->device,
2243 				"Device not ready; aborting %s, CSTS=0x%x\n",
2244 				op, csts);
2245 			return -ENODEV;
2246 		}
2247 	}
2248 
2249 	return ret;
2250 }
2251 
2252 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown)
2253 {
2254 	int ret;
2255 
2256 	ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
2257 	if (shutdown)
2258 		ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
2259 	else
2260 		ctrl->ctrl_config &= ~NVME_CC_ENABLE;
2261 
2262 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2263 	if (ret)
2264 		return ret;
2265 
2266 	if (shutdown) {
2267 		return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK,
2268 				       NVME_CSTS_SHST_CMPLT,
2269 				       ctrl->shutdown_timeout, "shutdown");
2270 	}
2271 	if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
2272 		msleep(NVME_QUIRK_DELAY_AMOUNT);
2273 	return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0,
2274 			       (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset");
2275 }
2276 EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
2277 
2278 int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
2279 {
2280 	unsigned dev_page_min;
2281 	u32 timeout;
2282 	int ret;
2283 
2284 	ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2285 	if (ret) {
2286 		dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
2287 		return ret;
2288 	}
2289 	dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12;
2290 
2291 	if (NVME_CTRL_PAGE_SHIFT < dev_page_min) {
2292 		dev_err(ctrl->device,
2293 			"Minimum device page size %u too large for host (%u)\n",
2294 			1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT);
2295 		return -ENODEV;
2296 	}
2297 
2298 	if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI)
2299 		ctrl->ctrl_config = NVME_CC_CSS_CSI;
2300 	else
2301 		ctrl->ctrl_config = NVME_CC_CSS_NVM;
2302 
2303 	if (ctrl->cap & NVME_CAP_CRMS_CRWMS && ctrl->cap & NVME_CAP_CRMS_CRIMS)
2304 		ctrl->ctrl_config |= NVME_CC_CRIME;
2305 
2306 	ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
2307 	ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
2308 	ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
2309 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2310 	if (ret)
2311 		return ret;
2312 
2313 	/* Flush write to device (required if transport is PCI) */
2314 	ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config);
2315 	if (ret)
2316 		return ret;
2317 
2318 	/* CAP value may change after initial CC write */
2319 	ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2320 	if (ret)
2321 		return ret;
2322 
2323 	timeout = NVME_CAP_TIMEOUT(ctrl->cap);
2324 	if (ctrl->cap & NVME_CAP_CRMS_CRWMS) {
2325 		u32 crto, ready_timeout;
2326 
2327 		ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto);
2328 		if (ret) {
2329 			dev_err(ctrl->device, "Reading CRTO failed (%d)\n",
2330 				ret);
2331 			return ret;
2332 		}
2333 
2334 		/*
2335 		 * CRTO should always be greater or equal to CAP.TO, but some
2336 		 * devices are known to get this wrong. Use the larger of the
2337 		 * two values.
2338 		 */
2339 		if (ctrl->ctrl_config & NVME_CC_CRIME)
2340 			ready_timeout = NVME_CRTO_CRIMT(crto);
2341 		else
2342 			ready_timeout = NVME_CRTO_CRWMT(crto);
2343 
2344 		if (ready_timeout < timeout)
2345 			dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n",
2346 				      crto, ctrl->cap);
2347 		else
2348 			timeout = ready_timeout;
2349 	}
2350 
2351 	ctrl->ctrl_config |= NVME_CC_ENABLE;
2352 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2353 	if (ret)
2354 		return ret;
2355 	return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY,
2356 			       (timeout + 1) / 2, "initialisation");
2357 }
2358 EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
2359 
2360 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
2361 {
2362 	__le64 ts;
2363 	int ret;
2364 
2365 	if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
2366 		return 0;
2367 
2368 	ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
2369 	ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
2370 			NULL);
2371 	if (ret)
2372 		dev_warn_once(ctrl->device,
2373 			"could not set timestamp (%d)\n", ret);
2374 	return ret;
2375 }
2376 
2377 static int nvme_configure_host_options(struct nvme_ctrl *ctrl)
2378 {
2379 	struct nvme_feat_host_behavior *host;
2380 	u8 acre = 0, lbafee = 0;
2381 	int ret;
2382 
2383 	/* Don't bother enabling the feature if retry delay is not reported */
2384 	if (ctrl->crdt[0])
2385 		acre = NVME_ENABLE_ACRE;
2386 	if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)
2387 		lbafee = NVME_ENABLE_LBAFEE;
2388 
2389 	if (!acre && !lbafee)
2390 		return 0;
2391 
2392 	host = kzalloc(sizeof(*host), GFP_KERNEL);
2393 	if (!host)
2394 		return 0;
2395 
2396 	host->acre = acre;
2397 	host->lbafee = lbafee;
2398 	ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0,
2399 				host, sizeof(*host), NULL);
2400 	kfree(host);
2401 	return ret;
2402 }
2403 
2404 /*
2405  * The function checks whether the given total (exlat + enlat) latency of
2406  * a power state allows the latter to be used as an APST transition target.
2407  * It does so by comparing the latency to the primary and secondary latency
2408  * tolerances defined by module params. If there's a match, the corresponding
2409  * timeout value is returned and the matching tolerance index (1 or 2) is
2410  * reported.
2411  */
2412 static bool nvme_apst_get_transition_time(u64 total_latency,
2413 		u64 *transition_time, unsigned *last_index)
2414 {
2415 	if (total_latency <= apst_primary_latency_tol_us) {
2416 		if (*last_index == 1)
2417 			return false;
2418 		*last_index = 1;
2419 		*transition_time = apst_primary_timeout_ms;
2420 		return true;
2421 	}
2422 	if (apst_secondary_timeout_ms &&
2423 		total_latency <= apst_secondary_latency_tol_us) {
2424 		if (*last_index <= 2)
2425 			return false;
2426 		*last_index = 2;
2427 		*transition_time = apst_secondary_timeout_ms;
2428 		return true;
2429 	}
2430 	return false;
2431 }
2432 
2433 /*
2434  * APST (Autonomous Power State Transition) lets us program a table of power
2435  * state transitions that the controller will perform automatically.
2436  *
2437  * Depending on module params, one of the two supported techniques will be used:
2438  *
2439  * - If the parameters provide explicit timeouts and tolerances, they will be
2440  *   used to build a table with up to 2 non-operational states to transition to.
2441  *   The default parameter values were selected based on the values used by
2442  *   Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic
2443  *   regeneration of the APST table in the event of switching between external
2444  *   and battery power, the timeouts and tolerances reflect a compromise
2445  *   between values used by Microsoft for AC and battery scenarios.
2446  * - If not, we'll configure the table with a simple heuristic: we are willing
2447  *   to spend at most 2% of the time transitioning between power states.
2448  *   Therefore, when running in any given state, we will enter the next
2449  *   lower-power non-operational state after waiting 50 * (enlat + exlat)
2450  *   microseconds, as long as that state's exit latency is under the requested
2451  *   maximum latency.
2452  *
2453  * We will not autonomously enter any non-operational state for which the total
2454  * latency exceeds ps_max_latency_us.
2455  *
2456  * Users can set ps_max_latency_us to zero to turn off APST.
2457  */
2458 static int nvme_configure_apst(struct nvme_ctrl *ctrl)
2459 {
2460 	struct nvme_feat_auto_pst *table;
2461 	unsigned apste = 0;
2462 	u64 max_lat_us = 0;
2463 	__le64 target = 0;
2464 	int max_ps = -1;
2465 	int state;
2466 	int ret;
2467 	unsigned last_lt_index = UINT_MAX;
2468 
2469 	/*
2470 	 * If APST isn't supported or if we haven't been initialized yet,
2471 	 * then don't do anything.
2472 	 */
2473 	if (!ctrl->apsta)
2474 		return 0;
2475 
2476 	if (ctrl->npss > 31) {
2477 		dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
2478 		return 0;
2479 	}
2480 
2481 	table = kzalloc(sizeof(*table), GFP_KERNEL);
2482 	if (!table)
2483 		return 0;
2484 
2485 	if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
2486 		/* Turn off APST. */
2487 		dev_dbg(ctrl->device, "APST disabled\n");
2488 		goto done;
2489 	}
2490 
2491 	/*
2492 	 * Walk through all states from lowest- to highest-power.
2493 	 * According to the spec, lower-numbered states use more power.  NPSS,
2494 	 * despite the name, is the index of the lowest-power state, not the
2495 	 * number of states.
2496 	 */
2497 	for (state = (int)ctrl->npss; state >= 0; state--) {
2498 		u64 total_latency_us, exit_latency_us, transition_ms;
2499 
2500 		if (target)
2501 			table->entries[state] = target;
2502 
2503 		/*
2504 		 * Don't allow transitions to the deepest state if it's quirked
2505 		 * off.
2506 		 */
2507 		if (state == ctrl->npss &&
2508 		    (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
2509 			continue;
2510 
2511 		/*
2512 		 * Is this state a useful non-operational state for higher-power
2513 		 * states to autonomously transition to?
2514 		 */
2515 		if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE))
2516 			continue;
2517 
2518 		exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
2519 		if (exit_latency_us > ctrl->ps_max_latency_us)
2520 			continue;
2521 
2522 		total_latency_us = exit_latency_us +
2523 			le32_to_cpu(ctrl->psd[state].entry_lat);
2524 
2525 		/*
2526 		 * This state is good. It can be used as the APST idle target
2527 		 * for higher power states.
2528 		 */
2529 		if (apst_primary_timeout_ms && apst_primary_latency_tol_us) {
2530 			if (!nvme_apst_get_transition_time(total_latency_us,
2531 					&transition_ms, &last_lt_index))
2532 				continue;
2533 		} else {
2534 			transition_ms = total_latency_us + 19;
2535 			do_div(transition_ms, 20);
2536 			if (transition_ms > (1 << 24) - 1)
2537 				transition_ms = (1 << 24) - 1;
2538 		}
2539 
2540 		target = cpu_to_le64((state << 3) | (transition_ms << 8));
2541 		if (max_ps == -1)
2542 			max_ps = state;
2543 		if (total_latency_us > max_lat_us)
2544 			max_lat_us = total_latency_us;
2545 	}
2546 
2547 	if (max_ps == -1)
2548 		dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
2549 	else
2550 		dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
2551 			max_ps, max_lat_us, (int)sizeof(*table), table);
2552 	apste = 1;
2553 
2554 done:
2555 	ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
2556 				table, sizeof(*table), NULL);
2557 	if (ret)
2558 		dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
2559 	kfree(table);
2560 	return ret;
2561 }
2562 
2563 static void nvme_set_latency_tolerance(struct device *dev, s32 val)
2564 {
2565 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2566 	u64 latency;
2567 
2568 	switch (val) {
2569 	case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
2570 	case PM_QOS_LATENCY_ANY:
2571 		latency = U64_MAX;
2572 		break;
2573 
2574 	default:
2575 		latency = val;
2576 	}
2577 
2578 	if (ctrl->ps_max_latency_us != latency) {
2579 		ctrl->ps_max_latency_us = latency;
2580 		if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
2581 			nvme_configure_apst(ctrl);
2582 	}
2583 }
2584 
2585 struct nvme_core_quirk_entry {
2586 	/*
2587 	 * NVMe model and firmware strings are padded with spaces.  For
2588 	 * simplicity, strings in the quirk table are padded with NULLs
2589 	 * instead.
2590 	 */
2591 	u16 vid;
2592 	const char *mn;
2593 	const char *fr;
2594 	unsigned long quirks;
2595 };
2596 
2597 static const struct nvme_core_quirk_entry core_quirks[] = {
2598 	{
2599 		/*
2600 		 * This Toshiba device seems to die using any APST states.  See:
2601 		 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
2602 		 */
2603 		.vid = 0x1179,
2604 		.mn = "THNSF5256GPUK TOSHIBA",
2605 		.quirks = NVME_QUIRK_NO_APST,
2606 	},
2607 	{
2608 		/*
2609 		 * This LiteON CL1-3D*-Q11 firmware version has a race
2610 		 * condition associated with actions related to suspend to idle
2611 		 * LiteON has resolved the problem in future firmware
2612 		 */
2613 		.vid = 0x14a4,
2614 		.fr = "22301111",
2615 		.quirks = NVME_QUIRK_SIMPLE_SUSPEND,
2616 	},
2617 	{
2618 		/*
2619 		 * This Kioxia CD6-V Series / HPE PE8030 device times out and
2620 		 * aborts I/O during any load, but more easily reproducible
2621 		 * with discards (fstrim).
2622 		 *
2623 		 * The device is left in a state where it is also not possible
2624 		 * to use "nvme set-feature" to disable APST, but booting with
2625 		 * nvme_core.default_ps_max_latency=0 works.
2626 		 */
2627 		.vid = 0x1e0f,
2628 		.mn = "KCD6XVUL6T40",
2629 		.quirks = NVME_QUIRK_NO_APST,
2630 	},
2631 	{
2632 		/*
2633 		 * The external Samsung X5 SSD fails initialization without a
2634 		 * delay before checking if it is ready and has a whole set of
2635 		 * other problems.  To make this even more interesting, it
2636 		 * shares the PCI ID with internal Samsung 970 Evo Plus that
2637 		 * does not need or want these quirks.
2638 		 */
2639 		.vid = 0x144d,
2640 		.mn = "Samsung Portable SSD X5",
2641 		.quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY |
2642 			  NVME_QUIRK_NO_DEEPEST_PS |
2643 			  NVME_QUIRK_IGNORE_DEV_SUBNQN,
2644 	}
2645 };
2646 
2647 /* match is null-terminated but idstr is space-padded. */
2648 static bool string_matches(const char *idstr, const char *match, size_t len)
2649 {
2650 	size_t matchlen;
2651 
2652 	if (!match)
2653 		return true;
2654 
2655 	matchlen = strlen(match);
2656 	WARN_ON_ONCE(matchlen > len);
2657 
2658 	if (memcmp(idstr, match, matchlen))
2659 		return false;
2660 
2661 	for (; matchlen < len; matchlen++)
2662 		if (idstr[matchlen] != ' ')
2663 			return false;
2664 
2665 	return true;
2666 }
2667 
2668 static bool quirk_matches(const struct nvme_id_ctrl *id,
2669 			  const struct nvme_core_quirk_entry *q)
2670 {
2671 	return q->vid == le16_to_cpu(id->vid) &&
2672 		string_matches(id->mn, q->mn, sizeof(id->mn)) &&
2673 		string_matches(id->fr, q->fr, sizeof(id->fr));
2674 }
2675 
2676 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl,
2677 		struct nvme_id_ctrl *id)
2678 {
2679 	size_t nqnlen;
2680 	int off;
2681 
2682 	if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) {
2683 		nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
2684 		if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
2685 			strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE);
2686 			return;
2687 		}
2688 
2689 		if (ctrl->vs >= NVME_VS(1, 2, 1))
2690 			dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
2691 	}
2692 
2693 	/*
2694 	 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe
2695 	 * Base Specification 2.0.  It is slightly different from the format
2696 	 * specified there due to historic reasons, and we can't change it now.
2697 	 */
2698 	off = snprintf(subsys->subnqn, NVMF_NQN_SIZE,
2699 			"nqn.2014.08.org.nvmexpress:%04x%04x",
2700 			le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
2701 	memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn));
2702 	off += sizeof(id->sn);
2703 	memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn));
2704 	off += sizeof(id->mn);
2705 	memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off);
2706 }
2707 
2708 static void nvme_release_subsystem(struct device *dev)
2709 {
2710 	struct nvme_subsystem *subsys =
2711 		container_of(dev, struct nvme_subsystem, dev);
2712 
2713 	if (subsys->instance >= 0)
2714 		ida_free(&nvme_instance_ida, subsys->instance);
2715 	kfree(subsys);
2716 }
2717 
2718 static void nvme_destroy_subsystem(struct kref *ref)
2719 {
2720 	struct nvme_subsystem *subsys =
2721 			container_of(ref, struct nvme_subsystem, ref);
2722 
2723 	mutex_lock(&nvme_subsystems_lock);
2724 	list_del(&subsys->entry);
2725 	mutex_unlock(&nvme_subsystems_lock);
2726 
2727 	ida_destroy(&subsys->ns_ida);
2728 	device_del(&subsys->dev);
2729 	put_device(&subsys->dev);
2730 }
2731 
2732 static void nvme_put_subsystem(struct nvme_subsystem *subsys)
2733 {
2734 	kref_put(&subsys->ref, nvme_destroy_subsystem);
2735 }
2736 
2737 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn)
2738 {
2739 	struct nvme_subsystem *subsys;
2740 
2741 	lockdep_assert_held(&nvme_subsystems_lock);
2742 
2743 	/*
2744 	 * Fail matches for discovery subsystems. This results
2745 	 * in each discovery controller bound to a unique subsystem.
2746 	 * This avoids issues with validating controller values
2747 	 * that can only be true when there is a single unique subsystem.
2748 	 * There may be multiple and completely independent entities
2749 	 * that provide discovery controllers.
2750 	 */
2751 	if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME))
2752 		return NULL;
2753 
2754 	list_for_each_entry(subsys, &nvme_subsystems, entry) {
2755 		if (strcmp(subsys->subnqn, subsysnqn))
2756 			continue;
2757 		if (!kref_get_unless_zero(&subsys->ref))
2758 			continue;
2759 		return subsys;
2760 	}
2761 
2762 	return NULL;
2763 }
2764 
2765 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl)
2766 {
2767 	return ctrl->opts && ctrl->opts->discovery_nqn;
2768 }
2769 
2770 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys,
2771 		struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2772 {
2773 	struct nvme_ctrl *tmp;
2774 
2775 	lockdep_assert_held(&nvme_subsystems_lock);
2776 
2777 	list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) {
2778 		if (nvme_state_terminal(tmp))
2779 			continue;
2780 
2781 		if (tmp->cntlid == ctrl->cntlid) {
2782 			dev_err(ctrl->device,
2783 				"Duplicate cntlid %u with %s, subsys %s, rejecting\n",
2784 				ctrl->cntlid, dev_name(tmp->device),
2785 				subsys->subnqn);
2786 			return false;
2787 		}
2788 
2789 		if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) ||
2790 		    nvme_discovery_ctrl(ctrl))
2791 			continue;
2792 
2793 		dev_err(ctrl->device,
2794 			"Subsystem does not support multiple controllers\n");
2795 		return false;
2796 	}
2797 
2798 	return true;
2799 }
2800 
2801 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2802 {
2803 	struct nvme_subsystem *subsys, *found;
2804 	int ret;
2805 
2806 	subsys = kzalloc(sizeof(*subsys), GFP_KERNEL);
2807 	if (!subsys)
2808 		return -ENOMEM;
2809 
2810 	subsys->instance = -1;
2811 	mutex_init(&subsys->lock);
2812 	kref_init(&subsys->ref);
2813 	INIT_LIST_HEAD(&subsys->ctrls);
2814 	INIT_LIST_HEAD(&subsys->nsheads);
2815 	nvme_init_subnqn(subsys, ctrl, id);
2816 	memcpy(subsys->serial, id->sn, sizeof(subsys->serial));
2817 	memcpy(subsys->model, id->mn, sizeof(subsys->model));
2818 	subsys->vendor_id = le16_to_cpu(id->vid);
2819 	subsys->cmic = id->cmic;
2820 
2821 	/* Versions prior to 1.4 don't necessarily report a valid type */
2822 	if (id->cntrltype == NVME_CTRL_DISC ||
2823 	    !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME))
2824 		subsys->subtype = NVME_NQN_DISC;
2825 	else
2826 		subsys->subtype = NVME_NQN_NVME;
2827 
2828 	if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) {
2829 		dev_err(ctrl->device,
2830 			"Subsystem %s is not a discovery controller",
2831 			subsys->subnqn);
2832 		kfree(subsys);
2833 		return -EINVAL;
2834 	}
2835 	subsys->awupf = le16_to_cpu(id->awupf);
2836 	nvme_mpath_default_iopolicy(subsys);
2837 
2838 	subsys->dev.class = nvme_subsys_class;
2839 	subsys->dev.release = nvme_release_subsystem;
2840 	subsys->dev.groups = nvme_subsys_attrs_groups;
2841 	dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance);
2842 	device_initialize(&subsys->dev);
2843 
2844 	mutex_lock(&nvme_subsystems_lock);
2845 	found = __nvme_find_get_subsystem(subsys->subnqn);
2846 	if (found) {
2847 		put_device(&subsys->dev);
2848 		subsys = found;
2849 
2850 		if (!nvme_validate_cntlid(subsys, ctrl, id)) {
2851 			ret = -EINVAL;
2852 			goto out_put_subsystem;
2853 		}
2854 	} else {
2855 		ret = device_add(&subsys->dev);
2856 		if (ret) {
2857 			dev_err(ctrl->device,
2858 				"failed to register subsystem device.\n");
2859 			put_device(&subsys->dev);
2860 			goto out_unlock;
2861 		}
2862 		ida_init(&subsys->ns_ida);
2863 		list_add_tail(&subsys->entry, &nvme_subsystems);
2864 	}
2865 
2866 	ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
2867 				dev_name(ctrl->device));
2868 	if (ret) {
2869 		dev_err(ctrl->device,
2870 			"failed to create sysfs link from subsystem.\n");
2871 		goto out_put_subsystem;
2872 	}
2873 
2874 	if (!found)
2875 		subsys->instance = ctrl->instance;
2876 	ctrl->subsys = subsys;
2877 	list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
2878 	mutex_unlock(&nvme_subsystems_lock);
2879 	return 0;
2880 
2881 out_put_subsystem:
2882 	nvme_put_subsystem(subsys);
2883 out_unlock:
2884 	mutex_unlock(&nvme_subsystems_lock);
2885 	return ret;
2886 }
2887 
2888 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
2889 		void *log, size_t size, u64 offset)
2890 {
2891 	struct nvme_command c = { };
2892 	u32 dwlen = nvme_bytes_to_numd(size);
2893 
2894 	c.get_log_page.opcode = nvme_admin_get_log_page;
2895 	c.get_log_page.nsid = cpu_to_le32(nsid);
2896 	c.get_log_page.lid = log_page;
2897 	c.get_log_page.lsp = lsp;
2898 	c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1));
2899 	c.get_log_page.numdu = cpu_to_le16(dwlen >> 16);
2900 	c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset));
2901 	c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset));
2902 	c.get_log_page.csi = csi;
2903 
2904 	return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size);
2905 }
2906 
2907 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi,
2908 				struct nvme_effects_log **log)
2909 {
2910 	struct nvme_effects_log	*cel = xa_load(&ctrl->cels, csi);
2911 	int ret;
2912 
2913 	if (cel)
2914 		goto out;
2915 
2916 	cel = kzalloc(sizeof(*cel), GFP_KERNEL);
2917 	if (!cel)
2918 		return -ENOMEM;
2919 
2920 	ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi,
2921 			cel, sizeof(*cel), 0);
2922 	if (ret) {
2923 		kfree(cel);
2924 		return ret;
2925 	}
2926 
2927 	xa_store(&ctrl->cels, csi, cel, GFP_KERNEL);
2928 out:
2929 	*log = cel;
2930 	return 0;
2931 }
2932 
2933 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units)
2934 {
2935 	u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val;
2936 
2937 	if (check_shl_overflow(1U, units + page_shift - 9, &val))
2938 		return UINT_MAX;
2939 	return val;
2940 }
2941 
2942 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl)
2943 {
2944 	struct nvme_command c = { };
2945 	struct nvme_id_ctrl_nvm *id;
2946 	int ret;
2947 
2948 	/*
2949 	 * Even though NVMe spec explicitly states that MDTS is not applicable
2950 	 * to the write-zeroes, we are cautious and limit the size to the
2951 	 * controllers max_hw_sectors value, which is based on the MDTS field
2952 	 * and possibly other limiting factors.
2953 	 */
2954 	if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) &&
2955 	    !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
2956 		ctrl->max_zeroes_sectors = ctrl->max_hw_sectors;
2957 	else
2958 		ctrl->max_zeroes_sectors = 0;
2959 
2960 	if (ctrl->subsys->subtype != NVME_NQN_NVME ||
2961 	    nvme_ctrl_limited_cns(ctrl) ||
2962 	    test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags))
2963 		return 0;
2964 
2965 	id = kzalloc(sizeof(*id), GFP_KERNEL);
2966 	if (!id)
2967 		return -ENOMEM;
2968 
2969 	c.identify.opcode = nvme_admin_identify;
2970 	c.identify.cns = NVME_ID_CNS_CS_CTRL;
2971 	c.identify.csi = NVME_CSI_NVM;
2972 
2973 	ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
2974 	if (ret)
2975 		goto free_data;
2976 
2977 	ctrl->dmrl = id->dmrl;
2978 	ctrl->dmrsl = le32_to_cpu(id->dmrsl);
2979 	if (id->wzsl)
2980 		ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl);
2981 
2982 free_data:
2983 	if (ret > 0)
2984 		set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags);
2985 	kfree(id);
2986 	return ret;
2987 }
2988 
2989 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl)
2990 {
2991 	struct nvme_effects_log	*log = ctrl->effects;
2992 
2993 	log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
2994 						NVME_CMD_EFFECTS_NCC |
2995 						NVME_CMD_EFFECTS_CSE_MASK);
2996 	log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
2997 						NVME_CMD_EFFECTS_CSE_MASK);
2998 
2999 	/*
3000 	 * The spec says the result of a security receive command depends on
3001 	 * the previous security send command. As such, many vendors log this
3002 	 * command as one to submitted only when no other commands to the same
3003 	 * namespace are outstanding. The intention is to tell the host to
3004 	 * prevent mixing security send and receive.
3005 	 *
3006 	 * This driver can only enforce such exclusive access against IO
3007 	 * queues, though. We are not readily able to enforce such a rule for
3008 	 * two commands to the admin queue, which is the only queue that
3009 	 * matters for this command.
3010 	 *
3011 	 * Rather than blindly freezing the IO queues for this effect that
3012 	 * doesn't even apply to IO, mask it off.
3013 	 */
3014 	log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK);
3015 
3016 	log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3017 	log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3018 	log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3019 }
3020 
3021 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3022 {
3023 	int ret = 0;
3024 
3025 	if (ctrl->effects)
3026 		return 0;
3027 
3028 	if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) {
3029 		ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3030 		if (ret < 0)
3031 			return ret;
3032 	}
3033 
3034 	if (!ctrl->effects) {
3035 		ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL);
3036 		if (!ctrl->effects)
3037 			return -ENOMEM;
3038 		xa_store(&ctrl->cels, NVME_CSI_NVM, ctrl->effects, GFP_KERNEL);
3039 	}
3040 
3041 	nvme_init_known_nvm_effects(ctrl);
3042 	return 0;
3043 }
3044 
3045 static int nvme_check_ctrl_fabric_info(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3046 {
3047 	/*
3048 	 * In fabrics we need to verify the cntlid matches the
3049 	 * admin connect
3050 	 */
3051 	if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
3052 		dev_err(ctrl->device,
3053 			"Mismatching cntlid: Connect %u vs Identify %u, rejecting\n",
3054 			ctrl->cntlid, le16_to_cpu(id->cntlid));
3055 		return -EINVAL;
3056 	}
3057 
3058 	if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) {
3059 		dev_err(ctrl->device,
3060 			"keep-alive support is mandatory for fabrics\n");
3061 		return -EINVAL;
3062 	}
3063 
3064 	if (!nvme_discovery_ctrl(ctrl) && ctrl->ioccsz < 4) {
3065 		dev_err(ctrl->device,
3066 			"I/O queue command capsule supported size %d < 4\n",
3067 			ctrl->ioccsz);
3068 		return -EINVAL;
3069 	}
3070 
3071 	if (!nvme_discovery_ctrl(ctrl) && ctrl->iorcsz < 1) {
3072 		dev_err(ctrl->device,
3073 			"I/O queue response capsule supported size %d < 1\n",
3074 			ctrl->iorcsz);
3075 		return -EINVAL;
3076 	}
3077 
3078 	return 0;
3079 }
3080 
3081 static int nvme_init_identify(struct nvme_ctrl *ctrl)
3082 {
3083 	struct nvme_id_ctrl *id;
3084 	u32 max_hw_sectors;
3085 	bool prev_apst_enabled;
3086 	int ret;
3087 
3088 	ret = nvme_identify_ctrl(ctrl, &id);
3089 	if (ret) {
3090 		dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
3091 		return -EIO;
3092 	}
3093 
3094 	if (!(ctrl->ops->flags & NVME_F_FABRICS))
3095 		ctrl->cntlid = le16_to_cpu(id->cntlid);
3096 
3097 	if (!ctrl->identified) {
3098 		unsigned int i;
3099 
3100 		/*
3101 		 * Check for quirks.  Quirk can depend on firmware version,
3102 		 * so, in principle, the set of quirks present can change
3103 		 * across a reset.  As a possible future enhancement, we
3104 		 * could re-scan for quirks every time we reinitialize
3105 		 * the device, but we'd have to make sure that the driver
3106 		 * behaves intelligently if the quirks change.
3107 		 */
3108 		for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
3109 			if (quirk_matches(id, &core_quirks[i]))
3110 				ctrl->quirks |= core_quirks[i].quirks;
3111 		}
3112 
3113 		ret = nvme_init_subsystem(ctrl, id);
3114 		if (ret)
3115 			goto out_free;
3116 
3117 		ret = nvme_init_effects(ctrl, id);
3118 		if (ret)
3119 			goto out_free;
3120 	}
3121 	memcpy(ctrl->subsys->firmware_rev, id->fr,
3122 	       sizeof(ctrl->subsys->firmware_rev));
3123 
3124 	if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
3125 		dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
3126 		ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
3127 	}
3128 
3129 	ctrl->crdt[0] = le16_to_cpu(id->crdt1);
3130 	ctrl->crdt[1] = le16_to_cpu(id->crdt2);
3131 	ctrl->crdt[2] = le16_to_cpu(id->crdt3);
3132 
3133 	ctrl->oacs = le16_to_cpu(id->oacs);
3134 	ctrl->oncs = le16_to_cpu(id->oncs);
3135 	ctrl->mtfa = le16_to_cpu(id->mtfa);
3136 	ctrl->oaes = le32_to_cpu(id->oaes);
3137 	ctrl->wctemp = le16_to_cpu(id->wctemp);
3138 	ctrl->cctemp = le16_to_cpu(id->cctemp);
3139 
3140 	atomic_set(&ctrl->abort_limit, id->acl + 1);
3141 	ctrl->vwc = id->vwc;
3142 	if (id->mdts)
3143 		max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts);
3144 	else
3145 		max_hw_sectors = UINT_MAX;
3146 	ctrl->max_hw_sectors =
3147 		min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
3148 
3149 	nvme_set_queue_limits(ctrl, ctrl->admin_q);
3150 	ctrl->sgls = le32_to_cpu(id->sgls);
3151 	ctrl->kas = le16_to_cpu(id->kas);
3152 	ctrl->max_namespaces = le32_to_cpu(id->mnan);
3153 	ctrl->ctratt = le32_to_cpu(id->ctratt);
3154 
3155 	ctrl->cntrltype = id->cntrltype;
3156 	ctrl->dctype = id->dctype;
3157 
3158 	if (id->rtd3e) {
3159 		/* us -> s */
3160 		u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC;
3161 
3162 		ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
3163 						 shutdown_timeout, 60);
3164 
3165 		if (ctrl->shutdown_timeout != shutdown_timeout)
3166 			dev_info(ctrl->device,
3167 				 "Shutdown timeout set to %u seconds\n",
3168 				 ctrl->shutdown_timeout);
3169 	} else
3170 		ctrl->shutdown_timeout = shutdown_timeout;
3171 
3172 	ctrl->npss = id->npss;
3173 	ctrl->apsta = id->apsta;
3174 	prev_apst_enabled = ctrl->apst_enabled;
3175 	if (ctrl->quirks & NVME_QUIRK_NO_APST) {
3176 		if (force_apst && id->apsta) {
3177 			dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
3178 			ctrl->apst_enabled = true;
3179 		} else {
3180 			ctrl->apst_enabled = false;
3181 		}
3182 	} else {
3183 		ctrl->apst_enabled = id->apsta;
3184 	}
3185 	memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
3186 
3187 	if (ctrl->ops->flags & NVME_F_FABRICS) {
3188 		ctrl->icdoff = le16_to_cpu(id->icdoff);
3189 		ctrl->ioccsz = le32_to_cpu(id->ioccsz);
3190 		ctrl->iorcsz = le32_to_cpu(id->iorcsz);
3191 		ctrl->maxcmd = le16_to_cpu(id->maxcmd);
3192 
3193 		ret = nvme_check_ctrl_fabric_info(ctrl, id);
3194 		if (ret)
3195 			goto out_free;
3196 	} else {
3197 		ctrl->hmpre = le32_to_cpu(id->hmpre);
3198 		ctrl->hmmin = le32_to_cpu(id->hmmin);
3199 		ctrl->hmminds = le32_to_cpu(id->hmminds);
3200 		ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
3201 	}
3202 
3203 	ret = nvme_mpath_init_identify(ctrl, id);
3204 	if (ret < 0)
3205 		goto out_free;
3206 
3207 	if (ctrl->apst_enabled && !prev_apst_enabled)
3208 		dev_pm_qos_expose_latency_tolerance(ctrl->device);
3209 	else if (!ctrl->apst_enabled && prev_apst_enabled)
3210 		dev_pm_qos_hide_latency_tolerance(ctrl->device);
3211 
3212 out_free:
3213 	kfree(id);
3214 	return ret;
3215 }
3216 
3217 /*
3218  * Initialize the cached copies of the Identify data and various controller
3219  * register in our nvme_ctrl structure.  This should be called as soon as
3220  * the admin queue is fully up and running.
3221  */
3222 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended)
3223 {
3224 	int ret;
3225 
3226 	ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
3227 	if (ret) {
3228 		dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
3229 		return ret;
3230 	}
3231 
3232 	ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize);
3233 
3234 	if (ctrl->vs >= NVME_VS(1, 1, 0))
3235 		ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap);
3236 
3237 	ret = nvme_init_identify(ctrl);
3238 	if (ret)
3239 		return ret;
3240 
3241 	ret = nvme_configure_apst(ctrl);
3242 	if (ret < 0)
3243 		return ret;
3244 
3245 	ret = nvme_configure_timestamp(ctrl);
3246 	if (ret < 0)
3247 		return ret;
3248 
3249 	ret = nvme_configure_host_options(ctrl);
3250 	if (ret < 0)
3251 		return ret;
3252 
3253 	nvme_configure_opal(ctrl, was_suspended);
3254 
3255 	if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) {
3256 		/*
3257 		 * Do not return errors unless we are in a controller reset,
3258 		 * the controller works perfectly fine without hwmon.
3259 		 */
3260 		ret = nvme_hwmon_init(ctrl);
3261 		if (ret == -EINTR)
3262 			return ret;
3263 	}
3264 
3265 	clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags);
3266 	ctrl->identified = true;
3267 
3268 	nvme_start_keep_alive(ctrl);
3269 
3270 	return 0;
3271 }
3272 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish);
3273 
3274 static int nvme_dev_open(struct inode *inode, struct file *file)
3275 {
3276 	struct nvme_ctrl *ctrl =
3277 		container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3278 
3279 	switch (nvme_ctrl_state(ctrl)) {
3280 	case NVME_CTRL_LIVE:
3281 		break;
3282 	default:
3283 		return -EWOULDBLOCK;
3284 	}
3285 
3286 	nvme_get_ctrl(ctrl);
3287 	if (!try_module_get(ctrl->ops->module)) {
3288 		nvme_put_ctrl(ctrl);
3289 		return -EINVAL;
3290 	}
3291 
3292 	file->private_data = ctrl;
3293 	return 0;
3294 }
3295 
3296 static int nvme_dev_release(struct inode *inode, struct file *file)
3297 {
3298 	struct nvme_ctrl *ctrl =
3299 		container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3300 
3301 	module_put(ctrl->ops->module);
3302 	nvme_put_ctrl(ctrl);
3303 	return 0;
3304 }
3305 
3306 static const struct file_operations nvme_dev_fops = {
3307 	.owner		= THIS_MODULE,
3308 	.open		= nvme_dev_open,
3309 	.release	= nvme_dev_release,
3310 	.unlocked_ioctl	= nvme_dev_ioctl,
3311 	.compat_ioctl	= compat_ptr_ioctl,
3312 	.uring_cmd	= nvme_dev_uring_cmd,
3313 };
3314 
3315 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl,
3316 		unsigned nsid)
3317 {
3318 	struct nvme_ns_head *h;
3319 
3320 	lockdep_assert_held(&ctrl->subsys->lock);
3321 
3322 	list_for_each_entry(h, &ctrl->subsys->nsheads, entry) {
3323 		/*
3324 		 * Private namespaces can share NSIDs under some conditions.
3325 		 * In that case we can't use the same ns_head for namespaces
3326 		 * with the same NSID.
3327 		 */
3328 		if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h))
3329 			continue;
3330 		if (!list_empty(&h->list) && nvme_tryget_ns_head(h))
3331 			return h;
3332 	}
3333 
3334 	return NULL;
3335 }
3336 
3337 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys,
3338 		struct nvme_ns_ids *ids)
3339 {
3340 	bool has_uuid = !uuid_is_null(&ids->uuid);
3341 	bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid));
3342 	bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64));
3343 	struct nvme_ns_head *h;
3344 
3345 	lockdep_assert_held(&subsys->lock);
3346 
3347 	list_for_each_entry(h, &subsys->nsheads, entry) {
3348 		if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid))
3349 			return -EINVAL;
3350 		if (has_nguid &&
3351 		    memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0)
3352 			return -EINVAL;
3353 		if (has_eui64 &&
3354 		    memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0)
3355 			return -EINVAL;
3356 	}
3357 
3358 	return 0;
3359 }
3360 
3361 static void nvme_cdev_rel(struct device *dev)
3362 {
3363 	ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt));
3364 }
3365 
3366 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device)
3367 {
3368 	cdev_device_del(cdev, cdev_device);
3369 	put_device(cdev_device);
3370 }
3371 
3372 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
3373 		const struct file_operations *fops, struct module *owner)
3374 {
3375 	int minor, ret;
3376 
3377 	minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL);
3378 	if (minor < 0)
3379 		return minor;
3380 	cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor);
3381 	cdev_device->class = nvme_ns_chr_class;
3382 	cdev_device->release = nvme_cdev_rel;
3383 	device_initialize(cdev_device);
3384 	cdev_init(cdev, fops);
3385 	cdev->owner = owner;
3386 	ret = cdev_device_add(cdev, cdev_device);
3387 	if (ret)
3388 		put_device(cdev_device);
3389 
3390 	return ret;
3391 }
3392 
3393 static int nvme_ns_chr_open(struct inode *inode, struct file *file)
3394 {
3395 	return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev));
3396 }
3397 
3398 static int nvme_ns_chr_release(struct inode *inode, struct file *file)
3399 {
3400 	nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev));
3401 	return 0;
3402 }
3403 
3404 static const struct file_operations nvme_ns_chr_fops = {
3405 	.owner		= THIS_MODULE,
3406 	.open		= nvme_ns_chr_open,
3407 	.release	= nvme_ns_chr_release,
3408 	.unlocked_ioctl	= nvme_ns_chr_ioctl,
3409 	.compat_ioctl	= compat_ptr_ioctl,
3410 	.uring_cmd	= nvme_ns_chr_uring_cmd,
3411 	.uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll,
3412 };
3413 
3414 static int nvme_add_ns_cdev(struct nvme_ns *ns)
3415 {
3416 	int ret;
3417 
3418 	ns->cdev_device.parent = ns->ctrl->device;
3419 	ret = dev_set_name(&ns->cdev_device, "ng%dn%d",
3420 			   ns->ctrl->instance, ns->head->instance);
3421 	if (ret)
3422 		return ret;
3423 
3424 	return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops,
3425 			     ns->ctrl->ops->module);
3426 }
3427 
3428 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl,
3429 		struct nvme_ns_info *info)
3430 {
3431 	struct nvme_ns_head *head;
3432 	size_t size = sizeof(*head);
3433 	int ret = -ENOMEM;
3434 
3435 #ifdef CONFIG_NVME_MULTIPATH
3436 	size += num_possible_nodes() * sizeof(struct nvme_ns *);
3437 #endif
3438 
3439 	head = kzalloc(size, GFP_KERNEL);
3440 	if (!head)
3441 		goto out;
3442 	ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL);
3443 	if (ret < 0)
3444 		goto out_free_head;
3445 	head->instance = ret;
3446 	INIT_LIST_HEAD(&head->list);
3447 	ret = init_srcu_struct(&head->srcu);
3448 	if (ret)
3449 		goto out_ida_remove;
3450 	head->subsys = ctrl->subsys;
3451 	head->ns_id = info->nsid;
3452 	head->ids = info->ids;
3453 	head->shared = info->is_shared;
3454 	ratelimit_state_init(&head->rs_nuse, 5 * HZ, 1);
3455 	ratelimit_set_flags(&head->rs_nuse, RATELIMIT_MSG_ON_RELEASE);
3456 	kref_init(&head->ref);
3457 
3458 	if (head->ids.csi) {
3459 		ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects);
3460 		if (ret)
3461 			goto out_cleanup_srcu;
3462 	} else
3463 		head->effects = ctrl->effects;
3464 
3465 	ret = nvme_mpath_alloc_disk(ctrl, head);
3466 	if (ret)
3467 		goto out_cleanup_srcu;
3468 
3469 	list_add_tail(&head->entry, &ctrl->subsys->nsheads);
3470 
3471 	kref_get(&ctrl->subsys->ref);
3472 
3473 	return head;
3474 out_cleanup_srcu:
3475 	cleanup_srcu_struct(&head->srcu);
3476 out_ida_remove:
3477 	ida_free(&ctrl->subsys->ns_ida, head->instance);
3478 out_free_head:
3479 	kfree(head);
3480 out:
3481 	if (ret > 0)
3482 		ret = blk_status_to_errno(nvme_error_status(ret));
3483 	return ERR_PTR(ret);
3484 }
3485 
3486 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this,
3487 		struct nvme_ns_ids *ids)
3488 {
3489 	struct nvme_subsystem *s;
3490 	int ret = 0;
3491 
3492 	/*
3493 	 * Note that this check is racy as we try to avoid holding the global
3494 	 * lock over the whole ns_head creation.  But it is only intended as
3495 	 * a sanity check anyway.
3496 	 */
3497 	mutex_lock(&nvme_subsystems_lock);
3498 	list_for_each_entry(s, &nvme_subsystems, entry) {
3499 		if (s == this)
3500 			continue;
3501 		mutex_lock(&s->lock);
3502 		ret = nvme_subsys_check_duplicate_ids(s, ids);
3503 		mutex_unlock(&s->lock);
3504 		if (ret)
3505 			break;
3506 	}
3507 	mutex_unlock(&nvme_subsystems_lock);
3508 
3509 	return ret;
3510 }
3511 
3512 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info)
3513 {
3514 	struct nvme_ctrl *ctrl = ns->ctrl;
3515 	struct nvme_ns_head *head = NULL;
3516 	int ret;
3517 
3518 	ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids);
3519 	if (ret) {
3520 		/*
3521 		 * We've found two different namespaces on two different
3522 		 * subsystems that report the same ID.  This is pretty nasty
3523 		 * for anything that actually requires unique device
3524 		 * identification.  In the kernel we need this for multipathing,
3525 		 * and in user space the /dev/disk/by-id/ links rely on it.
3526 		 *
3527 		 * If the device also claims to be multi-path capable back off
3528 		 * here now and refuse the probe the second device as this is a
3529 		 * recipe for data corruption.  If not this is probably a
3530 		 * cheap consumer device if on the PCIe bus, so let the user
3531 		 * proceed and use the shiny toy, but warn that with changing
3532 		 * probing order (which due to our async probing could just be
3533 		 * device taking longer to startup) the other device could show
3534 		 * up at any time.
3535 		 */
3536 		nvme_print_device_info(ctrl);
3537 		if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */
3538 		    ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) &&
3539 		     info->is_shared)) {
3540 			dev_err(ctrl->device,
3541 				"ignoring nsid %d because of duplicate IDs\n",
3542 				info->nsid);
3543 			return ret;
3544 		}
3545 
3546 		dev_err(ctrl->device,
3547 			"clearing duplicate IDs for nsid %d\n", info->nsid);
3548 		dev_err(ctrl->device,
3549 			"use of /dev/disk/by-id/ may cause data corruption\n");
3550 		memset(&info->ids.nguid, 0, sizeof(info->ids.nguid));
3551 		memset(&info->ids.uuid, 0, sizeof(info->ids.uuid));
3552 		memset(&info->ids.eui64, 0, sizeof(info->ids.eui64));
3553 		ctrl->quirks |= NVME_QUIRK_BOGUS_NID;
3554 	}
3555 
3556 	mutex_lock(&ctrl->subsys->lock);
3557 	head = nvme_find_ns_head(ctrl, info->nsid);
3558 	if (!head) {
3559 		ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids);
3560 		if (ret) {
3561 			dev_err(ctrl->device,
3562 				"duplicate IDs in subsystem for nsid %d\n",
3563 				info->nsid);
3564 			goto out_unlock;
3565 		}
3566 		head = nvme_alloc_ns_head(ctrl, info);
3567 		if (IS_ERR(head)) {
3568 			ret = PTR_ERR(head);
3569 			goto out_unlock;
3570 		}
3571 	} else {
3572 		ret = -EINVAL;
3573 		if (!info->is_shared || !head->shared) {
3574 			dev_err(ctrl->device,
3575 				"Duplicate unshared namespace %d\n",
3576 				info->nsid);
3577 			goto out_put_ns_head;
3578 		}
3579 		if (!nvme_ns_ids_equal(&head->ids, &info->ids)) {
3580 			dev_err(ctrl->device,
3581 				"IDs don't match for shared namespace %d\n",
3582 					info->nsid);
3583 			goto out_put_ns_head;
3584 		}
3585 
3586 		if (!multipath) {
3587 			dev_warn(ctrl->device,
3588 				"Found shared namespace %d, but multipathing not supported.\n",
3589 				info->nsid);
3590 			dev_warn_once(ctrl->device,
3591 				"Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0\n.");
3592 		}
3593 	}
3594 
3595 	list_add_tail_rcu(&ns->siblings, &head->list);
3596 	ns->head = head;
3597 	mutex_unlock(&ctrl->subsys->lock);
3598 	return 0;
3599 
3600 out_put_ns_head:
3601 	nvme_put_ns_head(head);
3602 out_unlock:
3603 	mutex_unlock(&ctrl->subsys->lock);
3604 	return ret;
3605 }
3606 
3607 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3608 {
3609 	struct nvme_ns *ns, *ret = NULL;
3610 
3611 	down_read(&ctrl->namespaces_rwsem);
3612 	list_for_each_entry(ns, &ctrl->namespaces, list) {
3613 		if (ns->head->ns_id == nsid) {
3614 			if (!nvme_get_ns(ns))
3615 				continue;
3616 			ret = ns;
3617 			break;
3618 		}
3619 		if (ns->head->ns_id > nsid)
3620 			break;
3621 	}
3622 	up_read(&ctrl->namespaces_rwsem);
3623 	return ret;
3624 }
3625 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU);
3626 
3627 /*
3628  * Add the namespace to the controller list while keeping the list ordered.
3629  */
3630 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns)
3631 {
3632 	struct nvme_ns *tmp;
3633 
3634 	list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) {
3635 		if (tmp->head->ns_id < ns->head->ns_id) {
3636 			list_add(&ns->list, &tmp->list);
3637 			return;
3638 		}
3639 	}
3640 	list_add(&ns->list, &ns->ctrl->namespaces);
3641 }
3642 
3643 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info)
3644 {
3645 	struct nvme_ns *ns;
3646 	struct gendisk *disk;
3647 	int node = ctrl->numa_node;
3648 
3649 	ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
3650 	if (!ns)
3651 		return;
3652 
3653 	disk = blk_mq_alloc_disk(ctrl->tagset, ns);
3654 	if (IS_ERR(disk))
3655 		goto out_free_ns;
3656 	disk->fops = &nvme_bdev_ops;
3657 	disk->private_data = ns;
3658 
3659 	ns->disk = disk;
3660 	ns->queue = disk->queue;
3661 
3662 	if (ctrl->opts && ctrl->opts->data_digest)
3663 		blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue);
3664 
3665 	blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue);
3666 	if (ctrl->ops->supports_pci_p2pdma &&
3667 	    ctrl->ops->supports_pci_p2pdma(ctrl))
3668 		blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue);
3669 
3670 	ns->ctrl = ctrl;
3671 	kref_init(&ns->kref);
3672 
3673 	if (nvme_init_ns_head(ns, info))
3674 		goto out_cleanup_disk;
3675 
3676 	/*
3677 	 * If multipathing is enabled, the device name for all disks and not
3678 	 * just those that represent shared namespaces needs to be based on the
3679 	 * subsystem instance.  Using the controller instance for private
3680 	 * namespaces could lead to naming collisions between shared and private
3681 	 * namespaces if they don't use a common numbering scheme.
3682 	 *
3683 	 * If multipathing is not enabled, disk names must use the controller
3684 	 * instance as shared namespaces will show up as multiple block
3685 	 * devices.
3686 	 */
3687 	if (nvme_ns_head_multipath(ns->head)) {
3688 		sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance,
3689 			ctrl->instance, ns->head->instance);
3690 		disk->flags |= GENHD_FL_HIDDEN;
3691 	} else if (multipath) {
3692 		sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance,
3693 			ns->head->instance);
3694 	} else {
3695 		sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance,
3696 			ns->head->instance);
3697 	}
3698 
3699 	if (nvme_update_ns_info(ns, info))
3700 		goto out_unlink_ns;
3701 
3702 	down_write(&ctrl->namespaces_rwsem);
3703 	/*
3704 	 * Ensure that no namespaces are added to the ctrl list after the queues
3705 	 * are frozen, thereby avoiding a deadlock between scan and reset.
3706 	 */
3707 	if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) {
3708 		up_write(&ctrl->namespaces_rwsem);
3709 		goto out_unlink_ns;
3710 	}
3711 	nvme_ns_add_to_ctrl_list(ns);
3712 	up_write(&ctrl->namespaces_rwsem);
3713 	nvme_get_ctrl(ctrl);
3714 
3715 	if (device_add_disk(ctrl->device, ns->disk, nvme_ns_attr_groups))
3716 		goto out_cleanup_ns_from_list;
3717 
3718 	if (!nvme_ns_head_multipath(ns->head))
3719 		nvme_add_ns_cdev(ns);
3720 
3721 	nvme_mpath_add_disk(ns, info->anagrpid);
3722 	nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name);
3723 
3724 	return;
3725 
3726  out_cleanup_ns_from_list:
3727 	nvme_put_ctrl(ctrl);
3728 	down_write(&ctrl->namespaces_rwsem);
3729 	list_del_init(&ns->list);
3730 	up_write(&ctrl->namespaces_rwsem);
3731  out_unlink_ns:
3732 	mutex_lock(&ctrl->subsys->lock);
3733 	list_del_rcu(&ns->siblings);
3734 	if (list_empty(&ns->head->list))
3735 		list_del_init(&ns->head->entry);
3736 	mutex_unlock(&ctrl->subsys->lock);
3737 	nvme_put_ns_head(ns->head);
3738  out_cleanup_disk:
3739 	put_disk(disk);
3740  out_free_ns:
3741 	kfree(ns);
3742 }
3743 
3744 static void nvme_ns_remove(struct nvme_ns *ns)
3745 {
3746 	bool last_path = false;
3747 
3748 	if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
3749 		return;
3750 
3751 	clear_bit(NVME_NS_READY, &ns->flags);
3752 	set_capacity(ns->disk, 0);
3753 	nvme_fault_inject_fini(&ns->fault_inject);
3754 
3755 	/*
3756 	 * Ensure that !NVME_NS_READY is seen by other threads to prevent
3757 	 * this ns going back into current_path.
3758 	 */
3759 	synchronize_srcu(&ns->head->srcu);
3760 
3761 	/* wait for concurrent submissions */
3762 	if (nvme_mpath_clear_current_path(ns))
3763 		synchronize_srcu(&ns->head->srcu);
3764 
3765 	mutex_lock(&ns->ctrl->subsys->lock);
3766 	list_del_rcu(&ns->siblings);
3767 	if (list_empty(&ns->head->list)) {
3768 		list_del_init(&ns->head->entry);
3769 		last_path = true;
3770 	}
3771 	mutex_unlock(&ns->ctrl->subsys->lock);
3772 
3773 	/* guarantee not available in head->list */
3774 	synchronize_srcu(&ns->head->srcu);
3775 
3776 	if (!nvme_ns_head_multipath(ns->head))
3777 		nvme_cdev_del(&ns->cdev, &ns->cdev_device);
3778 	del_gendisk(ns->disk);
3779 
3780 	down_write(&ns->ctrl->namespaces_rwsem);
3781 	list_del_init(&ns->list);
3782 	up_write(&ns->ctrl->namespaces_rwsem);
3783 
3784 	if (last_path)
3785 		nvme_mpath_shutdown_disk(ns->head);
3786 	nvme_put_ns(ns);
3787 }
3788 
3789 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid)
3790 {
3791 	struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid);
3792 
3793 	if (ns) {
3794 		nvme_ns_remove(ns);
3795 		nvme_put_ns(ns);
3796 	}
3797 }
3798 
3799 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info)
3800 {
3801 	int ret = NVME_SC_INVALID_NS | NVME_SC_DNR;
3802 
3803 	if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) {
3804 		dev_err(ns->ctrl->device,
3805 			"identifiers changed for nsid %d\n", ns->head->ns_id);
3806 		goto out;
3807 	}
3808 
3809 	ret = nvme_update_ns_info(ns, info);
3810 out:
3811 	/*
3812 	 * Only remove the namespace if we got a fatal error back from the
3813 	 * device, otherwise ignore the error and just move on.
3814 	 *
3815 	 * TODO: we should probably schedule a delayed retry here.
3816 	 */
3817 	if (ret > 0 && (ret & NVME_SC_DNR))
3818 		nvme_ns_remove(ns);
3819 }
3820 
3821 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3822 {
3823 	struct nvme_ns_info info = { .nsid = nsid };
3824 	struct nvme_ns *ns;
3825 	int ret;
3826 
3827 	if (nvme_identify_ns_descs(ctrl, &info))
3828 		return;
3829 
3830 	if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) {
3831 		dev_warn(ctrl->device,
3832 			"command set not reported for nsid: %d\n", nsid);
3833 		return;
3834 	}
3835 
3836 	/*
3837 	 * If available try to use the Command Set Idependent Identify Namespace
3838 	 * data structure to find all the generic information that is needed to
3839 	 * set up a namespace.  If not fall back to the legacy version.
3840 	 */
3841 	if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) ||
3842 	    (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS))
3843 		ret = nvme_ns_info_from_id_cs_indep(ctrl, &info);
3844 	else
3845 		ret = nvme_ns_info_from_identify(ctrl, &info);
3846 
3847 	if (info.is_removed)
3848 		nvme_ns_remove_by_nsid(ctrl, nsid);
3849 
3850 	/*
3851 	 * Ignore the namespace if it is not ready. We will get an AEN once it
3852 	 * becomes ready and restart the scan.
3853 	 */
3854 	if (ret || !info.is_ready)
3855 		return;
3856 
3857 	ns = nvme_find_get_ns(ctrl, nsid);
3858 	if (ns) {
3859 		nvme_validate_ns(ns, &info);
3860 		nvme_put_ns(ns);
3861 	} else {
3862 		nvme_alloc_ns(ctrl, &info);
3863 	}
3864 }
3865 
3866 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
3867 					unsigned nsid)
3868 {
3869 	struct nvme_ns *ns, *next;
3870 	LIST_HEAD(rm_list);
3871 
3872 	down_write(&ctrl->namespaces_rwsem);
3873 	list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
3874 		if (ns->head->ns_id > nsid)
3875 			list_move_tail(&ns->list, &rm_list);
3876 	}
3877 	up_write(&ctrl->namespaces_rwsem);
3878 
3879 	list_for_each_entry_safe(ns, next, &rm_list, list)
3880 		nvme_ns_remove(ns);
3881 
3882 }
3883 
3884 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl)
3885 {
3886 	const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32);
3887 	__le32 *ns_list;
3888 	u32 prev = 0;
3889 	int ret = 0, i;
3890 
3891 	ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
3892 	if (!ns_list)
3893 		return -ENOMEM;
3894 
3895 	for (;;) {
3896 		struct nvme_command cmd = {
3897 			.identify.opcode	= nvme_admin_identify,
3898 			.identify.cns		= NVME_ID_CNS_NS_ACTIVE_LIST,
3899 			.identify.nsid		= cpu_to_le32(prev),
3900 		};
3901 
3902 		ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list,
3903 					    NVME_IDENTIFY_DATA_SIZE);
3904 		if (ret) {
3905 			dev_warn(ctrl->device,
3906 				"Identify NS List failed (status=0x%x)\n", ret);
3907 			goto free;
3908 		}
3909 
3910 		for (i = 0; i < nr_entries; i++) {
3911 			u32 nsid = le32_to_cpu(ns_list[i]);
3912 
3913 			if (!nsid)	/* end of the list? */
3914 				goto out;
3915 			nvme_scan_ns(ctrl, nsid);
3916 			while (++prev < nsid)
3917 				nvme_ns_remove_by_nsid(ctrl, prev);
3918 		}
3919 	}
3920  out:
3921 	nvme_remove_invalid_namespaces(ctrl, prev);
3922  free:
3923 	kfree(ns_list);
3924 	return ret;
3925 }
3926 
3927 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl)
3928 {
3929 	struct nvme_id_ctrl *id;
3930 	u32 nn, i;
3931 
3932 	if (nvme_identify_ctrl(ctrl, &id))
3933 		return;
3934 	nn = le32_to_cpu(id->nn);
3935 	kfree(id);
3936 
3937 	for (i = 1; i <= nn; i++)
3938 		nvme_scan_ns(ctrl, i);
3939 
3940 	nvme_remove_invalid_namespaces(ctrl, nn);
3941 }
3942 
3943 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl)
3944 {
3945 	size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32);
3946 	__le32 *log;
3947 	int error;
3948 
3949 	log = kzalloc(log_size, GFP_KERNEL);
3950 	if (!log)
3951 		return;
3952 
3953 	/*
3954 	 * We need to read the log to clear the AEN, but we don't want to rely
3955 	 * on it for the changed namespace information as userspace could have
3956 	 * raced with us in reading the log page, which could cause us to miss
3957 	 * updates.
3958 	 */
3959 	error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0,
3960 			NVME_CSI_NVM, log, log_size, 0);
3961 	if (error)
3962 		dev_warn(ctrl->device,
3963 			"reading changed ns log failed: %d\n", error);
3964 
3965 	kfree(log);
3966 }
3967 
3968 static void nvme_scan_work(struct work_struct *work)
3969 {
3970 	struct nvme_ctrl *ctrl =
3971 		container_of(work, struct nvme_ctrl, scan_work);
3972 	int ret;
3973 
3974 	/* No tagset on a live ctrl means IO queues could not created */
3975 	if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset)
3976 		return;
3977 
3978 	/*
3979 	 * Identify controller limits can change at controller reset due to
3980 	 * new firmware download, even though it is not common we cannot ignore
3981 	 * such scenario. Controller's non-mdts limits are reported in the unit
3982 	 * of logical blocks that is dependent on the format of attached
3983 	 * namespace. Hence re-read the limits at the time of ns allocation.
3984 	 */
3985 	ret = nvme_init_non_mdts_limits(ctrl);
3986 	if (ret < 0) {
3987 		dev_warn(ctrl->device,
3988 			"reading non-mdts-limits failed: %d\n", ret);
3989 		return;
3990 	}
3991 
3992 	if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) {
3993 		dev_info(ctrl->device, "rescanning namespaces.\n");
3994 		nvme_clear_changed_ns_log(ctrl);
3995 	}
3996 
3997 	mutex_lock(&ctrl->scan_lock);
3998 	if (nvme_ctrl_limited_cns(ctrl)) {
3999 		nvme_scan_ns_sequential(ctrl);
4000 	} else {
4001 		/*
4002 		 * Fall back to sequential scan if DNR is set to handle broken
4003 		 * devices which should support Identify NS List (as per the VS
4004 		 * they report) but don't actually support it.
4005 		 */
4006 		ret = nvme_scan_ns_list(ctrl);
4007 		if (ret > 0 && ret & NVME_SC_DNR)
4008 			nvme_scan_ns_sequential(ctrl);
4009 	}
4010 	mutex_unlock(&ctrl->scan_lock);
4011 }
4012 
4013 /*
4014  * This function iterates the namespace list unlocked to allow recovery from
4015  * controller failure. It is up to the caller to ensure the namespace list is
4016  * not modified by scan work while this function is executing.
4017  */
4018 void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
4019 {
4020 	struct nvme_ns *ns, *next;
4021 	LIST_HEAD(ns_list);
4022 
4023 	/*
4024 	 * make sure to requeue I/O to all namespaces as these
4025 	 * might result from the scan itself and must complete
4026 	 * for the scan_work to make progress
4027 	 */
4028 	nvme_mpath_clear_ctrl_paths(ctrl);
4029 
4030 	/*
4031 	 * Unquiesce io queues so any pending IO won't hang, especially
4032 	 * those submitted from scan work
4033 	 */
4034 	nvme_unquiesce_io_queues(ctrl);
4035 
4036 	/* prevent racing with ns scanning */
4037 	flush_work(&ctrl->scan_work);
4038 
4039 	/*
4040 	 * The dead states indicates the controller was not gracefully
4041 	 * disconnected. In that case, we won't be able to flush any data while
4042 	 * removing the namespaces' disks; fail all the queues now to avoid
4043 	 * potentially having to clean up the failed sync later.
4044 	 */
4045 	if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD)
4046 		nvme_mark_namespaces_dead(ctrl);
4047 
4048 	/* this is a no-op when called from the controller reset handler */
4049 	nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO);
4050 
4051 	down_write(&ctrl->namespaces_rwsem);
4052 	list_splice_init(&ctrl->namespaces, &ns_list);
4053 	up_write(&ctrl->namespaces_rwsem);
4054 
4055 	list_for_each_entry_safe(ns, next, &ns_list, list)
4056 		nvme_ns_remove(ns);
4057 }
4058 EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
4059 
4060 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env)
4061 {
4062 	const struct nvme_ctrl *ctrl =
4063 		container_of(dev, struct nvme_ctrl, ctrl_device);
4064 	struct nvmf_ctrl_options *opts = ctrl->opts;
4065 	int ret;
4066 
4067 	ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name);
4068 	if (ret)
4069 		return ret;
4070 
4071 	if (opts) {
4072 		ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr);
4073 		if (ret)
4074 			return ret;
4075 
4076 		ret = add_uevent_var(env, "NVME_TRSVCID=%s",
4077 				opts->trsvcid ?: "none");
4078 		if (ret)
4079 			return ret;
4080 
4081 		ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s",
4082 				opts->host_traddr ?: "none");
4083 		if (ret)
4084 			return ret;
4085 
4086 		ret = add_uevent_var(env, "NVME_HOST_IFACE=%s",
4087 				opts->host_iface ?: "none");
4088 	}
4089 	return ret;
4090 }
4091 
4092 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata)
4093 {
4094 	char *envp[2] = { envdata, NULL };
4095 
4096 	kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4097 }
4098 
4099 static void nvme_aen_uevent(struct nvme_ctrl *ctrl)
4100 {
4101 	char *envp[2] = { NULL, NULL };
4102 	u32 aen_result = ctrl->aen_result;
4103 
4104 	ctrl->aen_result = 0;
4105 	if (!aen_result)
4106 		return;
4107 
4108 	envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result);
4109 	if (!envp[0])
4110 		return;
4111 	kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4112 	kfree(envp[0]);
4113 }
4114 
4115 static void nvme_async_event_work(struct work_struct *work)
4116 {
4117 	struct nvme_ctrl *ctrl =
4118 		container_of(work, struct nvme_ctrl, async_event_work);
4119 
4120 	nvme_aen_uevent(ctrl);
4121 
4122 	/*
4123 	 * The transport drivers must guarantee AER submission here is safe by
4124 	 * flushing ctrl async_event_work after changing the controller state
4125 	 * from LIVE and before freeing the admin queue.
4126 	*/
4127 	if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
4128 		ctrl->ops->submit_async_event(ctrl);
4129 }
4130 
4131 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
4132 {
4133 
4134 	u32 csts;
4135 
4136 	if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
4137 		return false;
4138 
4139 	if (csts == ~0)
4140 		return false;
4141 
4142 	return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
4143 }
4144 
4145 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
4146 {
4147 	struct nvme_fw_slot_info_log *log;
4148 
4149 	log = kmalloc(sizeof(*log), GFP_KERNEL);
4150 	if (!log)
4151 		return;
4152 
4153 	if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM,
4154 			 log, sizeof(*log), 0)) {
4155 		dev_warn(ctrl->device, "Get FW SLOT INFO log error\n");
4156 		goto out_free_log;
4157 	}
4158 
4159 	if (log->afi & 0x70 || !(log->afi & 0x7)) {
4160 		dev_info(ctrl->device,
4161 			 "Firmware is activated after next Controller Level Reset\n");
4162 		goto out_free_log;
4163 	}
4164 
4165 	memcpy(ctrl->subsys->firmware_rev, &log->frs[(log->afi & 0x7) - 1],
4166 		sizeof(ctrl->subsys->firmware_rev));
4167 
4168 out_free_log:
4169 	kfree(log);
4170 }
4171 
4172 static void nvme_fw_act_work(struct work_struct *work)
4173 {
4174 	struct nvme_ctrl *ctrl = container_of(work,
4175 				struct nvme_ctrl, fw_act_work);
4176 	unsigned long fw_act_timeout;
4177 
4178 	nvme_auth_stop(ctrl);
4179 
4180 	if (ctrl->mtfa)
4181 		fw_act_timeout = jiffies +
4182 				msecs_to_jiffies(ctrl->mtfa * 100);
4183 	else
4184 		fw_act_timeout = jiffies +
4185 				msecs_to_jiffies(admin_timeout * 1000);
4186 
4187 	nvme_quiesce_io_queues(ctrl);
4188 	while (nvme_ctrl_pp_status(ctrl)) {
4189 		if (time_after(jiffies, fw_act_timeout)) {
4190 			dev_warn(ctrl->device,
4191 				"Fw activation timeout, reset controller\n");
4192 			nvme_try_sched_reset(ctrl);
4193 			return;
4194 		}
4195 		msleep(100);
4196 	}
4197 
4198 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE))
4199 		return;
4200 
4201 	nvme_unquiesce_io_queues(ctrl);
4202 	/* read FW slot information to clear the AER */
4203 	nvme_get_fw_slot_info(ctrl);
4204 
4205 	queue_work(nvme_wq, &ctrl->async_event_work);
4206 }
4207 
4208 static u32 nvme_aer_type(u32 result)
4209 {
4210 	return result & 0x7;
4211 }
4212 
4213 static u32 nvme_aer_subtype(u32 result)
4214 {
4215 	return (result & 0xff00) >> 8;
4216 }
4217 
4218 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result)
4219 {
4220 	u32 aer_notice_type = nvme_aer_subtype(result);
4221 	bool requeue = true;
4222 
4223 	switch (aer_notice_type) {
4224 	case NVME_AER_NOTICE_NS_CHANGED:
4225 		set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events);
4226 		nvme_queue_scan(ctrl);
4227 		break;
4228 	case NVME_AER_NOTICE_FW_ACT_STARTING:
4229 		/*
4230 		 * We are (ab)using the RESETTING state to prevent subsequent
4231 		 * recovery actions from interfering with the controller's
4232 		 * firmware activation.
4233 		 */
4234 		if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) {
4235 			requeue = false;
4236 			queue_work(nvme_wq, &ctrl->fw_act_work);
4237 		}
4238 		break;
4239 #ifdef CONFIG_NVME_MULTIPATH
4240 	case NVME_AER_NOTICE_ANA:
4241 		if (!ctrl->ana_log_buf)
4242 			break;
4243 		queue_work(nvme_wq, &ctrl->ana_work);
4244 		break;
4245 #endif
4246 	case NVME_AER_NOTICE_DISC_CHANGED:
4247 		ctrl->aen_result = result;
4248 		break;
4249 	default:
4250 		dev_warn(ctrl->device, "async event result %08x\n", result);
4251 	}
4252 	return requeue;
4253 }
4254 
4255 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl)
4256 {
4257 	dev_warn(ctrl->device, "resetting controller due to AER\n");
4258 	nvme_reset_ctrl(ctrl);
4259 }
4260 
4261 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
4262 		volatile union nvme_result *res)
4263 {
4264 	u32 result = le32_to_cpu(res->u32);
4265 	u32 aer_type = nvme_aer_type(result);
4266 	u32 aer_subtype = nvme_aer_subtype(result);
4267 	bool requeue = true;
4268 
4269 	if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS)
4270 		return;
4271 
4272 	trace_nvme_async_event(ctrl, result);
4273 	switch (aer_type) {
4274 	case NVME_AER_NOTICE:
4275 		requeue = nvme_handle_aen_notice(ctrl, result);
4276 		break;
4277 	case NVME_AER_ERROR:
4278 		/*
4279 		 * For a persistent internal error, don't run async_event_work
4280 		 * to submit a new AER. The controller reset will do it.
4281 		 */
4282 		if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) {
4283 			nvme_handle_aer_persistent_error(ctrl);
4284 			return;
4285 		}
4286 		fallthrough;
4287 	case NVME_AER_SMART:
4288 	case NVME_AER_CSS:
4289 	case NVME_AER_VS:
4290 		ctrl->aen_result = result;
4291 		break;
4292 	default:
4293 		break;
4294 	}
4295 
4296 	if (requeue)
4297 		queue_work(nvme_wq, &ctrl->async_event_work);
4298 }
4299 EXPORT_SYMBOL_GPL(nvme_complete_async_event);
4300 
4301 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4302 		const struct blk_mq_ops *ops, unsigned int cmd_size)
4303 {
4304 	int ret;
4305 
4306 	memset(set, 0, sizeof(*set));
4307 	set->ops = ops;
4308 	set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
4309 	if (ctrl->ops->flags & NVME_F_FABRICS)
4310 		set->reserved_tags = NVMF_RESERVED_TAGS;
4311 	set->numa_node = ctrl->numa_node;
4312 	set->flags = BLK_MQ_F_NO_SCHED;
4313 	if (ctrl->ops->flags & NVME_F_BLOCKING)
4314 		set->flags |= BLK_MQ_F_BLOCKING;
4315 	set->cmd_size = cmd_size;
4316 	set->driver_data = ctrl;
4317 	set->nr_hw_queues = 1;
4318 	set->timeout = NVME_ADMIN_TIMEOUT;
4319 	ret = blk_mq_alloc_tag_set(set);
4320 	if (ret)
4321 		return ret;
4322 
4323 	ctrl->admin_q = blk_mq_init_queue(set);
4324 	if (IS_ERR(ctrl->admin_q)) {
4325 		ret = PTR_ERR(ctrl->admin_q);
4326 		goto out_free_tagset;
4327 	}
4328 
4329 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4330 		ctrl->fabrics_q = blk_mq_init_queue(set);
4331 		if (IS_ERR(ctrl->fabrics_q)) {
4332 			ret = PTR_ERR(ctrl->fabrics_q);
4333 			goto out_cleanup_admin_q;
4334 		}
4335 	}
4336 
4337 	ctrl->admin_tagset = set;
4338 	return 0;
4339 
4340 out_cleanup_admin_q:
4341 	blk_mq_destroy_queue(ctrl->admin_q);
4342 	blk_put_queue(ctrl->admin_q);
4343 out_free_tagset:
4344 	blk_mq_free_tag_set(set);
4345 	ctrl->admin_q = NULL;
4346 	ctrl->fabrics_q = NULL;
4347 	return ret;
4348 }
4349 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set);
4350 
4351 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl)
4352 {
4353 	blk_mq_destroy_queue(ctrl->admin_q);
4354 	blk_put_queue(ctrl->admin_q);
4355 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4356 		blk_mq_destroy_queue(ctrl->fabrics_q);
4357 		blk_put_queue(ctrl->fabrics_q);
4358 	}
4359 	blk_mq_free_tag_set(ctrl->admin_tagset);
4360 }
4361 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set);
4362 
4363 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4364 		const struct blk_mq_ops *ops, unsigned int nr_maps,
4365 		unsigned int cmd_size)
4366 {
4367 	int ret;
4368 
4369 	memset(set, 0, sizeof(*set));
4370 	set->ops = ops;
4371 	set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1);
4372 	/*
4373 	 * Some Apple controllers requires tags to be unique across admin and
4374 	 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue.
4375 	 */
4376 	if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS)
4377 		set->reserved_tags = NVME_AQ_DEPTH;
4378 	else if (ctrl->ops->flags & NVME_F_FABRICS)
4379 		set->reserved_tags = NVMF_RESERVED_TAGS;
4380 	set->numa_node = ctrl->numa_node;
4381 	set->flags = BLK_MQ_F_SHOULD_MERGE;
4382 	if (ctrl->ops->flags & NVME_F_BLOCKING)
4383 		set->flags |= BLK_MQ_F_BLOCKING;
4384 	set->cmd_size = cmd_size,
4385 	set->driver_data = ctrl;
4386 	set->nr_hw_queues = ctrl->queue_count - 1;
4387 	set->timeout = NVME_IO_TIMEOUT;
4388 	set->nr_maps = nr_maps;
4389 	ret = blk_mq_alloc_tag_set(set);
4390 	if (ret)
4391 		return ret;
4392 
4393 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4394 		ctrl->connect_q = blk_mq_init_queue(set);
4395         	if (IS_ERR(ctrl->connect_q)) {
4396 			ret = PTR_ERR(ctrl->connect_q);
4397 			goto out_free_tag_set;
4398 		}
4399 		blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE,
4400 				   ctrl->connect_q);
4401 	}
4402 
4403 	ctrl->tagset = set;
4404 	return 0;
4405 
4406 out_free_tag_set:
4407 	blk_mq_free_tag_set(set);
4408 	ctrl->connect_q = NULL;
4409 	return ret;
4410 }
4411 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set);
4412 
4413 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl)
4414 {
4415 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4416 		blk_mq_destroy_queue(ctrl->connect_q);
4417 		blk_put_queue(ctrl->connect_q);
4418 	}
4419 	blk_mq_free_tag_set(ctrl->tagset);
4420 }
4421 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set);
4422 
4423 void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
4424 {
4425 	nvme_mpath_stop(ctrl);
4426 	nvme_auth_stop(ctrl);
4427 	nvme_stop_keep_alive(ctrl);
4428 	nvme_stop_failfast_work(ctrl);
4429 	flush_work(&ctrl->async_event_work);
4430 	cancel_work_sync(&ctrl->fw_act_work);
4431 	if (ctrl->ops->stop_ctrl)
4432 		ctrl->ops->stop_ctrl(ctrl);
4433 }
4434 EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
4435 
4436 void nvme_start_ctrl(struct nvme_ctrl *ctrl)
4437 {
4438 	nvme_enable_aen(ctrl);
4439 
4440 	/*
4441 	 * persistent discovery controllers need to send indication to userspace
4442 	 * to re-read the discovery log page to learn about possible changes
4443 	 * that were missed. We identify persistent discovery controllers by
4444 	 * checking that they started once before, hence are reconnecting back.
4445 	 */
4446 	if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) &&
4447 	    nvme_discovery_ctrl(ctrl))
4448 		nvme_change_uevent(ctrl, "NVME_EVENT=rediscover");
4449 
4450 	if (ctrl->queue_count > 1) {
4451 		nvme_queue_scan(ctrl);
4452 		nvme_unquiesce_io_queues(ctrl);
4453 		nvme_mpath_update(ctrl);
4454 	}
4455 
4456 	nvme_change_uevent(ctrl, "NVME_EVENT=connected");
4457 	set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags);
4458 }
4459 EXPORT_SYMBOL_GPL(nvme_start_ctrl);
4460 
4461 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
4462 {
4463 	nvme_hwmon_exit(ctrl);
4464 	nvme_fault_inject_fini(&ctrl->fault_inject);
4465 	dev_pm_qos_hide_latency_tolerance(ctrl->device);
4466 	cdev_device_del(&ctrl->cdev, ctrl->device);
4467 	nvme_put_ctrl(ctrl);
4468 }
4469 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
4470 
4471 static void nvme_free_cels(struct nvme_ctrl *ctrl)
4472 {
4473 	struct nvme_effects_log	*cel;
4474 	unsigned long i;
4475 
4476 	xa_for_each(&ctrl->cels, i, cel) {
4477 		xa_erase(&ctrl->cels, i);
4478 		kfree(cel);
4479 	}
4480 
4481 	xa_destroy(&ctrl->cels);
4482 }
4483 
4484 static void nvme_free_ctrl(struct device *dev)
4485 {
4486 	struct nvme_ctrl *ctrl =
4487 		container_of(dev, struct nvme_ctrl, ctrl_device);
4488 	struct nvme_subsystem *subsys = ctrl->subsys;
4489 
4490 	if (!subsys || ctrl->instance != subsys->instance)
4491 		ida_free(&nvme_instance_ida, ctrl->instance);
4492 	key_put(ctrl->tls_key);
4493 	nvme_free_cels(ctrl);
4494 	nvme_mpath_uninit(ctrl);
4495 	nvme_auth_stop(ctrl);
4496 	nvme_auth_free(ctrl);
4497 	__free_page(ctrl->discard_page);
4498 	free_opal_dev(ctrl->opal_dev);
4499 
4500 	if (subsys) {
4501 		mutex_lock(&nvme_subsystems_lock);
4502 		list_del(&ctrl->subsys_entry);
4503 		sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device));
4504 		mutex_unlock(&nvme_subsystems_lock);
4505 	}
4506 
4507 	ctrl->ops->free_ctrl(ctrl);
4508 
4509 	if (subsys)
4510 		nvme_put_subsystem(subsys);
4511 }
4512 
4513 /*
4514  * Initialize a NVMe controller structures.  This needs to be called during
4515  * earliest initialization so that we have the initialized structured around
4516  * during probing.
4517  */
4518 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
4519 		const struct nvme_ctrl_ops *ops, unsigned long quirks)
4520 {
4521 	int ret;
4522 
4523 	WRITE_ONCE(ctrl->state, NVME_CTRL_NEW);
4524 	clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
4525 	spin_lock_init(&ctrl->lock);
4526 	mutex_init(&ctrl->scan_lock);
4527 	INIT_LIST_HEAD(&ctrl->namespaces);
4528 	xa_init(&ctrl->cels);
4529 	init_rwsem(&ctrl->namespaces_rwsem);
4530 	ctrl->dev = dev;
4531 	ctrl->ops = ops;
4532 	ctrl->quirks = quirks;
4533 	ctrl->numa_node = NUMA_NO_NODE;
4534 	INIT_WORK(&ctrl->scan_work, nvme_scan_work);
4535 	INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
4536 	INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
4537 	INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work);
4538 	init_waitqueue_head(&ctrl->state_wq);
4539 
4540 	INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
4541 	INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work);
4542 	memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd));
4543 	ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive;
4544 	ctrl->ka_last_check_time = jiffies;
4545 
4546 	BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) >
4547 			PAGE_SIZE);
4548 	ctrl->discard_page = alloc_page(GFP_KERNEL);
4549 	if (!ctrl->discard_page) {
4550 		ret = -ENOMEM;
4551 		goto out;
4552 	}
4553 
4554 	ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL);
4555 	if (ret < 0)
4556 		goto out;
4557 	ctrl->instance = ret;
4558 
4559 	device_initialize(&ctrl->ctrl_device);
4560 	ctrl->device = &ctrl->ctrl_device;
4561 	ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt),
4562 			ctrl->instance);
4563 	ctrl->device->class = nvme_class;
4564 	ctrl->device->parent = ctrl->dev;
4565 	if (ops->dev_attr_groups)
4566 		ctrl->device->groups = ops->dev_attr_groups;
4567 	else
4568 		ctrl->device->groups = nvme_dev_attr_groups;
4569 	ctrl->device->release = nvme_free_ctrl;
4570 	dev_set_drvdata(ctrl->device, ctrl);
4571 	ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance);
4572 	if (ret)
4573 		goto out_release_instance;
4574 
4575 	nvme_get_ctrl(ctrl);
4576 	cdev_init(&ctrl->cdev, &nvme_dev_fops);
4577 	ctrl->cdev.owner = ops->module;
4578 	ret = cdev_device_add(&ctrl->cdev, ctrl->device);
4579 	if (ret)
4580 		goto out_free_name;
4581 
4582 	/*
4583 	 * Initialize latency tolerance controls.  The sysfs files won't
4584 	 * be visible to userspace unless the device actually supports APST.
4585 	 */
4586 	ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
4587 	dev_pm_qos_update_user_latency_tolerance(ctrl->device,
4588 		min(default_ps_max_latency_us, (unsigned long)S32_MAX));
4589 
4590 	nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device));
4591 	nvme_mpath_init_ctrl(ctrl);
4592 	ret = nvme_auth_init_ctrl(ctrl);
4593 	if (ret)
4594 		goto out_free_cdev;
4595 
4596 	return 0;
4597 out_free_cdev:
4598 	nvme_fault_inject_fini(&ctrl->fault_inject);
4599 	dev_pm_qos_hide_latency_tolerance(ctrl->device);
4600 	cdev_device_del(&ctrl->cdev, ctrl->device);
4601 out_free_name:
4602 	nvme_put_ctrl(ctrl);
4603 	kfree_const(ctrl->device->kobj.name);
4604 out_release_instance:
4605 	ida_free(&nvme_instance_ida, ctrl->instance);
4606 out:
4607 	if (ctrl->discard_page)
4608 		__free_page(ctrl->discard_page);
4609 	return ret;
4610 }
4611 EXPORT_SYMBOL_GPL(nvme_init_ctrl);
4612 
4613 /* let I/O to all namespaces fail in preparation for surprise removal */
4614 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl)
4615 {
4616 	struct nvme_ns *ns;
4617 
4618 	down_read(&ctrl->namespaces_rwsem);
4619 	list_for_each_entry(ns, &ctrl->namespaces, list)
4620 		blk_mark_disk_dead(ns->disk);
4621 	up_read(&ctrl->namespaces_rwsem);
4622 }
4623 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead);
4624 
4625 void nvme_unfreeze(struct nvme_ctrl *ctrl)
4626 {
4627 	struct nvme_ns *ns;
4628 
4629 	down_read(&ctrl->namespaces_rwsem);
4630 	list_for_each_entry(ns, &ctrl->namespaces, list)
4631 		blk_mq_unfreeze_queue(ns->queue);
4632 	up_read(&ctrl->namespaces_rwsem);
4633 	clear_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4634 }
4635 EXPORT_SYMBOL_GPL(nvme_unfreeze);
4636 
4637 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
4638 {
4639 	struct nvme_ns *ns;
4640 
4641 	down_read(&ctrl->namespaces_rwsem);
4642 	list_for_each_entry(ns, &ctrl->namespaces, list) {
4643 		timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
4644 		if (timeout <= 0)
4645 			break;
4646 	}
4647 	up_read(&ctrl->namespaces_rwsem);
4648 	return timeout;
4649 }
4650 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
4651 
4652 void nvme_wait_freeze(struct nvme_ctrl *ctrl)
4653 {
4654 	struct nvme_ns *ns;
4655 
4656 	down_read(&ctrl->namespaces_rwsem);
4657 	list_for_each_entry(ns, &ctrl->namespaces, list)
4658 		blk_mq_freeze_queue_wait(ns->queue);
4659 	up_read(&ctrl->namespaces_rwsem);
4660 }
4661 EXPORT_SYMBOL_GPL(nvme_wait_freeze);
4662 
4663 void nvme_start_freeze(struct nvme_ctrl *ctrl)
4664 {
4665 	struct nvme_ns *ns;
4666 
4667 	set_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4668 	down_read(&ctrl->namespaces_rwsem);
4669 	list_for_each_entry(ns, &ctrl->namespaces, list)
4670 		blk_freeze_queue_start(ns->queue);
4671 	up_read(&ctrl->namespaces_rwsem);
4672 }
4673 EXPORT_SYMBOL_GPL(nvme_start_freeze);
4674 
4675 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl)
4676 {
4677 	if (!ctrl->tagset)
4678 		return;
4679 	if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags))
4680 		blk_mq_quiesce_tagset(ctrl->tagset);
4681 	else
4682 		blk_mq_wait_quiesce_done(ctrl->tagset);
4683 }
4684 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues);
4685 
4686 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl)
4687 {
4688 	if (!ctrl->tagset)
4689 		return;
4690 	if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags))
4691 		blk_mq_unquiesce_tagset(ctrl->tagset);
4692 }
4693 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues);
4694 
4695 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl)
4696 {
4697 	if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
4698 		blk_mq_quiesce_queue(ctrl->admin_q);
4699 	else
4700 		blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set);
4701 }
4702 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue);
4703 
4704 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl)
4705 {
4706 	if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
4707 		blk_mq_unquiesce_queue(ctrl->admin_q);
4708 }
4709 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue);
4710 
4711 void nvme_sync_io_queues(struct nvme_ctrl *ctrl)
4712 {
4713 	struct nvme_ns *ns;
4714 
4715 	down_read(&ctrl->namespaces_rwsem);
4716 	list_for_each_entry(ns, &ctrl->namespaces, list)
4717 		blk_sync_queue(ns->queue);
4718 	up_read(&ctrl->namespaces_rwsem);
4719 }
4720 EXPORT_SYMBOL_GPL(nvme_sync_io_queues);
4721 
4722 void nvme_sync_queues(struct nvme_ctrl *ctrl)
4723 {
4724 	nvme_sync_io_queues(ctrl);
4725 	if (ctrl->admin_q)
4726 		blk_sync_queue(ctrl->admin_q);
4727 }
4728 EXPORT_SYMBOL_GPL(nvme_sync_queues);
4729 
4730 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file)
4731 {
4732 	if (file->f_op != &nvme_dev_fops)
4733 		return NULL;
4734 	return file->private_data;
4735 }
4736 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU);
4737 
4738 /*
4739  * Check we didn't inadvertently grow the command structure sizes:
4740  */
4741 static inline void _nvme_check_size(void)
4742 {
4743 	BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64);
4744 	BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
4745 	BUILD_BUG_ON(sizeof(struct nvme_identify) != 64);
4746 	BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
4747 	BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64);
4748 	BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
4749 	BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64);
4750 	BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64);
4751 	BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
4752 	BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64);
4753 	BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
4754 	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE);
4755 	BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE);
4756 	BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) !=
4757 			NVME_IDENTIFY_DATA_SIZE);
4758 	BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE);
4759 	BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE);
4760 	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE);
4761 	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE);
4762 	BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
4763 	BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
4764 	BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64);
4765 	BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64);
4766 	BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512);
4767 }
4768 
4769 
4770 static int __init nvme_core_init(void)
4771 {
4772 	int result = -ENOMEM;
4773 
4774 	_nvme_check_size();
4775 
4776 	nvme_wq = alloc_workqueue("nvme-wq",
4777 			WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4778 	if (!nvme_wq)
4779 		goto out;
4780 
4781 	nvme_reset_wq = alloc_workqueue("nvme-reset-wq",
4782 			WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4783 	if (!nvme_reset_wq)
4784 		goto destroy_wq;
4785 
4786 	nvme_delete_wq = alloc_workqueue("nvme-delete-wq",
4787 			WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4788 	if (!nvme_delete_wq)
4789 		goto destroy_reset_wq;
4790 
4791 	result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0,
4792 			NVME_MINORS, "nvme");
4793 	if (result < 0)
4794 		goto destroy_delete_wq;
4795 
4796 	nvme_class = class_create("nvme");
4797 	if (IS_ERR(nvme_class)) {
4798 		result = PTR_ERR(nvme_class);
4799 		goto unregister_chrdev;
4800 	}
4801 	nvme_class->dev_uevent = nvme_class_uevent;
4802 
4803 	nvme_subsys_class = class_create("nvme-subsystem");
4804 	if (IS_ERR(nvme_subsys_class)) {
4805 		result = PTR_ERR(nvme_subsys_class);
4806 		goto destroy_class;
4807 	}
4808 
4809 	result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS,
4810 				     "nvme-generic");
4811 	if (result < 0)
4812 		goto destroy_subsys_class;
4813 
4814 	nvme_ns_chr_class = class_create("nvme-generic");
4815 	if (IS_ERR(nvme_ns_chr_class)) {
4816 		result = PTR_ERR(nvme_ns_chr_class);
4817 		goto unregister_generic_ns;
4818 	}
4819 	result = nvme_init_auth();
4820 	if (result)
4821 		goto destroy_ns_chr;
4822 	return 0;
4823 
4824 destroy_ns_chr:
4825 	class_destroy(nvme_ns_chr_class);
4826 unregister_generic_ns:
4827 	unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
4828 destroy_subsys_class:
4829 	class_destroy(nvme_subsys_class);
4830 destroy_class:
4831 	class_destroy(nvme_class);
4832 unregister_chrdev:
4833 	unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
4834 destroy_delete_wq:
4835 	destroy_workqueue(nvme_delete_wq);
4836 destroy_reset_wq:
4837 	destroy_workqueue(nvme_reset_wq);
4838 destroy_wq:
4839 	destroy_workqueue(nvme_wq);
4840 out:
4841 	return result;
4842 }
4843 
4844 static void __exit nvme_core_exit(void)
4845 {
4846 	nvme_exit_auth();
4847 	class_destroy(nvme_ns_chr_class);
4848 	class_destroy(nvme_subsys_class);
4849 	class_destroy(nvme_class);
4850 	unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
4851 	unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
4852 	destroy_workqueue(nvme_delete_wq);
4853 	destroy_workqueue(nvme_reset_wq);
4854 	destroy_workqueue(nvme_wq);
4855 	ida_destroy(&nvme_ns_chr_minor_ida);
4856 	ida_destroy(&nvme_instance_ida);
4857 }
4858 
4859 MODULE_LICENSE("GPL");
4860 MODULE_VERSION("1.0");
4861 MODULE_DESCRIPTION("NVMe host core framework");
4862 module_init(nvme_core_init);
4863 module_exit(nvme_core_exit);
4864