1*13e920d9SHaijun Liu /* SPDX-License-Identifier: GPL-2.0-only 2*13e920d9SHaijun Liu * 3*13e920d9SHaijun Liu * Copyright (c) 2021, MediaTek Inc. 4*13e920d9SHaijun Liu * Copyright (c) 2021-2022, Intel Corporation. 5*13e920d9SHaijun Liu * 6*13e920d9SHaijun Liu * Authors: 7*13e920d9SHaijun Liu * Haijun Liu <haijun.liu@mediatek.com> 8*13e920d9SHaijun Liu * Eliot Lee <eliot.lee@intel.com> 9*13e920d9SHaijun Liu * Moises Veleta <moises.veleta@intel.com> 10*13e920d9SHaijun Liu * Ricardo Martinez <ricardo.martinez@linux.intel.com> 11*13e920d9SHaijun Liu * 12*13e920d9SHaijun Liu * Contributors: 13*13e920d9SHaijun Liu * Amir Hanania <amir.hanania@intel.com> 14*13e920d9SHaijun Liu * Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com> 15*13e920d9SHaijun Liu * Sreehari Kancharla <sreehari.kancharla@intel.com> 16*13e920d9SHaijun Liu */ 17*13e920d9SHaijun Liu 18*13e920d9SHaijun Liu #ifndef __T7XX_MODEM_OPS_H__ 19*13e920d9SHaijun Liu #define __T7XX_MODEM_OPS_H__ 20*13e920d9SHaijun Liu 21*13e920d9SHaijun Liu #include <linux/spinlock.h> 22*13e920d9SHaijun Liu #include <linux/types.h> 23*13e920d9SHaijun Liu #include <linux/workqueue.h> 24*13e920d9SHaijun Liu 25*13e920d9SHaijun Liu #include "t7xx_hif_cldma.h" 26*13e920d9SHaijun Liu #include "t7xx_pci.h" 27*13e920d9SHaijun Liu 28*13e920d9SHaijun Liu #define FEATURE_COUNT 64 29*13e920d9SHaijun Liu 30*13e920d9SHaijun Liu /** 31*13e920d9SHaijun Liu * enum hif_ex_stage - HIF exception handshake stages with the HW. 32*13e920d9SHaijun Liu * @HIF_EX_INIT: Disable and clear TXQ. 33*13e920d9SHaijun Liu * @HIF_EX_INIT_DONE: Polling for initialization to be done. 34*13e920d9SHaijun Liu * @HIF_EX_CLEARQ_DONE: Disable RX, flush TX/RX workqueues and clear RX. 35*13e920d9SHaijun Liu * @HIF_EX_ALLQ_RESET: HW is back in safe mode for re-initialization and restart. 36*13e920d9SHaijun Liu */ 37*13e920d9SHaijun Liu enum hif_ex_stage { 38*13e920d9SHaijun Liu HIF_EX_INIT, 39*13e920d9SHaijun Liu HIF_EX_INIT_DONE, 40*13e920d9SHaijun Liu HIF_EX_CLEARQ_DONE, 41*13e920d9SHaijun Liu HIF_EX_ALLQ_RESET, 42*13e920d9SHaijun Liu }; 43*13e920d9SHaijun Liu 44*13e920d9SHaijun Liu struct mtk_runtime_feature { 45*13e920d9SHaijun Liu u8 feature_id; 46*13e920d9SHaijun Liu u8 support_info; 47*13e920d9SHaijun Liu u8 reserved[2]; 48*13e920d9SHaijun Liu __le32 data_len; 49*13e920d9SHaijun Liu __le32 data[]; 50*13e920d9SHaijun Liu }; 51*13e920d9SHaijun Liu 52*13e920d9SHaijun Liu enum md_event_id { 53*13e920d9SHaijun Liu FSM_PRE_START, 54*13e920d9SHaijun Liu FSM_START, 55*13e920d9SHaijun Liu FSM_READY, 56*13e920d9SHaijun Liu }; 57*13e920d9SHaijun Liu 58*13e920d9SHaijun Liu struct t7xx_sys_info { 59*13e920d9SHaijun Liu bool ready; 60*13e920d9SHaijun Liu }; 61*13e920d9SHaijun Liu 62*13e920d9SHaijun Liu struct t7xx_modem { 63*13e920d9SHaijun Liu struct cldma_ctrl *md_ctrl[CLDMA_NUM]; 64*13e920d9SHaijun Liu struct t7xx_pci_dev *t7xx_dev; 65*13e920d9SHaijun Liu struct t7xx_sys_info core_md; 66*13e920d9SHaijun Liu bool md_init_finish; 67*13e920d9SHaijun Liu bool rgu_irq_asserted; 68*13e920d9SHaijun Liu struct workqueue_struct *handshake_wq; 69*13e920d9SHaijun Liu struct work_struct handshake_work; 70*13e920d9SHaijun Liu struct t7xx_fsm_ctl *fsm_ctl; 71*13e920d9SHaijun Liu struct port_proxy *port_prox; 72*13e920d9SHaijun Liu unsigned int exp_id; 73*13e920d9SHaijun Liu spinlock_t exp_lock; /* Protects exception events */ 74*13e920d9SHaijun Liu }; 75*13e920d9SHaijun Liu 76*13e920d9SHaijun Liu void t7xx_md_exception_handshake(struct t7xx_modem *md); 77*13e920d9SHaijun Liu void t7xx_md_event_notify(struct t7xx_modem *md, enum md_event_id evt_id); 78*13e920d9SHaijun Liu int t7xx_md_reset(struct t7xx_pci_dev *t7xx_dev); 79*13e920d9SHaijun Liu int t7xx_md_init(struct t7xx_pci_dev *t7xx_dev); 80*13e920d9SHaijun Liu void t7xx_md_exit(struct t7xx_pci_dev *t7xx_dev); 81*13e920d9SHaijun Liu void t7xx_clear_rgu_irq(struct t7xx_pci_dev *t7xx_dev); 82*13e920d9SHaijun Liu int t7xx_acpi_fldr_func(struct t7xx_pci_dev *t7xx_dev); 83*13e920d9SHaijun Liu int t7xx_pci_mhccif_isr(struct t7xx_pci_dev *t7xx_dev); 84*13e920d9SHaijun Liu 85*13e920d9SHaijun Liu #endif /* __T7XX_MODEM_OPS_H__ */ 86