1 /* SPDX-License-Identifier: GPL-2.0-only 2 * 3 * Copyright (C) 2020-21 Intel Corporation. 4 */ 5 6 #ifndef IOSM_IPC_IMEM_H 7 #define IOSM_IPC_IMEM_H 8 9 #include <linux/skbuff.h> 10 #include <stdbool.h> 11 12 #include "iosm_ipc_mmio.h" 13 #include "iosm_ipc_pcie.h" 14 #include "iosm_ipc_uevent.h" 15 #include "iosm_ipc_wwan.h" 16 #include "iosm_ipc_task_queue.h" 17 18 struct ipc_chnl_cfg; 19 20 /* IRQ moderation in usec */ 21 #define IRQ_MOD_OFF 0 22 #define IRQ_MOD_NET 1000 23 #define IRQ_MOD_TRC 4000 24 25 /* Either the PSI image is accepted by CP or the suspended flash tool is waken, 26 * informed that the CP ROM driver is not ready to process the PSI image. 27 * unit : milliseconds 28 */ 29 #define IPC_PSI_TRANSFER_TIMEOUT 3000 30 31 /* Timeout in 20 msec to wait for the modem to boot up to 32 * IPC_MEM_DEVICE_IPC_INIT state. 33 * unit : milliseconds (500 * ipc_util_msleep(20)) 34 */ 35 #define IPC_MODEM_BOOT_TIMEOUT 500 36 37 /* Wait timeout for ipc status reflects IPC_MEM_DEVICE_IPC_UNINIT 38 * unit : milliseconds 39 */ 40 #define IPC_MODEM_UNINIT_TIMEOUT_MS 30 41 42 /* Pending time for processing data. 43 * unit : milliseconds 44 */ 45 #define IPC_PEND_DATA_TIMEOUT 500 46 47 /* The timeout in milliseconds for application to wait for remote time. */ 48 #define IPC_REMOTE_TS_TIMEOUT_MS 10 49 50 /* Timeout for TD allocation retry. 51 * unit : milliseconds 52 */ 53 #define IPC_TD_ALLOC_TIMER_PERIOD_MS 100 54 55 /* Host sleep target is host */ 56 #define IPC_HOST_SLEEP_HOST 0 57 58 /* Host sleep target is device */ 59 #define IPC_HOST_SLEEP_DEVICE 1 60 61 /* Sleep message, target host: AP enters sleep / target device: CP is 62 * allowed to enter sleep and shall use the host sleep protocol 63 */ 64 #define IPC_HOST_SLEEP_ENTER_SLEEP 0 65 66 /* Sleep_message, target host: AP exits sleep / target device: CP is 67 * NOT allowed to enter sleep 68 */ 69 #define IPC_HOST_SLEEP_EXIT_SLEEP 1 70 71 #define IMEM_IRQ_DONT_CARE (-1) 72 73 #define IPC_MEM_MAX_CHANNELS 7 74 75 #define IPC_MEM_MUX_IP_SESSION_ENTRIES 8 76 77 #define IPC_MEM_MUX_IP_CH_IF_ID 0 78 79 #define TD_UPDATE_DEFAULT_TIMEOUT_USEC 1900 80 81 #define FORCE_UPDATE_DEFAULT_TIMEOUT_USEC 500 82 83 /* Sleep_message, target host: not applicable / target device: CP is 84 * allowed to enter sleep and shall NOT use the device sleep protocol 85 */ 86 #define IPC_HOST_SLEEP_ENTER_SLEEP_NO_PROTOCOL 2 87 88 /* in_band_crash_signal IPC_MEM_INBAND_CRASH_SIG 89 * Modem crash notification configuration. If this value is non-zero then 90 * FEATURE_SET message will be sent to the Modem as a result the Modem will 91 * signal Crash via Execution Stage register. If this value is zero then Modem 92 * will use out-of-band method to notify about it's Crash. 93 */ 94 #define IPC_MEM_INBAND_CRASH_SIG 1 95 96 /* Extra headroom to be allocated for DL SKBs to allow addition of Ethernet 97 * header 98 */ 99 #define IPC_MEM_DL_ETH_OFFSET 16 100 101 #define IPC_CB(skb) ((struct ipc_skb_cb *)((skb)->cb)) 102 103 #define FULLY_FUNCTIONAL 0 104 105 /* List of the supported UL/DL pipes. */ 106 enum ipc_mem_pipes { 107 IPC_MEM_PIPE_0 = 0, 108 IPC_MEM_PIPE_1, 109 IPC_MEM_PIPE_2, 110 IPC_MEM_PIPE_3, 111 IPC_MEM_PIPE_4, 112 IPC_MEM_PIPE_5, 113 IPC_MEM_PIPE_6, 114 IPC_MEM_PIPE_7, 115 IPC_MEM_PIPE_8, 116 IPC_MEM_PIPE_9, 117 IPC_MEM_PIPE_10, 118 IPC_MEM_PIPE_11, 119 IPC_MEM_PIPE_12, 120 IPC_MEM_PIPE_13, 121 IPC_MEM_PIPE_14, 122 IPC_MEM_PIPE_15, 123 IPC_MEM_PIPE_16, 124 IPC_MEM_PIPE_17, 125 IPC_MEM_PIPE_18, 126 IPC_MEM_PIPE_19, 127 IPC_MEM_PIPE_20, 128 IPC_MEM_PIPE_21, 129 IPC_MEM_PIPE_22, 130 IPC_MEM_PIPE_23, 131 IPC_MEM_MAX_PIPES 132 }; 133 134 /* Enum defining channel states. */ 135 enum ipc_channel_state { 136 IMEM_CHANNEL_FREE, 137 IMEM_CHANNEL_RESERVED, 138 IMEM_CHANNEL_ACTIVE, 139 IMEM_CHANNEL_CLOSING, 140 }; 141 142 /* Time Unit */ 143 enum ipc_time_unit { 144 IPC_SEC = 0, 145 IPC_MILLI_SEC = 1, 146 IPC_MICRO_SEC = 2, 147 IPC_NANO_SEC = 3, 148 IPC_PICO_SEC = 4, 149 IPC_FEMTO_SEC = 5, 150 IPC_ATTO_SEC = 6, 151 }; 152 153 /** 154 * enum ipc_ctype - Enum defining supported channel type needed for control 155 * /IP traffic. 156 * @IPC_CTYPE_WWAN: Used for IP traffic 157 * @IPC_CTYPE_CTRL: Used for Control Communication 158 */ 159 enum ipc_ctype { 160 IPC_CTYPE_WWAN, 161 IPC_CTYPE_CTRL, 162 }; 163 164 /* Pipe direction. */ 165 enum ipc_mem_pipe_dir { 166 IPC_MEM_DIR_UL, 167 IPC_MEM_DIR_DL, 168 }; 169 170 /* HP update identifier. To be used as data for ipc_cp_irq_hpda_update() */ 171 enum ipc_hp_identifier { 172 IPC_HP_MR = 0, 173 IPC_HP_PM_TRIGGER, 174 IPC_HP_WAKEUP_SPEC_TMR, 175 IPC_HP_TD_UPD_TMR_START, 176 IPC_HP_TD_UPD_TMR, 177 IPC_HP_FAST_TD_UPD_TMR, 178 IPC_HP_UL_WRITE_TD, 179 IPC_HP_DL_PROCESS, 180 IPC_HP_NET_CHANNEL_INIT, 181 IPC_HP_CDEV_OPEN, 182 }; 183 184 /** 185 * struct ipc_pipe - Structure for Pipe. 186 * @tdr_start: Ipc private protocol Transfer Descriptor Ring 187 * @channel: Id of the sio device, set by imem_sio_open, 188 * needed to pass DL char to the user terminal 189 * @skbr_start: Circular buffer for skbuf and the buffer 190 * reference in a tdr_start entry. 191 * @phy_tdr_start: Transfer descriptor start address 192 * @old_head: last head pointer reported to CP. 193 * @old_tail: AP read position before CP moves the read 194 * position to write/head. If CP has consumed the 195 * buffers, AP has to freed the skbuf starting at 196 * tdr_start[old_tail]. 197 * @nr_of_entries: Number of elements of skb_start and tdr_start. 198 * @max_nr_of_queued_entries: Maximum number of queued entries in TDR 199 * @accumulation_backoff: Accumulation in usec for accumulation 200 * backoff (0 = no acc backoff) 201 * @irq_moderation: timer in usec for irq_moderation 202 * (0=no irq moderation) 203 * @pipe_nr: Pipe identification number 204 * @irq: Interrupt vector 205 * @dir: Direction of data stream in pipe 206 * @td_tag: Unique tag of the buffer queued 207 * @buf_size: Buffer size (in bytes) for preallocated 208 * buffers (for DL pipes) 209 * @nr_of_queued_entries: Aueued number of entries 210 * @is_open: Check for open pipe status 211 */ 212 struct ipc_pipe { 213 struct ipc_protocol_td *tdr_start; 214 struct ipc_mem_channel *channel; 215 struct sk_buff **skbr_start; 216 dma_addr_t phy_tdr_start; 217 u32 old_head; 218 u32 old_tail; 219 u32 nr_of_entries; 220 u32 max_nr_of_queued_entries; 221 u32 accumulation_backoff; 222 u32 irq_moderation; 223 u32 pipe_nr; 224 u32 irq; 225 enum ipc_mem_pipe_dir dir; 226 u32 td_tag; 227 u32 buf_size; 228 u16 nr_of_queued_entries; 229 u8 is_open:1; 230 }; 231 232 /** 233 * struct ipc_mem_channel - Structure for Channel. 234 * @channel_id: Instance of the channel list and is return to the user 235 * at the end of the open operation. 236 * @ctype: Control or netif channel. 237 * @index: unique index per ctype 238 * @ul_pipe: pipe objects 239 * @dl_pipe: pipe objects 240 * @if_id: Interface ID 241 * @net_err_count: Number of downlink errors returned by ipc_wwan_receive 242 * interface at the entry point of the IP stack. 243 * @state: Free, reserved or busy (in use). 244 * @ul_sem: Needed for the blocking write or uplink transfer. 245 * @ul_list: Uplink accumulator which is filled by the uplink 246 * char app or IP stack. The socket buffer pointer are 247 * added to the descriptor list in the kthread context. 248 */ 249 struct ipc_mem_channel { 250 int channel_id; 251 enum ipc_ctype ctype; 252 int index; 253 struct ipc_pipe ul_pipe; 254 struct ipc_pipe dl_pipe; 255 int if_id; 256 u32 net_err_count; 257 enum ipc_channel_state state; 258 struct completion ul_sem; 259 struct sk_buff_head ul_list; 260 }; 261 262 /** 263 * enum ipc_phase - Different AP and CP phases. 264 * The enums defined after "IPC_P_ROM" and before 265 * "IPC_P_RUN" indicates the operating state where CP can 266 * respond to any requests. So while introducing new phase 267 * this shall be taken into consideration. 268 * @IPC_P_OFF: On host PC, the PCIe device link settings are known 269 * about the combined power on. PC is running, the driver 270 * is loaded and CP is in power off mode. The PCIe bus 271 * driver call the device power mode D3hot. In this phase 272 * the driver the polls the device, until the device is in 273 * the power on state and signals the power mode D0. 274 * @IPC_P_OFF_REQ: The intermediate phase between cleanup activity starts 275 * and ends. 276 * @IPC_P_CRASH: The phase indicating CP crash 277 * @IPC_P_CD_READY: The phase indicating CP core dump is ready 278 * @IPC_P_ROM: After power on, CP starts in ROM mode and the IPC ROM 279 * driver is waiting 150 ms for the AP active notification 280 * saved in the PCI link status register. 281 * @IPC_P_PSI: Primary signed image download phase 282 * @IPC_P_EBL: Extended bootloader pahse 283 * @IPC_P_RUN: The phase after flashing to RAM is the RUNTIME phase. 284 */ 285 enum ipc_phase { 286 IPC_P_OFF, 287 IPC_P_OFF_REQ, 288 IPC_P_CRASH, 289 IPC_P_CD_READY, 290 IPC_P_ROM, 291 IPC_P_PSI, 292 IPC_P_EBL, 293 IPC_P_RUN, 294 }; 295 296 /** 297 * struct iosm_imem - Current state of the IPC shared memory. 298 * @mmio: mmio instance to access CP MMIO area / 299 * doorbell scratchpad. 300 * @ipc_protocol: IPC Protocol instance 301 * @ipc_task: Task for entry into ipc task queue 302 * @wwan: WWAN device pointer 303 * @mux: IP Data multiplexing state. 304 * @sio: IPC SIO data structure pointer 305 * @ipc_port: IPC PORT data structure pointer 306 * @pcie: IPC PCIe 307 * @dev: Pointer to device structure 308 * @flash_channel_id: Reserved channel id for flashing to RAM. 309 * @ipc_requested_state: Expected IPC state on CP. 310 * @channels: Channel list with UL/DL pipe pairs. 311 * @ipc_status: local ipc_status 312 * @nr_of_channels: number of configured channels 313 * @startup_timer: startup timer for NAND support. 314 * @hrtimer_period: Hr timer period 315 * @tdupdate_timer: Delay the TD update doorbell. 316 * @fast_update_timer: forced head pointer update delay timer. 317 * @td_alloc_timer: Timer for DL pipe TD allocation retry 318 * @rom_exit_code: Mapped boot rom exit code. 319 * @enter_runtime: 1 means the transition to runtime phase was 320 * executed. 321 * @ul_pend_sem: Semaphore to wait/complete of UL TDs 322 * before closing pipe. 323 * @app_notify_ul_pend: Signal app if UL TD is pending 324 * @dl_pend_sem: Semaphore to wait/complete of DL TDs 325 * before closing pipe. 326 * @app_notify_dl_pend: Signal app if DL TD is pending 327 * @phase: Operating phase like runtime. 328 * @pci_device_id: Device ID 329 * @cp_version: CP version 330 * @device_sleep: Device sleep state 331 * @run_state_worker: Pointer to worker component for device 332 * setup operations to be called when modem 333 * reaches RUN state 334 * @ev_irq_pending: 0 means inform the IPC tasklet to 335 * process the irq actions. 336 * @flag: Flag to monitor the state of driver 337 * @td_update_timer_suspended: if true then td update timer suspend 338 * @ev_cdev_write_pending: 0 means inform the IPC tasklet to pass 339 * the accumulated uplink buffers to CP. 340 * @ev_mux_net_transmit_pending:0 means inform the IPC tasklet to pass 341 * @reset_det_n: Reset detect flag 342 * @pcie_wake_n: Pcie wake flag 343 */ 344 struct iosm_imem { 345 struct iosm_mmio *mmio; 346 struct iosm_protocol *ipc_protocol; 347 struct ipc_task *ipc_task; 348 struct iosm_wwan *wwan; 349 struct iosm_mux *mux; 350 struct iosm_cdev *ipc_port[IPC_MEM_MAX_CHANNELS]; 351 struct iosm_pcie *pcie; 352 struct device *dev; 353 int flash_channel_id; 354 enum ipc_mem_device_ipc_state ipc_requested_state; 355 struct ipc_mem_channel channels[IPC_MEM_MAX_CHANNELS]; 356 u32 ipc_status; 357 u32 nr_of_channels; 358 struct hrtimer startup_timer; 359 ktime_t hrtimer_period; 360 struct hrtimer tdupdate_timer; 361 struct hrtimer fast_update_timer; 362 struct hrtimer td_alloc_timer; 363 enum rom_exit_code rom_exit_code; 364 u32 enter_runtime; 365 struct completion ul_pend_sem; 366 u32 app_notify_ul_pend; 367 struct completion dl_pend_sem; 368 u32 app_notify_dl_pend; 369 enum ipc_phase phase; 370 u16 pci_device_id; 371 int cp_version; 372 int device_sleep; 373 struct work_struct run_state_worker; 374 u8 ev_irq_pending[IPC_IRQ_VECTORS]; 375 unsigned long flag; 376 u8 td_update_timer_suspended:1, 377 ev_cdev_write_pending:1, 378 ev_mux_net_transmit_pending:1, 379 reset_det_n:1, 380 pcie_wake_n:1; 381 }; 382 383 /** 384 * ipc_imem_init - Initialize the shared memory region 385 * @pcie: Pointer to core driver data-struct 386 * @device_id: PCI device ID 387 * @mmio: Pointer to the mmio area 388 * @dev: Pointer to device structure 389 * 390 * Returns: Initialized imem pointer on success else NULL 391 */ 392 struct iosm_imem *ipc_imem_init(struct iosm_pcie *pcie, unsigned int device_id, 393 void __iomem *mmio, struct device *dev); 394 395 /** 396 * ipc_imem_pm_s2idle_sleep - Set PM variables to sleep/active for 397 * s2idle sleep/active 398 * @ipc_imem: Pointer to imem data-struct 399 * @sleep: Set PM Variable to sleep/active 400 */ 401 void ipc_imem_pm_s2idle_sleep(struct iosm_imem *ipc_imem, bool sleep); 402 403 /** 404 * ipc_imem_pm_suspend - The HAL shall ask the shared memory layer 405 * whether D3 is allowed. 406 * @ipc_imem: Pointer to imem data-struct 407 */ 408 void ipc_imem_pm_suspend(struct iosm_imem *ipc_imem); 409 410 /** 411 * ipc_imem_pm_resume - The HAL shall inform the shared memory layer 412 * that the device is active. 413 * @ipc_imem: Pointer to imem data-struct 414 */ 415 void ipc_imem_pm_resume(struct iosm_imem *ipc_imem); 416 417 /** 418 * ipc_imem_cleanup - Inform CP and free the shared memory resources. 419 * @ipc_imem: Pointer to imem data-struct 420 */ 421 void ipc_imem_cleanup(struct iosm_imem *ipc_imem); 422 423 /** 424 * ipc_imem_irq_process - Shift the IRQ actions to the IPC thread. 425 * @ipc_imem: Pointer to imem data-struct 426 * @irq: Irq number 427 */ 428 void ipc_imem_irq_process(struct iosm_imem *ipc_imem, int irq); 429 430 /** 431 * imem_get_device_sleep_state - Get the device sleep state value. 432 * @ipc_imem: Pointer to imem instance 433 * 434 * Returns: device sleep state 435 */ 436 int imem_get_device_sleep_state(struct iosm_imem *ipc_imem); 437 438 /** 439 * ipc_imem_td_update_timer_suspend - Updates the TD Update Timer suspend flag. 440 * @ipc_imem: Pointer to imem data-struct 441 * @suspend: Flag to update. If TRUE then HP update doorbell is triggered to 442 * device without any wait. If FALSE then HP update doorbell is 443 * delayed until timeout. 444 */ 445 void ipc_imem_td_update_timer_suspend(struct iosm_imem *ipc_imem, bool suspend); 446 447 /** 448 * ipc_imem_channel_close - Release the channel resources. 449 * @ipc_imem: Pointer to imem data-struct 450 * @channel_id: Channel ID to be cleaned up. 451 */ 452 void ipc_imem_channel_close(struct iosm_imem *ipc_imem, int channel_id); 453 454 /** 455 * ipc_imem_channel_alloc - Reserves a channel 456 * @ipc_imem: Pointer to imem data-struct 457 * @index: ID to lookup from the preallocated list. 458 * @ctype: Channel type. 459 * 460 * Returns: Index on success and failure value on error 461 */ 462 int ipc_imem_channel_alloc(struct iosm_imem *ipc_imem, int index, 463 enum ipc_ctype ctype); 464 465 /** 466 * ipc_imem_channel_open - Establish the pipes. 467 * @ipc_imem: Pointer to imem data-struct 468 * @channel_id: Channel ID returned during alloc. 469 * @db_id: Doorbell ID for trigger identifier. 470 * 471 * Returns: Pointer of ipc_mem_channel on success and NULL on failure. 472 */ 473 struct ipc_mem_channel *ipc_imem_channel_open(struct iosm_imem *ipc_imem, 474 int channel_id, u32 db_id); 475 476 /** 477 * ipc_imem_td_update_timer_start - Starts the TD Update Timer if not running. 478 * @ipc_imem: Pointer to imem data-struct 479 */ 480 void ipc_imem_td_update_timer_start(struct iosm_imem *ipc_imem); 481 482 /** 483 * ipc_imem_ul_write_td - Pass the channel UL list to protocol layer for TD 484 * preparation and sending them to the device. 485 * @ipc_imem: Pointer to imem data-struct 486 * 487 * Returns: TRUE of HP Doorbell trigger is pending. FALSE otherwise. 488 */ 489 bool ipc_imem_ul_write_td(struct iosm_imem *ipc_imem); 490 491 /** 492 * ipc_imem_ul_send - Dequeue SKB from channel list and start with 493 * the uplink transfer.If HP Doorbell is pending to be 494 * triggered then starts the TD Update Timer. 495 * @ipc_imem: Pointer to imem data-struct 496 */ 497 void ipc_imem_ul_send(struct iosm_imem *ipc_imem); 498 499 /** 500 * ipc_imem_channel_update - Set or modify pipe config of an existing channel 501 * @ipc_imem: Pointer to imem data-struct 502 * @id: Channel config index 503 * @chnl_cfg: Channel config struct 504 * @irq_moderation: Timer in usec for irq_moderation 505 */ 506 void ipc_imem_channel_update(struct iosm_imem *ipc_imem, int id, 507 struct ipc_chnl_cfg chnl_cfg, u32 irq_moderation); 508 509 /** 510 * ipc_imem_channel_free -Free an IPC channel. 511 * @channel: Channel to be freed 512 */ 513 void ipc_imem_channel_free(struct ipc_mem_channel *channel); 514 515 /** 516 * ipc_imem_hrtimer_stop - Stop the hrtimer 517 * @hr_timer: Pointer to hrtimer instance 518 */ 519 void ipc_imem_hrtimer_stop(struct hrtimer *hr_timer); 520 521 /** 522 * ipc_imem_pipe_cleanup - Reset volatile pipe content for all channels 523 * @ipc_imem: Pointer to imem data-struct 524 * @pipe: Pipe to cleaned up 525 */ 526 void ipc_imem_pipe_cleanup(struct iosm_imem *ipc_imem, struct ipc_pipe *pipe); 527 528 /** 529 * ipc_imem_pipe_close - Send msg to device to close pipe 530 * @ipc_imem: Pointer to imem data-struct 531 * @pipe: Pipe to be closed 532 */ 533 void ipc_imem_pipe_close(struct iosm_imem *ipc_imem, struct ipc_pipe *pipe); 534 535 /** 536 * ipc_imem_phase_update - Get the CP execution state 537 * and map it to the AP phase. 538 * @ipc_imem: Pointer to imem data-struct 539 * 540 * Returns: Current ap updated phase 541 */ 542 enum ipc_phase ipc_imem_phase_update(struct iosm_imem *ipc_imem); 543 544 /** 545 * ipc_imem_phase_get_string - Return the current operation 546 * phase as string. 547 * @phase: AP phase 548 * 549 * Returns: AP phase string 550 */ 551 const char *ipc_imem_phase_get_string(enum ipc_phase phase); 552 553 /** 554 * ipc_imem_msg_send_feature_set - Send feature set message to modem 555 * @ipc_imem: Pointer to imem data-struct 556 * @reset_enable: 0 = out-of-band, 1 = in-band-crash notification 557 * @atomic_ctx: if disabled call in tasklet context 558 * 559 */ 560 void ipc_imem_msg_send_feature_set(struct iosm_imem *ipc_imem, 561 unsigned int reset_enable, bool atomic_ctx); 562 563 /** 564 * ipc_imem_ipc_init_check - Send the init event to CP, wait a certain time and 565 * set CP to runtime with the context information 566 * @ipc_imem: Pointer to imem data-struct 567 */ 568 void ipc_imem_ipc_init_check(struct iosm_imem *ipc_imem); 569 570 /** 571 * ipc_imem_channel_init - Initialize the channel list with UL/DL pipe pairs. 572 * @ipc_imem: Pointer to imem data-struct 573 * @ctype: Channel type 574 * @chnl_cfg: Channel configuration struct 575 * @irq_moderation: Timer in usec for irq_moderation 576 */ 577 void ipc_imem_channel_init(struct iosm_imem *ipc_imem, enum ipc_ctype ctype, 578 struct ipc_chnl_cfg chnl_cfg, u32 irq_moderation); 579 #endif 580