1*90921014SLuciano Coelho /* 2*90921014SLuciano Coelho * This file is part of wl1251 3*90921014SLuciano Coelho * 4*90921014SLuciano Coelho * Copyright (c) 1998-2007 Texas Instruments Incorporated 5*90921014SLuciano Coelho * Copyright (C) 2008-2009 Nokia Corporation 6*90921014SLuciano Coelho * 7*90921014SLuciano Coelho * This program is free software; you can redistribute it and/or 8*90921014SLuciano Coelho * modify it under the terms of the GNU General Public License 9*90921014SLuciano Coelho * version 2 as published by the Free Software Foundation. 10*90921014SLuciano Coelho * 11*90921014SLuciano Coelho * This program is distributed in the hope that it will be useful, but 12*90921014SLuciano Coelho * WITHOUT ANY WARRANTY; without even the implied warranty of 13*90921014SLuciano Coelho * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14*90921014SLuciano Coelho * General Public License for more details. 15*90921014SLuciano Coelho * 16*90921014SLuciano Coelho * You should have received a copy of the GNU General Public License 17*90921014SLuciano Coelho * along with this program; if not, write to the Free Software 18*90921014SLuciano Coelho * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 19*90921014SLuciano Coelho * 02110-1301 USA 20*90921014SLuciano Coelho * 21*90921014SLuciano Coelho */ 22*90921014SLuciano Coelho 23*90921014SLuciano Coelho #ifndef __WL1251_H__ 24*90921014SLuciano Coelho #define __WL1251_H__ 25*90921014SLuciano Coelho 26*90921014SLuciano Coelho #include <linux/mutex.h> 27*90921014SLuciano Coelho #include <linux/list.h> 28*90921014SLuciano Coelho #include <linux/bitops.h> 29*90921014SLuciano Coelho #include <net/mac80211.h> 30*90921014SLuciano Coelho 31*90921014SLuciano Coelho #define DRIVER_NAME "wl1251" 32*90921014SLuciano Coelho #define DRIVER_PREFIX DRIVER_NAME ": " 33*90921014SLuciano Coelho 34*90921014SLuciano Coelho enum { 35*90921014SLuciano Coelho DEBUG_NONE = 0, 36*90921014SLuciano Coelho DEBUG_IRQ = BIT(0), 37*90921014SLuciano Coelho DEBUG_SPI = BIT(1), 38*90921014SLuciano Coelho DEBUG_BOOT = BIT(2), 39*90921014SLuciano Coelho DEBUG_MAILBOX = BIT(3), 40*90921014SLuciano Coelho DEBUG_NETLINK = BIT(4), 41*90921014SLuciano Coelho DEBUG_EVENT = BIT(5), 42*90921014SLuciano Coelho DEBUG_TX = BIT(6), 43*90921014SLuciano Coelho DEBUG_RX = BIT(7), 44*90921014SLuciano Coelho DEBUG_SCAN = BIT(8), 45*90921014SLuciano Coelho DEBUG_CRYPT = BIT(9), 46*90921014SLuciano Coelho DEBUG_PSM = BIT(10), 47*90921014SLuciano Coelho DEBUG_MAC80211 = BIT(11), 48*90921014SLuciano Coelho DEBUG_CMD = BIT(12), 49*90921014SLuciano Coelho DEBUG_ACX = BIT(13), 50*90921014SLuciano Coelho DEBUG_ALL = ~0, 51*90921014SLuciano Coelho }; 52*90921014SLuciano Coelho 53*90921014SLuciano Coelho #define DEBUG_LEVEL (DEBUG_NONE) 54*90921014SLuciano Coelho 55*90921014SLuciano Coelho #define DEBUG_DUMP_LIMIT 1024 56*90921014SLuciano Coelho 57*90921014SLuciano Coelho #define wl1251_error(fmt, arg...) \ 58*90921014SLuciano Coelho printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg) 59*90921014SLuciano Coelho 60*90921014SLuciano Coelho #define wl1251_warning(fmt, arg...) \ 61*90921014SLuciano Coelho printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg) 62*90921014SLuciano Coelho 63*90921014SLuciano Coelho #define wl1251_notice(fmt, arg...) \ 64*90921014SLuciano Coelho printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg) 65*90921014SLuciano Coelho 66*90921014SLuciano Coelho #define wl1251_info(fmt, arg...) \ 67*90921014SLuciano Coelho printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg) 68*90921014SLuciano Coelho 69*90921014SLuciano Coelho #define wl1251_debug(level, fmt, arg...) \ 70*90921014SLuciano Coelho do { \ 71*90921014SLuciano Coelho if (level & DEBUG_LEVEL) \ 72*90921014SLuciano Coelho printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \ 73*90921014SLuciano Coelho } while (0) 74*90921014SLuciano Coelho 75*90921014SLuciano Coelho #define wl1251_dump(level, prefix, buf, len) \ 76*90921014SLuciano Coelho do { \ 77*90921014SLuciano Coelho if (level & DEBUG_LEVEL) \ 78*90921014SLuciano Coelho print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \ 79*90921014SLuciano Coelho DUMP_PREFIX_OFFSET, 16, 1, \ 80*90921014SLuciano Coelho buf, \ 81*90921014SLuciano Coelho min_t(size_t, len, DEBUG_DUMP_LIMIT), \ 82*90921014SLuciano Coelho 0); \ 83*90921014SLuciano Coelho } while (0) 84*90921014SLuciano Coelho 85*90921014SLuciano Coelho #define wl1251_dump_ascii(level, prefix, buf, len) \ 86*90921014SLuciano Coelho do { \ 87*90921014SLuciano Coelho if (level & DEBUG_LEVEL) \ 88*90921014SLuciano Coelho print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \ 89*90921014SLuciano Coelho DUMP_PREFIX_OFFSET, 16, 1, \ 90*90921014SLuciano Coelho buf, \ 91*90921014SLuciano Coelho min_t(size_t, len, DEBUG_DUMP_LIMIT), \ 92*90921014SLuciano Coelho true); \ 93*90921014SLuciano Coelho } while (0) 94*90921014SLuciano Coelho 95*90921014SLuciano Coelho #define WL1251_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN | \ 96*90921014SLuciano Coelho CFG_BSSID_FILTER_EN) 97*90921014SLuciano Coelho 98*90921014SLuciano Coelho #define WL1251_DEFAULT_RX_FILTER (CFG_RX_PRSP_EN | \ 99*90921014SLuciano Coelho CFG_RX_MGMT_EN | \ 100*90921014SLuciano Coelho CFG_RX_DATA_EN | \ 101*90921014SLuciano Coelho CFG_RX_CTL_EN | \ 102*90921014SLuciano Coelho CFG_RX_BCN_EN | \ 103*90921014SLuciano Coelho CFG_RX_AUTH_EN | \ 104*90921014SLuciano Coelho CFG_RX_ASSOC_EN) 105*90921014SLuciano Coelho 106*90921014SLuciano Coelho #define WL1251_BUSY_WORD_LEN 8 107*90921014SLuciano Coelho 108*90921014SLuciano Coelho struct boot_attr { 109*90921014SLuciano Coelho u32 radio_type; 110*90921014SLuciano Coelho u8 mac_clock; 111*90921014SLuciano Coelho u8 arm_clock; 112*90921014SLuciano Coelho int firmware_debug; 113*90921014SLuciano Coelho u32 minor; 114*90921014SLuciano Coelho u32 major; 115*90921014SLuciano Coelho u32 bugfix; 116*90921014SLuciano Coelho }; 117*90921014SLuciano Coelho 118*90921014SLuciano Coelho enum wl1251_state { 119*90921014SLuciano Coelho WL1251_STATE_OFF, 120*90921014SLuciano Coelho WL1251_STATE_ON, 121*90921014SLuciano Coelho WL1251_STATE_PLT, 122*90921014SLuciano Coelho }; 123*90921014SLuciano Coelho 124*90921014SLuciano Coelho enum wl1251_partition_type { 125*90921014SLuciano Coelho PART_DOWN, 126*90921014SLuciano Coelho PART_WORK, 127*90921014SLuciano Coelho PART_DRPW, 128*90921014SLuciano Coelho 129*90921014SLuciano Coelho PART_TABLE_LEN 130*90921014SLuciano Coelho }; 131*90921014SLuciano Coelho 132*90921014SLuciano Coelho enum wl1251_station_mode { 133*90921014SLuciano Coelho STATION_ACTIVE_MODE, 134*90921014SLuciano Coelho STATION_POWER_SAVE_MODE, 135*90921014SLuciano Coelho STATION_IDLE, 136*90921014SLuciano Coelho }; 137*90921014SLuciano Coelho 138*90921014SLuciano Coelho struct wl1251_partition { 139*90921014SLuciano Coelho u32 size; 140*90921014SLuciano Coelho u32 start; 141*90921014SLuciano Coelho }; 142*90921014SLuciano Coelho 143*90921014SLuciano Coelho struct wl1251_partition_set { 144*90921014SLuciano Coelho struct wl1251_partition mem; 145*90921014SLuciano Coelho struct wl1251_partition reg; 146*90921014SLuciano Coelho }; 147*90921014SLuciano Coelho 148*90921014SLuciano Coelho struct wl1251; 149*90921014SLuciano Coelho 150*90921014SLuciano Coelho struct wl1251_stats { 151*90921014SLuciano Coelho struct acx_statistics *fw_stats; 152*90921014SLuciano Coelho unsigned long fw_stats_update; 153*90921014SLuciano Coelho 154*90921014SLuciano Coelho unsigned int retry_count; 155*90921014SLuciano Coelho unsigned int excessive_retries; 156*90921014SLuciano Coelho }; 157*90921014SLuciano Coelho 158*90921014SLuciano Coelho struct wl1251_debugfs { 159*90921014SLuciano Coelho struct dentry *rootdir; 160*90921014SLuciano Coelho struct dentry *fw_statistics; 161*90921014SLuciano Coelho 162*90921014SLuciano Coelho struct dentry *tx_internal_desc_overflow; 163*90921014SLuciano Coelho 164*90921014SLuciano Coelho struct dentry *rx_out_of_mem; 165*90921014SLuciano Coelho struct dentry *rx_hdr_overflow; 166*90921014SLuciano Coelho struct dentry *rx_hw_stuck; 167*90921014SLuciano Coelho struct dentry *rx_dropped; 168*90921014SLuciano Coelho struct dentry *rx_fcs_err; 169*90921014SLuciano Coelho struct dentry *rx_xfr_hint_trig; 170*90921014SLuciano Coelho struct dentry *rx_path_reset; 171*90921014SLuciano Coelho struct dentry *rx_reset_counter; 172*90921014SLuciano Coelho 173*90921014SLuciano Coelho struct dentry *dma_rx_requested; 174*90921014SLuciano Coelho struct dentry *dma_rx_errors; 175*90921014SLuciano Coelho struct dentry *dma_tx_requested; 176*90921014SLuciano Coelho struct dentry *dma_tx_errors; 177*90921014SLuciano Coelho 178*90921014SLuciano Coelho struct dentry *isr_cmd_cmplt; 179*90921014SLuciano Coelho struct dentry *isr_fiqs; 180*90921014SLuciano Coelho struct dentry *isr_rx_headers; 181*90921014SLuciano Coelho struct dentry *isr_rx_mem_overflow; 182*90921014SLuciano Coelho struct dentry *isr_rx_rdys; 183*90921014SLuciano Coelho struct dentry *isr_irqs; 184*90921014SLuciano Coelho struct dentry *isr_tx_procs; 185*90921014SLuciano Coelho struct dentry *isr_decrypt_done; 186*90921014SLuciano Coelho struct dentry *isr_dma0_done; 187*90921014SLuciano Coelho struct dentry *isr_dma1_done; 188*90921014SLuciano Coelho struct dentry *isr_tx_exch_complete; 189*90921014SLuciano Coelho struct dentry *isr_commands; 190*90921014SLuciano Coelho struct dentry *isr_rx_procs; 191*90921014SLuciano Coelho struct dentry *isr_hw_pm_mode_changes; 192*90921014SLuciano Coelho struct dentry *isr_host_acknowledges; 193*90921014SLuciano Coelho struct dentry *isr_pci_pm; 194*90921014SLuciano Coelho struct dentry *isr_wakeups; 195*90921014SLuciano Coelho struct dentry *isr_low_rssi; 196*90921014SLuciano Coelho 197*90921014SLuciano Coelho struct dentry *wep_addr_key_count; 198*90921014SLuciano Coelho struct dentry *wep_default_key_count; 199*90921014SLuciano Coelho /* skipping wep.reserved */ 200*90921014SLuciano Coelho struct dentry *wep_key_not_found; 201*90921014SLuciano Coelho struct dentry *wep_decrypt_fail; 202*90921014SLuciano Coelho struct dentry *wep_packets; 203*90921014SLuciano Coelho struct dentry *wep_interrupt; 204*90921014SLuciano Coelho 205*90921014SLuciano Coelho struct dentry *pwr_ps_enter; 206*90921014SLuciano Coelho struct dentry *pwr_elp_enter; 207*90921014SLuciano Coelho struct dentry *pwr_missing_bcns; 208*90921014SLuciano Coelho struct dentry *pwr_wake_on_host; 209*90921014SLuciano Coelho struct dentry *pwr_wake_on_timer_exp; 210*90921014SLuciano Coelho struct dentry *pwr_tx_with_ps; 211*90921014SLuciano Coelho struct dentry *pwr_tx_without_ps; 212*90921014SLuciano Coelho struct dentry *pwr_rcvd_beacons; 213*90921014SLuciano Coelho struct dentry *pwr_power_save_off; 214*90921014SLuciano Coelho struct dentry *pwr_enable_ps; 215*90921014SLuciano Coelho struct dentry *pwr_disable_ps; 216*90921014SLuciano Coelho struct dentry *pwr_fix_tsf_ps; 217*90921014SLuciano Coelho /* skipping cont_miss_bcns_spread for now */ 218*90921014SLuciano Coelho struct dentry *pwr_rcvd_awake_beacons; 219*90921014SLuciano Coelho 220*90921014SLuciano Coelho struct dentry *mic_rx_pkts; 221*90921014SLuciano Coelho struct dentry *mic_calc_failure; 222*90921014SLuciano Coelho 223*90921014SLuciano Coelho struct dentry *aes_encrypt_fail; 224*90921014SLuciano Coelho struct dentry *aes_decrypt_fail; 225*90921014SLuciano Coelho struct dentry *aes_encrypt_packets; 226*90921014SLuciano Coelho struct dentry *aes_decrypt_packets; 227*90921014SLuciano Coelho struct dentry *aes_encrypt_interrupt; 228*90921014SLuciano Coelho struct dentry *aes_decrypt_interrupt; 229*90921014SLuciano Coelho 230*90921014SLuciano Coelho struct dentry *event_heart_beat; 231*90921014SLuciano Coelho struct dentry *event_calibration; 232*90921014SLuciano Coelho struct dentry *event_rx_mismatch; 233*90921014SLuciano Coelho struct dentry *event_rx_mem_empty; 234*90921014SLuciano Coelho struct dentry *event_rx_pool; 235*90921014SLuciano Coelho struct dentry *event_oom_late; 236*90921014SLuciano Coelho struct dentry *event_phy_transmit_error; 237*90921014SLuciano Coelho struct dentry *event_tx_stuck; 238*90921014SLuciano Coelho 239*90921014SLuciano Coelho struct dentry *ps_pspoll_timeouts; 240*90921014SLuciano Coelho struct dentry *ps_upsd_timeouts; 241*90921014SLuciano Coelho struct dentry *ps_upsd_max_sptime; 242*90921014SLuciano Coelho struct dentry *ps_upsd_max_apturn; 243*90921014SLuciano Coelho struct dentry *ps_pspoll_max_apturn; 244*90921014SLuciano Coelho struct dentry *ps_pspoll_utilization; 245*90921014SLuciano Coelho struct dentry *ps_upsd_utilization; 246*90921014SLuciano Coelho 247*90921014SLuciano Coelho struct dentry *rxpipe_rx_prep_beacon_drop; 248*90921014SLuciano Coelho struct dentry *rxpipe_descr_host_int_trig_rx_data; 249*90921014SLuciano Coelho struct dentry *rxpipe_beacon_buffer_thres_host_int_trig_rx_data; 250*90921014SLuciano Coelho struct dentry *rxpipe_missed_beacon_host_int_trig_rx_data; 251*90921014SLuciano Coelho struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data; 252*90921014SLuciano Coelho 253*90921014SLuciano Coelho struct dentry *tx_queue_len; 254*90921014SLuciano Coelho struct dentry *tx_queue_status; 255*90921014SLuciano Coelho 256*90921014SLuciano Coelho struct dentry *retry_count; 257*90921014SLuciano Coelho struct dentry *excessive_retries; 258*90921014SLuciano Coelho }; 259*90921014SLuciano Coelho 260*90921014SLuciano Coelho struct wl1251_if_operations { 261*90921014SLuciano Coelho void (*read)(struct wl1251 *wl, int addr, void *buf, size_t len); 262*90921014SLuciano Coelho void (*write)(struct wl1251 *wl, int addr, void *buf, size_t len); 263*90921014SLuciano Coelho void (*read_elp)(struct wl1251 *wl, int addr, u32 *val); 264*90921014SLuciano Coelho void (*write_elp)(struct wl1251 *wl, int addr, u32 val); 265*90921014SLuciano Coelho int (*power)(struct wl1251 *wl, bool enable); 266*90921014SLuciano Coelho void (*reset)(struct wl1251 *wl); 267*90921014SLuciano Coelho void (*enable_irq)(struct wl1251 *wl); 268*90921014SLuciano Coelho void (*disable_irq)(struct wl1251 *wl); 269*90921014SLuciano Coelho }; 270*90921014SLuciano Coelho 271*90921014SLuciano Coelho struct wl1251 { 272*90921014SLuciano Coelho struct ieee80211_hw *hw; 273*90921014SLuciano Coelho bool mac80211_registered; 274*90921014SLuciano Coelho 275*90921014SLuciano Coelho void *if_priv; 276*90921014SLuciano Coelho const struct wl1251_if_operations *if_ops; 277*90921014SLuciano Coelho 278*90921014SLuciano Coelho void (*set_power)(bool enable); 279*90921014SLuciano Coelho int irq; 280*90921014SLuciano Coelho bool use_eeprom; 281*90921014SLuciano Coelho 282*90921014SLuciano Coelho spinlock_t wl_lock; 283*90921014SLuciano Coelho 284*90921014SLuciano Coelho enum wl1251_state state; 285*90921014SLuciano Coelho struct mutex mutex; 286*90921014SLuciano Coelho 287*90921014SLuciano Coelho int physical_mem_addr; 288*90921014SLuciano Coelho int physical_reg_addr; 289*90921014SLuciano Coelho int virtual_mem_addr; 290*90921014SLuciano Coelho int virtual_reg_addr; 291*90921014SLuciano Coelho 292*90921014SLuciano Coelho int cmd_box_addr; 293*90921014SLuciano Coelho int event_box_addr; 294*90921014SLuciano Coelho struct boot_attr boot_attr; 295*90921014SLuciano Coelho 296*90921014SLuciano Coelho u8 *fw; 297*90921014SLuciano Coelho size_t fw_len; 298*90921014SLuciano Coelho u8 *nvs; 299*90921014SLuciano Coelho size_t nvs_len; 300*90921014SLuciano Coelho 301*90921014SLuciano Coelho u8 bssid[ETH_ALEN]; 302*90921014SLuciano Coelho u8 mac_addr[ETH_ALEN]; 303*90921014SLuciano Coelho u8 bss_type; 304*90921014SLuciano Coelho u8 listen_int; 305*90921014SLuciano Coelho int channel; 306*90921014SLuciano Coelho 307*90921014SLuciano Coelho void *target_mem_map; 308*90921014SLuciano Coelho struct acx_data_path_params_resp *data_path; 309*90921014SLuciano Coelho 310*90921014SLuciano Coelho /* Number of TX packets transferred to the FW, modulo 16 */ 311*90921014SLuciano Coelho u32 data_in_count; 312*90921014SLuciano Coelho 313*90921014SLuciano Coelho /* Frames scheduled for transmission, not handled yet */ 314*90921014SLuciano Coelho struct sk_buff_head tx_queue; 315*90921014SLuciano Coelho bool tx_queue_stopped; 316*90921014SLuciano Coelho 317*90921014SLuciano Coelho struct work_struct tx_work; 318*90921014SLuciano Coelho struct work_struct filter_work; 319*90921014SLuciano Coelho 320*90921014SLuciano Coelho /* Pending TX frames */ 321*90921014SLuciano Coelho struct sk_buff *tx_frames[16]; 322*90921014SLuciano Coelho 323*90921014SLuciano Coelho /* 324*90921014SLuciano Coelho * Index pointing to the next TX complete entry 325*90921014SLuciano Coelho * in the cyclic XT complete array we get from 326*90921014SLuciano Coelho * the FW. 327*90921014SLuciano Coelho */ 328*90921014SLuciano Coelho u32 next_tx_complete; 329*90921014SLuciano Coelho 330*90921014SLuciano Coelho /* FW Rx counter */ 331*90921014SLuciano Coelho u32 rx_counter; 332*90921014SLuciano Coelho 333*90921014SLuciano Coelho /* Rx frames handled */ 334*90921014SLuciano Coelho u32 rx_handled; 335*90921014SLuciano Coelho 336*90921014SLuciano Coelho /* Current double buffer */ 337*90921014SLuciano Coelho u32 rx_current_buffer; 338*90921014SLuciano Coelho u32 rx_last_id; 339*90921014SLuciano Coelho 340*90921014SLuciano Coelho /* The target interrupt mask */ 341*90921014SLuciano Coelho u32 intr_mask; 342*90921014SLuciano Coelho struct work_struct irq_work; 343*90921014SLuciano Coelho 344*90921014SLuciano Coelho /* The mbox event mask */ 345*90921014SLuciano Coelho u32 event_mask; 346*90921014SLuciano Coelho 347*90921014SLuciano Coelho /* Mailbox pointers */ 348*90921014SLuciano Coelho u32 mbox_ptr[2]; 349*90921014SLuciano Coelho 350*90921014SLuciano Coelho /* Are we currently scanning */ 351*90921014SLuciano Coelho bool scanning; 352*90921014SLuciano Coelho 353*90921014SLuciano Coelho /* Default key (for WEP) */ 354*90921014SLuciano Coelho u32 default_key; 355*90921014SLuciano Coelho 356*90921014SLuciano Coelho unsigned int tx_mgmt_frm_rate; 357*90921014SLuciano Coelho unsigned int tx_mgmt_frm_mod; 358*90921014SLuciano Coelho 359*90921014SLuciano Coelho unsigned int rx_config; 360*90921014SLuciano Coelho unsigned int rx_filter; 361*90921014SLuciano Coelho 362*90921014SLuciano Coelho /* is firmware in elp mode */ 363*90921014SLuciano Coelho bool elp; 364*90921014SLuciano Coelho 365*90921014SLuciano Coelho struct delayed_work elp_work; 366*90921014SLuciano Coelho 367*90921014SLuciano Coelho enum wl1251_station_mode station_mode; 368*90921014SLuciano Coelho 369*90921014SLuciano Coelho /* PSM mode requested */ 370*90921014SLuciano Coelho bool psm_requested; 371*90921014SLuciano Coelho 372*90921014SLuciano Coelho u16 beacon_int; 373*90921014SLuciano Coelho u8 dtim_period; 374*90921014SLuciano Coelho 375*90921014SLuciano Coelho /* in dBm */ 376*90921014SLuciano Coelho int power_level; 377*90921014SLuciano Coelho 378*90921014SLuciano Coelho int rssi_thold; 379*90921014SLuciano Coelho 380*90921014SLuciano Coelho struct wl1251_stats stats; 381*90921014SLuciano Coelho struct wl1251_debugfs debugfs; 382*90921014SLuciano Coelho 383*90921014SLuciano Coelho __le32 buffer_32; 384*90921014SLuciano Coelho u32 buffer_cmd; 385*90921014SLuciano Coelho u8 buffer_busyword[WL1251_BUSY_WORD_LEN]; 386*90921014SLuciano Coelho struct wl1251_rx_descriptor *rx_descriptor; 387*90921014SLuciano Coelho 388*90921014SLuciano Coelho struct ieee80211_vif *vif; 389*90921014SLuciano Coelho 390*90921014SLuciano Coelho u32 chip_id; 391*90921014SLuciano Coelho char fw_ver[21]; 392*90921014SLuciano Coelho 393*90921014SLuciano Coelho /* Most recently reported noise in dBm */ 394*90921014SLuciano Coelho s8 noise; 395*90921014SLuciano Coelho }; 396*90921014SLuciano Coelho 397*90921014SLuciano Coelho int wl1251_plt_start(struct wl1251 *wl); 398*90921014SLuciano Coelho int wl1251_plt_stop(struct wl1251 *wl); 399*90921014SLuciano Coelho 400*90921014SLuciano Coelho struct ieee80211_hw *wl1251_alloc_hw(void); 401*90921014SLuciano Coelho int wl1251_free_hw(struct wl1251 *wl); 402*90921014SLuciano Coelho int wl1251_init_ieee80211(struct wl1251 *wl); 403*90921014SLuciano Coelho void wl1251_enable_interrupts(struct wl1251 *wl); 404*90921014SLuciano Coelho void wl1251_disable_interrupts(struct wl1251 *wl); 405*90921014SLuciano Coelho 406*90921014SLuciano Coelho #define DEFAULT_HW_GEN_MODULATION_TYPE CCK_LONG /* Long Preamble */ 407*90921014SLuciano Coelho #define DEFAULT_HW_GEN_TX_RATE RATE_2MBPS 408*90921014SLuciano Coelho #define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */ 409*90921014SLuciano Coelho 410*90921014SLuciano Coelho #define WL1251_DEFAULT_POWER_LEVEL 20 411*90921014SLuciano Coelho 412*90921014SLuciano Coelho #define WL1251_TX_QUEUE_LOW_WATERMARK 10 413*90921014SLuciano Coelho #define WL1251_TX_QUEUE_HIGH_WATERMARK 25 414*90921014SLuciano Coelho 415*90921014SLuciano Coelho #define WL1251_DEFAULT_BEACON_INT 100 416*90921014SLuciano Coelho #define WL1251_DEFAULT_DTIM_PERIOD 1 417*90921014SLuciano Coelho 418*90921014SLuciano Coelho #define WL1251_DEFAULT_CHANNEL 0 419*90921014SLuciano Coelho 420*90921014SLuciano Coelho #define WL1251_DEFAULT_BET_CONSECUTIVE 10 421*90921014SLuciano Coelho 422*90921014SLuciano Coelho #define CHIP_ID_1251_PG10 (0x7010101) 423*90921014SLuciano Coelho #define CHIP_ID_1251_PG11 (0x7020101) 424*90921014SLuciano Coelho #define CHIP_ID_1251_PG12 (0x7030101) 425*90921014SLuciano Coelho #define CHIP_ID_1271_PG10 (0x4030101) 426*90921014SLuciano Coelho #define CHIP_ID_1271_PG20 (0x4030111) 427*90921014SLuciano Coelho 428*90921014SLuciano Coelho #define WL1251_FW_NAME "wl1251-fw.bin" 429*90921014SLuciano Coelho #define WL1251_NVS_NAME "wl1251-nvs.bin" 430*90921014SLuciano Coelho 431*90921014SLuciano Coelho #define WL1251_POWER_ON_SLEEP 10 /* in milliseconds */ 432*90921014SLuciano Coelho 433*90921014SLuciano Coelho #define WL1251_PART_DOWN_MEM_START 0x0 434*90921014SLuciano Coelho #define WL1251_PART_DOWN_MEM_SIZE 0x16800 435*90921014SLuciano Coelho #define WL1251_PART_DOWN_REG_START REGISTERS_BASE 436*90921014SLuciano Coelho #define WL1251_PART_DOWN_REG_SIZE REGISTERS_DOWN_SIZE 437*90921014SLuciano Coelho 438*90921014SLuciano Coelho #define WL1251_PART_WORK_MEM_START 0x28000 439*90921014SLuciano Coelho #define WL1251_PART_WORK_MEM_SIZE 0x14000 440*90921014SLuciano Coelho #define WL1251_PART_WORK_REG_START REGISTERS_BASE 441*90921014SLuciano Coelho #define WL1251_PART_WORK_REG_SIZE REGISTERS_WORK_SIZE 442*90921014SLuciano Coelho 443*90921014SLuciano Coelho #define WL1251_DEFAULT_LOW_RSSI_WEIGHT 10 444*90921014SLuciano Coelho #define WL1251_DEFAULT_LOW_RSSI_DEPTH 10 445*90921014SLuciano Coelho 446*90921014SLuciano Coelho #endif 447