1*2b27bdccSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 290921014SLuciano Coelho /* 390921014SLuciano Coelho * This file is part of wl1251 490921014SLuciano Coelho * 590921014SLuciano Coelho * Copyright (c) 1998-2007 Texas Instruments Incorporated 690921014SLuciano Coelho * Copyright (C) 2008-2009 Nokia Corporation 790921014SLuciano Coelho */ 890921014SLuciano Coelho 990921014SLuciano Coelho #ifndef __WL1251_H__ 1090921014SLuciano Coelho #define __WL1251_H__ 1190921014SLuciano Coelho 1290921014SLuciano Coelho #include <linux/mutex.h> 1390921014SLuciano Coelho #include <linux/list.h> 1490921014SLuciano Coelho #include <linux/bitops.h> 1590921014SLuciano Coelho #include <net/mac80211.h> 1690921014SLuciano Coelho 1790921014SLuciano Coelho #define DRIVER_NAME "wl1251" 1890921014SLuciano Coelho #define DRIVER_PREFIX DRIVER_NAME ": " 1990921014SLuciano Coelho 2090921014SLuciano Coelho enum { 2190921014SLuciano Coelho DEBUG_NONE = 0, 2290921014SLuciano Coelho DEBUG_IRQ = BIT(0), 2390921014SLuciano Coelho DEBUG_SPI = BIT(1), 2490921014SLuciano Coelho DEBUG_BOOT = BIT(2), 2590921014SLuciano Coelho DEBUG_MAILBOX = BIT(3), 2690921014SLuciano Coelho DEBUG_NETLINK = BIT(4), 2790921014SLuciano Coelho DEBUG_EVENT = BIT(5), 2890921014SLuciano Coelho DEBUG_TX = BIT(6), 2990921014SLuciano Coelho DEBUG_RX = BIT(7), 3090921014SLuciano Coelho DEBUG_SCAN = BIT(8), 3190921014SLuciano Coelho DEBUG_CRYPT = BIT(9), 3290921014SLuciano Coelho DEBUG_PSM = BIT(10), 3390921014SLuciano Coelho DEBUG_MAC80211 = BIT(11), 3490921014SLuciano Coelho DEBUG_CMD = BIT(12), 3590921014SLuciano Coelho DEBUG_ACX = BIT(13), 3690921014SLuciano Coelho DEBUG_ALL = ~0, 3790921014SLuciano Coelho }; 3890921014SLuciano Coelho 3990921014SLuciano Coelho #define DEBUG_LEVEL (DEBUG_NONE) 4090921014SLuciano Coelho 4190921014SLuciano Coelho #define DEBUG_DUMP_LIMIT 1024 4290921014SLuciano Coelho 4390921014SLuciano Coelho #define wl1251_error(fmt, arg...) \ 4490921014SLuciano Coelho printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg) 4590921014SLuciano Coelho 4690921014SLuciano Coelho #define wl1251_warning(fmt, arg...) \ 4790921014SLuciano Coelho printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg) 4890921014SLuciano Coelho 4990921014SLuciano Coelho #define wl1251_notice(fmt, arg...) \ 5090921014SLuciano Coelho printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg) 5190921014SLuciano Coelho 5290921014SLuciano Coelho #define wl1251_info(fmt, arg...) \ 5390921014SLuciano Coelho printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg) 5490921014SLuciano Coelho 5590921014SLuciano Coelho #define wl1251_debug(level, fmt, arg...) \ 5690921014SLuciano Coelho do { \ 5790921014SLuciano Coelho if (level & DEBUG_LEVEL) \ 5890921014SLuciano Coelho printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \ 5990921014SLuciano Coelho } while (0) 6090921014SLuciano Coelho 6190921014SLuciano Coelho #define wl1251_dump(level, prefix, buf, len) \ 6290921014SLuciano Coelho do { \ 6390921014SLuciano Coelho if (level & DEBUG_LEVEL) \ 6490921014SLuciano Coelho print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \ 6590921014SLuciano Coelho DUMP_PREFIX_OFFSET, 16, 1, \ 6690921014SLuciano Coelho buf, \ 6790921014SLuciano Coelho min_t(size_t, len, DEBUG_DUMP_LIMIT), \ 6890921014SLuciano Coelho 0); \ 6990921014SLuciano Coelho } while (0) 7090921014SLuciano Coelho 7190921014SLuciano Coelho #define wl1251_dump_ascii(level, prefix, buf, len) \ 7290921014SLuciano Coelho do { \ 7390921014SLuciano Coelho if (level & DEBUG_LEVEL) \ 7490921014SLuciano Coelho print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \ 7590921014SLuciano Coelho DUMP_PREFIX_OFFSET, 16, 1, \ 7690921014SLuciano Coelho buf, \ 7790921014SLuciano Coelho min_t(size_t, len, DEBUG_DUMP_LIMIT), \ 7890921014SLuciano Coelho true); \ 7990921014SLuciano Coelho } while (0) 8090921014SLuciano Coelho 8190921014SLuciano Coelho #define WL1251_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN | \ 829ed74ba0SDavid Gnedt CFG_MC_FILTER_EN | \ 8390921014SLuciano Coelho CFG_BSSID_FILTER_EN) 8490921014SLuciano Coelho 8590921014SLuciano Coelho #define WL1251_DEFAULT_RX_FILTER (CFG_RX_PRSP_EN | \ 8690921014SLuciano Coelho CFG_RX_MGMT_EN | \ 8790921014SLuciano Coelho CFG_RX_DATA_EN | \ 8890921014SLuciano Coelho CFG_RX_CTL_EN | \ 8990921014SLuciano Coelho CFG_RX_BCN_EN | \ 9090921014SLuciano Coelho CFG_RX_AUTH_EN | \ 9190921014SLuciano Coelho CFG_RX_ASSOC_EN) 9290921014SLuciano Coelho 9390921014SLuciano Coelho #define WL1251_BUSY_WORD_LEN 8 9490921014SLuciano Coelho 9590921014SLuciano Coelho struct boot_attr { 9690921014SLuciano Coelho u32 radio_type; 9790921014SLuciano Coelho u8 mac_clock; 9890921014SLuciano Coelho u8 arm_clock; 9990921014SLuciano Coelho int firmware_debug; 10090921014SLuciano Coelho u32 minor; 10190921014SLuciano Coelho u32 major; 10290921014SLuciano Coelho u32 bugfix; 10390921014SLuciano Coelho }; 10490921014SLuciano Coelho 10590921014SLuciano Coelho enum wl1251_state { 10690921014SLuciano Coelho WL1251_STATE_OFF, 10790921014SLuciano Coelho WL1251_STATE_ON, 10890921014SLuciano Coelho WL1251_STATE_PLT, 10990921014SLuciano Coelho }; 11090921014SLuciano Coelho 11190921014SLuciano Coelho enum wl1251_partition_type { 11290921014SLuciano Coelho PART_DOWN, 11390921014SLuciano Coelho PART_WORK, 11490921014SLuciano Coelho PART_DRPW, 11590921014SLuciano Coelho 11690921014SLuciano Coelho PART_TABLE_LEN 11790921014SLuciano Coelho }; 11890921014SLuciano Coelho 11990921014SLuciano Coelho enum wl1251_station_mode { 12090921014SLuciano Coelho STATION_ACTIVE_MODE, 12190921014SLuciano Coelho STATION_POWER_SAVE_MODE, 12290921014SLuciano Coelho STATION_IDLE, 12390921014SLuciano Coelho }; 12490921014SLuciano Coelho 12590921014SLuciano Coelho struct wl1251_partition { 12690921014SLuciano Coelho u32 size; 12790921014SLuciano Coelho u32 start; 12890921014SLuciano Coelho }; 12990921014SLuciano Coelho 13090921014SLuciano Coelho struct wl1251_partition_set { 13190921014SLuciano Coelho struct wl1251_partition mem; 13290921014SLuciano Coelho struct wl1251_partition reg; 13390921014SLuciano Coelho }; 13490921014SLuciano Coelho 13590921014SLuciano Coelho struct wl1251; 13690921014SLuciano Coelho 13790921014SLuciano Coelho struct wl1251_stats { 13890921014SLuciano Coelho struct acx_statistics *fw_stats; 13990921014SLuciano Coelho unsigned long fw_stats_update; 14090921014SLuciano Coelho 14190921014SLuciano Coelho unsigned int retry_count; 14290921014SLuciano Coelho unsigned int excessive_retries; 14390921014SLuciano Coelho }; 14490921014SLuciano Coelho 14590921014SLuciano Coelho struct wl1251_debugfs { 14690921014SLuciano Coelho struct dentry *rootdir; 14790921014SLuciano Coelho struct dentry *fw_statistics; 14890921014SLuciano Coelho 14990921014SLuciano Coelho struct dentry *tx_internal_desc_overflow; 15090921014SLuciano Coelho 15190921014SLuciano Coelho struct dentry *rx_out_of_mem; 15290921014SLuciano Coelho struct dentry *rx_hdr_overflow; 15390921014SLuciano Coelho struct dentry *rx_hw_stuck; 15490921014SLuciano Coelho struct dentry *rx_dropped; 15590921014SLuciano Coelho struct dentry *rx_fcs_err; 15690921014SLuciano Coelho struct dentry *rx_xfr_hint_trig; 15790921014SLuciano Coelho struct dentry *rx_path_reset; 15890921014SLuciano Coelho struct dentry *rx_reset_counter; 15990921014SLuciano Coelho 16090921014SLuciano Coelho struct dentry *dma_rx_requested; 16190921014SLuciano Coelho struct dentry *dma_rx_errors; 16290921014SLuciano Coelho struct dentry *dma_tx_requested; 16390921014SLuciano Coelho struct dentry *dma_tx_errors; 16490921014SLuciano Coelho 16590921014SLuciano Coelho struct dentry *isr_cmd_cmplt; 16690921014SLuciano Coelho struct dentry *isr_fiqs; 16790921014SLuciano Coelho struct dentry *isr_rx_headers; 16890921014SLuciano Coelho struct dentry *isr_rx_mem_overflow; 16990921014SLuciano Coelho struct dentry *isr_rx_rdys; 17090921014SLuciano Coelho struct dentry *isr_irqs; 17190921014SLuciano Coelho struct dentry *isr_tx_procs; 17290921014SLuciano Coelho struct dentry *isr_decrypt_done; 17390921014SLuciano Coelho struct dentry *isr_dma0_done; 17490921014SLuciano Coelho struct dentry *isr_dma1_done; 17590921014SLuciano Coelho struct dentry *isr_tx_exch_complete; 17690921014SLuciano Coelho struct dentry *isr_commands; 17790921014SLuciano Coelho struct dentry *isr_rx_procs; 17890921014SLuciano Coelho struct dentry *isr_hw_pm_mode_changes; 17990921014SLuciano Coelho struct dentry *isr_host_acknowledges; 18090921014SLuciano Coelho struct dentry *isr_pci_pm; 18190921014SLuciano Coelho struct dentry *isr_wakeups; 18290921014SLuciano Coelho struct dentry *isr_low_rssi; 18390921014SLuciano Coelho 18490921014SLuciano Coelho struct dentry *wep_addr_key_count; 18590921014SLuciano Coelho struct dentry *wep_default_key_count; 18690921014SLuciano Coelho /* skipping wep.reserved */ 18790921014SLuciano Coelho struct dentry *wep_key_not_found; 18890921014SLuciano Coelho struct dentry *wep_decrypt_fail; 18990921014SLuciano Coelho struct dentry *wep_packets; 19090921014SLuciano Coelho struct dentry *wep_interrupt; 19190921014SLuciano Coelho 19290921014SLuciano Coelho struct dentry *pwr_ps_enter; 19390921014SLuciano Coelho struct dentry *pwr_elp_enter; 19490921014SLuciano Coelho struct dentry *pwr_missing_bcns; 19590921014SLuciano Coelho struct dentry *pwr_wake_on_host; 19690921014SLuciano Coelho struct dentry *pwr_wake_on_timer_exp; 19790921014SLuciano Coelho struct dentry *pwr_tx_with_ps; 19890921014SLuciano Coelho struct dentry *pwr_tx_without_ps; 19990921014SLuciano Coelho struct dentry *pwr_rcvd_beacons; 20090921014SLuciano Coelho struct dentry *pwr_power_save_off; 20190921014SLuciano Coelho struct dentry *pwr_enable_ps; 20290921014SLuciano Coelho struct dentry *pwr_disable_ps; 20390921014SLuciano Coelho struct dentry *pwr_fix_tsf_ps; 20490921014SLuciano Coelho /* skipping cont_miss_bcns_spread for now */ 20590921014SLuciano Coelho struct dentry *pwr_rcvd_awake_beacons; 20690921014SLuciano Coelho 20790921014SLuciano Coelho struct dentry *mic_rx_pkts; 20890921014SLuciano Coelho struct dentry *mic_calc_failure; 20990921014SLuciano Coelho 21090921014SLuciano Coelho struct dentry *aes_encrypt_fail; 21190921014SLuciano Coelho struct dentry *aes_decrypt_fail; 21290921014SLuciano Coelho struct dentry *aes_encrypt_packets; 21390921014SLuciano Coelho struct dentry *aes_decrypt_packets; 21490921014SLuciano Coelho struct dentry *aes_encrypt_interrupt; 21590921014SLuciano Coelho struct dentry *aes_decrypt_interrupt; 21690921014SLuciano Coelho 21790921014SLuciano Coelho struct dentry *event_heart_beat; 21890921014SLuciano Coelho struct dentry *event_calibration; 21990921014SLuciano Coelho struct dentry *event_rx_mismatch; 22090921014SLuciano Coelho struct dentry *event_rx_mem_empty; 22190921014SLuciano Coelho struct dentry *event_rx_pool; 22290921014SLuciano Coelho struct dentry *event_oom_late; 22390921014SLuciano Coelho struct dentry *event_phy_transmit_error; 22490921014SLuciano Coelho struct dentry *event_tx_stuck; 22590921014SLuciano Coelho 22690921014SLuciano Coelho struct dentry *ps_pspoll_timeouts; 22790921014SLuciano Coelho struct dentry *ps_upsd_timeouts; 22890921014SLuciano Coelho struct dentry *ps_upsd_max_sptime; 22990921014SLuciano Coelho struct dentry *ps_upsd_max_apturn; 23090921014SLuciano Coelho struct dentry *ps_pspoll_max_apturn; 23190921014SLuciano Coelho struct dentry *ps_pspoll_utilization; 23290921014SLuciano Coelho struct dentry *ps_upsd_utilization; 23390921014SLuciano Coelho 23490921014SLuciano Coelho struct dentry *rxpipe_rx_prep_beacon_drop; 23590921014SLuciano Coelho struct dentry *rxpipe_descr_host_int_trig_rx_data; 23690921014SLuciano Coelho struct dentry *rxpipe_beacon_buffer_thres_host_int_trig_rx_data; 23790921014SLuciano Coelho struct dentry *rxpipe_missed_beacon_host_int_trig_rx_data; 23890921014SLuciano Coelho struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data; 23990921014SLuciano Coelho 24090921014SLuciano Coelho struct dentry *tx_queue_len; 24190921014SLuciano Coelho struct dentry *tx_queue_status; 24290921014SLuciano Coelho 24390921014SLuciano Coelho struct dentry *retry_count; 24490921014SLuciano Coelho struct dentry *excessive_retries; 24590921014SLuciano Coelho }; 24690921014SLuciano Coelho 24790921014SLuciano Coelho struct wl1251_if_operations { 24890921014SLuciano Coelho void (*read)(struct wl1251 *wl, int addr, void *buf, size_t len); 24990921014SLuciano Coelho void (*write)(struct wl1251 *wl, int addr, void *buf, size_t len); 25090921014SLuciano Coelho void (*read_elp)(struct wl1251 *wl, int addr, u32 *val); 25190921014SLuciano Coelho void (*write_elp)(struct wl1251 *wl, int addr, u32 val); 25290921014SLuciano Coelho int (*power)(struct wl1251 *wl, bool enable); 25390921014SLuciano Coelho void (*reset)(struct wl1251 *wl); 25490921014SLuciano Coelho void (*enable_irq)(struct wl1251 *wl); 25590921014SLuciano Coelho void (*disable_irq)(struct wl1251 *wl); 25690921014SLuciano Coelho }; 25790921014SLuciano Coelho 25890921014SLuciano Coelho struct wl1251 { 25990921014SLuciano Coelho struct ieee80211_hw *hw; 26090921014SLuciano Coelho bool mac80211_registered; 26190921014SLuciano Coelho 26290921014SLuciano Coelho void *if_priv; 26390921014SLuciano Coelho const struct wl1251_if_operations *if_ops; 26490921014SLuciano Coelho 2651d207cd3SSebastian Reichel int power_gpio; 26690921014SLuciano Coelho int irq; 26790921014SLuciano Coelho bool use_eeprom; 26890921014SLuciano Coelho 269e4c2e09eSSebastian Reichel struct regulator *vio; 270e4c2e09eSSebastian Reichel 27190921014SLuciano Coelho spinlock_t wl_lock; 27290921014SLuciano Coelho 27390921014SLuciano Coelho enum wl1251_state state; 27490921014SLuciano Coelho struct mutex mutex; 27590921014SLuciano Coelho 27690921014SLuciano Coelho int physical_mem_addr; 27790921014SLuciano Coelho int physical_reg_addr; 27890921014SLuciano Coelho int virtual_mem_addr; 27990921014SLuciano Coelho int virtual_reg_addr; 28090921014SLuciano Coelho 28190921014SLuciano Coelho int cmd_box_addr; 28290921014SLuciano Coelho int event_box_addr; 28390921014SLuciano Coelho struct boot_attr boot_attr; 28490921014SLuciano Coelho 28590921014SLuciano Coelho u8 *fw; 28690921014SLuciano Coelho size_t fw_len; 28790921014SLuciano Coelho u8 *nvs; 28890921014SLuciano Coelho size_t nvs_len; 28990921014SLuciano Coelho 29090921014SLuciano Coelho u8 bssid[ETH_ALEN]; 29190921014SLuciano Coelho u8 mac_addr[ETH_ALEN]; 29290921014SLuciano Coelho u8 bss_type; 29390921014SLuciano Coelho u8 listen_int; 29490921014SLuciano Coelho int channel; 2954d09b537SDavid Gnedt bool monitor_present; 296c8909e5aSDavid Gnedt bool joined; 29790921014SLuciano Coelho 29890921014SLuciano Coelho void *target_mem_map; 29990921014SLuciano Coelho struct acx_data_path_params_resp *data_path; 30090921014SLuciano Coelho 30190921014SLuciano Coelho /* Number of TX packets transferred to the FW, modulo 16 */ 30290921014SLuciano Coelho u32 data_in_count; 30390921014SLuciano Coelho 30490921014SLuciano Coelho /* Frames scheduled for transmission, not handled yet */ 30590921014SLuciano Coelho struct sk_buff_head tx_queue; 30690921014SLuciano Coelho bool tx_queue_stopped; 30790921014SLuciano Coelho 30890921014SLuciano Coelho struct work_struct tx_work; 30990921014SLuciano Coelho 31090921014SLuciano Coelho /* Pending TX frames */ 31190921014SLuciano Coelho struct sk_buff *tx_frames[16]; 31290921014SLuciano Coelho 31390921014SLuciano Coelho /* 31490921014SLuciano Coelho * Index pointing to the next TX complete entry 31590921014SLuciano Coelho * in the cyclic XT complete array we get from 31690921014SLuciano Coelho * the FW. 31790921014SLuciano Coelho */ 31890921014SLuciano Coelho u32 next_tx_complete; 31990921014SLuciano Coelho 32090921014SLuciano Coelho /* FW Rx counter */ 32190921014SLuciano Coelho u32 rx_counter; 32290921014SLuciano Coelho 32390921014SLuciano Coelho /* Rx frames handled */ 32490921014SLuciano Coelho u32 rx_handled; 32590921014SLuciano Coelho 32690921014SLuciano Coelho /* Current double buffer */ 32790921014SLuciano Coelho u32 rx_current_buffer; 32890921014SLuciano Coelho u32 rx_last_id; 32990921014SLuciano Coelho 33090921014SLuciano Coelho /* The target interrupt mask */ 33190921014SLuciano Coelho u32 intr_mask; 33290921014SLuciano Coelho struct work_struct irq_work; 33390921014SLuciano Coelho 33490921014SLuciano Coelho /* The mbox event mask */ 33590921014SLuciano Coelho u32 event_mask; 33690921014SLuciano Coelho 33790921014SLuciano Coelho /* Mailbox pointers */ 33890921014SLuciano Coelho u32 mbox_ptr[2]; 33990921014SLuciano Coelho 34090921014SLuciano Coelho /* Are we currently scanning */ 34190921014SLuciano Coelho bool scanning; 34290921014SLuciano Coelho 34390921014SLuciano Coelho /* Default key (for WEP) */ 34490921014SLuciano Coelho u32 default_key; 34590921014SLuciano Coelho 34690921014SLuciano Coelho unsigned int tx_mgmt_frm_rate; 34790921014SLuciano Coelho unsigned int tx_mgmt_frm_mod; 34890921014SLuciano Coelho 34990921014SLuciano Coelho unsigned int rx_config; 35090921014SLuciano Coelho unsigned int rx_filter; 35190921014SLuciano Coelho 35290921014SLuciano Coelho /* is firmware in elp mode */ 35390921014SLuciano Coelho bool elp; 35490921014SLuciano Coelho 35590921014SLuciano Coelho struct delayed_work elp_work; 35690921014SLuciano Coelho 35790921014SLuciano Coelho enum wl1251_station_mode station_mode; 35890921014SLuciano Coelho 35990921014SLuciano Coelho /* PSM mode requested */ 36090921014SLuciano Coelho bool psm_requested; 36190921014SLuciano Coelho 362f7ad1eedSDavid Gnedt /* retry counter for PSM entries */ 363f7ad1eedSDavid Gnedt u8 psm_entry_retry; 364f7ad1eedSDavid Gnedt 36590921014SLuciano Coelho u16 beacon_int; 36690921014SLuciano Coelho u8 dtim_period; 36790921014SLuciano Coelho 36890921014SLuciano Coelho /* in dBm */ 36990921014SLuciano Coelho int power_level; 37090921014SLuciano Coelho 37190921014SLuciano Coelho int rssi_thold; 37290921014SLuciano Coelho 37390921014SLuciano Coelho struct wl1251_stats stats; 37490921014SLuciano Coelho struct wl1251_debugfs debugfs; 37590921014SLuciano Coelho 37690921014SLuciano Coelho __le32 buffer_32; 37790921014SLuciano Coelho u32 buffer_cmd; 37890921014SLuciano Coelho u8 buffer_busyword[WL1251_BUSY_WORD_LEN]; 37990921014SLuciano Coelho struct wl1251_rx_descriptor *rx_descriptor; 38090921014SLuciano Coelho 38190921014SLuciano Coelho struct ieee80211_vif *vif; 38290921014SLuciano Coelho 38390921014SLuciano Coelho u32 chip_id; 38490921014SLuciano Coelho char fw_ver[21]; 38590921014SLuciano Coelho 38690921014SLuciano Coelho /* Most recently reported noise in dBm */ 38790921014SLuciano Coelho s8 noise; 38890921014SLuciano Coelho }; 38990921014SLuciano Coelho 39090921014SLuciano Coelho int wl1251_plt_start(struct wl1251 *wl); 39190921014SLuciano Coelho int wl1251_plt_stop(struct wl1251 *wl); 39290921014SLuciano Coelho 39390921014SLuciano Coelho struct ieee80211_hw *wl1251_alloc_hw(void); 39490921014SLuciano Coelho int wl1251_free_hw(struct wl1251 *wl); 39590921014SLuciano Coelho int wl1251_init_ieee80211(struct wl1251 *wl); 39690921014SLuciano Coelho void wl1251_enable_interrupts(struct wl1251 *wl); 39790921014SLuciano Coelho void wl1251_disable_interrupts(struct wl1251 *wl); 39890921014SLuciano Coelho 39990921014SLuciano Coelho #define DEFAULT_HW_GEN_MODULATION_TYPE CCK_LONG /* Long Preamble */ 40090921014SLuciano Coelho #define DEFAULT_HW_GEN_TX_RATE RATE_2MBPS 40190921014SLuciano Coelho #define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */ 40290921014SLuciano Coelho 40390921014SLuciano Coelho #define WL1251_DEFAULT_POWER_LEVEL 20 40490921014SLuciano Coelho 40590921014SLuciano Coelho #define WL1251_TX_QUEUE_LOW_WATERMARK 10 40690921014SLuciano Coelho #define WL1251_TX_QUEUE_HIGH_WATERMARK 25 40790921014SLuciano Coelho 40890921014SLuciano Coelho #define WL1251_DEFAULT_BEACON_INT 100 40990921014SLuciano Coelho #define WL1251_DEFAULT_DTIM_PERIOD 1 41090921014SLuciano Coelho 41190921014SLuciano Coelho #define WL1251_DEFAULT_CHANNEL 0 41290921014SLuciano Coelho 41390921014SLuciano Coelho #define WL1251_DEFAULT_BET_CONSECUTIVE 10 41490921014SLuciano Coelho 41590921014SLuciano Coelho #define CHIP_ID_1251_PG10 (0x7010101) 41690921014SLuciano Coelho #define CHIP_ID_1251_PG11 (0x7020101) 41790921014SLuciano Coelho #define CHIP_ID_1251_PG12 (0x7030101) 41890921014SLuciano Coelho #define CHIP_ID_1271_PG10 (0x4030101) 41990921014SLuciano Coelho #define CHIP_ID_1271_PG20 (0x4030111) 42090921014SLuciano Coelho 4219f55c620SFelipe Balbi #define WL1251_FW_NAME "ti-connectivity/wl1251-fw.bin" 4229f55c620SFelipe Balbi #define WL1251_NVS_NAME "ti-connectivity/wl1251-nvs.bin" 42390921014SLuciano Coelho 42490921014SLuciano Coelho #define WL1251_POWER_ON_SLEEP 10 /* in milliseconds */ 42590921014SLuciano Coelho 42690921014SLuciano Coelho #define WL1251_PART_DOWN_MEM_START 0x0 42790921014SLuciano Coelho #define WL1251_PART_DOWN_MEM_SIZE 0x16800 42890921014SLuciano Coelho #define WL1251_PART_DOWN_REG_START REGISTERS_BASE 42990921014SLuciano Coelho #define WL1251_PART_DOWN_REG_SIZE REGISTERS_DOWN_SIZE 43090921014SLuciano Coelho 43190921014SLuciano Coelho #define WL1251_PART_WORK_MEM_START 0x28000 43290921014SLuciano Coelho #define WL1251_PART_WORK_MEM_SIZE 0x14000 43390921014SLuciano Coelho #define WL1251_PART_WORK_REG_START REGISTERS_BASE 43490921014SLuciano Coelho #define WL1251_PART_WORK_REG_SIZE REGISTERS_WORK_SIZE 43590921014SLuciano Coelho 43690921014SLuciano Coelho #define WL1251_DEFAULT_LOW_RSSI_WEIGHT 10 43790921014SLuciano Coelho #define WL1251_DEFAULT_LOW_RSSI_DEPTH 10 43890921014SLuciano Coelho 43990921014SLuciano Coelho #endif 440