1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2019-2020 Realtek Corporation 3 */ 4 5 #include <linux/devcoredump.h> 6 7 #include "cam.h" 8 #include "chan.h" 9 #include "debug.h" 10 #include "fw.h" 11 #include "mac.h" 12 #include "ps.h" 13 #include "reg.h" 14 #include "ser.h" 15 #include "util.h" 16 17 #define SER_RECFG_TIMEOUT 1000 18 19 enum ser_evt { 20 SER_EV_NONE, 21 SER_EV_STATE_IN, 22 SER_EV_STATE_OUT, 23 SER_EV_L1_RESET_PREPARE, /* pre-M0 */ 24 SER_EV_L1_RESET, /* M1 */ 25 SER_EV_DO_RECOVERY, /* M3 */ 26 SER_EV_MAC_RESET_DONE, /* M5 */ 27 SER_EV_L2_RESET, 28 SER_EV_L2_RECFG_DONE, 29 SER_EV_L2_RECFG_TIMEOUT, 30 SER_EV_M1_TIMEOUT, 31 SER_EV_M3_TIMEOUT, 32 SER_EV_FW_M5_TIMEOUT, 33 SER_EV_L0_RESET, 34 SER_EV_MAXX 35 }; 36 37 enum ser_state { 38 SER_IDLE_ST, 39 SER_L1_RESET_PRE_ST, 40 SER_RESET_TRX_ST, 41 SER_DO_HCI_ST, 42 SER_L2_RESET_ST, 43 SER_ST_MAX_ST 44 }; 45 46 struct ser_msg { 47 struct list_head list; 48 u8 event; 49 }; 50 51 struct state_ent { 52 u8 state; 53 char *name; 54 void (*st_func)(struct rtw89_ser *ser, u8 event); 55 }; 56 57 struct event_ent { 58 u8 event; 59 char *name; 60 }; 61 62 static char *ser_ev_name(struct rtw89_ser *ser, u8 event) 63 { 64 if (event < SER_EV_MAXX) 65 return ser->ev_tbl[event].name; 66 67 return "err_ev_name"; 68 } 69 70 static char *ser_st_name(struct rtw89_ser *ser) 71 { 72 if (ser->state < SER_ST_MAX_ST) 73 return ser->st_tbl[ser->state].name; 74 75 return "err_st_name"; 76 } 77 78 #define RTW89_DEF_SER_CD_TYPE(_name, _type, _size) \ 79 struct ser_cd_ ## _name { \ 80 u32 type; \ 81 u32 type_size; \ 82 u64 padding; \ 83 u8 data[_size]; \ 84 } __packed; \ 85 static void ser_cd_ ## _name ## _init(struct ser_cd_ ## _name *p) \ 86 { \ 87 p->type = _type; \ 88 p->type_size = sizeof(p->data); \ 89 p->padding = 0x0123456789abcdef; \ 90 } 91 92 enum rtw89_ser_cd_type { 93 RTW89_SER_CD_FW_RSVD_PLE = 0, 94 RTW89_SER_CD_FW_BACKTRACE = 1, 95 }; 96 97 RTW89_DEF_SER_CD_TYPE(fw_rsvd_ple, 98 RTW89_SER_CD_FW_RSVD_PLE, 99 RTW89_FW_RSVD_PLE_SIZE); 100 101 RTW89_DEF_SER_CD_TYPE(fw_backtrace, 102 RTW89_SER_CD_FW_BACKTRACE, 103 RTW89_FW_BACKTRACE_MAX_SIZE); 104 105 struct rtw89_ser_cd_buffer { 106 struct ser_cd_fw_rsvd_ple fwple; 107 struct ser_cd_fw_backtrace fwbt; 108 } __packed; 109 110 static struct rtw89_ser_cd_buffer *rtw89_ser_cd_prep(struct rtw89_dev *rtwdev) 111 { 112 struct rtw89_ser_cd_buffer *buf; 113 114 buf = vzalloc(sizeof(*buf)); 115 if (!buf) 116 return NULL; 117 118 ser_cd_fw_rsvd_ple_init(&buf->fwple); 119 ser_cd_fw_backtrace_init(&buf->fwbt); 120 121 return buf; 122 } 123 124 static void rtw89_ser_cd_send(struct rtw89_dev *rtwdev, 125 struct rtw89_ser_cd_buffer *buf) 126 { 127 rtw89_debug(rtwdev, RTW89_DBG_SER, "SER sends core dump\n"); 128 129 /* After calling dev_coredump, buf's lifetime is supposed to be 130 * handled by the device coredump framework. Note that a new dump 131 * will be discarded if a previous one hasn't been released by 132 * framework yet. 133 */ 134 dev_coredumpv(rtwdev->dev, buf, sizeof(*buf), GFP_KERNEL); 135 } 136 137 static void rtw89_ser_cd_free(struct rtw89_dev *rtwdev, 138 struct rtw89_ser_cd_buffer *buf, bool free_self) 139 { 140 if (!free_self) 141 return; 142 143 rtw89_debug(rtwdev, RTW89_DBG_SER, "SER frees core dump by self\n"); 144 145 /* When some problems happen during filling data of core dump, 146 * we won't send it to device coredump framework. Instead, we 147 * free buf by ourselves. 148 */ 149 vfree(buf); 150 } 151 152 static void ser_state_run(struct rtw89_ser *ser, u8 evt) 153 { 154 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); 155 156 rtw89_debug(rtwdev, RTW89_DBG_SER, "ser: %s receive %s\n", 157 ser_st_name(ser), ser_ev_name(ser, evt)); 158 159 wiphy_lock(rtwdev->hw->wiphy); 160 rtw89_leave_lps(rtwdev); 161 wiphy_unlock(rtwdev->hw->wiphy); 162 163 ser->st_tbl[ser->state].st_func(ser, evt); 164 } 165 166 static void ser_state_goto(struct rtw89_ser *ser, u8 new_state) 167 { 168 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); 169 170 if (ser->state == new_state || new_state >= SER_ST_MAX_ST) 171 return; 172 ser_state_run(ser, SER_EV_STATE_OUT); 173 174 rtw89_debug(rtwdev, RTW89_DBG_SER, "ser: %s goto -> %s\n", 175 ser_st_name(ser), ser->st_tbl[new_state].name); 176 177 ser->state = new_state; 178 ser_state_run(ser, SER_EV_STATE_IN); 179 } 180 181 static struct ser_msg *__rtw89_ser_dequeue_msg(struct rtw89_ser *ser) 182 { 183 struct ser_msg *msg; 184 185 spin_lock_irq(&ser->msg_q_lock); 186 msg = list_first_entry_or_null(&ser->msg_q, struct ser_msg, list); 187 if (msg) 188 list_del(&msg->list); 189 spin_unlock_irq(&ser->msg_q_lock); 190 191 return msg; 192 } 193 194 static void rtw89_ser_hdl_work(struct work_struct *work) 195 { 196 struct ser_msg *msg; 197 struct rtw89_ser *ser = container_of(work, struct rtw89_ser, 198 ser_hdl_work); 199 200 while ((msg = __rtw89_ser_dequeue_msg(ser))) { 201 ser_state_run(ser, msg->event); 202 kfree(msg); 203 } 204 } 205 206 static int ser_send_msg(struct rtw89_ser *ser, u8 event) 207 { 208 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); 209 struct ser_msg *msg = NULL; 210 211 if (test_bit(RTW89_SER_DRV_STOP_RUN, ser->flags)) 212 return -EIO; 213 214 msg = kmalloc(sizeof(*msg), GFP_ATOMIC); 215 if (!msg) 216 return -ENOMEM; 217 218 msg->event = event; 219 220 spin_lock_irq(&ser->msg_q_lock); 221 list_add(&msg->list, &ser->msg_q); 222 spin_unlock_irq(&ser->msg_q_lock); 223 224 ieee80211_queue_work(rtwdev->hw, &ser->ser_hdl_work); 225 return 0; 226 } 227 228 static void rtw89_ser_alarm_work(struct work_struct *work) 229 { 230 struct rtw89_ser *ser = container_of(work, struct rtw89_ser, 231 ser_alarm_work.work); 232 233 ser_send_msg(ser, ser->alarm_event); 234 ser->alarm_event = SER_EV_NONE; 235 } 236 237 static void ser_set_alarm(struct rtw89_ser *ser, u32 ms, u8 event) 238 { 239 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); 240 241 if (test_bit(RTW89_SER_DRV_STOP_RUN, ser->flags)) 242 return; 243 244 ser->alarm_event = event; 245 ieee80211_queue_delayed_work(rtwdev->hw, &ser->ser_alarm_work, 246 msecs_to_jiffies(ms)); 247 } 248 249 static void ser_del_alarm(struct rtw89_ser *ser) 250 { 251 cancel_delayed_work(&ser->ser_alarm_work); 252 ser->alarm_event = SER_EV_NONE; 253 } 254 255 /* driver function */ 256 static void drv_stop_tx(struct rtw89_ser *ser) 257 { 258 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); 259 260 ieee80211_stop_queues(rtwdev->hw); 261 set_bit(RTW89_SER_DRV_STOP_TX, ser->flags); 262 } 263 264 static void drv_stop_rx(struct rtw89_ser *ser) 265 { 266 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); 267 268 clear_bit(RTW89_FLAG_RUNNING, rtwdev->flags); 269 set_bit(RTW89_SER_DRV_STOP_RX, ser->flags); 270 } 271 272 static void drv_trx_reset(struct rtw89_ser *ser) 273 { 274 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); 275 276 rtw89_hci_reset(rtwdev); 277 } 278 279 static void drv_resume_tx(struct rtw89_ser *ser) 280 { 281 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); 282 283 if (!test_bit(RTW89_SER_DRV_STOP_TX, ser->flags)) 284 return; 285 286 ieee80211_wake_queues(rtwdev->hw); 287 clear_bit(RTW89_SER_DRV_STOP_TX, ser->flags); 288 } 289 290 static void drv_resume_rx(struct rtw89_ser *ser) 291 { 292 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); 293 294 if (!test_bit(RTW89_SER_DRV_STOP_RX, ser->flags)) 295 return; 296 297 set_bit(RTW89_FLAG_RUNNING, rtwdev->flags); 298 clear_bit(RTW89_SER_DRV_STOP_RX, ser->flags); 299 } 300 301 static void ser_reset_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) 302 { 303 struct rtw89_vif_link *rtwvif_link; 304 unsigned int link_id; 305 306 rtwvif->tdls_peer = 0; 307 308 rtw89_vif_for_each_link(rtwvif, rtwvif_link, link_id) { 309 rtw89_core_release_bit_map(rtwdev->hw_port, rtwvif_link->port); 310 rtwvif_link->net_type = RTW89_NET_TYPE_NO_LINK; 311 rtwvif_link->trigger = false; 312 rtwvif_link->rand_tsf_done = false; 313 314 rtw89_p2p_noa_once_deinit(rtwvif_link); 315 } 316 } 317 318 static void ser_sta_deinit_cam_iter(void *data, struct ieee80211_sta *sta) 319 { 320 struct rtw89_vif *target_rtwvif = (struct rtw89_vif *)data; 321 struct rtw89_sta *rtwsta = sta_to_rtwsta(sta); 322 struct rtw89_vif *rtwvif = rtwsta->rtwvif; 323 struct rtw89_dev *rtwdev = rtwvif->rtwdev; 324 struct rtw89_vif_link *rtwvif_link; 325 struct rtw89_sta_link *rtwsta_link; 326 unsigned int link_id; 327 328 if (rtwvif != target_rtwvif) 329 return; 330 331 rtw89_sta_for_each_link(rtwsta, rtwsta_link, link_id) { 332 rtwvif_link = rtwsta_link->rtwvif_link; 333 334 if (rtwvif_link->net_type == RTW89_NET_TYPE_AP_MODE || sta->tdls) 335 rtw89_cam_deinit_addr_cam(rtwdev, &rtwsta_link->addr_cam); 336 if (sta->tdls) 337 rtw89_cam_deinit_bssid_cam(rtwdev, &rtwsta_link->bssid_cam); 338 339 INIT_LIST_HEAD(&rtwsta_link->ba_cam_list); 340 } 341 } 342 343 static void ser_deinit_cam(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) 344 { 345 struct rtw89_vif_link *rtwvif_link; 346 unsigned int link_id; 347 348 ieee80211_iterate_stations_atomic(rtwdev->hw, 349 ser_sta_deinit_cam_iter, 350 rtwvif); 351 352 rtw89_vif_for_each_link(rtwvif, rtwvif_link, link_id) 353 rtw89_cam_deinit(rtwdev, rtwvif_link); 354 355 bitmap_zero(rtwdev->cam_info.ba_cam_map, RTW89_MAX_BA_CAM_NUM); 356 } 357 358 static void ser_reset_mac_binding(struct rtw89_dev *rtwdev) 359 { 360 struct rtw89_vif *rtwvif; 361 362 rtw89_cam_reset_keys(rtwdev); 363 rtw89_for_each_rtwvif(rtwdev, rtwvif) 364 ser_deinit_cam(rtwdev, rtwvif); 365 366 rtw89_core_release_all_bits_map(rtwdev->mac_id_map, RTW89_MAX_MAC_ID_NUM); 367 rtw89_for_each_rtwvif(rtwdev, rtwvif) 368 ser_reset_vif(rtwdev, rtwvif); 369 370 rtwdev->total_sta_assoc = 0; 371 refcount_set(&rtwdev->refcount_ap_info, 0); 372 } 373 374 /* hal function */ 375 static int hal_enable_dma(struct rtw89_ser *ser) 376 { 377 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); 378 int ret; 379 380 if (!test_bit(RTW89_SER_HAL_STOP_DMA, ser->flags)) 381 return 0; 382 383 if (!rtwdev->hci.ops->mac_lv1_rcvy) 384 return -EIO; 385 386 ret = rtwdev->hci.ops->mac_lv1_rcvy(rtwdev, RTW89_LV1_RCVY_STEP_2); 387 if (!ret) 388 clear_bit(RTW89_SER_HAL_STOP_DMA, ser->flags); 389 else 390 rtw89_debug(rtwdev, RTW89_DBG_SER, 391 "lv1 rcvy fail to start dma: %d\n", ret); 392 393 return ret; 394 } 395 396 static int hal_stop_dma(struct rtw89_ser *ser) 397 { 398 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); 399 int ret; 400 401 if (!rtwdev->hci.ops->mac_lv1_rcvy) 402 return -EIO; 403 404 ret = rtwdev->hci.ops->mac_lv1_rcvy(rtwdev, RTW89_LV1_RCVY_STEP_1); 405 if (!ret) 406 set_bit(RTW89_SER_HAL_STOP_DMA, ser->flags); 407 else 408 rtw89_debug(rtwdev, RTW89_DBG_SER, 409 "lv1 rcvy fail to stop dma: %d\n", ret); 410 411 return ret; 412 } 413 414 static void hal_send_post_m0_event(struct rtw89_ser *ser) 415 { 416 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); 417 418 rtw89_mac_set_err_status(rtwdev, MAC_AX_ERR_L1_RESET_START_DMAC); 419 } 420 421 static void hal_send_m2_event(struct rtw89_ser *ser) 422 { 423 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); 424 425 rtw89_mac_set_err_status(rtwdev, MAC_AX_ERR_L1_DISABLE_EN); 426 } 427 428 static void hal_send_m4_event(struct rtw89_ser *ser) 429 { 430 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); 431 432 rtw89_mac_set_err_status(rtwdev, MAC_AX_ERR_L1_RCVY_EN); 433 } 434 435 /* state handler */ 436 static void ser_idle_st_hdl(struct rtw89_ser *ser, u8 evt) 437 { 438 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); 439 440 switch (evt) { 441 case SER_EV_STATE_IN: 442 rtw89_hci_recovery_complete(rtwdev); 443 clear_bit(RTW89_FLAG_SER_HANDLING, rtwdev->flags); 444 clear_bit(RTW89_FLAG_CRASH_SIMULATING, rtwdev->flags); 445 break; 446 case SER_EV_L1_RESET_PREPARE: 447 ser_state_goto(ser, SER_L1_RESET_PRE_ST); 448 break; 449 case SER_EV_L1_RESET: 450 ser_state_goto(ser, SER_RESET_TRX_ST); 451 break; 452 case SER_EV_L2_RESET: 453 ser_state_goto(ser, SER_L2_RESET_ST); 454 break; 455 case SER_EV_STATE_OUT: 456 set_bit(RTW89_FLAG_SER_HANDLING, rtwdev->flags); 457 rtw89_hci_recovery_start(rtwdev); 458 break; 459 default: 460 break; 461 } 462 } 463 464 static void ser_l1_reset_pre_st_hdl(struct rtw89_ser *ser, u8 evt) 465 { 466 switch (evt) { 467 case SER_EV_STATE_IN: 468 ser->prehandle_l1 = true; 469 hal_send_post_m0_event(ser); 470 ser_set_alarm(ser, 1000, SER_EV_M1_TIMEOUT); 471 break; 472 case SER_EV_L1_RESET: 473 ser_state_goto(ser, SER_RESET_TRX_ST); 474 break; 475 case SER_EV_M1_TIMEOUT: 476 ser_state_goto(ser, SER_L2_RESET_ST); 477 break; 478 case SER_EV_STATE_OUT: 479 ser_del_alarm(ser); 480 break; 481 default: 482 break; 483 } 484 } 485 486 static void ser_reset_trx_st_hdl(struct rtw89_ser *ser, u8 evt) 487 { 488 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); 489 struct wiphy *wiphy = rtwdev->hw->wiphy; 490 491 switch (evt) { 492 case SER_EV_STATE_IN: 493 wiphy_lock(wiphy); 494 wiphy_delayed_work_cancel(wiphy, &rtwdev->track_work); 495 wiphy_delayed_work_cancel(wiphy, &rtwdev->track_ps_work); 496 wiphy_unlock(wiphy); 497 drv_stop_tx(ser); 498 499 if (hal_stop_dma(ser)) { 500 ser_state_goto(ser, SER_L2_RESET_ST); 501 break; 502 } 503 504 drv_stop_rx(ser); 505 drv_trx_reset(ser); 506 507 /* wait m3 */ 508 hal_send_m2_event(ser); 509 510 /* set alarm to prevent FW response timeout */ 511 ser_set_alarm(ser, 1000, SER_EV_M3_TIMEOUT); 512 break; 513 514 case SER_EV_DO_RECOVERY: 515 ser_state_goto(ser, SER_DO_HCI_ST); 516 break; 517 518 case SER_EV_M3_TIMEOUT: 519 ser_state_goto(ser, SER_L2_RESET_ST); 520 break; 521 522 case SER_EV_STATE_OUT: 523 ser_del_alarm(ser); 524 hal_enable_dma(ser); 525 drv_resume_rx(ser); 526 drv_resume_tx(ser); 527 wiphy_delayed_work_queue(wiphy, &rtwdev->track_work, 528 RTW89_TRACK_WORK_PERIOD); 529 wiphy_delayed_work_queue(wiphy, &rtwdev->track_ps_work, 530 RTW89_TRACK_PS_WORK_PERIOD); 531 break; 532 533 default: 534 break; 535 } 536 } 537 538 static void ser_do_hci_st_hdl(struct rtw89_ser *ser, u8 evt) 539 { 540 switch (evt) { 541 case SER_EV_STATE_IN: 542 /* wait m5 */ 543 hal_send_m4_event(ser); 544 545 /* prevent FW response timeout */ 546 ser_set_alarm(ser, 1000, SER_EV_FW_M5_TIMEOUT); 547 break; 548 549 case SER_EV_FW_M5_TIMEOUT: 550 ser_state_goto(ser, SER_L2_RESET_ST); 551 break; 552 553 case SER_EV_MAC_RESET_DONE: 554 ser_state_goto(ser, SER_IDLE_ST); 555 break; 556 557 case SER_EV_STATE_OUT: 558 ser_del_alarm(ser); 559 break; 560 561 default: 562 break; 563 } 564 } 565 566 static void ser_mac_mem_dump(struct rtw89_dev *rtwdev, u8 *buf, 567 u8 sel, u32 start_addr, u32 len) 568 { 569 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; 570 u32 filter_model_addr = mac->filter_model_addr; 571 u32 indir_access_addr = mac->indir_access_addr; 572 u32 mem_page_size = mac->mem_page_size; 573 u32 *ptr = (u32 *)buf; 574 u32 base_addr, start_page, residue; 575 u32 cnt = 0; 576 u32 i; 577 578 start_page = start_addr / mem_page_size; 579 residue = start_addr % mem_page_size; 580 base_addr = mac->mem_base_addrs[sel]; 581 base_addr += start_page * mem_page_size; 582 583 while (cnt < len) { 584 rtw89_write32(rtwdev, filter_model_addr, base_addr); 585 586 for (i = indir_access_addr + residue; 587 i < indir_access_addr + mem_page_size; 588 i += 4, ptr++) { 589 *ptr = rtw89_read32(rtwdev, i); 590 cnt += 4; 591 if (cnt >= len) 592 break; 593 } 594 595 residue = 0; 596 base_addr += mem_page_size; 597 } 598 } 599 600 static void rtw89_ser_fw_rsvd_ple_dump(struct rtw89_dev *rtwdev, u8 *buf) 601 { 602 u32 start_addr = rtwdev->chip->rsvd_ple_ofst; 603 604 rtw89_debug(rtwdev, RTW89_DBG_SER, 605 "dump mem for fw rsvd payload engine (start addr: 0x%x)\n", 606 start_addr); 607 ser_mac_mem_dump(rtwdev, buf, RTW89_MAC_MEM_SHARED_BUF, start_addr, 608 RTW89_FW_RSVD_PLE_SIZE); 609 } 610 611 struct __fw_backtrace_entry { 612 u32 wcpu_addr; 613 u32 size; 614 u32 key; 615 } __packed; 616 617 struct __fw_backtrace_info { 618 u32 ra; 619 u32 sp; 620 } __packed; 621 622 static_assert(RTW89_FW_BACKTRACE_INFO_SIZE == 623 sizeof(struct __fw_backtrace_info)); 624 625 static u32 convert_addr_from_wcpu(u32 wcpu_addr) 626 { 627 if (wcpu_addr < 0x30000000) 628 return wcpu_addr; 629 630 return wcpu_addr & GENMASK(28, 0); 631 } 632 633 static int rtw89_ser_fw_backtrace_dump(struct rtw89_dev *rtwdev, u8 *buf, 634 const struct __fw_backtrace_entry *ent) 635 { 636 struct __fw_backtrace_info *ptr = (struct __fw_backtrace_info *)buf; 637 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; 638 u32 filter_model_addr = mac->filter_model_addr; 639 u32 indir_access_addr = mac->indir_access_addr; 640 u32 fwbt_addr = convert_addr_from_wcpu(ent->wcpu_addr); 641 u32 fwbt_size = ent->size; 642 u32 fwbt_key = ent->key; 643 u32 i; 644 645 if (fwbt_addr == 0) { 646 rtw89_warn(rtwdev, "FW backtrace invalid address: 0x%x\n", 647 fwbt_addr); 648 return -EINVAL; 649 } 650 651 if (fwbt_key != RTW89_FW_BACKTRACE_KEY) { 652 rtw89_warn(rtwdev, "FW backtrace invalid key: 0x%x\n", 653 fwbt_key); 654 return -EINVAL; 655 } 656 657 if (fwbt_size == 0 || !RTW89_VALID_FW_BACKTRACE_SIZE(fwbt_size) || 658 fwbt_size > RTW89_FW_BACKTRACE_MAX_SIZE) { 659 rtw89_warn(rtwdev, "FW backtrace invalid size: 0x%x\n", 660 fwbt_size); 661 return -EINVAL; 662 } 663 664 rtw89_debug(rtwdev, RTW89_DBG_SER, "dump fw backtrace start\n"); 665 rtw89_write32(rtwdev, filter_model_addr, fwbt_addr); 666 667 for (i = indir_access_addr; 668 i < indir_access_addr + fwbt_size; 669 i += RTW89_FW_BACKTRACE_INFO_SIZE, ptr++) { 670 *ptr = (struct __fw_backtrace_info){ 671 .ra = rtw89_read32(rtwdev, i), 672 .sp = rtw89_read32(rtwdev, i + 4), 673 }; 674 rtw89_debug(rtwdev, RTW89_DBG_SER, 675 "next sp: 0x%x, next ra: 0x%x\n", 676 ptr->sp, ptr->ra); 677 } 678 679 rtw89_debug(rtwdev, RTW89_DBG_SER, "dump fw backtrace end\n"); 680 return 0; 681 } 682 683 static void ser_l2_reset_st_pre_hdl(struct rtw89_ser *ser) 684 { 685 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); 686 struct rtw89_ser_cd_buffer *buf; 687 struct __fw_backtrace_entry fwbt_ent; 688 int ret = 0; 689 690 buf = rtw89_ser_cd_prep(rtwdev); 691 if (!buf) { 692 ret = -ENOMEM; 693 goto bottom; 694 } 695 696 rtw89_ser_fw_rsvd_ple_dump(rtwdev, buf->fwple.data); 697 698 fwbt_ent = *(struct __fw_backtrace_entry *)buf->fwple.data; 699 ret = rtw89_ser_fw_backtrace_dump(rtwdev, buf->fwbt.data, &fwbt_ent); 700 if (ret) 701 goto bottom; 702 703 rtw89_ser_cd_send(rtwdev, buf); 704 705 bottom: 706 rtw89_ser_cd_free(rtwdev, buf, !!ret); 707 708 ser_reset_mac_binding(rtwdev); 709 rtw89_core_stop(rtwdev); 710 rtw89_entity_init(rtwdev); 711 rtw89_fw_release_general_pkt_list(rtwdev, false); 712 INIT_LIST_HEAD(&rtwdev->rtwvifs_list); 713 } 714 715 static void ser_l2_reset_st_hdl(struct rtw89_ser *ser, u8 evt) 716 { 717 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); 718 719 switch (evt) { 720 case SER_EV_STATE_IN: 721 wiphy_lock(rtwdev->hw->wiphy); 722 ser_l2_reset_st_pre_hdl(ser); 723 wiphy_unlock(rtwdev->hw->wiphy); 724 725 ieee80211_restart_hw(rtwdev->hw); 726 ser_set_alarm(ser, SER_RECFG_TIMEOUT, SER_EV_L2_RECFG_TIMEOUT); 727 break; 728 729 case SER_EV_L2_RECFG_TIMEOUT: 730 rtw89_info(rtwdev, "Err: ser L2 re-config timeout\n"); 731 fallthrough; 732 case SER_EV_L2_RECFG_DONE: 733 ser_state_goto(ser, SER_IDLE_ST); 734 break; 735 736 case SER_EV_STATE_OUT: 737 ser_del_alarm(ser); 738 break; 739 740 default: 741 break; 742 } 743 } 744 745 static const struct event_ent ser_ev_tbl[] = { 746 {SER_EV_NONE, "SER_EV_NONE"}, 747 {SER_EV_STATE_IN, "SER_EV_STATE_IN"}, 748 {SER_EV_STATE_OUT, "SER_EV_STATE_OUT"}, 749 {SER_EV_L1_RESET_PREPARE, "SER_EV_L1_RESET_PREPARE pre-m0"}, 750 {SER_EV_L1_RESET, "SER_EV_L1_RESET m1"}, 751 {SER_EV_DO_RECOVERY, "SER_EV_DO_RECOVERY m3"}, 752 {SER_EV_MAC_RESET_DONE, "SER_EV_MAC_RESET_DONE m5"}, 753 {SER_EV_L2_RESET, "SER_EV_L2_RESET"}, 754 {SER_EV_L2_RECFG_DONE, "SER_EV_L2_RECFG_DONE"}, 755 {SER_EV_L2_RECFG_TIMEOUT, "SER_EV_L2_RECFG_TIMEOUT"}, 756 {SER_EV_M1_TIMEOUT, "SER_EV_M1_TIMEOUT"}, 757 {SER_EV_M3_TIMEOUT, "SER_EV_M3_TIMEOUT"}, 758 {SER_EV_FW_M5_TIMEOUT, "SER_EV_FW_M5_TIMEOUT"}, 759 {SER_EV_L0_RESET, "SER_EV_L0_RESET"}, 760 {SER_EV_MAXX, "SER_EV_MAX"} 761 }; 762 763 static const struct state_ent ser_st_tbl[] = { 764 {SER_IDLE_ST, "SER_IDLE_ST", ser_idle_st_hdl}, 765 {SER_L1_RESET_PRE_ST, "SER_L1_RESET_PRE_ST", ser_l1_reset_pre_st_hdl}, 766 {SER_RESET_TRX_ST, "SER_RESET_TRX_ST", ser_reset_trx_st_hdl}, 767 {SER_DO_HCI_ST, "SER_DO_HCI_ST", ser_do_hci_st_hdl}, 768 {SER_L2_RESET_ST, "SER_L2_RESET_ST", ser_l2_reset_st_hdl} 769 }; 770 771 int rtw89_ser_init(struct rtw89_dev *rtwdev) 772 { 773 struct rtw89_ser *ser = &rtwdev->ser; 774 775 memset(ser, 0, sizeof(*ser)); 776 INIT_LIST_HEAD(&ser->msg_q); 777 ser->state = SER_IDLE_ST; 778 ser->st_tbl = ser_st_tbl; 779 ser->ev_tbl = ser_ev_tbl; 780 781 bitmap_zero(ser->flags, RTW89_NUM_OF_SER_FLAGS); 782 spin_lock_init(&ser->msg_q_lock); 783 INIT_WORK(&ser->ser_hdl_work, rtw89_ser_hdl_work); 784 INIT_DELAYED_WORK(&ser->ser_alarm_work, rtw89_ser_alarm_work); 785 return 0; 786 } 787 788 int rtw89_ser_deinit(struct rtw89_dev *rtwdev) 789 { 790 struct rtw89_ser *ser = (struct rtw89_ser *)&rtwdev->ser; 791 792 set_bit(RTW89_SER_DRV_STOP_RUN, ser->flags); 793 cancel_delayed_work_sync(&ser->ser_alarm_work); 794 cancel_work_sync(&ser->ser_hdl_work); 795 clear_bit(RTW89_SER_DRV_STOP_RUN, ser->flags); 796 return 0; 797 } 798 799 void rtw89_ser_recfg_done(struct rtw89_dev *rtwdev) 800 { 801 ser_send_msg(&rtwdev->ser, SER_EV_L2_RECFG_DONE); 802 } 803 804 int rtw89_ser_notify(struct rtw89_dev *rtwdev, u32 err) 805 { 806 u8 event = SER_EV_NONE; 807 808 rtw89_info(rtwdev, "SER catches error: 0x%x\n", err); 809 810 switch (err) { 811 case MAC_AX_ERR_L1_PREERR_DMAC: /* pre-M0 */ 812 event = SER_EV_L1_RESET_PREPARE; 813 break; 814 case MAC_AX_ERR_L1_ERR_DMAC: 815 case MAC_AX_ERR_L0_PROMOTE_TO_L1: 816 event = SER_EV_L1_RESET; /* M1 */ 817 break; 818 case MAC_AX_ERR_L1_RESET_DISABLE_DMAC_DONE: 819 event = SER_EV_DO_RECOVERY; /* M3 */ 820 break; 821 case MAC_AX_ERR_L1_RESET_RECOVERY_DONE: 822 event = SER_EV_MAC_RESET_DONE; /* M5 */ 823 break; 824 case MAC_AX_ERR_L0_ERR_CMAC0: 825 case MAC_AX_ERR_L0_ERR_CMAC1: 826 case MAC_AX_ERR_L0_RESET_DONE: 827 event = SER_EV_L0_RESET; 828 break; 829 default: 830 if (err == MAC_AX_ERR_L1_PROMOTE_TO_L2 || 831 (err >= MAC_AX_ERR_L2_ERR_AH_DMA && 832 err <= MAC_AX_GET_ERR_MAX)) 833 event = SER_EV_L2_RESET; 834 break; 835 } 836 837 if (event == SER_EV_NONE) { 838 rtw89_warn(rtwdev, "SER cannot recognize error: 0x%x\n", err); 839 return -EINVAL; 840 } 841 842 ser_send_msg(&rtwdev->ser, event); 843 return 0; 844 } 845 EXPORT_SYMBOL(rtw89_ser_notify); 846